Thanks for the in-depth story and link.
Rene
Ian Wilson wrote:
The first resonance (at least) of a cap is series, so looks like a short
circuit. By adding a number of different valued caps you can scatter a
number of these nice AC shorts around your board and around your
frequencies of
On 07:14 PM 4/06/2003, John Sheahan said:
On Wed, Jun 04, 2003 at 09:34:18AM +0200, Norbert Hoppe wrote:
When selecting parallel caps, it is important to remember that as the
larger
value capacitor goes inductive, the smaller value cap is still capacitive.
At a particular frequency, a LC
Wilson [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Wednesday, June 04, 2003 7:37 AM
Subject: Re: [PEDA] Re[2]: six or eight-layer (or more?) stackups -
Capacitance
On 07:14 PM 4/06/2003, John Sheahan said:
On Wed, Jun 04, 2003 at 09:34:18AM +0200, Norbert Hoppe wrote:
When
On Wed, Jun 04, 2003 at 09:37:19PM +1000, Ian Wilson wrote:
Thanks for the well reasoned response Ian.
I went through this a few months ago, but needed 0402 package
(was a dense board) and a similar line of research showed 100n
was the best choice there. But it depends on the particular
caps
On 08:28 AM 5/06/2003, John Sheahan said:
snip..
Value Size Impedance
103 0603~1 ohm
103 0805~0.5 ohm
103 1206~0.3 ohm
104 0805~1 ohm
104 1206~1 ohm
So if you spec a 10nF 0603 you have a resistor, not a decoupler, at 100
MHz.
probably only a
On Thu, Jun 05, 2003 at 10:29:29AM +1000, Ian Wilson wrote:
about is minimising the AC impedance between the power nets over a suitably
broad range of frequencies and to an adequately low level - both
application dependent. Operating past resonance simply means the impedance
is inductive
JH 2/ Use a spread of capacitor values so that you swap one or two deep
JH resonant nulls for a swag of shallower ones spread across the spectrum.
I found this to be interesting. I've just about finished reading Digital
Design for Interference Specifications David l. Terrell, R.Kenneth
Keenan,
- Original Message -
From: Phillip Stevens [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Wednesday, June 04, 2003 7:22 AM
Subject: [PEDA] Re[2]: six or eight-layer (or more?) stackups - Capacitance
JH 2/ Use a spread of capacitor values so that you swap one or two
