[PEDA] EDIF/PLD software

2001-05-07 Thread Nicholas Piccinich

Greetings,

Has anyone ever used a Protel EDIF netlist with Xilinx's Foundation,
Altera's Quartus, or any other PLD software?
Are only certain types of components usable to import the netlist
successfully?

Thank you for your time,

Nicholas S. Piccinich

Blackhawk Management Corporation
1324 Wyckoff Road
Wall Township, New Jersey 07753-6800

TEL # (732)919-3090  ext. 22
FAX # (732)919-3096


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Re: [PEDA] EDIF/PLD software

2001-05-07 Thread Nicholas Piccinich

Jon  Ron,

The Xilinx representative said it was not possible to import an EDIF netlist
unless I used device specific architecture of the target device,
which I did not do.
I am going to make modules in Foundation of the parts I used in the Protel
design to see if it helps import the netlist.
Did you try this or think it would work?

Are you using Foundation ISE or 3.1i?  Does ISE support ABEL-HDL?

Nick

-Original Message-
From: Jon Elson [mailto:[EMAIL PROTECTED]]
Sent: Friday, April 13, 2001 3:37 PM
To: Protel EDA Forum
Subject: Re: [PEDA] EDIF/PLD software




Nicholas Piccinich wrote:

 Greetings,

 Has anyone ever used a Protel EDIF netlist with Xilinx's Foundation,
 Altera's Quartus, or any other PLD software?
 Are only certain types of components usable to import the netlist
 successfully?

I tried to do some development using P99SE, aimed at a Xilinx
FPGA.  I did get as far as simulation, but when I tried to get
that compiled into downloadable form, I hit a brick wall.  I got
a variety of files, Xilinx .XNF files, VHDL files, etc.  But, I
was never able to get Xilinx's free tools to accept any of these files.

I eventually gave up, and bought the Xilinx Foundation, and did
all my work in that, although their schematic tools are hideous, and
the rest of the interface is just a little klunky.  But, Foundation
works, and produces FPGA and CPLD designs that work precisely
the way the simulation says they will.

Jon



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Re: [PEDA] EDIF/PLD software

2001-05-07 Thread Jon Elson



Nicholas Piccinich wrote:

 Jon  Ron,

 The Xilinx representative said it was not possible to import an EDIF netlist
 unless I used device specific architecture of the target device,
 which I did not do.

I imported a Xilinx 3000 library. which seems to be structurally the same as
the Spartan (XCS) gate arrays.  I think I got these from Protel Adv Sch
for Windows, which was the last Protel version that had internal schematics
for the parts.  Unfortunately, they were automatically translated from
somebody else's schematics, and the translation had systematic errors,
namely the omission of some junction dots, which left most of the FFs
unclocked.  I fixed the parts I was using, and then hit the bad EDIF format
problem.

 I am going to make modules in Foundation of the parts I used in the Protel
 design to see if it helps import the netlist.
 Did you try this or think it would work?

I doubt it will work, as the EDIF file is rejected with syntax errors.
I looked at the file produced by Protel, and though I am no expert on
EDIF, I believe it DID have errors that violate the spec of the language.
I sent a report to Protel almost a year ago, and got no response.

 Are you using Foundation ISE or 3.1i?  Does ISE support ABEL-HDL?

I was using Foundation 2.1i at the time.

Jon


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Re: [PEDA] EDIF/PLD software

2001-05-07 Thread Ron Kingham
 


Re: [PEDA] EDIF/PLD software

2001-05-07 Thread Nicholas Piccinich

Do you happen to know what the name of Protel's Library Mapping File (LMF)
is?
I asked Protel support last summer, and never got a response.
It could be helpful for importing a Protel EDIF netlist into other programs?

Otherwise, I'll have to recreate the design in the software I choose.

Any known egroups for Xilinx or Altera Software?

Thanks Jon, Ron,  Rich for all your helpful info,

Nick

-Original Message-
From: Jon Elson [mailto:[EMAIL PROTECTED]]
Sent: Monday, April 16, 2001 3:04 PM
To: Protel EDA Forum
Subject: Re: [PEDA] EDIF/PLD software




Nicholas Piccinich wrote:

 Jon  Ron,

 The Xilinx representative said it was not possible to import an EDIF
netlist
 unless I used device specific architecture of the target device,
 which I did not do.

I imported a Xilinx 3000 library. which seems to be structurally the same as
the Spartan (XCS) gate arrays.  I think I got these from Protel Adv Sch
for Windows, which was the last Protel version that had internal schematics
for the parts.  Unfortunately, they were automatically translated from
somebody else's schematics, and the translation had systematic errors,
namely the omission of some junction dots, which left most of the FFs
unclocked.  I fixed the parts I was using, and then hit the bad EDIF format
problem.

 I am going to make modules in Foundation of the parts I used in the Protel
 design to see if it helps import the netlist.
 Did you try this or think it would work?

I doubt it will work, as the EDIF file is rejected with syntax errors.
I looked at the file produced by Protel, and though I am no expert on
EDIF, I believe it DID have errors that violate the spec of the language.
I sent a report to Protel almost a year ago, and got no response.

 Are you using Foundation ISE or 3.1i?  Does ISE support ABEL-HDL?

I was using Foundation 2.1i at the time.

Jon



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Re: [PEDA] EDIF/PLD software

2001-05-07 Thread Ron Kingham