[Qemu-devel] [PATCH v3 2/3] util/uri.c: only remove `return`'s brackets

only remove brackets that wrap `return` statements' content. use `perl -pi -e "s/return \((.*?)\);/return \1;/g" util/uri.c` to remove pattern like this: "return (1);" Signed-off-by: Su Hang --- util/uri.c | 160

[Qemu-devel] [PATCH v3 3/3] util/uri.c: add brackets to `if` statements

Add brackets that wrap `if`, `else`, `while` that hold single statements. In order to do this, I write a simple python regex script. Since then, all complaints rised by checkpatch.pl has been suppressed. Signed-off-by: Su Hang --- util/uri.c | 462

[Qemu-devel] [PATCH v3 1/3] util/uri.c: replace TAB with whitespace

Formating with clang-format. Change back few code by hand, to make sure only include whitespace change. Signed-off-by: Su Hang --- util/uri.c | 1456 ++-- 1 file changed, 729 insertions(+), 727 deletions(-) diff

Re: [Qemu-devel] intel-iommu and vhost: Do we need 'device-iotlb' and 'ats'?

> From: Peter Xu > Sent: Friday, February 23, 2018 3:09 PM > > > > > Right. I think my question was not clear. My question was that why don’t > > IOMMU invalidate device-iotlb along with its mappings in one go. Then > IOMMU > > device driver doesn’t need to flush device-iotlb explicitly. Maybe

Re: [Qemu-devel] intel-iommu and vhost: Do we need 'device-iotlb' and 'ats'?

On Fri, Feb 23, 2018 at 06:34:04AM +, Jintack Lim wrote: > On Fri, Feb 23, 2018 at 1:10 AM Peter Xu wrote: > > > On Fri, Feb 23, 2018 at 12:32:13AM -0500, Jintack Lim wrote: > > > Hi Peter, > > > > > > Hope you had great holidays! > > > > > > On Thu, Feb 22, 2018 at 10:55

Re: [Qemu-devel] [PATCH v4 0/7] vfio: add display support

> -Original Message- > From: Zhenyu Wang [mailto:zhen...@linux.intel.com] > Sent: Friday, February 23, 2018 10:43 AM > To: Gerd Hoffmann > Cc: Alex Williamson ; Kirti Wankhede > ; intel-gvt-...@lists.freedesktop.org;

Re: [Qemu-devel] [RFC, PATCH, v1] hw/audio/opl2lpt: add support for OPL2LPT

Hi, This series failed docker-quick@centos6 build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. Type: series Message-id: 20180218144021.11641-1-vinc...@bernat.im Subject: [Qemu-devel] [RFC, PATCH, v1]

Re: [Qemu-devel] [PATCH v3] rtc: placing RTC memory region outside BQL

Ping... Regards, -Gonglei > -Original Message- > From: Gonglei (Arei) > Sent: Monday, February 12, 2018 4:58 PM > To: qemu-devel@nongnu.org > Cc: pbonz...@redhat.com; Huangweidong (C); peter.mayd...@linaro.org; > Gonglei (Arei) > Subject: [PATCH v3] rtc: placing RTC memory region

Re: [Qemu-devel] intel-iommu and vhost: Do we need 'device-iotlb' and 'ats'?

On Fri, Feb 23, 2018 at 1:10 AM Peter Xu wrote: > On Fri, Feb 23, 2018 at 12:32:13AM -0500, Jintack Lim wrote: > > Hi Peter, > > > > Hope you had great holidays! > > > > On Thu, Feb 22, 2018 at 10:55 PM, Peter Xu wrote: > > > On Tue, Feb 20, 2018 at

Re: [Qemu-devel] [PATCH 1/2] xilinx_spips: Enable only two slaves when reading/writing with stripe

On 22 February 2018 at 23:38, Alistair Francis wrote: > On Thu, Feb 22, 2018 at 2:28 PM, Francisco Iglesias > wrote: > > Assert only the lower cs on bus 0 and upper cs on bus 1 when both buses > and > > chip selects are enabled (e.g

Re: [Qemu-devel] intel-iommu and vhost: Do we need 'device-iotlb' and 'ats'?

On Fri, Feb 23, 2018 at 12:32:13AM -0500, Jintack Lim wrote: > Hi Peter, > > Hope you had great holidays! > > On Thu, Feb 22, 2018 at 10:55 PM, Peter Xu wrote: > > On Tue, Feb 20, 2018 at 11:03:46PM -0500, Jintack Lim wrote: > >> Hi, > >> > >> I'm using vhost with the virtual

Re: [Qemu-devel] intel-iommu and vhost: Do we need 'device-iotlb' and 'ats'?

Hi Peter, Hope you had great holidays! On Thu, Feb 22, 2018 at 10:55 PM, Peter Xu wrote: > On Tue, Feb 20, 2018 at 11:03:46PM -0500, Jintack Lim wrote: >> Hi, >> >> I'm using vhost with the virtual intel-iommu, and this page[1] shows >> the QEMU command line example. >> >>

Re: [Qemu-devel] [PATCH v3] linux-user: Support f_flags in statfs when available.

Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20180223045735.1288-1-s...@shealevy.com Subject: [Qemu-devel] [PATCH v3] linux-user: Support f_flags in statfs when available. === TEST SCRIPT BEGIN === #!/bin/bash

[Qemu-devel] [PATCH v3] linux-user: Support f_flags in statfs when available.

Signed-off-by: Shea Levy --- configure | 21 +++ linux-user/syscall.c | 3 +++ linux-user/syscall_defs.h | 53 +++ 3 files changed, 77 insertions(+) diff --git a/configure b/configure index

Re: [Qemu-devel] [PATCH v2] linux-user: Support f_flags in statfs when available.

Hi, This series failed build test on s390x host. Please find the details below. Type: series Message-id: 20180219024555.26467-1-s...@shealevy.com Subject: [Qemu-devel] [PATCH v2] linux-user: Support f_flags in statfs when available. === TEST SCRIPT BEGIN === #!/bin/bash # Testing script will

Re: [Qemu-devel] intel-iommu and vhost: Do we need 'device-iotlb' and 'ats'?

On Tue, Feb 20, 2018 at 11:03:46PM -0500, Jintack Lim wrote: > Hi, > > I'm using vhost with the virtual intel-iommu, and this page[1] shows > the QEMU command line example. > > qemu-system-x86_64 -M q35,accel=kvm,kernel-irqchip=split -m 2G \ >-device

Re: [Qemu-devel] [PATCH v5 0/5] Initial write support for MTP objects

Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20180222195740.12726-1-...@redhat.com Subject: [Qemu-devel] [PATCH v5 0/5] Initial write support for MTP objects === TEST SCRIPT BEGIN === #!/bin/bash BASE=base n=1

Re: [Qemu-devel] [PATCH v4 4/7] qdev: add hotpluggable to DeviceState

On 2018.02.22 09:59:17 -0700, Alex Williamson wrote: > On Thu, 22 Feb 2018 15:46:17 + > Peter Maydell wrote: > > > On 22 February 2018 at 15:37, Gerd Hoffmann wrote: > > > On Mon, Feb 19, 2018 at 12:14:55PM +0100, Gerd Hoffmann wrote: > > >>

Re: [Qemu-devel] [PATCH v2] linux-user: Support f_flags in statfs when available.

On Thu, 02/22 10:18, Shea Levy wrote: > Hello, > > These tabs match the existing style of linux-user/syscall.h, should I > remove them? > In practice, following the style of the surrounding code is usually preferred, and we ignore these errors in such cases. Fam

Re: [Qemu-devel] [PATCH v7 09/23] monitor: allow using IO thread for parsing

On Thu, Feb 22, 2018 at 03:50:47PM +, Daniel P. Berrangé wrote: > On Thu, Feb 22, 2018 at 06:01:19PM +0800, Peter Xu wrote: > > On Wed, Feb 21, 2018 at 04:00:07PM +, Stefan Hajnoczi wrote: > > > On Wed, Jan 24, 2018 at 01:39:43PM +0800, Peter Xu wrote: > > > > @@ -4034,12 +4044,29 @@

Re: [Qemu-devel] [PATCH v4 0/7] vfio: add display support

On 2018.02.22 10:30:55 +0100, Gerd Hoffmann wrote: > Hi, > > > Nice! Seems to be the last missing gap for local spice with cursor > > dmabuf support, we'll do more testing on that for sure. Btw, another > > method might be to add direct cursor dmabuf passing for spice as gl > > output, is that

[Qemu-devel] [PATCH] virtio-gpu-3d: add support for second capability set (v4)

From: Dave Airlie Due to a kernel bug we can never increase the size of capability set 1, so introduce a new capability set in parallel, old userspace will continue to use the old set, new userspace will start using the new one when it detects a fixed kernel. v2: don't use a

Re: [Qemu-devel] [PATCH v6 00/23] RISC-V QEMU Port Submission

Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 1519344729-73482-1-git-send-email-...@sifive.com Subject: [Qemu-devel] [PATCH v6 00/23] RISC-V QEMU Port Submission === TEST SCRIPT BEGIN === #!/bin/bash BASE=base n=1

[Qemu-devel] -icount changes physical address assignments in QEMU 2.10/2.11

When porting our RTOS from QEMU 2.8 to 2.10/2.11, I ran into a problem where 16-bit writes to the "bochs dispi interface" were being reported differently depending on whether or not "-icount" was given to QEMU. For example, info mtree: ... 11000500-11000515 (prio 0, i/o): bochs dispi

[Qemu-devel] [PATCH v6 21/23] SiFive Freedom E300 RISC-V Machine

This provides a RISC-V Board compatible with the the SiFive E300 SDK. The following machine is implemented: - 'sifive_e300'; CLINT, PLIC, UART, AON, GPIO, QSPI, PWM Signed-off-by: Michael Clark --- hw/riscv/sifive_e300.c | 233 +

[Qemu-devel] [PATCH v6 15/23] SiFive RISC-V PLIC Block

The PLIC (Platform Level Interrupt Controller) device provides a parameterizable interrupt controller based on SiFive's PLIC specification. Signed-off-by: Michael Clark --- hw/riscv/sifive_plic.c | 511 +

[Qemu-devel] [PATCH v6 18/23] SiFive RISC-V UART Device

QEMU model of the UART on the SiFive E300 and U500 series SOCs. BBL supports the SiFive UART for early console access via the SBI (Supervisor Binary Interface) and the linux kernel SBI console. The SiFive UART implements the pre qom legacy interface consistent with the 16550a UART in

[Qemu-devel] [PATCH v6 14/23] SiFive RISC-V CLINT Block

The CLINT (Core Local Interruptor) device provides real-time clock, timer and interprocessor interrupts based on SiFive's CLINT specification. Signed-off-by: Michael Clark --- hw/riscv/sifive_clint.c | 260

[Qemu-devel] [PATCH v6 12/23] RISC-V HTIF Console

HTIF (Host Target Interface) provides console emulation for QEMU. HTIF allows identical copies of BBL (Berkeley Boot Loader) and linux to run on both Spike and QEMU. BBL provides HTIF console access via the SBI (Supervisor Binary Interface) and the linux kernel SBI console. The HTIT chardev

[Qemu-devel] [PATCH v6 20/23] SiFive RISC-V Test Finisher

Test finisher memory mapped device used to exit simulation. Signed-off-by: Michael Clark --- hw/riscv/sifive_test.c | 99 ++ include/hw/riscv/sifive_test.h | 48 2 files changed, 147 insertions(+) create mode

[Qemu-devel] [PATCH v6 04/23] RISC-V Disassembler

The RISC-V disassembler has no dependencies outside of the 'disas' directory so it can be applied independently. The majority of the disassembler is machine-generated from instruction set metadata: - https://github.com/michaeljclark/riscv-meta Expected checkpatch errors for consistency and

[Qemu-devel] [PATCH v6 05/23] RISC-V CPU Helpers

Privileged control and status register helpers and page fault handling. Reviewed-by: Richard Henderson Signed-off-by: Michael Clark --- target/riscv/helper.c| 504 target/riscv/helper.h| 78 ++

[Qemu-devel] [PATCH v6 16/23] RISC-V Spike Machines

RISC-V machines compatble with Spike aka riscv-isa-sim, the RISC-V Instruction Set Simulator. The following machines are implemented: - 'spike_v1.9'; HTIF console, config-string, Privileged ISA Version 1.9.1 - 'spike_v1.10'; HTIF console, device-tree, Privileged ISA Version 1.10 Signed-off-by:

[Qemu-devel] [PATCH v6 17/23] RISC-V VirtIO Machine

RISC-V machine with device-tree, 16550a UART and VirtIO MMIO. The following machine is implemented: - 'virt'; CLINT, PLIC, 16550A UART, VirtIO MMIO, device-tree Signed-off-by: Michael Clark --- hw/riscv/virt.c | 376

[Qemu-devel] [PATCH v6 08/23] RISC-V TCG Code Generation

TCG code generation for the RV32IMAFDC and RV64IMAFDC. The QEMU RISC-V code generator has complete coverage for the Base ISA v2.2, Privileged ISA v1.9.1 and Privileged ISA v1.10: - RISC-V Instruction Set Manual Volume I: User-Level ISA Version 2.2 - RISC-V Instruction Set Manual Volume II:

[Qemu-devel] [PATCH v6 13/23] RISC-V HART Array

Holds the state of a heterogenous array of RISC-V hardware threads. Reviewed-by: Richard Henderson Signed-off-by: Michael Clark --- hw/riscv/riscv_hart.c | 95 +++ include/hw/riscv/riscv_hart.h | 45

[Qemu-devel] [PATCH v6 19/23] SiFive RISC-V PRCI Block

Simple model of the PRCI (Power, Reset, Clock, Interrupt) to emulate register reads made by the SDK BSP. Signed-off-by: Michael Clark --- hw/riscv/sifive_prci.c | 95 ++ include/hw/riscv/sifive_prci.h | 43 +++ 2

[Qemu-devel] [PATCH v6 22/23] SiFive Freedom U500 RISC-V Machine

This provides a RISC-V Board compatible with the the SiFive U500 SDK. The following machine is implemented: - 'sifive_u500'; CLINT, PLIC, UART, device-tree Signed-off-by: Michael Clark --- hw/riscv/sifive_u500.c | 339 +

[Qemu-devel] [PATCH v6 10/23] RISC-V Linux User Emulation

Implementation of linux user emulation for RISC-V. Reviewed-by: Richard Henderson Signed-off-by: Michael Clark --- linux-user/elfload.c | 22 +++ linux-user/main.c | 99 + linux-user/riscv/syscall_nr.h

[Qemu-devel] [PATCH v6 00/23] RISC-V QEMU Port Submission

QEMU RISC-V Emulation Support (RV64GC, RV32GC) This is hopefully the "fix remaining issues in-tree" release. This version the RISC-V patch series contains cleanups and adds locking to the interrupt handling code and enables MTTCG. Fedora have been performing MTTCG-enabled SMP package builds

[Qemu-devel] [PATCH v6 11/23] Add symbol table callback function interface to load_elf

The RISC-V HTIF (Host Target Interface) console device requires access to the symbol table to locate the 'tohost' and 'fromhost' symbols. Signed-off-by: Michael Clark --- hw/core/loader.c | 18 -- include/hw/elf_ops.h | 34 +-

[Qemu-devel] [PATCH v6 07/23] RISC-V GDB Stub

GDB Register read and write routines. Reviewed-by: Richard Henderson Signed-off-by: Michael Clark --- target/riscv/gdbstub.c | 64 ++ 1 file changed, 64 insertions(+) create mode 100644

[Qemu-devel] [PATCH v6 23/23] RISC-V Build Infrastructure

This adds RISC-V into the build system enabling the following targets: - riscv32-softmmu - riscv64-softmmu - riscv32-linux-user - riscv64-linux-user This adds defaults configs for RISC-V, enables the build for the RISC-V CPU core, hardware, and Linux User Emulation. The 'qemu-binfmt-conf.sh'

[Qemu-devel] [PATCH v6 09/23] RISC-V Physical Memory Protection

Implements the physical memory protection extension as specified in Privileged ISA Version 1.10. PMP (Physical Memory Protection) is as-of-yet unused and needs testing. The SiFive verification team have PMP test cases that will be run. Nothing currently depends on PMP support. It would be

[Qemu-devel] [PATCH v6 06/23] RISC-V FPU Support

Helper routines for FPU instructions and NaN definitions. Reviewed-by: Richard Henderson Signed-off-by: Michael Clark --- fpu/softfloat-specialize.h | 7 +- target/riscv/fpu_helper.c | 375 + 2 files

[Qemu-devel] [PATCH v6 03/23] RISC-V CPU Core Definition

Add CPU state header, CPU definitions and initialization routines Reviewed-by: Richard Henderson Signed-off-by: Michael Clark --- target/riscv/cpu.c | 391 + target/riscv/cpu.h | 256

[Qemu-devel] [PATCH v6 01/23] RISC-V Maintainers

Add Michael Clark, Palmer Dabbelt, Sagar Karandikar and Bastian Koppelmann as RISC-V Maintainers. Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Signed-off-by: Michael Clark --- MAINTAINERS | 11

[Qemu-devel] [PATCH v6 02/23] RISC-V ELF Machine Definition

Define RISC-V ELF machine EM_RISCV 243 Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Signed-off-by: Michael Clark --- include/elf.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/elf.h

Re: [Qemu-devel] [PATCH] virtio-gpu-3d: add support for second capability set (v3)

Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 2018034702.15705-1-airl...@gmail.com Subject: [Qemu-devel] [PATCH] virtio-gpu-3d: add support for second capability set (v3) === TEST SCRIPT BEGIN === #!/bin/bash

Re: [Qemu-devel] [PATCH] virtio-gpu-3d: add support for second capability set (v2)

Hi, This series failed docker-build@min-glib build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. Type: series Message-id: 20180221015035.22964-1-airl...@gmail.com Subject: [Qemu-devel] [PATCH] virtio-gpu-3d:

Re: [Qemu-devel] [PATCH v2 28/36] sheepdog: Support .bdrv_co_create

On 2018-02-21 14:53, Kevin Wolf wrote: > This adds the .bdrv_co_create driver callback to sheepdog, which enables > image creation over QMP. > > Signed-off-by: Kevin Wolf > --- > qapi/block-core.json | 24 +- > block/sheepdog.c | 240 >

[Qemu-devel] [PULL 1/1] scripts: Add decodetree.py

To be used to decode ARM SVE, but could be used for any fixed-width ISA. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- scripts/decodetree.py| 1062 ++

[Qemu-devel] [PULL 0/1] Add decodetree.py

-20180222 for you to fetch changes up to 568ae7efae7e4b90e213049efb8b6e4e12b47ca3: scripts: Add decodetree.py (2018-02-22 15:44:07 -0800) Add decodetree.py Richard

[Qemu-devel] [PATCH] virtio-gpu-3d: add support for second capability set (v3)

From: Dave Airlie Due to a kernel bug we can never increase the size of capability set 1, so introduce a new capability set in parallel, old userspace will continue to use the old set, new userspace will start using the new one when it detects a fixed kernel. v2: don't use a

Re: [Qemu-devel] [PATCH v2 27/36] sheepdog: QAPIfy "redundacy" create option

On 2018-02-21 14:53, Kevin Wolf wrote: > The "redundacy" option for Sheepdog image creation is currently a string > that can encode one or two integers depending on its format, which at > the same time implicitly selects a mode. > > This patch turns it into a QAPI union and converts the string

Re: [Qemu-devel] [PATCH v2 24/36] rbd: Use qemu_rbd_connect() in qemu_rbd_do_create()

On 2018-02-21 14:53, Kevin Wolf wrote: > This is almost exactly the same code. The differences are that > qemu_rbd_connect() supports BlockdevOptionsRbd.server and that the cache > mode is set explicitly. > > Supporting 'server' is a welcome new feature for image creation. > Caching is disabled

Re: [Qemu-devel] [PATCH v2 34/36] block: Fail bdrv_truncate() with negative size

On 02/21/2018 07:54 AM, Kevin Wolf wrote: Most callers have their own checks, but something like this should also be checked centrally. As it happens, x-blockdev-create can pass negative image sizes to format drivers (because there is no QAPI type that would reject negative numbers) and triggers

Re: [Qemu-devel] [PATCH v2 23/36] rbd: ***ing s->snap/image_name in qemu_rbd_open()

I suppose the first word after the colon in your subject is supposed to be "assign" and not what it currently is (which is something I am not going to repeat!). :-) On 2018-02-21 14:53, Kevin Wolf wrote: > Now that the options are already available in qemu_rbd_open() and not > only parsed in

Re: [Qemu-devel] [PATCH v2 15/36] file-posix: Support .bdrv_co_create

On 02/21/2018 07:53 AM, Kevin Wolf wrote: This adds the .bdrv_co_create driver callback to file, which enables image creation over QMP. Signed-off-by: Kevin Wolf Reviewed-by: Max Reitz --- qapi/block-core.json | 20 +- block/file-posix.c |

Re: [Qemu-devel] [PATCH v2 22/36] rbd: Support .bdrv_co_create

On 2018-02-21 14:53, Kevin Wolf wrote: > This adds the .bdrv_co_create driver callback to rbd, which enables > image creation over QMP. > > Signed-off-by: Kevin Wolf > --- > qapi/block-core.json | 19 ++- > block/rbd.c | 146 >

Re: [Qemu-devel] [PATCH v2 21/36] rbd: Pass BlockdevOptionsRbd to qemu_rbd_connect()

On 2018-02-21 14:53, Kevin Wolf wrote: > With the conversion to a QAPI options object, the function is now > prepared to be used in a .bdrv_co_create implementation. > > Signed-off-by: Kevin Wolf > --- > block/rbd.c | 102 >

Re: [Qemu-devel] [PATCH v2 13/36] block: Make bdrv_is_whitelisted() public

On 02/21/2018 07:53 AM, Kevin Wolf wrote: We'll use a separate source file for image creation, and we need to check there whether the requested driver is whitelisted. Signed-off-by: Kevin Wolf --- include/block/block.h | 1 + block.c | 2 +- 2 files changed,

Re: [Qemu-devel] [PATCH v2 14/36] block: x-blockdev-create QMP command

On 02/21/2018 07:53 AM, Kevin Wolf wrote: This adds a synchronous x-blockdev-create QMP command that can create qcow2 images on a given node name. We don't want to block while creating an image, so this is not the final interface in all aspects, but BlockdevCreateOptionsQcow2 and

Re: [Qemu-devel] [PATCH v2 20/36] rbd: Remove non-schema options from runtime_opts

On 2018-02-23 00:13, Max Reitz wrote: > On 2018-02-21 14:53, Kevin Wolf wrote: >> Instead of the QemuOpts in qemu_rbd_connect(), we want to use QAPI >> objects. As a preparation, fetch those options directly from the QDict >> that .bdrv_open() supports in the rbd driver and that are not in the >>

Re: [Qemu-devel] [PATCH v2 20/36] rbd: Remove non-schema options from runtime_opts

On 2018-02-21 14:53, Kevin Wolf wrote: > Instead of the QemuOpts in qemu_rbd_connect(), we want to use QAPI > objects. As a preparation, fetch those options directly from the QDict > that .bdrv_open() supports in the rbd driver and that are not in the > schema. > > Signed-off-by: Kevin Wolf

Re: [Qemu-devel] [PATCH v2 11/36] qdict: Introduce qdict_rename_keys()

On 02/21/2018 07:53 AM, Kevin Wolf wrote: A few block drivers will need to rename .bdrv_create options for their QAPIfication, so let's have a helper function for that. Signed-off-by: Kevin Wolf --- include/qapi/qmp/qdict.h | 6 +++ qobject/qdict.c | 34

Re: [Qemu-devel] [PATCH v2 19/36] rbd: Factor out qemu_rbd_connect()

On 2018-02-21 14:53, Kevin Wolf wrote: > The code to establish an RBD connection is duplicated between open and > create. In order to be able to share the code, factor out the code from > qemu_rbd_open() as a first step. > > Signed-off-by: Kevin Wolf > --- > block/rbd.c | 100

Re: [Qemu-devel] [PATCH v2 18/36] rbd: Fix use after free in qemu_rbd_set_keypairs() error path

On 2018-02-21 14:53, Kevin Wolf wrote: > If we want to include the invalid option name in the error message, we > can't free the string earlier than that. > > Signed-off-by: Kevin Wolf > --- > block/rbd.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) Reviewed-by:

Re: [Qemu-devel] [PATCH v2 17/36] gluster: Support .bdrv_co_create

On 2018-02-21 14:53, Kevin Wolf wrote: > This adds the .bdrv_co_create driver callback to gluster, which enables > image creation over QMP. > > Signed-off-by: Kevin Wolf > --- > qapi/block-core.json | 18 ++- > block/gluster.c | 135 >

Re: [Qemu-devel] [PATCH v2 14/36] block: x-blockdev-create QMP command

On 2018-02-21 14:53, Kevin Wolf wrote: > This adds a synchronous x-blockdev-create QMP command that can create > qcow2 images on a given node name. > > We don't want to block while creating an image, so this is not the final > interface in all aspects, but BlockdevCreateOptionsQcow2 and >

Re: [Qemu-devel] [PATCH v2 13/36] block: Make bdrv_is_whitelisted() public

On 2018-02-21 14:53, Kevin Wolf wrote: > We'll use a separate source file for image creation, and we need to > check there whether the requested driver is whitelisted. > > Signed-off-by: Kevin Wolf > --- > include/block/block.h | 1 + > block.c | 2 +- > 2 files

Re: [Qemu-devel] [PATCH v2 11/36] qdict: Introduce qdict_rename_keys()

On 2018-02-21 14:53, Kevin Wolf wrote: > A few block drivers will need to rename .bdrv_create options for their > QAPIfication, so let's have a helper function for that. > > Signed-off-by: Kevin Wolf > --- > include/qapi/qmp/qdict.h | 6 +++ > qobject/qdict.c | 34

Re: [Qemu-devel] [PATCH v2 2/6] target/mips: reimplement SC instruction emulation and use cmpxchg

On Thu, Feb 22, 2018 at 17:33:27 -0500, Emilio G. Cota wrote: > Here are some numbers I just gathered for qht-bench, feel > free to include them in this commit's log: > > mipsel-linux-user tests/qht-bench -d 5 -n 1 -u 20 -g 1 > Host: AMD Opteron(tm) Processor 6376

Re: [Qemu-devel] [PATCH 1/2] xilinx_spips: Enable only two slaves when reading/writing with stripe

On Thu, Feb 22, 2018 at 2:28 PM, Francisco Iglesias wrote: > Assert only the lower cs on bus 0 and upper cs on bus 1 when both buses and > chip selects are enabled (e.g reading/writing with stripe). > > Signed-off-by: Francisco Iglesias > ---

Re: [Qemu-devel] [PATCH 2/2] xilinx_spips: Use 8 dummy cycles with the QIOR/QIOR4 commands

On Thu, Feb 22, 2018 at 2:28 PM, Francisco Iglesias wrote: > Use 8 dummy cycles (4 dummy bytes) with the QIOR/QIOR4 commands in legacy mode > for matching what is expected by Micron (Numonyx) flashes (the default target > flash type of the QSPI). > > Signed-off-by:

Re: [Qemu-devel] [PATCH v2 2/6] target/mips: reimplement SC instruction emulation and use cmpxchg

On Thu, Feb 22, 2018 at 19:31:39 +0100, Aleksandar Markovic wrote: > From: Leon Alrae > > Completely rewrite conditional stores handling. Use cmpxchg. > > This eliminates need for separate implementations of SC instruction > emulation for user and system emulation. > >

[Qemu-devel] [PATCH 1/2] xilinx_spips: Enable only two slaves when reading/writing with stripe

Assert only the lower cs on bus 0 and upper cs on bus 1 when both buses and chip selects are enabled (e.g reading/writing with stripe). Signed-off-by: Francisco Iglesias --- hw/ssi/xilinx_spips.c | 42 ++ 1 file changed, 38

[Qemu-devel] [PATCH 0/2] xilinx_spips: Update CS assertion when striping

Hi, The first patch in this series attempts to correct the slave selection when using the striping functionality in the QSPI. The second patch in the series updates the QIOR/QIOR4 commands to use 8 dummy cycles in the QSPI for matching Micron (Numonyx) flashes (the default target flash type of

[Qemu-devel] [PATCH 2/2] xilinx_spips: Use 8 dummy cycles with the QIOR/QIOR4 commands

Use 8 dummy cycles (4 dummy bytes) with the QIOR/QIOR4 commands in legacy mode for matching what is expected by Micron (Numonyx) flashes (the default target flash type of the QSPI). Signed-off-by: Francisco Iglesias --- hw/ssi/xilinx_spips.c | 2 +- 1 file changed, 1

Re: [Qemu-devel] [PATCH v2 10/36] test-qemu-opts: Test qemu_opts_to_qdict_filtered()

On 2018-02-21 14:53, Kevin Wolf wrote: > Signed-off-by: Kevin Wolf > --- > tests/test-qemu-opts.c | 125 > + > 1 file changed, 125 insertions(+) Reviewed-by: Max Reitz signature.asc Description: OpenPGP

Re: [Qemu-devel] [PATCH v2 09/36] test-qemu-opts: Test qemu_opts_append()

On 2018-02-21 14:53, Kevin Wolf wrote: > Basic test for merging two QemuOptsLists. > > Signed-off-by: Kevin Wolf > --- > tests/test-qemu-opts.c | 128 > + > 1 file changed, 128 insertions(+) Reviewed-by: Max Reitz

Re: [Qemu-devel] [PATCH v2 08/36] util: Add qemu_opts_to_qdict_filtered()

On 2018-02-21 14:53, Kevin Wolf wrote: > This allows, given a QemuOpts for a QemuOptsList that was merged from > multiple QemuOptsList, to only consider those options that exist in one > specific list. Block drivers need this to separate format-layer create > options from protocol-level options. >

Re: [Qemu-devel] [PATCH] checkpatch: Exempt long URLs

On 02/22/2018 03:58 PM, Eric Blake wrote: Sometimes, we want to refer to really long URLs, but checkpatch balks, and we have to manually bypass the check. URL shorterners s/shorterners/shorteners/ (Is it bad when I spell-check my own patches?) may be nice at reducing long links, but it's

[Qemu-devel] [PATCH] checkpatch: Exempt long URLs

Sometimes, we want to refer to really long URLs, but checkpatch balks, and we have to manually bypass the check. URL shorterners may be nice at reducing long links, but it's hard to guarantee the shortened link will live as long as the real target, and it is also nice to see the original target

Re: [Qemu-devel] [PATCH 00/19] Add Cortex-M33 and mps2-an505 board model

On 02/22/2018 01:11 PM, Peter Maydell wrote: ERROR: line over 90 characters #54: FILE: hw/arm/mps2-tz.c:21: + * https://developer.arm.com/products/system-design/development-boards/fpga-prototyping-boards/mps2 Does anybody better with perl and more familiar with checkpatch's internals feel

Re: [Qemu-devel] [PATCH v3 5/5] aarch64-linux-user: Add support for SVE signal frame records

On 02/22/2018 08:41 AM, Peter Maydell wrote: > On 16 February 2018 at 21:56, Richard Henderson > wrote: >> Depending on the currently selected size of the SVE vector registers, >> we can either store the data within the "standard" allocation, or we >> may beedn to

[Qemu-devel] [PATCH v5 3/5] usb-mtp: Support delete of mtp objects

Write of existing objects by the initiator is acheived by making a temporary buffer with the new changes, deleting the old file and then writing a new file with the same name. Also, add a "readonly" property which needs to be set to false for deletion to work. Signed-off-by: Bandan Das

[Qemu-devel] [PATCH v5 5/5] usb-mtp: Advertise SendObjectInfo for write support

This patch implements a dummy ObjectInfo structure so that it's easy to typecast the incoming data. If the metadata is valid, write_pending is set. Also, the incoming filename is utf-16, so, instead of depending on external libraries, just implement a simple function to get the filename

[Qemu-devel] [PATCH v5 1/5] usb-mtp: Add one more argument when building results

The response to a SendObjectInfo consists of the storageid, parent obejct handle and the handle reserved for the new incoming object Signed-off-by: Bandan Das --- hw/usb/dev-mtp.c | 50 +++--- 1 file changed, 27 insertions(+), 23

[Qemu-devel] [PATCH v5 2/5] usb-mtp: print parent path in IN_IGNORED trace fn

Fix a possible null dereference when deleting a folder and its contents. An ignored event might be received for its contents after the parent folder is deleted which will return a null object. Signed-off-by: Bandan Das --- hw/usb/dev-mtp.c | 5 ++--- 1 file changed, 2

[Qemu-devel] [PATCH v5 0/5] Initial write support for MTP objects

v5: 4/5,5/5: Add check for the RO bit and set response to STORE_READ_ONLY v4: 4/5: Remove getumask and set default permissions to 0644 5/5: Remove usb_mtp_object_lookup_name out of #ifdef CONFIG_INOTIFY1 Test compilation on freebsd v3: 3/5: Add a property that sets r/w to on/off

[Qemu-devel] [PATCH v5 4/5] usb-mtp: Introduce write support for MTP objects

Allow write operations on behalf of the initiator. The precursor to write is the sending of the write metadata that consists of the ObjectInfo dataset. This patch introduces a flag that is set when the responder is ready to receive write data based on a previous SendObjectInfo operation by the

Re: [Qemu-devel] [PATCH v2 1/1] hw: register: Run post_write hook on reset

On Thu, Feb 15, 2018 at 3:05 PM, Alistair Francis wrote: > On Mon, Feb 5, 2018 at 10:44 AM, Alistair Francis > wrote: >> Ensure that the post write hook is called during reset. This allows us >> to rely on the post write functions instead of

Re: [Qemu-devel] [qemu-s390x] [PATCH v8 00/13] Interactive Boot Menu for DASD and SCSI Guests on s390x

On 02/22/2018 11:45 AM, Collin L. Walling wrote: On 02/22/2018 10:44 AM, Christian Borntraeger wrote: On 02/22/2018 04:40 PM, Collin L. Walling wrote: On 02/22/2018 07:23 AM, Viktor Mihajlovski wrote: On 22.02.2018 12:51, Christian Borntraeger wrote: Series Acked-by: Christian Borntraeger

Re: [Qemu-devel] [PATCH v2 20/32] arm/translate-a64: add FP16 FCMxx (zero) to simd_two_reg_misc_fp16

On 02/22/2018 09:23 AM, Alex Bennée wrote: > > Richard Henderson writes: > >> On 02/08/2018 09:31 AM, Alex Bennée wrote: >>> +maxpasses = hp ? (is_q ? 8 : 4) : (is_q ? 4 : 2); >> >> (8 << is_q) >> size >> >> ? > > Hmm I'm not so sure about this.

Re: [Qemu-devel] [Qemu-arm] [PATCH v2 07/67] target/arm: Implement SVE Predicate Logical Operations Group

On 02/22/2018 10:55 AM, Peter Maydell wrote: >> +# Three prediate operand, with governing predicate, flag setting > > Three what? Feh, typo for predicate. But more verbosely, Three operands that are predicates, plus another predicate operand which "governs" the operation (I believe that's the

Re: [Qemu-devel] [PATCH v2 05/67] target/arm: Implement SVE load vector/predicate

On 02/22/2018 10:20 AM, Peter Maydell wrote: > On 17 February 2018 at 18:22, Richard Henderson > wrote: >> Signed-off-by: Richard Henderson >> --- >> target/arm/translate-sve.c | 132 >> + >>

Re: [Qemu-devel] [PATCH 0/9] nbd block status base:allocation

Hi, This series failed build test on ppcbe host. Please find the details below. Type: series Message-id: 1518702707-7077-1-git-send-email-vsement...@virtuozzo.com Subject: [Qemu-devel] [PATCH 0/9] nbd block status base:allocation === TEST SCRIPT BEGIN === #!/bin/bash # Testing script will be

Re: [Qemu-devel] [PATCH RFCv2] s390x/sclp: remove memory hotplug support

On 02/22/2018 06:13 AM, Christian Borntraeger wrote: > > > On 02/21/2018 06:39 PM, Cornelia Huck wrote: >> On Tue, 20 Feb 2018 16:05:54 +0100 >> David Hildenbrand wrote: >> >>> On 20.02.2018 15:57, Cornelia Huck wrote: On Tue, 20 Feb 2018 13:16:37 +0100 David

Re: [Qemu-devel] [Qemu-arm] [PATCH v2 04/67] target/arm: Implement SVE Bitwise Logical - Unpredicated Group

On 02/22/2018 10:04 AM, Peter Maydell wrote: > On 17 February 2018 at 18:22, Richard Henderson > wrote: >> These were the instructions that were stubbed out when >> introducing the decode skeleton. >> >> Signed-off-by: Richard Henderson

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