On 06/12/2018 11:04 AM, Eric Blake wrote:
> On 06/12/2018 03:51 PM, Richard Henderson wrote:
>> On 06/10/2018 03:14 PM, Philippe Mathieu-Daudé wrote:
>>> xen_pv_printf(xendev, 1, "type \"%s\", fileproto \"%s\", filename
>>> \"%s\","
>>> - " size %" PRId64 " (%" PRId64 " MB)\n
On 06/11/2018 07:52 AM, Peter Maydell wrote:
> On 11 June 2018 at 18:10, Peter Maydell wrote:
>> There's a common pattern in QEMU where a function needs to perform
>> a data load or store of an N byte integer in a particular endianness.
>> At the moment this is handled by doing a switch() on the s
On 06/12/2018 03:51 PM, Richard Henderson wrote:
On 06/10/2018 03:14 PM, Philippe Mathieu-Daudé wrote:
xen_pv_printf(xendev, 1, "type \"%s\", fileproto \"%s\", filename \"%s\","
- " size %" PRId64 " (%" PRId64 " MB)\n",
+ " size %" PRId64 " (%llu MB)\n",
On 06/11/2018 07:10 AM, Peter Maydell wrote:
> Now we have stn_p() and ldn_p() we can use them in various
> functions in exec.c that used to have their own switch-on-size code.
>
> Signed-off-by: Peter Maydell
> ---
Reviewed-by: Richard Henderson
r~
On 06/11/2018 07:10 AM, Peter Maydell wrote:
> In subpage_read() we perform a load of the data into a local buffer
> which we then access using ldub_p(), lduw_p(), ldl_p() or ldq_p()
> depending on its size, storing the result into the uint64_t *data.
> Since ldl_p() returns an 'int', this means th
On 06/10/2018 03:14 PM, Philippe Mathieu-Daudé wrote:
> xen_pv_printf(xendev, 1, "type \"%s\", fileproto \"%s\", filename
> \"%s\","
> - " size %" PRId64 " (%" PRId64 " MB)\n",
> + " size %" PRId64 " (%llu MB)\n",
>blkdev->type, blkdev->fi
ARMv6-M supports 6 Thumb2 instructions. This patch checks for these
instructions and allows their execution.
Like Thumb2 cores, ARMv6-M always interprets BL instruction as 32-bit.
This patch is required for future Cortex-M0 support.
Signed-off-by: Julia Suvorova
---
target/arm/translate.c | 35
On 06/10/2018 03:14 PM, Philippe Mathieu-Daudé wrote:
> +#define KiB (1ULL << 10)
> +#define MiB (1ULL << 20)
> +#define GiB (1ULL << 30)
> +#define TiB (1ULL << 40)
> +#define PiB (1ULL << 50)
> +#define EiB (1ULL << 60)
Is there any particular reason to force these to be
On Tue, Jun 12, 2018 at 12:18:03PM -0700, no-re...@patchew.org wrote:
> Checking PATCH 1/2: kvm: support -realtime cpu-pm=on|off...
> WARNING: line over 80 characters
> #85: FILE: target/i386/kvm.c:1401:
> +error_report("kvm: guest stopping CPU not supported: %s",
> strerror(-ret));
>
On 06/12/2018 02:01 PM, Greg Kurz wrote:
> If the negotiated compat mode can't be set, but raw mode is supported,
> we decide to ignore the error. An so, we should free it to prevent a
> memory leak.
>
> Signed-off-by: Greg Kurz
Reviewed-by: Philippe Mathieu-Daudé
> ---
> hw/ppc/spapr_hcall.c
On 06/12/2018 02:05 PM, Eduardo Habkost wrote:
On Tue, Jun 12, 2018 at 06:38:08PM +, Moger, Babu wrote:
[...]
I'm starting to think that enabling TOPOEXT automatically is
adding too much complexity and compatibility problems, and it's
better to leave this task to management software.
The
The virtio-crypto driver currently propagates to the guest
all the cipher algorithms that the backend cryptodev can
support. But in certain cases where the guest has more
performant mechanism to handle some algorithms, it would be
useful to propagate only a subset of the algorithms.
This patch add
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20180612184616.90838-1-...@redhat.com
Subject: [Qemu-devel] [PATCH v2 0/2] kvm: x86 CPU power management
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git log
On Tue, Jun 12, 2018 at 06:38:08PM +, Moger, Babu wrote:
[...]
> > I'm starting to think that enabling TOPOEXT automatically is
> > adding too much complexity and compatibility problems, and it's
> > better to leave this task to management software.
> >
> > The main problem here is:
> >
> > T
When an IOMMUMemoryRegion is in front of a virtio device,
address_space_cache_init does not set cache->ptr as the memory
region is not RAM. However when the device performs an access,
we end up in glue() which performs the translation and then uses
MAP_RAM. This latter uses the unset ptr and return
Jeff Cody writes:
> On Thu, Jun 07, 2018 at 05:33:03PM -0400, Jeff Cody wrote:
>> Here are some results from auth testing of various combinations; I haven't
>> completed all the combinations in my matrix yet, but what I have completed
>> looks like what I would expect.
>>
>> These were all teste
On 06/12/2018 02:44 PM, Richard Henderson wrote:
> On 06/12/2018 06:37 AM, Philippe Mathieu-Daudé wrote:
>>> /* Both preadv and pwritev merge args 4/5 into a 64-bit offset.
>>> * Moreover, the parts are *always* in little-endian order.
>>> */
>>> #if TARGET_ABI_BITS == 32
>>> SYSCALL_ARGS(pr
Cc'ing Jason who is also listed as co-maintainer:
./scripts/get_maintainer.pl -f hw/net/e1000e_core.c
Dmitry Fleytman (maintainer:e1000e)
Jason Wang (odd fixer:Network devices)
On 06/12/2018 03:43 PM, Jan Kiszka wrote:
> On 2018-06-12 20:38, Philippe Mathieu-Daudé wrote:
>> On 06/12/2018
Hi all!
I've faced the following problem:
1. create image with dirty bitmap, a.qcow2 (start qemu and run qmp
command block-dirty-bitmap-add)
2. run the following commands:
qemu-img create -f qcow2 -b a.qcow2 b.qcow2 10M
qemu-io -c 'write 0 512' b.qcow2
qemu-
On Tue, 12 Jun 2018 20:12:02 +0200
Thomas Huth wrote:
> On 12.06.2018 19:30, Richard Henderson wrote:
> > On 06/11/2018 04:17 AM, Peter Maydell wrote:
> >> The codebase has a bit of a mix of different multiline
> >> comment styles. State a preference for the Linux kernel
> >> style:
> >> /*
When guest CPU PM is enabled, and with -cpu host, expose the host CPU
MWAIT leaf in the CPUID so guest can make good PM decisions.
Note: the result is 100% CPU utilization reported by host as host
no longer knows that the CPU is halted.
Signed-off-by: Michael S. Tsirkin
---
target/i386/cpu.h |
This adds ability to expose host CPU power management capabilities to
guests. For intel guests, this is sufficient for guest to enable
low power CPU power management. For AMD guests it isn't sufficient,
deeper C-states are entered using System-IO.
mwait based power management is tied closely to sp
With this flag, kvm allows guest to control host CPU power state. This
increases latency for other processes using same host CPU in an
unpredictable way, but if decreases idle entry/exit times for the
running VCPU.
Follow-up patches will expose this capability to guest
(using mwait leaf).
Based
On Tue, 12 Jun 2018 16:55:08 +0100
Peter Maydell wrote:
> On 12 June 2018 at 16:52, Greg Kurz wrote:
> > On Tue, 12 Jun 2018 15:34:22 +0100
> > Peter Maydell wrote:
> >
> >> On 12 June 2018 at 07:44, David Gibson
> >> wrote:
> >> > -
On 2018-06-12 20:38, Philippe Mathieu-Daudé wrote:
> On 06/12/2018 03:30 PM, Jan Kiszka wrote:
>> On 2018-06-12 20:11, Philippe Mathieu-Daudé wrote:
>>> Hi Jan,
>>>
>>> On 06/12/2018 02:22 PM, Jan Kiszka wrote:
On 2018-05-22 09:00, Jan Kiszka wrote:
> On 2018-04-16 17:29, Peter Maydell wro
On 05/05/2018 03:49 AM, Ivan Ren wrote:
> qemu-img info with a block device which has a qcow2 format always
> return 0 for disk size, and this can not reflect the qcow2 size
> and the used space of the block device. This patch return the
> allocated size of qcow2 as the disk size.
>
This has h
> -Original Message-
> From: Eduardo Habkost [mailto:ehabk...@redhat.com]
> Sent: Tuesday, June 12, 2018 12:40 PM
> To: Moger, Babu
> Cc: m...@redhat.com; marcel.apfelb...@gmail.com; pbonz...@redhat.com;
> r...@twiddle.net; mtosa...@redhat.com; qemu-devel@nongnu.org;
> k...@vger.kernel.
On 06/12/2018 03:30 PM, Jan Kiszka wrote:
> On 2018-06-12 20:11, Philippe Mathieu-Daudé wrote:
>> Hi Jan,
>>
>> On 06/12/2018 02:22 PM, Jan Kiszka wrote:
>>> On 2018-05-22 09:00, Jan Kiszka wrote:
On 2018-04-16 17:29, Peter Maydell wrote:
> On 16 April 2018 at 16:25, Jan Kiszka wrote:
>>>
On 2018-06-12 20:11, Philippe Mathieu-Daudé wrote:
> Hi Jan,
>
> On 06/12/2018 02:22 PM, Jan Kiszka wrote:
>> On 2018-05-22 09:00, Jan Kiszka wrote:
>>> On 2018-04-16 17:29, Peter Maydell wrote:
On 16 April 2018 at 16:25, Jan Kiszka wrote:
> On 2018-04-01 23:17, Jan Kiszka wrote:
>>
On Tue, Jun 12, 2018 at 05:12:58PM +0200, Paolo Bonzini wrote:
> On 12/06/2018 17:01, Eduardo Habkost wrote:
> >>>
> >>> Remove OSPKE from the feature name array so users don't try to
> >>> configure it manually.
> >>>
> >>> Signed-off-by: Eduardo Habkost
> >> Yes, it's the same as OSXSAVE. Thank
On 12.06.2018 19:30, Richard Henderson wrote:
> On 06/11/2018 04:17 AM, Peter Maydell wrote:
>> The codebase has a bit of a mix of different multiline
>> comment styles. State a preference for the Linux kernel
>> style:
>> /*
>> * Star on the left for each line.
>> * Leading slash-sta
Hi Jan,
On 06/12/2018 02:22 PM, Jan Kiszka wrote:
> On 2018-05-22 09:00, Jan Kiszka wrote:
>> On 2018-04-16 17:29, Peter Maydell wrote:
>>> On 16 April 2018 at 16:25, Jan Kiszka wrote:
On 2018-04-01 23:17, Jan Kiszka wrote:
> From: Jan Kiszka
>
> The spec does not justify cleari
On 06/12/2018 06:37 AM, Philippe Mathieu-Daudé wrote:
>> /* Both preadv and pwritev merge args 4/5 into a 64-bit offset.
>> * Moreover, the parts are *always* in little-endian order.
>> */
>> #if TARGET_ABI_BITS == 32
>> SYSCALL_ARGS(preadv_pwritev)
>> {
>> -/* We have already assigned
On 06/12/2018 02:30 PM, Richard Henderson wrote:
> On 06/11/2018 04:17 AM, Peter Maydell wrote:
>> The codebase has a bit of a mix of different multiline
>> comment styles. State a preference for the Linux kernel
>> style:
>> /*
>> * Star on the left for each line.
>> * Leading slash-
On Tue, Jun 12, 2018 at 04:29:25PM +, Moger, Babu wrote:
> > [...]
> > > > +/* TOPOEXT feature requires 0x801E */
> > > > +if (env->features[FEAT_8000_0001_ECX] & CPUID_EXT3_TOPOEXT)
> > {
> > > > +x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel,
> > 0x801E)
Currently to run Avocado acceptance tests in an out-of-tree
build directory, we need to use the full path to the test:
build_dir$ avocado run
/full/path/to/sources/qemu/tests/acceptance/boot_linux_console.py
This patch adds a symlink in the build tree to simplify the
tests invocation, allowing
On 06/11/2018 04:17 AM, Peter Maydell wrote:
> The codebase has a bit of a mix of different multiline
> comment styles. State a preference for the Linux kernel
> style:
> /*
> * Star on the left for each line.
> * Leading slash-star and trailing star-slash
> * each go on a line o
First: this variable was introduced to handle reopens. We need it on
following qcow2_do_open, to don't try loading bitmaps again. So, we are
fixing qcow2_invalidate_cache().
However, if we fix only qcow2_invalidate_cache, iotest 169 fails on
case test__persistent__not_migbitmap__online_shared, bec
On 2018-05-22 09:00, Jan Kiszka wrote:
> On 2018-04-16 17:29, Peter Maydell wrote:
>> On 16 April 2018 at 16:25, Jan Kiszka wrote:
>>> On 2018-04-01 23:17, Jan Kiszka wrote:
From: Jan Kiszka
The spec does not justify clearing of any E1000_ICR_OTHER_CAUSES when
E1000_ICR_OTHER
On 12.06.2018 14:59, Christian Borntraeger wrote:
> Right now the IPL device always starts from address 0x1 (the usual
> Linux entry point). To run other guests (e.g. test programs) it is
> useful to use the IPL PSW from address 0. We can use the Linux magic
> at 0x10008 to decide.
>
> Signed-
On 06/11/2018 04:48 AM, Gonglei (Arei) wrote:
-Original Message-
From: Farhan Ali [mailto:al...@linux.ibm.com]
Sent: Saturday, June 09, 2018 3:09 AM
To: linux-ker...@vger.kernel.org; k...@vger.kernel.org
Cc: m...@redhat.com; qemu-devel@nongnu.org; Gonglei (Arei)
; longpeng ;
pa...@l
Hi Arei
On 06/11/2018 02:43 AM, Gonglei (Arei) wrote:
-Original Message-
From: Farhan Ali [mailto:al...@linux.ibm.com]
Sent: Saturday, June 09, 2018 3:09 AM
To: linux-ker...@vger.kernel.org; k...@vger.kernel.org
Cc: m...@redhat.com; qemu-devel@nongnu.org; Gonglei (Arei)
; longpeng ;
pa
Bits set in the PCR disable features of the processor. TCG currently
doesn't implement that, ie, we always act like if PCR is all zeros.
But it is still possible for the PCR to have a non-null value. This may
confuse the guest.
There are three distinct cases:
1) a powernv guest doing mtspr SPR_P
If the negotiated compat mode can't be set, but raw mode is supported,
we decide to ignore the error. An so, we should free it to prevent a
memory leak.
Signed-off-by: Greg Kurz
---
hw/ppc/spapr_hcall.c |1 +
1 file changed, 1 insertion(+)
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hc
MacOS 9 has a bug in its PMU driver whereby after configuring the ADB bus
devices it sends another write to reg 3 on both devices resetting them
both back to the same address.
Add a new disable_direct_reg3_writes property to ADBDevice to disable these
direct writes which can enabled just for the u
The PMU device supercedes the CUDA device found on older New World Macs and
is supported by a larger number of guest OSs from OS 9 to OS X 10.5.
Signed-off-by: Mark Cave-Ayland
---
default-configs/ppc-softmmu.mak | 1 +
hw/misc/macio/Makefile.objs | 1 +
hw/misc/macio/macio.c |
This option allows the VIA configuration to be controlled between 3
different possible setups: cuda, pmu-adb and pmu with USB rather than ADB
keyboard/mouse.
For the moment we don't do anything with the configuration except to pass
it to the macio device (the via-cuda parent) and also to the firmw
PMU-enabled New World Macs expose their GPIOs via a separate memory region
within the macio device.
Signed-off-by: Mark Cave-Ayland
---
default-configs/ppc-softmmu.mak | 1 +
hw/misc/macio/Makefile.objs | 1 +
hw/misc/macio/gpio.c| 218
This is in preparation for adding configuration controlled via machine
options.
Signed-off-by: Mark Cave-Ayland
---
hw/ppc/mac.h | 11 +++
hw/ppc/mac_newworld.c | 7 +++
2 files changed, 18 insertions(+)
diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h
index 89fa8bbed7..8046cd8a2f
According to the Apple ADB documentation, register 3 is a 2-byte register
with the device address in the first byte, and the handler ID in the second
byte.
This is currently the opposite away to which QEMU returns them so switch the
order around.
Signed-off-by: Mark Cave-Ayland
---
hw/input/adb
This patchset is based upon Ben H's experimental branch which adds PMU
support to the QEMU mac99 machine. Currently mac99 uses the via-cuda
device which works in a lot of cases, but many OSs such as MacOS 10.5
only support via-pmu.
A lot of the work I've been doing on the Mac machines over the pas
The programmer switch is wired up via an external GPIO pin and can be used
to aid debugging Mac guests.
Signed-off-by: Mark Cave-Ayland
---
hw/misc/macio/gpio.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/hw/misc/macio/gpio.c b/hw/misc/macio/gpio.c
index 5630afdf18..9317df
On 06/12/2018 01:27 PM, Greg Kurz wrote:
> Commit 9d6f106552fa moved the last line in this block to somewhere else,
> but it forgot to remove the now useless #if/#endif.
>
> Signed-off-by: Greg Kurz
Reviewed-by: Philippe Mathieu-Daudé
> ---
> target/ppc/cpu.h |2 --
> 1 file changed, 2 de
Daniel P. Berrangé writes:
> On Tue, Jun 12, 2018 at 02:58:21PM +0200, Markus Armbruster wrote:
>> Legacy -drive supports "password-secret" parameter that isn't
>> available with -blockdev / blockdev-add. That's because we backed out
>> our first try to provide it there due to interface design d
Am 12.06.2018 um 14:58 hat Markus Armbruster geschrieben:
> PATCH 01-17 are configuration fixes and cleanup, in particular
> -blockdev driver=nfs,... and -drive driver=(nbd|sheepdog|ssh),... with
> non-string scalars.
>
> PATCH 18-19 provide support for configuring rbd authentication.
>
> I'm hap
Kevin Wolf writes:
> Am 12.06.2018 um 14:58 hat Markus Armbruster geschrieben:
>> From: Max Reitz
>>
>> There are numerous QDict functions that have been introduced for and are
>> used only by the block layer. Move their declarations into an own
>> header file to reflect that.
>>
>> While qdi
Hi Richard,
On 06/11/2018 09:51 PM, Richard Henderson wrote:
> Signed-off-by: Richard Henderson
> ---
> linux-user/syscall.h | 44 +
> linux-user/syscall.c | 70 --
> linux-user/syscall_file.c | 61 +
Kevin Wolf writes:
> Am 07.06.2018 um 08:25 hat Markus Armbruster geschrieben:
>> Remaining uses of qobject_input_visitor_new_keyval() in the block
>> subsystem:
>>
>> * block_crypto_create_opts_init()
>> Currently doesn't visit any non-string scalars, thus safe. It's
>> called from
>> -
On 06/11/2018 09:51 PM, Richard Henderson wrote:
> Reviewed-by: Laurent Vivier
> Signed-off-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
> ---
> linux-user/syscall.c | 11 ---
> 1 file changed, 4 insertions(+), 7 deletions(-)
>
> diff --git a/linux-user/syscall.c b/linux
> -Original Message-
> From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org]
> On Behalf Of Eduardo Habkost
> Sent: Monday, June 11, 2018 4:10 PM
> To: Moger, Babu
> Cc: m...@redhat.com; marcel.apfelb...@gmail.com; pbonz...@redhat.com;
> r...@twiddle.net; mtosa...@redhat.co
On 06/11/2018 09:51 PM, Richard Henderson wrote:
> Reviewed-by: Laurent Vivier
> Signed-off-by: Richard Henderson
> ---
> linux-user/syscall.c | 341 ++-
> 1 file changed, 175 insertions(+), 166 deletions(-)
>
> diff --git a/linux-user/syscall.c b/linux-u
Commit 9d6f106552fa moved the last line in this block to somewhere else,
but it forgot to remove the now useless #if/#endif.
Signed-off-by: Greg Kurz
---
target/ppc/cpu.h |2 --
1 file changed, 2 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 0247c1f04c37..a91f1a8777eb
Kevin Wolf writes:
> Am 07.06.2018 um 08:25 hat Markus Armbruster geschrieben:
>> Configuration flows through the block subsystem in a rather peculiar
>> way. Configuration made with -drive enters it as QemuOpts.
>> Configuration made with -blockdev / blockdev-add enters it as QAPI
>> type Block
On 06/11/2018 09:51 PM, Richard Henderson wrote:
> Transform outermost "break" to "return ret". If the immediately
> preceeding statement was an assignment to ret, return the value
> directly.
>
> Reviewed-by: Laurent Vivier
> Signed-off-by: Richard Henderson
> ---
> linux-user/syscall.c | 970
On 06/11/2018 09:51 PM, Richard Henderson wrote:
> There was supposed to be a single point of return for do_syscall
> so that tracing works properly. However, there are a few bugs
> in that area. It is significantly simpler to simply split out
> an inner function to enforce this.
>
> Reviewed-by
On 06/11/2018 06:43 PM, John Snow wrote:
> requires: 20180606182449.1607-1-js...@redhat.com
No longer requires any prerequisites.
--js
>
> See patch for details; this is somewhat an RFC that I suspect
> will be useful for libvirt in some situations, but maybe it's
> actually overkill.
>
> J
On 12 June 2018 at 16:52, Greg Kurz wrote:
> On Tue, 12 Jun 2018 15:34:22 +0100
> Peter Maydell wrote:
>
>> On 12 June 2018 at 07:44, David Gibson wrote:
>> >
>> > ppc patch queue 2018-06-12
>> >
>> > Here's another batch of ppc pa
k-2018-06-11' into staging (2018-06-11
> > 15:31:20 +0100)
> >
> > are available in the Git repository at:
> >
> > git://github.com/dgibson/qemu.git tags/ppc-for-3.0-20180612
> >
> > for you to fetch changes up to 30f79dc13f116a79ff45d37ad0f5c035012064
static void file_memory_backend_set_pmem(Object *o, bool value, Error **errp)
{
HostMemoryBackend *backend = MEMORY_BACKEND(o);
HostMemoryBackendFile *fb = MEMORY_BACKEND_FILE(o);
if (host_memory_backend_mr_inited(backend)) {
error_setg(errp, "cannot change property 'pmem' of %
ble in the git repository at:
>
> git://git.kraxel.org/qemu tags/usb-20180612-pull-request
>
> for you to fetch changes up to 3c969a6022438cf59de10d2dc3c58f4807788f98:
>
> usb-mtp: Return error on suspicious TYPE_DATA packe
Am 12.06.2018 um 14:58 hat Markus Armbruster geschrieben:
> When you mix scalar and non-scalar keys, whether you get an "already
> set as scalar" or an "already set as dict" error depends on qdict
> iteration order. Neither message makes much sense. Replace by
> ""Cannot mix scalar and non-scalar
According to my understand, the file node on real persistent memory do not need
to be pmem=on
pmem=on is a feature for file backend class. For example, if we do not have
enough hard disk space
and we have enough pmem, we can use file on pmem the same as normal
file-backend on hard disk.
That
On Tue, 12 Jun 2018 16:08:42 +0200
Halil Pasic wrote:
> On 06/12/2018 03:56 PM, Pierre Morel wrote:
> >> So, what are you proposing? Being more specific and stating that the
> >> scsw is not necessarily a real scsw, but merely a vehicle for sending a
> >> command? Or keeping it as it is now for s
Max Reitz writes:
> This patch allows specifying a discriminator that is an optional member
> of the base struct. In such a case, a default value must be provided
> that is used when no value is given.
Hmm. Can you explain why you need this feature?
> Signed-off-by: Max Reitz
> ---
> qapi/i
On 06/06/2018 08:13 AM, Lingfeng Yang via Qemu-devel wrote:
> size_t qemu_mempath_getpagesize(const char *mem_path)
> {
> +#ifndef _WIN32
> #ifdef CONFIG_LINUX
> struct statfs fs;
> int ret;
> @@ -73,10 +82,14 @@ size_t qemu_mempath_getpagesize(const char *mem_path)
> #endif
>
>
On 12/06/2018 17:01, Eduardo Habkost wrote:
>>>
>>> Remove OSPKE from the feature name array so users don't try to
>>> configure it manually.
>>>
>>> Signed-off-by: Eduardo Habkost
>> Yes, it's the same as OSXSAVE. Thanks!
> CR4_OSXSAVE_MASK is automatically enabled on user-mode QEMU,
> though.
>
Am 12.06.2018 um 14:58 hat Markus Armbruster geschrieben:
> PATCH 01-17 are configuration fixes and cleanup, in particular
> -blockdev driver=nfs,... and -drive driver=(nbd|sheepdog|ssh),... with
> non-string scalars.
>
> PATCH 18-19 provide support for configuring rbd authentication.
>
> I'm hap
On Tue, Jun 12, 2018 at 04:53:54PM +0200, Marc-André Lureau wrote:
> Hi
>
> On Fri, Jun 8, 2018 at 10:43 AM, Daniel P. Berrangé
> wrote:
> > On Fri, Jun 08, 2018 at 12:34:15AM +0200, Marc-André Lureau wrote:
> >> Hi
> >>
> >> On Mon, Jun 4, 2018 at 11:36 AM, Daniel P. Berrangé
> >> wrote:
> >>
On 06/11/18 19:55, Dan Williams wrote:
> On Mon, Jun 11, 2018 at 9:26 AM, Stefan Hajnoczi wrote:
> > On Mon, Jun 11, 2018 at 06:54:25PM +0800, Zhang Yi wrote:
> >> Nvdimm driver use Memory hot-plug APIs to map it's pmem resource,
> >> which at a section granularity.
> >>
> >> When QEMU emulated th
On 12/06/2018 12:46, Thomas Huth wrote:
>>
>> Your patch does what is possible with a monolithic interface definition:
>> it dumps it all on one maintainer: me. I'm struggling to keep up with
>> the QAPI schema, I'm not sure I can take more.
>>
>> Note that "Command line option argument parsing" i
Am 12.06.2018 um 14:58 hat Markus Armbruster geschrieben:
> From: Max Reitz
>
> There are numerous QDict functions that have been introduced for and are
> used only by the block layer. Move their declarations into an own
> header file to reflect that.
>
> While qdict_extract_subqdict() is in fa
On Tue, Jun 12, 2018 at 08:55:55AM +0200, Paolo Bonzini wrote:
> On 11/06/2018 22:37, Eduardo Habkost wrote:
> > RFC NOTE: Paolo, Richard, as far as I can see, there's no point
> > in enabling OSPKE in user-mode QEMU. Do you confirm that?
> >
> > OSPKE is not a static feature flag: it changes dyn
Hi
On Fri, Jun 8, 2018 at 4:57 PM, Philippe Mathieu-Daudé wrote:
> On 06/01/2018 01:27 PM, Marc-André Lureau wrote:
>> Split vhost_user_read(), so only header can be read with
>> vhost_user_read_header().
>>
>> Signed-off-by: Marc-André Lureau
>> ---
>> hw/virtio/vhost-user.c | 27 +
On Tue, 12 Jun 2018 13:38:08 +
Junyan He wrote:
> He have pmem_persist and pmem_memcpy_persist stub functions.
>
> If no libpmem and user really specify pmem=on, we just do nothing or just
> memcpy.
>
> Real persistent memory always require libpmem support its load/save.
>
> If pmem=on an
Hi
On Fri, Jun 8, 2018 at 10:43 AM, Daniel P. Berrangé wrote:
> On Fri, Jun 08, 2018 at 12:34:15AM +0200, Marc-André Lureau wrote:
>> Hi
>>
>> On Mon, Jun 4, 2018 at 11:36 AM, Daniel P. Berrangé
>> wrote:
>> > On Fri, Jun 01, 2018 at 06:27:41PM +0200, Marc-André Lureau wrote:
>> >> Create a vho
09.06.2018 18:32, Vladimir Sementsov-Ogievskiy wrote:
Implement reconnect. To achieve this:
1. Move from quit bool variable to state. 4 states are introduced:
connecting-wait: means, that reconnecting is in progress, and there
were small number of reconnect attempts, so all requests ar
On Tue, Jun 12, 2018 at 03:58:03PM +0200, Igor Mammedov wrote:
[...]
> > > > +if (xcc->host_cpuid_required && enable_cpu_pm) {
> > > > +host_cpuid(5, 0, &cpu->mwait.eax, &cpu->mwait.ebx,
> > > > + &cpu->mwait.ecx, &cpu->mwait.edx);
> > > > +}
> > > could this sta
Public bug reported:
Hey,
I am part of the Zynthian team and we use qemu-arm-static to cross compile lv2
audio plugins.
When running a compilation of DISTRHO-Ports we get:
lv2_ttl_generator: pthread_mutex_lock.c:81: __pthread_mutex_lock: Assertion
`mutex->__data.__owner == 0' failed.
qemu: unc
ble in the Git repository at:
>
> git://github.com/dgibson/qemu.git tags/ppc-for-3.0-20180612
>
> for you to fetch changes up to 30f79dc13f116a79ff45d37ad0f5c035012064a7:
>
> spapr_pci: Remove unhelpful pagesize warning (2018-06-12 10:44:36 +1000)
>
>
Could you provide repro instructions?
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https://bugs.launchpad.net/bugs/1776478
Title:
Getting qemu: uncaught target signal 6 when running lv2 plugin cross-
compilation
Status in QE
Am 07.06.2018 um 08:25 hat Markus Armbruster geschrieben:
> Remaining uses of qobject_input_visitor_new_keyval() in the block
> subsystem:
>
> * block_crypto_create_opts_init()
> Currently doesn't visit any non-string scalars, thus safe. It's
> called from
> - block_crypto_open_luks()
>
On 06/12/2018 03:56 PM, Pierre Morel wrote:
So, what are you proposing? Being more specific and stating that the
scsw is not necessarily a real scsw, but merely a vehicle for sending a
command? Or keeping it as it is now for ssch, and adding a second
interface for hsch/csch (and maybe rsch, msc
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 1528768140-17894-1-git-send-email-c...@braap.org
Subject: [Qemu-devel] [PATCH v4 00/14] fp-test + hardfloat
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git l
On Tue, 12 Jun 2018 15:57:19 +0300
"Michael S. Tsirkin" wrote:
> On Tue, Jun 12, 2018 at 02:56:05PM +0200, Igor Mammedov wrote:
> > On Fri, 8 Jun 2018 23:59:19 +0300
> > "Michael S. Tsirkin" wrote:
> >
> > > When guest CPU PM is enabled, and with -cpu host, expose the host CPU
> > > MWAIT lea
On 12/06/2018 11:59, Cornelia Huck wrote:
On Fri, 8 Jun 2018 17:51:27 +0200
Pierre Morel wrote:
On 08/06/2018 16:45, Cornelia Huck wrote:
On Fri, 8 Jun 2018 15:13:28 +0200
Halil Pasic wrote:
On 06/08/2018 02:20 PM, Cornelia Huck wrote:
My proposal is to do the same
copying to scsw(r) ag
We could also do a better job of identifying when different things
(initrd, kernel, dtb) overlap in memory.
** Tags added: arm
** Changed in: qemu
Status: New => Confirmed
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http
On Tue, Jun 12, 2018 at 05:13:22PM +0800, Zihan Yang wrote:
> The inner host bridge created by pxb-pcie is TYPE_PXB_PCI_HOST by default,
> add a new type TYPE_PXB_PCIE_HOST to better utilize the ECAM of PCIe
>
> Signed-off-by: Zihan Yang
I have a concern that there are lots of new properties
add
On Fri, 8 Jun 2018 17:43:24 +0800
liujunjie wrote:
> THese leaks are found by ASAN with CPU hot-add and hot-del actions,
> such as:
it would be better to split patch into several, 1 leak per patch
> ==14127==ERROR: LeakSanitizer: detected memory leaks
>
> Direct leak of 4096 byte(s) in 1 object
Am 07.06.2018 um 08:25 hat Markus Armbruster geschrieben:
> Configuration flows through the block subsystem in a rather peculiar
> way. Configuration made with -drive enters it as QemuOpts.
> Configuration made with -blockdev / blockdev-add enters it as QAPI
> type BlockdevOptions. The block subs
He have pmem_persist and pmem_memcpy_persist stub functions.
If no libpmem and user really specify pmem=on, we just do nothing or just
memcpy.
Real persistent memory always require libpmem support its load/save.
If pmem=on and without libpmem, we can think that user want to imitate
pmem=on whi
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