Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Signed-off-by: Arnaud Minier
Signed-off-by: Inès Varhol
---
hw/arm/Kconfig | 1 +
hw/arm/stm32l4x5_soc.c | 52 +-
include/hw/arm/stm32l4
Acked-by: Alistair Francis
Signed-off-by: Arnaud Minier
Signed-off-by: Inès Varhol
---
tests/qtest/meson.build | 5 +
tests/qtest/stm32l4x5_exti-test.c | 590 ++
2 files changed, 595 insertions(+)
create mode 100644 tests/qtest/stm32l4x5_exti-test.c
dif
Although very similar to the STM32F4xx EXTI, STM32L4x5 EXTI generates
more than 32 event/interrupt requests and thus uses more registers
than STM32F4xx EXTI which generates 23 event/interrupt requests.
Acked-by: Alistair Francis
Signed-off-by: Arnaud Minier
Signed-off-by: Inès Varhol
---
Shoul
On 1/5/24 19:13, Atish Patra wrote:
From: Kaiwen Xue
This adds the properties for ISA extension smcntrpmf. Patches
implementing it will follow.
Signed-off-by: Atish Patra
Signed-off-by: Kaiwen Xue
---
target/riscv/cpu.c | 2 ++
target/riscv/cpu_cfg.h | 1 +
2 files changed, 3 inse
Hi Zhao,
Ran few basic tests on AMD systems. Changes look good.
Thanks
Babu
Tested-by: Babu Moger
On 1/8/24 02:27, Zhao Liu wrote:
> From: Zhao Liu
>
> Hi list,
>
> This is the our v7 patch series, rebased on the master branch at the
> commit d328fef93ae7 ("Merge tag 'pull-20231230' of
>
Queued, thanks.
Paolo
On 1/8/24 18:15, Samuel Tardieu wrote:
The 16MiB flash device is only used by the deprecated shix machine.
Its code it old and unmaintained, and has never been adapted to the
QOM architecture. It still contains debug statements and uses global
variables. It is time to deprecate it.
Signed-off-by
On 1/8/24 18:15, Samuel Tardieu wrote:
The shix machine has been designed and used at Télécom Paris from 2003
to 2010. It had been added to QEMU in 2005 and has not been maintained
since. Since nobody is using the physical board anymore nor interested
in maintaining the QEMU port, it is time to d
Hi Peter,
On 1/8/24 16:52, Peter Maydell wrote:
> On Fri, 22 Jun 2018 at 14:09, Peter Maydell wrote:
>> From: Eric Auger
>>
>> With this patch, virt-3.0 machine uses a new 256MB ECAM region
>> by default instead of the legacy 16MB one, if highmem is set
>> (LPAE supported by the guest) and (!fir
On Fri, Jan 05, 2024 at 09:59:19PM -0800, Hao Xiang wrote:
> On Wed, Jan 3, 2024 at 1:56 PM Gregory Price
> wrote:
> >
> > For a variety of performance reasons, this will not work the way you
> > want it to. You are essentially telling QEMU to map the vmem0 into a
> > virtual cxl device, and now
The 16MiB flash device is only used by the deprecated shix machine.
Its code it old and unmaintained, and has never been adapted to the
QOM architecture. It still contains debug statements and uses global
variables. It is time to deprecate it.
Signed-off-by: Samuel Tardieu
---
docs/about/depreca
Hi Richard,
(revisiting this old patch.)
On 20/12/21 22:41, Richard Henderson wrote:
This requires extra work for each target, but adds the
common syscall code, and the necessary flag in CPUState.
Reviewed-by: Warner Losh
Signed-off-by: Richard Henderson
---
include/hw/core/cpu.h
The shix machine has been designed and used at Télécom Paris from 2003
to 2010. It had been added to QEMU in 2005 and has not been maintained
since. Since nobody is using the physical board anymore nor interested
in maintaining the QEMU port, it is time to deprecate it.
Signed-off-by: Samuel Tardi
The shix machine was a research project started around 2003 at
Télécom Paris. Preliminary support in QEMU was added in 2005
back when the QEMU architecture was less structured than it is
now. Unfortunately, the support for the shix machine and its
peripherals, such as the TC58128 16MiB flash device
The qemu-img, qemu-io, qemu-nbd, qemu-storage-daemon tools all have
support for systemtap tracing built-in, so should be given corresponding
.stp files to define their probes.
Signed-off-by: Daniel P. Berrangé
---
meson.build | 61 +++--
1 file cha
The --target-type and --target-name args are used to construct
the default probe prefix if '--probe-prefix' is not given. The
meson.build will always pass '--probe-prefix', so the other args
are effectively redundant.
Signed-off-by: Daniel P. Berrangé
---
docs/devel/tracing.rst | 3 +--
meson.b
Currently we're only generating .stp definitions for the system and
user emulators forgetting all about the tools which support tracing
too.
Daniel P. Berrangé (2):
tracetool: remove redundant --target-type / --target-name args
meson: generate .stp files for tools too
docs/devel/tracing.rst
On Thu, 4 Jan 2024 at 17:17, Michael Tokarev wrote:
>
> 04.01.2024 19:25, Michael Tokarev wrote:
> ...
> > this archive contains kernel+initrd. I run it this way:
> >
> > qemu-system-arm -append root=LABEL=debvm -nographic -machine type=virt \
> > -drive media=disk,format=raw,file=vmlinuz,if=vi
ping?
On 30/11/23 21:56, Philippe Mathieu-Daudé wrote:
Since previous commit, tb_invalidate_phys_page() is not used
anymore in system emulation. Make it static for user emulation
and remove its public declaration in "exec/translate-all.h".
Signed-off-by: Philippe Mathieu-Daudé
---
Based-on: <2
On 30/11/23 18:19, Max Filippov wrote:
Hello,
this series makes target/xtensa use generic instruction breakpoint
infrastructure removing its use of tb_invalidate_phys_addr. It also adds
a new TCG test checking relative priority of icount and ibreak exceptions
for target/xtensa.
Max Filippov (2)
The term "QEMU global mutex" is identical to the more widely used Big
QEMU Lock ("BQL"). Update the code comments and documentation to use
"BQL" instead of "QEMU global mutex".
Signed-off-by: Stefan Hajnoczi
Acked-by: Markus Armbruster
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Paul Durra
From: Philippe Mathieu-Daudé
aio_context_set_aio_params() doesn't use its undocumented
Error** argument. Remove it to simplify.
Note this removes a use of "unchecked Error**" in
iothread_set_aio_context_params().
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Markus Armbruster
Signed-off-
The term "iothread lock" is obsolete. The APIs use Big QEMU Lock (BQL)
in their names. Update the code comments to use "BQL" instead of
"iothread lock".
Signed-off-by: Stefan Hajnoczi
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Paul Durrant
Reviewed-by: Akihiko Odaki
Reviewed-by: Cédric L
The Big QEMU Lock (BQL) has many names and they are confusing. The
actual QemuMutex variable is called qemu_global_mutex but it's commonly
referred to as the BQL in discussions and some code comments. The
locking APIs, however, are called qemu_mutex_lock_iothread() and
qemu_mutex_unlock_iothread().
The name "iothread" is overloaded. Use the term Big QEMU Lock (BQL)
instead, it is already widely used and unambiguous.
Signed-off-by: Stefan Hajnoczi
Reviewed-by: Cédric Le Goater
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Paul Durrant
Reviewed-by: Harsh Prateek Bora
Reviewed-by: Akihi
The name "iothread" is overloaded. Use the term Big QEMU Lock (BQL)
instead, it is already widely used and unambiguous.
Signed-off-by: Stefan Hajnoczi
Reviewed-by: Paul Durrant
Acked-by: David Woodhouse
Reviewed-by: Cédric Le Goater
Acked-by: Ilya Leoshkevich
Reviewed-by: Harsh Prateek Bora
The following changes since commit ffd454c67e38cc6df792733ebc5d967eee28ac0d:
Merge tag 'pull-vfio-20240107' of https://github.com/legoater/qemu into
staging (2024-01-08 10:28:42 +)
are available in the Git repository at:
https://gitlab.com/stefanha/qemu.git tags/block-pull-request
for
On Tue, Jan 02, 2024 at 10:35:24AM -0500, Stefan Hajnoczi wrote:
> v3:
> - Rebase
> - Define bql_lock() macro on a single line [Akihiko Odaki]
> v2:
> - Rename APIs bql_*() [PeterX]
> - Spell out "Big QEMU Lock (BQL)" in doc comments [PeterX]
> - Rename "iolock" variables in hw/remote/mpqemu-link.c
On 1/7/24 21:13, Alistair Francis wrote:
The CSRs will always be between either CSR_MHPMCOUNTER3 and
CSR_MHPMCOUNTER31 or CSR_MHPMCOUNTER3H and CSR_MHPMCOUNTER31H.
So although ctr_index can't be negative, Coverity doesn't know this and
it isn't obvious to human readers either. Let's add an as
On 1/7/24 21:13, Alistair Francis wrote:
Bits 10, 6, 2 and 12 of mideleg are read only 1 when the Hypervisor is
enabled. We currently only set them on accesses to mideleg, but they
aren't correctly set on reset. Let's ensure they are always the correct
value.
Resolves: https://gitlab.com/qemu
On 1/7/24 21:13, Alistair Francis wrote:
We have been incorrectly adjusting both the interrupt and exception
cause when using the hypervisor extension and trapping to VS-mode. This
patch changes the conditional to ensure we only adjust the cause for
interrupts and not exceptions.
Resolves: ht
Mark Cave-Ayland writes:
> On 05/01/2024 10:13, Philippe Mathieu-Daudé wrote:
>
>> (+Mark & Eduardo)
>> On 4/1/24 14:37, inesvarhol wrote:
>>>
>>> Le jeudi 4 janvier 2024 à 14:05, Philippe Mathieu-Daudé
>>> a écrit :
>>>
>>> Hello,
>>>
> +static void test_edge_selector(void)
> +{
>
Next patch will add more bare CPUs. Their cpu_init() functions would be
glorified copy/pastes of rv64i_bare_cpu_init(), differing only by a
riscv_cpu_set_misa() call.
Add a new .instance_init for the TYPE_RISCV_BARE_CPU typ to avoid this
code repetition. While we're at it, add a better explanation
A bare bones 32 bit RVI CPU, rv32i, will make users lives easier when a
full customized 32 bit CPU is desired, and users won't need to disable
defaults by hand as they would with the rv32 CPU. [1] has an example of
a situation that would be avoided with rv32i.
In fact, add bare bones CPUs for RVE
Hi,
This is the second version of a buried patch series:
"[PATCH for-9.0 0/6] riscv: rv32i,rv32e,rv64i and rv64e CPUs"
This version shrank to 2 patches since most of the prep work was already
done by the RVA22 profile implementation, which is now queued in
riscv-to-apply.next.
The motivation is
Philippe Mathieu-Daudé writes:
> On 5/1/24 11:13, Philippe Mathieu-Daudé wrote:
>> (+Mark & Eduardo)
>> On 4/1/24 14:37, inesvarhol wrote:
>>>
>>> Le jeudi 4 janvier 2024 à 14:05, Philippe Mathieu-Daudé
>>> a écrit :
>>>
>>> Hello,
>>>
> +static void test_edge_selector(void)
> +{
>
Add an update buffer where all block updates are staged.
Flush or discard updates properly, so we should never see
half-completed block writes in pflash storage.
Drop a bunch of FIXME comments ;)
Signed-off-by: Gerd Hoffmann
---
hw/block/pflash_cfi01.c | 110 ++--
When running qemu with edk2 efi firmware on aarch64 the efi
variable store in pflash can get corrupted. qemu not doing
proper block writes -- flush all or nothing to storage -- is
a hot candidate for being the root cause.
This little series tries to fix that with an update buffer
where block writ
Move the offset calculation, do it once at the start of the function and
let the 'p' variable point directly to the memory location which should
be updated. This makes it simpler to update other buffers than
pfl->storage in an upcoming patch. No functional change.
Signed-off-by: Gerd Hoffmann
-
Use the helper functions we have to read/write multi-byte values
in correct byte order.
Suggested-by: Philippe Mathieu-Daudé
Signed-off-by: Gerd Hoffmann
---
hw/block/pflash_cfi01.c | 63 ++---
1 file changed, 8 insertions(+), 55 deletions(-)
diff --git a/hw
On Mon, 8 Jan 2024 at 10:49, Albert Esteve wrote:
> On Mon, Dec 11, 2023 at 10:48 PM Stefan Hajnoczi wrote:
>>
>> On Thu, 7 Dec 2023 at 09:55, Albert Esteve wrote:
>> >
>> > v1: https://www.mail-archive.com/qemu-devel@nongnu.org/msg1005257.html
>> > v1 -> v2:
>> > - Solved an unitialized uuid
On Fri, 22 Jun 2018 at 14:09, Peter Maydell wrote:
>
> From: Eric Auger
>
> With this patch, virt-3.0 machine uses a new 256MB ECAM region
> by default instead of the legacy 16MB one, if highmem is set
> (LPAE supported by the guest) and (!firmware_loaded || aarch64).
>
> Indeed aarch32 mode FW m
On Mon, Dec 11, 2023 at 10:48 PM Stefan Hajnoczi wrote:
> On Thu, 7 Dec 2023 at 09:55, Albert Esteve wrote:
> >
> > v1: https://www.mail-archive.com/qemu-devel@nongnu.org/msg1005257.html
> > v1 -> v2:
> > - Solved an unitialized uuid value on vhost-user source
> > - Changed cleanup strategy,
Alex Bennée writes:
> From: Akihiko Odaki
>
> It is initialized with a simple assignment and there is little room for
> error. In fact, the validation is even more complex.
>
> Signed-off-by: Akihiko Odaki
> Acked-by: LIU Zhiwei
> Reviewed-by: Daniel Henrique Barboza
> Acked-by: Alistair Fran
Any kind of buffer can hold an Ethernet frame, no just
arrays of unsigned chars.
Signed-off-by: Philippe Mathieu-Daudé
---
include/net/eth.h | 2 +-
net/eth.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/net/eth.h b/include/net/eth.h
index 3b80b6e07f..d7
On 08.01.24 16:10, Mark Kanda wrote:
Refactor the memory prealloc threads support:
- Make memset context a global qlist
- Move the memset thread join/cleanup code to a separate routine
This is functionally equivalent and facilitates multiple memset contexts
(used in a subsequent patch).
Signed-
Peter Xu writes:
> On Fri, Jan 05, 2024 at 03:04:49PM -0300, Fabiano Rosas wrote:
>> [This patch is not necessary anymore after 8.2 has been released]
>>
>> Add the 'since' annotations to recently added tests and adapt the
>> postcopy test to use the older "uri" API when needed.
>>
>> Signed-of
Hi William,
On 6/1/24 23:35, William Hooper wrote:
At least on macOS 12.7.2, vmnet doesn't pad Ethernet frames, such as the
host's ARP replies, to the minimum size (60 bytes before the frame check
sequence) defined in IEEE Std 802.3-2022, so guests' Ethernet device
drivers may drop them with "fr
On 03/01/2024 22.34, Pavel Pisa wrote:
On Wednesday 03 of January 2024 18:28:17 Samuel Tardieu wrote:
If "busses" might be encountered as a plural of "bus" (5 instances),
the correct spelling is "buses" (26 instances). Fixing those 5
instances makes the doc more consistent.
Signed-off-by: Samue
On Mon, 8 Jan 2024 at 02:35, Peter Xu wrote:
>
> On Mon, Jan 08, 2024 at 10:10:24AM +0800, Peter Xu wrote:
> > On Sun, Jan 07, 2024 at 11:28:25AM -0500, Stefan Hajnoczi wrote:
> > > On Sun, 7 Jan 2024 at 10:23, Peter Maydell
> > > wrote:
> > > >
> > > > On Sun, 7 Jan 2024 at 12:41, Stefan Hajnoc
Hi Nabih,
On 19/12/23 22:32, Nabih Estefan wrote:
From: Nabih Estefan Diaz
- Implementation of Receive function for packets
- Implementation for reading and writing from and to descriptors in
memory for Rx
When RX starts, we need to flush the queued packets so that they
can be received by
For clarity given it only has two states.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Pavel Dovgalyuk
Reviewed-by: Richard Henderson
Signed-off-by: Alex Bennée
Message-Id: <20231211091346.14616-9-alex.ben...@linaro.org>
diff --git a/replay/replay-internal.h b/replay/replay-internal.h
ind
This is mostly a problem within avocado as serial generally isn't busy
enough to overfill pipes. However the consequences of recording a
failed write will haunt us on replay when the log will be out of sync
to the playback.
Fixes: https://gitlab.com/qemu-project/qemu/-/issues/2010
Acked-by: Pavel
Now we have a centralised report function use it for missing character
events.
Reviewed-by: Richard Henderson
Signed-off-by: Alex Bennée
Message-Id: <20231211091346.14616-11-alex.ben...@linaro.org>
diff --git a/replay/replay-char.c b/replay/replay-char.c
index a31aded032e..72b1f832dde 100644
--
A lot of the hang I see are when we end up spinning in
rr_wait_io_event for an event that will never come in playback. As a
new check functions which can see if we are in PLAY mode and kick us
us the wait function so the event can be processed.
This fixes most of the failures in replay_kernel.py
This will help in tracking where we are in the stream when debugging.
Reviewed-by: Pavel Dovgalyuk
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Signed-off-by: Alex Bennée
Message-Id: <20231211091346.14616-6-alex.ben...@linaro.org>
diff --git a/scripts/replay-dump.py b/sc
Fixes: a02fe2ca70 (replay: Remove host_clock_last)
Reviewed-by: Richard Henderson
Reviewed-by: Pavel Dovgalyuk
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Alex Bennée
Message-Id: <20231211091346.14616-7-alex.ben...@linaro.org>
diff --git a/replay/replay-internal.h b/replay/replay-intern
QEMU complains about us not being explicit with setting snapshot so
lets do that. Also as cdroms are RO media we don't need to jump the
hoops of setting up snapshots and replay disks - just declare the
drive is a cdrom and nothing should change.
Signed-off-by: Alex Bennée
Message-Id: <20231211091
Reviewed-by: Pavel Dovgalyuk
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Signed-off-by: Alex Bennée
Message-Id: <20231211091346.14616-3-alex.ben...@linaro.org>
diff --git a/tests/avocado/replay_linux.py b/tests/avocado/replay_linux.py
index 270ccc1eae8..e95bff32999 10064
With the latest fixes for #2010 and #2013 these tests look pretty
stable now. Of course the only way to be really sure is to run it in
the CI infrastructure and see what breaks.
Acked-by: Pavel Dovgalyuk
Signed-off-by: Alex Bennée
Message-Id: <20231211091346.14616-14-alex.ben...@linaro.org>
dif
There are a number of bugs against 32 bit x86 on the tracker. Lets at
least establish a baseline pure kernel boot can do record/replay
before we start looking at the devices.
Acked-by: Pavel Dovgalyuk
Acked-by: Richard Henderson
Signed-off-by: Alex Bennée
Message-Id: <20231211091346.14616-2-ale
Figuring out why replay has failed is tricky at the best of times.
Lets centralise the reporting of a replay sync error and add a little
bit of extra information to help with debugging.
Reviewed-by: Richard Henderson
Signed-off-by: Alex Bennée
Message-Id: <20231211091346.14616-10-alex.ben...@lin
To help debugging replay logs I've implemented decode_plain and
decode_char_write as well as put in a new table for the current format
of log.
Reviewed-by: Richard Henderson
Signed-off-by: Alex Bennée
Message-Id: <20231211091346.14616-5-alex.ben...@linaro.org>
diff --git a/scripts/replay-dump.p
The following changes since commit 0c1eccd368af8805ec0fb11e6cf25d0684d37328:
Merge tag 'hw-cpus-20240105' of https://github.com/philmd/qemu into staging
(2024-01-05 16:08:58 +)
are available in the Git repository at:
https://gitlab.com/stsquad/qemu.git tags/pull-replay-fixes-080124-1
f
Remove the non-standard comment formatting and move the descriptions
into a proper kdoc comment.
Reviewed-by: Pavel Dovgalyuk
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Alex Bennée
Message-Id: <20231211091346.14616-8-alex.ben...@linaro.org>
diff --git a/replay/replay-internal.h b/repla
QEMU initializes preallocated backend memory when parsing the corresponding
objects from the command line. In certain scenarios, such as memory being
preallocated across multiple numa nodes, this approach is not optimal due to
the unnecessary serialization.
This series addresses this issue by init
Refactor the memory prealloc threads support:
- Make memset context a global qlist
- Move the memset thread join/cleanup code to a separate routine
This is functionally equivalent and facilitates multiple memset contexts
(used in a subsequent patch).
Signed-off-by: Mark Kanda
---
util/oslib-pos
QEMU initializes preallocated backend memory as the objects are parsed from
the command line. This is not optimal in some cases (e.g. memory spanning
multiple numa nodes) because the memory objects are initialized in series.
Allow the initialization to occur in parallel. The performance increase i
On Mon, 8 Jan 2024 at 14:41, Bui Quang Minh wrote:
>
> On 1/8/24 18:03, Thomas Huth wrote:
> > On 05/01/2024 20.11, Peter Maydell wrote:
> >> https://gitlab.com/qemu-project/qemu/-/jobs/5871592479
> >>
> >> failed with
> >>
> >> $ htags -anT --tree-view=filetree -m qemu_init -t "Welcome to the QEM
On Tue, 19 Dec 2023 at 21:33, Nabih Estefan wrote:
>
> From: Nabih Estefan Diaz
>
> - Implementation of Receive function for packets
> - Implementation for reading and writing from and to descriptors in
> memory for Rx
>
> When RX starts, we need to flush the queued packets so that they
> can b
On Tue, 19 Dec 2023 at 21:33, Nabih Estefan wrote:
>
> From: Nabih Estefan Diaz
>
> Implemented Classes and Masks for GMAC Descriptors
> - Implemeted classes for GMAC Receive and Transmit Descriptors
> - Implemented Masks for said descriptors
>
> - General GMAC Register handling
> - GMAC IRQ Ha
On Fri, Jan 05, 2024 at 03:04:47PM -0300, Fabiano Rosas wrote:
> We can run the migration tests with two different QEMU binaries to
> test migration compatibility between QEMU versions. This means we'll
> be running the tests with an older QEMU in either source or
> destination.
>
> We need to avo
On Tue, 19 Dec 2023 at 21:33, Nabih Estefan wrote:
>
> From: Nabih Estefan Diaz
>
> - Implementation of Transmit function for packets
> - Implementation for reading and writing from and to descriptors in
> memory for Tx
>
> NOTE: This function implements the steps detailed in the datasheet for
Peter Xu writes:
> On Fri, Jan 05, 2024 at 03:04:47PM -0300, Fabiano Rosas wrote:
>> We can run the migration tests with two different QEMU binaries to
>> test migration compatibility between QEMU versions. This means we'll
>> be running the tests with an older QEMU in either source or
>> destina
On Thu, 4 Jan 2024 at 14:12, Philippe Mathieu-Daudé wrote:
>
> QDev objects created with qdev_new() need to manually add
> their parent relationship with object_property_add_child().
>
> Signed-off-by: Philippe Mathieu-Daudé
Applied to target-arm.next, thanks.
-- PMM
On Sat, 6 Jan 2024 at 18:15, Samuel Tardieu wrote:
>
> This patch series builds on a discussion initiated by Anton Kochkov on
> this list in 2022. It allows setting the appropriate number of priority
> bits for Cortex-M devices. For example, FreeRTOS checks at startup that
> the right number of pr
On Mon, 8 Jan 2024 at 14:00, Inès Varhol wrote:
>
> This patch adds a new STM32L4x5 SoC, it is necessary to add support for
> the B-L475E-IOT01A board.
> The implementation is derived from the STM32F405 SoC and NetduinoPlus2
> board.
> The implementation contains no peripherals, only memory region
On Fri, Dec 29, 2023 at 10:30:15AM +0800, Xiaoyao Li wrote:
> On 11/16/2023 1:58 AM, Daniel P. Berrangé wrote:
> > On Wed, Nov 15, 2023 at 02:15:01AM -0500, Xiaoyao Li wrote:
> > > From: Isaku Yamahata
> > >
> > > For GetQuote, delegate a request to Quote Generation Service.
> > > Add property "q
On 1/8/24 18:03, Thomas Huth wrote:
On 05/01/2024 20.11, Peter Maydell wrote:
https://gitlab.com/qemu-project/qemu/-/jobs/5871592479
failed with
$ htags -anT --tree-view=filetree -m qemu_init -t "Welcome to the QEMU
sourcecode"
htags: Negative exec line limit = -371
Does anybody have any idea
From: Helge Deller
Limit IOR to the lower 32-bits on failure.
Keep patch short for easier backporting.
Signed-off-by: Helge Deller
---
target/hppa/op_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c
index 7f607c3afd.
From: Helge Deller
Add support for the qemu --nodefaults option, which will disable the
following default devices:
- lsi53c895a SCSI controller,
- artist graphics card,
- LASI 82596 NIC,
- tulip PCI NIC,
- second serial PCI card,
- USB OHCI controller.
Adding this option is very useful to allow
From: Helge Deller
Limit IOR to the lower 32-bits on failure.
Keep patch short for easier backporting.
Signed-off-by: Helge Deller
---
target/hppa/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index 04de1689d7..3c384d5855 100644
From: Helge Deller
The following changes since commit 7425b6277f12e82952cede1f531bfc689bf77fb1:
Merge tag 'tracing-pull-request' of https://gitlab.com/stefanha/qemu into
staging (2023-12-27 05:15:32 -0500)
are available in the Git repository at:
https://github.com/hdeller/qemu-hppa.git ta
From: Helge Deller
NetBSD accesses some astro and elroy registers which aren't accessed
by Linux yet. Add emulation for those registers to allow NetBSD to
boot further.
Please note that this patch is not sufficient to completely boot up
NetBSD on the 64-bit C3700 machine yet.
Signed-off-by: Helg
From: Helge Deller
The various operating systems (e.g. Linux, NetBSD) have issues
mapping the power button when it's stored in page zero.
NetBSD even crashes, because it fails to map that page and then
accesses unmapped memory.
Since we now have a consistent memory mapping of PDC in 32-bit
and 6
From: Helge Deller
Fix the address translation for PDC space on PA2.0 if PSW.W=0.
Basically, for any address in the 32-bit PDC range from 0xf000 to
0xf100 keep the lower 32-bits and just set the upper 32-bits to
0xfff0.
This mapping fixes the emulated power button in PDC space for 32
From: Helge Deller
The value of unwind_breg may reference register %r0, but we need to avoid
accessing gr0 directly and use the value 0 instead.
At runtime I've seen unwind_breg being zero with the Linux kernel when
rfi is used to jump to smp_callin().
Signed-off-by: Helge Deller
---
target/h
From: Helge Deller
The physical hardware allows DIMMs of 4 MB size and above, allowing up
to 3840 MB of memory, but is restricted by setup code to 3 GB.
Increase the limit to allow up to the maximum amount of memory.
Btw. the memory area from 0xf000. to 0x. is reserved by
the archite
On 1/7/24 18:01, Nicholas Piggin wrote:
The powernv and pseries machines both provide hypervisor facilities
that are supported by KVM. This is a large and complicated set of
features that don't get much system-level testing in ppc tests.
Add a new test case for these which runs QEMU KVM inside t
Peter Xu writes:
> On Wed, Jun 07, 2023 at 10:27:15AM +0200, Juan Quintela wrote:
>> Fabiano Rosas wrote:
>> > We've found the source of flakiness in this test, so re-enable it.
>> >
>> > Signed-off-by: Fabiano Rosas
>> > ---
>> > tests/qtest/migration-test.c | 10 ++
>> > 1 file chang
Signed-off-by: Nikita Ostrenkov
---
hw/arm/Kconfig| 2 ++
hw/arm/fsl-imx6.c | 25 ++
include/hw/arm/fsl-imx6.h | 44 ---
3 files changed, 50 insertions(+), 21 deletions(-)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
in
This patch adds a new STM32L4x5 SoC, it is necessary to add support for
the B-L475E-IOT01A board.
The implementation is derived from the STM32F405 SoC and NetduinoPlus2
board.
The implementation contains no peripherals, only memory regions are
implemented.
Changes from v5 to v6:
- in `stm32l4x5_so
This patch adds a new STM32L4x5 SoC, it is necessary to add support for
the B-L475E-IOT01A board.
The implementation is derived from the STM32F405 SoC.
The implementation contains no peripherals, only memory regions are
implemented.
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-
This commit adds a new B-L475E-IOT01A board using the STM32L475VG SoC
as well as a dedicated documentation file.
The implementation is derived from the Netduino Plus 2 machine.
There are no peripherals implemented yet, only memory regions.
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe M
On Mon, Dec 18, 2023 at 02:37:55PM +1000, Alistair Francis wrote:
...
> > +void riscv_isa_write_fdt(RISCVCPU *cpu, void *fdt, char *nodename)
> > +{
> > +const size_t maxlen = sizeof("rv128i");
> > +g_autofree char *isa_base = g_new(char, maxlen);
> > +g_autofree char *riscv_isa;
> > +
On Fri, Dec 08, 2023 at 12:07:22PM +, Conor Dooley wrote:
> From: Conor Dooley
>
> A few months ago I submitted a patch to various lists, deprecating
> "riscv,isa" with a lengthy commit message [0] that is now commit
> aeb71e42caae ("dt-bindings: riscv: deprecate riscv,isa") in the Linux
> ke
On 8/1/24 10:47, Pierrick Bouvier wrote:
On 1/2/24 05:57, Richard Henderson wrote:
Use qemu_real_host_page_size instead.
Signed-off-by: Richard Henderson
---
linux-user/mmap.c | 66 +++
1 file changed, 33 insertions(+), 33 deletions(-)
diff --git
(+Thomas)
On 8/1/24 13:58, Nikita Ostrenkov wrote:
Hi! Thanks! I'll send a new version of this patch.
But what about fsl imx7? Should it also have PCIE_DEVICES?
Yeah I think so, we missed this in commit 02047622b7 ("hw/arm:
Express dependencies of the remaining IMX boards with Kconfig").
п
On 8/1/24 13:46, Mark Cave-Ayland wrote:
On 08/01/2024 12:01, Philippe Mathieu-Daudé wrote:
On 7/1/24 22:25, Mark Cave-Ayland wrote:
Declaration ROM binary images can be any arbitrary size, however if a
host ROM
memory region is not aligned to qemu_target_page_size() then we fail the
"assert(
On Mon, 8 Jan 2024 at 07:34, Cédric Le Goater wrote:
>
> The following changes since commit 0c1eccd368af8805ec0fb11e6cf25d0684d37328:
>
> Merge tag 'hw-cpus-20240105' of https://github.com/philmd/qemu into staging
> (2024-01-05 16:08:58 +)
>
> are available in the Git repository at:
>
> h
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