Re: [Qemu-devel] [V6 4/4] hw/pci-host: Emulate AMD IOMMU

2016-03-13 Thread Michael S. Tsirkin
On Sun, Mar 13, 2016 at 03:14:37AM +0300, David Kiarie wrote: > On Fri, Mar 11, 2016 at 4:22 PM, Michael S. Tsirkin wrote: > > On Sun, Feb 21, 2016 at 09:11:00PM +0300, David Kiarie wrote: > >> Add AMD IOMMU emulation support to q35 chipset > >> > >> Signed-off-by: David Kiarie

[Qemu-devel] [PATCH 5/5] address_space: replaced function calls

2016-03-13 Thread Mriyam Tamuli
replaced calls named cpu_physical_memory_* with address_space_* hw/display/omap_lcdc.c hw/display/pxa2xx_lcd.c hw/display/virtio-gpu.c hw/dma/etraxfs_dma.c --- hw/display/omap_lcdc.c | 8 hw/display/pxa2xx_lcd.c | 4 ++-- hw/display/virtio-gpu.c | 6 +++--- hw/dma/etraxfs_dma.c|

Re: [Qemu-devel] [PATCH v4 4/4] hw/input/adb.c: implement QKeyCode support

2016-03-13 Thread Peter Maydell
On 13 March 2016 at 16:39, Programmingkid wrote: > I did try this but a bunch of errors showed up. > /include/migration/vmstate.h:248:48: error: invalid operands to binary - > (have 'uint8_t (*)[256]' and 'uint16_t (*)[128]') > #define type_check_array(t1,t2,n)

[Qemu-devel] [PATCH 2/5] address_space: replaced function calls

2016-03-13 Thread Mriyam Tamuli
replaced calls named cpu_physical_memory_* with address_space_* hw/arm/armv7m.c hw/arm/boot.c hw/arm/musicpal.c hw/arm/nseries.c --- hw/arm/armv7m.c | 18 +- hw/arm/boot.c | 8 hw/arm/musicpal.c | 14 +++--- hw/arm/nseries.c | 8 4 files

Re: [Qemu-devel] [PATCH 3/5] ipmi: Add SMBIOS table entry

2016-03-13 Thread Michael S. Tsirkin
On Wed, Feb 24, 2016 at 12:59:14PM -0600, miny...@acm.org wrote: > From: Corey Minyard > > Add an IPMI table entry to the SMBIOS. > > Signed-off-by: Corey Minyard > Acked-by: Michael S. Tsirkin > --- >

Re: [Qemu-devel] [PATCH v4 4/4] hw/input/adb.c: implement QKeyCode support

2016-03-13 Thread Peter Maydell
On 12 March 2016 at 05:40, Programmingkid wrote: > > On Mar 11, 2016, at 10:30 PM, Peter Maydell wrote: > >> >>> +} >>> +keycode = s->data[s->rptr]; >>> +if (++s->rptr == sizeof(s->data)) { >>> +s->rptr = 0; >>> } >>> +s->count--; >>> + >>> +

Re: [Qemu-devel] [RFC] [tcg] Idea on refactoring target code generation loop (gen_intermediate_code)

2016-03-13 Thread Peter Maydell
On 13 March 2016 at 13:16, Lluís Vilanova wrote: > Peter Maydell writes: >> I would be more interested in a proposal to move parts of QEMU >> to Rust, or just about anything else except C++... > > QEMU is pretty low-level, so I'm not sure other languages will fit the bill as

Re: [Qemu-devel] [PATCH] target-arm: Fix descriptor address masking in ARM address translation

2016-03-13 Thread Sergey Sorokin
12.03.2016, 03:18, "Peter Maydell" : >On 12 March 2016 at 06:44, Sergey Sorokin wrote: >> 11.03.2016, 11:41, "Peter Maydell" : >>>On 4 March 2016 at 23:04, Sergey Sorokin wrote: There is a bug in

[Qemu-devel] about correctness of IDE emulation

2016-03-13 Thread Huaicheng Li (coperd)
Hi all, I meet some trouble in understanding IDE emulation: (1) IDE I/O Down Path (In VCPU thread): upon KVM_EXIT_IO, corresponding disk ioport write function will write IO info to IDEState, then ide read callback function will eventually split it into **several DMA transfers** and

Re: [Qemu-devel] [PATCH v4 4/4] hw/input/adb.c: implement QKeyCode support

2016-03-13 Thread Peter Maydell
On 12 March 2016 at 04:27, Programmingkid wrote: > > On Mar 11, 2016, at 10:30 PM, Peter Maydell wrote: > >> On 11 March 2016 at 09:32, Programmingkid wrote: >>> Remove the old pc_to_adb_keycode array and replace it with QKeyCode support. >>>

Re: [Qemu-devel] [PATCH 1/5] address_space: replaced function calls

2016-03-13 Thread Peter Maydell
On 13 March 2016 at 18:56, Mriyam Tamuli wrote: > replaced calls named cpu_physical_memory_* with address_space_* > > cpus.c > cputlb.c > disas.c > exec.c > --- > cpus.c | 2 +- > cputlb.c | 8 > disas.c | 2 +- > exec.c | 60

Re: [Qemu-devel] [PATCH 2/5] pc: Postpone SMBIOS table installation to post machine init

2016-03-13 Thread Michael S. Tsirkin
On Wed, Feb 24, 2016 at 12:59:13PM -0600, miny...@acm.org wrote: > From: Corey Minyard > > This is the same place that the ACPI SSDT table gets added, so that > devices can add themselves to the SMBIOS table. > > Signed-off-by: Corey Minyard This

Re: [Qemu-devel] [PATCH] adb: change handler only when recognized

2016-03-13 Thread Peter Maydell
On 12 March 2016 at 20:31, Hervé Poussineau wrote: > Of course, I've no real documentation for Standard Keyboard vs Extended > Keyboard... Try

Re: [Qemu-devel] [PATCH v4 3/4] adb-keys.h: initial commit

2016-03-13 Thread Peter Maydell
On 11 March 2016 at 02:29, Programmingkid wrote: > This commit implements the adb-keys.h file. It holds information on adb > keycode > values. > > Signed-off-by: John Arbuckle > + > +ADB_KEY_GRAVE_ACCENT = 50, > +ADB_KEY_MINUS = 27,

Re: [Qemu-devel] [PATCH v4 4/4] hw/input/adb.c: implement QKeyCode support

2016-03-13 Thread Programmingkid
On Mar 13, 2016, at 11:40 AM, Peter Maydell wrote: > On 12 March 2016 at 05:40, Programmingkid wrote: >> >> On Mar 11, 2016, at 10:30 PM, Peter Maydell wrote: >> >>> +} +keycode = s->data[s->rptr]; +if (++s->rptr == sizeof(s->data)) {

[Qemu-devel] [PATCH 1/5] address_space: replaced function calls

2016-03-13 Thread Mriyam Tamuli
replaced calls named cpu_physical_memory_* with address_space_* cpus.c cputlb.c disas.c exec.c --- cpus.c | 2 +- cputlb.c | 8 disas.c | 2 +- exec.c | 60 ++-- 4 files changed, 36 insertions(+), 36 deletions(-) diff

[Qemu-devel] [PATCH 3/5] address_space: replaced function calls

2016-03-13 Thread Mriyam Tamuli
replaced calls named cpu_physical_memory_* with address_space_* hw/arm/omap1.c hw/arm/pxa2xx.c hw/audio/marvell_88w8618.c hw/audio/milkymist-ac97.c --- hw/arm/omap1.c | 12 ++-- hw/arm/pxa2xx.c| 4 ++-- hw/audio/marvell_88w8618.c | 2 +-

[Qemu-devel] [PATCH 3/5] address_space: replaced function calls

2016-03-13 Thread Mriyam Tamuli
replaced calls named cpu_physical_memory_* with address_space_* hw/arm/omap1.c hw/arm/pxa2xx.c hw/audio/marvell_88w8618.c hw/audio/milkymist-ac97.c --- hw/arm/omap1.c | 12 ++-- hw/arm/pxa2xx.c| 4 ++-- hw/audio/marvell_88w8618.c | 2 +-

[Qemu-devel] [PATCH 4/5] address_space: replaced function calls

2016-03-13 Thread Mriyam Tamuli
replaced calls named cpu_physical_memory_* with address_space_* hw/core/loader.c hw/display/exynos4210_fimd.c hw/display/milkymist-tmu2.c hw/display/omap_dss.c --- hw/core/loader.c | 4 ++-- hw/display/exynos4210_fimd.c | 6 +++--- hw/display/milkymist-tmu2.c | 16

Re: [Qemu-devel] [PATCH 2/5] address_space: replaced function calls

2016-03-13 Thread Jan Kiszka
On 2016-03-13 19:56, Mriyam Tamuli wrote: > replaced calls named cpu_physical_memory_* with address_space_* Hmm, did you check if the signatures of both calls are identical? If not, did you try to build the result of the patch? I'm afraid there is a bit more work to do. Jan > > hw/arm/armv7m.c

Re: [Qemu-devel] [Patch 1/1] net/net: Allocating Large sized arrays to heap

2016-03-13 Thread Li Zhijian
could you explain why we need this change ? On 03/12/2016 04:39 PM, Pooja Dhannawat wrote: Signed-off-by: Pooja Dhannawat --- net/net.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/net/net.c b/net/net.c index b0c832e..5399758 100644

Re: [Qemu-devel] [PATCH] quorum: Fix crash in quorum_aio_cb()

2016-03-13 Thread Changlong Xie
On 03/11/2016 04:25 PM, Alberto Garcia wrote: On Fri 11 Mar 2016 02:31:31 AM CET, Wen Congyang wrote: On 03/10/2016 08:13 PM, Alberto Garcia wrote: quorum_aio_cb() emits the QUORUM_REPORT_BAD event if there's an I/O error in a Quorum child. However sacb->aiocb must be correctly initialized for

[Qemu-devel] [V7 0/4] AMD IOMMU

2016-03-13 Thread David Kiarie
Hello there, This series adds AMD IOMMU emulation support to Qemu. The only main change since V6 is: -Fixed a cache bug that caused the issue reported by Jan I have assummed that we are running one IOMMU and users don't have the freedom to run many IOMMUs. For instance, I've decided to stick

[Qemu-devel] [V7 3/4] hw/core: Add AMD IOMMU to machine properties

2016-03-13 Thread David Kiarie
Add IOMMU as a string to machine properties which is used to control whether and the type of IOMMU to emulate Signed-off-by: David Kiarie --- hw/core/machine.c | 27 --- include/hw/boards.h | 1 + qemu-options.hx | 7 +--

[Qemu-devel] [V7 4/4] hw/pci-host: Emulate AMD IOMMU

2016-03-13 Thread David Kiarie
Add AMD IOMMU emulation support to q35 chipset Signed-off-by: David Kiarie --- hw/pci-host/q35.c | 21 +++-- include/hw/i386/intel_iommu.h | 1 + 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/hw/pci-host/q35.c

[Qemu-devel] [V7 2/4] hw/i386: ACPI table for AMD IOMMU

2016-03-13 Thread David Kiarie
Add IVRS table for AMD IOMMU. Generate IVRS or DMAR depending on emulated IOMMU Signed-off-by: David Kiarie --- hw/i386/acpi-build.c | 98 ++- include/hw/acpi/acpi-defs.h | 55

[Qemu-devel] [V7 1/4] hw/i386: Introduce AMD IOMMU

2016-03-13 Thread David Kiarie
Add AMD IOMMU emulaton to Qemu in addition to Intel IOMMU The IOMMU does basic translation, error checking and has a mininal IOTLB implementation Signed-off-by: David Kiarie --- hw/i386/Makefile.objs |1 + hw/i386/amd_iommu.c | 1431

Re: [Qemu-devel] [Patch 1/1] net/socket: Allocating Large sized arrays to heap

2016-03-13 Thread Li Zhijian
Don't get why we need this changes, could you explain more for it? and it seem it's not exactly correct, see below. On 03/12/2016 11:28 AM, Pooja Dhannawat wrote: Signed-off-by: Pooja Dhannawat --- net/socket.c | 6 +++--- 1 file changed, 3 insertions(+), 3

Re: [Qemu-devel] [PATCH v12 2/3] quorum: implement bdrv_add_child() and bdrv_del_child()

2016-03-13 Thread Changlong Xie
On 03/11/2016 08:21 PM, Alberto Garcia wrote: On Thu 10 Mar 2016 03:49:40 AM CET, Changlong Xie wrote: @@ -81,6 +82,8 @@ typedef struct BDRVQuorumState { bool rewrite_corrupted;/* true if the driver must rewrite-on-read corrupted * block if Quorum is

Re: [Qemu-devel] about correctness of IDE emulation

2016-03-13 Thread Fam Zheng
On Sun, 03/13 14:37, Huaicheng Li (coperd) wrote: > Hi all, > > What I’m confused about is that: > > If one I/O is too large and may need several rounds (say 2) of DMA transfers, > it seems the second round transfer begins only after the completion of the > first part, by reading data from

[Qemu-devel] [PATCH] hw/i386/acpi-build: place qword descriptors in bridge _CRS's when needed

2016-03-13 Thread Laszlo Ersek
In build_crs(), the calculation & merging of the ranges already happens in 64-bit, but the entry boundaries are silently truncated to 32-bit in the call to aml_dword_memory(). Use aml_qword_memory() when necessary -- this fixes 64-bit BARs behind PXBs. Cc: Marcel Apfelbaum Cc:

Re: [Qemu-devel] [PULL 16/53] virtio-pci: call pci reset variant when guest requests reset.

2016-03-13 Thread Laszlo Ersek
On 03/14/16 02:36, Laszlo Ersek wrote: > On 03/11/16 16:08, Michael S. Tsirkin wrote: >> From: Gerd Hoffmann >> >> Actually fixes linux not finding virtio 1.0 device virtqueues after >> reboot. Which is new I think, any chance linux kernel virtio code >> became more strict in

Re: [Qemu-devel] Tracking the VM making an IO request

2016-03-13 Thread Fam Zheng
On Sat, 03/12 16:17, Aarian P. Aleahmad wrote: > Thanks for helping me. what should I do in case of using KVM? The said method works exactly the same with or without -enable-kvm. Fam > > On Wed, Feb 10, 2016 at 4:10 PM, Paolo Bonzini wrote: > > > > > > > On 10/02/2016

Re: [Qemu-devel] [PATCH] hw/9pfs: Add CephFS support in VirtFS

2016-03-13 Thread Jevon Qiao
Hi Greg, Thank you very much for reviewing the code, I've revised the code per your comments, will post it later. Meanwhile, please see my answers to your questions below. +} +fs->dir = (DIR *)result; +if (!fs->dir) { +fprintf(stderr, "ceph_opendir return NULL for

Re: [Qemu-devel] [PULL 16/53] virtio-pci: call pci reset variant when guest requests reset.

2016-03-13 Thread Laszlo Ersek
On 03/11/16 16:08, Michael S. Tsirkin wrote: > From: Gerd Hoffmann > > Actually fixes linux not finding virtio 1.0 device virtqueues after > reboot. Which is new I think, any chance linux kernel virtio code > became more strict in 4.3? > > Signed-off-by: Gerd Hoffmann

Re: [Qemu-devel] Reg: GSoc 2016

2016-03-13 Thread Fam Zheng
On Thu, 03/10 15:41, seshu wrote: > Hello sir > My Name is seshagiri rao, > I'm currently a second year undergraduate student of computer > science and engineering at Indian Institute of Technology Madras. > > Of all the organizations I found qemu to be the one I'm really > interested in. I have

Re: [Qemu-devel] [PATCH 1/2] i386: Prepare for interrupt remapping

2016-03-13 Thread Peter Xu
On Fri, Mar 11, 2016 at 08:27:57AM +0100, Jan Kiszka wrote: [...] > >> @@ -282,7 +288,7 @@ static void vtd_generate_interrupt(IntelIOMMUState *s, > >> hwaddr mesg_addr_reg, > >> data = vtd_get_long_raw(s, mesg_data_reg); > >> > >> VTD_DPRINTF(FLOG, "msi: addr 0x%"PRIx64 " data

Re: [Qemu-devel] [PATCH v4 04/26] crypto: add support for anti-forensic split algorithm

2016-03-13 Thread Fam Zheng
On Fri, 03/11 16:55, Daniel P. Berrange wrote: > On Mon, Mar 07, 2016 at 01:51:40PM +0800, Fam Zheng wrote: > > On Mon, 02/29 12:00, Daniel P. Berrange wrote: > > > The LUKS format specifies an anti-forensic split algorithm which > > > is used to artificially expand the size of the key material on

[Qemu-devel] [PATCH v4 2/4] hw/intc: Add (new) ASPEED VIC device model

2016-03-13 Thread Andrew Jeffery
Implement a basic ASPEED VIC device model for the AST2400 SoC[1], with enough functionality to boot an aspeed_defconfig Linux kernel. The model implements the 'new' (revised) register set: While the hardware exposes both the new and legacy register sets, accesses to the model's legacy register set

[Qemu-devel] [PATCH v4 1/4] hw/timer: Add ASPEED timer device model

2016-03-13 Thread Andrew Jeffery
Implement basic ASPEED timer functionality for the AST2400 SoC[1]: Up to 8 timers can independently be configured, enabled, reset and disabled. Some hardware features are not implemented, namely clock value matching and pulse generation, but the implementation is enough to boot the Linux kernel

[Qemu-devel] [PATCH v4 4/4] hw/arm: Add opbmc2400, an AST2400 OpenPOWER BMC machine

2016-03-13 Thread Andrew Jeffery
The new machine, opbmc2400, is a thin layer over the AST2400 ARM926-based SoC[1]. Between the minimal machine and the current SoC implementation there is enough functionality to boot an aspeed_defconfig Linux kernel to userspace. The machine name is a pragmatic choice, as there doesn't appear to

Re: [Qemu-devel] [PATCH] correct comment of MemoryHotplugState

2016-03-13 Thread Cao jin
Hi, Is anyone gonna take this one? On 03/03/2016 09:59 PM, Igor Mammedov wrote: On Thu, 3 Mar 2016 17:24:12 +0800 Cao jin wrote: correct comment and remove an unused macro. commit adcb4ee6 already correct its type Signed-off-by: Cao jin

Re: [Qemu-devel] [PATCH v4 5/5] replay: introduce block devices record/replay

2016-03-13 Thread Pavel Dovgalyuk
> From: Stefan Hajnoczi [mailto:stefa...@redhat.com] > On Thu, Mar 10, 2016 at 02:56:20PM +0300, Pavel Dovgalyuk wrote: > > @@ -135,7 +138,7 @@ void replay_add_event(ReplayAsyncEventKind event_kind, > > > > void replay_bh_schedule_event(QEMUBH *bh) > > { > > -if (replay_mode !=

Re: [Qemu-devel] [PATCH v4 5/5] replay: introduce block devices record/replay

2016-03-13 Thread Pavel Dovgalyuk
> From: Stefan Hajnoczi [mailto:stefa...@redhat.com] > On Thu, Mar 10, 2016 at 02:56:20PM +0300, Pavel Dovgalyuk wrote: > > +static void block_request_create(uint64_t reqid, BlockDriverState *bs, > > + Coroutine *co) > > +{ > > +Request *req = g_new(Request, 1);

[Qemu-devel] [PATCH v4 3/4] hw/arm: Add ASPEED AST2400 SoC model

2016-03-13 Thread Andrew Jeffery
While the ASPEED AST2400 SoC[1] has a broad range of capabilities this implementation is minimal, comprising an ARM926 processor, ASPEED VIC and timer devices, and a 8250 UART. [1] http://www.aspeedtech.com/products.php?fPath=20=376 Signed-off-by: Andrew Jeffery --- Since v3:

[Qemu-devel] [PATCH v4 0/4] Add ASPEED AST2400 SoC and OpenPower BMC machine

2016-03-13 Thread Andrew Jeffery
This patch series models enough of the ASPEED AST2400 ARM9 SoC[0] to boot an aspeed_defconfig Linux kernel[1][2]. Specifically, the series implements the ASPEED timer and VIC devices, integrates them into an AST2400 SoC and exposes it all through a new opbmc2400 machine. The device model patches

Re: [Qemu-devel] [RFC] [tcg] Idea on refactoring target code generation loop (gen_intermediate_code)

2016-03-13 Thread Lluís Vilanova
Peter Maydell writes: > On 10 March 2016 at 05:29, Lluís Vilanova wrote: >> Richard Henderson writes: >>> Alternately... can we broach the subject of C++? Honestly, it >>> seems we work too hard sometimes to re-implement templates and >>> classes in C. >> >> Whooo, I'd

[Qemu-devel] [PATCH] hw/acpi: fix GSI links UID

2016-03-13 Thread Marcel Apfelbaum
According to the ACPI spec, each UID must be unique. Use the irq number as UID for GSI links. Suggested-by: Michael S. Tsirkin Signed-off-by: Marcel Apfelbaum --- Hi, This patch was tested with Windows XP/2003/2012R2/7/10 and Fedora. Thanks, Marcel

Re: [Qemu-devel] Regarding TB retranslation code.

2016-03-13 Thread Alex Bennée
Venkatesh N writes: > This is regarding TB retranslation code. > > [Qemu-devel] [RFC 00/20] Do away with TB retranslation, Richard Henderson <= > > Though i understood the code to avoid the retranslation, i could not > get picture on how "host" or backend registers

Re: [Qemu-devel] [PATCH 1/1] Converted malloc calls to g_malloc and g_new

2016-03-13 Thread Alex Bennée
Mriyam Tamuli writes: > Thanks a lot for the feedback. I will do as you suggested. I have two more > questions, though - > > 1. So after a patch is submitted, there will be a review in sometime by > someone? Is that how I will come to know if my changes are correct? To

Re: [Qemu-devel] [PATCH 1/1] Converted malloc calls to g_malloc and g_new

2016-03-13 Thread Alex Bennée
Mriyam Tamuli writes: > Signed-off-by: Mriyam Tamuli While this is a good change you still need to ensure any corresponding free's are converted to g_free (and g_delete for g_new). > --- > block/iscsi.c | 2 +- > bsd-user/elfload.c | 12

Re: [Qemu-devel] [PATCH 1/1] Converted malloc calls to g_malloc and g_new

2016-03-13 Thread Alex Bennée
Mriyam Tamuli writes: > Can anyone please comment on this? Am I doing anything wrong here? It's best to wait a few days. Most QEMU hackers work 9-5 jobs so activity on the mailing list is fairly light over the weekend. > > On Sat, Mar 12, 2016 at 5:22 PM Mriyam Tamuli