[Qemu-devel] [PATCH v1 2/2] hw/arm: Set the core count for Xilinx's ZynqMP

Set the ARM CPU core count property for the A53's attached to the Xilnx ZynqMP machine. Signed-off-by: Alistair Francis --- hw/arm/xlnx-zynqmp.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index

[Qemu-devel] [PATCH v1 1/2] target/arm: Add a cluster size property

The cortex A53 TRM specifices that bits 24 and 25 of the L2CTLR register specify the number of cores present and not the number of processors. To report this correctly on machines with multiple CPU clusters (ARM's big.LITTLE or Xilinx's ZynqMP) we need to allow the machine to overwrite this value.

[Qemu-devel] [PATCH v1 0/2] Add a property to set the ARM CPU core count

Add an ARM CPU property which allows us to set the ARM CPU core count. Alistair Francis (2): target/arm: Add a cluster size property hw/arm: Set the core count for Xilinx's ZynqMP target/arm/cpu.h | 5 + hw/arm/xlnx-zynqmp.c | 2 ++ target/arm/cpu.c | 1 +

[Qemu-devel] [PATCH] ide: fix invalid TRIM range abortion for macio

commit 947858b0 "ide: abort TRIM operation for invalid range" is incorrect for macio; just ide_dma_error() without doing a callback is not enough for that errorpath. Instead, pass -EINVAL to the callback and handle it there (see related motivation for read/write in 58ac32113). It will however

Re: [Qemu-devel] [PATCH 4/4] virtio-net: add linkspeed and duplex settings to virtio-net

On 03/02/2018 02:14 AM, Jason Wang wrote: > > > On 2018年03月02日 11:46, Jason Baron wrote: >> Although linkspeed and duplex can be set in a linux guest via 'ethtool >> -s', >> this requires custom ethtool commands for virtio-net by default. >> >> Introduce a new feature flag,

Re: [Qemu-devel] [PULL v3 00/30] QAPI patches for 2018-03-01

On 2 March 2018 at 15:31, Eric Blake wrote: > The following changes since commit 2e7b766594e17f786a6b2e5be690bc5b43ce6036: > > Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2018-03-01' into > staging (2018-03-02 12:39:13 +) > > are available in the Git

Re: [Qemu-devel] [PATCH v2 3/5] target/i386: Add support for CPUID_8000_001E for AMD

> -Original Message- > From: Radim Krčmář [mailto:rkrc...@redhat.com] > Sent: Thursday, March 1, 2018 1:57 PM > To: Moger, Babu > Cc: pbonz...@redhat.com; r...@twiddle.net; ehabk...@redhat.com; > mtosa...@redhat.com; qemu-devel@nongnu.org; k...@vger.kernel.org; >

Re: [Qemu-devel] [PATCH v2 2/5] target/i386: Populate AMD Processor Cache Information

> -Original Message- > From: Radim Krčmář [mailto:rkrc...@redhat.com] > Sent: Thursday, March 1, 2018 1:56 PM > To: Moger, Babu > Cc: pbonz...@redhat.com; r...@twiddle.net; ehabk...@redhat.com; > mtosa...@redhat.com; qemu-devel@nongnu.org; k...@vger.kernel.org; >

Re: [Qemu-devel] [PATCH V7 1/4] rules: Move cross compilation auto detection functions to rules.mak

On 28/02/2018 19:02, Wei Huang wrote: > This patch moves the auto detection functions for cross compilation from > roms/Makefile to rules.mak. So the functions can be shared among Makefiles > in QEMU. > > Signed-off-by: Wei Huang > Reviewed-by: Andrew Jones

Re: [Qemu-devel] [PATCH v2 resend] block/mirror: change the semantic of 'force' of block-job-cancel

On 03/02/2018 10:39 AM, Eric Blake wrote: > On 02/26/2018 08:05 PM, Liang Li wrote: >> When doing drive mirror to a low speed shared storage, if there was heavy >> BLK IO write workload in VM after the 'ready' event, drive mirror >> block job >> can't be canceled immediately, it would keep

Re: [Qemu-devel] [Qemu-block] [PATCH] virtio-blk: notify guest directly

On Fri, Mar 02, 2018 at 01:38:52PM +, Stefan Hajnoczi wrote: > On Tue, Dec 19, 2017 at 1:33 PM, sochin.jiang wrote: > > Till now, we've already notify guest as a batch mostly, an > > extra BH won't decrease guest interrupts much, but cause a > > significant

Re: [Qemu-devel] [PATCH v1 1/1] target/arm: Fix the A53 L2CTLR typo

On Fri, Mar 2, 2018 at 2:35 AM, Peter Maydell wrote: > On 2 March 2018 at 10:29, Peter Maydell wrote: >> On 2 March 2018 at 04:34, Alistair Francis wrote: >>> target/arm: Report the number of cores in the cluster >>>

Re: [Qemu-devel] [Qemu-block] [RFC PATCH 0/2] Increase usability of external snapshots

On Tue, Feb 27, 2018 at 12:56:49PM +0100, Richard Palethorpe wrote: > Following on from the discussion about creating savevm/loadvm QMP > equivalents. I decided to take the advice given that we should use external > snapshots. However reverting to a snapshot currently requires QEMU to be >

Re: [Qemu-devel] [PATCH v2 5/5] s390x/cpumodel: Set up CPU model for AP device support

On 03/01/2018 09:12 AM, Pierre Morel wrote: On 28/02/2018 12:40, Cornelia Huck wrote: On Wed, 28 Feb 2018 11:26:30 +0100 David Hildenbrand wrote: Then I request the following change in KVM: If KVM_S390_VM_CPU_FEAT_AP is enabled in KVM, ECA.28 is _always_ set (not just if

Re: [Qemu-devel] [PATCH v3 08/12] hw/pci: introduce pci_device_notify_iommu()

On 01/03/2018 11:33, Liu, Yi L wrote: > +pci_device_notify_iommu(pdev, PCI_NTY_DEV_ADD); > + > pci_setup_sva_ops(pdev, _pci_sva_ops); > > return; > @@ -3134,6 +3136,7 @@ static void vfio_exitfn(PCIDevice *pdev) > { > VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pdev);

Re: [Qemu-devel] [PATCH V7 2/4] tests/migration: Convert the boot block compilation script into Makefile

On 03/02/2018 09:25 AM, Laurent Vivier wrote: > On 28/02/2018 19:02, Wei Huang wrote: >> The x86 boot block header currently is generated with a shell script. >> To better support other CPUs (e.g. aarch64), we convert the script >> into Makefile. This allows us to 1) support cross-compilation

[Qemu-devel] [PATCH 2/2] q35: change default NIC to e1000e

The e1000 NIC is getting old and is not a very good default for a PCIe machine type. Change it to e1000e, which should be supported by a good number of guests. Signed-off-by: Paolo Bonzini --- hw/i386/pc.c | 5 +++-- hw/i386/pc_piix.c| 2 +- hw/i386/pc_q35.c

Re: [Qemu-devel] [PATCH v2 03/15] qio: introduce qio_channel_add_watch_{full|source}

On 02/03/2018 16:44, Daniel P. Berrangé wrote: >> Just a small thing, this is a bit inconsistent with the rest of the >> GSource API, where the g_source_attach is usually left to the caller >> when a function returns GSource *. > The APIs which return a GSource in glib typically don't even set the

[Qemu-devel] [PATCH 1/2] net: add e1000e model to the "simple" -net/-nic options

Signed-off-by: Paolo Bonzini --- hw/pci/pci.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index e006b6ac71..af3c85a46f 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -1822,6 +1822,7 @@ static const char * const pci_nic_models[] = {

[Qemu-devel] [RFC PATCH 0/2] change q35 default NIC to e1000e

The Intel 82574 NIC has better performance and more features than the aging e1000 (aka 82540), for example MSI-X. This patch chooses it by default for the Q35 machine type. Drivers for 82574 were added first to Linux 2.6.27 (2008) and Windows 2008 R2. This does mean that Windows 2008 will not

Re: [Qemu-devel] [PULL 00/39] target-arm queue

061628cb4315cc8182ea36d772f: > > Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging > (2018-03-01 18:46:41 +) > > are available in the Git repository at: > > git://git.linaro.org/people/pmaydell/qemu-arm.git > tags/pull-

Re: [Qemu-devel] [PATCH v2 03/15] qio: introduce qio_channel_add_watch_{full|source}

On Thu, Mar 01, 2018 at 06:13:06PM +0100, Paolo Bonzini wrote: > On 01/03/2018 09:44, Peter Xu wrote: > > + * qio_channel_add_watch_source: > > + * @ioc: the channel object > > + * @condition: the I/O condition to monitor > > + * @func: callback to invoke when the source becomes ready > > + *

Re: [Qemu-devel] [PATCH v2 resend] block/mirror: change the semantic of 'force' of block-job-cancel

On 02/26/2018 08:05 PM, Liang Li wrote: When doing drive mirror to a low speed shared storage, if there was heavy BLK IO write workload in VM after the 'ready' event, drive mirror block job can't be canceled immediately, it would keep running until the heavy BLK IO workload stopped in the VM.

Re: [Qemu-devel] [BUG] I/O thread segfault for QEMU on s390x

On 03/02/2018 01:13 AM, Fam Zheng wrote: On Thu, Mar 1, 2018 at 10:33 PM, Farhan Ali wrote: Hi, I have been noticing some segfaults for QEMU on s390x, and I have been hitting this issue quite reliably (at least once in 10 runs of a test case). The qemu version is

[Qemu-devel] [PULL v3 23/30] qapi: Generate separate .h, .c for each module

From: Markus Armbruster Our qapi-schema.json is composed of modules connected by include directives, but the generated code is monolithic all the same: one qapi-types.h with all the types, one qapi-visit.h with all the visitors, and so forth. These monolithic headers get

[Qemu-devel] [PULL v3 00/30] QAPI patches for 2018-03-01

The following changes since commit 2e7b766594e17f786a6b2e5be690bc5b43ce6036: Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2018-03-01' into staging (2018-03-02 12:39:13 +) are available in the Git repository at: git://repo.or.cz/qemu/ericb.git tags/pull-qapi-2018-03-01-v3

Re: [Qemu-devel] [BUG] I/O thread segfault for QEMU on s390x

On 03/02/2018 04:23 AM, Stefan Hajnoczi wrote: On Thu, Mar 01, 2018 at 09:33:35AM -0500, Farhan Ali wrote: Hi, I have been noticing some segfaults for QEMU on s390x, and I have been hitting this issue quite reliably (at least once in 10 runs of a test case). The qemu version is 2.11.50, and

[Qemu-devel] [PATCH v2 2/2] ipmi: Use proper struct reference for BT vmstate

From: Corey Minyard The vmstate for isa_ipmi_bt was referencing into the bt structure, instead create a bt structure separate and use that. The version 1 of the BT transfer was fairly broken, if a migration occured during an IPMI operation, it is likely the migration would

[Qemu-devel] [PATCH v2 1/2] ipmi: Use proper struct reference for KCS vmstate

From: Corey Minyard The vmstate for isa_ipmi_kcs was referencing into the kcs structure, instead create a kcs structure separate and use that. There were also some issues in the state transfer. The inlen field was not being transferred, so if a transaction was in process

[Qemu-devel] [PATCH v2 0/2] ipmi: Fix vmstate transfer

I apologize for the resend, I left the list off the previous post. This is unchanged since the previous post, two weeks ago. I received no comments, so I guess it's ok. It's fairly broken now, so I would like this fixed. Changes from v1: * Validate the data values in pre_load functions. *

Re: [Qemu-devel] [PATCH V7 2/4] tests/migration: Convert the boot block compilation script into Makefile

On 28/02/2018 19:02, Wei Huang wrote: > The x86 boot block header currently is generated with a shell script. > To better support other CPUs (e.g. aarch64), we convert the script > into Makefile. This allows us to 1) support cross-compilation easily, > and 2) avoid creating a script file for every

Re: [Qemu-devel] [PATCH] use g_path_get_basename instead of basename

On 03/01/2018 10:20 AM, Alex Williamson wrote: On Thu, 1 Mar 2018 10:08:06 +0300 Julia Suvorova via Qemu-devel wrote: basename(3) and dirname(3) modify their argument and may return pointers to statically allocated memory which may be overwritten by subsequent calls.

Re: [Qemu-devel] [PATCH 0/8] WHPX updates based on the 17095 insider sdk.

On 26/02/2018 18:13, Justin Terry (VM) wrote: > This change set includes fixes for two breaking changes that were introduced > in the Windows Insider SDK 17095. First, the casing of the headers/libs > changed > such that a direct reference out of Windows Kits will fail during compile on > case

Re: [Qemu-devel] [PATCH v3 03/12] hw/core: introduce IOMMUSVAContext for virt-SVA

On 01/03/2018 11:33, Liu, Yi L wrote: > +void iommu_sva_notifier_unregister(IOMMUSVAContext *sva_ctx, > + IOMMUSVANotifier *notifier) > +{ > +IOMMUSVANotifier *cur, *next; > + > +QLIST_FOREACH_SAFE(cur, _ctx->sva_notifiers, node, next) { > +if (cur

Re: [Qemu-devel] [PATCH v3 08/12] hw/pci: introduce pci_device_notify_iommu()

On 01/03/2018 11:33, Liu, Yi L wrote: > This patch adds pci_device_notify_iommu() for notify virtual IOMMU > emulator when assigned device is added. And adds a new notify_func > in PCIBus. vIOMMU emulator provides the instance of this notify_func. > > Reason: > When virtual IOMMU is exposed to

Re: [Qemu-devel] [PATCH v3 05/12] hw/pci: introduce PCISVAOps to PCIDevice

On 01/03/2018 11:33, Liu, Yi L wrote: > +void pci_setup_sva_ops(PCIDevice *dev, PCISVAOps *ops) > +{ > +if (dev) { > +dev->sva_ops = ops; > +} > +return; > +} > + Better: { assert(ops && !dev->sva_ops); dev->sva_ops = ops; }

Re: [Qemu-devel] [PATCH v3 09/12] intel_iommu: record assigned devices in a list

On 01/03/2018 11:33, Liu, Yi L wrote: > > +struct IntelIOMMUAssignedDeviceNode { > +VTDAddressSpace *vtd_as; > +QLIST_ENTRY(IntelIOMMUAssignedDeviceNode) next; > +}; > + This QLIST_ENTRY can also be placed directly in VTDAddressSpace (e.g. next_assigned_dev), so that the notify function

Re: [Qemu-devel] [PATCH 3/9] nbd: BLOCK_STATUS for standard get_block_status function: server part

16.02.2018 16:21, Eric Blake wrote: On 02/15/2018 07:51 AM, Vladimir Sementsov-Ogievskiy wrote: Minimal realization: only one extent in server answer is supported. Signed-off-by: Vladimir Sementsov-Ogievskiy --- [...] +    meta = _meta; +    } + +   

[Qemu-devel] [PATCH] sparc: fix leon3 casa instruction when MMU is disabled

From: KONRAD Frederic Since the commit af7a06bac7d3abb2da48ef3277d2a415772d2ae8: `casa [..](10), .., ..` (and probably others alternate space instructions) triggers a data access exception when the MMU is disabled. When we enter get_asi(...) dc->mem_idx is set to

Re: [Qemu-devel] [PATCH v3 01/12] memory: rename existing iommu notifier to be iommu mr notifier

On 01/03/2018 11:33, Liu, Yi L wrote: > From: Peter Xu > > IOMMU notifiers before are mostly used for [dev-]IOTLB stuffs. It is not > suitable for other kind of notifiers (one example would be the future > virt-svm support). Considering that current notifiers are targeted for

Re: [Qemu-devel] [PATCH v4 1/2] tpm: extend TPM emulator with state migration support

On 03/02/2018 04:26 AM, Marc-André Lureau wrote: Hi Stefan On Thu, Mar 1, 2018 at 8:59 PM, Stefan Berger wrote: Extend the TPM emulator backend device with state migration support. The external TPM emulator 'swtpm' provides a protocol over its control channel to

Re: [Qemu-devel] [PATCH v3 11/12] intel_iommu: add framework for PASID AddressSpace management

On 01/03/2018 11:33, Liu, Yi L wrote: > +struct VTDDeviceNode { > +PCIBus *bus; > +uint8_t devfn; > +QLIST_ENTRY(VTDDeviceNode) next; > +}; Do you really need VTDDeviceNode? I think can you simply put the QLIST_ENTRY in VTDAddressSpace (named e.g. next_by_pasid), since

Re: [Qemu-devel] [PATCH v3 11/12] intel_iommu: add framework for PASID AddressSpace management

On 01/03/2018 11:33, Liu, Yi L wrote: > This patch introduces a framework to manage PASID tagged AddressSpace > in Intel vIOMMU emulator. PASID tagged AddressSpace is an address sapce > which is an abstract of guest process address space in Qemu. The > management framework is as below: > >

Re: [Qemu-devel] [PATCH v3 12/12] intel_iommu: bind device to PASID tagged AddressSpace

On 01/03/2018 11:33, Liu, Yi L wrote: > +IntelPASIDNode *node; > +char name[128]; > + > +QLIST_FOREACH(node, &(s->pasid_as_list), next) { > +vtd_pasid_as = node->pasid_as; > +if (pasid == vtd_pasid_as->sva_ctx.pasid) { > +return vtd_pasid_as; > +} >

Re: [Qemu-devel] [PATCH V7 1/4] rules: Move cross compilation auto detection functions to rules.mak

On 28/02/2018 19:02, Wei Huang wrote: > This patch moves the auto detection functions for cross compilation from > roms/Makefile to rules.mak. So the functions can be shared among Makefiles > in QEMU. > > Signed-off-by: Wei Huang > Reviewed-by: Andrew Jones

Re: [Qemu-devel] [PULL v2 00/30] QAPI patches for 2018-03-01

On 03/02/2018 08:34 AM, Peter Maydell wrote: On 2 March 2018 at 14:05, Eric Blake wrote: On 03/02/2018 06:38 AM, Peter Maydell wrote: This produces a huge pile of warnings from my OSX toolchain. When running ar on libqemuutil.a: AR libqemuutil.a

Re: [Qemu-devel] [edk2] [PATCH 1/7] SecurityPkg/Tcg2Pei: drop Tcg2PhysicalPresenceLib dependency

On 02/24/18 01:09, Yao, Jiewen wrote: > Reviewed-by: jiewen@intel.com Given that Jiewen co-maintains SecurityPkg as of commit 3db2823f1e27 ("Maintainers.txt: Add Jiewen to be co-maintainer of SecurityPkg.", 2018-03-02), I pushed this patch in isolation: commit a39e72267034. However,

Re: [Qemu-devel] [PULL v2 00/30] QAPI patches for 2018-03-01

On 2 March 2018 at 14:05, Eric Blake wrote: > On 03/02/2018 06:38 AM, Peter Maydell wrote: >> This produces a huge pile of warnings from my OSX toolchain. >> >> When running ar on libqemuutil.a: >>AR libqemuutil.a >> >>

Re: [Qemu-devel] [PATCH v8 23/23] RISC-V Build Infrastructure

On 03/02/2018 07:51 AM, Michael Clark wrote: This adds RISC-V into the build system enabling the following targets: - riscv32-softmmu - riscv64-softmmu - riscv32-linux-user - riscv64-linux-user This adds defaults configs for RISC-V, enables the build for the RISC-V CPU core, hardware, and

Re: [Qemu-devel] [PULL 00/24] ppc-for-2.12 queue 20180302

> > are available in the Git repository at: > > git://github.com/dgibson/qemu.git tags/ppc-for-2.12-20180302 > > for you to fetch changes up to 57ae75b2e401f1d04f37a8cd26212eb3134c51a6: > > hw/ppc/spapr,e500: Use new property "stdout-path&

Re: [Qemu-devel] [PATCH] iotests: Mark all tests executable

On Fri, Mar 2, 2018 at 9:49 PM, Eric Blake wrote: > The majority of our iotests have the executable bit set; fix the > few outliers for consistency. > > Signed-off-by: Eric Blake > --- > > Let's see if patchew groks this one :) You've caught it! Patchew

Re: [Qemu-devel] [PULL] RISC-V QEMU Port Submission v8

On 2 March 2018 at 13:55, Michael Clark wrote: > -BEGIN PGP SIGNED MESSAGE- > Hash: SHA1 > > The following changes since commit 427cbc7e4136a061628cb4315cc8182ea36d772f: > > Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging > (2018-03-01

Re: [Qemu-devel] [PATCH v8 00/23] RISC-V QEMU Port Submission

Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 1519998711-73430-1-git-send-email-...@sifive.com Subject: [Qemu-devel] [PATCH v8 00/23] RISC-V QEMU Port Submission === TEST SCRIPT BEGIN === #!/bin/bash BASE=base n=1

Re: [Qemu-devel] [PATCH 10/10] linux-user: init_guest_space: Try to make ARM space+commpage continuous

On 28 December 2017 at 18:08, Luke Shumaker wrote: > From: Luke Shumaker > > At a fixed distance after the usable memory that init_guest_space maps, for > 32-bit ARM targets we also need to map a commpage. The normal > init_guest_space logic doesn't

Re: [Qemu-devel] [PATCH qemu v3 1/2] qmp: Merge ObjectPropertyInfo and DevicePropertyInfo

On 03/02/2018 07:42 AM, Paolo Bonzini wrote: On 02/03/2018 14:37, Eric Blake wrote: index 0262b9f..87327e5 100644 --- a/qapi-schema.json +++ b/qapi-schema.json @@ -1266,10 +1266,12 @@   #    3) A link type in the form 'link' where subtype is a qdev   #   device type name.  Link

Re: [Qemu-devel] [PATCH] input: free InputEvent when it can't be inserted into a full kdb queue

On 2017/12/06 17:46, Marc-André Lureau wrote: Hi On Wed, Dec 6, 2017 at 3:29 AM, 田殿臣 wrote: From e8c03f405c2112428e79bb82064c7b7743d0cc86 Mon Sep 17 00:00:00 2001 From: Tian Dianchen Date: Tue, 5 Dec 2017 14:03:53 +0800 Subject: [PATCH]

[Qemu-devel] [PULL] RISC-V QEMU Port Submission v8

-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 The following changes since commit 427cbc7e4136a061628cb4315cc8182ea36d772f: Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging (2018-03-01 18:46:41 +) are available in the git repository at:

[Qemu-devel] [PATCH v8 20/23] SiFive RISC-V PRCI Block

Simple model of the PRCI (Power, Reset, Clock, Interrupt) to emulate register reads made by the SDK BSP. Acked-by: Richard Henderson Signed-off-by: Palmer Dabbelt Signed-off-by: Michael Clark --- hw/riscv/sifive_prci.c

[Qemu-devel] [PATCH v8 23/23] RISC-V Build Infrastructure

This adds RISC-V into the build system enabling the following targets: - riscv32-softmmu - riscv64-softmmu - riscv32-linux-user - riscv64-linux-user This adds defaults configs for RISC-V, enables the build for the RISC-V CPU core, hardware, and Linux User Emulation. The 'qemu-binfmt-conf.sh'

[Qemu-devel] [PATCH v8 22/23] SiFive Freedom U Series RISC-V Machine

This provides a RISC-V Board compatible with the the SiFive Freedom U SDK. The following machine is implemented: - 'sifive_u'; CLINT, PLIC, UART, device-tree Acked-by: Richard Henderson Signed-off-by: Sagar Karandikar Signed-off-by:

[Qemu-devel] [PATCH v8 19/23] SiFive RISC-V UART Device

QEMU model of the UART on the SiFive E300 and U500 series SOCs. BBL supports the SiFive UART for early console access via the SBI (Supervisor Binary Interface) and the linux kernel SBI console. The SiFive UART implements the pre qom legacy interface consistent with the 16550a UART in

[Qemu-devel] [PATCH v8 16/23] RISC-V Spike Machines

RISC-V machines compatble with Spike aka riscv-isa-sim, the RISC-V Instruction Set Simulator. The following machines are implemented: - 'spike_v1.9.1'; HTIF console, config-string, Privileged ISA Version 1.9.1 - 'spike_v1.10'; HTIF console, device-tree, Privileged ISA Version 1.10 Acked-by:

[Qemu-devel] [PATCH v8 08/23] RISC-V TCG Code Generation

TCG code generation for the RV32IMAFDC and RV64IMAFDC. The QEMU RISC-V code generator has complete coverage for the Base ISA v2.2, Privileged ISA v1.9.1 and Privileged ISA v1.10: - RISC-V Instruction Set Manual Volume I: User-Level ISA Version 2.2 - RISC-V Instruction Set Manual Volume II:

[Qemu-devel] [PATCH v8 21/23] SiFive Freedom E Series RISC-V Machine

This provides a RISC-V Board compatible with the the SiFive Freedom E SDK. The following machine is implemented: - 'sifive_e'; CLINT, PLIC, UART, AON, GPIO, QSPI, PWM Acked-by: Richard Henderson Signed-off-by: Sagar Karandikar

[Qemu-devel] [PATCH v8 17/23] SiFive RISC-V Test Finisher

Test finisher memory mapped device used to exit simulation. Acked-by: Richard Henderson Signed-off-by: Palmer Dabbelt Signed-off-by: Michael Clark --- hw/riscv/sifive_test.c | 93

Re: [Qemu-devel] [PULL v2 00/30] QAPI patches for 2018-03-01

On 03/02/2018 06:38 AM, Peter Maydell wrote: On 2 March 2018 at 01:29, Eric Blake wrote: The following changes since commit 0dc8ae5e8e693737dfe65ba02d0c6eccb58a9c67: Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20180301-v2' into staging (2018-03-01 17:08:16

[Qemu-devel] [PATCH v8 15/23] SiFive RISC-V PLIC Block

The PLIC (Platform Level Interrupt Controller) device provides a parameterizable interrupt controller based on SiFive's PLIC specification. Acked-by: Richard Henderson Signed-off-by: Stefan O'Rear Signed-off-by: Palmer Dabbelt

[Qemu-devel] [PATCH v8 09/23] RISC-V Physical Memory Protection

Implements the physical memory protection extension as specified in Privileged ISA Version 1.10. PMP (Physical Memory Protection) is as-of-yet unused and needs testing. The SiFive verification team have PMP test cases that will be run. Nothing currently depends on PMP support. It would be

[Qemu-devel] [PATCH v8 18/23] RISC-V VirtIO Machine

RISC-V machine with device-tree, 16550a UART and VirtIO MMIO. The following machine is implemented: - 'virt'; CLINT, PLIC, 16550A UART, VirtIO MMIO, device-tree Acked-by: Richard Henderson Signed-off-by: Palmer Dabbelt Signed-off-by: Michael

[Qemu-devel] [PATCH v8 13/23] RISC-V HART Array

Holds the state of a heterogenous array of RISC-V hardware threads. Reviewed-by: Richard Henderson Signed-off-by: Sagar Karandikar Signed-off-by: Michael Clark --- hw/riscv/riscv_hart.c | 89

[Qemu-devel] [PATCH v8 14/23] SiFive RISC-V CLINT Block

The CLINT (Core Local Interruptor) device provides real-time clock, timer and interprocessor interrupts based on SiFive's CLINT specification. Acked-by: Richard Henderson Signed-off-by: Sagar Karandikar Signed-off-by: Stefan O'Rear

[Qemu-devel] [PATCH v8 12/23] RISC-V HTIF Console

HTIF (Host Target Interface) provides console emulation for QEMU. HTIF allows identical copies of BBL (Berkeley Boot Loader) and linux to run on both Spike and QEMU. BBL provides HTIF console access via the SBI (Supervisor Binary Interface) and the linux kernel SBI console. The HTIT chardev

[Qemu-devel] [PATCH v8 04/23] RISC-V Disassembler

The RISC-V disassembler has no dependencies outside of the 'disas' directory so it can be applied independently. The majority of the disassembler is machine-generated from instruction set metadata: - https://github.com/michaeljclark/riscv-meta Expected checkpatch errors for consistency and

[Qemu-devel] [PATCH v8 10/23] RISC-V Linux User Emulation

Implementation of linux user emulation for RISC-V. Reviewed-by: Richard Henderson Signed-off-by: Sagar Karandikar Signed-off-by: Michael Clark --- linux-user/elfload.c | 22 +++ linux-user/main.c

[Qemu-devel] [PATCH v8 11/23] Add symbol table callback interface to load_elf

The RISC-V HTIF (Host Target Interface) console device requires access to the symbol table to locate the 'tohost' and 'fromhost' symbols. Reviewed-by: Richard Henderson Signed-off-by: Michael Clark --- hw/core/loader.c | 18 --

[Qemu-devel] [PATCH v8 07/23] RISC-V GDB Stub

GDB Register read and write routines. Reviewed-by: Richard Henderson Signed-off-by: Sagar Karandikar Signed-off-by: Michael Clark --- target/riscv/gdbstub.c | 62 ++ 1 file

[Qemu-devel] [PATCH v8 05/23] RISC-V CPU Helpers

Privileged control and status register helpers and page fault handling. Reviewed-by: Richard Henderson Signed-off-by: Sagar Karandikar Signed-off-by: Michael Clark --- target/riscv/helper.c| 503

[Qemu-devel] [PATCH v8 03/23] RISC-V CPU Core Definition

Add CPU state header, CPU definitions and initialization routines Reviewed-by: Richard Henderson Signed-off-by: Sagar Karandikar Signed-off-by: Michael Clark --- target/riscv/cpu.c | 432

[Qemu-devel] [PATCH v8 01/23] RISC-V Maintainers

Add Michael Clark, Palmer Dabbelt, Sagar Karandikar and Bastian Koppelmann as RISC-V Maintainers. Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Signed-off-by: Bastian Koppelmann

[Qemu-devel] [PATCH v8 06/23] RISC-V FPU Support

Helper routines for FPU instructions and NaN definitions. Reviewed-by: Richard Henderson Signed-off-by: Sagar Karandikar Signed-off-by: Michael Clark --- fpu/softfloat-specialize.h | 7 +- target/riscv/fpu_helper.c |

[Qemu-devel] [PATCH v8 02/23] RISC-V ELF Machine Definition

Define RISC-V ELF machine EM_RISCV 243 Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Signed-off-by: Sagar Karandikar Signed-off-by: Michael Clark --- include/elf.h | 2 ++ 1

[Qemu-devel] [PATCH v8 00/23] RISC-V QEMU Port Submission

QEMU RISC-V Emulation Support (RV64GC, RV32GC) This release renames the SiFive machines to sifive_e and sifive_u to represent the SiFive Everywhere and SiFive Unleashed platforms. SiFive has configurable soft-core IP, so it is intended that these machines will be extended to enable a variety of

Re: [Qemu-devel] [PULL 0/4] nbd patches for 2018-03-01

On 1 March 2018 at 21:02, Eric Blake wrote: > The following changes since commit 0dc8ae5e8e693737dfe65ba02d0c6eccb58a9c67: > > Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20180301-v2' into > staging (2018-03-01 17:08:16 +) > > are available in the Git

[Qemu-devel] [PATCH] iotests: Mark all tests executable

The majority of our iotests have the executable bit set; fix the few outliers for consistency. Signed-off-by: Eric Blake --- Let's see if patchew groks this one :) tests/qemu-iotests/096 | 0 tests/qemu-iotests/129 | 0 tests/qemu-iotests/132 | 0 tests/qemu-iotests/136 | 0

Re: [Qemu-devel] [PATCH qemu v3 1/2] qmp: Merge ObjectPropertyInfo and DevicePropertyInfo

On 02/03/2018 14:37, Eric Blake wrote: >> >> index 0262b9f..87327e5 100644 >> --- a/qapi-schema.json >> +++ b/qapi-schema.json >> @@ -1266,10 +1266,12 @@ >>   #    3) A link type in the form 'link' where subtype is >> a qdev >>   #   device type name.  Link properties form the device

Re: [Qemu-devel] [Qemu-block] [PATCH] virtio-blk: notify guest directly

On Tue, Dec 19, 2017 at 1:33 PM, sochin.jiang wrote: > Till now, we've already notify guest as a batch mostly, an > extra BH won't decrease guest interrupts much, but cause a > significant notification loss. Generally, we could have 15% > or so performance lost in

Re: [Qemu-devel] [PATCH qemu v3 1/2] qmp: Merge ObjectPropertyInfo and DevicePropertyInfo

On 03/01/2018 07:09 AM, Alexey Kardashevskiy wrote: ObjectPropertyInfo is more generic and only missing @description. This adds a description to ObjectPropertyInfo and removes DevicePropertyInfo so the resulting ObjectPropertyInfo can be used elsewhere. Signed-off-by: Alexey Kardashevskiy

Re: [Qemu-devel] [edk2] [PATCH 6/7] ovmf: link with Tcg2ConfigDxe module

On 03/02/2018 06:12 AM, Laszlo Ersek wrote: On 03/01/18 17:59, Stefan Berger wrote: On 02/26/2018 04:58 AM, Laszlo Ersek wrote: On 02/23/18 14:23, marcandre.lur...@redhat.com wrote: From: Marc-André Lureau The module allows to tweak and interact with the TPM.

Re: [Qemu-devel] [patches] Re: [PULL] RISC-V QEMU Port Submission

On Thu, Mar 1, 2018 at 11:26 AM, Emilio G. Cota wrote: > On Wed, Feb 28, 2018 at 13:09:11 +1300, Michael Clark wrote: > > BTW somewhat coincidentally, the binary translator I wrote; RV8, which is > > practicaly twice as fast as QEMU only supports privileged ISA v1.9.1 and > I > >

Re: [Qemu-devel] [PATCH 09/10] linux-user: init_guest_space: Add a comment about search strategy

On 28 December 2017 at 18:08, Luke Shumaker wrote: > From: Luke Shumaker > > Signed-off-by: Luke Shumaker > --- > linux-user/elfload.c | 4 > 1 file changed, 4 insertions(+) > > diff --git a/linux-user/elfload.c

Re: [Qemu-devel] [PATCH 07/10] linux-user: init_guest_space: Clean up control flow a bit

On 28 December 2017 at 18:08, Luke Shumaker wrote: > From: Luke Shumaker > > Instead of doing > > if (check1) { > if (check2) { >success; > } > } > > retry; > > Do a clearer > > if

Re: [Qemu-devel] [PATCH 08/10] linux-user: init_guest_space: Don't try to align if we'll reject it

On 28 December 2017 at 18:08, Luke Shumaker wrote: > From: Luke Shumaker > > If the ensure-alignment code gets triggered, then the > "if (host_start && real_start != current_start)" check will always trigger, > so save 2 syscalls and put that check

Re: [Qemu-devel] [PATCH 06/10] linux-user: init_guest_commpage: Add a comment about size check

On 28 December 2017 at 18:08, Luke Shumaker wrote: > From: Luke Shumaker > > Signed-off-by: Luke Shumaker > --- > linux-user/elfload.c | 5 + > 1 file changed, 5 insertions(+) > > diff --git a/linux-user/elfload.c

Re: [Qemu-devel] [PATCH v4 1/2] tpm: extend TPM emulator with state migration support

On 03/02/2018 04:26 AM, Marc-André Lureau wrote: Hi Stefan On Thu, Mar 1, 2018 at 8:59 PM, Stefan Berger wrote: Extend the TPM emulator backend device with state migration support. The external TPM emulator 'swtpm' provides a protocol over its control channel to

Re: [Qemu-devel] [PATCH 05/10] linux-user: init_guest_space: Clarify page alignment logic

On 28 December 2017 at 18:08, Luke Shumaker wrote: > From: Luke Shumaker > > There are 3 parts to this change: > - Add a comment showing the relative sizes and positions of the blocks of >memory > - introduce and use new aligned_{start,size}

Re: [Qemu-devel] [PATCH 04/10] linux-user: init_guest_space: Correctly handle guest_start in commpage initialization

On 28 December 2017 at 18:08, Luke Shumaker wrote: > From: Luke Shumaker > > init_guest_commpage needs to check if the mapped space, which ends at > real_start+real_size overlaps with where it needs to put the commpage, > which is (assuming sane

Re: [Qemu-devel] [PATCH 02/10] linux-user: Rename validate_guest_space => init_guest_commpage

On 28 December 2017 at 18:08, Luke Shumaker wrote: > From: Luke Shumaker > > init_guest_commpage is a much more honest description of what the function > does. validate_guest_space not only suggests that the function has no > side-effects, but also

Re: [Qemu-devel] [PATCH 01/10] linux-user: Use #if to only call validate_guest_space for 32-bit ARM target

On 28 December 2017 at 18:08, Luke Shumaker wrote: > From: Luke Shumaker > > Instead of defining a bogus validate_guest_space that always returns 1 on > targets other than 32-bit ARM, use #if blocks to only call it on 32-bit ARM > targets. This makes

[Qemu-devel] ping Re: [PATCH v10 00/12] Dirty bitmaps postcopy migration

ping 07.02.2018 18:58, Vladimir Sementsov-Ogievskiy wrote: Hi all! There is a new version of dirty bitmap postcopy migration series. Now it is based on Max's block tree: https://github.com/XanClic/qemu/commits/block, where it needs only one patch: "block: maintain persistent disabled

Re: [Qemu-devel] [PATCH 1/9] nbd/server: add nbd_opt_invalid helper

16.02.2018 01:01, Eric Blake wrote: On 02/15/2018 07:51 AM, Vladimir Sementsov-Ogievskiy wrote: NBD_REP_ERR_INVALID is often parameter to nbd_opt_drop and it would be used more in following patches. So, let's add a helper. Signed-off-by: Vladimir Sementsov-Ogievskiy

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