[Qemu-devel] [PATCH 2/2] iotests: add 208 nbd-server + blockdev-snapshot-sync test case

This test case adds an NBD server export and then invokes blockdev-snapshot-sync, which changes the BlockDriverState node that the NBD server's BlockBackend points to. This is an interesting scenario to test and exercises the code path fixed by the previous commit. Signed-off-by: Stefan Hajnoczi

[Qemu-devel] [PATCH v1 16/22] RISC-V: Remove EM_RISCV ELF_MACHINE indirection

Pointless indirection. Other ports use EM_ constants directly. Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- hw/riscv/sifive_e.c | 2 +- hw/riscv/sifive_u.c | 2 +- hw/riscv/spike.c| 2 +- hw/riscv/virt.c | 2 +- target/riscv/cpu.h

[Qemu-devel] [PATCH v1 14/22] RISC-V: Make virt header comment title consistent

Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- include/hw/riscv/virt.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index d22f184..dcb697f 100644 ---

[Qemu-devel] [PATCH v1 12/22] RISC-V: Update E order and I extension order

Section 22.8 Subset Naming Convention of the RISC-V ISA Specification defines the canonical order for extensions in the ISA string. It is silent on the position of the E extension however E is a substitute for I so it must come early in the extension list order. A comment is added to state E and I

[Qemu-devel] [PATCH 0/2] block: fix nbd-server-stop crash after blockdev-snapshot-sync

The blockdev-snapshot-sync command uses bdrv_append() to update all parents to point at the external snapshot node. This breaks BlockBackend's blk_add/remove_aio_context_notifier(), which doesn't expect a BDS change. Patch 1 fixes this by tracking AioContext notifiers in BlockBackend. See the

[Qemu-devel] [PATCH v1 12/22] RISC-V: Update E order and I extension order

Section 22.8 Subset Naming Convention of the RISC-V ISA Specification defines the canonical order for extensions in the ISA string. It is silent on the position of the E extension however E is a substitute for I so it must come early in the extension list order. A comment is added to state E and I

[Qemu-devel] [PATCH v1 11/22] RISC-V: Improve page table walker spec compliance

- Inline PTE_TABLE check for better readability - Improve readibility of User page U mode and SUM test - Disallow non U mode from fetching from User pages - Add reserved PTE flag check: W or W|X - Add misaligned PPN check - Change access checks from ternary operator to if statements - Improves

[Qemu-devel] [PATCH v1 09/22] RISC-V: Include hexidecimal instruction in

This was added to help debug issues using -d in_asm. It is useful to see the instruction bytes, as one can detect if one is trying to execute ASCII or device-tree magic. Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- disas/riscv.c | 39

[Qemu-devel] [PATCH v1 20/22] RISC-V: vectored traps are optional

Vectored traps for asynchrounous interrupts are optional. The mtvec/stvec mode field is WARL and hence does not trap if an illegal value is written. Illegal values are ignored. Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt ---

[Qemu-devel] [PATCH v1 06/22] RISC-V: Mark ROM read-only after copying in code

The sifive_u machine already marks its ROM readonly. This fixes the remaining boards. Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- hw/riscv/sifive_u.c | 9 + hw/riscv/spike.c | 18 ++ hw/riscv/virt.c

[Qemu-devel] [PATCH v1 03/22] RISC-V: Make virt board description match spike

This makes 'qemu-system-riscv64 -machine help' output more tidy and consistent. Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- hw/riscv/virt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/riscv/virt.c

[Qemu-devel] [PATCH v1 13/22] RISC-V: Make spike and virt header guards more

Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- include/hw/riscv/spike.h | 4 ++-- include/hw/riscv/virt.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/include/hw/riscv/spike.h b/include/hw/riscv/spike.h index

[Qemu-devel] [PATCH v1 04/22] RISC-V: Use ROM base address and size from memmap

Another case of replaceing hard coded constants, this time referring to the definition in the virt machine's memmap. Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- hw/riscv/virt.c | 4 ++-- include/hw/riscv/virt.h | 2 -- 2 files

[Qemu-devel] [PATCH v1 11/22] RISC-V: Improve page table walker spec compliance

- Inline PTE_TABLE check for better readability - Improve readibility of User page U mode and SUM test - Disallow non U mode from fetching from User pages - Add reserved PTE flag check: W or W|X - Add misaligned PPN check - Change access checks from ternary operator to if statements - Improves

[Qemu-devel] [PATCH v1 02/22] RISC-V: Replace hardcoded constants with enum values

The RISC-V device-tree code has a number of hard-coded constants and this change moves them into header enums. Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- hw/riscv/sifive_clint.c | 9 +++-- hw/riscv/sifive_u.c | 6

[Qemu-devel] [PATCH v1 02/22] RISC-V: Replace hardcoded constants with enum values

The RISC-V device-tree code has a number of hard-coded constants and this change moves them into header enums. Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- hw/riscv/sifive_clint.c | 9 +++-- hw/riscv/sifive_u.c | 6

[Qemu-devel] [PATCH v1 10/22] RISC-V: Hold rcu_read_lock when accessing memory

>From reading other code that accesses memory regions directly, it appears that the rcu_read_lock needs to be held. Note: the original code for accessing RAM directly was added because there is no other way to use atomic_cmpxchg easily. Signed-off-by: Michael Clark

[Qemu-devel] [PATCH v1 01/22] RISC-V: Make virt create_fdt interface consistent

create_fdt sets the fdt variable on RISCVVirtState and this is used to access the fdt. This reverts a change introduced in https://github.com/riscv/riscv-qemu/pull/109 which introduced a redundant return value, overlooking the RISCVVirtState structure member that made create_fdt inconsistent with

[Qemu-devel] [PATCH v1 15/22] RISC-V: Use memory_region_is_ram in atomic pte

After reading cpu_physical_memory_write and friends, it seems that memory_region_is_ram is a more appropriate interface, and matches the intent of the code that is calling it. Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt ---

[Qemu-devel] [PATCH v1 08/22] RISC-V: Make sure the emulated rom has space for

Remove a potential buffer overflow (not seen in practice). Perhaps cpu_physical_memory_write already has bound checks. This change however makes space for the maximum device tree size and adds an explicit bounds check and error message. It doesn't trigger, but it may help in the future if the

[Qemu-devel] [PATCH v1 14/22] RISC-V: Make virt header comment title consistent

Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- include/hw/riscv/virt.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index d22f184..dcb697f 100644 ---

[Qemu-devel] [PATCH 17/19] uninorth: create new uninorth device

Commit 4e46dcdbd3 "PPC: Newworld: Add uninorth token register" added a TODO which was to convert the uninorth registers hack to a proper device. Move these registers to a new uninorth device, removing the old hacks from mac_newworld.c. Signed-off-by: Mark Cave-Ayland

[Qemu-devel] [PATCH 1/2] block: let blk_add/remove_aio_context_notifier() tolerate BDS changes

Commit 2019ba0a0197 ("block: Add AioContextNotifier functions to BB") added blk_add/remove_aio_context_notifier() and implemented them by passing through the bdrv_*() equivalent. This doesn't work across bdrv_append(), which detaches child->bs and re-attaches it to a new BlockDriverState. When

[Qemu-devel] [PATCH v1 06/22] RISC-V: Mark ROM read-only after copying in code and

The sifive_u machine already marks its ROM readonly. This fixes the remaining boards. Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- hw/riscv/sifive_u.c | 9 + hw/riscv/spike.c | 18 ++ hw/riscv/virt.c

[Qemu-devel] [PATCH v1 07/22] RISC-V: Remove unused class definitions from

Removes a whole lot of unnecessary boilerplate code. Machines don't need to be objects. The expansion of the SOC object model for the RISC-V machines will happen in the future as SiFive plans to add their FE310 and FU540 SOCs to QEMU. However, it seems that this present boilerplate is complete

[Qemu-devel] [PATCH v1 05/22] RISC-V: Remove redundant identity_translate from

When load_elf is called with NULL as an argument to the address translate callback, it does an identity translation. This commit removes the redundant identity_translate callback. Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt ---

[Qemu-devel] [PATCH v1 19/22] RISC-V: riscv-qemu port supports sv39 and sv48

Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- target/riscv/cpu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 7c4482b..f47fc9c 100644 --- a/target/riscv/cpu.h +++

[Qemu-devel] [PATCH 14/19] uninorth: use object link to pass OpenPIC object to uninorth

Now that the OpenPIC is wired up via the board, we can now remove our temporary PIC qdev pointer property and replace it with an object link instead. Signed-off-by: Mark Cave-Ayland --- hw/pci-host/uninorth.c | 73 +-

[Qemu-devel] [PATCH v1 04/22] RISC-V: Use ROM base address and size from memory

Another case of replaceing hard coded constants, this time referring to the definition in the virt machine's memmap. Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- hw/riscv/virt.c | 4 ++-- include/hw/riscv/virt.h | 2 -- 2 files

[Qemu-devel] [PATCH v1 18/22] RISC-V: Remove braces from satp case statement with

Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- target/riscv/op_helper.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index dd3e417..f79716a 100644 ---

[Qemu-devel] [PATCH 19/19] mac_newworld: move wiring of macio IRQs to macio_newworld_realize()

Since the macio device has a link to the PIC device, we can now wire up the IRQs directly via qdev GPIOs rather than having to use an intermediate array. Signed-off-by: Mark Cave-Ayland --- hw/misc/macio/macio.c | 37 ++---

[Qemu-devel] [PATCH v1 00/22] Spec conformance bug fixes and cleanups

This is the series of spec conformance bug fixes and code cleanups. We would like to get this series in after our core changes in v8.2. - Implements WARL behavior for CSRs that don't support writes - Improves specification conformance of the page table walker - Change access checks from ternary

[Qemu-devel] [PATCH v1 16/22] RISC-V: Remove EM_RISCV ELF_MACHINE indirection from

Pointless indirection. Other ports use EM_ constants directly. Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- hw/riscv/sifive_e.c | 2 +- hw/riscv/sifive_u.c | 2 +- hw/riscv/spike.c| 2 +- hw/riscv/virt.c | 2 +- target/riscv/cpu.h

[Qemu-devel] [PATCH 15/19] uninorth: move PCI IO (ISA) memory region into the uninorth device

Do this for both the uninorth main and uninorth u3 AGP buses, using the main PCI bus for each machine (this ensures the IO addresses still match those used by OpenBIOS). Signed-off-by: Mark Cave-Ayland --- hw/pci-host/uninorth.c | 14 ++

[Qemu-devel] [PATCH 09/19] uninorth: move PCI host bridge bus initialisation into device realize

Since the IO address space is fixed to use the standard system IO address space then we can also use the opportunity to remove the address_space_io parameter from pci_pmac_init() and pci_pmac_u3_init(). Note we also move the default mac99 PCI bus to the end of the initialisation list so that it

[Qemu-devel] [PATCH 16/19] uninorth: rename UNINState to UNINHostState

The existing UNINState actually represents the PCI/AGP host bridge stage so rename it accordingly. Signed-off-by: Mark Cave-Ayland --- hw/pci-host/uninorth.c | 32 hw/ppc/mac.h | 8

[Qemu-devel] [PATCH 18/19] mac_newworld: remove pics IRQ array and wire up macio to OpenPIC directly

Introduce constants for the pre-defined New World IRQs to help keep things readable. Signed-off-by: Mark Cave-Ayland --- hw/ppc/mac.h | 8 hw/ppc/mac_newworld.c | 29 +++-- 2 files changed, 23 insertions(+), 14

[Qemu-devel] [PATCH 13/19] uninorth: remove obsolete pci_pmac_u3_init() function

Instead wire up the PCI/AGP host bridges in mac_newworld.c. Now this is complete it is possible to move the initialisation of the PCI hole alias into pci_u3_agp_init(). Signed-off-by: Mark Cave-Ayland --- hw/pci-host/uninorth.c | 30 +-

[Qemu-devel] [PATCH 06/19] uninorth: alter pci_pmac_init() and pci_pmac_u3_init() to return uninorth device

This is in preparation for moving the device wiring into the New World machine. Signed-off-by: Mark Cave-Ayland --- hw/pci-host/uninorth.c | 16 hw/ppc/mac.h | 10 ++ hw/ppc/mac_newworld.c | 10 -- 3 files changed, 22

[Qemu-devel] [PATCH 12/19] uninorth: remove obsolete pci_pmac_init() function

Instead wire up the PCI/AGP host bridges in mac_newworld.c. Now this is complete it is possible to move the initialisation of the PCI hole alias into pci_unin_main_init(). Signed-off-by: Mark Cave-Ayland --- hw/pci-host/uninorth.c | 46

[Qemu-devel] [PATCH 05/19] uninorth: move uninorth definitions into uninorth.h

Signed-off-by: Mark Cave-Ayland --- hw/pci-host/uninorth.c | 22 +-- include/hw/pci-host/uninorth.h | 49 ++ 2 files changed, 50 insertions(+), 21 deletions(-) create mode 100644

[Qemu-devel] [PATCH 11/19] uninorth: enable internal PCI host bridge

Signed-off-by: Mark Cave-Ayland --- hw/pci-host/uninorth.c | 28 +++- 1 file changed, 23 insertions(+), 5 deletions(-) diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index 1f6752c294..ccde332fa9 100644 ---

[Qemu-devel] [PATCH 07/19] uninorth: move PCI mmio memory region initialisation into init function

Whilst we are here, rename the memory regions to better reflect whether they belong to either a PCI or an AGP bus. Signed-off-by: Mark Cave-Ayland --- hw/pci-host/uninorth.c | 28 ++-- 1 file changed, 18 insertions(+), 10 deletions(-) diff

[Qemu-devel] [PATCH 10/19] uninorth: fix PCI and AGP bus mixup

Somewhere in the history of time, the initialisation of the PCI buses for the AGP and PCI host bridges got mixed up in that the PCI host bridge was creating an instance of the AGP PCI bus, and the AGP PCI bus was missing. Swap the PCI host bridge over to use the correct PCI bus (including setting

[Qemu-devel] [PATCH 03/19] uninorth: QOMify PCI and AGP host bridges

Signed-off-by: Mark Cave-Ayland --- hw/pci-host/uninorth.c | 79 -- 1 file changed, 32 insertions(+), 47 deletions(-) diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index 710818e355..1d4d3f5705 100644

[Qemu-devel] [PATCH 08/19] uninorth: introduce temporary pic_irqs device property

This is in preparation for moving the PCI bus wiring inside the uninorth host bridge devices. In the future it will be possible to remove this once the PICs have been switched to use qdev GPIOs. Signed-off-by: Mark Cave-Ayland --- hw/pci-host/uninorth.c |

[Qemu-devel] [PATCH 02/19] uninorth: remove second set of uninorth token registers

Commit 593c181160: "PPC: Newworld: Add second uninorth control register set" added a second set of uninorth registers at 0xf300. Testing MacOS 9.2 to MacOS X 10.4 reveals no accesses to this address and I can't find any reference to it in Apple's Core99.cpp source so I'm assuming that this

[Qemu-devel] [PATCH 04/19] uninorth: remove stray PCIBus realize from mac_newworld.c

After QOMification this is clearly no longer needed (and possibly hasn't been for some time). Signed-off-by: Mark Cave-Ayland --- hw/ppc/mac_newworld.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index

[Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements

[This is for New World Machines: there is a follow-up patch for Old World Machines] This patchset is a combination of uninorth fixes/cleanup with the final aim of removing the remaining custom init functions and switching IRQ arrays over to qdev GPIOs. The first couple of patches apply some

[Qemu-devel] [PATCH 01/19] uninorth: trivial style fixups

This makes sure we keep patchew/checkpatch happy during the remainder of this patchset. Signed-off-by: Mark Cave-Ayland --- hw/pci-host/uninorth.c | 29 +++-- 1 file changed, 19 insertions(+), 10 deletions(-) diff --git

Re: [Qemu-devel] [PATCH] migration: fix applying wrong capabilities

* Peter Xu (pet...@redhat.com) wrote: > When setting migration capabilities via QMP/HMP, we'll apply them even > if the capability check failed. Fix it. > > Fixes: 4a84214ebe ("migration: provide migrate_caps_check()", 2017-07-18) > Signed-off-by: Peter Xu OK, yes, that

Re: [Qemu-devel] [PATCH] trace: only permit standard C types and fixed size integer types

Hi, This series failed build test on s390x host. Please find the details below. Type: series Message-id: 20180306154625.23910-1-berra...@redhat.com Subject: [Qemu-devel] [PATCH] trace: only permit standard C types and fixed size integer types === TEST SCRIPT BEGIN === #!/bin/bash # Testing

[Qemu-devel] [PULL] RISC-V QEMU Port Submission v8.2

-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 The following changes since commit f32408f3b472a088467474ab152be3b6285b2d7b: misc: don't use hwaddr as a type in trace events (2018-03-06 14:24:30 +) are available in the git repository at: https://github.com/riscv/riscv-qemu.git

[Qemu-devel] [PATCH 3/3] q35: change default NIC to e1000e

The e1000 NIC is getting old and is not a very good default for a PCIe machine type. Change it to e1000e, which should be supported by a good number of guests. In particular, drivers for 82574 were added first to Linux 2.6.27 (2008) and Windows 2008 R2. This does mean that Windows 2008 will not

[Qemu-devel] [PATCH 2/3] net: allow using any PCI NICs in -net or -nic

Remove the hard-coded list of PCI NIC names; instead, fill an array using all PCI devices listed under DEVICE_CATEGORY_NETWORK. Keep the old shortcut "virtio" for virtio-net-pci. Suggested-by: Thomas Huth Cc: Jason Wang Signed-off-by: Paolo Bonzini

[Qemu-devel] [PATCH v2 0/3] change q35 default NIC to e1000e

The Intel 82574 NIC has better performance and more features than the aging e1000 (aka 82540), for example MSI-X. This patch chooses it by default for the Q35 machine type. As suggested by Thomas, instead of special casing e1000e, all PCI NIC device names become valid models for "-net

[Qemu-devel] [PATCH 1/3] qom: introduce object_class_get_list_sorted

Unify half a dozen copies of very similar code (the only difference being whether comparisons were case-sensitive) and use it also in Tricore, which did not do any sorting of CPU model names. Signed-off-by: Paolo Bonzini --- include/qom/object.h| 11 +++

Re: [Qemu-devel] [PATCH v9 03/14] hw/arm/smmu-common: VMSAv8-64 page table walk

On 17 February 2018 at 18:46, Eric Auger wrote: > This patch implements the page table walk for VMSAv8-64. > > Signed-off-by: Eric Auger > > --- > v8 -> v9: > - remove guest error log on PTE fetch fault > - rename trace functions > - fix

Re: [Qemu-devel] Introduction

On 03/04/2018 12:17 AM, Aishwarya Kadlag wrote: > Hi, I am aish2k joining this mailing list today > Hi, aish2k: In general, you do not need to announce or introduce yourself when joining technical mailing lists. You may subscribe and unsubscribe at your leisure. Most lists have certain rules

Re: [Qemu-devel] [PATCH] multiboot: check mh_load_end_addr address field

Hi Prasad. The Multiboot Spec will allow for a zero bss end address.  (Please see section 3.1.3 at https://www.gnu.org/software/grub/manual/multiboot/  . ) For a zero bss end address, this patch will not do the right thing. I had proposed some patches to properly handle zero bss end address,

[Qemu-devel] [PATCH v4 05/11] linux-user: fix mmap/munmap/mprotect/mremap/shmat

In linux-user QEMU that runs for a target with TARGET_ABI_BITS bigger than L1_MAP_ADDR_SPACE_BITS an assertion in page_set_flags fires when mmap, munmap, mprotect, mremap or shmat is called for an address outside the guest address space. mmap and mprotect should return ENOMEM in such case.

Re: [Qemu-devel] [PATCH] trace: fix ARM TrustZone PPC hwaddr type

On 6 March 2018 at 17:22, Stefan Hajnoczi wrote: > Commit 9eb8040c2d2b ("hw/misc/tz-ppc: Model TrustZone peripheral > protection controller") added trace events with hwaddr type arguments. > > This is not allowed and leads to the following compiler errors when > building with

Re: [Qemu-devel] [Qemu-trivial] [PATCH] misc, ide: remove use of HWADDR_PRIx in trace events

On 03/06/2018 10:44 AM, Daniel P. Berrangé wrote: > The trace events all use a uint64_t data type, so should be using the > corresponding PRIx64 format, not HWADDR_PRIx which is intended for use > with the 'hwaddr' type. > > Signed-off-by: Daniel P. Berrangé Reviewed-by:

Re: [Qemu-devel] [PULL 00/30] ppc-for-2.12 queue 20180306

On 6 March 2018 at 17:47, Thomas Huth wrote: > Does the device need to be hot-pluggable or even user_creatable at all? > It seems like it is also using serial_hds[] directly, so that is a good > indication that it is *not* user creatable. So maybe the easiest fix is > to simply

Re: [Qemu-devel] [Qemu-trivial] [PATCH v2] misc: don't use hwaddr as a type in trace events

On 03/06/2018 10:43 AM, Daniel P. Berrangé wrote: > Use types that are defined by QEMU in trace events caused build failures > for the UST trace backend: > > In file included from trace-ust-all.c:13:0: > trace-ust-all.h:11844:206: error: unknown type name ‘hwaddr’ > > It only knows about C

Re: [Qemu-devel] [PATCH] .shippable.yml: disable powerpc-cross image

Hi Alex, On 03/06/2018 12:39 PM, Alex Bennée wrote: > Something has happened to the old emdebian setup which means it no > longer builds. Let's disable the shippable builds which are always > failing. I read your comment on IRC and talked with Debian people, but couldn't resolve this yet :( >

[Qemu-devel] [PATCH] usbredir: reorder fields in USBRedirDevice to reduce padding

Changing the current ordering saves 8 bytes per entry in x86_64. Signed-off-by: zhenwei.pi --- hw/usb/redirect.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/usb/redirect.c b/hw/usb/redirect.c index ec17430..65a9196 100644 ---

[Qemu-devel] [Bug 1753309] Re: Ethernet interrupt vectors for sabrelite machine are defined backwards

Swapping the interrupt pins fixes the problem on Linux v4.13 and later. Older kernels start failing as follows. On v4.12 and earlier, the Ethernet interface fails to instantiate with fec 2188000.ethernet (unnamed net_device) (uninitialized): MDIO read timeout fec: probe of

Re: [Qemu-devel] [PATCH] trace: include filename when printing parser error messages

On 03/06/2018 12:46 PM, Daniel P. Berrangé wrote: > Improves error messages from: > > ValueError: Error on line 72: need more than 1 value to unpack > > To > > ValueError: Error at /home/berrange/src/virt/qemu/trace-events:72: > need more than 1 value to unpack > > Signed-off-by:

Re: [Qemu-devel] [PATCH] trace: only permit standard C types and fixed size integer types

On 03/06/2018 12:46 PM, Daniel P. Berrangé wrote: > Some trace backends will compile code based on the declared trace > events. It should not be assumed that the backends can resolve any QEMU > specific typedefs. So trace events should restrict their argument > types to the standard C types and

Re: [Qemu-devel] [PATCH] trace: fix ARM TrustZone PPC hwaddr type

On 03/06/2018 02:22 PM, Stefan Hajnoczi wrote: > Commit 9eb8040c2d2b ("hw/misc/tz-ppc: Model TrustZone peripheral > protection controller") added trace events with hwaddr type arguments. > > This is not allowed and leads to the following compiler errors when > building with ./configure

Re: [Qemu-devel] [Qemu-ppc] [PULL 06/11] hw/ide: Emulate SiI3112 SATA controller

On 11.01.2018 05:59, David Gibson wrote: > From: BALATON Zoltan > > This is a common generic PCI SATA controller that is also used in PCs > but more importantly guests running on the Sam460ex board prefer this > card and have a driver for it (unlike for other SATA controllers

Re: [Qemu-devel] [PATCH 1/4] eth: add speed and duplex definitions

On Tue, Mar 06, 2018 at 12:53:14PM -0500, Jason Baron wrote: > > > On 03/02/2018 12:54 PM, Michael S. Tsirkin wrote: > > On Thu, Mar 01, 2018 at 10:46:33PM -0500, Jason Baron wrote: > >> Pull in definitions for SPEED_UNKNOWN, DUPLEX_UNKNOWN, DUPLEX_HALF, > >> and DUPLEX_FULL. > >> > >>

Re: [Qemu-devel] [virtio-dev] [PATCH 4/4] virtio-net: add linkspeed and duplex settings to virtio-net

On Tue, Mar 06, 2018 at 01:02:06PM -0500, Jason Baron wrote: > > > On 03/04/2018 08:05 AM, Yan Vugenfirer wrote: > > > > > >> On 2 Mar 2018, at 22:19, Michael S. Tsirkin >> > wrote: > >> > >> On Fri, Mar 02, 2018 at 03:14:01PM +0800, Jason Wang wrote:

Re: [Qemu-devel] [virtio-dev] [PATCH 4/4] virtio-net: add linkspeed and duplex settings to virtio-net

On 03/04/2018 08:05 AM, Yan Vugenfirer wrote: > > >> On 2 Mar 2018, at 22:19, Michael S. Tsirkin > > wrote: >> >> On Fri, Mar 02, 2018 at 03:14:01PM +0800, Jason Wang wrote: >>> >>> >>> On 2018年03月02日 11:46, Jason Baron wrote: Although linkspeed

Re: [Qemu-devel] [PATCH 4/4] virtio-net: add linkspeed and duplex settings to virtio-net

On 03/02/2018 03:22 PM, Michael S. Tsirkin wrote: > On Fri, Mar 02, 2018 at 11:59:00AM -0500, Jason Baron wrote: >> On 03/02/2018 02:14 AM, Jason Wang wrote: >>> >>> >>> On 2018年03月02日 11:46, Jason Baron wrote: Although linkspeed and duplex can be set in a linux guest via 'ethtool -s',

Re: [Qemu-devel] [PULL 00/30] ppc-for-2.12 queue 20180306

On 06/03/18 17:47, Thomas Huth wrote: It seems that the error is being raised when setting the property rather than during realize so I'm not sure what I can do to handle this. Any thoughts? Does the device need to be hot-pluggable or even user_creatable at all? It seems like it is also using

Re: [Qemu-devel] [PATCH] migration: fix minor finalize leak

* Marc-André Lureau (marcandre.lur...@redhat.com) wrote: > Spotted thanks to ASAN: > QTEST_QEMU_BINARY=x86_64-softmmu/qemu-system-x86_64 tests/migration-test -p > /x86_64/migration/bad_dest > > ==30302==ERROR: LeakSanitizer: detected memory leaks > > Direct leak of 48 byte(s) in 1 object(s)

Re: [Qemu-devel] [Qemu-ppc] [PULL 00/30] ppc-for-2.12 queue 20180306

On Tue, 6 Mar 2018 18:47:47 +0100 Thomas Huth wrote: > On 06.03.2018 18:28, Mark Cave-Ayland wrote: > > On 06/03/18 16:48, Thomas Huth wrote: > > > >> Something in the recent commits introduced a new way to cause unexpected > >> aborts of QEMU: > >> > >> $

Re: [Qemu-devel] [PATCH 1/4] eth: add speed and duplex definitions

On 03/02/2018 12:54 PM, Michael S. Tsirkin wrote: > On Thu, Mar 01, 2018 at 10:46:33PM -0500, Jason Baron wrote: >> Pull in definitions for SPEED_UNKNOWN, DUPLEX_UNKNOWN, DUPLEX_HALF, >> and DUPLEX_FULL. >> >> Signed-off-by: Jason Baron >> Cc: "Michael S. Tsirkin"

Re: [Qemu-devel] [PATCH v3 05/11] linux-user: fix mmap/munmap/mprotect/mremap/shmat

On Tue, Mar 6, 2018 at 9:39 AM, Laurent Vivier wrote: > Le 06/03/2018 à 18:28, Max Filippov a écrit : >> On Tue, Mar 6, 2018 at 4:02 AM, Laurent Vivier wrote: >>> Le 01/03/2018 à 18:36, Max Filippov a écrit : #define GUEST_ADDR_MAX (reserved_va ?

Re: [Qemu-devel] [PULL 00/30] ppc-for-2.12 queue 20180306

On 06.03.2018 18:28, Mark Cave-Ayland wrote: > On 06/03/18 16:48, Thomas Huth wrote: > >> Something in the recent commits introduced a new way to cause unexpected >> aborts of QEMU: >> >> $ ppc64-softmmu/qemu-system-ppc64 -monitor stdio >> QEMU 2.11.50 monitor - type 'help' for more information

Re: [Qemu-devel] [PATCH v2 0/2] block latency histogram

On Tue, Mar 06, 2018 at 16:00:17 +, Stefan Hajnoczi wrote: > On Wed, Feb 07, 2018 at 03:50:35PM +0300, Vladimir Sementsov-Ogievskiy wrote: > > Vladimir Sementsov-Ogievskiy (2): > > block/accounting: introduce latency histogram > > qapi: add block latency histogram interface (snip) > > 5

Re: [Qemu-devel] [PATCH v3 05/11] linux-user: fix mmap/munmap/mprotect/mremap/shmat

Le 06/03/2018 à 18:28, Max Filippov a écrit : > On Tue, Mar 6, 2018 at 4:02 AM, Laurent Vivier wrote: >> Le 01/03/2018 à 18:36, Max Filippov a écrit : >>> In linux-user QEMU that runs for a target with TARGET_ABI_BITS bigger >>> than L1_MAP_ADDR_SPACE_BITS an assertion in

Re: [Qemu-devel] [RFC] qemu-img: Drop BLK_ZERO from convert

Am 06.03.2018 um 14:47 hat Stefan Hajnoczi geschrieben: > On Wed, Feb 28, 2018 at 09:11:32PM +0100, Max Reitz wrote: > > On 2018-02-28 19:08, Max Reitz wrote: > > > On 2018-02-27 17:17, Stefan Hajnoczi wrote: > > >> On Mon, Feb 26, 2018 at 06:03:13PM +0100, Max Reitz wrote: > > >>> There are

[Qemu-devel] [PATCH] tests: Silence migration-test 'bad' test

From: "Dr. David Alan Gilbert" In 2c9bb29703c I added a migration test that purposely fails; unfortunately it prints a copy of the failure message to stderr which makes the output a bit messy. Hide stderr for that test. Signed-off-by: Dr. David Alan Gilbert

Re: [Qemu-devel] [PULL 00/30] ppc-for-2.12 queue 20180306

On 06/03/18 16:48, Thomas Huth wrote: Something in the recent commits introduced a new way to cause unexpected aborts of QEMU: $ ppc64-softmmu/qemu-system-ppc64 -monitor stdio QEMU 2.11.50 monitor - type 'help' for more information (qemu) device_add macio-newworld Unexpected error in

Re: [Qemu-devel] [PATCH v3 05/11] linux-user: fix mmap/munmap/mprotect/mremap/shmat

On Tue, Mar 6, 2018 at 4:02 AM, Laurent Vivier wrote: > Le 01/03/2018 à 18:36, Max Filippov a écrit : >> In linux-user QEMU that runs for a target with TARGET_ABI_BITS bigger >> than L1_MAP_ADDR_SPACE_BITS an assertion in page_set_flags fires when >> mmap, munmap, mprotect,

[Qemu-devel] [PATCH] trace: fix ARM TrustZone PPC hwaddr type

Commit 9eb8040c2d2b ("hw/misc/tz-ppc: Model TrustZone peripheral protection controller") added trace events with hwaddr type arguments. This is not allowed and leads to the following compiler errors when building with ./configure --enable-trace-backends=ust: trace-ust-all.h:11847:20: error:

Re: [Qemu-devel] [PATCH] trace: only permit standard C types and fixed size integer types

Hi, This series failed build test on ppcbe host. Please find the details below. Type: series Message-id: 20180306154625.23910-1-berra...@redhat.com Subject: [Qemu-devel] [PATCH] trace: only permit standard C types and fixed size integer types === TEST SCRIPT BEGIN === #!/bin/bash # Testing

Re: [Qemu-devel] [PATCH v2 5/5] s390x/cpumodel: Set up CPU model for AP device support

>>> 1) ap=on is a guest ABI feature saying to the guest you can use AP >>> instructions >> Indeed, that's what belongs into the CPU model. >> >>> 2) How we provide AP instructions to the guest can be done in three >>> different ways: >>>- SIE Interpretation > AP instructions executed on the

Re: [Qemu-devel] [PATCH v2 0/5] s390x: vfio-ap: guest dedicated crypto adapters

> If L2 forward devices to L3 through SIE ECA.28 but no bit is set is in > the CRYCB of L2, > L3 will not see any device. Exactly and this is the problem: How should L2 know that these devices are special and cannot be forwarded. > >> >> This is what we call the nightmare of nested

[Qemu-devel] [PATCH] migration: fix minor finalize leak

Spotted thanks to ASAN: QTEST_QEMU_BINARY=x86_64-softmmu/qemu-system-x86_64 tests/migration-test -p /x86_64/migration/bad_dest ==30302==ERROR: LeakSanitizer: detected memory leaks Direct leak of 48 byte(s) in 1 object(s) allocated from: #0 0x7f60efba1a38 in __interceptor_calloc

Re: [Qemu-devel] [PATCH v2 0/7] Add checks for corruption in the snapshot table

Am 06.03.2018 um 17:14 hat Alberto Garcia geschrieben: > Hey, > > here's the new version of this series. It fixes a leak reported by > Kevin and adds a couple of error_report_err() to make use of the > message returned by qcow2_validate_table(). Thanks, applied to the block branch. Kevin

Re: [Qemu-devel] [PATCH v4] scripts/checkpatch.pl: add check for `while` and `for`

On Tue, Mar 06, 2018 at 03:04:50PM +0800, Su Hang wrote: > Adding check for `while` and `for` statements, which condition has more than > one line. > > The former checkpatch.pl can check `if` statement, which condition has more > than one line, whether block misses brace round, like this: > ''' >

[Qemu-devel] [PATCH 2/3] net: allow using any PCI NICs in -net or -nic

Remove the hard-coded list of PCI NIC names; instead, fill an array using all PCI devices listed under DEVICE_CATEGORY_NETWORK. Keep the old shortcut "virtio" for virtio-net-pci. Suggested-by: Thomas Huth Cc: Jason Wang Signed-off-by: Paolo Bonzini

Re: [Qemu-devel] [PATCH v2 0/5] s390x: vfio-ap: guest dedicated crypto adapters

On 06/03/2018 11:01, David Hildenbrand wrote: On 27.02.2018 16:44, Tony Krowiak wrote: This patch series is the QEMU counterpart to the KVM/kernel support for guest dedicated crypto adapters. The KVM/kernel model is built on the VFIO mediated device framework and provides the infrastructure for

[Qemu-devel] [PATCH 3/3] q35: change default NIC to e1000e

The e1000 NIC is getting old and is not a very good default for a PCIe machine type. Change it to e1000e, which should be supported by a good number of guests. In particular, drivers for 82574 were added first to Linux 2.6.27 (2008) and Windows 2008 R2. This does mean that Windows 2008 will not

Re: [Qemu-devel] [PULL 00/30] ppc-for-2.12 queue 20180306

ory at: > > git://github.com/dgibson/qemu.git tags/ppc-for-2.12-20180306 > > for you to fetch changes up to 21b786f607b11d888f90bbb8c3414500515d11e7: > > PowerPC: Add TS bits into msr_mask (2018-03-06 13:16:29 +1100) > > -

Re: [Qemu-devel] [PATCH] iotests: Update output of 051 and 186 after commit 1454509726719e0933c

On 06.03.2018 17:45, Alberto Garcia wrote: > Signed-off-by: Alberto Garcia > --- > tests/qemu-iotests/051.pc.out | 20 > tests/qemu-iotests/186.out| 22 +++--- > 2 files changed, 3 insertions(+), 39 deletions(-) > > diff --git

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