On 11/10/20 17:45, Alexander Bulekov wrote:
> On 201008 0939, Paolo Bonzini wrote:
>> On 21/09/20 04:24, Alexander Bulekov wrote:
>>> This patch declares the fuzz_dma_read_cb function and uses the
>>> preprocessor and linker(weak symbols) to handle these cases:
>>>
>>> When we build softmmu/all
On 12/10/2020 09.19, Philippe Mathieu-Daudé wrote:
> The legacy PReP machine has been removed in commit b2ce76a0730
> ("hw/ppc/prep: Remove the deprecated "prep" machine and the
> OpenHackware BIOS"). This temporary workaround is no more
> required, remove it.
>
> Signed-off-by: Philippe
On 10/12/20 9:28 AM, Thomas Huth wrote:
On 12/10/2020 09.19, Philippe Mathieu-Daudé wrote:
The legacy PReP machine has been removed in commit b2ce76a0730
("hw/ppc/prep: Remove the deprecated "prep" machine and the
OpenHackware BIOS"). This temporary workaround is no more
required, remove it.
On 22:37 Sat 10 Oct , Philippe Mathieu-Daudé wrote:
> This peripheral has 1 free-running timer and 4 compare registers.
>
> Only the free-running timer is implemented. Add support the
> COMPARE registers (each register is wired to an IRQ).
>
> Reference: "BCM2835 ARM Peripherals" datasheet
> +static uint64_t sbsa_gwdt_rread(void *opaque, hwaddr addr, unsigned int size)
> +{
> +uint32_t ret;
> +
> +if (addr == SBSA_GWDT_WRR) {
> +/* watch refresh read has no effect and returns 0 */
> +ret = 0;
> +} else {
> +qemu_log_mask(LOG_GUEST_ERROR, "bad
On Tue, Oct 06, 2020 at 12:03:26PM +0200, Igor Mammedov wrote:
> On Thu, 1 Oct 2020 10:28:29 +0200
> Gerd Hoffmann wrote:
>
> > Wire up "usb=on" machine option, when enabled add
> > a sysbus xhci controller with 8 ports.
>
> first pci, and now usb - not so micro anymore.
Both pcie and usb are
On 10.10.20 00:54, Jakob Bohm wrote:
[...]
> Theoretically, locking on a raw file needs to be protocol-compatible
> with loop-mounting the same raw file, so if the loop driver doesn't
> probe those magic byte offsets to prevent out-of-order block writes,
> then there is little point for the qemu
On 11/10/20 17:35, Alexander Bulekov wrote:
>> Instead of always looking for a separator, can you:
>>
>> 1) skip over it if you find it naturally at the end of a command (that
>> is, "FUZZ" is like a comment command)
>>
>> 2) actively search for it only if you stumble upon an unrecognized command?
On 10/11/20 4:53 AM, Huacai Chen wrote:
Hi, Philippe,
On Sat, Oct 10, 2020 at 5:09 PM Philippe Mathieu-Daudé wrote:
Hi Huacai,
On 10/7/20 10:39 AM, Huacai Chen wrote:
Add Loongson-3 based machine support, it use liointc as the interrupt
controler and use GPEX as the pci controller.
On 10/12/20 12:34 AM, David Gibson wrote:
On Sun, Oct 11, 2020 at 09:03:32PM +0200, Philippe Mathieu-Daudé wrote:
The Grackle PCI host model expects the interrupt controller
being set, but does not verify it is present. Add a check to
help developers using this model.
I don't think thaqt's
On Fri, Oct 02, 2020 at 04:38:01PM +0100, Daniel P. Berrangé wrote:
> On Fri, Oct 02, 2020 at 02:47:44PM +0200, Gerd Hoffmann wrote:
> > On Thu, Oct 01, 2020 at 07:39:33PM +0200, Paolo Bonzini wrote:
> > > On 01/10/20 19:32, Yonggang Luo wrote:
> > > > And also convert related configure script to
On Mon, Oct 12, 2020 at 08:21:41AM +0200, Philippe Mathieu-Daudé wrote:
> On 10/12/20 12:34 AM, David Gibson wrote:
> > On Sun, Oct 11, 2020 at 09:03:32PM +0200, Philippe Mathieu-Daudé wrote:
> > > The Grackle PCI host model expects the interrupt controller
> > > being set, but does not verify it
On 09/10/2020 18.52, Philippe Mathieu-Daudé wrote:
> Paul's Wavecomp email has been bouncing for months. He told us
> he "no longer has access to modern MIPS CPUs or Boston hardware,
> and wouldn't currently have time to spend on them if he did." [1]
> but "perhaps that might change in the
On 11/10/2020 21.49, Philippe Mathieu-Daudé wrote:
> Use self-explicit NANOSECONDS_PER_SECOND definition instead
> of a magic value.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> tests/qtest/rtc-test.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
The legacy PReP machine has been removed in commit b2ce76a0730
("hw/ppc/prep: Remove the deprecated "prep" machine and the
OpenHackware BIOS"). This temporary workaround is no more
required, remove it.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/pci-host/prep.c | 32
In commit a01d8cadadf we changed the number of IRQs to 4 but
forgot to update the map_irq() function. Do it now.
Fixes: a01d8cadadf ("Fix memory corruption ... in PreP emulation")
Signed-off-by: Philippe Mathieu-Daudé
---
Cc: Jocelyn Mayer
Cc: Julian Seward
Signed-off-by: Philippe
Fix a bug in the Raven PCI host, plus few cleanups while here.
Philippe Mathieu-Daudé (4):
hw/pci-host/prep: Update coding style to make checkpatch.pl happy
hw/pci-host/prep: Remove legacy PReP machine temporary workaround
hw/pci-host/prep: Fix PCI swizzling in map_irq()
On 12/10/2020 09.19, Philippe Mathieu-Daudé wrote:
> Link Jocelyn Mayer's web page from the Wayback Machine,
> and correct the PReP acronym.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> Cc: Jocelyn Mayer
> ---
> docs/system/target-ppc.rst | 8
> 1 file changed, 4 insertions(+), 4
To make the next commit easier to review, clean this code first.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/pci-host/prep.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c
index d0323fefb10..80dfb67da43 100644
---
Link Jocelyn Mayer's web page from the Wayback Machine,
and correct the PReP acronym.
Signed-off-by: Philippe Mathieu-Daudé
---
Cc: Jocelyn Mayer
---
docs/system/target-ppc.rst | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/docs/system/target-ppc.rst
On 22:43 Sat 10 Oct , Philippe Mathieu-Daudé wrote:
> The get_random() helper uses the CP0_Wired register, which is
> unrelated to the CP0_Count register use as timer.
typo: used
> Commit e16fe40c872 ("Move the MIPS CPU timer in a separate file")
> incorrectly moved this get_random() helper
* Peter Maydell (peter.mayd...@linaro.org) wrote:
> On Thu, 8 Oct 2020 at 20:13, Dr. David Alan Gilbert (git)
> wrote:
> >
> > From: "Dr. David Alan Gilbert"
> >
> > The following changes since commit e64cf4d569f6461d6b9072e00d6e78d0ab8bd4a7:
> >
> > Merge remote-tracking branch
Signed-off-by: Bihong Yu
Reviewed-by: Chuan Zheng
---
migration/migration.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/migration/migration.h b/migration/migration.h
index deb411a..99784b4 100644
--- a/migration/migration.h
+++ b/migration/migration.h
@@ -124,8 +124,7
Signed-off-by: Bihong Yu
Reviewed-by: Chuan Zheng
---
migration/rdma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/migration/rdma.c b/migration/rdma.c
index ca4d315..00eac34 100644
--- a/migration/rdma.c
+++ b/migration/rdma.c
@@ -855,7 +855,7 @@ static int
Recently I am reading migration related code, find some style problems in
migration directory while using checkpatch.pl to check migration code. Fix the
error style problems.
v2:
- fix Signed-off-by error
- fix printf format error: "%0x" -> "0x%x"
Bihong Yu (8):
migration: Do not use C99 //
In order to use inclusive terminology, rename SSI 'slave' as
'peripheral', following the specification resolution:
https://www.oshwa.org/a-resolution-to-redefine-spi-signal-names/
Patch created mechanically using:
$ sed -i s/SSISlave/SSIPeripheral/ $(git grep -l SSISlave)
$ sed -i
Replace the magic '4' by ARRAY_SIZE(mem->alias) which is more explicit.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/pci-host/pam.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/pci-host/pam.c b/hw/pci-host/pam.c
index a4962057833..4712260025a 100644
---
On Mon, 12 Oct 2020 at 14:20, Philippe Mathieu-Daudé wrote:
>
> Note from Peter Maydell:
>
> The versatile/realview PCI controller has:
>* three memory windows in the system address space
> - those are represented by the pci_mem_window[] array
> - mem_win_size[] holds the size of
On Mon, Oct 12, 2020 at 03:44:00PM +0200, Philippe Mathieu-Daudé wrote:
> Hi Thomas, Alex,
>
> +Daniel
>
> On 5/28/20 12:10 PM, Thomas Huth wrote:
> > We have a dedicated folder for the gitlab-ci - so there is no need
> > to clutter the top directory with these .yml files.
> >
> > Message-Id:
Le 02/10/2020 à 18:06, Greg Kurz a écrit :
> Signed-off-by: Greg Kurz
> ---
> hw/acpi/piix4.c |4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
> index 894d357f8c35..67a1ea41914f 100644
> --- a/hw/acpi/piix4.c
> +++
Le 05/10/2020 à 08:26, Christian Borntraeger a écrit :
> On 30.09.20 18:36, Fam Zheng wrote:
>> On Wed, 2020-09-30 at 17:58 +0200, Christian Borntraeger wrote:
>>> Fedora 32 gcc 10 seems to give false positives:
>>>
>>> Compiling C object libblock.fa.p/block_vmdk.c.o
>>> ../block/vmdk.c: In
On 10/11/20 3:32 PM, Philippe Mathieu-Daudé wrote:
The IDE controller uses IRQ #14 by default. Add this
default definition to the IsaIrqNumber enum.
Avoid magic values in the code, replace them by the
newly introduced definition.
Signed-off-by: Philippe Mathieu-Daudé
---
On 10/12/20 3:55 PM, BALATON Zoltan wrote:
On Mon, 12 Oct 2020, Philippe Mathieu-Daudé wrote:
From: Philippe Mathieu-Daudé
The PCI_ADDR() macro use generic PCI fields shifted by 8-bit.
Rewrite it extracting the shift operation one layer.
Signed-off-by: Philippe Mathieu-Daudé
---
Request to queue this patch for the next pull.
On Mon, Sep 21, 2020 at 15:03 Ani Sinha wrote:
> Object property insertion code iterates over an integer to get an unused
> index that can be used as an unique name for an object property. This loop
> increments the integer value indefinitely.
Kevin Wolf writes:
> Am 12.10.2020 um 13:53 hat Philippe Mathieu-Daudé geschrieben:
>> On 10/12/20 1:25 PM, Kevin Wolf wrote:
>> > Am 12.10.2020 um 12:47 hat Alex Bennée geschrieben:
>> > >
>> > > Markus Armbruster writes:
>> > >
>> > > > From: Kevin Wolf
>> > > >
>> > > > This moves the
On Mon, 12 Oct 2020 at 15:39, Laurent Vivier wrote:
>
> Le 08/10/2020 à 19:46, Thomas Huth a écrit :
> > On 08/10/2020 19.43, Dr. David Alan Gilbert (git) wrote:
> >> From: "Dr. David Alan Gilbert"
> >>
> >> Fedora 33's mingw moans about:
> >>
> >> In file included from
While reading the code _again_ I spotted a memory leak and I realized
we can simplify some paths that deal with vCPU removal.
---
Greg Kurz (4):
spapr: Fix leak of CPU machine specific data
spapr: Drop spapr_delete_vcpu() unused argument
spapr: Introduce an .instance_finalize
On 12.10.20 14:27, Philippe Mathieu-Daudé wrote:
> From: Daniel P. Berrangé
>
> The bdrv_all_*_snapshot functions return a BlockDriverState pointer
> for the invalid backend, which the callers then use to report an
> error message. In some cases multiple callers are reporting the
> same error
On Mon, 2020-10-12 at 16:57 +0100, Dr. David Alan Gilbert wrote:
> * Tobin Feldman-Fitzthum (to...@linux.ibm.com) wrote:
> > On 2020-09-21 15:16, Dr. David Alan Gilbert wrote:
> > > * Tobin Feldman-Fitzthum (to...@linux.vnet.ibm.com) wrote:
> > > > AMD SEV allows a guest owner to inject a secret
The BLX immediate insn in the Thumb encoding always performs
a switch from Thumb to Arm state. This would be totally useless
in M-profile which has no Arm decoder, and so the instruction
does not exist at all there. Make the encoding UNDEF for M-profile.
(This part of the encoding space is used
This patchseries implements various minor v8.1M new features,
notably the branch-future and low-overhead-loop extensions.
(None of this will get enabled until we have enough to implement
a CPU model which has v8.1M, which will be the Cortex-M55, but
as usual we can get stuff into the tree
The t32 decode has a group which represents a set of insns
which overlap with B_cond_thumb because they have [25:23]=111
(which is an invalid condition code field for the branch insn).
This group is currently defined using the {} overlap-OK syntax,
but it is almost entirely non-overlapping
In arm_cpu_realizefn(), if the CPU has VFP or Neon disabled then we
squash the ID register fields so that we don't advertise it to the
guest. This code was written for A-profile and needs some tweaks to
work correctly on M-profile:
* A-profile only fields should not be zeroed on M-profile:
-
Just for consistency, following the example documented since
commit e3fe3988d7 ("error: Document Error API usage rules"),
return a boolean value indicating an error is set or not.
Acked-by: Pavel Dovgalyuk
Signed-off-by: Philippe Mathieu-Daudé
---
include/migration/snapshot.h | 9 -
From: Daniel P. Berrangé
The bdrv_all_*_snapshot functions return a BlockDriverState pointer
for the invalid backend, which the callers then use to report an
error message. In some cases multiple callers are reporting the
same error message, but with slightly different text. In the future
there
From: Philippe Mathieu-Daudé
We already have a generic PCI_BUILD_BDF() macro in "hw/pci/pci.h"
to pack these values, use it.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/pci-host/bonito.c | 3 +--
hw/pci-host/pnv_phb4.c | 2 +-
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git
To make the next commit easier to review, clean this code first.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/ssi/ssi.h | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/include/hw/ssi/ssi.h b/include/hw/ssi/ssi.h
index fe3028c39dc..c15548425a3 100644
Philippe Mathieu-Daudé writes:
> On 10/9/20 10:55 PM, Cleber Rosa wrote:
>> Avocado will, by default, produce JUnit files. Let's ask GitLab
>> to present those in the web UI.
>
> https://gitlab.com/philmd/qemu/-/pipelines/200764992/test_report
>
> Reviewed-by: Philippe Mathieu-Daudé
>
Use self-explicit NANOSECONDS_PER_SECOND definition instead
of a magic value.
Reviewed-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
---
tests/qtest/rtc-test.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/qtest/rtc-test.c b/tests/qtest/rtc-test.c
index
Hi Thomas, Alex,
+Daniel
On 5/28/20 12:10 PM, Thomas Huth wrote:
We have a dedicated folder for the gitlab-ci - so there is no need
to clutter the top directory with these .yml files.
Message-Id: <20200525131823.715-5-th...@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Alex
Le 02/10/2020 à 19:13, Thomas Huth a écrit :
> For being able to compile with -Werror=implicit-fallthrough we need
> to use comments that the compiler recognizes. Use "fallthrough" instead
> of "no break" here.
>
> Signed-off-by: Thomas Huth
> ---
> tests/test-char.c | 2 +-
> 1 file changed, 1
Le 06/10/2020 à 15:39, Julia Suvorova a écrit :
> 'occupied' is spelled like 'ocuppied' in the message.
>
> Signed-off-by: Julia Suvorova
> ---
> hw/pci/pci.c | 2 +-
> hw/ppc/spapr_pci.c | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/pci/pci.c
On 10/10/20 5:43 AM, Markus Armbruster wrote:
John Snow writes:
Hi, this series adds static type hints to the QAPI module.
This is part one!
Part 1: https://gitlab.com/jsnow/qemu/-/tree/python-qapi-cleanup-pt1
Everything: https://gitlab.com/jsnow/qemu/-/tree/python-qapi-cleanup-pt6
-
Le 09/10/2020 à 21:09, Elena Afanasova a écrit :
> Spotted by PVS-Studio
>
> Signed-off-by: Elena Afanasova
> ---
> block/blkdebug.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/block/blkdebug.c b/block/blkdebug.c
> index eecbf3e5c4..54da719dd1 100644
> --- a/block/blkdebug.c
> +++
Le 08/10/2020 à 18:59, marcandre.lur...@redhat.com a écrit :
> From: Marc-André Lureau
>
> Always put osdep.h first, and remove redundant stdlib.h include.
>
> Signed-off-by: Marc-André Lureau
> ---
> migration/dirtyrate.c | 3 ++-
> tests/test-bitmap.c | 1 -
> 2 files changed, 2
Le 12/10/2020 à 17:05, Peter Maydell a écrit :
> On Mon, 12 Oct 2020 at 15:39, Laurent Vivier wrote:
>>
>> Le 08/10/2020 à 19:46, Thomas Huth a écrit :
>>> On 08/10/2020 19.43, Dr. David Alan Gilbert (git) wrote:
From: "Dr. David Alan Gilbert"
Fedora 33's mingw moans about:
Signed-off-by: Bihong Yu
Reviewed-by: Chuan Zheng
---
migration/ram.c| 2 +-
migration/savevm.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/migration/ram.c b/migration/ram.c
index 09178cc..2da2b62 100644
--- a/migration/ram.c
+++ b/migration/ram.c
@@ -2743,7
Signed-off-by: Bihong Yu
Reviewed-by: Chuan Zheng
---
migration/ram.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/migration/ram.c b/migration/ram.c
index 0aea78f..09178cc 100644
--- a/migration/ram.c
+++ b/migration/ram.c
@@ -101,14 +101,16 @@ static struct {
> -Original Message-
> From: Philippe Mathieu-Daudé
> Sent: 12 October 2020 13:45
> To: qemu-devel@nongnu.org
> Cc: Peter Maydell ; qemu-...@nongnu.org;
> qemu-triv...@nongnu.org; Paul
> Durrant ; Aurelien Jarno ;
> qemu-...@nongnu.org; Philippe Mathieu-
> Daudé ; Michael S. Tsirkin ;
From: Philippe Mathieu-Daudé
In order to use inclusive terminology, rename max_slaves
as max_peripherals.
Patch generated using:
$ sed -i s/slave/peripheral/ \
hw/ssi/aspeed_smc.c include/hw/ssi/aspeed_smc.h
One line in aspeed_smc_read() has been manually tweaked
to pass checkpatch.
On 08/10/2020 18.03, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> In travis, with gcov and gprof we're seeing timeouts; hopefully fix
> this by increasing the test timeouts a bit, but for xbzrle ensure it
> really does get a couple of cycles through to test the cache.
Since MEGASAS_MAX_SGE is defined to be 128 the following if statement can be
removed.
Spotted by PVS-Studio.
Signed-off-by: Elena Afanasova
---
hw/scsi/megasas.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c
index e24c12d7ee..6dcaad55fa 100644
---
On Mon, 12 Oct 2020 at 14:20, Philippe Mathieu-Daudé wrote:
>
> Note from Peter Maydell:
>
> The versatile/realview PCI controller has:
>* three PCI BARs which represent memory windows on the
>PCI bus which bus-master PCI devices can use to
>write back into the system address
On 12/10/2020 16.07, Ani Sinha wrote:
> Request to queue this patch with the next pull.
I can take it via qtest-next in case Michael / Igor do not plan to send a
pull request any time soon.
Thomas
Le 08/10/2020 à 00:02, Eduardo Habkost a écrit :
> Fix typo introduced in the C11 #ifdef for qemu_max_align_t. It
> never caused any problems because we always compile using
> -std=gnu99.
>
> Fixes: 4c880f363e9e ("qom: Allow objects to be allocated with increased
> alignment")
> Signed-off-by:
Am 11.10.2020 um 09:34 hat Markus Armbruster geschrieben:
> This replaces the QemuOpts-based help code for --object in the storage
> daemon with code based on the keyval parser.
>
> Review of v3 led me to preexisting issues. Instead of posting my
> fixes separately, then working with Kevin to
Le 09/10/2020 à 13:38, Laurent Vivier a écrit :
> .class_init is already set to serial_mm_class_init.
>
> Remove the duplicate entry.
>
> Fixes: 17fd1a6490b1 ("serial-mm: add "regshift" property")
> Cc: marcandre.lur...@redhat.com
> Signed-off-by: Laurent Vivier
> ---
> hw/char/serial.c | 1 -
Hello Eduardo,
On Friday 09 of October 2020 18:01:16 Eduardo Habkost wrote:
> Instance properties make introspection hard and are not shown by
> "-object ...,help". Convert them to class properties.
>
> Signed-off-by: Eduardo Habkost
> ---
> Cc: Pavel Pisa
> Cc: Vikram Garhwal
> Cc: Jason
Le 12/10/2020 à 16:45, Daniel P. Berrangé a écrit :
> On Wed, Oct 07, 2020 at 06:02:55PM -0400, Eduardo Habkost wrote:
>> Fix typo introduced in the C11 #ifdef for qemu_max_align_t. It
>> never caused any problems because we always compile using
>> -std=gnu99.
>>
>> Fixes: 4c880f363e9e ("qom:
When a CPU core is being removed, the machine specific data of each
CPU thread object is leaked. Fix this by calling the dedicated helper
we have for that instead of simply unparenting the CPU object.
Signed-off-by: Greg Kurz
---
hw/ppc/spapr_cpu_core.c | 20 ++--
1 file
>From v8.1M, disabled-coprocessor handling changes slightly:
* coprocessors 8, 9, 14 and 15 are also governed by the
cp10 enable bit, like cp11
* an extra range of instruction patterns is considered
to be inside the coprocessor space
We previously marked these up with TODO comments;
Hi Eduardo,
Sorry for the late reply, in general there are also hv-net and hv-scsi
implementations from Roman Kagan, which have not been merged in...
I have a WIP component which does not use vmbus but Windows needs it
to exist and function in order for it to work (it's the synthetic
debugger
In order to be consistent with the other code base uses,
rewrite slightly how the MIPS_MALTA object is created.
No logical change.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/mips/malta.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/mips/malta.c
From: Daniel P. Berrangé
None of the callers care about the errno value since there is a full
Error object populated. This gives consistency with save_snapshot()
which already just returns a boolean value.
Reviewed-by: Dr. David Alan Gilbert
Signed-off-by: Daniel P. Berrangé
[PMD: Return
Trivial patches using the generic PCI macros from "hw/pci/pci.h".
Philippe Mathieu-Daudé (5):
hw/pci-host/bonito: Make PCI_ADDR() macro more readable
hw/pci-host: Use the PCI_BUILD_BDF() macro from 'hw/pci/pci.h'
hw/pci-host/uninorth: Use the PCI_FUNC() macro from 'hw/pci/pci.h'
hw: Use
From: Philippe Mathieu-Daudé
We already have a generic PCI_SLOT() macro in "hw/pci/pci.h"
to extract the PCI slot identifier, use it.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/hppa/dino.c| 2 +-
hw/i386/xen/xen-hvm.c | 2 +-
hw/isa/piix3.c| 2 +-
hw/mips/gt64xxx_pci.c | 2
From: Philippe Mathieu-Daudé
We already have a generic PCI_FUNC() macro in "hw/pci/pci.h" to
extract the PCI function identifier, use it.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/pci-host/uninorth.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/pci-host/uninorth.c
Since v1:
- Fixed patch #1 subject (Kevin)
In order to use inclusive terminology, rename SSI 'slave' as
'peripheral', following the resolution Paolo pointed in [*]:
https://www.oshwa.org/a-resolution-to-redefine-spi-signal-names/
Candidate to be merged via the ARM or Trivial trees.
[*]
From: Philippe Mathieu-Daudé
We already have a generic PCI_DEVFN() macro in "hw/pci/pci.h"
to pack the PCI slot/function identifiers, use it.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/virt.c | 3 ++-
hw/pci-host/uninorth.c | 6 ++
2 files changed, 4 insertions(+), 5
Note from Peter Maydell:
The versatile/realview PCI controller has:
* three PCI BARs which represent memory windows on the
PCI bus which bus-master PCI devices can use to
write back into the system address space
- the device SMAPn registers allow the guest to configure
Use self-explicit PCI_NUM_PINS definition instead of magic value.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/virt.c | 4 ++--
hw/mips/gt64xxx_pci.c | 2 +-
hw/pci-host/versatile.c | 6 +++---
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/hw/arm/virt.c
A bunch of trivial cleanups, replacing magic
values by definitions to make the code easier
to review.
Since v1:
- Addressed Peter review comment on versatile PCI controller
- Added Thomas R-b tag
Expected to be merged via qemu-trivial@.
Regards,
Phil.
Philippe Mathieu-Daudé (5):
hw: Replace
On 12/10/2020 15.47, Paolo Bonzini wrote:
> On 12/10/20 13:14, Thomas Huth wrote:
>>> +/**
>>> + * qtest_qmp_receive:
>>> + * @s: #QTestState instance to operate on.
>>> + *
>>> + * Reads a QMP message from QEMU and returns the response.
>>> + * Buffers all the events received meanwhile, until a
On 12/10/20 13:14, Thomas Huth wrote:
>> +/**
>> + * qtest_qmp_receive:
>> + * @s: #QTestState instance to operate on.
>> + *
>> + * Reads a QMP message from QEMU and returns the response.
>> + * Buffers all the events received meanwhile, until a
>> + * call to qtest_qmp_eventwait
>> + */
>>
On 12/10/20 12:44, Thomas Huth wrote:
> I think this is one of the tasks from:
>
> https://wiki.qemu.org/Contribute/BiteSizedTasks#Compiler-driven_cleanups
>
> It has been added by Paolo in 2016:
>
>
> https://wiki.qemu.org/index.php?title=Contribute/BiteSizedTasks=5368=5367
>
> ... so
On Mon, 12 Oct 2020, Philippe Mathieu-Daudé wrote:
From: Philippe Mathieu-Daudé
The PCI_ADDR() macro use generic PCI fields shifted by 8-bit.
Rewrite it extracting the shift operation one layer.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/pci-host/bonito.c | 4 ++--
1 file changed, 2
Le 05/10/2020 à 17:27, Philippe Mathieu-Daudé a écrit :
> Log invalid memory accesses with as GUEST_ERROR.
>
> This is particularly useful since commit 5d971f9e67 which reverted
> ("memory: accept mismatching sizes in memory_region_access_valid").
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
Le 08/10/2020 à 19:46, Thomas Huth a écrit :
> On 08/10/2020 19.43, Dr. David Alan Gilbert (git) wrote:
>> From: "Dr. David Alan Gilbert"
>>
>> Fedora 33's mingw moans about:
>>
>> In file included from ../tests/test-bitmap.c:12:
>> /home/dgilbert/git/migpull/include/qemu/osdep.h:76: error:
>>
On 10/9/20 1:26 PM, Markus Armbruster wrote:
John Snow writes:
This is a minor re-work of the entrypoint script. It isolates a
entrypoint is not a word ;-P
I'm not entirely sure why a German is complaining about the birth of a
new and beautiful compound noun.
(I started to make sure
Check the value of mps before it is used as divisor. Since HCCHAR_MPS is guest
controllable, this prevents a malicious/buggy guest from crashing the QEMU
process on the host.
Signed-off-by: Mauro Matteo Cascella
Reported-by: Gaoning Pan
Reported-by: Xingwei Lin
---
hw/usb/hcd-dwc2.c | 6
The 'sc' argument is unused. Drop it.
Signed-off-by: Greg Kurz
---
hw/ppc/spapr_cpu_core.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index b6b217876750..64ce6a0cb781 100644
--- a/hw/ppc/spapr_cpu_core.c
+++
Thomas reminded me on IRC that I hadn't got round to drafting
the release schedule for 5.2 yet. Here's some proposed dates:
https://wiki.qemu.org/Planning/5.2#Release_Schedule
which would put softfreeze on the 27th Oct, Hardfreeze/rc0 on the
3rd Nov, and aiming for final release on the 1st
Le 10/10/2020 à 13:07, Chen Qun a écrit :
> This if statement judgment is redundant and it will cause a warning:
>
> migration/block-dirty-bitmap.c:1090:13: warning: ‘bitmap_name’ may be used
> uninitialized in this function [-Wmaybe-uninitialized]
> g_strlcpy(s->bitmap_name,
Deprecate our Unicore32 target support:
* the Linux kernel dropped support for unicore32 in commit
05119217a9bd199c for its 5.9 release (with rationale in the
cover letter: https://lkml.org/lkml/2020/8/3/232 )
* there is apparently no upstream toolchain that can create unicore32
Add coverage for the v8.2 DP and v8.2 FHM insns in the Neon extension
space. (We already had the v8.1 VQRDMLAH/VQRDLSH and the v8.3
VCADD/VCMLA, so this brings the risu coverage into line with what
QEMU has implemented so far.)
Signed-off-by: Peter Maydell
---
I added these patterns as part of
This patchseries implements various minor v8.1M new features,
notably the branch-future and low-overhead-loop extensions.
(None of this will get enabled until we have enough to implement
a CPU model which has v8.1M, which will be the Cortex-M55, but
as usual we can get stuff into the tree
Deprecate our TileGX target support:
* we have no active maintainer for it
* it has had essentially no contributions (other than tree-wide cleanups
and similar) since it was first added
* the Linux kernel dropped support in 2018, as has glibc
Note the deprecation in the manual, but don't
Add patterns for the fp16 half-precision floating point extension.
Where older pre-fp16 patterns used to include UNDEF encodings
that now mean fp16, constrain them so that tests generated
from those patterns will give the same results on CPUs both
with and without fp16.
Signed-off-by: Peter
On some hosts (eg Ubuntu Bionic) pkg-config returns a set of
libraries for gio-2.0 which don't actually work when compiling
statically. (Specifically, the returned library string includes
-lmount, but not -lblkid which -lmount depends upon, so linking
fails due to missing symbols.)
Check that the
The config-devices.mak files are generated by "make", and so they
should be deleted by "make clean".
(This is different from config-host.mak and config-all-disas.mak,
which are created by "configure" and so only deleted by
"make distclen".)
If we don't delete these files on "make clean", then
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