Richard Henderson writes:
> Continue weaning user-only away from PageDesc.
>
> Use an interval tree to record target data.
> Chunk the data, to minimize allocation overhead.
>
> Signed-off-by: Richard Henderson
> ---
> accel/tcg/internal.h | 1 -
> accel/tcg/user-exec.c | 110
On 10/21/22 14:01, Leandro Lupori wrote:
Profiling QEMU during Fedora 35 for PPC64 boot revealed that
6.39% of total time was being spent in helper_insns_inc(), on a
POWER9 machine. To avoid calling this helper every time PMCs had
to be incremented, an inline implementation of PMC5 increment
On 10/21/22 14:01, Leandro Lupori wrote:
Add 2 new PMC related HFLAGS:
- HFLAGS_PMCJCE - value of MMCR0 PMCjCE bit
- HFLAGS_PMC_OTHER - set if a PMC other than PMC5-6 is enabled
These flags allow further optimization of PMC5 update code, by
allowing frequently tested conditions to be
Queued in gitlab.com/danielhb/qemu/tree/ppc-next.
Phil, your acks for these patches are using the f4...@amsat.org email.
Let me know if you want to use your new work address instead.
Thanks,
Daniel
On 10/19/22 13:02, BALATON Zoltan wrote:
This is the end of the QOMify series originially
On 10/19/22 13:02, BALATON Zoltan wrote:
Use the generic bank handling introduced in previous patch in the DDR
SDRAM controller too. This also fixes previously broken region unmap
due to sdram_ddr_unmap_bcr() ignoring container region so it crashed
with an assert when the guest tried to
On 10/19/22 13:02, BALATON Zoltan wrote:
Currently only base and size are set on initial bank creation and bcr
value is computed on mapping the region. Set bcr at init so the bcr
encoding method becomes local to the controller model and mapping and
unmapping can operate on the bank so it can
Stefan Hajnoczi writes:
> On Tue, 25 Oct 2022 at 05:00, Markus Armbruster wrote:
>>
>> The following changes since commit e750a7ace492f0b450653d4ad368a77d6f660fb8:
>>
>> Merge tag 'pull-9p-20221024' of https://github.com/cschoenebeck/qemu into
>> staging (2022-10-24 14:27:12 -0400)
>>
>> are
On Wed, Sep 07, 2022 at 11:14:11PM +0530, Jay Khandkar wrote:
> When the local APIC is in a software disabled state, all local interrupt
> sources must be masked and all attempts to unmask them should be
> ignored. Currently, we don't do either. Fix this by handling it
> correctly in
As of the kernel commit linked below, Linux ingests an RNG seed
passed as part of the environment block by the bootloader or firmware.
This mechanism works across all different environment block types,
generically, which pass some block via the second firmware argument. On
malta, this has been
From: Richard Henderson
Hoist the computation of the mmu_idx for the ptw up to
get_phys_addr_with_struct and get_phys_addr_twostage.
This removes the duplicate check for stage2 disabled
from the middle of the walk, performing it only once.
Signed-off-by: Richard Henderson
Reviewed-by: Alex
supermicrox11-bmc is configured with ast2400-a1 SoC. This does not match
the Supermicro documentation for X11 BMCs, and it does not match the
devicetree file in the Linux kernel.
As it turns out, some Supermicro X11 motherboards use AST2400 SoCs,
while others use AST2500.
Introduce new machine
From: "Jason A. Donenfeld"
When the system reboots, the rng-seed that the FDT has should be
re-randomized, so that the new boot gets a new seed. Since the FDT is in
the ROM region at this point, we add a hook right after the ROM has been
added, so that we have a pointer to that copy of the FDT.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
---
MAINTAINERS | 1 +
hw/pci-host/grackle.c | 14 +--
hw/ppc/mac.h | 3 ---
hw/ppc/mac_oldworld.c | 1 +
include/hw/pci-host/grackle.h | 44
On Tue, 25 Oct 2022 at 01:44, Jason A. Donenfeld wrote:
>
> As of the kernel commit linked below, Linux ingests an RNG seed
> passed as part of the environment block by the bootloader or firmware.
> This mechanism works across all different environment block types,
> generically, which pass some
On Tue, Oct 25, 2022 at 03:15:49PM +0800, Yang Yingliang wrote:
> Inject fault while loading module, kset_register() may fail.
> If it fails, the kset.kobj.name allocated by kobject_set_name()
> which must be called before a call to kset_register() may be
> leaked, since refcount of kobj was set
Move the parts specific to and only used by mac99 out from the shared
mac.h into mac_newworld.c where they better belong.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
---
hw/ppc/mac.h | 24
hw/ppc/mac_newworld.c | 19 +++
Hi Peter,
On Tue, Oct 25, 2022 at 6:47 PM Peter Maydell wrote:
> So I didn't take this one patch, partly because I don't think
No problem - I'm actually quite happy to finally have this one
reviewed. I'll send you a follow up.
> all our supported build platforms have memmem(), and partly
>
The mac99 machine emulates different machines depending on machine
properties or even if it is run as qemu-system-ppc64 or
qemu-system-ppc. This is very confusing for users and many hours were
lost trying to explain it or finding out why commands users came up
with are not working as expected.
The tbfreq variable is only set once in an if-else which can be done
at the variable declaration saving some lines of code and making it
simpler.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
---
hw/ppc/mac_newworld.c | 9 +
hw/ppc/mac_oldworld.c | 9 +
2 files
On 2022-10-25 03:15, Yang Yingliang wrote:
> Inject fault while loading module, kset_register() may fail.
> If it fails, the kset.kobj.name allocated by kobject_set_name()
> which must be called before a call to kset_register() may be
> leaked, since refcount of kobj was set in kset_init().
On Wed, 26 Oct 2022 00:37:33 +0800
Cindy Lu wrote:
> diff --git a/softmmu/memory.c b/softmmu/memory.c
> index 7ba2048836..03940c551d 100644
> --- a/softmmu/memory.c
> +++ b/softmmu/memory.c
...
> +/*
> + * Malicious VMs might trigger discarding of IOMMU-mapped memory. The
> +
On Tue, Oct 25, 2022 at 05:39:27PM +0100, Peter Maydell wrote:
> On Tue, 25 Oct 2022 at 01:43, Jason A. Donenfeld wrote:
> >
> > When the system reboots, the rng seed that QEMU passes should be
> > re-randomized, so that the new boot gets a new seed. This series wires
> > that up for FDT.
> >
> >
The NVRAM_SIZE constant was defined but not used. Rename it to
MACIO_NVRAM_SIZE to match the device model and use it where appropriate.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
---
hw/misc/macio/macio.c| 2 +-
hw/ppc/mac_newworld.c| 4 ++--
From: "Jason A. Donenfeld"
When the system reboots, the rng-seed that the FDT has should be
re-randomized, so that the new boot gets a new seed. Since the FDT is in
the ROM region at this point, we add a hook right after the ROM has been
added, so that we have a pointer to that copy of the FDT.
Move the parts specific to and only used by macio out from the shared
mac.h into macio.c where they better belong.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Mark Cave-Ayland
---
hw/misc/macio/macio.c | 5 +++--
hw/ppc/mac.h | 23
Add support for vIOMMU. add the new function to deal with iommu MR.
- during iommu_region_add register a specific IOMMU notifier,
and store all notifiers in a list.
- during iommu_region_del, compare and delete the IOMMU notifier from the list
Verified in vp_vdpa and vdpa_sim_net driver
By slight reorganisation we can avoid an else branch and some code
duplication which makes it easier to follow the code.
Signed-off-by: BALATON Zoltan
---
hw/ppc/mac_newworld.c | 6 +++---
hw/ppc/mac_oldworld.c | 7 +++
2 files changed, 6 insertions(+), 7 deletions(-)
diff --git
From: Richard Henderson
This fault type is to be used with FEAT_HAFDBS when
the guest enables hw updates, but places the tables
in memory where atomic updates are unsupported.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
Message-id:
Also update PowerMac family docs with some more recent info.
Signed-off-by: BALATON Zoltan
---
docs/about/deprecated.rst| 7 +++
docs/system/ppc/powermac.rst | 12
2 files changed, 15 insertions(+), 4 deletions(-)
diff --git a/docs/about/deprecated.rst
From: "Jason A. Donenfeld"
Snapshot loading only expects to call deterministic handlers, not
non-deterministic ones. So introduce a way of registering handlers that
won't be called when reseting for snapshots.
Signed-off-by: Jason A. Donenfeld
Message-id:
From: Richard Henderson
The unconditional loop was used both to iterate over levels
and to control parsing of attributes. Use an explicit goto
in both cases.
While this appears less clean for iterating over levels, we
will need to jump back into the middle of this loop for
atomic updates,
Signed-off-by: BALATON Zoltan
---
hw/ppc/mac_newworld.c | 6 --
hw/ppc/mac_oldworld.c | 9 ++---
2 files changed, 10 insertions(+), 5 deletions(-)
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index 5d2fd69f35..4f5876670f 100644
--- a/hw/ppc/mac_newworld.c
+++
Several variables are set in if-else branches where the else branch
can be removed by setting a default value at the variable declaration
which leads to simlpler code that is easier to follow.
Signed-off-by: BALATON Zoltan
---
hw/ppc/mac_newworld.c | 19 ---
From: "Jason A. Donenfeld"
When the system reboots, the rng-seed that the FDT has should be
re-randomized, so that the new boot gets a new seed. Since the FDT is in
the ROM region at this point, we add a hook right after the ROM has been
added, so that we have a pointer to that copy of the FDT.
This might allow the compiler to check values.
Signed-off-by: BALATON Zoltan
---
hw/ppc/mac_newworld.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index 4f5876670f..bcd6566ead 100644
--- a/hw/ppc/mac_newworld.c
+++
Move the function vfio_get_xlat_addr to softmmu/memory.c, and
change the name to memory_get_xlat_addr().So we can use this
function in other devices,such as vDPA device.
Signed-off-by: Cindy Lu
---
hw/vfio/common.c | 92 ++-
include/exec/memory.h |
:12 -0400)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20221025
for you to fetch changes up to e2114f701c78f76246e4b1872639dad94a6bdd21:
rx: re-randomize rng-seed on reboot (2022-10-25 17:32:24 +0100
From: Richard Henderson
The MMFR1 field may indicate support for hardware update of
access flag alone, or access flag and dirty bit.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20221024051851.3074715-4-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
The PROM_FILENAME and KERNEL_* defines are used by mac_oldworld and
mac_newworld but they don't have to be identical so these could be
moved to the individual boards.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Mark Cave-Ayland
---
hw/ppc/mac.h | 4
From: Richard Henderson
Perform the atomic update for hardware management of the access flag.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20221024051851.3074715-13-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
docs/system/arm/emulation.rst | 1 +
From: "Jason A. Donenfeld"
When the system reboots, the rng-seed that the FDT has should be
re-randomized, so that the new boot gets a new seed. Since the FDT is in
the ROM region at this point, we add a hook right after the ROM has been
added, so that we have a pointer to that copy of the FDT.
Drop some more local variables additionally to commit b8df32555ce5 to
match clean ups done to mac_newwold in previous patch.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Mark Cave-Ayland
---
hw/ppc/mac_oldworld.c | 43
From: Richard Henderson
Separate S1 translation from the actual lookup.
Will enable lpae hardware updates.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20221024051851.3074715-6-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/ptw.c | 41
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
Message-id: 20221024051851.3074715-5-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/internals.h | 2 ++
target/arm/helper.c| 8 +++-
2 files
Besides resolving the confusing behaviour mentioned in previous commit
this might also allow unifying qemu-system-ppc and qemu-system-ppc64
in the future.
Signed-off-by: BALATON Zoltan
---
hw/ppc/mac_newworld.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/hw/ppc/mac_newworld.c
From: Richard Henderson
Always overriding fi->type was incorrect, as we would not properly
propagate the fault type from S1_ptw_translate, or arm_ldq_ptw.
Simplify things by providing a new label for a translation fault.
For other faults, store into fi directly.
Reviewed-by: Peter Maydell
All that is left in mac.h now belongs to the nvram emulation so rename
it accordingly and only include it where it is really used.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
---
MAINTAINERS | 1 +
hw/ide/macio.c |
Values not used frequently enough may not worth putting in a local
variable, especially with names almost as long as the original value
because that does not improve readability, to the contrary it makes it
harder to see what value is used. Drop a few such variables. This is
the same clean up that
Map regions in ascending otder and eorganise code a bit to avoid some
casts and move Uninorth parts together.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
---
hw/ppc/mac_newworld.c | 37 +
1 file changed, 17 insertions(+), 20 deletions(-)
On Wed, Oct 19, 2022 at 6:20 PM Bin Meng wrote:
>
> From: Bin Meng
>
> The maximum number of wait objects for win32 should be
> MAXIMUM_WAIT_OBJECTS, not MAXIMUM_WAIT_OBJECTS + 1.
>
> Signed-off-by: Bin Meng
> ---
>
> Changes in v4:
> - make the out of bounds access protection explicit
>
>
Setting emulated machine type with a property called "via" is
confusing users so deprecate the "via" option in favour of newly added
explicit machine types. The default via=cuda option is not a valid
config (no real Mac has this combination of hardware) so no machine
type could be defined for that
From: "Jason A. Donenfeld"
When the system reboots, the rng-seed that the FDT has should be
re-randomized, so that the new boot gets a new seed. Several
architectures require this functionality, so export a function for
injecting a new seed into the given FDT.
Cc: Alistair Francis
Cc: David
Since only one week is left until freeze starts I've included some
more patches in this version that I've intended to submit after the
clean ups but we're running out of time now. The last 3 patches could
be squashed together, I've just split these up because I expect
resistence from Mark to any
By storing the device pointers in a variable with the right type the
number of QOM casts can be reduced which also makes the code more
readable.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Mark Cave-Ayland
---
hw/ppc/mac_newworld.c | 61
On Tue, 25 Oct 2022 at 01:43, Jason A. Donenfeld wrote:
>
> When the system reboots, the rng seed that QEMU passes should be
> re-randomized, so that the new boot gets a new seed. This series wires
> that up for FDT.
>
> Then, since the record subsystem makes use of reset as well, we
> add a new
From: Richard Henderson
Reduce the amount of typing required for this check.
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
Message-id: 20221024051851.3074715-2-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
From: "Jason A. Donenfeld"
When the system reboots, the rng-seed that the FDT has should be
re-randomized, so that the new boot gets a new seed. Since the FDT is in
the ROM region at this point, we add a hook right after the ROM has been
added, so that we have a pointer to that copy of the FDT.
From: Axel Heider
When running seL4 tests (https://docs.sel4.systems/projects/sel4test)
on the sabrelight platform, the timer tests fail. The arm/imx6 EPIT
timer interrupt does not fire properly, instead of a e.g. second in
can take up to a minute to finally see the interrupt.
Resolves:
From: Richard Henderson
Leave the upper and lower attributes in the place they originate
from in the descriptor. Shifting them around is confusing, since
one cannot read the bit numbers out of the manual. Also, new
attributes have been added which would alter the shifts.
Reviewed-by: Peter
FEAT_E0PD adds new bits E0PD0 and E0PD1 to TCR_EL1, which allow the
OS to forbid EL0 access to half of the address space. Since this is
an EL0-specific variation on the existing TCR_ELx.{EPD0,EPD1}, we can
implement it entirely in aa64_va_parameters().
This requires moving the existing
The semantic difference between the deprecated device_legacy_reset()
function and the newer device_cold_reset() function is that the new
function resets both the device itself and any qbuses it owns,
whereas the legacy function resets just the device itself and nothing
else. In
From: Ake Koomsin
An exception targeting EL2 from lower EL is actually maskable when
HCR_E2H and HCR_TGE are both set. This applies to both secure and
non-secure Security state.
We can remove the conditions that try to suppress masking of
interrupts when we are Secure and the exception targets
From: "Jason A. Donenfeld"
Snapshot loading is supposed to be deterministic, so we shouldn't
re-randomize the various seeds used.
Signed-off-by: Jason A. Donenfeld
Message-id: 20221025004327.568476-7-ja...@zx2c4.com
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
hw/m68k/virt.c
From: Richard Henderson
Perform the atomic update for hardware management of the dirty bit.
Signed-off-by: Richard Henderson
Message-id: 20221024051851.3074715-14-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/cpu64.c | 2 +-
target/arm/ptw.c | 16
From: Richard Henderson
Replace some gotos with some nested if statements.
Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
Message-id: 20221024051851.3074715-12-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/ptw.c | 34 --
From: Damien Hedde
The code for handling the reset level count in the Resettable code
has two issues:
The reset count is only decremented for the 1->0 case. This means
that if there's ever a nested reset that takes the count to 2 then it
will never again be decremented. Eventually the count
From: Richard Henderson
We had only been reporting the stage2 page size. This causes
problems if stage1 is using a larger page size (16k, 2M, etc),
but stage2 is using a smaller page size, because cputlb does
not set large_page_{addr,mask} properly.
Fix by using the max of the two page sizes.
From: Jean-Philippe Brucker
The "PCI Bus Binding to: IEEE Std 1275-1994" defines the compatible
string for a PCIe bus or endpoint as "pci," or
similar. Since the initial binding for PCI virtio-iommu didn't follow
this rule, it was modified to accept both strings and ensure backward
From: "Jason A. Donenfeld"
Snapshot loading is supposed to be deterministic, so we shouldn't
re-randomize the various seeds used.
Signed-off-by: Jason A. Donenfeld
Message-id: 20221025004327.568476-4-ja...@zx2c4.com
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
hw/i386/x86.c |
From: "Jason A. Donenfeld"
Snapshot loading is supposed to be deterministic, so we shouldn't
re-randomize the various seeds used.
Signed-off-by: Jason A. Donenfeld
Message-id: 20221025004327.568476-8-ja...@zx2c4.com
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
hw/m68k/q800.c
On Tue, Oct 25, 2022 at 01:47:27AM -0300, Leonardo Bras wrote:
> It all works fine in my tests, but maybe I missed some cornercase.
> Please provide any feedback you find fit.
Personally I very much like the whole series. :)
I just want to make sure it won't start to fail users when switching to
From: Richard Henderson
Both GP and DBM are in the upper attribute block.
Extend the computation of attrs to include them,
then simplify the setting of guarded.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
These patches is to suppor vIOMMU in vdpa device
changes in V3
1. Move function vfio_get_xlat_addr to memory.c
2. Use the existing memory listener, while the MR is
iommu MR then call the function iommu_region_add/
iommu_region_del
Cindy Lu (2):
vfio: move the function vfio_get_xlat_addr() to
On 10/25/22 12:30, Cornelia Huck wrote:
> On Mon, Oct 24 2022, Gavin Shan wrote:
>
>> After the improvement to high memory region address assignment is
>> applied, the memory layout can be changed, introducing possible
>> migration breakage. For example, VIRT_HIGH_PCIE_MMIO memory region
>> is
Hi Gavin,
On 10/24/22 05:54, Gavin Shan wrote:
> There are three high memory regions, which are VIRT_HIGH_REDIST2,
> VIRT_HIGH_PCIE_ECAM and VIRT_HIGH_PCIE_MMIO. Their base addresses
> are floating on highest RAM address. However, they can be disabled
> in several cases.
>
> (1) One specific high
On 25/10/2022 16.28, Amarjargal Gundjalam wrote:
The TABs should be replaced with spaces, to make sure that we have a
consistent coding style with an indentation of 4 spaces everywhere.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/370
Reviewed-by: Daniel P. Berrangé
Signed-off-by:
On 25/10/2022 16.28, Amarjargal Gundjalam wrote:
The TABs should be replaced with spaces, to make sure that we have a
consistent coding style with an indentation of 4 spaces everywhere.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/370
Reviewed-by: Daniel P. Berrangé
Signed-off-by:
On Tue, Oct 25, 2022, Peter Maydell wrote:
> On Tue, 25 Oct 2022 at 16:21, Chao Peng wrote:
> > diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst
> > index f3fa75649a78..975688912b8c 100644
> > --- a/Documentation/virt/kvm/api.rst
> > +++
Richard Henderson writes:
> Since the only user, Arm MTE, always requires allocation,
> merge the get and alloc functions to always produce a
> non-null result. Also assume that the user has already
> checked page validity.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Richard Henderson writes:
> Since "target data" is always user-only, move it out of
> translate-all.c to user-exec.c.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Richard Henderson writes:
> Flush translation blocks in bulk, rather than page-by-page.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Richard Henderson writes:
> Use the existing function for clearing target data.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Richard Henderson writes:
> Begin weaning user-only away from PageDesc.
>
> Since, for user-only, all TB (and page) manipulation is done with
> a single mutex, and there is no virtual/physical discontinuity to
> split a TB across discontinuous pages, place all of the TBs into
> a single
On 24/10/2022 06.57, Bin Meng wrote:
From: Guohuai Shi
Windows does not provide the getuid() API. Let's create a local
one and return a fixed value 0 as the uid for testing.
Signed-off-by: Guohuai Shi
Signed-off-by: Xuzhou Cheng
Signed-off-by: Bin Meng
---
tests/qtest/virtio-9p-test.c |
Richard Henderson writes:
> When PAGE_RESET is set, we are replacing pages with new
> content, which means that we need to invalidate existing
> cached data, such as TranslationBlocks. Perform the
> reset invalidate while we're doing other invalidates,
> which allows us to remove the separate
On 10/26/22 01:39, Philippe Mathieu-Daudé wrote:
On 24/10/22 15:24, Richard Henderson wrote:
We have called cpu_restore_state asserting will_exit.
Do not go back on that promise. This affects icount.
Signed-off-by: Richard Henderson
---
target/openrisc/sys_helper.c | 2 +-
1 file changed,
On 24/10/22 15:24, Richard Henderson wrote:
We have called cpu_restore_state asserting will_exit.
Do not go back on that promise. This affects icount.
Signed-off-by: Richard Henderson
---
target/openrisc/sys_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On Tue, 25 Oct 2022 at 05:00, Markus Armbruster wrote:
>
> The following changes since commit e750a7ace492f0b450653d4ad368a77d6f660fb8:
>
> Merge tag 'pull-9p-20221024' of https://github.com/cschoenebeck/qemu into
> staging (2022-10-24 14:27:12 -0400)
>
> are available in the Git repository
From: "Kirill A. Shutemov"
Introduce 'memfd_restricted' system call with the ability to create
memory areas that are restricted from userspace access through ordinary
MMU operations (e.g. read/write/mmap). The memory content is expected to
be used through a new in-kernel interface by a third
Thank you.
On October 25, 2022 11:10:49 a.m. Thomas Huth wrote:
On 25/10/2022 17.02, Brad Smith wrote:
tests: Add sndio to the FreeBSD CI containers / VM
Signed-off-by: Brad Smith
---
Thanks, queued to my testing-next branch:
https://gitlab.com/thuth/qemu/-/commits/testing-next
Store a reference on the AspeedSMC class under the flash object and
use it when accessing the flash contents. Avoiding the class cast
checkers in these hot paths improves performance by 10% when running
the aspeed avocado tests.
Message-Id: <20220923084803.498337-7-...@kaod.org>
Signed-off-by:
Reviewed-by: Francisco Iglesias
Message-Id: <20221013161241.2805140-4-...@kaod.org>
Signed-off-by: Cédric Le Goater
---
hw/block/m25p80.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index 13e7b28fd2b0..637c25d76e37 100644
---
The mx25l25635e and mx25l25635f chips have the same JEDEC id but the
mx25l25635f has more capabilities reported in the SFDP table. Support
for 4B opcodes is of interest because it is exploited by the Linux
kernel.
The SFDP table size is 0x200 bytes long. The mandatory table for basic
features is
Currently in mmu_notifier validate path, hva range is recorded and then
checked against in the mmu_notifier_retry_hva() of the page fault path.
However, for the to be introduced private memory, a page fault may not
have a hva associated, checking gfn(gpa) makes more sense.
For existing non
On 21/10/22 09:15, Richard Henderson wrote:
Replace goto allocate_in_reg with a boolean.
Remove o_preferred_regs which isn't used, except to copy.
Signed-off-by: Richard Henderson
---
tcg/tcg.c | 45 +
1 file changed, 21 insertions(+), 24
From: Patrick Williams
For the PVT-class hardware we have increased the memory size of
this device to 2 GiB. Adjust the device model accordingly.
Signed-off-by: Patrick Williams
Reviewed-by: Cédric Le Goater
Message-Id: <20221007110529.3657749-1-patr...@stwcx.xyz>
Signed-off-by: Cédric Le
This patch series implements KVM guest private memory for confidential
computing scenarios like Intel TDX[1]. If a TDX host accesses
TDX-protected guest memory, machine check can happen which can further
crash the running host system, this is terrible for multi-tenant
configurations. The host
A memslot with KVM_MEM_PRIVATE being set can include both fd-based
private memory and hva-based shared memory. Architecture code (like TDX
code) can tell whether the on-going fault is private or not. This patch
adds a 'is_private' field to kvm_page_fault to indicate this and
architecture code is
The SFDP table is 0x80 bytes long. The mandatory table for basic
features is available at byte 0x30 and an extra Macronix specific
table is available at 0x60.
4B opcodes are not supported.
Reviewed-by: Francisco Iglesias
Message-Id: <20220722063602.128144-4-...@kaod.org>
Message-Id:
Currently, the CPU features exposed to the AST2600 QEMU machines are :
half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt
vfpd32 lpae evtstrm
But, the features of the Cortex A7 CPU on the Aspeed AST2600 A3 SoC
are :
half thumb fastmult vfp edsp vfpv3 vfpv3d16 tls vfpv4 idiva
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