[PATCH 2/4] hw/dma: sifive_pdma: claim bit must be set before DMA transactions

From: Frank Chang Real PDMA must have Control.claim bit to be set before Control.run bit is set to start any DMA transactions. Otherwise nothing will be transferred. The following result is PDMA tested in U-boot on Unmatched board: => mw.l 0x300 0x0 <= Disclaim channel

[PATCH 3/4] hw/dma: sifive_pdma: allow non-multiple transaction size transactions

From: Green Wan Real PDMA is able to deal with non-multiple transaction size transactions. The following result is PDMA tested in U-boot on Unmatched board: => mw.l 0x300 0x0 <= Disclaim channel 0 => mw.l 0x300 0x1 <= Claim channel 0 => mw.l

[PATCH 1/4] hw/dma: sifive_pdma: reset Next* registers when Control.claim is set

From: Frank Chang Setting Control.claim clears all of the chanel's Next registers. This is effective only when Control.claim is set from 0 to 1. Signed-off-by: Frank Chang Tested-by: Max Hsu --- hw/dma/sifive_pdma.c | 15 +++ 1 file changed, 15 insertions(+) diff --git

[PATCH 0/4] hw/dma: Align SiFive PDMA behavior with real hardware

From: Frank Chang Current QEMU PDMA doesn't align with real PDMA's behavior. This would result in Linux dmatest failed. This patchest aligns with real PDMA's behavior we tested on the real board. The golden results are performed in U-boot on the Unmatched board with PDMA supported. Frank Chang

Re: [PATCH 0/2] hmp: Unbreak "change vnc", tidy up set_password's doc

On Thu, Sep 09, 2021 at 10:12:17AM +0200, Markus Armbruster wrote: > If you'd rather delete "change vnc", go ahead and post a patch. > > Markus Armbruster (2): > hmp: Unbreak "change vnc" > hmp: Drop a bogus sentence from set_password's documentation Reviewed-by: Gerd Hoffmann

Re: [PATCH] hw/misc: deprecate the 'sga' device

On Thu, Sep 09, 2021 at 01:32:19PM +0100, Daniel P. Berrangé wrote: > This is obsolete since SeaBIOS 1.11.0 introduced native support for > sending messages to the serial console. The new support can be > activated using -machine graphics=off on x86 targets. > > Signed-off-by: Daniel P. Berrangé

Re: [PULL 0/7] Migration.next patches

On 10/09/2021 13:20, Li Zhijian wrote: > > > On 10/09/2021 00:10, Juan Quintela wrote: >> "Li, Zhijian" wrote: >>> on 2021/9/9 21:42, Peter Maydell wrote: On Thu, 9 Sept 2021 at 11:36, Juan Quintela wrote: Fails to build, FreeBSD: ../src/migration/rdma.c:1146:23: error: use

Re: [PATCH RFC v2 04/16] vfio-user: connect vfio proxy to remote server

> On Sep 8, 2021, at 11:29 PM, Stefan Hajnoczi wrote: > > On Thu, Sep 09, 2021 at 05:11:49AM +, John Johnson wrote: >> >> >> I did look at coroutines, but they seemed to work when the sender >> is triggering the coroutine on send, not when request packets are arriving >>

Re: [PULL 0/7] Migration.next patches

On 10/09/2021 00:10, Juan Quintela wrote: > "Li, Zhijian" wrote: >> on 2021/9/9 21:42, Peter Maydell wrote: >>> On Thu, 9 Sept 2021 at 11:36, Juan Quintela wrote: >>> Fails to build, FreeBSD: >>> >>> ../src/migration/rdma.c:1146:23: error: use of undeclared identifier >>>

Re: Implementing isochronous transfers in hw/hcd-ohci.c

On Thu, Sep 09, 2021 at 05:06:17PM -0400, Programmingkid wrote: > Hi Gerd, > > Howard and I were talking about USB audio problems with Mac OS guests. We > think the issue might be with frames being sent to the USB audio card too > soon. My guess is only one frame is suppose to be transmitted

Re: [PATCH v2] qemu-options: show -spice options only if #ifdef CONFIG_SPICE

marcandre.lur...@redhat.com writes: > From: Marc-André Lureau > > Fixes: > https://bugzilla.redhat.com/show_bug.cgi?id=1982600 > > Signed-off-by: Marc-André Lureau Reviewed-by: Markus Armbruster

Re: [PATCH V3 04/10] vhost-vdpa: let net_vhost_vdpa_init() returns NetClientState *

On Thu, Sep 9, 2021 at 11:41 PM Zhang, Chen wrote: > > > > > -Original Message- > > From: Qemu-devel > bounces+chen.zhang=intel@nongnu.org> On Behalf Of Jason Wang > > Sent: Tuesday, September 7, 2021 5:03 PM > > To: m...@redhat.com; jasow...@redhat.com; qemu-devel@nongnu.org > > Cc:

Re: [PATCH V3 05/10] net: introduce control client

On Thu, Sep 9, 2021 at 11:46 PM Zhang, Chen wrote: > > > > > -Original Message- > > From: Qemu-devel > bounces+chen.zhang=intel@nongnu.org> On Behalf Of Jason Wang > > Sent: Tuesday, September 7, 2021 5:03 PM > > To: m...@redhat.com; jasow...@redhat.com; qemu-devel@nongnu.org > > Cc:

Re: [PATCH V3 00/10] vhost-vDPA multiqueue

On Thu, Sep 9, 2021 at 11:40 PM Zhang, Chen wrote: > > > > > -Original Message- > > From: Qemu-devel > bounces+chen.zhang=intel@nongnu.org> On Behalf Of Jason Wang > > Sent: Tuesday, September 7, 2021 5:03 PM > > To: m...@redhat.com; jasow...@redhat.com; qemu-devel@nongnu.org > > Cc:

Re: [PATCH 4/5] ebpf_rss_helper: Added helper for eBPF RSS.

On Fri, Sep 10, 2021 at 7:44 AM Yuri Benditovich wrote: > > On Thu, Sep 9, 2021 at 4:16 AM Jason Wang wrote: > > > > On Thu, Sep 9, 2021 at 8:00 AM Yuri Benditovich > > wrote: > > > > > > On Wed, Sep 8, 2021 at 6:45 AM Jason Wang wrote: > > > > > > > > On Tue, Sep 7, 2021 at 6:40 PM Yuri

Re: [RFC v3 12/32] rust: provide a common crate for QEMU

On Tue, Sep 7, 2021 at 10:41 PM wrote: > > From: Marc-André Lureau > > This crates provides common bindings and facilities for QEMU C API > shared by various projects. > > Most importantly, it defines the conversion traits used to convert from > C to Rust types. Those traits are largely adapted

Re: [PATCH 7/8] hw/ipmi: Add an IPMI external host device

On Thu, Sep 09, 2021 at 04:06:19PM -0700, Hao Wu wrote: > The IPMI external host device works for Baseband Management Controller > (BMC) emulations. It works as a representation of a host class that > connects to a given BMC. It can connect to a real host hardware or a > emulated or simulated

Re: [PATCH 5/8] hw/ipmi: Take out common from ipmi_bmc_extern.c

On Thu, Sep 09, 2021 at 04:06:17PM -0700, Hao Wu wrote: > This patch refactors ipmi_bmc_extern.c and takes out the parts that can > be used both ipmi_bmc_extern.c and bmc_host_extern.c to a common file > ipmi_extern.c. > > Now we have a connection called IPMIExtern which handles the connection, >

Re: [PATCH 4/8] hw/ipmi: Refactor IPMI interface

On Thu, Sep 09, 2021 at 04:06:16PM -0700, Hao Wu wrote: > This patch refactors the IPMI interface so that it can be used by both > the BMC side and core-side simulation. > > Detail changes: > (1) rename handle_rsp -> handle_msg so the name fits both BMC side and > Core side. > (2) Add a new

Re: [PATCH 2/8] docs/specs: IPMI device emulation: main processor

On Thu, Sep 09, 2021 at 04:06:14PM -0700, Hao Wu wrote: > From: Havard Skinnemoen > > This document is an attempt to briefly document the existing IPMI > emulation support on the main processor. It provides the necessary > background for the BMC-side IPMI emulation proposed by the next patch.

Re: [PATCH 4/5] ebpf_rss_helper: Added helper for eBPF RSS.

On Thu, Sep 9, 2021 at 4:16 AM Jason Wang wrote: > > On Thu, Sep 9, 2021 at 8:00 AM Yuri Benditovich > wrote: > > > > On Wed, Sep 8, 2021 at 6:45 AM Jason Wang wrote: > > > > > > On Tue, Sep 7, 2021 at 6:40 PM Yuri Benditovich > > > wrote: > > > > > > > > On Wed, Sep 1, 2021 at 9:42 AM Jason

Re: [PATCH 1/8] docs: enable sphinx blockdiag extension

On Thu, Sep 09, 2021 at 04:06:13PM -0700, Hao Wu wrote: > From: Havard Skinnemoen > Can you add some reason for this? I also can't approve this, you'll need permission from whoever is responsible for this file. -corey > Signed-off-by: Havard Skinnemoen > Signed-off-by: Hao Wu > --- >

[PATCH 7/8] hw/ipmi: Add an IPMI external host device

The IPMI external host device works for Baseband Management Controller (BMC) emulations. It works as a representation of a host class that connects to a given BMC. It can connect to a real host hardware or a emulated or simulated host device. In particular it can connect to a host QEMU instance

[PATCH 6/8] hw/ipmi: Move handle_command to IPMICoreClass

Move the function handle_command to IPMICoreClass. This function is shared between BMC-side emulation and Host-side emulation. Signed-off-by: Hao Wu --- hw/ipmi/ipmi_bmc_extern.c | 4 ++-- hw/ipmi/ipmi_bmc_sim.c| 6 +++--- hw/ipmi/ipmi_bt.c | 4 ++-- hw/ipmi/ipmi_extern.c |

[PATCH 4/8] hw/ipmi: Refactor IPMI interface

This patch refactors the IPMI interface so that it can be used by both the BMC side and core-side simulation. Detail changes: (1) rename handle_rsp -> handle_msg so the name fits both BMC side and Core side. (2) Add a new class IPMICore. This class represents a simulator/external

[PATCH 0/8] Handing IPMI for emulating BMC

Baseboard Management Controllers (BMCs) are special processors that monitors state of a computer, often used in data center servers. They often communicate via IPMI. As a result, it is important to emulate the IPMI interface so that they can connect to host machines. This patch set aims to

[PATCH 3/8] docs/specs: IPMI device emulation: BMC

From: Havard Skinnemoen The IPMI document is expanded with a proposal to emulate BMC-side IPMI devices. This allows a QEMU instance running server software to interact with a different QEMU instance running BMC firmware, which should closely model how a real server system works. Signed-off-by:

[PATCH 5/8] hw/ipmi: Take out common from ipmi_bmc_extern.c

This patch refactors ipmi_bmc_extern.c and takes out the parts that can be used both ipmi_bmc_extern.c and bmc_host_extern.c to a common file ipmi_extern.c. Now we have a connection called IPMIExtern which handles the connection, and IPMIBmcExtern that handles core-side emulation specific stuff.

[PATCH 1/8] docs: enable sphinx blockdiag extension

From: Havard Skinnemoen Signed-off-by: Havard Skinnemoen Signed-off-by: Hao Wu --- docs/conf.py | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/docs/conf.py b/docs/conf.py index ff6e92c6e2..ecd0be66a5 100644 --- a/docs/conf.py +++ b/docs/conf.py @@ -71,7 +71,11 @@ #

[PATCH 8/8] hw/ipmi: Add a KCS Module for NPCM7XX

Add a KCS module for NPCM7xx SoC. This module implements the IPMI responder interface and is responsible to communicate with an external host via the KCS channels in an NPCM7xx SoC. Note that we cannot directly use ipmi_kcs.c since the communication direction is the opposite. For example, in

[PATCH 2/8] docs/specs: IPMI device emulation: main processor

From: Havard Skinnemoen This document is an attempt to briefly document the existing IPMI emulation support on the main processor. It provides the necessary background for the BMC-side IPMI emulation proposed by the next patch. Signed-off-by: Havard Skinnemoen Signed-off-by: Hao Wu ---

Re: [PATCH v11 5/7] [RISCV_PM] Support pointer masking for RISC-V for i/c/f/d/a types of instructions

On 9/9/21 9:00 PM, Alexey Baturo wrote: +++ b/target/riscv/insn_trans/trans_rva.c.inc @@ -25,6 +25,7 @@ static bool gen_lr(DisasContext *ctx, arg_atomic *a, MemOp mop) if (a->rl) { tcg_gen_mb(TCG_MO_ALL | TCG_BAR_STRL); } +gen_pm_adjust_address(ctx, src1, src1); This

Implementing isochronous transfers in hw/hcd-ohci.c

Hi Gerd, Howard and I were talking about USB audio problems with Mac OS guests. We think the issue might be with frames being sent to the USB audio card too soon. My guess is only one frame is suppose to be transmitted every 1 millisecond. I was also reading the todo notes in the file

[PATCH 1/2] target/ppc: add LPCR[HR] to DisasContext and hflags

From: Matheus Ferst Add a Host Radix field (hr) in DisasContext with LPCR[HR] value to allow us to decide between Radix and HPT while validating instructions arguments. Note that PowerISA v3.1 does not require LPCR[HR] and PATE.HR to match if the thread is in ultravisor/hypervisor real

[ RFC v2 6/9] target/riscv: Support mcycle/minstret write operation

mcycle/minstret are actually WARL registers and can be written with any given value. With SBI PMU extension, it will be used to store a initial value provided from supervisor OS. The Qemu also need prohibit the counter increment if mcountinhibit is set. Support mcycle/minstret through generic

[PATCH 2/2] target/ppc: Check privilege level based on PSR and LPCR[HR] in tlbie[l]

From: Matheus Ferst PowerISA v3.0B made tlbie[l] hypervisor privileged when PSR=0 and HR=1. To allow the check at translation time, we'll use the HR bit of LPCR to check the MMU mode instead of the PATE.HR. Signed-off-by: Matheus Ferst --- target/ppc/translate.c | 21 - 1

[PATCH 0/2] Require hypervisor privilege for tlbie[l] when PSR=0 and HR=1.

From: Matheus Ferst While working on FreeBSD radix support, Leandro Lupori (CC'ed) noticed that the latest build still fails in KVM but works in TCG[1]. This difference occurs because the current implementation of "tlbiel" does not validate the instruction parameters and always check for

[ RFC v2 7/9] target/riscv: Add sscofpmf extension support

The Sscofpmf ('Ss' for Privileged arch and Supervisor-level extensions, and 'cofpmf' for Count OverFlow and Privilege Mode Filtering) extension allows the perf to handle overflow interrupts and filtering support. This patch provides a framework for programmable counters to leverage the extension.

[ RFC v2 5/9] target/riscv: Add support for hpmcounters/hpmevents

With SBI PMU extension, user can use any of the available hpmcounters to track any perf events based on the value written to mhpmevent csr. Add read/write functionality for these csrs. Signed-off-by: Atish Patra --- target/riscv/cpu.h | 12 ++ target/riscv/csr.c | 468

[ RFC v2 0/9] Improve PMU support

The latest version of the SBI specification includes a Performance Monitoring Unit(PMU) extension[1] which allows the supervisor to start/stop/configure various PMU events. The Sscofpmf ('Ss' for Privileged arch and Supervisor-level extensions, and 'cofpmf' for Count OverFlow and Privilege Mode

[ RFC v2 3/9] target/riscv: pmu: Make number of counters configurable

The RISC-V privilege specification provides flexibility to implement any number of counters from 29 programmable counters. However, the Qemu implements all the counters. Make it configurable through pmu config parameter which now will indicate how many programmable counters should be implemented

[ RFC v2 8/9] target/riscv: Add few cache related PMU events

Qemu can monitor the following cache related PMU events through tlb_fill functions. 1. DTLB load/store miss 3. ITLB prefetch miss Increment the PMU counter in tlb_fill function. Signed-off-by: Atish Patra --- target/riscv/cpu_helper.c | 26 ++ 1 file changed, 26

[ RFC v2 4/9] target/riscv: Implement mcountinhibit CSR

As per the privilege specification v1.11, mcountinhibit allows to start/stop a pmu counter selectively. Signed-off-by: Atish Patra --- target/riscv/cpu.h | 2 ++ target/riscv/cpu_bits.h | 4 target/riscv/csr.c | 25 + target/riscv/machine.c | 5 +++--

[ RFC v2 9/9] hw/riscv: virt: Add PMU DT node to the device tree

Qemu virt machine can support few cache events and cycle/instret counters. It also supports counter overflow for these events. Add a DT node so that OpenSBI/Linux kernel is aware of the virt machine capabilities. Signed-off-by: Atish Patra --- hw/riscv/virt.c| 25 +++--

[ RFC v2 2/9] target/riscv: pmu: Rename the counters extension to pmu

The PMU counters are supported via cpu config "Counters" which doesn't indicate the correct purpose of those counters. Rename the config property to pmu to indicate that these counters are performance monitoring counters. This aligns with cpu options for ARM architecture as well. Signed-off-by:

[ RFC v2 1/9] target/riscv: Fix PMU CSR predicate function

Currently, the predicate function for PMU related CSRs only works if virtualization is enabled. Ideally, they should check the mcountern bits before cycle/minstret/hpmcounterx access. The predicate function also calculates the counter index incorrectly for hpmcounterx. Signed-off-by: Atish Patra

SMMU Stage 2 translation in QEMU

Hi All, I am trying to understand the approach required for an emulated SMMU to convert IPAs(from each qemu guest) to PAs(respective host addresses) using stage 2 tables. The questions i have are:- 1) Since SMMU stage 2 tables are expected to be created and managed by a hypervisor,if there is

[PATCH v11 7/7] [RISCV_PM] Allow experimental J-ext to be turned on

Signed-off-by: Alexey Baturo Reviewed-by: Alistair Francis --- target/riscv/cpu.c | 4 1 file changed, 4 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index f5fdc31fb9..4a1dd41818 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -582,6 +582,9 @@ static void

[PATCH v11 6/7] [RISCV_PM] Implement address masking functions required for RISC-V Pointer Masking extension

From: Anatoly Parshintsev Signed-off-by: Anatoly Parshintsev Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis --- target/riscv/cpu.h | 20 target/riscv/translate.c | 36 ++-- 2 files changed, 54 insertions(+), 2

[PATCH v11 3/7] [RISCV_PM] Support CSRs required for RISC-V PM extension except for the h-mode

Signed-off-by: Alexey Baturo --- target/riscv/cpu.c | 2 + target/riscv/cpu.h | 11 ++ target/riscv/csr.c | 287 + 3 files changed, 300 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 1a2b03d579..62870e8f36 100644 ---

[PATCH v11 4/7] [RISCV_PM] Print new PM CSRs in QEMU logs

Signed-off-by: Alexey Baturo Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis --- target/riscv/cpu.c | 25 + 1 file changed, 25 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 62870e8f36..f5fdc31fb9 100644 --- a/target/riscv/cpu.c

[PATCH v11 2/7] [RISCV_PM] Add CSR defines for RISC-V PM extension

Signed-off-by: Alexey Baturo Reviewed-by: Alistair Francis --- target/riscv/cpu_bits.h | 96 + 1 file changed, 96 insertions(+) diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h index 7330ff5a19..140178d23c 100644 ---

Re: [RFC PATCH 03/10] block: Use qemu_security_policy_taint() API

On Thu, Sep 09, 2021 at 01:20:17AM +0200, Philippe Mathieu-Daudé wrote: > Add the BlockDriver::bdrv_taints_security_policy() handler. > Drivers implementing it might taint the global QEMU security > policy. > > Signed-off-by: Philippe Mathieu-Daudé > --- > include/block/block_int.h | 6 +- >

[PATCH v11 0/7] RISC-V Pointer Masking implementation

v10: Hi folks, For this iteration I fixes some minor things Alistair mentioned in review and splitted one of patches into two: one with preliminary CSR numbers(unfortunately there're still no final ones) and another with actual CSR implementation. As for not raising the exception on writing

[PATCH v11 5/7] [RISCV_PM] Support pointer masking for RISC-V for i/c/f/d/a types of instructions

Signed-off-by: Alexey Baturo Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis --- target/riscv/insn_trans/trans_rva.c.inc | 3 +++ target/riscv/insn_trans/trans_rvd.c.inc | 2 ++ target/riscv/insn_trans/trans_rvf.c.inc | 2 ++ target/riscv/insn_trans/trans_rvi.c.inc | 2 ++

[PATCH v11 1/7] [RISCV_PM] Add J-extension into RISC-V

Signed-off-by: Alexey Baturo Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis --- target/riscv/cpu.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index bf1c899c00..451a1637a1 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h

Re: [RFC PATCH 02/10] accel: Use qemu_security_policy_taint(), mark KVM and Xen as safe

On Thu, Sep 09, 2021 at 01:20:16AM +0200, Philippe Mathieu-Daudé wrote: > Add the AccelClass::secure_policy_supported field to classify > safe (within security boundary) vs unsafe accelerators. > > Signed-off-by: Philippe Mathieu-Daudé > --- > include/qemu/accel.h | 5 + >

Re: [RFC PATCH 01/10] sysemu: Introduce qemu_security_policy_taint() API

On Thu, Sep 09, 2021 at 01:20:15AM +0200, Philippe Mathieu-Daudé wrote: > Introduce qemu_security_policy_taint() which allows unsafe (read > "not very maintained") code to 'taint' QEMU security policy. > > The "security policy" is the @SecurityPolicy QAPI enum, composed of: > - "none" (no

Re: [RFC v3 13/32] rust: use vendored-sources

Daniel P. Berrangé writes ("Re: [RFC v3 13/32] rust: use vendored-sources"): > On Thu, Sep 09, 2021 at 08:29:58PM +0400, Marc-André Lureau wrote: > > True, at least on Fedora, there is machinery to package "regular" Rust > > programs/crates in an automated way. Vendoring dependencies should work

Re: [RFC v3 13/32] rust: use vendored-sources

Daniel P. Berrangé writes ("Re: [RFC v3 13/32] rust: use vendored-sources"): > Yes, distros do have machinery for this, although it is often > hard to fit in with it when you have a mixed language project. > Their machinery typically assumes pure single language project, > so would work nicer if

Re: [RFC v3 13/32] rust: use vendored-sources

On Thu, Sep 09, 2021 at 08:29:58PM +0400, Marc-André Lureau wrote: > Hi > > On Thu, Sep 9, 2021 at 8:04 PM Peter Maydell > wrote: > > > On Tue, 7 Sept 2021 at 13:32, wrote: > > > > > > From: Marc-André Lureau > > > > > > Most likely, QEMU will want tighter control over the sources, rather > >

Re: [RFC v3 13/32] rust: use vendored-sources

On Thu, Sep 09, 2021 at 05:02:01PM +0100, Peter Maydell wrote: > On Tue, 7 Sept 2021 at 13:32, wrote: > > > > From: Marc-André Lureau > > > > Most likely, QEMU will want tighter control over the sources, rather > > than relying on crates.io downloading, use a git submodule with all the > >

Re: [PATCH] memory: remove incorrect RCU comment for address_space_read()

On 09.09.21 16:10, Stefan Hajnoczi wrote: Although the doc comment says "Called within RCU critical section" the address_space_read() function takes the RCU read lock itself. There is no need for the caller to hold an RCU read lock. Cc: Paolo Bonzini Fixes:

Re: [PATCH v1 2/3] io: Add zerocopy and errqueue

On Thu, Sep 09, 2021 at 01:58:39AM -0300, Leonardo Bras Soares Passos wrote: > FWIW, what I had in mind for a (theoretical) migration setup with > io_async_writev() + io_async_flush(): One trivial concern is it's not strictly just "async" because "async" can happen on any nonblocking fd; here

Re: [PATCH v3 5/6] qapi: Add support for aliases

Am 06.09.2021 um 17:24 hat Markus Armbruster geschrieben: > Kevin Wolf writes: > > > Introduce alias definitions for object types (structs and unions). This > > allows using the same QAPI type and visitor for many syntax variations > > that exist in the external representation, like between QMP

Re: [PATCH v2 04/22] target/riscv: Improve fidelity of guest external interrupts

On Thu, Sep 9, 2021 at 2:45 PM Alistair Francis wrote: > > On Thu, Sep 2, 2021 at 9:26 PM Anup Patel wrote: > > > > The guest external interrupts for external interrupt controller are > > not delivered to the guest running under hypervisor on time. This > > results in a guest having sluggish

Re: [PATCH] memory: remove incorrect RCU comment for address_space_read()

On 9/9/21 4:10 PM, Stefan Hajnoczi wrote: > Although the doc comment says "Called within RCU critical section" the > address_space_read() function takes the RCU read lock itself. There is > no need for the caller to hold an RCU read lock. > > Cc: Paolo Bonzini > Fixes:

Re: [PULL 00/42] bsd-user updates to run hello world

On 9/9/21 5:12 PM, Warner Losh wrote: > > > On Thu, Sep 9, 2021, 9:01 AM Peter Maydell > wrote: > > On Tue, 7 Sept 2021 at 22:56, > wrote: > > > > From: Warner Losh mailto:i...@bsdimp.com>> > > > > The following

Re: [RFC v3 13/32] rust: use vendored-sources

Hi On Thu, Sep 9, 2021 at 8:04 PM Peter Maydell wrote: > On Tue, 7 Sept 2021 at 13:32, wrote: > > > > From: Marc-André Lureau > > > > Most likely, QEMU will want tighter control over the sources, rather > > than relying on crates.io downloading, use a git submodule with all the > >

Re: [PULL 00/42] bsd-user updates to run hello world

On 9/7/21 11:52 PM, i...@bsdimp.com wrote: > From: Warner Losh > > The following changes since commit f214d8e0150766c31172e16ef4b17674f549d852: > > Merge remote-tracking branch > 'remotes/pmaydell/tags/pull-target-arm-20210826' into staging (2021-08-26 > 18:03:57 +0100) > > are available

Re: [PATCH v2] hw/arm: Add support for kudo-bmc board.

On Tue, Sep 7, 2021 at 3:35 PM Chris Rauer wrote: > kudo-bmc is a board supported by OpenBMC. > https://github.com/openbmc/openbmc/tree/master/meta-fii/meta-kudo > > Since v1: > - hyphenated Cortex-A9 > > Tested: Booted kudo firmware. > Signed-off-by: Chris Rauer > Reviewed-by: Patrick Venture

Re: [PATCH] coroutine: resize pool periodically instead of limiting size

On Thu, Sep 09, 2021 at 04:51:44PM +0100, Stefan Hajnoczi wrote: > On Thu, Sep 09, 2021 at 09:37:20AM +0100, Daniel P. Berrangé wrote: > > On Wed, Sep 01, 2021 at 05:09:23PM +0100, Stefan Hajnoczi wrote: > > > It was reported that enabling SafeStack reduces IOPS significantly > > > (>25%) with the

Re: [PULL 0/7] Migration.next patches

"Li, Zhijian" wrote: > on 2021/9/9 21:42, Peter Maydell wrote: >> On Thu, 9 Sept 2021 at 11:36, Juan Quintela wrote: >> Fails to build, FreeBSD: >> >> ../src/migration/rdma.c:1146:23: error: use of undeclared identifier >> 'IBV_ADVISE_MR_ADVICE_PREFETCH_WRITE' >> int advice = wr ?

Re: [RFC v3 13/32] rust: use vendored-sources

On Tue, 7 Sept 2021 at 13:32, wrote: > > From: Marc-André Lureau > > Most likely, QEMU will want tighter control over the sources, rather > than relying on crates.io downloading, use a git submodule with all the > dependencies. However, cargo --offline was added in 1.36. > > "cargo vendor" helps

Re: [PATCH] coroutine: resize pool periodically instead of limiting size

On Wed, Sep 08, 2021 at 10:30:09PM -0400, Daniele Buono wrote: > Stefan, the patch looks great. > Thank you for debugging the performance issue that was happening with > SafeStack. > > On 9/2/2021 4:10 AM, Stefan Hajnoczi wrote: > > On Wed, Sep 01, 2021 at 05:09:23PM +0100, Stefan Hajnoczi wrote:

Re: [PATCH] coroutine: resize pool periodically instead of limiting size

On Thu, Sep 09, 2021 at 09:37:20AM +0100, Daniel P. Berrangé wrote: > On Wed, Sep 01, 2021 at 05:09:23PM +0100, Stefan Hajnoczi wrote: > > It was reported that enabling SafeStack reduces IOPS significantly > > (>25%) with the following fio benchmark on virtio-blk using a NVMe host > > block

RE: [PATCH V3 05/10] net: introduce control client

> -Original Message- > From: Qemu-devel bounces+chen.zhang=intel@nongnu.org> On Behalf Of Jason Wang > Sent: Tuesday, September 7, 2021 5:03 PM > To: m...@redhat.com; jasow...@redhat.com; qemu-devel@nongnu.org > Cc: epere...@redhat.com; e...@nvidia.com; gda...@xilinx.com; Zhu, >

Re: [PATCH v2 0/3] hw/arm/virt_acpi_build: Generate DBG2 table

Hi Drew, On 9/8/21 11:14 AM, Andrew Jones wrote: > On Mon, Sep 06, 2021 at 02:31:36PM +0200, Eric Auger wrote: >> This series generates the ACPI DBG2 table along with machvirt. >> It applies on top of Igor's >> [PATCH v2 00/35] acpi: refactor error prone build_header() and >> packed structures

RE: [PATCH V3 04/10] vhost-vdpa: let net_vhost_vdpa_init() returns NetClientState *

> -Original Message- > From: Qemu-devel bounces+chen.zhang=intel@nongnu.org> On Behalf Of Jason Wang > Sent: Tuesday, September 7, 2021 5:03 PM > To: m...@redhat.com; jasow...@redhat.com; qemu-devel@nongnu.org > Cc: epere...@redhat.com; e...@nvidia.com; gda...@xilinx.com; Zhu, >

RE: [PATCH V3 00/10] vhost-vDPA multiqueue

> -Original Message- > From: Qemu-devel bounces+chen.zhang=intel@nongnu.org> On Behalf Of Jason Wang > Sent: Tuesday, September 7, 2021 5:03 PM > To: m...@redhat.com; jasow...@redhat.com; qemu-devel@nongnu.org > Cc: epere...@redhat.com; e...@nvidia.com; gda...@xilinx.com; Zhu, >

Re: [PULL 0/7] Migration.next patches

On Thu, 9 Sept 2021 at 16:23, Juan Quintela wrote: > From 964e436bdb8aef7dbebc28415e4ac3c5822b552e Mon Sep 17 00:00:00 2001 > From: Juan Quintela > Date: Thu, 9 Sep 2021 17:07:17 +0200 > Subject: [PATCH] rdma: test for ibv_advise_mr API > > Signed-off-by: Juan Quintela > --- > configure

Re: [PULL 0/7] Migration.next patches

"Li, Zhijian" wrote: > on 2021/9/9 21:42, Peter Maydell wrote: >> On Thu, 9 Sept 2021 at 11:36, Juan Quintela wrote: >> Fails to build, FreeBSD: >> >> ../src/migration/rdma.c:1146:23: error: use of undeclared identifier >> 'IBV_ADVISE_MR_ADVICE_PREFETCH_WRITE' >> int advice = wr ?

Re: [RFC v3 00/32] Rust binding for QAPI and qemu-ga QMP handler examples

Hi On Thu, Sep 9, 2021 at 2:31 PM Markus Armbruster wrote: > Marc-André Lureau writes: > > > Hi > > > > On Wed, Sep 8, 2021 at 5:23 PM Markus Armbruster > wrote: > > > >> Build fails for me: > >> > >> make: Entering directory '/work/armbru/qemu/bld' > >> config-host.mak is out-of-date,

Re: [PULL 00/42] bsd-user updates to run hello world

On Thu, Sep 09, 2021 at 09:12:45AM -0600, Warner Losh wrote: > On Thu, Sep 9, 2021, 9:01 AM Peter Maydell wrote: > > > On Tue, 7 Sept 2021 at 22:56, wrote: > > > > > > From: Warner Losh > > > > > > The following changes since commit > > f214d8e0150766c31172e16ef4b17674f549d852: > > > > > >

[PATCH v2] qemu-options: show -spice options only if #ifdef CONFIG_SPICE

From: Marc-André Lureau Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=1982600 Signed-off-by: Marc-André Lureau --- softmmu/vl.c| 4 +++- qemu-options.hx | 2 ++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/softmmu/vl.c b/softmmu/vl.c index 55ab70eb97..1e60d286b9

Re: [PULL 00/42] bsd-user updates to run hello world

On Thu, Sep 9, 2021, 9:01 AM Peter Maydell wrote: > On Tue, 7 Sept 2021 at 22:56, wrote: > > > > From: Warner Losh > > > > The following changes since commit > f214d8e0150766c31172e16ef4b17674f549d852: > > > > Merge remote-tracking branch > 'remotes/pmaydell/tags/pull-target-arm-20210826'

Re: [PULL 00/42] bsd-user updates to run hello world

On Tue, 7 Sept 2021 at 22:56, wrote: > > From: Warner Losh > > The following changes since commit f214d8e0150766c31172e16ef4b17674f549d852: > > Merge remote-tracking branch > 'remotes/pmaydell/tags/pull-target-arm-20210826' into staging (2021-08-26 > 18:03:57 +0100) > > are available in the

Re: [PULL 0/7] Migration.next patches

On Thu, 9 Sept 2021 at 15:49, Li, Zhijian wrote: > > on 2021/9/9 21:42, Peter Maydell wrote: > > On Thu, 9 Sept 2021 at 11:36, Juan Quintela wrote: > > Fails to build, FreeBSD: > > > > ../src/migration/rdma.c:1146:23: error: use of undeclared identifier > > 'IBV_ADVISE_MR_ADVICE_PREFETCH_WRITE'

Re: [PATCH 1/4] target/arm: Add TB flag for "MVE insns not predicated"

On Fri, 3 Sept 2021 at 14:58, Richard Henderson wrote: > > On 9/2/21 5:09 PM, Peter Maydell wrote: > > Our current codegen for MVE always calls out to helper functions, > > because some byte lanes might be predicated. The common case is > > that in fact there is no predication active and all

Re: [PULL 0/7] Migration.next patches

on 2021/9/9 21:42, Peter Maydell wrote: On Thu, 9 Sept 2021 at 11:36, Juan Quintela wrote: Fails to build, FreeBSD: ../src/migration/rdma.c:1146:23: error: use of undeclared identifier 'IBV_ADVISE_MR_ADVICE_PREFETCH_WRITE' int advice = wr ? IBV_ADVISE_MR_ADVICE_PREFETCH_WRITE :

[RFC PATCH 4/5] target/i386: Define specific PT feature set for IceLake-server and Snowridge

For IceLake-server, it's just the same as using the default PT feature set since the default one is exact taken from ICX. For Snowridge, define it according to real SNR silicon capabilities. Signed-off-by: Xiaoyao Li --- target/i386/cpu.c | 20 1 file changed, 20

[RFC PATCH 1/5] target/i386: Print CPUID subleaf info for unsupported feature

Some CPUID leaves have meaningful subleaf index. Print the subleaf info in feature_word_description for CPUID features. Signed-off-by: Xiaoyao Li --- target/i386/cpu.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index

[RFC PATCH 3/5] target/i386: Enable host pass through of Intel PT

commit e37a5c7fa459 ("i386: Add Intel Processor Trace feature support") added the support of Intel PT by making CPUID[14] of PT as fixed feature set (from ICX) for any CPU model on any host. This truly breaks the PT exposing on Intel SPR platform because SPR has less supported bitmap

[RFC PATCH 0/5] Make Intel PT configurable

Initial Intel PT support was added by making it as fixed feature set as ICX's capabilities, which allowed different CPU model with PT enabled live migration on ICX host. However, it breaks the PT exposure/working on SPR machine. Because SPR has less PT capabilities regrading

[RFC PATCH 5/5] target/i386: Access MSR_IA32_RTIT_ADDRn based on guest CPUID configuration

KVM only allows userspace to access legal number of MSR_IA32_RTIT_ADDRn, which is enumrated by guest's CPUID(0x14,0x1):EAX[2:0], i.e., env->features[FEAT_14_1_EAX] & INTEL_PT_ADDR_RANGES_NUM_MASK Signed-off-by: Xiaoyao Li --- target/i386/cpu.c | 1 - target/i386/cpu.h | 2 ++

[RFC PATCH 2/5] target/i386: Introduce FeatureWordInfo for Intel PT CPUID leaf 0xD

CPUID leaf 0x14 subleaf 0x0 and 0x1 enumerate the resource and capability of Intel PT. Introduce FeatureWord FEAT_14_0_EBX, FEAT_14_1_EAX and FEAT_14_1_EBX, and complete FEAT_14_0_ECX. Thus all the features of Intel PT can be expanded when "-cpu host/max" and can be configured in named CPU model.

[PATCH] docs: link to archived Fedora code of conduct

Fedora has switched to a different CoC. QEMU's own code of conduct is based on the previous version and cites it as a source. Replace the link with one to the Wayback Machine. Signed-off-by: Paolo Bonzini --- docs/devel/code-of-conduct.rst | 4 ++-- 1 file changed, 2 insertions(+), 2

[PATCH] memory: remove incorrect RCU comment for address_space_read()

Although the doc comment says "Called within RCU critical section" the address_space_read() function takes the RCU read lock itself. There is no need for the caller to hold an RCU read lock. Cc: Paolo Bonzini Fixes: b2a44fcad74f1cc7a6786d38eba7db12ab2352ba ("address_space_read:

Re: [PATCH RFC v2 11/16] vfio-user: get and set IRQs

On Thu, Sep 09, 2021 at 05:50:39AM +, John Johnson wrote: > > > > On Sep 7, 2021, at 8:14 AM, Stefan Hajnoczi wrote: > > > > On Mon, Aug 16, 2021 at 09:42:44AM -0700, Elena Ufimtseva wrote: > >> From: John Johnson > >> > >> Signed-off-by: Elena Ufimtseva > >> Signed-off-by: John G

Re: [PATCH 1/4] target/arm: Add TB flag for "MVE insns not predicated"

On Fri, 3 Sept 2021 at 14:58, Richard Henderson wrote: > I think you need to go ahead and end the TB and resync immediately. > Just set dc->base.is_jmp = DISAS_UPDATE_NOCHAIN instead. Is there a rule for when we should set is_jmp to DISAS_UPDATE_NOCHAIN, when we should set it to

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