test_postcopy() is currently run twice - which is just a waste of resources
and time. The commit d1a27b169b2d that introduced the duplicate talked about
renaming the "postcopy/unix" test, but apparently it forgot to remove the
old entry. Let's do that now.
Fixes: d1a27b169b ("tests: Add postcopy
When KVM is not available, the i386 migration test also runs in a rather
slow fashion, since the guest code takes a couple of seconds to print
the "B"s on the serial console, and the migration test has to wait for
this each time. Let's increase the frequency here, too, so that the
delays in the
Waiting for the serial output can take a couple of seconds - and since
we're doing a lot of migration tests, this time easily sums up to
multiple minutes. But if a test is supposed to fail, it does not make
much sense to wait for the source to be in the right state first, so
we can skip the
We are currently facing the problem that the "gcov-gprof" CI jobs
in the gitlab-CI are running way too long - which happens since
the migration-tests have been enabled there recently.
These patches now speed up the migration tests, so that the
CI job should be fine again.
This is how it looked
The migration tests spend a lot of time waiting for a sign of live
of the guest on the serial console. The aarch64 migration code only
outputs "B"s every couple of seconds (at least it takes more than 4
seconds between each characeter on my x86 laptop). There are a lot
of migration tests, and if
On Fri, Aug 19, 2022 at 10:24 AM Weiwei Li wrote:
>
>
> 在 2022/8/19 上午11:09, Anup Patel 写道:
> > The arch review of AIA spec is completed and we now have official
> > extension names for AIA: Smaia (M-mode AIA CSRs) and Ssaia (S-mode
> > AIA CSRs).
> >
> > Refer, section 1.6 of the latest AIA
On Fri, Aug 19, 2022 at 12:11:40PM +1000, Alexey Kardashevskiy wrote:
>
>
> On 05/08/2022 19:39, Daniel Henrique Barboza wrote:
> > The pSeries machine never bothered with the common machine->fdt
> > attribute. We do all the FDT related work using spapr->fdt_blob.
> >
> > We're going to
在 2022/8/19 上午11:09, Anup Patel 写道:
The arch review of AIA spec is completed and we now have official
extension names for AIA: Smaia (M-mode AIA CSRs) and Ssaia (S-mode
AIA CSRs).
Refer, section 1.6 of the latest AIA v0.3.1 stable specification at
On Wed, Aug 10, 2022 at 1:04 AM Eugenio Perez Martin
wrote:
>
> On Tue, Aug 9, 2022 at 9:21 AM Jason Wang wrote:
> >
> > On Sat, Aug 6, 2022 at 12:39 AM Eugenio Pérez wrote:
> > >
> > > So the caller can choose which ASID is destined.
> > >
> > > No need to update the batch functions as they
On Thu, Aug 11, 2022 at 2:57 PM Eugenio Perez Martin
wrote:
>
> On Tue, Aug 9, 2022 at 7:43 PM Eugenio Pérez wrote:
> >
> > CVQ of net vhost-vdpa devices can be intercepted since the addition of
> > x-svq.
> > The virtio-net device model is updated. The migration was blocked because
> >
On Fri, 19 Aug 2022, Sean Christopherson wrote:
> On Thu, Aug 18, 2022, Kirill A . Shutemov wrote:
> > On Wed, Aug 17, 2022 at 10:40:12PM -0700, Hugh Dickins wrote:
> > > On Wed, 6 Jul 2022, Chao Peng wrote:
> > > But since then, TDX in particular has forced an effort into preventing
> > > (by
Cache the translation from guest to host address, so we may
use direct loads when we hit on the primary translation page.
Look up the second translation page only once, during translation.
This obviates another lookup of the second page within tb_gen_code
after translation.
Fixes a bug in that
These will be useful in properly ending the TB.
Signed-off-by: Richard Henderson
---
target/riscv/translate.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 38666ddc91..a719aa6e63 100644
---
Pass these along to translator_loop -- pc may be used instead
of tb->pc, and host_pc is currently unused. Adjust all targets
at one time.
Signed-off-by: Richard Henderson
---
include/exec/exec-all.h | 1 -
include/exec/translator.h | 24
Right now the translator stops right *after* the end of a page, which
breaks reporting of fault locations when the last instruction of a
multi-insn translation block crosses a page boundary.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1155
Signed-off-by: Richard Henderson
---
The current implementation is a no-op, simply returning addr.
This is incorrect, because we ought to be checking the page
permissions for execution.
Make get_page_addr_code inline for both implementations.
Signed-off-by: Richard Henderson
---
include/exec/exec-all.h | 85
We currently ignore PROT_EXEC on the initial lookup, and
defer raising the exception until cpu_ld*_code().
It makes more sense to raise the exception early.
Signed-off-by: Richard Henderson
---
accel/tcg/cpu-exec.c | 2 +-
accel/tcg/translate-all.c | 2 +-
2 files changed, 2 insertions(+),
From: Ilya Leoshkevich
Right now translator stops right *after* the end of a page, which
breaks reporting of fault locations when the last instruction of a
multi-insn translation block crosses a page boundary.
Signed-off-by: Ilya Leoshkevich
Reviewed-by: Richard Henderson
Message-Id:
From: Ilya Leoshkevich
Right now translator stops right *after* the end of a page, which
breaks reporting of fault locations when the last instruction of a
multi-insn translation block crosses a page boundary.
An implementation, like the one arm and s390x have, would require an
i386 length
Signed-off-by: Richard Henderson
---
include/exec/exec-all.h | 10 +-
accel/tcg/cputlb.c | 8
accel/tcg/plugin-gen.c | 4 ++--
accel/tcg/user-exec.c | 4 ++--
4 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/include/exec/exec-all.h
The only user can easily use translator_lduw and
adjust the type to signed during the return.
Signed-off-by: Richard Henderson
---
include/exec/translator.h | 1 -
target/i386/tcg/translate.c | 2 +-
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/include/exec/translator.h
The base qemu_ram_addr_from_host function is already in
softmmu/physmem.c; move the nofail version to be adjacent.
Signed-off-by: Richard Henderson
---
include/exec/cpu-common.h | 1 +
accel/tcg/cputlb.c| 12
softmmu/physmem.c | 12
3 files changed, 13
The function is not used outside of cpu-exec.c. Move it and
its subroutines up in the file, before the first use.
Signed-off-by: Richard Henderson
---
include/exec/exec-all.h | 3 -
accel/tcg/cpu-exec.c| 122
2 files changed, 61 insertions(+), 64
Simplify the implementation of get_page_addr_code_hostp
by reusing the existing probe_access infrastructure.
Signed-off-by: Richard Henderson
---
accel/tcg/cputlb.c | 76 --
1 file changed, 26 insertions(+), 50 deletions(-)
diff --git
We're about to start validating PAGE_EXEC, which means
that we've got to put this code into a section that is
both writable and executable.
Note that this test did not run on hardware beforehand either.
Signed-off-by: Richard Henderson
---
tests/tcg/i386/test-i386.c | 2 +-
1 file changed, 1
Map the stack executable if required by default or on demand.
Signed-off-by: Richard Henderson
---
include/elf.h| 1 +
linux-user/qemu.h| 1 +
linux-user/elfload.c | 19 ++-
3 files changed, 20 insertions(+), 1 deletion(-)
diff --git a/include/elf.h
We're about to start validating PAGE_EXEC, which means that we've
got to mark page zero executable. We had been special casing this
entirely within translate.
Signed-off-by: Richard Henderson
---
linux-user/elfload.c | 34 +++---
1 file changed, 31 insertions(+), 3
The mmap_lock is held around tb_gen_code. While the comment
is correct that the lock is dropped when tb_gen_code runs out
of memory, the lock is *not* dropped when an exception is
raised reading code for translation.
Signed-off-by: Richard Henderson
---
accel/tcg/cpu-exec.c | 12 ++--
From: Ilya Leoshkevich
Currently it's possible to execute pages that do not have PAGE_EXEC
if there is an existing translation block. Fix by clearing tb_jmp_cache
and invalidating TBs, which forces recheck of permission bits.
Signed-off-by: Ilya Leoshkevich
Message-Id:
From: Ilya Leoshkevich
Introduce a function that checks whether a given address is on the same
page as where disassembly started. Having it improves readability of
the following patches.
Signed-off-by: Ilya Leoshkevich
Message-Id: <20220811095534.241224-3-...@linux.ibm.com>
Reviewed-by:
We're about to start validating PAGE_EXEC, which means that we've
got to the vsyscall page executable. We had been special casing
this entirely within translate.
Signed-off-by: Richard Henderson
---
linux-user/elfload.c | 23 +++
1 file changed, 23 insertions(+)
diff --git
We're about to start validating PAGE_EXEC, which means
that we've got to mark the commpage executable. We had
been placing the commpage outside of reserved_va, which
was incorrect and lead to an abort.
Signed-off-by: Richard Henderson
---
linux-user/arm/target_cpu.h | 4 ++--
Hi Ilya,
After adding support for riscv (similar to s390x, in that we can
find the total insn length from the first couple of bits, so, easy),
I find that the test case doesn't work without all of the other
changes for PROT_EXEC, including the translator_ld changes.
Other changes from your v5:
The arch review of AIA spec is completed and we now have official
extension names for AIA: Smaia (M-mode AIA CSRs) and Ssaia (S-mode
AIA CSRs).
Refer, section 1.6 of the latest AIA v0.3.1 stable specification at
On Thu, 18 Aug 2022, Kirill A . Shutemov wrote:
> On Wed, Aug 17, 2022 at 10:40:12PM -0700, Hugh Dickins wrote:
> >
> > If your memory could be swapped, that would be enough of a good reason
> > to make use of shmem.c: but it cannot be swapped; and although there
> > are some references in the
> -Original Message-
> From: Jason Wang
> Sent: Thursday, August 18, 2022 4:04 PM
> To: Zhang, Chen
> Cc: Peter Maydell ; Li Zhijian
> ; qemu-dev
> Subject: Re: [PATCH V4 RESEND] net/colo.c: Fix the pointer issue reported by
> Coverity.
>
> On Wed, Aug 17, 2022 at 3:45 PM Zhang, Chen
On 05/08/2022 19:39, Daniel Henrique Barboza wrote:
The pSeries machine never bothered with the common machine->fdt
attribute. We do all the FDT related work using spapr->fdt_blob.
We're going to introduce HMP commands to read and save the FDT, which
will rely on setting machine->fdt
It works. I tested on RHEL8
Before this fix:
```
# /root/qemu/build/tools/virtiofsd/virtiofsd --socket-path=/tmp/sock -o
source=/home/test -d
[(null)] [ID: 00133152] virtio_session_mount: Waiting for vhost-user
socket connection...
```
After applying this patch
```
#
>-Original Message-
>From: Paolo Bonzini On Behalf Of Paolo Bonzini
>Sent: Wednesday, July 20, 2022 2:19 AM
>To: Christopherson,, Sean
>Cc: Duan, Zhenzhong ; qemu-
>de...@nongnu.org; mtosa...@redhat.com; lik...@tencent.com; Ma,
>XiangfeiX
>Subject: Re: [PATCH] i386: Disable BTS and
On 8/16/22 05:26, Alex Bennée wrote:
While forcing the CPU to unrealize by hand does trigger the clean-up
code we never fully free resources because refcount never reaches
zero. This is because QOM automatically added objects without an
explicit parent to /unattached/, incrementing the refcount.
On Thu, Aug 18, 2022 at 11:58 PM Peter Maydell wrote:
>
> On Thu, 18 Aug 2022 at 05:20, Alistair Francis wrote:
> >
> > On Tue, Aug 16, 2022 at 5:11 AM Peter Maydell
> > wrote:
> > >
> > > The riscv target incorrectly enabled semihosting always, whether the
> > > user asked for it or not.
On Thu, Aug 18, 2022 at 5:05 PM Peter Xu wrote:
>
> On Tue, Aug 16, 2022 at 06:12:50AM -0400, Emanuele Giuseppe Esposito wrote:
> > +static void kvm_memory_region_node_add(KVMMemoryListener *kml,
> > + struct kvm_userspace_memory_region
> > *mem)
> > +{
> >
On Fri, Jun 17, 2022 at 09:30:53PM +, Sean Christopherson wrote:
> > @@ -4088,7 +4144,12 @@ static int direct_page_fault(struct kvm_vcpu *vcpu,
> > struct kvm_page_fault *fault
> > read_unlock(>kvm->mmu_lock);
> > else
> > write_unlock(>kvm->mmu_lock);
> > -
On Thu, Aug 18, 2022, Kirill A . Shutemov wrote:
> On Wed, Aug 17, 2022 at 10:40:12PM -0700, Hugh Dickins wrote:
> > On Wed, 6 Jul 2022, Chao Peng wrote:
> > But since then, TDX in particular has forced an effort into preventing
> > (by flags, seals, notifiers) almost everything that makes it
Add cortex A35 core and enable it for virt board.
Signed-off-by: Hao Wu
Reviewed-by: Joe Komlodi
---
docs/system/arm/virt.rst | 1 +
hw/arm/virt.c| 1 +
target/arm/cpu64.c | 80
3 files changed, 82 insertions(+)
diff --git
User creatable root ports are being parented by the 'peripheral' or the
'peripheral-anon' container. This happens because this is the regular
QOM schema for sysbus devices that are added via the command line.
Let's make this QOM hierarchy similar to what we have with default root
ports, i.e. the
We have 2 helpers that amends the QOM and parent bus of a given object,
repectively. These 2 helpers are called together, and not by accident.
Due to QOM internals, doing an object_unparent() will result in the
device being removed from its parent bus. This means that changing the
QOM parent
Hi,
These are a couple of patches that got separated from the main series it
belonged to [1] that got already queued for 7.2. Patch 1 is new, patch
2 is a new version of patch 11 of [1].
The patches are based on ppc-7.2 [2].
[1]
Author: John Snow - https://gitlab.com/jsnow
Merge Request:
https://gitlab.com/qemu-project/python-qemu-qmp/-/merge_requests/18
... from: jsnow/python-qemu-qmp:new_release
... into: qemu-project/python-qemu-qmp:main
***If this MR is approved, after merge I will be tagging this commit as
On Tue, Aug 16, 2022 at 06:12:50AM -0400, Emanuele Giuseppe Esposito wrote:
> +static void kvm_memory_region_node_add(KVMMemoryListener *kml,
> + struct kvm_userspace_memory_region
> *mem)
> +{
> +MemoryRegionNode *node;
> +
> +node =
On Thu, Jul 14, 2022 at 12:13:53PM +0200, Hanna Reitz wrote:
> On 08.07.22 06:17, Stefan Hajnoczi wrote:
> > Avoid bounce buffers when QEMUIOVector elements are within previously
> > registered bdrv_register_buf() buffers.
> >
> > The idea is that emulated storage controllers will register guest
On Tue, Aug 16, 2022 at 06:12:49AM -0400, Emanuele Giuseppe Esposito wrote:
> kvm listeners now need ->commit callback in order to actually send
> the ioctl to the hypervisor. Therefore, add missing callers around
> address_space_set_flatview(), which in turn calls
>
On 8/18/22 20:49, Dr. David Alan Gilbert wrote:
> * Claudio Fontana (cfont...@suse.de) wrote:
>> On 8/18/22 18:31, Dr. David Alan Gilbert wrote:
>>> * Claudio Fontana (cfont...@suse.de) wrote:
On 8/18/22 14:38, Dr. David Alan Gilbert wrote:
> * Nikolay Borisov (nbori...@suse.com) wrote:
* Claudio Fontana (cfont...@suse.de) wrote:
> On 8/18/22 18:31, Dr. David Alan Gilbert wrote:
> > * Claudio Fontana (cfont...@suse.de) wrote:
> >> On 8/18/22 14:38, Dr. David Alan Gilbert wrote:
> >>> * Nikolay Borisov (nbori...@suse.com) wrote:
> [adding Juan and David to cc as I had missed
On 8/11/22 13:40, Nicholas Piggin wrote:
The chiptod is a pervasive facility which can keep a time, synchronise
it across multiple chips, and can move that time to or from the core
timebase units.
This adds a very basic initial emulation of chiptod registers. The
interesting thing about
On 8/18/22 20:09, Claudio Fontana wrote:
> On 8/18/22 18:31, Dr. David Alan Gilbert wrote:
>> * Claudio Fontana (cfont...@suse.de) wrote:
>>> On 8/18/22 14:38, Dr. David Alan Gilbert wrote:
* Nikolay Borisov (nbori...@suse.com) wrote:
> [adding Juan and David to cc as I had missed them. ]
From: Yusuke Okada
The "%f" specifier in g_date_time_format() is only available in glib
2.65.2 or later. If combined with older glib, the function returns null
and the timestamp displayed as "(null)".
For backward compatibility, g_date_time_get_microsecond should be used
to retrieve subsecond.
Added a test to see if the adjustment is being made correctly when an
underflow occurs and UE is set.
Signed-off-by: Lucas Mateus Castro (alqotel)
---
This patch will also fail without the underflow with UE set bugfix
Message-Id:<20220805141522.412864-3-lucas.ara...@eldorado.org.br>
---
Added a test to see if the adjustment is being made correctly when an
overflow occurs and OE is set.
Signed-off-by: Lucas Mateus Castro (alqotel)
---
The prctl patch is not ready yet, so this patch does as Richard
Henderson suggested and check the fp register in the signal handler
This patch
On 8/18/22 09:55, Vivian Wang wrote:
On 8/17/22 23:05, Ilya Leoshkevich wrote:
Hi,
I noticed that when we get a SEGV due to jumping to non-readable
memory, sometimes si_addr and program counter in siginfo_t are slightly
off. I tracked this down to the assumption that translators stop before
On Fri, 2022-08-19 at 00:55 +0800, Vivian Wang wrote:
> Hi,
> Could this be related to issue 1155 [1]? On RISC-V, I'm getting
> incorrect [m|s]tval/[m|s]epc combinations for page faults in system
> emulation and incorrect si_addr and program counter on SIGSEGV in
> user emulation. Since it seems
The "%f" specifier in g_date_time_format() is only available in glib
2.65.2 or later. If combined with older glib, the function returns null
and the timestamp displayed as "(null)".
For backward compatibility, g_date_time_get_microsecond should be used
to retrieve subsecond.
In this patch the
On 8/18/22 18:31, Dr. David Alan Gilbert wrote:
> * Claudio Fontana (cfont...@suse.de) wrote:
>> On 8/18/22 14:38, Dr. David Alan Gilbert wrote:
>>> * Nikolay Borisov (nbori...@suse.com) wrote:
[adding Juan and David to cc as I had missed them. ]
>>>
>>> Hi Nikolay,
>>>
On 11.08.22 г.
On 8/18/22 18:31, Dr. David Alan Gilbert wrote:
> * Claudio Fontana (cfont...@suse.de) wrote:
>> On 8/18/22 14:38, Dr. David Alan Gilbert wrote:
>>> * Nikolay Borisov (nbori...@suse.com) wrote:
[adding Juan and David to cc as I had missed them. ]
>>>
>>> Hi Nikolay,
>>>
On 11.08.22 г.
On 8/17/22 23:56, marcandre.lur...@redhat.com wrote:
From: Marc-André Lureau
The following changes since commit c7208a6e0d049f9e8af15df908168a79b1f99685:
Update version for v7.1.0-rc3 release (2022-08-16 20:45:19 -0500)
are available in the Git repository at:
On 8/18/22 10:17, Cédric Le Goater wrote:
Daniel,
On 8/17/22 17:08, BALATON Zoltan wrote:
Hello,
This is based on gitlab.com/danielhb/qemu/tree/ppc-7.2
This series contains the rest of Cédric's OOM'ify patches modified
according my review comments and some other clean ups I've noticed
-M none creates a guest without a vCPU, causing the following error:
$ ./qemu-system-x86_64 -qmp stdio -M none -accel kvm
{execute:qmp_capabilities}
{"return": {}}
{execute: query-stats-schemas}
Segmentation fault (core dumped)
Fix it by not querying the vCPU stats if first_cpu is NULL.
* Thomas Huth (th...@redhat.com) wrote:
> Waiting for the serial output can take a couple of seconds - and since
> we're doing a lot of migration tests, this time easily sums up to
> multiple minutes. But if a test is supposed to fail, it does not make
> much sense to wait for the source to be in
On 8/17/22 23:05, Ilya Leoshkevich wrote:
> Hi,
>
> I noticed that when we get a SEGV due to jumping to non-readable
> memory, sometimes si_addr and program counter in siginfo_t are slightly
> off. I tracked this down to the assumption that translators stop before
> the end of a page, while in
在 2022/8/18 6:09, Peter Xu 写道:
On Sat, Jul 23, 2022 at 03:49:16PM +0800, huang...@chinatelecom.cn wrote:
From: Hyman Huang(黄勇)
Implement dirty-limit convergence algo for live migration,
which is kind of like auto-converge algo but using dirty-limit
instead of cpu throttle to make migration
Add the pubkey currently used for signing PyPI releases of qemu.qmp to a
stable location where it can be referenced by e.g. Fedora RPM specfiles.
At present, the key happens to just simply be my own -- but future
releases may be signed by a different key. In that case, we can
increment '1.txt' to
在 2022/8/18 6:06, Peter Xu 写道:
On Sat, Jul 23, 2022 at 03:49:13PM +0800, huang...@chinatelecom.cn wrote:
From: Hyman Huang(黄勇)
Introduce "x-vcpu-dirty-limit-period" migration experimental
parameter, which is used to make dirtyrate calculation period
configurable.
Signed-off-by: Hyman
Hi,
This is used by a new series of Nuvoton SoC (NPCM8XX) which contains 4
Cortex A-35 cores.
I'll update the missing fields in a follow-up patch set.
On Thu, Aug 18, 2022 at 7:59 AM Peter Maydell
wrote:
> On Mon, 15 Aug 2022 at 22:35, Hao Wu wrote:
> >
> > Add cortex A35 core and enable it
On Wed, 17 Aug 2022 17:16:19 +0100
Jonathan Cameron wrote:
> On Thu, 11 Aug 2022 17:46:55 -0700
> Dan Williams wrote:
>
> > Dan Williams wrote:
> > > Bobo WL wrote:
> > > > Hi Dan,
> > > >
> > > > Thanks for your reply!
> > > >
> > > > On Mon, Aug 8, 2022 at 11:58 PM Dan Williams
> >
* Claudio Fontana (cfont...@suse.de) wrote:
> On 8/18/22 14:38, Dr. David Alan Gilbert wrote:
> > * Nikolay Borisov (nbori...@suse.com) wrote:
> >> [adding Juan and David to cc as I had missed them. ]
> >
> > Hi Nikolay,
> >
> >> On 11.08.22 г. 16:47 ч., Nikolay Borisov wrote:
> >>> Hello,
> >>>
Waiting for the serial output can take a couple of seconds - and since
we're doing a lot of migration tests, this time easily sums up to
multiple minutes. But if a test is supposed to fail, it does not make
much sense to wait for the source to be in the right state first, so
we can skip the
On Thu, 18 Aug 2022 at 17:11, Lucas Mateus Martins Araujo e Castro
wrote:
> Lucas wrote:
>> I would like gauge the interest in using Minicloud's infrastructure[1]
>> for the CI, talking with some people from there they are interested.
>> It has both ppc64 and pp64le images, multiple versions of 4
在 2022/8/18 6:07, Peter Xu 写道:
On Sat, Jul 23, 2022 at 03:49:14PM +0800, huang...@chinatelecom.cn wrote:
From: Hyman Huang(黄勇)
Introduce "vcpu-dirty-limit" migration parameter used
to limit dirty page rate during live migration.
"vcpu-dirty-limit" and "x-vcpu-dirty-limit-period" are
two
On 18/08/2022 12:32, Richard Henderson wrote:
On 8/17/22 09:57, Lucas Mateus Castro(alqotel) wrote:
+void sigfpe_handler(int sig, siginfo_t *si, void *ucontext)
+{
+ uint64_t t;
+ uint64_t ch = 0x5fcfffe4965a17e0ull;
+ asm (
+ "stfd 2, %0\n\t"
+ : "=m"(t)
+ :
+
ping
Any interest in this?
On 12/07/2022 11:51, Lucas Mateus Martins Araujo e Castro wrote:
Hi everyone!
I would like gauge the interest in using Minicloud's infrastructure[1]
for the CI, talking with some people from there they are interested.
It has both ppc64 and pp64le images, multiple
On 8/17/22 13:05, Michael S. Tsirkin wrote:
The following changes since commit c7208a6e0d049f9e8af15df908168a79b1f99685:
Update version for v7.1.0-rc3 release (2022-08-16 20:45:19 -0500)
are available in the Git repository at:
git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git
On 8/17/22 19:31, WANG Xuerui wrote:
Hmm, I've looked up more context and it is indeed reasonable to generally name the QEMU
models after real existing models. But in this case we could face a problem with
Loongson's nomenclature: all of Loongson 3A5000, 3C5000 and 3C5000L are LA464, yet they
On 8/17/22 09:57, Lucas Mateus Castro(alqotel) wrote:
+void sigfpe_handler(int sig, siginfo_t *si, void *ucontext)
+{
+uint64_t t;
+uint64_t ch = 0x5fcfffe4965a17e0ull;
+asm (
+"stfd 2, %0\n\t"
+: "=m"(t)
+:
+: "memory", "fr2"
+);
No, you need to
Hi Gerd, Michael, Paolo,
On Thu, Aug 18, 2022 at 01:56:14PM +0200, Gerd Hoffmann wrote:
> Hi,
>
> > > diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
> > > index 3a35193ff7..2e5dae9a89 100644
> > > --- a/hw/i386/pc_q35.c
> > > +++ b/hw/i386/pc_q35.c
> > > @@ -376,6 +376,7 @@ static void
In order feature is not a transparent feature in QEMU, only specific
devices(eg, virtio-net) support it.
Signed-off-by: Guo Zhi
---
hw/net/virtio-net.c| 1 +
include/hw/virtio/virtio.h | 4 +++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/hw/net/virtio-net.c
Hey Gerd,
On Tue, Aug 16, 2022 at 10:55:11AM +0200, Gerd Hoffmann wrote:
> Hi,
>
> > > We can make setup_data chaining work with OVMF, but the whole chain
> > > should be located in a GPA range that OVMF dictates.
> >
> > It sounds like what you describe is pretty OVMF-specific though,
> >
Follow VIRTIO 1.1 spec, we can only writing out a single used ring for a
batch of descriptors, and only notify guest when the batch of
descriptors have all been used.
We do that batch for tx, because the driver doesn't need to know the
length of tx buffer, while for rx, we don't apply the batch
In virtio-spec 1.1, new feature bit VIRTIO_F_IN_ORDER was introduced.
When this feature has been negotiated, virtio driver will use
descriptors in ring order: starting from offset 0 in the table, and
wrapping around at the end of the table. Virtio devices will always use
descriptors in the same
Replace the way we use mutex in parallels_co_check() for simplier
and less error prone code.
Signed-off-by: Alexander Ivanov
---
block/parallels.c | 26 --
1 file changed, 12 insertions(+), 14 deletions(-)
diff --git a/block/parallels.c b/block/parallels.c
index
We will add more and more checks so we need a better code structure
in parallels_co_check. Let each check performs in a separate loop
in a separate helper.
Signed-off-by: Alexander Ivanov
---
block/parallels.c | 84 +--
1 file changed, 52
We will add more and more checks so we need a better code structure
in parallels_co_check. Let each check performs in a separate loop
in a separate helper.
s->data_end fix relates to out-of-image check so move it
to the helper too.
Signed-off-by: Alexander Ivanov
---
block/parallels.c | 67
We will add more and more checks so we need a better code structure
in parallels_co_check. Let each check performs in a separate loop
in a separate helper.
Signed-off-by: Alexander Ivanov
---
block/parallels.c | 31 +--
1 file changed, 21 insertions(+), 10
BAT is written in the context of conventional operations over
the image inside bdrv_co_flush() when it calls
parallels_co_flush_to_os() callback. Thus we should not
modify BAT array directly, but call parallels_set_bat_entry()
helper and bdrv_co_flush() further on. After that there is no
need to
We will add more and more checks so we need a better code structure
in parallels_co_check. Let each check performs in a separate loop
in a separate helper.
Signed-off-by: Alexander Ivanov
---
block/parallels.c | 53 +++
1 file changed, 31
This helper will be reused in next patches during parallels_co_check
rework to simplify its code.
Signed-off-by: Alexander Ivanov
---
block/parallels.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/block/parallels.c b/block/parallels.c
index
When an image is opened for check there is no error if an offset in the BAT
points outside the image. In such a way we can repair the image.
Out-of-image offsets are repaired in the check, but data_end field
still points outside. Fix this field by file size.
Signed-off-by: Alexander Ivanov
---
Fix image inflation when offset in BAT is out of image.
Replace whole BAT syncing by flushing only dirty blocks.
Move all the checks outside the main check function in
separate functions
Use WITH_QEMU_LOCK_GUARD for simplier code.
v4 changes:
Move s->data_end fixing to parallels_co_check().
data_end field in BDRVParallelsState is set to the biggest offset present
in BAT. If this offset is outside of the image, any further write will create
the cluster at this offset and/or the image will be truncated to this
offset on close. This is definitely not correct.
Raise an error in
Make sure env->nested_state is cleaned up when a vCPU is reset, it may
be stale after an incoming migration, kvm_arch_put_registers() may
end up failing or putting vCPU in a weird state.
Reviewed-by: Maxim Levitsky
Signed-off-by: Vitaly Kuznetsov
---
target/i386/kvm/kvm.c | 37
On Thu, 18 Aug 2022, Cédric Le Goater wrote:
Daniel,
On 8/17/22 17:08, BALATON Zoltan wrote:
Hello,
This is based on gitlab.com/danielhb/qemu/tree/ppc-7.2
This series contains the rest of Cédric's OOM'ify patches modified
according my review comments and some other clean ups I've noticed
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