On Wednesday, May 1, 2013, Richard Henderson r...@twiddle.net wrote:
On 2013-04-30 07:36, John Rigby wrote:
uint32_t regs[16];
+
+/* Regs for A64 mode. */
+uint64_t xregs[31];
+uint64_t pc;
+uint64_t sp;
+uint32_t pstate;
+uint32_t aarch64_state; /* 1 if
On Tue, Apr 30, 2013 at 8:36 AM, John Rigby john.ri...@linaro.org wrote:
From: Alexander Graf ag...@suse.de
We should translate AArch64 mode separately from AArch32 mode. In AArch64
mode,
registers look vastly different, instruction encoding is completely different,
basically the system
On Tue, Apr 9, 2013 at 11:07 AM, Michal Novotny minov...@redhat.com wrote:
Hi,
I've just pulled the latest git repository of QEMU but it's failing the
compilation on missing virtio-9p-device.h header file:
CCx86_64-softmmu/target-i386/arch_memory_mapping.o
CC
On Fri, Apr 5, 2013 at 4:15 PM, Peter Maydell peter.mayd...@linaro.org wrote:
On 5 April 2013 15:06, Ivan Jovanovic jovanovic.d.i...@gmail.com wrote:
When I examine in_asm and out_asm logs I notice that before my program
starts emulating, dynamic linker code is being emulated, which is, of
On Thu, Mar 28, 2013 at 5:04 PM, Richard Henderson r...@twiddle.net wrote:
On 03/28/2013 08:56 AM, Peter Maydell wrote:
+#define TO_CPSR (1 20)
This is the S bit; I think it would be helpful if our #define
had a name that made that clearer...
Suggestions? I thought TO_CPSR was clear...
On Mon, Mar 25, 2013 at 4:03 PM, Richard Henderson r...@twiddle.net wrote:
On 03/24/2013 03:59 AM, Peter Maydell wrote:
PC is FF600400 so either we've messed it up already or this
is just 64 bit address space doesn't fit in a 32 bit one.
This is probably the fallback vdso address.
Hello,
On Tue, Mar 5, 2013 at 6:51 PM, Amit Shah amit.s...@redhat.com wrote:
From: Anthony Liguori aligu...@us.ibm.com
Signed-off-by: Anthony Liguori aligu...@us.ibm.com
Signed-off-by: Amit Shah amit.s...@redhat.com
---
qemu-char.c | 68
On Fri, Mar 15, 2013 at 4:44 PM, Anthony Liguori aligu...@us.ibm.com wrote:
Laurent Desnogues laurent.desnog...@gmail.com writes:
Hello,
On Tue, Mar 5, 2013 at 6:51 PM, Amit Shah amit.s...@redhat.com wrote:
From: Anthony Liguori aligu...@us.ibm.com
Signed-off-by: Anthony Liguori aligu
On Wed, Mar 13, 2013 at 10:51 AM, Peter Maydell
peter.mayd...@linaro.org wrote:
[...]
For now, I need a emulator to emulate more cores efficiently.I want to
analyze whether Qemu can be faster when it emulate more cores, while
parallelism maybe a good choice.
There has been some other research
On Tue, Mar 12, 2013 at 7:43 AM, Richard Henderson r...@twiddle.net wrote:
Changes v1-v2:
* Use more helper functions to handle K and N constraints.
* Improve add2/sub2.
* Improve epilogues, as suggested in the previous thread.
* Fix a typo in the name of the deposit helper.
*
On Wed, Feb 8, 2012 at 10:46 AM, Laurent Desnogues
laurent.desnog...@gmail.com wrote:
On Fri, Feb 3, 2012 at 3:49 PM, riku.voi...@linaro.org wrote:
From: Riku Voipio riku.voi...@linaro.org
Signed-off-by: Riku Voipio riku.voi...@linaro.org
---
linux-user/qemu.h |2 +-
1 files changed
On Wed, Mar 6, 2013 at 10:36 AM, Alexander Graf ag...@suse.de wrote:
Am 06.03.2013 um 08:11 schrieb Laurent Desnogues
laurent.desnog...@gmail.com:
On Wed, Mar 6, 2013 at 3:01 AM, Alexander Graf ag...@suse.de wrote:
This patch adds all the prerequisites for AArch64 support that didn't
fit
(This mail was previously sent by accident to Alexander only.)
On Wed, Mar 6, 2013 at 3:01 AM, Alexander Graf ag...@suse.de wrote:
We should translate AArch64 mode separately from AArch32 mode. In AArch64
mode,
registers look vastly different, instruction encoding is completely different,
On Wed, Mar 6, 2013 at 3:01 AM, Alexander Graf ag...@suse.de wrote:
This patch adds all the prerequisites for AArch64 support that didn't
fit into split up patches. It extends important bits in the core cpu
headers to also take AArch64 mode into account.
Signed-off-by: Alexander Graf
On Tue, Feb 26, 2013 at 12:46 AM, Alexander Graf ag...@suse.de wrote:
Older glib doesn't implement g_poll(). Most notably the glib version in use
on SLE11 is on 2.18 which is hit by this.
We do want to use g_poll() in the source however. So on older systems, just
wrap it with functions that
On Mon, Feb 25, 2013 at 3:43 PM, Richard Henderson r...@twiddle.net wrote:
On 2013-02-25 00:04, Peter Crosthwaite wrote:
commits 49b4c31efcce45ab714f286f14fa5d5173f9069d and
2de68a4900ef6eb67380b0c128abfe1976bc66e8 reworked the implementation of
adc_CC
and sub_CC. The new implementations (on
On Mon, Feb 25, 2013 at 8:01 PM, Richard Henderson r...@twiddle.net wrote:
V1-V2:
Dangit, that's what trying to be speedy gets you, failing to make
all of the changes you wrote in the comment. This time actually
fix the sub2 to add2 like I intended, not just the not portion.
The patch
On Wed, Feb 20, 2013 at 11:28 AM, Stefan Hajnoczi stefa...@redhat.com wrote:
Amos Kong ak...@redhat.com reported that file descriptors numbered higher
than 1024 could crash QEMU. This is due to the fixed size of the fd_set type
used for select(2) event polling.
This series converts the
On Fri, Feb 22, 2013 at 12:04 AM, Anthony Liguori aligu...@us.ibm.com wrote:
Since this is a pretty visible change for a lot of people, I thought I'd
send a top level note. The GTK UI is now committed and is the default
UI provided it's available.
For anyone counting, it's been a little
On Fri, Feb 22, 2013 at 11:36 AM, Daniel P. Berrange
berra...@redhat.com wrote:
On Fri, Feb 22, 2013 at 11:12:35AM +0100, Laurent Desnogues wrote:
On Fri, Feb 22, 2013 at 12:04 AM, Anthony Liguori aligu...@us.ibm.com
wrote:
Since this is a pretty visible change for a lot of people, I
the 32 bit loaded value into v rather than zero extending as
would be expected for a _u32 accessor. Put the cast back again to
restore the old behaviour.
This fixes the issue I mentioned a week ago, thanks.
Reviewed-by: Laurent Desnogues laurent.desnog...@gmail.com
Laurent
Signed-off
On Thu, Jan 24, 2013 at 9:37 PM, Richard Henderson r...@twiddle.net wrote:
On 01/24/2013 08:57 AM, Laurent Desnogues wrote:
On Thu, Jan 24, 2013 at 5:52 PM, Richard Henderson r...@twiddle.net
wrote:
On 2013-01-24 08:46, Laurent Desnogues wrote:
I gave a quick try a your branch. My host
On Thu, Jan 24, 2013 at 5:02 AM, Richard Henderson r...@twiddle.net wrote:
This is a re-working of Paolo's eflags cleanup from October, which
I consider a pre-requisite to implementing the ADX extension. I've
rearranged most of the patches in trivial ways, and some quite
significantly.
I've
Hi,
I know this was committed some time ago, but I have a
comment about this patch.
On Sat, Jan 5, 2013 at 1:39 AM, Richard Henderson r...@twiddle.net wrote:
The previous formuation with multiple assignments to __typeof(*hptr) falls
down when hptr is qualified const. E.g. with const struct S
On Mon, Dec 3, 2012 at 9:43 AM, Peter Cheung mcheun...@hotmail.com wrote:
Hi
Is there a func call to safely shutdown VM and quit qemu?
I am using qemu_system_shutdown_request(). I don't know it that's
the best way of quitting, but it works for me.
HTH,
Laurent
On Tue, Oct 30, 2012 at 1:18 AM, y...@ohm.aurel32.net wrote:
From: Aurelien Jarno aurel...@aurel32.net
The TCG arm backend considers likely that the offset to the TLB
entries does not exceed 12 bits for mem_index = 0. In practice this is
not true for at least the MIPS target.
The current
On Tue, Oct 16, 2012 at 9:07 PM, Richard Henderson r...@twiddle.net wrote:
On 2012-10-16 20:49, Emmanuel Blot wrote:
Is there any way to force QEmu to disable the TB cache so that the
translation occurs each time a target instruction is loaded, or a
clever way to print out the address of each
On Tue, Oct 9, 2012 at 11:13 PM, Peter Maydell peter.mayd...@linaro.org wrote:
On 9 October 2012 21:30, Aurelien Jarno aurel...@aurel32.net wrote:
The TCG arm backend considers likely that the offset to the TLB
entries does not exceed 12 bits for mem_index = 0. In practice this is
not true for
On Tue, Oct 9, 2012 at 10:30 PM, Aurelien Jarno aurel...@aurel32.net wrote:
Use ldr pc, [pc, #-4] kind of branch for direct jump. This removes the
need to flush the icache on TB linking, and allow to remove the limit
on the code generation buffer.
I'm not sure I like it. In general having
On Wed, Oct 10, 2012 at 4:28 PM, Aurelien Jarno aurel...@aurel32.net wrote:
On Wed, Oct 10, 2012 at 03:21:48PM +0200, Laurent Desnogues wrote:
On Tue, Oct 9, 2012 at 10:30 PM, Aurelien Jarno aurel...@aurel32.net wrote:
Use ldr pc, [pc, #-4] kind of branch for direct jump. This removes
On Tue, Oct 9, 2012 at 3:28 PM, Richard Henderson r...@twiddle.net wrote:
On 10/09/2012 06:16 AM, Peter Maydell wrote:
That is, we could drop CONFIG_USER_GUEST_BASE. Does anybody have
a practical use case for the --disable-guest-base configuration?
Nope, because the backends are good at
On Sat, Sep 22, 2012 at 11:37 PM, Stefan Weil s...@weilnetz.de wrote:
Am 14.09.2012 19:02, schrieb Stefan Weil:
The old code aborted configure when no emulation target was selected.
Even after removing the 'exit 1', it tried to read from STDIN
when QEMU was configured with
configure'
On Wed, Sep 19, 2012 at 10:00 PM, Aurelien Jarno aurel...@aurel32.net wrote:
This patch series rework the copy propagation in order to generate
better code. The first two patches are cleanup and bug fixes, the third
patch is the heart of the series, and the remaining ones are small
On Mon, Sep 17, 2012 at 1:08 AM, Aurelien Jarno aurel...@aurel32.net wrote:
Now that the setcond TCG op is available, it's possible to replace
shl and shr helpers by TCG code. The code generated by TCG is slightly
longer than the code generated by GCC for the helper but is still worth
it as
On Mon, Sep 17, 2012 at 11:43 AM, Peter Maydell
peter.mayd...@linaro.org wrote:
On 17 September 2012 10:30, Laurent Desnogues
laurent.desnog...@gmail.com wrote:
On Mon, Sep 17, 2012 at 1:08 AM, Aurelien Jarno aurel...@aurel32.net wrote:
+#define GEN_SHIFT(name
On Tue, Sep 11, 2012 at 8:56 PM, Eduardo Habkost ehabk...@redhat.com wrote:
On Mon, Sep 10, 2012 at 06:00:54PM -0500, Anthony Liguori wrote:
Daniel P. Berrange berra...@redhat.com writes:
From: Daniel P. Berrange berra...@redhat.com
Allow passing of '--target-list=' to configure to
Sorry, I had missed this patch...
On Tue, Sep 11, 2012 at 9:02 PM, Eduardo Habkost ehabk...@redhat.com wrote:
commit 66d5499b3754b83c09487259c08fe2ce73188a59 broke the support for
comma-separated target lists on the --target-list option. e.g.:
$ ./configure
On Thursday, August 16, 2012, Oi Khote oikh...@hotmail.com wrote:
So how exactly does VFP is being emulated.
QEMU uses a library for FP computations, based on the softfloat package.
Laurent
On Thu, Aug 16, 2012 at 7:49 PM, Steven wangwangk...@gmail.com wrote:
[...]
I want to get the guest memory address in the instruction mov
0x4(%ebx) %eax, whic is 0x4(%ebx).
Since %ebx is not resolved until the execution time, the code in
softmmu_header.h does not generate any hit or miss
On Sat, Aug 11, 2012 at 5:41 AM, Steven wangwangk...@gmail.com wrote:
[...]
I want to get the guest physical address of a pc. I note the part of
the function cpu_x86_handle_mmu_fault will do something like page
walking to convert a pc to its guest physical address. I think this is
the guest
On Thu, Aug 2, 2012 at 2:20 PM, Itaru Kitayama kitay...@cl.bb4u.ne.jp wrote:
The recent upstream highbank kernel uses smc to enable its L2 cache,
but on a qemu virt machine
it is not supported yet. Is it likely supported by qemu soon? What is
the time frame for that?
For other people reading
On Fri, Aug 3, 2012 at 10:37 AM, Peter Maydell peter.mayd...@linaro.org wrote:
[...]
http://git.linaro.org/gitweb?p=people/rikuvoipio/qemu.git;a=shortlog;h=refs/heads/linaro
That's just a personal (and as you say old) copy of qemu-linaro.
qemu-linaro proper is here:
On Mon, Jul 30, 2012 at 6:40 PM, Jose Cano Reyes jc...@ac.upc.edu wrote:
I am trying to add a new integer parameter to an existing helper and call
this helper in targeti386/translate.c. I have several problems:
1) I cannot add an integer parameter to the helper, the compiler says that
it must
On Tue, Jul 31, 2012 at 5:09 PM, Jose Cano Reyes jc...@ac.upc.edu wrote:
- So, how ca I obtain the value that TCGv_i32 represents?
In the generated code (that is after TCG is translated to host
machine code), you'll et your value in your helper. If you mean
before running the helper, then it's
On Thu, Jul 19, 2012 at 5:29 PM, Michael Eager ea...@eagerm.com wrote:
I'm interested in using QEMU to test gcc for a processor.
This is a hard-metal target -- there is no operating system.
Can anyone make suggestions on how to do this?
You could look at how QEMU implements semihosting for
On Thu, Jul 5, 2012 at 4:06 PM, Peter Maydell peter.mayd...@linaro.org wrote:
[...]
case $target_arch2 in
alpha | sparc* | xtensa* | ppc*)
echo CONFIG_TCG_PASS_AREG0=y $config_target_mak
+# qemu_ld/st optimization is not available with CONFIG_TCG_PASS_AREG0
+
On Fri, Jun 15, 2012 at 12:30 AM, Lluís Vilanova vilan...@ac.upc.edu wrote:
[...]
Now that I think of it, you will have problems generating code to surround
each
qemu_ld/st with a lightweight mechanism to get the time. In x86 it would be
rdtsc, but you want to generate a host rdtsc
On Wed, Jun 13, 2012 at 5:14 AM, 陳韋任 (Wei-Ren Chen)
che...@iis.sinica.edu.tw wrote:
Hi all,
I suspect that guest memory access (qemu_ld/qemu_st) account for the major of
time spent in system mode. I would like to know precisely how much (if
possible).
We use tools like perf [1] before, but
On Thu, May 31, 2012 at 9:07 PM, Ira Ray Jenkins
irarayjenk...@gmail.com wrote:
On Wed, May 30, 2012 at 10:30 AM, Laurent Desnogues
laurent.desnog...@gmail.com wrote:
On Wed, May 30, 2012 at 3:20 AM, Peter Maydell peter.mayd...@linaro.org
wrote:
On 30 May 2012 02:00, Ira Ray Jenkins
On Wed, May 30, 2012 at 3:20 AM, Peter Maydell peter.mayd...@linaro.org wrote:
On 30 May 2012 02:00, Ira Ray Jenkins irarayjenk...@gmail.com wrote:
What I would like is to be able to get the physical addresses of both
data and instructions. Can anyone help me work through how to get the
Hello,
On Thu, Mar 22, 2012 at 12:51 PM, Paolo Bonzini pbonz...@redhat.com wrote:
While QMP in general is designed so that it is possible to ignore
unknown arguments, in the case of the QMP server it is better to
reject them to detect bad clients. In fact, we're already doing
this at the top
On Tue, Mar 27, 2012 at 9:59 PM, Artyom Tarasenko atar4q...@gmail.com wrote:
On Tue, Mar 27, 2012 at 7:01 PM, Laurent Desnogues
laurent.desnog...@gmail.com wrote:
On Tue, Mar 27, 2012 at 6:48 PM, Blue Swirl blauwir...@gmail.com wrote:
On Tue, Mar 27, 2012 at 13:40, Laurent Desnogues
On Mon, Mar 26, 2012 at 7:02 PM, Blue Swirl blauwir...@gmail.com wrote:
[...]
At least stack protector is protecting more code than before (for
example TLB miss handler), but could overhead from that amount to 5%?
Otherwise there should be just a few extra register moves here and
there, that
On Tue, Mar 27, 2012 at 6:48 PM, Blue Swirl blauwir...@gmail.com wrote:
On Tue, Mar 27, 2012 at 13:40, Laurent Desnogues
laurent.desnog...@gmail.com wrote:
On Mon, Mar 26, 2012 at 7:02 PM, Blue Swirl blauwir...@gmail.com wrote:
[...]
At least stack protector is protecting more code than
On Mon, Mar 19, 2012 at 11:10 PM, Peter Maydell
peter.mayd...@linaro.org wrote:
On 19 March 2012 21:56, Blue Swirl blauwir...@gmail.com wrote:
-DEF_HELPER_4(neon_tbl, i32, i32, i32, i32, i32)
+DEF_HELPER_5(neon_tbl, i32, env, i32, i32, i32, i32)
--- a/target-arm/translate.c
+++
On Mon, Mar 19, 2012 at 10:55 PM, Blue Swirl blauwir...@gmail.com wrote:
Convert ARM to AREG0 free operation. Survives simple tests.
After fixing the issue about tbl helper usage, I could run some
simple linux-user tests and boot a rather large Linux image.
It looks like the kernel boot is about
-by: Laurent Desnogues laurent.desnog...@gmail.com
The only point I dislike isn't directly related to this patch:
the use of illegal_op that behaves exactly as UNDEF
looks odd.
Laurent
---
This is one of those patches where I wasn't sure whether to try
to split it into a whitespace-only part
On Wed, Feb 15, 2012 at 3:31 PM, Anthony Liguori anth...@codemonkey.ws wrote:
Please respond to this note with an '+1', or an Ack, to vote for this icon.
Ack
Laurent
2012/2/14 Lluís Vilanova vilan...@ac.upc.edu:
Artyom Tarasenko writes:
[...]
Here it looks like compute_all_sub and compute_all_sub_xcc are
good candidates for optimizing: together they take the same amount of
time as cpu_sparc_exec. I guess both operations would be trivial in
the x86_64
On Tue, Feb 14, 2012 at 4:15 PM, Artyom Tarasenko atar4q...@gmail.com wrote:
2012/2/14 Laurent Desnogues laurent.desnog...@gmail.com:
2012/2/14 Lluís Vilanova vilan...@ac.upc.edu:
Artyom Tarasenko writes:
[...]
Here it looks like compute_all_sub and compute_all_sub_xcc are
good candidates
On Fri, Feb 3, 2012 at 3:49 PM, riku.voi...@linaro.org wrote:
From: Riku Voipio riku.voi...@linaro.org
Signed-off-by: Riku Voipio riku.voi...@linaro.org
---
linux-user/qemu.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/linux-user/qemu.h b/linux-user/qemu.h
On Tue, Jan 17, 2012 at 7:50 PM, Peter Maydell peter.mayd...@linaro.org wrote:
2012/1/13 James Greensky gsk...@gmail.com:
Sure, usually a tb chain is setup after a subsequent tb is
found/constructed in the loop in cpu_exec when a tb returns.
Taken/non-taken branch chaining is implemented by
On Tue, Jan 17, 2012 at 8:06 PM, Laurent Desnogues
laurent.desnog...@gmail.com wrote:
On Tue, Jan 17, 2012 at 7:50 PM, Peter Maydell peter.mayd...@linaro.org
wrote:
2012/1/13 James Greensky gsk...@gmail.com:
Sure, usually a tb chain is setup after a subsequent tb is
found/constructed
On Tue, Nov 8, 2011 at 2:00 PM, Jason Wessel jason.wes...@windriver.com wrote:
The maxsd instruction needs to take into account the sign of the
numbers 64 bit numbers. This is a regression that was introduced in
347ac8e356 (target-i386: switch to softfloat).
The case that fails is:
maxsd
On Mon, Sep 26, 2011 at 10:01 AM, Mulyadi Santosa
mulyadi.sant...@gmail.com wrote:
Hi...
On Mon, Sep 26, 2011 at 14:46, Jan Kiszka jan.kis...@siemens.com wrote:
This increases the overhead of frequently executed helpers.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
IMHO, stack
On Fri, Jul 1, 2011 at 2:57 PM, Jakub Jermar ja...@jermar.eu wrote:
[...]
When _not_ singlestepping via GDB's `stepi`, the testcase will fail and
crash Qemu like this:
qemu: fatal: Trap 0x0101 while trap level (5) = MAXTL (5), Error state
register dumped here
On the other hand, when I
On Fri, Jul 1, 2011 at 4:11 PM, Jakub Jermar ja...@jermar.eu wrote:
[...]
Actually, the testcase can be further reduced into:
.global _start
.text
.space 0x20
_start:
set 110393, %i1
set 0x40, %i2
cmp %i1, %i2
udivx %g0, 1, %g0
movgu %xcc, %i2,
On Fri, Jul 1, 2011 at 5:03 PM, Artyom Tarasenko atar4q...@gmail.com wrote:
[...]
I find it odd that udivx is using cpu_cc_src and cpu_cc_src2. Using
dedicated local temps seems to fix the issue.
Do we need to copy cpu_src* to further temps at all? IMHO
-
On Fri, Jul 1, 2011 at 9:28 PM, Artyom Tarasenko atar4q...@gmail.com wrote:
udivx and sdvix don't modify condition flags, so they shall not
overwrite cpu_cc_*
Looks good to me.
Laurent
Signed-off-by: Artyom Tarasenko atar4q...@gmail.com
---
target-sparc/translate.c | 32
On Fri, Jun 24, 2011 at 4:44 AM, Max Filippov jcmvb...@gmail.com wrote:
Hello guys.
I'm running qemu on x86_64 host.
It's clean build from git sources dated 2011.05.19, commit
1fddfba129f5435c80eda14e8bc23fdb888c7187
I have the following output from log trace,op,out_asm:
Trace 0x4000a310
On Fri, Jun 24, 2011 at 10:35 AM, Max Filippov jcmvb...@gmail.com wrote:
[...]
Yes, I've noticed it (however, after I sent this mail).
But (1) quoted OUT is the last OUT for this host address range in the log and
(2) in gdb I set b tlb_fill if retaddr == 0x4000a369 and made some steps.
You
On Tue, May 24, 2011 at 1:31 PM, Kirill Batuzov batuz...@ispras.ru wrote:
[...]
Gathered statistics shows some interesting things too. I've run matrix
multiplication benchmark (guest - ARM, host - x86, linux-user mode, with
my patches applied) and here are the results:
spill count
On Sun, May 22, 2011 at 7:10 PM, Peter Maydell peter.mayd...@linaro.org wrote:
On 22 May 2011 17:55, Blue Swirl blauwir...@gmail.com wrote:
For ARM, the handcrafted instructions below need to be changed to save also
r7:
/* stmdb sp!, { r4 - r6, r8 - r11, lr } */
tcg_out32(s, (COND_AL
On Sat, May 21, 2011 at 1:31 AM, Andreas Färber andreas.faer...@web.de wrote:
[...]
Has anyone evaluated reusing LLVM optimization passes for TCG? Or maybe
GIMPL if there's an equivalent?
IMHO the qemu_ld/st semantics and the size of TB blocks
will always limit the usefulness of more involved
On Sun, May 15, 2011 at 9:15 AM, Blue Swirl blauwir...@gmail.com wrote:
On Sun, May 15, 2011 at 1:04 AM, Aurelien Jarno aurel...@aurel32.net wrote:
On Sun, May 15, 2011 at 12:52:35AM +0300, Blue Swirl wrote:
On Sun, May 15, 2011 at 12:16 AM, Aurelien Jarno aurel...@aurel32.net
wrote:
On
On Sun, May 15, 2011 at 1:33 PM, Blue Swirl blauwir...@gmail.com wrote:
[...]
x86_64 uses r14 as TCG_AREG0. Despite the instructions being quite
simple (only 2 movi_i32), the resulting code makes 2 access to env to
save the two registers. Having to reload the env pointer each time to a
On Thu, Apr 21, 2011 at 4:57 PM, Artyom Tarasenko atar4q...@gmail.com wrote:
On Tue, Apr 12, 2011 at 4:14 AM, Igor Kovalenko
igor.v.kovale...@gmail.com wrote:
Do you have public test case?
It is possible to code this delay slot write test but real issue may
be corruption elsewhere.
The test
On Thu, Apr 21, 2011 at 9:45 PM, Igor Kovalenko
igor.v.kovale...@gmail.com wrote:
On Thu, Apr 21, 2011 at 7:44 PM, Laurent Desnogues
laurent.desnog...@gmail.com wrote:
On Thu, Apr 21, 2011 at 4:57 PM, Artyom Tarasenko atar4q...@gmail.com
wrote:
On Tue, Apr 12, 2011 at 4:14 AM, Igor Kovalenko
On Thu, Feb 24, 2011 at 12:10 PM, Paolo Bonzini pbonz...@redhat.com wrote:
On 02/23/2011 08:04 PM, Aurelien Jarno wrote:
Actually that's the reason why i386 doesn't use softfloat, as all the
trigonometric use libm, and the bridge between softfloat and libm is not
working correctly (plenty of
On Wed, Feb 23, 2011 at 9:16 AM, Peter Maydell peter.mayd...@linaro.org wrote:
On 18 February 2011 07:12, Gerhard Wiesinger li...@wiesinger.com wrote:
Issue 1.) with FPU still present
I tracked down the problematic code and it is a rounding error from double
precision to 64bit floats: Any
On Sun, Mar 7, 2010 at 2:53 PM, Anthony Liguori anth...@codemonkey.ws wrote:
[...]
Removing libqemu.a was technically ok, but throws a license problem:
Every file contains a copyright/license. The statement in the top level is
just a statement of intention. It's to make sure that people do
On Wed, Feb 10, 2010 at 10:38 PM, Damion Yates dam...@google.com wrote:
[...]
Should clone()/fork() work? Has anyone been able to run wine ./blah.exe
under user-linux mode of qemu on arm or indeed any other non x86 based
CPU ?
I forgot to mention NPTL is not supported for x86 which
will be an
On Wed, Feb 10, 2010 at 10:38 PM, Damion Yates dam...@google.com wrote:
I've grabbed the latest stable qemu and compiled under scratchbox. I
hit an issue compiling it, with no __builtin__clear_cache() so linked in
a kludge.c containing a call to __clear_cache() with the params passed
as they
On Mon, Feb 8, 2010 at 12:47 PM, Riku Voipio riku.voi...@iki.fi wrote:
On Sun, Feb 07, 2010 at 02:02:31PM +0100, Laurent Desnogues wrote:
On Sun, Feb 7, 2010 at 1:54 PM, Laurent Desnogues
laurent.desnog...@gmail.com wrote:
On Fri, Feb 5, 2010 at 4:52 PM, Riku Voipio riku.voi...@iki.fi wrote
On Sun, Feb 7, 2010 at 1:22 AM, Jamie Lokier ja...@shareable.org wrote:
[...]
How would you achieve that? Your guest OS
doesn't necessarily have the code mapped. I
think this has to be considered as other syscalls,
though slightly different.
There is no guest OS when doing -user
On Fri, Feb 5, 2010 at 4:52 PM, Riku Voipio riku.voi...@iki.fi wrote:
From: Riku Voipio riku.voi...@nokia.com
The rounding/truncating options were inverted. truncating
was done when rounding was meant and vice verse.
Signed-off-by: Riku Voipio riku.voi...@nokia.com
Acked-by: Laurent
juha.riihim...@nokia.com
Signed-off-by: Riku Voipio riku.voi...@nokia.com
Acked-by: Laurent Desnogues laurent.desnog...@gmail.com
Laurent
---
target-arm/translate.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/target-arm/translate.c b/target-arm/translate.c
On Fri, Feb 5, 2010 at 4:52 PM, Riku Voipio riku.voi...@iki.fi wrote:
From: Juha Riihimäki juha.riihim...@nokia.com
add an extra check in two registers and a shift to ensure element
size decoding logic cannot fail.
Signed-off-by: Juha Riihimäki juha.riihim...@nokia.com
Signed-off-by: Riku
On Sun, Feb 7, 2010 at 1:54 PM, Laurent Desnogues
laurent.desnog...@gmail.com wrote:
On Fri, Feb 5, 2010 at 4:52 PM, Riku Voipio riku.voi...@iki.fi wrote:
From: Juha Riihimäki juha.riihim...@nokia.com
add an extra check in two registers and a shift to ensure element
size decoding logic cannot
On Sat, Feb 6, 2010 at 8:49 AM, Stefan Weil w...@mail.berlios.de wrote:
[...]
I tested two different hosts with x86_64-linux-user:
* 32 bit Intel (i386) - does not work with your patch
For me x86_64 on i386 has always failed without
even calling vsyscall :-)
* 64 bit AMD (x86_64) - works
On Fri, Feb 5, 2010 at 11:57 PM, Stefan Weil w...@mail.berlios.de wrote:
Laurent Desnogues schrieb:
[...]
I'm still struggling with bntest and other x86_64-linux-user software
calling any of the vsyscall functions.
Laurent, your vsyscall patch only works on x86_64 hosts.
A lot of software
On Thu, Feb 4, 2010 at 6:26 PM, Utkarsh Sopan utkarsh.so...@coe.dce.edu wrote:
Can you tell me what is the status of adding MIPS64 support?
as at the wiki page it showed Red earlier.
Look here: http://git.aurel32.net/?p=qemu.git;a=summary
Laurent
On Wed, Feb 3, 2010 at 11:10 AM, Taimoor Mirza mooni_mi...@hotmail.com wrote:
Hi all,
I have been trying to use VGA card and LCD for integrator 926. I've built my
kernel PLUS with graphics support. I used following command to run my PLUS
application on qemu:
qemu-system-arm -M integratorcp
On Wed, Feb 3, 2010 at 5:53 PM, Utkarsh Sopan utkarsh.so...@coe.dce.edu wrote:
I am trying to add support for MIPS 64 as Host machine as my academic
project.
Note that some work has already been done for MIPS host
support.
I am new to QEMU.
Problem is I dont have a MIPS 64 machine to test
On Sat, Jan 30, 2010 at 10:30 AM, Stefan Weil w...@mail.berlios.de wrote:
Laurent Desnogues schrieb:
On Sat, Jan 30, 2010 at 12:04 AM, Stefan Weil w...@mail.berlios.de
wrote:
[...]
that was a good suggestion. bntest raises a segmentation fault
(NULL pointer, p == 0, see below) with qemu
On Sat, Jan 30, 2010 at 10:30 AM, Stefan Weil w...@mail.berlios.de wrote:
Laurent Desnogues schrieb:
On Sat, Jan 30, 2010 at 12:04 AM, Stefan Weil w...@mail.berlios.de
wrote:
[...]
that was a good suggestion. bntest raises a segmentation fault
(NULL pointer, p == 0, see below) with qemu
On Sat, Jan 30, 2010 at 12:04 AM, Stefan Weil w...@mail.berlios.de wrote:
[...]
that was a good suggestion. bntest raises a segmentation fault
(NULL pointer, p == 0, see below) with qemu-x86_64 on a x86_64 host.
Compile bntest statically and it should work.
x86_64 user mode is completely
On Thu, Jan 28, 2010 at 11:44 AM, Bastien ROUCARIES
roucaries.bast...@gmail.com wrote:
Forget to cc
On Sat, Jan 23, 2010 at 11:40 PM, Anthony Liguori anth...@codemonkey.ws
wrote:
On 01/21/2010 10:27 AM, Bastien ROUCARIES wrote:
Hi,
What is the step in order to get qemu android merged
riku.voi...@nokia.com
Acked-by: Laurent Desnogues laurent.desnog...@gmail.com
Laurent
---
target-arm/helper.c | 16 --
target-arm/translate.c | 55
2 files changed, 55 insertions(+), 16 deletions(-)
diff --git a/target
On Tue, Jan 26, 2010 at 5:00 PM, Riku Voipio riku.voi...@iki.fi wrote:
From: Riku Voipio riku.voi...@nokia.com
If you compile applications with gcc -mtp=cp15, __thread
access's will generate an abort. Implement accessing allowed
cp15.c13 registers on ARMv6K+ in linux-user.
Signed-off-by:
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