On Tue, 14 Jul 2015 15:55:24 +0200
Gerd Hoffmann kra...@redhat.com wrote:
On Do, 2015-07-09 at 21:04 -0300, Paulo Alcantara wrote:
This patch initialises root complex register block BAR in order to
support TCO watchdog emulation features on QEMU.
qemu patches are merged, committed
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
hw/acpi/ich9.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
index 5fb7a87..f04f6dc 100644
--- a/hw/acpi/ich9.c
+++ b/hw/acpi/ich9.c
@@ -206,9 +206,6 @@ const VMStateDescription vmstate_ich9_pm
This patch initialises root complex register block BAR in order to
support TCO watchdog emulation features on QEMU.
Cc: Kevin O'Connor ke...@koconnor.net
Cc: Gerd Hofmann kra...@redhat.com
Cc: Paolo Bonzini pbonz...@redhat.com
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
v1 - v2
On Wed, 1 Jul 2015 15:31:31 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On Wed, Jul 01, 2015 at 03:18:41PM +0200, Paolo Bonzini wrote:
On 28/06/2015 19:58, Paulo Alcantara wrote:
If the signal is sampled high, this indicates that the system is
strapped to the No Reboot mode
On Sun, 28 Jun 2015 10:37:58 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On Sat, Jun 27, 2015 at 02:56:33PM -0300, Paulo Alcantara wrote:
If the signal is sampled high, this indicates that the system is
strapped to the No Reboot mode (ICH9 will disable the TCO Timer
system reboot
-by: Paulo Alcantara pca...@zytor.com
---
v7 - v8:
* change property name to noreboot
* default noreboot property to high
* define property in dc-props
* update tco tests to support and exercise noreboot property
---
hw/acpi/tco.c | 2 +-
hw/isa/lpc_ich9.c | 6 ++
include/hw
6) set and get of TCO control and status bits
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
v1 - v2:
* some cleanup
* add test for TCO_LOCK bit
v2 - v3:
* add tests for TCO control status bits
* fix check of SECOND_TO_STS bit (it's set in TCO2_STS reg)
v3 - v4:
* add more
detection,
etc. are not implemented yet.
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
v1 - v2:
* add migration support for TCO I/O device state
* wake up only when total time expired instead of every 0.6s
* some cleanup suggested by Paolo Bonzini
v2 - v3:
* set SECOND_TO_STS
6) set and get of TCO control and status bits
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
v1 - v2:
* some cleanup
* add test for TCO_LOCK bit
v2 - v3:
* add tests for TCO control status bits
* fix check of SECOND_TO_STS bit (it's set in TCO2_STS reg)
v3 - v4:
* add more
detection,
etc. are not implemented yet.
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
v1 - v2:
* add migration support for TCO I/O device state
* wake up only when total time expired instead of every 0.6s
* some cleanup suggested by Paolo Bonzini
v2 - v3:
* set SECOND_TO_STS
-by: Paulo Alcantara pca...@zytor.com
---
hw/acpi/tco.c | 3 ++-
hw/isa/lpc_ich9.c | 38 ++
include/hw/i386/ich9.h | 11 +++
3 files changed, 51 insertions(+), 1 deletion(-)
diff --git a/hw/acpi/tco.c b/hw/acpi/tco.c
index 1794a54..c1f5739 100644
Looks like RCBA was confused by either RBCA (Receive Broadcast Packet,
TSEC), or they were all just typos.
This patch changes all incorrect namings from RBCA to RCBA.
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
hw/isa/lpc_ich9.c | 32
include/hw
On Wed, 24 Jun 2015 17:11:26 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On Mon, Jun 22, 2015 at 08:10:28PM -0300, Paulo Alcantara wrote:
This block is mapped into memory space, using the Root Complex Base
Address (RCBA) register of the PCI-to-LPC bridge. Accesses in this
space must
detection,
etc. are not implemented yet.
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
v1 - v2:
* add migration support for TCO I/O device state
* wake up only when total time expired instead of every 0.6s
* some cleanup suggested by Paolo Bonzini
v2 - v3:
* set SECOND_TO_STS
6) set and get of TCO control and status bits
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
v1 - v2:
* some cleanup
* add test for TCO_LOCK bit
v2 - v3:
* add tests for TCO control status bits
* fix check of SECOND_TO_STS bit (it's set in TCO2_STS reg)
v3 - v4:
* add more
detection,
etc. are not implemented yet.
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
v1 - v2:
* add migration support for TCO I/O device state
* wake up only when total time expired instead of every 0.6s
* some cleanup suggested by Paolo Bonzini
v2 - v3:
* set SECOND_TO_STS
6) set and get of TCO control and status bits
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
v1 - v2:
* some cleanup
* add test for TCO_LOCK bit
v2 - v3:
* add tests for TCO control status bits
* fix check of SECOND_TO_STS bit (it's set in TCO2_STS reg)
v3 - v4:
* add more
-by: Paulo Alcantara pca...@zytor.com
---
v1 - v2:
* s/PDRC/CCR/ for clarity and match ICH9 spec
* remove unnecessary OperationRegion for RCRB
v2 - v3: (no changes)
v3 - v4:
* quote RCRB description from ICH9 spec to commit log
* fix indentation issue in _CRS() method declaration
* create
On Sun, June 21, 2015 9:37 pm, Paulo Alcantara wrote:
This interface provides some registers within a 32-byte range and can be
acessed through PCI-to-LPC bridge interface (PMBASE + 0x60).
It's commonly used as a watchdog timer to detect system lockups through
SMIs that are generated
On Mon, June 22, 2015 5:39 am, Michael S. Tsirkin wrote:
On Sun, Jun 21, 2015 at 09:37:01PM -0300, Paulo Alcantara wrote:
diff --git a/hw/acpi/tco.c b/hw/acpi/tco.c
new file mode 100644
index 000..b6af1d9
--- /dev/null
+++ b/hw/acpi/tco.c
@@ -0,0 +1,279 @@
+/*
+ * QEMU ICH9 TCO
It's not a big deal, but it's preferable if possible.
Paulo do you have a problem switching to GPLv2+?
Hi Michael,
No, I really don't. If it's really preferable and brings advantage to the
project, then I see no problem at all.
Thanks,
Paulo
--
Paulo Alcantara, C.E.S.A.R
Speaking for myself
On Mon, June 22, 2015 5:40 am, Michael S. Tsirkin wrote:
On Sun, Jun 21, 2015 at 09:37:02PM -0300, Paulo Alcantara wrote:
This block is mapped into memory space, using the Root Complex Base
Address (RCBA) register of the PCI-to-LPC bridge. Accesses in this space
must be limited to 32-(DW) bit
that, I think it's OK for me to enable it by default on pc-q35-2.4
and later.
Thanks,
Paulo
--
Paulo Alcantara, C.E.S.A.R
Speaking for myself only.
detection,
etc. are not implemented yet.
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
v1 - v2:
* add migration support for TCO I/O device state
* wake up only when total time expired instead of every 0.6s
* some cleanup suggested by Paolo Bonzini
v2 - v3:
* set SECOND_TO_STS
6) set and get of TCO control and status bits
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
v1 - v2:
* some cleanup
* add test for TCO_LOCK bit
v2 - v3:
* add tests for TCO control status bits
* fix check of SECOND_TO_STS bit (it's set in TCO2_STS reg)
v3 - v4:
* add more
-by: Paulo Alcantara pca...@zytor.com
---
v1 - v2:
* s/PDRC/CCR/ for clarity and match ICH9 spec
* remove unnecessary OperationRegion for RCRB
v2 - v3: (no changes)
v3 - v4:
* quote RCRB description from ICH9 spec to commit log
* fix indentation issue in _CRS() method declaration
* create
On Wed, 17 Jun 2015 15:33:07 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On Mon, Jun 01, 2015 at 08:48:40PM -0300, Paulo Alcantara wrote:
v1 - v2:
* s/PDRC/CCR/ for clarity and match ICH9 spec
* remove unnecessary OperationRegion for RCRB
changelog should come after ---.
Ok
On Wed, 17 Jun 2015 15:37:49 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On Mon, Jun 01, 2015 at 08:48:41PM -0300, Paulo Alcantara wrote:
v1 - v2:
* some cleanup
* add test for TCO_LOCK bit
v2 - v3:
* add tests for TCO control status bits
* fix check of SECOND_TO_STS bit
On Wed, 17 Jun 2015 15:27:53 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On Mon, Jun 01, 2015 at 08:48:39PM -0300, Paulo Alcantara wrote:
This interface provides some registers within a 32-byte range and
can be acessed through PCI-to-LPC bridge interface (PMBASE + 0x60).
It's
On Mon, June 1, 2015 8:48 pm, Paulo Alcantara wrote:
This interface provides some registers within a 32-byte range and can be
acessed through PCI-to-LPC bridge interface (PMBASE + 0x60).
It's commonly used as a watchdog timer to detect system lockups through
SMIs that are generated
This patch initialises root complex register block BAR in order to
support TCO watchdog emulation features (e.g. reboot upon NO_REBOOT bit
not set) on QEMU.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
OvmfPkg/Include
This patch initialises root complex register block BAR in order to
support TCO watchdog emulation features (e.g. reboot upon NO_REBOOT bit
not set) on QEMU.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
OvmfPkg/Include
On Mon, 08 Jun 2015 11:06:40 +0200
Laszlo Ersek ler...@redhat.com wrote:
On 06/06/15 21:10, Paulo Alcantara wrote:
This patch initialises root complex register block BAR in order to
support TCO watchdog emulation features (e.g. reboot upon NO_REBOOT
bit not set) on QEMU.
Contributed
On Tue, 09 Jun 2015 01:09:19 +0200
Laszlo Ersek ler...@redhat.com wrote:
On 06/09/15 00:49, Jordan Justen wrote:
On 2015-06-08 15:07:13, Paulo Alcantara wrote:
This patch initialises root complex register block BAR in order to
support TCO watchdog emulation features (e.g. reboot upon
This patch initialises root complex register block BAR in order to
support TCO watchdog emulation features (e.g. reboot upon NO_REBOOT bit
not set) on QEMU.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
OvmfPkg/Include
Make HostBridgeDevId global so MemMapInitialization() can also use it to
conditionally add RCRB MMIO address to HOB.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
OvmfPkg/PlatformPei/Platform.c | 17 +++--
1 file changed
On Sat, 06 Jun 2015 22:13:21 -0700
Jordan Justen jordan.l.jus...@intel.com wrote:
On 2015-06-06 12:10:03, Paulo Alcantara wrote:
This patch initialises root complex register block BAR in order to
support TCO watchdog emulation features (e.g. reboot upon NO_REBOOT
bit not set) on QEMU
This patch initialises root complex register block BAR in order to
support TCO watchdog emulation features (e.g. reboot upon NO_REBOOT bit
not set) on QEMU.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
OvmfPkg/Include
This patch initialises root complex register block BAR in order to
support TCO watchdog emulation features (e.g. reboot upon NO_REBOOT bit
not set) on QEMU.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
OvmfPkg/Include
On Mon, June 1, 2015 4:16 am, Gerd Hoffmann wrote:
On Sa, 2015-05-30 at 07:57 -0300, Paulo Alcantara wrote:
Hi Gerd,
On Thu, 28 May 2015 09:13:35 +0200
Gerd Hoffmann kra...@redhat.com wrote:
+Scope(\_SB) {
+OperationRegion (RCRB, SystemMemory, 0xfed1c000, 0x4000)
Where does
On Mon, June 1, 2015 6:05 am, Paolo Bonzini wrote:
On 31/05/2015 00:04, Paulo Alcantara wrote:
+case TCO_RLD:
+tr-timeouts_no = 0;
+if (can_start_tco_timer(tr)) {
+tr-tco.rld = tr-tco.tmr;
+tco_timer_reload(tr);
+} else
On Mon, 1 Jun 2015 10:38:32 -0300
Paulo Alcantara pca...@zytor.com wrote:
On Mon, June 1, 2015 6:05 am, Paolo Bonzini wrote:
On 31/05/2015 00:04, Paulo Alcantara wrote:
+case TCO_RLD:
+tr-timeouts_no = 0;
+if (can_start_tco_timer(tr)) {
+tr-tco.rld
of TCO_LOCK bit in TCO1_CNT register
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
hw/acpi/Makefile.objs | 2 +-
hw/acpi/ich9.c | 59
hw/acpi/tco.c | 254 +
hw/isa/lpc_ich9.c | 10 ++
include/hw/acpi/ich9.h
v1 - v2:
* s/PDRC/CCR/ for clarity and match ICH9 spec
* remove unnecessary OperationRegion for RCRB
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
hw/i386/q35-acpi-dsdt.dsl | 14 ++
tests/acpi-test-data/q35/DSDT | Bin 7666 - 7723 bytes
2 files changed, 14 insertions
v1 - v2:
* some cleanup
* add test for TCO_LOCK bit
v2 - v3:
* add tests for TCO control status bits
* fix check of SECOND_TO_STS bit (it's set in TCO2_STS reg)
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
tests/Makefile | 2 +
tests/tco-test.c | 475
v1 - v2:
* s/PDRC/CCR/ for clarity and match ICH9 spec
* remove unnecessary OperationRegion for RCRB
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
hw/i386/q35-acpi-dsdt.dsl | 14 ++
tests/acpi-test-data/q35/DSDT | Bin 7666 - 7723 bytes
2 files changed, 14 insertions
v1 - v2:
* some cleanup
* added test for TCO_LOCK bit
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
tests/Makefile | 2 +
tests/tco-test.c | 419 +++
2 files changed, 421 insertions(+)
create mode 100644 tests/tco-test.c
diff
detection,
etc. are not implemented yet.
v1 - v2:
* add migration support for TCO I/O device state
* wake up only when total time expired instead of every 0.6s
* some cleanup suggested by Paolo Bonzini
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
hw/acpi/Makefile.objs | 2 +-
hw/acpi
to use that MMIO region for the 16KiB of chipset configuration
registers.
Or is the firmware free to choose it?
Given that, I would say so.
Thanks,
Paulo
--
Paulo Alcantara, C.E.S.A.R
Speaking for myself only.
On Wed, 27 May 2015 14:03:59 +0200
Paolo Bonzini pbonz...@redhat.com wrote:
On 27/05/2015 02:29, Paulo Alcantara wrote:
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
hw/i386/acpi-dsdt-pdrc.dsl| 46
++
Why pdrc and not e.g. ccr
--
Paulo Alcantara, C.E.S.A.R
Speaking for myself only.
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
tests/Makefile | 2 +
tests/tco-test.c | 347 +++
2 files changed, 349 insertions(+)
create mode 100644 tests/tco-test.c
diff --git a/tests/Makefile b/tests/Makefile
index 729b969
detection,
etc. are not implemented yet.
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
hw/acpi/Makefile.objs | 1 +
hw/acpi/ich9.c | 36 ++
hw/acpi/tco.c | 188 +
hw/isa/lpc_ich9.c | 10 +++
include/hw/acpi/ich9.h
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
hw/i386/acpi-dsdt-pdrc.dsl| 46 ++
hw/i386/q35-acpi-dsdt.dsl | 1 +
tests/acpi-test-data/q35/DSDT | Bin 7666 - 7795 bytes
3 files changed, 47 insertions(+)
create mode 100644 hw/i386/acpi-dsdt
This patch initialises root complex register block BAR in order to
support TCO watchdog emulation features on QEMU.
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
src/fw/dev-q35.h | 3 +++
src/fw/pciinit.c | 4
2 files changed, 7 insertions(+)
diff --git a/src/fw/dev-q35.h b/src/fw
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
tests/Makefile | 2 +
tests/tco-test.c | 252 +++
2 files changed, 254 insertions(+)
create mode 100644 tests/tco-test.c
diff --git a/tests/Makefile b/tests/Makefile
index 729b969
(NMI2SMI_EN bit), system intruder
detection (TCO interrupt due to INTRUDER# signal), etc. are not
implemented yet.
Signed-off-by: Paulo Alcantara pca...@zytor.com
---
hw/acpi/Makefile.objs | 1 +
hw/acpi/ich9.c | 36 +
hw/acpi/tco.c | 194
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