Re: [Qemu-devel] [PATCH 1/4] eth: add speed and duplex definitions

2018-03-06 Thread Jason Baron via Qemu-devel
On 03/02/2018 12:54 PM, Michael S. Tsirkin wrote: > On Thu, Mar 01, 2018 at 10:46:33PM -0500, Jason Baron wrote: >> Pull in definitions for SPEED_UNKNOWN, DUPLEX_UNKNOWN, DUPLEX_HALF, >> and DUPLEX_FULL. >> >> Signed-off-by: Jason Baron >> Cc: "Michael S. Tsirkin"

Re: [Qemu-devel] [PATCH] .shippable.yml: disable powerpc-cross image

2018-03-06 Thread Philippe Mathieu-Daudé
Hi Alex, On 03/06/2018 12:39 PM, Alex Bennée wrote: > Something has happened to the old emdebian setup which means it no > longer builds. Let's disable the shippable builds which are always > failing. I read your comment on IRC and talked with Debian people, but couldn't resolve this yet :( >

Re: [Qemu-devel] Introduction

2018-03-06 Thread John Snow
On 03/04/2018 12:17 AM, Aishwarya Kadlag wrote: > Hi, I am aish2k joining this mailing list today > Hi, aish2k: In general, you do not need to announce or introduce yourself when joining technical mailing lists. You may subscribe and unsubscribe at your leisure. Most lists have certain rules

[Qemu-devel] [PATCH v2 0/3] change q35 default NIC to e1000e

2018-03-06 Thread Paolo Bonzini
The Intel 82574 NIC has better performance and more features than the aging e1000 (aka 82540), for example MSI-X. This patch chooses it by default for the Q35 machine type. As suggested by Thomas, instead of special casing e1000e, all PCI NIC device names become valid models for "-net

[Qemu-devel] [PATCH 1/3] qom: introduce object_class_get_list_sorted

2018-03-06 Thread Paolo Bonzini
Unify half a dozen copies of very similar code (the only difference being whether comparisons were case-sensitive) and use it also in Tricore, which did not do any sorting of CPU model names. Signed-off-by: Paolo Bonzini --- include/qom/object.h| 11 +++

Re: [Qemu-devel] [PATCH] trace: only permit standard C types and fixed size integer types

2018-03-06 Thread no-reply
Hi, This series failed build test on s390x host. Please find the details below. Type: series Message-id: 20180306154625.23910-1-berra...@redhat.com Subject: [Qemu-devel] [PATCH] trace: only permit standard C types and fixed size integer types === TEST SCRIPT BEGIN === #!/bin/bash # Testing

[Qemu-devel] [PATCH 05/19] uninorth: move uninorth definitions into uninorth.h

2018-03-06 Thread Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland --- hw/pci-host/uninorth.c | 22 +-- include/hw/pci-host/uninorth.h | 49 ++ 2 files changed, 50 insertions(+), 21 deletions(-) create mode 100644

[Qemu-devel] [PATCH 11/19] uninorth: enable internal PCI host bridge

2018-03-06 Thread Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland --- hw/pci-host/uninorth.c | 28 +++- 1 file changed, 23 insertions(+), 5 deletions(-) diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index 1f6752c294..ccde332fa9 100644 ---

Re: [Qemu-devel] [PATCH] migration: fix minor finalize leak

2018-03-06 Thread Dr. David Alan Gilbert
* Marc-André Lureau (marcandre.lur...@redhat.com) wrote: > Spotted thanks to ASAN: > QTEST_QEMU_BINARY=x86_64-softmmu/qemu-system-x86_64 tests/migration-test -p > /x86_64/migration/bad_dest > > ==30302==ERROR: LeakSanitizer: detected memory leaks > > Direct leak of 48 byte(s) in 1 object(s)

[Qemu-devel] [Bug 1753309] Re: Ethernet interrupt vectors for sabrelite machine are defined backwards

2018-03-06 Thread Guenter Roeck
Swapping the interrupt pins fixes the problem on Linux v4.13 and later. Older kernels start failing as follows. On v4.12 and earlier, the Ethernet interface fails to instantiate with fec 2188000.ethernet (unnamed net_device) (uninitialized): MDIO read timeout fec: probe of

[Qemu-devel] [PATCH] usbredir: reorder fields in USBRedirDevice to reduce padding

2018-03-06 Thread zhenwei.pi
Changing the current ordering saves 8 bytes per entry in x86_64. Signed-off-by: zhenwei.pi --- hw/usb/redirect.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/usb/redirect.c b/hw/usb/redirect.c index ec17430..65a9196 100644 ---

Re: [Qemu-devel] [Qemu-trivial] [PATCH] misc, ide: remove use of HWADDR_PRIx in trace events

2018-03-06 Thread Philippe Mathieu-Daudé
On 03/06/2018 10:44 AM, Daniel P. Berrangé wrote: > The trace events all use a uint64_t data type, so should be using the > corresponding PRIx64 format, not HWADDR_PRIx which is intended for use > with the 'hwaddr' type. > > Signed-off-by: Daniel P. Berrangé Reviewed-by:

Re: [Qemu-devel] [PULL 00/30] ppc-for-2.12 queue 20180306

2018-03-06 Thread Peter Maydell
On 6 March 2018 at 17:47, Thomas Huth wrote: > Does the device need to be hot-pluggable or even user_creatable at all? > It seems like it is also using serial_hds[] directly, so that is a good > indication that it is *not* user creatable. So maybe the easiest fix is > to simply

[Qemu-devel] [PATCH 03/19] uninorth: QOMify PCI and AGP host bridges

2018-03-06 Thread Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland --- hw/pci-host/uninorth.c | 79 -- 1 file changed, 32 insertions(+), 47 deletions(-) diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index 710818e355..1d4d3f5705 100644

[Qemu-devel] [PATCH 08/19] uninorth: introduce temporary pic_irqs device property

2018-03-06 Thread Mark Cave-Ayland
This is in preparation for moving the PCI bus wiring inside the uninorth host bridge devices. In the future it will be possible to remove this once the PICs have been switched to use qdev GPIOs. Signed-off-by: Mark Cave-Ayland --- hw/pci-host/uninorth.c |

Re: [Qemu-devel] [PATCH v3 05/11] linux-user: fix mmap/munmap/mprotect/mremap/shmat

2018-03-06 Thread Max Filippov
On Tue, Mar 6, 2018 at 9:39 AM, Laurent Vivier wrote: > Le 06/03/2018 à 18:28, Max Filippov a écrit : >> On Tue, Mar 6, 2018 at 4:02 AM, Laurent Vivier wrote: >>> Le 01/03/2018 à 18:36, Max Filippov a écrit : #define GUEST_ADDR_MAX (reserved_va ?

[Qemu-devel] [PATCH 12/19] uninorth: remove obsolete pci_pmac_init() function

2018-03-06 Thread Mark Cave-Ayland
Instead wire up the PCI/AGP host bridges in mac_newworld.c. Now this is complete it is possible to move the initialisation of the PCI hole alias into pci_unin_main_init(). Signed-off-by: Mark Cave-Ayland --- hw/pci-host/uninorth.c | 46

Re: [Qemu-devel] [virtio-dev] [PATCH 4/4] virtio-net: add linkspeed and duplex settings to virtio-net

2018-03-06 Thread Jason Baron via Qemu-devel
On 03/04/2018 08:05 AM, Yan Vugenfirer wrote: > > >> On 2 Mar 2018, at 22:19, Michael S. Tsirkin > > wrote: >> >> On Fri, Mar 02, 2018 at 03:14:01PM +0800, Jason Wang wrote: >>> >>> >>> On 2018年03月02日 11:46, Jason Baron wrote: Although linkspeed

Re: [Qemu-devel] [Qemu-ppc] [PULL 06/11] hw/ide: Emulate SiI3112 SATA controller

2018-03-06 Thread Thomas Huth
On 11.01.2018 05:59, David Gibson wrote: > From: BALATON Zoltan > > This is a common generic PCI SATA controller that is also used in PCs > but more importantly guests running on the Sam460ex board prefer this > card and have a driver for it (unlike for other SATA controllers

[Qemu-devel] [PULL] RISC-V QEMU Port Submission v8.2

2018-03-06 Thread Michael Clark
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 The following changes since commit f32408f3b472a088467474ab152be3b6285b2d7b: misc: don't use hwaddr as a type in trace events (2018-03-06 14:24:30 +) are available in the git repository at: https://github.com/riscv/riscv-qemu.git

[Qemu-devel] [PATCH 01/19] uninorth: trivial style fixups

2018-03-06 Thread Mark Cave-Ayland
This makes sure we keep patchew/checkpatch happy during the remainder of this patchset. Signed-off-by: Mark Cave-Ayland --- hw/pci-host/uninorth.c | 29 +++-- 1 file changed, 19 insertions(+), 10 deletions(-) diff --git

[Qemu-devel] [PATCH 09/19] uninorth: move PCI host bridge bus initialisation into device realize

2018-03-06 Thread Mark Cave-Ayland
Since the IO address space is fixed to use the standard system IO address space then we can also use the opportunity to remove the address_space_io parameter from pci_pmac_init() and pci_pmac_u3_init(). Note we also move the default mac99 PCI bus to the end of the initialisation list so that it

[Qemu-devel] [PATCH 16/19] uninorth: rename UNINState to UNINHostState

2018-03-06 Thread Mark Cave-Ayland
The existing UNINState actually represents the PCI/AGP host bridge stage so rename it accordingly. Signed-off-by: Mark Cave-Ayland --- hw/pci-host/uninorth.c | 32 hw/ppc/mac.h | 8

Re: [Qemu-devel] [Qemu-ppc] [PULL 00/30] ppc-for-2.12 queue 20180306

2018-03-06 Thread Greg Kurz
On Tue, 6 Mar 2018 18:47:47 +0100 Thomas Huth wrote: > On 06.03.2018 18:28, Mark Cave-Ayland wrote: > > On 06/03/18 16:48, Thomas Huth wrote: > > > >> Something in the recent commits introduced a new way to cause unexpected > >> aborts of QEMU: > >> > >> $

Re: [Qemu-devel] [PATCH] trace: only permit standard C types and fixed size integer types

2018-03-06 Thread Philippe Mathieu-Daudé
On 03/06/2018 12:46 PM, Daniel P. Berrangé wrote: > Some trace backends will compile code based on the declared trace > events. It should not be assumed that the backends can resolve any QEMU > specific typedefs. So trace events should restrict their argument > types to the standard C types and

[Qemu-devel] [PATCH 3/3] q35: change default NIC to e1000e

2018-03-06 Thread Paolo Bonzini
The e1000 NIC is getting old and is not a very good default for a PCIe machine type. Change it to e1000e, which should be supported by a good number of guests. In particular, drivers for 82574 were added first to Linux 2.6.27 (2008) and Windows 2008 R2. This does mean that Windows 2008 will not

Re: [Qemu-devel] [PATCH 4/4] virtio-net: add linkspeed and duplex settings to virtio-net

2018-03-06 Thread Jason Baron via Qemu-devel
On 03/02/2018 03:22 PM, Michael S. Tsirkin wrote: > On Fri, Mar 02, 2018 at 11:59:00AM -0500, Jason Baron wrote: >> On 03/02/2018 02:14 AM, Jason Wang wrote: >>> >>> >>> On 2018年03月02日 11:46, Jason Baron wrote: Although linkspeed and duplex can be set in a linux guest via 'ethtool -s',

Re: [Qemu-devel] [PATCH] trace: include filename when printing parser error messages

2018-03-06 Thread Philippe Mathieu-Daudé
On 03/06/2018 12:46 PM, Daniel P. Berrangé wrote: > Improves error messages from: > > ValueError: Error on line 72: need more than 1 value to unpack > > To > > ValueError: Error at /home/berrange/src/virt/qemu/trace-events:72: > need more than 1 value to unpack > > Signed-off-by:

Re: [Qemu-devel] [Qemu-trivial] [PATCH v2] misc: don't use hwaddr as a type in trace events

2018-03-06 Thread Philippe Mathieu-Daudé
On 03/06/2018 10:43 AM, Daniel P. Berrangé wrote: > Use types that are defined by QEMU in trace events caused build failures > for the UST trace backend: > > In file included from trace-ust-all.c:13:0: > trace-ust-all.h:11844:206: error: unknown type name ‘hwaddr’ > > It only knows about C

[Qemu-devel] [PATCH 02/19] uninorth: remove second set of uninorth token registers

2018-03-06 Thread Mark Cave-Ayland
Commit 593c181160: "PPC: Newworld: Add second uninorth control register set" added a second set of uninorth registers at 0xf300. Testing MacOS 9.2 to MacOS X 10.4 reveals no accesses to this address and I can't find any reference to it in Apple's Core99.cpp source so I'm assuming that this

Re: [Qemu-devel] [PATCH 1/4] eth: add speed and duplex definitions

2018-03-06 Thread Michael S. Tsirkin
On Tue, Mar 06, 2018 at 12:53:14PM -0500, Jason Baron wrote: > > > On 03/02/2018 12:54 PM, Michael S. Tsirkin wrote: > > On Thu, Mar 01, 2018 at 10:46:33PM -0500, Jason Baron wrote: > >> Pull in definitions for SPEED_UNKNOWN, DUPLEX_UNKNOWN, DUPLEX_HALF, > >> and DUPLEX_FULL. > >> > >>

Re: [Qemu-devel] [PATCH] trace: fix ARM TrustZone PPC hwaddr type

2018-03-06 Thread Philippe Mathieu-Daudé
On 03/06/2018 02:22 PM, Stefan Hajnoczi wrote: > Commit 9eb8040c2d2b ("hw/misc/tz-ppc: Model TrustZone peripheral > protection controller") added trace events with hwaddr type arguments. > > This is not allowed and leads to the following compiler errors when > building with ./configure

Re: [Qemu-devel] [PATCH] trace: fix ARM TrustZone PPC hwaddr type

2018-03-06 Thread Peter Maydell
On 6 March 2018 at 17:22, Stefan Hajnoczi wrote: > Commit 9eb8040c2d2b ("hw/misc/tz-ppc: Model TrustZone peripheral > protection controller") added trace events with hwaddr type arguments. > > This is not allowed and leads to the following compiler errors when > building with

[Qemu-devel] [PATCH v4 05/11] linux-user: fix mmap/munmap/mprotect/mremap/shmat

2018-03-06 Thread Max Filippov
In linux-user QEMU that runs for a target with TARGET_ABI_BITS bigger than L1_MAP_ADDR_SPACE_BITS an assertion in page_set_flags fires when mmap, munmap, mprotect, mremap or shmat is called for an address outside the guest address space. mmap and mprotect should return ENOMEM in such case.

Re: [Qemu-devel] [PATCH v9 03/14] hw/arm/smmu-common: VMSAv8-64 page table walk

2018-03-06 Thread Peter Maydell
On 17 February 2018 at 18:46, Eric Auger wrote: > This patch implements the page table walk for VMSAv8-64. > > Signed-off-by: Eric Auger > > --- > v8 -> v9: > - remove guest error log on PTE fetch fault > - rename trace functions > - fix

Re: [Qemu-devel] [PATCH] migration: fix applying wrong capabilities

2018-03-06 Thread Dr. David Alan Gilbert
* Peter Xu (pet...@redhat.com) wrote: > When setting migration capabilities via QMP/HMP, we'll apply them even > if the capability check failed. Fix it. > > Fixes: 4a84214ebe ("migration: provide migrate_caps_check()", 2017-07-18) > Signed-off-by: Peter Xu OK, yes, that

[Qemu-devel] [PATCH 13/19] uninorth: remove obsolete pci_pmac_u3_init() function

2018-03-06 Thread Mark Cave-Ayland
Instead wire up the PCI/AGP host bridges in mac_newworld.c. Now this is complete it is possible to move the initialisation of the PCI hole alias into pci_u3_agp_init(). Signed-off-by: Mark Cave-Ayland --- hw/pci-host/uninorth.c | 30 +-

[Qemu-devel] [PATCH 06/19] uninorth: alter pci_pmac_init() and pci_pmac_u3_init() to return uninorth device

2018-03-06 Thread Mark Cave-Ayland
This is in preparation for moving the device wiring into the New World machine. Signed-off-by: Mark Cave-Ayland --- hw/pci-host/uninorth.c | 16 hw/ppc/mac.h | 10 ++ hw/ppc/mac_newworld.c | 10 -- 3 files changed, 22

[Qemu-devel] [PATCH 15/19] uninorth: move PCI IO (ISA) memory region into the uninorth device

2018-03-06 Thread Mark Cave-Ayland
Do this for both the uninorth main and uninorth u3 AGP buses, using the main PCI bus for each machine (this ensures the IO addresses still match those used by OpenBIOS). Signed-off-by: Mark Cave-Ayland --- hw/pci-host/uninorth.c | 14 ++

Re: [Qemu-devel] [PATCH v2 0/2] block latency histogram

2018-03-06 Thread Emilio G. Cota
On Tue, Mar 06, 2018 at 16:00:17 +, Stefan Hajnoczi wrote: > On Wed, Feb 07, 2018 at 03:50:35PM +0300, Vladimir Sementsov-Ogievskiy wrote: > > Vladimir Sementsov-Ogievskiy (2): > > block/accounting: introduce latency histogram > > qapi: add block latency histogram interface (snip) > > 5

Re: [Qemu-devel] [PULL 00/30] ppc-for-2.12 queue 20180306

2018-03-06 Thread Thomas Huth
On 06.03.2018 18:28, Mark Cave-Ayland wrote: > On 06/03/18 16:48, Thomas Huth wrote: > >> Something in the recent commits introduced a new way to cause unexpected >> aborts of QEMU: >> >> $ ppc64-softmmu/qemu-system-ppc64 -monitor stdio >> QEMU 2.11.50 monitor - type 'help' for more information

Re: [Qemu-devel] [PULL 00/30] ppc-for-2.12 queue 20180306

2018-03-06 Thread Mark Cave-Ayland
On 06/03/18 17:47, Thomas Huth wrote: It seems that the error is being raised when setting the property rather than during realize so I'm not sure what I can do to handle this. Any thoughts? Does the device need to be hot-pluggable or even user_creatable at all? It seems like it is also using

Re: [Qemu-devel] [virtio-dev] [PATCH 4/4] virtio-net: add linkspeed and duplex settings to virtio-net

2018-03-06 Thread Michael S. Tsirkin
On Tue, Mar 06, 2018 at 01:02:06PM -0500, Jason Baron wrote: > > > On 03/04/2018 08:05 AM, Yan Vugenfirer wrote: > > > > > >> On 2 Mar 2018, at 22:19, Michael S. Tsirkin >> > wrote: > >> > >> On Fri, Mar 02, 2018 at 03:14:01PM +0800, Jason Wang wrote:

Re: [Qemu-devel] [PATCH] multiboot: check mh_load_end_addr address field

2018-03-06 Thread Jack Schwartz
Hi Prasad. The Multiboot Spec will allow for a zero bss end address.  (Please see section 3.1.3 at https://www.gnu.org/software/grub/manual/multiboot/  . ) For a zero bss end address, this patch will not do the right thing. I had proposed some patches to properly handle zero bss end address,

[Qemu-devel] [PATCH 10/19] uninorth: fix PCI and AGP bus mixup

2018-03-06 Thread Mark Cave-Ayland
Somewhere in the history of time, the initialisation of the PCI buses for the AGP and PCI host bridges got mixed up in that the PCI host bridge was creating an instance of the AGP PCI bus, and the AGP PCI bus was missing. Swap the PCI host bridge over to use the correct PCI bus (including setting

[Qemu-devel] [PATCH 07/19] uninorth: move PCI mmio memory region initialisation into init function

2018-03-06 Thread Mark Cave-Ayland
Whilst we are here, rename the memory regions to better reflect whether they belong to either a PCI or an AGP bus. Signed-off-by: Mark Cave-Ayland --- hw/pci-host/uninorth.c | 28 ++-- 1 file changed, 18 insertions(+), 10 deletions(-) diff

[Qemu-devel] [PATCH 2/3] net: allow using any PCI NICs in -net or -nic

2018-03-06 Thread Paolo Bonzini
Remove the hard-coded list of PCI NIC names; instead, fill an array using all PCI devices listed under DEVICE_CATEGORY_NETWORK. Keep the old shortcut "virtio" for virtio-net-pci. Suggested-by: Thomas Huth Cc: Jason Wang Signed-off-by: Paolo Bonzini

[Qemu-devel] [PATCH 04/19] uninorth: remove stray PCIBus realize from mac_newworld.c

2018-03-06 Thread Mark Cave-Ayland
After QOMification this is clearly no longer needed (and possibly hasn't been for some time). Signed-off-by: Mark Cave-Ayland --- hw/ppc/mac_newworld.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index

[Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements

2018-03-06 Thread Mark Cave-Ayland
[This is for New World Machines: there is a follow-up patch for Old World Machines] This patchset is a combination of uninorth fixes/cleanup with the final aim of removing the remaining custom init functions and switching IRQ arrays over to qdev GPIOs. The first couple of patches apply some

[Qemu-devel] [PATCH 18/19] mac_newworld: remove pics IRQ array and wire up macio to OpenPIC directly

2018-03-06 Thread Mark Cave-Ayland
Introduce constants for the pre-defined New World IRQs to help keep things readable. Signed-off-by: Mark Cave-Ayland --- hw/ppc/mac.h | 8 hw/ppc/mac_newworld.c | 29 +++-- 2 files changed, 23 insertions(+), 14

[Qemu-devel] [PATCH 14/19] uninorth: use object link to pass OpenPIC object to uninorth

2018-03-06 Thread Mark Cave-Ayland
Now that the OpenPIC is wired up via the board, we can now remove our temporary PIC qdev pointer property and replace it with an object link instead. Signed-off-by: Mark Cave-Ayland --- hw/pci-host/uninorth.c | 73 +-

[Qemu-devel] [PATCH v1 07/22] RISC-V: Remove unused class definitions from

2018-03-06 Thread Michael Clark
Removes a whole lot of unnecessary boilerplate code. Machines don't need to be objects. The expansion of the SOC object model for the RISC-V machines will happen in the future as SiFive plans to add their FE310 and FU540 SOCs to QEMU. However, it seems that this present boilerplate is complete

[Qemu-devel] [PATCH v1 06/22] RISC-V: Mark ROM read-only after copying in code

2018-03-06 Thread Michael Clark
The sifive_u machine already marks its ROM readonly. This fixes the remaining boards. Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- hw/riscv/sifive_u.c | 9 + hw/riscv/spike.c | 18 ++ hw/riscv/virt.c

Re: [Qemu-devel] [PATCH V4 4/7] CAN bus Kvaser PCI CAN-S (single SJA1000 channel) emulation added.

2018-03-06 Thread Pavel Pisa
Hello Thomas, thanks for report but I at this time I am and can be some time in condition which does not allow me to access e-mail and normal work On Tuesday 06 of March 2018 16:29:19 Thomas Huth wrote: > On 14.01.2018 21:14, p...@cmp.felk.cvut.cz wrote: > > From: Pavel Pisa

[Qemu-devel] [PATCH v1 10/22] RISC-V: Hold rcu_read_lock when accessing memory

2018-03-06 Thread Michael Clark
>From reading other code that accesses memory regions directly, it appears that the rcu_read_lock needs to be held. Note: the original code for accessing RAM directly was added because there is no other way to use atomic_cmpxchg easily. Signed-off-by: Michael Clark

[Qemu-devel] [PATCH v1 19/22] RISC-V: riscv-qemu port supports sv39 and sv48

2018-03-06 Thread Michael Clark
Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- target/riscv/cpu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 7c4482b..f47fc9c 100644 --- a/target/riscv/cpu.h +++

Re: [Qemu-devel] [PATCH v4 05/11] linux-user: fix mmap/munmap/mprotect/mremap/shmat

2018-03-06 Thread Laurent Vivier
Le 06/03/2018 à 20:34, Max Filippov a écrit : > In linux-user QEMU that runs for a target with TARGET_ABI_BITS bigger > than L1_MAP_ADDR_SPACE_BITS an assertion in page_set_flags fires when > mmap, munmap, mprotect, mremap or shmat is called for an address outside > the guest address space. mmap

Re: [Qemu-devel] [PATCH v1 00/22] Spec conformance bug fixes and cleanups

2018-03-06 Thread Michael Clark
On Wed, Mar 7, 2018 at 12:47 PM, Emilio G. Cota wrote: > On Wed, Mar 07, 2018 at 12:07:18 +1300, Michael Clark wrote: > > BTW Apologies for the duplicate emails. I'm still getting to grips with > the > > git-sendemail workflow and was using a sed script to Add Cc's which > munged

Re: [Qemu-devel] [PATCH] trace: only permit standard C types and fixed size integer types

2018-03-06 Thread Fam Zheng
On Tue, 03/06 16:22, Daniel P. Berrangé wrote: > RFE for patchew... > > Now we're sending separate email alerts for each build job, can we > make patchew include the job name in the subject line, so it is > immediately obvious which job failed without needing to read the > body. Yes, doable. Do

[Qemu-devel] [PATCH v1 14/22] RISC-V: Make virt header comment title consistent

2018-03-06 Thread Michael Clark
Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- include/hw/riscv/virt.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index d22f184..dcb697f 100644 ---

[Qemu-devel] [PATCH v1 04/22] RISC-V: Use ROM base address and size from memmap

2018-03-06 Thread Michael Clark
Another case of replaceing hard coded constants, this time referring to the definition in the virt machine's memmap. Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- hw/riscv/virt.c | 4 ++-- include/hw/riscv/virt.h | 2 -- 2 files

[Qemu-devel] [PATCH v1 16/22] RISC-V: Remove EM_RISCV ELF_MACHINE indirection

2018-03-06 Thread Michael Clark
Pointless indirection. Other ports use EM_ constants directly. Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- hw/riscv/sifive_e.c | 2 +- hw/riscv/sifive_u.c | 2 +- hw/riscv/spike.c| 2 +- hw/riscv/virt.c | 2 +- target/riscv/cpu.h

[Qemu-devel] [PATCH v1 13/22] RISC-V: Make some header guards more specific

2018-03-06 Thread Michael Clark
Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- include/hw/riscv/spike.h | 4 ++-- include/hw/riscv/virt.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/include/hw/riscv/spike.h b/include/hw/riscv/spike.h index

Re: [Qemu-devel] [RFC PATCH v2 00/22] remove i386/pc dependency: generic SuperIO

2018-03-06 Thread no-reply
Hi, This series failed docker-mingw@fedora build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. Type: series Message-id: 20180305211928.466-1-f4...@amsat.org Subject: [Qemu-devel] [RFC PATCH v2 00/22] remove

[Qemu-devel] [PATCH v1 21/22] RISC-V: No traps on writes to misa/minstret/mcycle

2018-03-06 Thread Michael Clark
These fields are marked WARL in the specification so illegal writes are silently dropped. Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- target/riscv/op_helper.c | 26 +- 1 file changed, 13 insertions(+), 13

[Qemu-devel] [PATCH 6/6] mac_oldworld: move wiring of macio IRQs to macio_oldworld_realize()

2018-03-06 Thread Mark Cave-Ayland
Since the macio device has a link to the PIC device, we can now wire up the IRQs directly via qdev GPIOs rather than having to use an intermediate array. Signed-off-by: Mark Cave-Ayland --- hw/misc/macio/macio.c | 37 ++---

[Qemu-devel] [PATCH 3/6] grackle: remove deprecated pci_grackle_init() function

2018-03-06 Thread Mark Cave-Ayland
Instead wire up the grackle device inside the Mac Old World machine. Signed-off-by: Mark Cave-Ayland --- hw/pci-host/grackle.c | 28 +--- hw/ppc/mac.h | 3 --- hw/ppc/mac_oldworld.c | 21 ++--- 3 files changed, 19

[Qemu-devel] [PATCH 0/6] heathrow/grackle/mac_oldworld board wiring improvements

2018-03-06 Thread Mark Cave-Ayland
[This is for Old World Machines: there is a corresponding patch for New World Machines] This patchset is a combination of heathrow/grackle/mac_oldworld cleanup with the final aim of removing the remaining custom init functions and switching IRQ arrays over to qdev GPIOs. Patch 1 removes the

Re: [Qemu-devel] [PATCH 05/19] uninorth: move uninorth definitions into uninorth.h

2018-03-06 Thread Philippe Mathieu-Daudé
On 03/06/2018 05:30 PM, Mark Cave-Ayland wrote: > Signed-off-by: Mark Cave-Ayland > --- > hw/pci-host/uninorth.c | 22 +-- > include/hw/pci-host/uninorth.h | 49 > ++ > 2 files changed, 50

Re: [Qemu-devel] [PATCH 1/3] qom: introduce object_class_get_list_sorted

2018-03-06 Thread Philippe Mathieu-Daudé
On 03/06/2018 01:49 PM, Paolo Bonzini wrote: > Unify half a dozen copies of very similar code (the only difference being > whether comparisons were case-sensitive) and use it also in Tricore, > which did not do any sorting of CPU model names. > > Signed-off-by: Paolo Bonzini

[Qemu-devel] [PATCH v1 01/22] RISC-V: Make virt create_fdt interface consistent

2018-03-06 Thread Michael Clark
create_fdt sets the fdt variable on RISCVVirtState and this is used to access the fdt. This reverts a change introduced in https://github.com/riscv/riscv-qemu/pull/109 which introduced a redundant return value, overlooking the RISCVVirtState structure member that made create_fdt inconsistent with

[Qemu-devel] [PATCH v1 09/22] RISC-V: Include hexidecimal in disassembly

2018-03-06 Thread Michael Clark
This was added to help debug issues using -d in_asm. It is useful to see the instruction bytes, as one can detect if one is trying to execute ASCII or device-tree magic. Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- disas/riscv.c | 39

[Qemu-devel] [PATCH v1 17/22] RISC-V: Hardwire satp to 0 for no-mmu case

2018-03-06 Thread Michael Clark
satp is WARL so it should not trap on illegal writes, rather it can be hardwired to zero and silently ignore illegal writes. It seems the RISC-V WARL behaviour is preferred to having to bear trap overhead, versus simply reading back the value and checking if the write took (saves hundreds of

Re: [Qemu-devel] [PATCH 01/19] uninorth: trivial style fixups

2018-03-06 Thread Philippe Mathieu-Daudé
On 03/06/2018 05:30 PM, Mark Cave-Ayland wrote: > This makes sure we keep patchew/checkpatch happy during the remainder of this > patchset. > > Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé > --- > hw/pci-host/uninorth.c |

Re: [Qemu-devel] [PATCH] migration: fix minor finalize leak

2018-03-06 Thread Philippe Mathieu-Daudé
On 03/06/2018 02:09 PM, Marc-André Lureau wrote: > Spotted thanks to ASAN: > QTEST_QEMU_BINARY=x86_64-softmmu/qemu-system-x86_64 tests/migration-test -p > /x86_64/migration/bad_dest > > ==30302==ERROR: LeakSanitizer: detected memory leaks > > Direct leak of 48 byte(s) in 1 object(s) allocated

[Qemu-devel] [PATCH v1 16/22] RISC-V: Remove EM_RISCV ELF_MACHINE indirection from

2018-03-06 Thread Michael Clark
Pointless indirection. Other ports use EM_ constants directly. Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- hw/riscv/sifive_e.c | 2 +- hw/riscv/sifive_u.c | 2 +- hw/riscv/spike.c| 2 +- hw/riscv/virt.c | 2 +- target/riscv/cpu.h

[Qemu-devel] [PATCH v1 00/22] Spec conformance bug fixes and cleanups

2018-03-06 Thread Michael Clark
This is the series of spec conformance bug fixes and code cleanups. We would like to get this series in after our core changes in v8.2. - Implements WARL behavior for CSRs that don't support writes - Improves specification conformance of the page table walker - Change access checks from ternary

[Qemu-devel] [PATCH 1/2] block: let blk_add/remove_aio_context_notifier() tolerate BDS changes

2018-03-06 Thread Stefan Hajnoczi
Commit 2019ba0a0197 ("block: Add AioContextNotifier functions to BB") added blk_add/remove_aio_context_notifier() and implemented them by passing through the bdrv_*() equivalent. This doesn't work across bdrv_append(), which detaches child->bs and re-attaches it to a new BlockDriverState. When

[Qemu-devel] [PATCH v1 06/22] RISC-V: Mark ROM read-only after copying in code and

2018-03-06 Thread Michael Clark
The sifive_u machine already marks its ROM readonly. This fixes the remaining boards. Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- hw/riscv/sifive_u.c | 9 + hw/riscv/spike.c | 18 ++ hw/riscv/virt.c

[Qemu-devel] [PATCH 17/19] uninorth: create new uninorth device

2018-03-06 Thread Mark Cave-Ayland
Commit 4e46dcdbd3 "PPC: Newworld: Add uninorth token register" added a TODO which was to convert the uninorth registers hack to a proper device. Move these registers to a new uninorth device, removing the old hacks from mac_newworld.c. Signed-off-by: Mark Cave-Ayland

[Qemu-devel] [PATCH v1 20/22] RISC-V: vectored traps are optional

2018-03-06 Thread Michael Clark
Vectored traps for asynchrounous interrupts are optional. The mtvec/stvec mode field is WARL and hence does not trap if an illegal value is written. Illegal values are ignored. Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt ---

[Qemu-devel] [PATCH v1 22/22] RISC-V: Remove support for adhoc X_COP interrupt

2018-03-06 Thread Michael Clark
This is essentially dead-code elimination. Support for more local interrupts will be added in a future revision, as they will be defined in a future version of the Privileged ISA specification. Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt ---

Re: [Qemu-devel] [RESEND PATCH v7 0/3] Initial i.MX7 support

2018-03-06 Thread Guenter Roeck
On Mon, Mar 05, 2018 at 07:50:23AM -0800, Andrey Smirnov wrote: > On Mon, Mar 5, 2018 at 7:31 AM, Peter Maydell > wrote: > > On 5 March 2018 at 06:12, Andrey Smirnov wrote: > >> RESEND due to botched original v7 submission (patch 1/3 broken) >

[Qemu-devel] [PATCH v1 05/22] RISC-V: Remove identity_translate from load_elf

2018-03-06 Thread Michael Clark
When load_elf is called with NULL as an argument to the address translate callback, it does an identity translation. This commit removes the redundant identity_translate callback. Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt ---

Re: [Qemu-devel] [PATCH 16/19] uninorth: rename UNINState to UNINHostState

2018-03-06 Thread Philippe Mathieu-Daudé
On 03/06/2018 05:31 PM, Mark Cave-Ayland wrote: > The existing UNINState actually represents the PCI/AGP host bridge stage so > rename it accordingly. > > Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé > --- >

Re: [Qemu-devel] [PATCH v1 00/22] Spec conformance bug fixes and cleanups

2018-03-06 Thread Michael Clark
On Wed, Mar 7, 2018 at 9:43 AM, Michael Clark wrote: > This is the series of spec conformance bug fixes and code cleanups. > We would like to get this series in after our core changes in v8.2. > > - Implements WARL behavior for CSRs that don't support writes > - Improves

Re: [Qemu-devel] [PATCH v4 05/11] linux-user: fix mmap/munmap/mprotect/mremap/shmat

2018-03-06 Thread Max Filippov
On Tue, Mar 6, 2018 at 1:40 PM, Laurent Vivier wrote: > Le 06/03/2018 à 20:34, Max Filippov a écrit : >> In linux-user QEMU that runs for a target with TARGET_ABI_BITS bigger >> than L1_MAP_ADDR_SPACE_BITS an assertion in page_set_flags fires when >> mmap, munmap, mprotect,

Re: [Qemu-devel] [PATCH] README: Fix typo 'git-publish'

2018-03-06 Thread Philippe Mathieu-Daudé
On 03/05/2018 11:43 PM, Fam Zheng wrote: > Reported-by: Alberto Garcia > Signed-off-by: Fam Zheng Reviewed-by: Philippe Mathieu-Daudé > --- > README | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/README b/README >

Re: [Qemu-devel] [Qemu-ppc] [PATCH 07/19] uninorth: move PCI mmio memory region initialisation into init function

2018-03-06 Thread BALATON Zoltan
On Tue, 6 Mar 2018, Mark Cave-Ayland wrote: Whilst we are here, rename the memory regions to better reflect whether they belong to either a PCI or an AGP bus. Signed-off-by: Mark Cave-Ayland --- hw/pci-host/uninorth.c | 28 ++-- 1 file

Re: [Qemu-devel] [PATCH] trace: only permit standard C types and fixed size integer types

2018-03-06 Thread Fam Zheng
On Tue, 03/06 16:20, Daniel P. Berrangé wrote: > On Tue, Mar 06, 2018 at 08:05:18AM -0800, no-re...@patchew.org wrote: > > Hi, > > > > This series failed docker-mingw@fedora build test. Please find the testing > > commands and > > their output below. If you have Docker installed, you can

[Qemu-devel] [PATCH v1 18/22] RISC-V: Remove braces from satp case statement with

2018-03-06 Thread Michael Clark
Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- target/riscv/op_helper.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index dd3e417..f79716a 100644 ---

[Qemu-devel] [PATCH 19/19] mac_newworld: move wiring of macio IRQs to macio_newworld_realize()

2018-03-06 Thread Mark Cave-Ayland
Since the macio device has a link to the PIC device, we can now wire up the IRQs directly via qdev GPIOs rather than having to use an intermediate array. Signed-off-by: Mark Cave-Ayland --- hw/misc/macio/macio.c | 37 ++---

[Qemu-devel] [PATCH v1 04/22] RISC-V: Use ROM base address and size from memory

2018-03-06 Thread Michael Clark
Another case of replaceing hard coded constants, this time referring to the definition in the virt machine's memmap. Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- hw/riscv/virt.c | 4 ++-- include/hw/riscv/virt.h | 2 -- 2 files

[Qemu-devel] [PATCH v1 08/22] RISC-V: Make sure the emulated rom has space for

2018-03-06 Thread Michael Clark
Remove a potential buffer overflow (not seen in practice). Perhaps cpu_physical_memory_write already has bound checks. This change however makes space for the maximum device tree size and adds an explicit bounds check and error message. It doesn't trigger, but it may help in the future if the

[Qemu-devel] [PATCH v1 12/22] RISC-V: Update E order and I extension order

2018-03-06 Thread Michael Clark
Section 22.8 Subset Naming Convention of the RISC-V ISA Specification defines the canonical order for extensions in the ISA string. It is silent on the position of the E extension however E is a substitute for I so it must come early in the extension list order. A comment is added to state E and I

[Qemu-devel] [PATCH v1 14/22] RISC-V: Make virt header comment title consistent

2018-03-06 Thread Michael Clark
Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- include/hw/riscv/virt.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index d22f184..dcb697f 100644 ---

[Qemu-devel] [PATCH v1 08/22] RISC-V: Make sure rom has space for fdt

2018-03-06 Thread Michael Clark
Remove a potential buffer overflow (not seen in practice). Perhaps cpu_physical_memory_write already has bound checks. This change however makes space for the maximum device tree size and adds an explicit bounds check and error message. It doesn't trigger, but it may help in the future if the

Re: [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements

2018-03-06 Thread no-reply
Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20180306203103.25563-1-mark.cave-ayl...@ilande.co.uk Subject: [Qemu-devel] [PATCH 00/19] uninorth fixes/mac_newworld board wiring improvements === TEST SCRIPT BEGIN ===

[Qemu-devel] [Bug 1753309] Re: Ethernet interrupt vectors for sabrelite machine are defined backwards

2018-03-06 Thread Bill Paul
"4.14+: Both versions of qemu (as-is and interrupts reverted) work fine" Hm. I really wonder how it can be possible that Linux works with the interrupt vectors reversed, though to be fair I have not looked at the Linux i.MX6 ENET driver code. I suppose it's possible that the driver is binding the

Re: [Qemu-devel] [Qemu-block] [PATCH 0/2] block/ssh: Implement .bdrv_refresh_filename()

2018-03-06 Thread John Snow
On 02/05/2018 03:22 PM, Max Reitz wrote: > This series implements .bdrv_refresh_filename() for the ssh block > driver, along with an appropriate .bdrv_dirname() so we don't chop off > query strings for backing files with relative filenames. > > This series depends on my “block: Fix some

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