Looking at tcg_out_tlb_load():
If I'm reading the pseudo-assembler of the function names correctly, it
looks like in the i386 code we're already masking the address being
checked:
tgen_arithi(s, ARITH_AND + trexw, r1, TARGET_PAGE_MASK | (aligned ?
s_mask : 0), 0);
where TARGET_PAGE_MASK is a s
Ah, true.
On 9 April 2016 at 09:57, Richard Henderson wrote:
> On 04/08/2016 05:29 PM, Thomas Hanson wrote:
>
>> Looking at tcg_out_tlb_load():
>> If I'm reading the pseudo-assembler of the function names correctly, it
>> looks
>> like in the i386 code we&#
The patch looks good.
Would it also be good to update bus_add_child() so that it NULL-checks
its "bus" parameter before dereferencing it?
-Tom
On 15 March 2016 at 10:56, Peter Maydell wrote:
> The SD card object is not a SysBusDevice, so don't create it with
> qdev_create() if we're not assigni
On Mar 17, 2016 4:33 AM, "Peter Maydell" wrote:
>
> Wire up the CPU timer interrupts in the right order, with the
> nonsecure physical timer on cntpnsirq, the hyp timer on cnthpirq,
> and the secure physical timer on cntpsirq. (We did get the
> virt timer right, at least.)
>
> Reported-by: Antonio
On 17 March 2016 at 07:46, Peter Maydell wrote:
> On 17 March 2016 at 13:37, Thomas Hanson wrote:
>>
>> On Mar 17, 2016 4:33 AM, "Peter Maydell" wrote:
>>>
>>> Wire up the CPU timer interrupts in the right order, with the
>>> nonsecure ph
Sounds like a good idea. Much easier to fix a problem with an
explicit error than to chase a seg fault.
On 15 March 2016 at 14:41, Peter Maydell wrote:
> On 15 March 2016 at 20:33, Peter Maydell wrote:
>> On 15 March 2016 at 20:28, Thomas Hanson wrote:
>>> The patch looks g
tag field of an address before loading the PC.
Currently only called in one place, but will be used in the future to
handle arithmetic overflow cases with 56-bit addresses. (See following
patch.)
Signed-off-by: Thomas Hanson
---
target-arm/translate-a64.c |
a switch.
Signed-off-by: Thomas Hanson
---
target-arm/translate-a64.c | 18 +++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 4d6f951..8810180 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm
handling tagged addresses requires that these cases also be addressed
by cleaning up the tag field. This work has been deferred because
there is currently no CPU model available for testing with 56 bit
addresses.
Thomas Hanson (3):
target-arm: Infrastucture changes to enable h
they show up in the TB flags field.
tbi0, tbi1 fields added to definition of DisasContext structure.
Signed-off-by: Thomas Hanson
---
target-arm/cpu.h | 20 ++--
target-arm/helper.c| 42 ++
target-arm/translate.h | 3 +++
3 fil
For BR, BLR and RET instructions, if tagged addresses are enabled, the
tag field in the address must be cleared out prior to loading the
address into the PC. Depending on the current EL, it will be set to
either all 0's or all 1's.
Signed-off-by: Thomas Hanson
---
target-arm/trans
3 cases in a switch in disas_exc() require reference to the
ARM ARM spec in order to determine what case they're handling.
Signed-off-by: Thomas Hanson
---
target-arm/translate-a64.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target-arm/translate-a64.c b/t
addressed by cleaning up the tag field.
Signed-off-by: Thomas Hanson
---
target-arm/translate-a64.c | 12
1 file changed, 12 insertions(+)
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 14e91fb..a1e5f2c 100644
--- a/target-arm/translate-a64.c
+++ b/target
handling of tagged addresses for exceptions and
exception returns. Will handle that as a separate patch set.
Thomas Hanson (4):
target-arm: Infrastucture changes to enable handling of tagged address
loading into PC
target-arm: Code changes to implement overwrite of tag field on PC
loa
When capturing the current CPU state for the TB, extract the TBI0 and TBI1
values from the correct TCR for the current EL and then add them to the TB
flags field.
Then, at the start of code generation for the block, copy the TBI fields
into the DisasContext structure.
Signed-off-by: Thomas
On 5 October 2016 at 16:01, Peter Maydell wrote:
> On 5 October 2016 at 14:53, Tom Hanson wrote:
> > On 09/29/2016 07:24 PM, Peter Maydell wrote:
> >> On 16 September 2016 at 10:34, Thomas Hanson
> wrote:
> >>> +void gen_a64_set_pc_reg(DisasContext *s, unsi
mapping the register to a variable
Still looking into handling of tagged addresses for exceptions and
exception returns. Will handle that as a separate patch set.
Thomas Hanson (4):
target-arm: Infrastucture changes to enable handling of tagged address
loading into PC
target-arm: Cod
When capturing the current CPU state for the TB, extract the TBI0 and TBI1
values from the correct TCR for the current EL and then add them to the TB
flags field.
Then, at the start of code generation for the block, copy the TBI fields
into the DisasContext structure.
Signed-off-by: Thomas
addressed by cleaning up the tag field.
Signed-off-by: Thomas Hanson
---
target-arm/translate-a64.c | 12
1 file changed, 12 insertions(+)
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 8321218..b4a4b72 100644
--- a/target-arm/translate-a64.c
+++ b/target
For BR, BLR and RET instructions, if tagged addresses are enabled, the
tag field in the address must be cleared out prior to loading the
address into the PC. Depending on the current EL, it will be set to
either all 0's or all 1's.
Signed-off-by: Thomas Hanson
---
target-arm/trans
3 cases in a switch in disas_exc() require reference to the
ARM ARM spec in order to determine what case they're handling.
Signed-off-by: Thomas Hanson
---
target-arm/translate-a64.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target-arm/translate-a64.c b/t
All,
Just pulled top of tree, make clean and make as follows:
CFLAGS="-g3 -O0" ./configure --enable-vhost-net --enable-virtfs
make -j8
Build fails with
ASoptionrom/kvmvapic.o
Building optionrom/multiboot.img
Building optionrom/linuxboot.img
Building optionrom/linuxboot_dma.im
It's late on a Friday, I'll dig more on Monday. Any help would be greatly
appreciated.
On 19 August 2016 at 11:58, Thomas Hanson wrote:
> All,
>
> Just pulled top of tree, make clean and make as follows:
> CFLAGS="-g3 -O0" ./configure --enable-vhost-ne
On 22 August 2016 at 08:23, Peter Maydell wrote:
> PS: just passing --enable-debug to configure should
> be sufficient to do a no-optimization debug-symbols
> build; do you really need to manually specify
> CFLAGS? I wonder whether you're ending up with two
> -Osomething options in your CFLAGS wh
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