On 10/15/20 11:56 AM, Victor Kamensky (kamensky) via wrote:
> Is possible to come back to 34Kf route, doing
> very small localized very well defined change
> of bumping TLBs number for model that we know
> works well for us?
Yes, thanks for testing.
I think we should also add a property to
Hi Guys,
I looked at issue with P5600 machine under gdb
of kernel. arch_check_elf from arch/mips/kernel/elf.c
rejects our sysroot binaries with -ENOEXEC code,
since our binaries do not have EF_MIPS_NAN2008 ELF
header flag set and this CPU model does not have
cpu_has_nan_legacy, i.e
On Wed, Oct 14, 2020 at 1:20 PM Victor Kamensky (kamensky)
wrote:
>
> In order just to keep on the same thread, here is piece of information
> I found:
>
> I looked at "MIPS32® 34Kf™ Processor Core Datasheet" [1]
>
> Page 8 in "Joint TLB (JTLB)" section says:
>
> "The JTLB is a fully associative
In order just to keep on the same thread, here is piece of information
I found:
I looked at "MIPS32® 34Kf™ Processor Core Datasheet" [1]
Page 8 in "Joint TLB (JTLB)" section says:
"The JTLB is a fully associative TLB cache containing 16, 32,
or 64-dual-entries mapping up to 128 virtual pages to
On 10/14/20 9:14 AM, Richard Purdie wrote:
On Wed, 2020-10-14 at 01:36 +, Victor Kamensky (kamensky) wrote:
Thank you very much for looking at this. I gave a spin to
your 3 patch series in original setup, and as expected with
'-cpu 34Kf,tlb-entries=64' option it works great.
If nobody
On Tue, 2020-10-13 at 19:22 -0700, Richard Henderson wrote:
> On 10/13/20 4:11 PM, Richard Henderson wrote:
> > On 10/13/20 6:25 AM, Philippe Mathieu-Daudé wrote:
> > > Yocto developers have expressed interest in running MIPS32
> > > CPU with custom number of TLB:
> > >
On Wed, 2020-10-14 at 01:36 +, Victor Kamensky (kamensky) wrote:
> Thank you very much for looking at this. I gave a spin to
> your 3 patch series in original setup, and as expected with
> '-cpu 34Kf,tlb-entries=64' option it works great.
>
> If nobody objects, and your patches could be
Hi Richard,
Please forgive my cumbersome mailing agent at work.
Please look inline for 'victor>'
From: Richard Henderson
Sent: Tuesday, October 13, 2020 7:22 PM
To: Philippe Mathieu-Daudé; qemu-devel@nongnu.org; Victor Kamensky (kamensky)
Cc: Aleksandar
On 10/13/20 4:11 PM, Richard Henderson wrote:
> On 10/13/20 6:25 AM, Philippe Mathieu-Daudé wrote:
>> Yocto developers have expressed interest in running MIPS32
>> CPU with custom number of TLB:
>> https://lists.gnu.org/archive/html/qemu-devel/2020-10/msg03428.html
>>
>> Help them by making the
Hi Philippe,
Thank you very much for looking at this. I gave a spin to
your 3 patch series in original setup, and as expected with
'-cpu 34Kf,tlb-entries=64' option it works great.
If nobody objects, and your patches could be merged, we
would greatly appreciate it.
Thanks,
Victor
On 10/13/20 6:25 AM, Philippe Mathieu-Daudé wrote:
> Yocto developers have expressed interest in running MIPS32
> CPU with custom number of TLB:
> https://lists.gnu.org/archive/html/qemu-devel/2020-10/msg03428.html
>
> Help them by making the number of TLB entries a CPU property,
> keeping our
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