svn commit: r368445 - head/sys/arm64/arm64
Author: andrew Date: Tue Dec 8 15:51:05 2020 New Revision: 368445 URL: https://svnweb.freebsd.org/changeset/base/368445 Log: Use a macro to find the offset of kern_ttbr0 Rather than hard coding the offset of kern_ttbr0 within arm64_bootparams use a macro like the other fields. Sponsored by: Innovate UK Modified: head/sys/arm64/arm64/genassym.c head/sys/arm64/arm64/locore.S Modified: head/sys/arm64/arm64/genassym.c == --- head/sys/arm64/arm64/genassym.c Tue Dec 8 15:41:18 2020 (r368444) +++ head/sys/arm64/arm64/genassym.c Tue Dec 8 15:51:05 2020 (r368445) @@ -45,6 +45,7 @@ ASSYM(BP_KERN_L1PT, offsetof(struct arm64_bootparams, ASSYM(BP_KERN_DELTA, offsetof(struct arm64_bootparams, kern_delta)); ASSYM(BP_KERN_STACK, offsetof(struct arm64_bootparams, kern_stack)); ASSYM(BP_KERN_L0PT, offsetof(struct arm64_bootparams, kern_l0pt)); +ASSYM(BP_KERN_TTBR0, offsetof(struct arm64_bootparams, kern_ttbr0)); ASSYM(BP_BOOT_EL, offsetof(struct arm64_bootparams, boot_el)); ASSYM(TDF_ASTPENDING, TDF_ASTPENDING); Modified: head/sys/arm64/arm64/locore.S == --- head/sys/arm64/arm64/locore.S Tue Dec 8 15:41:18 2020 (r368444) +++ head/sys/arm64/arm64/locore.S Tue Dec 8 15:51:05 2020 (r368445) @@ -166,8 +166,8 @@ virtdone: adr x25, initstack str x25, [x0, #BP_KERN_STACK] str x24, [x0, #BP_KERN_L0PT] + str x27, [x0, #BP_KERN_TTBR0] str x23, [x0, #BP_BOOT_EL] - str x27, [x0, 40] /* kern_ttbr0 */ /* trace back starts here */ mov fp, #0 ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r368444 - head/sys/arm64/arm64
Author: andrew Date: Tue Dec 8 15:41:18 2020 New Revision: 368444 URL: https://svnweb.freebsd.org/changeset/base/368444 Log: Free the arm64 bootparams memory after initarm This is only needed in initarm, we can return this memory to the stack used by mi_startup. Sponsored by: Innivate UK Modified: head/sys/arm64/arm64/locore.S Modified: head/sys/arm64/arm64/locore.S == --- head/sys/arm64/arm64/locore.S Tue Dec 8 15:09:42 2020 (r368443) +++ head/sys/arm64/arm64/locore.S Tue Dec 8 15:41:18 2020 (r368444) @@ -173,6 +173,8 @@ virtdone: mov fp, #0 /* Branch to C code */ bl initarm + /* We are done with the boot params */ + add sp, sp, #BOOTPARAMS_SIZE bl mi_startup /* We should not get here */ ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r368416 - head/sys/arm64/arm64
Author: andrew
Date: Mon Dec 7 17:54:49 2020
New Revision: 368416
URL: https://svnweb.freebsd.org/changeset/base/368416
Log:
Ensure the boot CPU is CPU 0 on arm64
We assume the boot CPU is always CPU 0 on arm64. To allow for this reserve
cpuid 0 for the boot CPU in the ACPI and FDT cases but otherwise start the
CPU as normal. We then check for the boot CPU in start_cpu and return as if
it was started.
While here extract the FDT CPU init code into a new function to simplify
cpu_mp_start and return FALSE from start_cpu when the CPU fails to start.
Reviewed by: mmel
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D27497
Modified:
head/sys/arm64/arm64/mp_machdep.c
Modified: head/sys/arm64/arm64/mp_machdep.c
==
--- head/sys/arm64/arm64/mp_machdep.c Mon Dec 7 16:08:31 2020
(r368415)
+++ head/sys/arm64/arm64/mp_machdep.c Mon Dec 7 17:54:49 2020
(r368416)
@@ -148,6 +148,13 @@ static volatile int aps_ready;
/* Temporary variables for init_secondary() */
void *dpcpu[MAXCPU - 1];
+static bool
+is_boot_cpu(uint64_t target_cpu)
+{
+
+ return (__pcpu[0].pc_mpidr == (target_cpu & CPU_AFF_MASK));
+}
+
static void
release_aps(void *dummy __unused)
{
@@ -428,6 +435,10 @@ cpu_mp_probe(void)
return (1);
}
+/*
+ * Starts a given CPU. If the CPU is already running, i.e. it is the boot CPU,
+ * do nothing. Returns true if the CPU is present and running.
+ */
static bool
start_cpu(u_int cpuid, uint64_t target_cpu)
{
@@ -439,9 +450,11 @@ start_cpu(u_int cpuid, uint64_t target_cpu)
if (cpuid > mp_maxid)
return (false);
+ /* Skip boot CPU */
+ if (is_boot_cpu(target_cpu))
+ return (true);
+
KASSERT(cpuid < MAXCPU, ("Too many CPUs"));
- KASSERT(__pcpu[0].pc_mpidr != (target_cpu & CPU_AFF_MASK),
- ("Start_cpu() was called on the boot CPU"));
pcpup = &__pcpu[cpuid];
pcpu_init(pcpup, cpuid, sizeof(struct pcpu));
@@ -475,14 +488,14 @@ start_cpu(u_int cpuid, uint64_t target_cpu)
kmem_free((vm_offset_t)bootstacks[cpuid], PAGE_SIZE);
bootstacks[cpuid] = NULL;
mp_ncpus--;
-
- } else {
- /* Wait for the AP to switch to its boot stack. */
- while (atomic_load_int(_started) < naps + 1)
- cpu_spinwait();
- CPU_SET(cpuid, _cpus);
+ return (false);
}
+ /* Wait for the AP to switch to its boot stack. */
+ while (atomic_load_int(_started) < naps + 1)
+ cpu_spinwait();
+ CPU_SET(cpuid, _cpus);
+
return (true);
}
@@ -498,17 +511,22 @@ madt_handler(ACPI_SUBTABLE_HEADER *entry, void *arg)
case ACPI_MADT_TYPE_GENERIC_INTERRUPT:
intr = (ACPI_MADT_GENERIC_INTERRUPT *)entry;
cpuid = arg;
- id = *cpuid;
- /* Skip the boot CPU, but save its ACPI id. */
- if (__pcpu[0].pc_mpidr == (intr->ArmMpidr & CPU_AFF_MASK)) {
- __pcpu[0].pc_acpi_id = intr->Uid;
- break;
+ if (is_boot_cpu(intr->ArmMpidr))
+ id = 0;
+ else
+ id = *cpuid;
+
+ if (start_cpu(id, intr->ArmMpidr)) {
+ __pcpu[id].pc_acpi_id = intr->Uid;
+ /*
+* Don't increment for the boot CPU, its CPU ID is
+* reserved.
+*/
+ if (!is_boot_cpu(intr->ArmMpidr))
+ (*cpuid)++;
}
- start_cpu(id, intr->ArmMpidr);
- __pcpu[id].pc_acpi_id = intr->Uid;
- (*cpuid)++;
break;
default:
break;
@@ -546,10 +564,11 @@ cpu_init_acpi(void)
#ifdef FDT
static boolean_t
-cpu_init_fdt(u_int id, phandle_t node, u_int addr_size, pcell_t *reg)
+start_cpu_fdt(u_int id, phandle_t node, u_int addr_size, pcell_t *reg)
{
uint64_t target_cpu;
int domain;
+ int cpuid;
target_cpu = reg[0];
if (addr_size == 2) {
@@ -557,35 +576,51 @@ cpu_init_fdt(u_int id, phandle_t node, u_int addr_size
target_cpu |= reg[1];
}
- /* Skip boot CPU */
- if (__pcpu[0].pc_mpidr == (target_cpu & CPU_AFF_MASK))
- return (TRUE);
+ if (is_boot_cpu(target_cpu))
+ cpuid = 0;
+ else
+ cpuid = fdt_cpuid;
- if (!start_cpu(fdt_cpuid, target_cpu))
+ if (!start_cpu(cpuid, target_cpu))
return (FALSE);
- fdt_cpuid++;
+ /*
+* Don't increment for the boot CPU, its CPU ID is reserved.
+*/
+ if (!is_boot_cpu(target_cpu))
+
svn commit: r368156 - head/sys/dev/pci
Author: andrew
Date: Sun Nov 29 16:22:33 2020
New Revision: 368156
URL: https://svnweb.freebsd.org/changeset/base/368156
Log:
Only set the PCI bus end when we are reducing it
We read the bus end value from the _CRS method. On some systems we need
to further limit it based on the MCFG table.
Support this by setting a default value, then update it if needed in the
_CRS table, and finally reduce it if it is past the end of the MCFG tabel.
This will allow for both systems that use either method to encode this
value.
This partially reverts r347929, removing the error printf.
Reviewed by: philip
Tested by:philip, Andrey Fesenko
MFC after:2 weeks
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D27274
Modified:
head/sys/dev/pci/pci_host_generic_acpi.c
Modified: head/sys/dev/pci/pci_host_generic_acpi.c
==
--- head/sys/dev/pci/pci_host_generic_acpi.cSun Nov 29 15:39:54 2020
(r368155)
+++ head/sys/dev/pci/pci_host_generic_acpi.cSun Nov 29 16:22:33 2020
(r368156)
@@ -201,7 +201,8 @@ pci_host_acpi_get_ecam_resource(device_t dev)
mcfg_entry++;
}
if (found) {
- sc->base.bus_end = mcfg_entry->EndBusNumber;
+ if (mcfg_entry->EndBusNumber < sc->base.bus_end)
+ sc->base.bus_end = mcfg_entry->EndBusNumber;
base = mcfg_entry->Address;
} else {
device_printf(dev, "MCFG exists, but does not have bus
%d-%d\n",
@@ -210,10 +211,9 @@ pci_host_acpi_get_ecam_resource(device_t dev)
}
} else {
status = acpi_GetInteger(handle, "_CBA", );
- if (ACPI_SUCCESS(status)) {
+ if (ACPI_SUCCESS(status))
base = val;
- sc->base.bus_end = 255;
- } else
+ else
return (ENXIO);
}
@@ -246,6 +246,7 @@ pci_host_generic_acpi_init(device_t dev)
device_printf(dev, "No _BBN, using start bus 0\n");
sc->base.bus_start = 0;
}
+ sc->base.bus_end = 255;
/* Get PCI Segment (domain) needed for MCFG lookup */
status = acpi_GetInteger(handle, "_SEG", >base.ecam);
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svn commit: r367841 - head/sys/arm64/arm64
Author: andrew
Date: Thu Nov 19 09:26:51 2020
New Revision: 367841
URL: https://svnweb.freebsd.org/changeset/base/367841
Log:
Fall back to use the GICR address from the generic interrupt struct
When there is no ACPI redistributor sub-table in the MADT we need to
fall back to use the GICR base address from the GIC CPU interface
structure.
Handle this fallback when adding memory to the device and when counting
the number of redistributors.
PR: 251171
Reported by: Andrey Fesenko
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D27247
Modified:
head/sys/arm64/arm64/gic_v3_acpi.c
Modified: head/sys/arm64/arm64/gic_v3_acpi.c
==
--- head/sys/arm64/arm64/gic_v3_acpi.c Thu Nov 19 09:17:41 2020
(r367840)
+++ head/sys/arm64/arm64/gic_v3_acpi.c Thu Nov 19 09:26:51 2020
(r367841)
@@ -88,6 +88,7 @@ struct madt_table_data {
device_t dev;
ACPI_MADT_GENERIC_DISTRIBUTOR *dist;
int count;
+ bool rdist_use_gicc;
};
static void
@@ -120,12 +121,16 @@ static void
rdist_map(ACPI_SUBTABLE_HEADER *entry, void *arg)
{
ACPI_MADT_GENERIC_REDISTRIBUTOR *redist;
+ ACPI_MADT_GENERIC_INTERRUPT *intr;
struct madt_table_data *madt_data;
+ rman_res_t count;
madt_data = (struct madt_table_data *)arg;
switch(entry->Type) {
case ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR:
+ if (madt_data->rdist_use_gicc)
+ break;
redist = (ACPI_MADT_GENERIC_REDISTRIBUTOR *)entry;
madt_data->count++;
@@ -134,6 +139,23 @@ rdist_map(ACPI_SUBTABLE_HEADER *entry, void *arg)
redist->Length);
break;
+ case ACPI_MADT_TYPE_GENERIC_INTERRUPT:
+ if (!madt_data->rdist_use_gicc)
+ break;
+
+ intr = (ACPI_MADT_GENERIC_INTERRUPT *)entry;
+
+ madt_data->count++;
+ /*
+* Map the two 64k redistributor frames.
+*/
+ count = GICR_RD_BASE_SIZE + GICR_SGI_BASE_SIZE;
+ if (madt_data->dist->Version == ACPI_MADT_GIC_VERSION_V4)
+ count += GICR_VLPI_BASE_SIZE + GICR_RESERVED_SIZE;
+ BUS_SET_RESOURCE(madt_data->parent, madt_data->dev,
+ SYS_RES_MEMORY, madt_data->count, intr->GicrBaseAddress,
+ count);
+
default:
break;
}
@@ -190,8 +212,18 @@ gic_v3_acpi_identify(driver_t *driver, device_t parent
madt_data.dist->BaseAddress, 128 * 1024);
madt_data.dev = dev;
+ madt_data.rdist_use_gicc = false;
acpi_walk_subtables(madt + 1, (char *)madt + madt->Header.Length,
rdist_map, _data);
+ if (madt_data.count == 0) {
+ /*
+* No redistributors found, fall back to use the GICR
+* address from the GICC sub-table.
+*/
+ madt_data.rdist_use_gicc = true;
+ acpi_walk_subtables(madt + 1, (char *)madt +
madt->Header.Length,
+ rdist_map, _data);
+ }
acpi_set_private(dev, (void *)(uintptr_t)madt_data.dist->Version);
@@ -224,6 +256,15 @@ madt_count_redistrib(ACPI_SUBTABLE_HEADER *entry, void
sc->gic_redists.nregions++;
}
+static void
+madt_count_gicc_redistrib(ACPI_SUBTABLE_HEADER *entry, void *arg)
+{
+ struct gic_v3_softc *sc = arg;
+
+ if (entry->Type == ACPI_MADT_TYPE_GENERIC_INTERRUPT)
+ sc->gic_redists.nregions++;
+}
+
static int
gic_v3_acpi_count_regions(device_t dev)
{
@@ -245,6 +286,12 @@ gic_v3_acpi_count_regions(device_t dev)
acpi_walk_subtables(madt + 1, (char *)madt + madt->Header.Length,
madt_count_redistrib, sc);
+ /* Fall back to use the distributor GICR base address */
+ if (sc->gic_redists.nregions == 0) {
+ acpi_walk_subtables(madt + 1,
+ (char *)madt + madt->Header.Length,
+ madt_count_gicc_redistrib, sc);
+ }
acpi_unmap_table(madt);
return (sc->gic_redists.nregions > 0 ? 0 : ENXIO);
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svn commit: r367755 - head/sys/arm64/arm64
Author: andrew
Date: Tue Nov 17 10:27:42 2020
New Revision: 367755
URL: https://svnweb.freebsd.org/changeset/base/367755
Log:
Stop calling gic_v3_detach when we haven't called gic_v3_attach
The former tries to dereference memory allocated by the latter. If counting
the redistributor fails it may try to dereference memory that was never
allocated.
Sponsored by: Innovate UK
Modified:
head/sys/arm64/arm64/gic_v3_acpi.c
Modified: head/sys/arm64/arm64/gic_v3_acpi.c
==
--- head/sys/arm64/arm64/gic_v3_acpi.c Tue Nov 17 10:17:18 2020
(r367754)
+++ head/sys/arm64/arm64/gic_v3_acpi.c Tue Nov 17 10:27:42 2020
(r367755)
@@ -262,7 +262,7 @@ gic_v3_acpi_attach(device_t dev)
err = gic_v3_acpi_count_regions(dev);
if (err != 0)
- goto error;
+ goto count_error;
err = gic_v3_attach(dev);
if (err != 0)
@@ -294,12 +294,13 @@ gic_v3_acpi_attach(device_t dev)
return (0);
error:
+ /* Failure so free resources */
+ gic_v3_detach(dev);
+count_error:
if (bootverbose) {
device_printf(dev,
"Failed to attach. Error %d\n", err);
}
- /* Failure so free resources */
- gic_v3_detach(dev);
return (err);
}
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Re: svn commit: r367754 - head/sys/arm64/arm64
> On 17 Nov 2020, at 10:17, Andrew Turner wrote: > > Author: andrew > Date: Tue Nov 17 10:17:18 2020 > New Revision: 367754 > URL: https://svnweb.freebsd.org/changeset/base/367754 > > Log: > Allow the GICv3 ACPI driver to attach to a GICv4 > > The same driver works on both, allow the driver to attach to a GICv4 > controller with the ACPI attachment. > > Reported by: Andrey Fesenko > Sponsored by:Innovate UK Differential Revision: https://reviews.freebsd.org/D27238 ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r367754 - head/sys/arm64/arm64
Author: andrew
Date: Tue Nov 17 10:17:18 2020
New Revision: 367754
URL: https://svnweb.freebsd.org/changeset/base/367754
Log:
Allow the GICv3 ACPI driver to attach to a GICv4
The same driver works on both, allow the driver to attach to a GICv4
controller with the ACPI attachment.
Reported by: Andrey Fesenko
Sponsored by: Innovate UK
Modified:
head/sys/arm64/arm64/gic_v3_acpi.c
Modified: head/sys/arm64/arm64/gic_v3_acpi.c
==
--- head/sys/arm64/arm64/gic_v3_acpi.c Tue Nov 17 08:11:17 2020
(r367753)
+++ head/sys/arm64/arm64/gic_v3_acpi.c Tue Nov 17 10:17:18 2020
(r367754)
@@ -168,9 +168,15 @@ gic_v3_acpi_identify(driver_t *driver, device_t parent
"No gic interrupt or distributor table\n");
goto out;
}
- /* This is for the wrong GIC version */
- if (madt_data.dist->Version != ACPI_MADT_GIC_VERSION_V3)
+
+ /* Check the GIC version is supported by thiss driver */
+ switch(madt_data.dist->Version) {
+ case ACPI_MADT_GIC_VERSION_V3:
+ case ACPI_MADT_GIC_VERSION_V4:
+ break;
+ default:
goto out;
+ }
dev = BUS_ADD_CHILD(parent, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE,
"gic", -1);
@@ -199,6 +205,7 @@ gic_v3_acpi_probe(device_t dev)
switch((uintptr_t)acpi_get_private(dev)) {
case ACPI_MADT_GIC_VERSION_V3:
+ case ACPI_MADT_GIC_VERSION_V4:
break;
default:
return (ENXIO);
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svn commit: r367365 - head/sys/arm64/arm64
Author: andrew
Date: Thu Nov 5 09:55:55 2020
New Revision: 367365
URL: https://svnweb.freebsd.org/changeset/base/367365
Log:
Stop trying to bounce in memory allocated by bus dma
Memory allocated by bus_dmamem_alloc will take into account any alignment
requirements of the CPU it's running on. Stop trying to bounce in this case
as there is no bounce zone allocated.
Reported by: manu, tuexen
Tested by:manu
Sponsored by: Innovate UK
Modified:
head/sys/arm64/arm64/busdma_bounce.c
Modified: head/sys/arm64/arm64/busdma_bounce.c
==
--- head/sys/arm64/arm64/busdma_bounce.cThu Nov 5 08:58:21 2020
(r367364)
+++ head/sys/arm64/arm64/busdma_bounce.cThu Nov 5 09:55:55 2020
(r367365)
@@ -206,6 +206,10 @@ might_bounce(bus_dma_tag_t dmat, bus_dmamap_t map, bus
bus_size_t size)
{
+ /* Memory allocated by bounce_bus_dmamem_alloc won't bounce */
+ if ((map->flags & DMAMAP_FROM_DMAMEM) != 0)
+ return (false);
+
if ((dmat->bounce_flags & BF_COULD_BOUNCE) != 0)
return (true);
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svn commit: r367325 - head/sys/arm64/include
Author: andrew
Date: Wed Nov 4 11:48:08 2020
New Revision: 367325
URL: https://svnweb.freebsd.org/changeset/base/367325
Log:
Add the pmap.h changes missed in r367320
Reported by: bz
Sponsored by: Innovate UK
Modified:
head/sys/arm64/include/pmap.h
Modified: head/sys/arm64/include/pmap.h
==
--- head/sys/arm64/include/pmap.h Wed Nov 4 11:23:19 2020
(r367324)
+++ head/sys/arm64/include/pmap.h Wed Nov 4 11:48:08 2020
(r367325)
@@ -85,6 +85,7 @@ enum pmap_stage {
struct pmap {
struct mtx pm_mtx;
struct pmap_statistics pm_stats; /* pmap statistics */
+ uint64_tpm_ttbr;
vm_paddr_t pm_l0_paddr;
pd_entry_t *pm_l0;
TAILQ_HEAD(,pv_chunk) pm_pvchunk; /* list of mappings in pmap */
@@ -92,6 +93,7 @@ struct pmap {
longpm_cookie; /* encodes the pmap's ASID */
struct asid_set *pm_asid_set; /* The ASID/VMID set to use */
enum pmap_stage pm_stage;
+ int pm_levels;
};
typedef struct pmap *pmap_t;
@@ -170,7 +172,7 @@ voidpmap_kremove(vm_offset_t);
void pmap_kremove_device(vm_offset_t, vm_size_t);
void *pmap_mapdev_attr(vm_offset_t pa, vm_size_t size, vm_memattr_t ma);
bool pmap_page_is_mapped(vm_page_t m);
-intpmap_pinit_stage(pmap_t, enum pmap_stage);
+intpmap_pinit_stage(pmap_t, enum pmap_stage, int);
bool pmap_ps_enabled(pmap_t pmap);
uint64_t pmap_to_ttbr0(pmap_t pmap);
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svn commit: r367320 - head/sys/arm64/arm64
Author: andrew
Date: Wed Nov 4 10:21:30 2020
New Revision: 367320
URL: https://svnweb.freebsd.org/changeset/base/367320
Log:
Allow the creation of 3 level page tables on arm64
The stage 2 arm64 page tables may need to start at a lower level. This
is because we may only be able to map a limited IPA range and trying
to use a full 4 levels will cause the CPU to fault in an unrecoverable
way.
To simplify the code we still allocate the full 4 levels, however level 0
will only ever be used to find the level 1 table used as the base. Handle
this by creating a dummy entry in the level 0 table to point to the level 1
table.
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D26066
Modified:
head/sys/arm64/arm64/pmap.c
Modified: head/sys/arm64/arm64/pmap.c
==
--- head/sys/arm64/arm64/pmap.c Wed Nov 4 07:54:07 2020(r367319)
+++ head/sys/arm64/arm64/pmap.c Wed Nov 4 10:21:30 2020(r367320)
@@ -970,6 +970,8 @@ pmap_bootstrap(vm_offset_t l0pt, vm_offset_t l1pt, vm_
kernel_pmap->pm_l0_paddr = l0pt - kern_delta;
kernel_pmap->pm_cookie = COOKIE_FROM(-1, INT_MIN);
kernel_pmap->pm_stage = PM_STAGE1;
+ kernel_pmap->pm_levels = 4;
+ kernel_pmap->pm_ttbr = kernel_pmap->pm_l0_paddr;
kernel_pmap->pm_asid_set =
/* Assume the address we were loaded to is a valid physical address */
@@ -1714,33 +1716,37 @@ pmap_pinit0(pmap_t pmap)
pmap->pm_root.rt_root = 0;
pmap->pm_cookie = COOKIE_FROM(ASID_RESERVED_FOR_PID_0, INT_MIN);
pmap->pm_stage = PM_STAGE1;
+ pmap->pm_levels = 4;
+ pmap->pm_ttbr = pmap->pm_l0_paddr;
pmap->pm_asid_set =
PCPU_SET(curpmap, pmap);
}
int
-pmap_pinit_stage(pmap_t pmap, enum pmap_stage stage)
+pmap_pinit_stage(pmap_t pmap, enum pmap_stage stage, int levels)
{
- vm_page_t l0pt;
+ vm_page_t m;
/*
* allocate the l0 page
*/
- while ((l0pt = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
+ while ((m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
vm_wait(NULL);
- pmap->pm_l0_paddr = VM_PAGE_TO_PHYS(l0pt);
+ pmap->pm_l0_paddr = VM_PAGE_TO_PHYS(m);
pmap->pm_l0 = (pd_entry_t *)PHYS_TO_DMAP(pmap->pm_l0_paddr);
- if ((l0pt->flags & PG_ZERO) == 0)
+ if ((m->flags & PG_ZERO) == 0)
pagezero(pmap->pm_l0);
pmap->pm_root.rt_root = 0;
bzero(>pm_stats, sizeof(pmap->pm_stats));
pmap->pm_cookie = COOKIE_FROM(-1, INT_MAX);
+ MPASS(levels == 3 || levels == 4);
+ pmap->pm_levels = levels;
pmap->pm_stage = stage;
switch (stage) {
case PM_STAGE1:
@@ -1757,6 +1763,18 @@ pmap_pinit_stage(pmap_t pmap, enum pmap_stage stage)
/* XXX Temporarily disable deferred ASID allocation. */
pmap_alloc_asid(pmap);
+ /*
+* Allocate the level 1 entry to use as the root. This will increase
+* the refcount on the level 1 page so it won't be removed until
+* pmap_release() is called.
+*/
+ if (pmap->pm_levels == 3) {
+ PMAP_LOCK(pmap);
+ m = _pmap_alloc_l3(pmap, NUL2E + NUL1E, NULL);
+ PMAP_UNLOCK(pmap);
+ }
+ pmap->pm_ttbr = VM_PAGE_TO_PHYS(m);
+
return (1);
}
@@ -1764,7 +1782,7 @@ int
pmap_pinit(pmap_t pmap)
{
- return (pmap_pinit_stage(pmap, PM_STAGE1));
+ return (pmap_pinit_stage(pmap, PM_STAGE1, 4));
}
/*
@@ -2017,10 +2035,29 @@ retry:
void
pmap_release(pmap_t pmap)
{
+ boolean_t rv;
+ struct spglist free;
struct asid_set *set;
vm_page_t m;
int asid;
+ if (pmap->pm_levels != 4) {
+ PMAP_ASSERT_STAGE2(pmap);
+ KASSERT(pmap->pm_stats.resident_count == 1,
+ ("pmap_release: pmap resident count %ld != 0",
+ pmap->pm_stats.resident_count));
+ KASSERT((pmap->pm_l0[0] & ATTR_DESCR_VALID) == ATTR_DESCR_VALID,
+ ("pmap_release: Invalid l0 entry: %lx", pmap->pm_l0[0]));
+
+ SLIST_INIT();
+ m = PHYS_TO_VM_PAGE(pmap->pm_ttbr);
+ PMAP_LOCK(pmap);
+ rv = pmap_unwire_l3(pmap, 0, m, );
+ PMAP_UNLOCK(pmap);
+ MPASS(rv == TRUE);
+ vm_page_free_pages_toq(, true);
+ }
+
KASSERT(pmap->pm_stats.resident_count == 0,
("pmap_release: pmap resident count %ld != 0",
pmap->pm_stats.resident_count));
@@ -6514,7 +6551,7 @@ pmap_to_ttbr0(pmap_t pmap)
{
return (ASID_TO_OPERAND(COOKIE_TO_ASID(pmap->pm_cookie)) |
- pmap->pm_l0_paddr);
+ pmap->pm_ttbr);
}
static bool
___
svn commit: r366836 - head/sys/arm64/arm64
Author: andrew Date: Mon Oct 19 15:52:42 2020 New Revision: 366836 URL: https://svnweb.freebsd.org/changeset/base/366836 Log: Remove unused labels from the arm64 casueword* These are unused so can be removed. While here renumber the remaining label to be 1. Sponsored by: Innovate UK Modified: head/sys/arm64/arm64/support.S Modified: head/sys/arm64/arm64/support.S == --- head/sys/arm64/arm64/support.S Mon Oct 19 15:50:58 2020 (r366835) +++ head/sys/arm64/arm64/support.S Mon Oct 19 15:52:42 2020 (r366836) @@ -64,11 +64,11 @@ ENTRY(casueword32) mov w5, #1 SET_FAULT_HANDLER(x6, x4) /* And set it */ ENTER_USER_ACCESS(w6, x4) -1: ldxrw4, [x0]/* Load-exclusive the data */ + ldxrw4, [x0]/* Load-exclusive the data */ cmp w4, w1 /* Compare */ - b.ne2f /* Not equal, exit */ + b.ne1f /* Not equal, exit */ stxrw5, w3, [x0]/* Store the new data */ -2: EXIT_USER_ACCESS(w6) +1: EXIT_USER_ACCESS(w6) SET_FAULT_HANDLER(xzr, x6) /* Reset the fault handler */ str w4, [x2]/* Store the read data */ mov w0, w5 /* Result same as store status */ @@ -84,11 +84,11 @@ ENTRY(casueword) mov w5, #1 SET_FAULT_HANDLER(x6, x4) /* And set it */ ENTER_USER_ACCESS(w6, x4) -1: ldxrx4, [x0]/* Load-exclusive the data */ + ldxrx4, [x0]/* Load-exclusive the data */ cmp x4, x1 /* Compare */ - b.ne2f /* Not equal, exit */ + b.ne1f /* Not equal, exit */ stxrw5, x3, [x0]/* Store the new data */ -2: EXIT_USER_ACCESS(w6) +1: EXIT_USER_ACCESS(w6) SET_FAULT_HANDLER(xzr, x6) /* Reset the fault handler */ str x4, [x2]/* Store the read data */ mov w0, w5 /* Result same as store status */ ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r366832 - head/sys/arm64/arm64
Author: andrew Date: Mon Oct 19 12:46:03 2020 New Revision: 366832 URL: https://svnweb.freebsd.org/changeset/base/366832 Log: Split the common arm64 fu* and su* asm to a macro As these are mostly identical split out the common code to a macro. Sponsored by: Innovate UK Modified: head/sys/arm64/arm64/support.S Modified: head/sys/arm64/arm64/support.S == --- head/sys/arm64/arm64/support.S Mon Oct 19 12:06:16 2020 (r366831) +++ head/sys/arm64/arm64/support.S Mon Oct 19 12:46:03 2020 (r366832) @@ -95,15 +95,19 @@ ENTRY(casueword) ret /* Return */ END(casueword) +.macro fsudata insn, ret_reg, user_arg + adr x7, fsu_fault /* Load the fault handler */ + SET_FAULT_HANDLER(x7, x6) /* And set it */ + \insn \ret_reg, [x\user_arg] /* Try accessing the data */ + SET_FAULT_HANDLER(xzr, x6) /* Reset the fault handler */ +.endm + /* * int fubyte(volatile const void *) */ ENTRY(fubyte) check_user_access 0, (VM_MAXUSER_ADDRESS), fsu_fault_nopcb - adr x6, fsu_fault /* Load the fault handler */ - SET_FAULT_HANDLER(x6, x1) /* And set it */ - ldtrb w0, [x0]/* Try loading the data */ - SET_FAULT_HANDLER(xzr, x1) /* Reset the fault handler */ + fsudata ldtrb, w0, 0 ret /* Return */ END(fubyte) @@ -112,10 +116,7 @@ END(fubyte) */ ENTRY(fuword16) check_user_access 0, (VM_MAXUSER_ADDRESS-1), fsu_fault_nopcb - adr x6, fsu_fault /* Load the fault handler */ - SET_FAULT_HANDLER(x6, x1) /* And set it */ - ldtrh w0, [x0]/* Try loading the data */ - SET_FAULT_HANDLER(xzr, x1) /* Reset the fault handler */ + fsudata ldtrh, w0, 0 ret /* Return */ END(fuword16) @@ -124,10 +125,7 @@ END(fuword16) */ ENTRY(fueword32) check_user_access 0, (VM_MAXUSER_ADDRESS-3), fsu_fault_nopcb - adr x6, fsu_fault /* Load the fault handler */ - SET_FAULT_HANDLER(x6, x2) /* And set it */ - ldtrw0, [x0]/* Try loading the data */ - SET_FAULT_HANDLER(xzr, x2) /* Reset the fault handler */ + fsudata ldtr, w0, 0 str w0, [x1]/* Save the data in kernel space */ mov w0, #0 /* Success */ ret /* Return */ @@ -140,10 +138,7 @@ END(fueword32) ENTRY(fueword) EENTRY(fueword64) check_user_access 0, (VM_MAXUSER_ADDRESS-7), fsu_fault_nopcb - adr x6, fsu_fault /* Load the fault handler */ - SET_FAULT_HANDLER(x6, x2) /* And set it */ - ldtrx0, [x0]/* Try loading the data */ - SET_FAULT_HANDLER(xzr, x2) /* Reset the fault handler */ + fsudata ldtr, x0, 0 str x0, [x1]/* Save the data in kernel space */ mov x0, #0 /* Success */ ret /* Return */ @@ -155,10 +150,7 @@ END(fueword) */ ENTRY(subyte) check_user_access 0, (VM_MAXUSER_ADDRESS), fsu_fault_nopcb - adr x6, fsu_fault /* Load the fault handler */ - SET_FAULT_HANDLER(x6, x2) /* And set it */ - sttrb w1, [x0]/* Try storing the data */ - SET_FAULT_HANDLER(xzr, x2) /* Reset the fault handler */ + fsudata sttrb, w1, 0 mov x0, #0 /* Success */ ret /* Return */ END(subyte) @@ -168,10 +160,7 @@ END(subyte) */ ENTRY(suword16) check_user_access 0, (VM_MAXUSER_ADDRESS-1), fsu_fault_nopcb - adr x6, fsu_fault /* Load the fault handler */ - SET_FAULT_HANDLER(x6, x2) /* And set it */ - sttrh w1, [x0]/* Try storing the data */ - SET_FAULT_HANDLER(xzr, x2) /* Reset the fault handler */ + fsudata sttrh, w1, 0 mov x0, #0 /* Success */ ret /* Return */ END(suword16) @@ -181,10 +170,7 @@ END(suword16) */ ENTRY(suword32) check_user_access 0, (VM_MAXUSER_ADDRESS-3), fsu_fault_nopcb - adr x6, fsu_fault /* Load the fault handler */ - SET_FAULT_HANDLER(x6, x2) /* And set it */ - sttrw1, [x0]/* Try storing the data */ - SET_FAULT_HANDLER(xzr, x2) /* Reset the fault handler */ + fsudata sttr, w1, 0 mov x0, #0 /* Success */ ret /* Return */ END(suword32) @@ -195,10 +181,7 @@ END(suword32) ENTRY(suword) EENTRY(suword64) check_user_access 0, (VM_MAXUSER_ADDRESS-7), fsu_fault_nopcb - adr x6,
svn commit: r366831 - head/sys/arm64/arm64
Author: andrew
Date: Mon Oct 19 12:06:16 2020
New Revision: 366831
URL: https://svnweb.freebsd.org/changeset/base/366831
Log:
Move the arm64 userspace access checks to macros
In the functions that copy between userspace and kernel space we check the
user space address is valid before performing the copy. These are mostly
identical within each type of function so create two macros to perform the
check.
Obtained from:CheriBSD
Sponsored by: Innovate UK
Modified:
head/sys/arm64/arm64/copyinout.S
head/sys/arm64/arm64/support.S
Modified: head/sys/arm64/arm64/copyinout.S
==
--- head/sys/arm64/arm64/copyinout.SMon Oct 19 10:38:40 2020
(r366830)
+++ head/sys/arm64/arm64/copyinout.SMon Oct 19 12:06:16 2020
(r366831)
@@ -37,6 +37,14 @@ __FBSDID("$FreeBSD$");
#include "assym.inc"
+.macro check_user_access user_arg, size_arg, bad_access_func
+ addsx6, x\user_arg, x\size_arg
+ b.cs\bad_access_func
+ ldr x7, =VM_MAXUSER_ADDRESS
+ cmp x6, x7
+ b.hi\bad_access_func
+.endm
+
/*
* Fault handler for the copy{in,out} functions below.
*/
@@ -55,11 +63,7 @@ END(copyio_fault)
*/
ENTRY(copyout)
cbz x2, 1f
- addsx3, x1, x2
- b.cscopyio_fault_nopcb
- ldr x4, =VM_MAXUSER_ADDRESS
- cmp x3, x4
- b.hicopyio_fault_nopcb
+ check_user_access 1, 2, copyio_fault_nopcb
b copycommon
@@ -75,11 +79,7 @@ END(copyout)
*/
ENTRY(copyin)
cbz x2, 1f
- addsx3, x0, x2
- b.cscopyio_fault_nopcb
- ldr x4, =VM_MAXUSER_ADDRESS
- cmp x3, x4
- b.hicopyio_fault_nopcb
+ check_user_access 0, 2, copyio_fault_nopcb
b copycommon
Modified: head/sys/arm64/arm64/support.S
==
--- head/sys/arm64/arm64/support.S Mon Oct 19 10:38:40 2020
(r366830)
+++ head/sys/arm64/arm64/support.S Mon Oct 19 12:06:16 2020
(r366831)
@@ -38,6 +38,12 @@ __FBSDID("$FreeBSD$");
#include "assym.inc"
+.macro check_user_access user_arg, limit, bad_addr_func
+ ldr x7, =(\limit)
+ cmp x\user_arg, x7
+ b.cs\bad_addr_func
+.endm
+
/*
* One of the fu* or su* functions failed, return -1.
*/
@@ -53,9 +59,7 @@ END(fsu_fault)
* int casueword32(volatile uint32_t *, uint32_t, uint32_t *, uint32_t)
*/
ENTRY(casueword32)
- ldr x4, =(VM_MAXUSER_ADDRESS-3)
- cmp x0, x4
- b.csfsu_fault_nopcb
+ check_user_access 0, (VM_MAXUSER_ADDRESS-3), fsu_fault_nopcb
adr x6, fsu_fault /* Load the fault handler */
mov w5, #1
SET_FAULT_HANDLER(x6, x4) /* And set it */
@@ -75,9 +79,7 @@ END(casueword32)
* int casueword(volatile u_long *, u_long, u_long *, u_long)
*/
ENTRY(casueword)
- ldr x4, =(VM_MAXUSER_ADDRESS-7)
- cmp x0, x4
- b.csfsu_fault_nopcb
+ check_user_access 0, (VM_MAXUSER_ADDRESS-7), fsu_fault_nopcb
adr x6, fsu_fault /* Load the fault handler */
mov w5, #1
SET_FAULT_HANDLER(x6, x4) /* And set it */
@@ -97,9 +99,7 @@ END(casueword)
* int fubyte(volatile const void *)
*/
ENTRY(fubyte)
- ldr x1, =VM_MAXUSER_ADDRESS
- cmp x0, x1
- b.csfsu_fault_nopcb
+ check_user_access 0, (VM_MAXUSER_ADDRESS), fsu_fault_nopcb
adr x6, fsu_fault /* Load the fault handler */
SET_FAULT_HANDLER(x6, x1) /* And set it */
ldtrb w0, [x0]/* Try loading the data */
@@ -111,9 +111,7 @@ END(fubyte)
* int fuword(volatile const void *)
*/
ENTRY(fuword16)
- ldr x1, =(VM_MAXUSER_ADDRESS-1)
- cmp x0, x1
- b.csfsu_fault_nopcb
+ check_user_access 0, (VM_MAXUSER_ADDRESS-1), fsu_fault_nopcb
adr x6, fsu_fault /* Load the fault handler */
SET_FAULT_HANDLER(x6, x1) /* And set it */
ldtrh w0, [x0]/* Try loading the data */
@@ -125,9 +123,7 @@ END(fuword16)
* int32_t fueword32(volatile const void *, int32_t *)
*/
ENTRY(fueword32)
- ldr x2, =(VM_MAXUSER_ADDRESS-3)
- cmp x0, x2
- b.csfsu_fault_nopcb
+ check_user_access 0, (VM_MAXUSER_ADDRESS-3), fsu_fault_nopcb
adr x6, fsu_fault /* Load the fault handler */
SET_FAULT_HANDLER(x6, x2) /* And set it */
ldtrw0, [x0]/* Try loading the data */
@@ -143,9 +139,7 @@ END(fueword32)
*/
ENTRY(fueword)
EENTRY(fueword64)
- ldr x2, =(VM_MAXUSER_ADDRESS-7)
- cmp x0, x2
- b.csfsu_fault_nopcb
+ check_user_access 0, (VM_MAXUSER_ADDRESS-7), fsu_fault_nopcb
adr x6, fsu_fault /* Load the
svn commit: r366706 - head/sys/arm64/arm64
Author: andrew Date: Wed Oct 14 15:31:42 2020 New Revision: 366706 URL: https://svnweb.freebsd.org/changeset/base/366706 Log: Remove direct user access from the arm64 copyinstr These already use the load variant that simulates userspace access. Remove the macros that enable normal loads and stores from userspace as they are unneeded. Sponsored by: Innovate UK Modified: head/sys/arm64/arm64/copyinout.S Modified: head/sys/arm64/arm64/copyinout.S == --- head/sys/arm64/arm64/copyinout.SWed Oct 14 15:26:19 2020 (r366705) +++ head/sys/arm64/arm64/copyinout.SWed Oct 14 15:31:42 2020 (r366706) @@ -100,7 +100,6 @@ ENTRY(copyinstr) adr x6, copyio_fault /* Get the handler address */ SET_FAULT_HANDLER(x6, x7) /* Set the handler */ - ENTER_USER_ACCESS(w6, x7) ldr x7, =VM_MAXUSER_ADDRESS 1: cmp x0, x7 @@ -113,8 +112,7 @@ ENTRY(copyinstr) sub x2, x2, #1 /* len-- */ cbnzx2, 1b -2: EXIT_USER_ACCESS(w6) - SET_FAULT_HANDLER(xzr, x7) /* Clear the handler */ +2: SET_FAULT_HANDLER(xzr, x7) /* Clear the handler */ 3: cbz x3, 4f /* Check if done != NULL */ ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r366670 - head/stand/efi/loader/arch/arm64
Author: andrew Date: Tue Oct 13 16:51:05 2020 New Revision: 366670 URL: https://svnweb.freebsd.org/changeset/base/366670 Log: Use adrp in the arm64 efi loader On startup the arm64 efi loaders need to know PC-relative addresses. Previously we used the adr instruction to find this address, however this instruction is limited to +/- 1MiB. Switch to adrp to find the 4k page the address is within and an add to set the bottom 12 bits. This lets us address +/- 4GiB which should be large enough for now. Reported by: imp MFC after:2 weeks Sponsored by: Innovate UK Modified: head/stand/efi/loader/arch/arm64/start.S Modified: head/stand/efi/loader/arch/arm64/start.S == --- head/stand/efi/loader/arch/arm64/start.STue Oct 13 16:19:21 2020 (r39) +++ head/stand/efi/loader/arch/arm64/start.STue Oct 13 16:51:05 2020 (r366670) @@ -142,8 +142,10 @@ _start: /* Save the boot params to the stack */ stp x0, x1, [sp, #-16]! - adr x0, __bss_start - adr x1, __bss_end + adrpx0, __bss_start + add x0, x0, :lo12:__bss_start + adrpx1, __bss_end + add x1, x1, :lo12:__bss_end b 2f @@ -153,8 +155,10 @@ _start: cmp x0, x1 b.lo1b - adr x0, ImageBase - adr x1, _DYNAMIC + adrpx0, ImageBase + add x0, x0, :lo12:ImageBase + adrpx1, _DYNAMIC + add x1, x1, :lo12:_DYNAMIC bl self_reloc @@ -165,7 +169,8 @@ _start: * Load the stack to use. The default stack may be too small for * the lua loader. */ - adr x2, initstack_end + adrpx2, initstack_end + add x2, x2, :lo12:initstack_end mov sp, x2 #endif ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r366666 - head/sys/sys
Author: andrew Date: Tue Oct 13 10:31:12 2020 New Revision: 36 URL: https://svnweb.freebsd.org/changeset/base/36 Log: Bump __FreeBSD_version for the fix to arm64 write-only mappings Sponsored by: Innovate UK Modified: head/sys/sys/param.h Modified: head/sys/sys/param.h == --- head/sys/sys/param.hTue Oct 13 10:26:15 2020(r35) +++ head/sys/sys/param.hTue Oct 13 10:31:12 2020(r36) @@ -60,7 +60,7 @@ * in the range 5 to 9. */ #undef __FreeBSD_version -#define __FreeBSD_version 1300119 /* Master, propagated to newvers */ +#define __FreeBSD_version 1300120 /* Master, propagated to newvers */ /* * __FreeBSD_kernel__ indicates that this system uses the kernel of FreeBSD, ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r366665 - in head: sys/arm64/arm64 tests/sys/vm
Author: andrew
Date: Tue Oct 13 10:26:15 2020
New Revision: 35
URL: https://svnweb.freebsd.org/changeset/base/35
Log:
Fix write only mappings on arm64
When trapping on a wrote access to a buffer the kernel has mapped as write
only we should only pass the VM_PROT_WRITE flag. Previously the call to
vm_fault_trap as the VM_PROT_READ flag was unexpected.
Reported by: manu
Sponsored by: Innovate UK
Modified:
head/sys/arm64/arm64/trap.c
head/tests/sys/vm/mmap_test.c
Modified: head/sys/arm64/arm64/trap.c
==
--- head/sys/arm64/arm64/trap.c Tue Oct 13 08:14:33 2020(r34)
+++ head/sys/arm64/arm64/trap.c Tue Oct 13 10:26:15 2020(r35)
@@ -301,7 +301,7 @@ data_abort(struct thread *td, struct trapframe *frame,
break;
default:
ftype = (esr & ISS_DATA_WnR) == 0 ? VM_PROT_READ :
- VM_PROT_READ | VM_PROT_WRITE;
+ VM_PROT_WRITE;
break;
}
Modified: head/tests/sys/vm/mmap_test.c
==
--- head/tests/sys/vm/mmap_test.c Tue Oct 13 08:14:33 2020
(r34)
+++ head/tests/sys/vm/mmap_test.c Tue Oct 13 10:26:15 2020
(r35)
@@ -259,6 +259,21 @@ ATF_TC_BODY(mmap__dev_zero_shared, tc)
close(fd);
}
+ATF_TC_WITHOUT_HEAD(mmap__write_only);
+ATF_TC_BODY(mmap__write_only, tc)
+{
+ void *p;
+ int pagesize;
+
+ ATF_REQUIRE((pagesize = getpagesize()) > 0);
+ p = mmap(NULL, pagesize, PROT_WRITE, MAP_ANON, -1, 0);
+ ATF_REQUIRE(p != MAP_FAILED);
+
+ *(volatile uint32_t *)p = 0x12345678;
+
+ munmap(p, pagesize);
+}
+
ATF_TP_ADD_TCS(tp)
{
@@ -266,6 +281,7 @@ ATF_TP_ADD_TCS(tp)
ATF_TP_ADD_TC(tp, mmap__bad_arguments);
ATF_TP_ADD_TC(tp, mmap__dev_zero_private);
ATF_TP_ADD_TC(tp, mmap__dev_zero_shared);
+ ATF_TP_ADD_TC(tp, mmap__write_only);
return (atf_no_error());
}
___
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svn commit: r366111 - head/sys/arm64/arm64
Author: andrew
Date: Thu Sep 24 10:42:28 2020
New Revision: 366111
URL: https://svnweb.freebsd.org/changeset/base/366111
Log:
Clean up the arm64 bus_dma_run_filter
- We can exit the loop as soon as the filter check passes.
- The alignment check has already passed so there is no need to also run
it here.
Sponsored by: Innovate UK
Modified:
head/sys/arm64/arm64/busdma_machdep.c
Modified: head/sys/arm64/arm64/busdma_machdep.c
==
--- head/sys/arm64/arm64/busdma_machdep.c Thu Sep 24 10:40:49 2020
(r366110)
+++ head/sys/arm64/arm64/busdma_machdep.c Thu Sep 24 10:42:28 2020
(r366111)
@@ -99,19 +99,17 @@ bus_dma_dflt_lock(void *arg, bus_dma_lock_op_t op)
int
bus_dma_run_filter(struct bus_dma_tag_common *tc, bus_addr_t paddr)
{
- int retval;
- retval = 0;
- do {
- if (((paddr > tc->lowaddr && paddr <= tc->highaddr) ||
- ((paddr & (tc->alignment - 1)) != 0)) &&
+ while (tc != NULL) {
+ if ((paddr > tc->lowaddr && paddr <= tc->highaddr) &&
(tc->filter == NULL ||
(*tc->filter)(tc->filterarg, paddr) != 0))
- retval = 1;
+ return (1);
tc = tc->parent;
- } while (retval == 0 && tc != NULL);
- return (retval);
+ }
+
+ return (0);
}
int
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svn commit: r366110 - head/sys/arm64/arm64
Author: andrew
Date: Thu Sep 24 10:40:49 2020
New Revision: 366110
URL: https://svnweb.freebsd.org/changeset/base/366110
Log:
Ensure arm64 DMA alignment is passed from parents to children
This ensures the alignment check will take these alignments into account.
Sponsored by: Innovate UK
Modified:
head/sys/arm64/arm64/busdma_machdep.c
Modified: head/sys/arm64/arm64/busdma_machdep.c
==
--- head/sys/arm64/arm64/busdma_machdep.c Thu Sep 24 09:06:04 2020
(r366109)
+++ head/sys/arm64/arm64/busdma_machdep.c Thu Sep 24 10:40:49 2020
(r366110)
@@ -167,6 +167,7 @@ common_bus_dma_tag_create(struct bus_dma_tag_common *p
common->impl = parent->impl;
common->lowaddr = MIN(parent->lowaddr, common->lowaddr);
common->highaddr = MAX(parent->highaddr, common->highaddr);
+ common->alignment = MAX(parent->alignment, common->alignment);
if (common->boundary == 0)
common->boundary = parent->boundary;
else if (parent->boundary != 0) {
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svn commit: r366106 - head/sys/arm64/arm64
Author: andrew
Date: Thu Sep 24 07:17:05 2020
New Revision: 366106
URL: https://svnweb.freebsd.org/changeset/base/366106
Log:
Bounce in more cases in the arm64 busdma
We need to use a bounce buffer when the memory we are operating on is not
aligned to a cacheline, and not aligned to the maps alignment.
The former is to stop other threads from dirtying the cacheline while we
are performing DMA operations with it. The latter is to check memory
passed in by a driver is correctly aligned for the device.
Reviewed by: mmel
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D26496
Modified:
head/sys/arm64/arm64/busdma_bounce.c
Modified: head/sys/arm64/arm64/busdma_bounce.c
==
--- head/sys/arm64/arm64/busdma_bounce.cThu Sep 24 07:13:13 2020
(r366105)
+++ head/sys/arm64/arm64/busdma_bounce.cThu Sep 24 07:17:05 2020
(r366106)
@@ -139,6 +139,7 @@ struct bus_dmamap {
u_int flags;
#defineDMAMAP_COHERENT (1 << 0)
#defineDMAMAP_FROM_DMAMEM (1 << 1)
+#defineDMAMAP_MBUF (1 << 2)
int sync_count;
struct sync_listslist[];
};
@@ -155,8 +156,8 @@ static bus_addr_t add_bounce_page(bus_dma_tag_t dmat,
vm_offset_t vaddr, bus_addr_t addr, bus_size_t size);
static void free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage);
int run_filter(bus_dma_tag_t dmat, bus_addr_t paddr);
-static bool _bus_dmamap_pagesneeded(bus_dma_tag_t dmat, vm_paddr_t buf,
-bus_size_t buflen, int *pagesneeded);
+static bool _bus_dmamap_pagesneeded(bus_dma_tag_t dmat, bus_dmamap_t map,
+vm_paddr_t buf, bus_size_t buflen, int *pagesneeded);
static void _bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map,
pmap_t pmap, void *buf, bus_size_t buflen, int flags);
static void _bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map,
@@ -164,20 +165,70 @@ static void _bus_dmamap_count_phys(bus_dma_tag_t dmat,
static int _bus_dmamap_reserve_pages(bus_dma_tag_t dmat, bus_dmamap_t map,
int flags);
+/*
+ * Return true if the DMA should bounce because the start or end does not fall
+ * on a cacheline boundary (which would require a partial cacheline flush).
+ * COHERENT memory doesn't trigger cacheline flushes. Memory allocated by
+ * bus_dmamem_alloc() is always aligned to cacheline boundaries, and there's a
+ * strict rule that such memory cannot be accessed by the CPU while DMA is in
+ * progress (or by multiple DMA engines at once), so that it's always safe to
do
+ * full cacheline flushes even if that affects memory outside the range of a
+ * given DMA operation that doesn't involve the full allocated buffer. If
we're
+ * mapping an mbuf, that follows the same rules as a buffer we allocated.
+ */
static bool
-might_bounce(bus_dma_tag_t dmat)
+cacheline_bounce(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t paddr,
+bus_size_t size)
{
+#defineDMAMAP_CACHELINE_FLAGS
\
+(DMAMAP_FROM_DMAMEM | DMAMAP_COHERENT | DMAMAP_MBUF)
+ if ((dmat->bounce_flags & BF_COHERENT) != 0)
+ return (false);
+ if (map != NULL && (map->flags & DMAMAP_CACHELINE_FLAGS) != 0)
+ return (false);
+ return (((paddr | size) & (dcache_line_size - 1)) != 0);
+#undef DMAMAP_CACHELINE_FLAGS
+}
+
+/*
+ * Return true if the given address does not fall on the alignment boundary.
+ */
+static bool
+alignment_bounce(bus_dma_tag_t dmat, bus_addr_t addr)
+{
+
+ return ((addr & (dmat->common.alignment - 1)) != 0);
+}
+
+static bool
+might_bounce(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t paddr,
+bus_size_t size)
+{
+
if ((dmat->bounce_flags & BF_COULD_BOUNCE) != 0)
return (true);
+ if (cacheline_bounce(dmat, map, paddr, size))
+ return (true);
+
+ if (alignment_bounce(dmat, paddr))
+ return (true);
+
return (false);
}
static bool
-must_bounce(bus_dma_tag_t dmat, bus_addr_t paddr)
+must_bounce(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t paddr,
+bus_size_t size)
{
+ if (cacheline_bounce(dmat, map, paddr, size))
+ return (true);
+
+ if (alignment_bounce(dmat, paddr))
+ return (true);
+
if ((dmat->bounce_flags & BF_COULD_BOUNCE) != 0 &&
bus_dma_run_filter(>common, paddr))
return (true);
@@ -240,8 +291,7 @@ bounce_bus_dma_tag_create(bus_dma_tag_t parent, bus_si
newtag->common.alignment > 1)
newtag->bounce_flags |= BF_COULD_BOUNCE;
- if (((newtag->bounce_flags & BF_COULD_BOUNCE) != 0) &&
- (flags & BUS_DMA_ALLOCNOW) != 0) {
+ if ((flags & BUS_DMA_ALLOCNOW) != 0) {
struct bounce_zone *bz;
/* Must bounce
svn commit: r366105 - head/sys/arm64/arm64
Author: andrew
Date: Thu Sep 24 07:13:13 2020
New Revision: 366105
URL: https://svnweb.freebsd.org/changeset/base/366105
Log:
Ensure we always align and size arm64 busdma allocations to a cacheline
This will ensure nothing modifies the cacheline while DMA is in progress
so we won't need to bounce the data.
Reviewed by: mmel
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D26495
Modified:
head/sys/arm64/arm64/busdma_bounce.c
Modified: head/sys/arm64/arm64/busdma_bounce.c
==
--- head/sys/arm64/arm64/busdma_bounce.cThu Sep 24 07:10:34 2020
(r366104)
+++ head/sys/arm64/arm64/busdma_bounce.cThu Sep 24 07:13:13 2020
(r366105)
@@ -72,6 +72,8 @@ struct bounce_zone;
struct bus_dma_tag {
struct bus_dma_tag_common common;
+ size_t alloc_size;
+ size_t alloc_alignment;
int map_count;
int bounce_flags;
bus_dma_segment_t *segments;
@@ -208,8 +210,22 @@ bounce_bus_dma_tag_create(bus_dma_tag_t parent, bus_si
newtag->map_count = 0;
newtag->segments = NULL;
- if ((flags & BUS_DMA_COHERENT) != 0)
+ if ((flags & BUS_DMA_COHERENT) != 0) {
newtag->bounce_flags |= BF_COHERENT;
+ newtag->alloc_alignment = newtag->common.alignment;
+ newtag->alloc_size = newtag->common.maxsize;
+ } else {
+ /*
+* Ensure the buffer is aligned to a cacheline when allocating
+* a non-coherent buffer. This is so we don't have any data
+* that another CPU may be accessing around DMA buffer
+* causing the cache to become dirty.
+*/
+ newtag->alloc_alignment = MAX(newtag->common.alignment,
+ dcache_line_size);
+ newtag->alloc_size = roundup2(newtag->common.maxsize,
+ dcache_line_size);
+ }
if (parent != NULL) {
if ((newtag->common.filter != NULL ||
@@ -520,23 +536,23 @@ bounce_bus_dmamem_alloc(bus_dma_tag_t dmat, void** vad
*
* In the meantime warn the user if malloc gets it wrong.
*/
- if ((dmat->common.maxsize <= PAGE_SIZE) &&
- (dmat->common.alignment <= dmat->common.maxsize) &&
+ if ((dmat->alloc_size <= PAGE_SIZE) &&
+ (dmat->alloc_alignment <= dmat->alloc_size) &&
dmat->common.lowaddr >= ptoa((vm_paddr_t)Maxmem) &&
attr == VM_MEMATTR_DEFAULT) {
- *vaddr = malloc(dmat->common.maxsize, M_DEVBUF, mflags);
+ *vaddr = malloc(dmat->alloc_size, M_DEVBUF, mflags);
} else if (dmat->common.nsegments >=
- howmany(dmat->common.maxsize, MIN(dmat->common.maxsegsz,
PAGE_SIZE)) &&
- dmat->common.alignment <= PAGE_SIZE &&
+ howmany(dmat->alloc_size, MIN(dmat->common.maxsegsz, PAGE_SIZE)) &&
+ dmat->alloc_alignment <= PAGE_SIZE &&
(dmat->common.boundary % PAGE_SIZE) == 0) {
/* Page-based multi-segment allocations allowed */
- *vaddr = (void *)kmem_alloc_attr(dmat->common.maxsize, mflags,
+ *vaddr = (void *)kmem_alloc_attr(dmat->alloc_size, mflags,
0ul, dmat->common.lowaddr, attr);
dmat->bounce_flags |= BF_KMEM_ALLOC;
} else {
- *vaddr = (void *)kmem_alloc_contig(dmat->common.maxsize, mflags,
- 0ul, dmat->common.lowaddr, dmat->common.alignment != 0 ?
- dmat->common.alignment : 1ul, dmat->common.boundary, attr);
+ *vaddr = (void *)kmem_alloc_contig(dmat->alloc_size, mflags,
+ 0ul, dmat->common.lowaddr, dmat->alloc_alignment != 0 ?
+ dmat->alloc_alignment : 1ul, dmat->common.boundary, attr);
dmat->bounce_flags |= BF_KMEM_ALLOC;
}
if (*vaddr == NULL) {
@@ -544,7 +560,7 @@ bounce_bus_dmamem_alloc(bus_dma_tag_t dmat, void** vad
__func__, dmat, dmat->common.flags, ENOMEM);
free(*mapp, M_DEVBUF);
return (ENOMEM);
- } else if (vtophys(*vaddr) & (dmat->common.alignment - 1)) {
+ } else if (vtophys(*vaddr) & (dmat->alloc_alignment - 1)) {
printf("bus_dmamem_alloc failed to align memory properly.\n");
}
dmat->map_count++;
@@ -571,7 +587,7 @@ bounce_bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr
if ((dmat->bounce_flags & BF_KMEM_ALLOC) == 0)
free(vaddr, M_DEVBUF);
else
- kmem_free((vm_offset_t)vaddr, dmat->common.maxsize);
+ kmem_free((vm_offset_t)vaddr, dmat->alloc_size);
free(map, M_DEVBUF);
dmat->map_count--;
CTR3(KTR_BUSDMA, "%s: tag %p flags 0x%x", __func__,
svn commit: r366103 - head/sys/arm64/arm64
Author: andrew
Date: Thu Sep 24 07:07:54 2020
New Revision: 366103
URL: https://svnweb.freebsd.org/changeset/base/366103
Log:
Add a coherent flag on the arm64 dma map struct
Use it to decide if we can skip cache management.
While here remove the DMAMAP_COULD_BOUNCE flag as it's unneeded.
Reviewed by: mmel
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D26494
Modified:
head/sys/arm64/arm64/busdma_bounce.c
Modified: head/sys/arm64/arm64/busdma_bounce.c
==
--- head/sys/arm64/arm64/busdma_bounce.cThu Sep 24 07:03:26 2020
(r366102)
+++ head/sys/arm64/arm64/busdma_bounce.cThu Sep 24 07:07:54 2020
(r366103)
@@ -135,7 +135,7 @@ struct bus_dmamap {
void *callback_arg;
STAILQ_ENTRY(bus_dmamap) links;
u_int flags;
-#defineDMAMAP_COULD_BOUNCE (1 << 0)
+#defineDMAMAP_COHERENT (1 << 0)
#defineDMAMAP_FROM_DMAMEM (1 << 1)
int sync_count;
struct sync_listslist[];
@@ -367,8 +367,6 @@ bounce_bus_dmamap_create(bus_dma_tag_t dmat, int flags
}
bz = dmat->bounce_zone;
- (*mapp)->flags = DMAMAP_COULD_BOUNCE;
-
/*
* Attempt to add pages to our pool on a per-instance
* basis up to a sane limit.
@@ -396,10 +394,13 @@ bounce_bus_dmamap_create(bus_dma_tag_t dmat, int flags
}
bz->map_count++;
}
- if (error == 0)
+ if (error == 0) {
dmat->map_count++;
- else
+ if ((dmat->bounce_flags & BF_COHERENT) != 0)
+ (*mapp)->flags |= DMAMAP_COHERENT;
+ } else {
free(*mapp, M_DEVBUF);
+ }
CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
__func__, dmat, dmat->common.flags, error);
return (error);
@@ -421,11 +422,8 @@ bounce_bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmam
CTR3(KTR_BUSDMA, "%s: tag %p error %d", __func__, dmat, EBUSY);
return (EBUSY);
}
- if (dmat->bounce_zone) {
- KASSERT((map->flags & DMAMAP_COULD_BOUNCE) != 0,
- ("%s: Bounce zone when cannot bounce", __func__));
+ if (dmat->bounce_zone)
dmat->bounce_zone->map_count--;
- }
free(map, M_DEVBUF);
dmat->map_count--;
CTR2(KTR_BUSDMA, "%s: tag %p error 0", __func__, dmat);
@@ -490,9 +488,18 @@ bounce_bus_dmamem_alloc(bus_dma_tag_t dmat, void** vad
__func__, dmat, dmat->common.flags, ENOMEM);
return (ENOMEM);
}
- (*mapp)->flags = DMAMAP_FROM_DMAMEM;
/*
+* Mark the map as coherent if we used uncacheable memory or the
+* tag was already marked as coherent.
+*/
+ if (attr == VM_MEMATTR_UNCACHEABLE ||
+ (dmat->bounce_flags & BF_COHERENT) != 0)
+ (*mapp)->flags |= DMAMAP_COHERENT;
+
+ (*mapp)->flags |= DMAMAP_FROM_DMAMEM;
+
+ /*
* Allocate the buffer from the malloc(9) allocator if...
* - It's small enough to fit into a single power of two sized bucket.
* - The alignment is less than or equal to the maximum size
@@ -760,7 +767,7 @@ bounce_bus_dmamap_load_phys(bus_dma_tag_t dmat, bus_dm
sgsize = MIN(sgsize, PAGE_SIZE - (curaddr & PAGE_MASK));
curaddr = add_bounce_page(dmat, map, 0, curaddr,
sgsize);
- } else if ((dmat->bounce_flags & BF_COHERENT) == 0) {
+ } else if ((map->flags & DMAMAP_COHERENT) == 0) {
if (map->sync_count > 0)
sl_end = sl->paddr + sl->datacount;
@@ -846,7 +853,7 @@ bounce_bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_
sgsize = MIN(sgsize, max_sgsize);
curaddr = add_bounce_page(dmat, map, kvaddr, curaddr,
sgsize);
- } else if ((dmat->bounce_flags & BF_COHERENT) == 0) {
+ } else if ((map->flags & DMAMAP_COHERENT) == 0) {
sgsize = MIN(sgsize, max_sgsize);
if (map->sync_count > 0) {
sl_pend = sl->paddr + sl->datacount;
@@ -896,8 +903,6 @@ bounce_bus_dmamap_waitok(bus_dma_tag_t dmat, bus_dmama
struct memdesc *mem, bus_dmamap_callback_t *callback, void *callback_arg)
{
- if ((map->flags & DMAMAP_COULD_BOUNCE) == 0)
- return;
map->mem = *mem;
map->dmat = dmat;
map->callback = callback;
@@ -1042,7 +1047,7 @@ bounce_bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_
(void *)bpage->vaddr,
svn commit: r366102 - head/sys/arm64/arm64
Author: andrew
Date: Thu Sep 24 07:03:26 2020
New Revision: 366102
URL: https://svnweb.freebsd.org/changeset/base/366102
Log:
Add bounce helpers to the arm64 busdma
Add helper functions to the arm64 busdma for common cases of checking if
we may need to bounce, and if we must bounce for a given address.
These will be expanded later as we handle cache-misaligned memory.
Reported by: mmel
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D26493
Modified:
head/sys/arm64/arm64/busdma_bounce.c
Modified: head/sys/arm64/arm64/busdma_bounce.c
==
--- head/sys/arm64/arm64/busdma_bounce.cThu Sep 24 06:40:35 2020
(r366101)
+++ head/sys/arm64/arm64/busdma_bounce.cThu Sep 24 07:03:26 2020
(r366102)
@@ -162,6 +162,27 @@ static void _bus_dmamap_count_phys(bus_dma_tag_t dmat,
static int _bus_dmamap_reserve_pages(bus_dma_tag_t dmat, bus_dmamap_t map,
int flags);
+static bool
+might_bounce(bus_dma_tag_t dmat)
+{
+
+ if ((dmat->bounce_flags & BF_COULD_BOUNCE) != 0)
+ return (true);
+
+ return (false);
+}
+
+static bool
+must_bounce(bus_dma_tag_t dmat, bus_addr_t paddr)
+{
+
+ if ((dmat->bounce_flags & BF_COULD_BOUNCE) != 0 &&
+ bus_dma_run_filter(>common, paddr))
+ return (true);
+
+ return (false);
+}
+
/*
* Allocate a device specific dma_tag.
*/
@@ -278,7 +299,7 @@ static bool
bounce_bus_dma_id_mapped(bus_dma_tag_t dmat, vm_paddr_t buf, bus_size_t buflen)
{
- if ((dmat->bounce_flags & BF_COULD_BOUNCE) == 0)
+ if (!might_bounce(dmat))
return (true);
return (!_bus_dmamap_pagesneeded(dmat, buf, buflen, NULL));
}
@@ -566,7 +587,7 @@ _bus_dmamap_pagesneeded(bus_dma_tag_t dmat, vm_paddr_t
curaddr = buf;
while (buflen != 0) {
sgsize = MIN(buflen, dmat->common.maxsegsz);
- if (bus_dma_run_filter(>common, curaddr)) {
+ if (must_bounce(dmat, curaddr)) {
sgsize = MIN(sgsize,
PAGE_SIZE - (curaddr & PAGE_MASK));
if (pagesneeded == NULL)
@@ -587,7 +608,7 @@ _bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_
bus_size_t buflen, int flags)
{
- if ((map->flags & DMAMAP_COULD_BOUNCE) != 0 && map->pagesneeded == 0) {
+ if (map->pagesneeded == 0) {
_bus_dmamap_pagesneeded(dmat, buf, buflen, >pagesneeded);
CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded);
}
@@ -602,7 +623,7 @@ _bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap
bus_addr_t paddr;
bus_size_t sg_len;
- if ((map->flags & DMAMAP_COULD_BOUNCE) != 0 && map->pagesneeded == 0) {
+ if (map->pagesneeded == 0) {
CTR4(KTR_BUSDMA, "lowaddr= %d Maxmem= %d, boundary= %d, "
"alignment= %d", dmat->common.lowaddr,
ptoa((vm_paddr_t)Maxmem),
@@ -622,7 +643,7 @@ _bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap
paddr = pmap_kextract(vaddr);
else
paddr = pmap_extract(pmap, vaddr);
- if (bus_dma_run_filter(>common, paddr) != 0) {
+ if (must_bounce(dmat, paddr)) {
sg_len = roundup2(sg_len,
dmat->common.alignment);
map->pagesneeded++;
@@ -720,7 +741,7 @@ bounce_bus_dmamap_load_phys(bus_dma_tag_t dmat, bus_dm
if (segs == NULL)
segs = dmat->segments;
- if ((dmat->bounce_flags & BF_COULD_BOUNCE) != 0) {
+ if (might_bounce(dmat)) {
_bus_dmamap_count_phys(dmat, map, buf, buflen, flags);
if (map->pagesneeded != 0) {
error = _bus_dmamap_reserve_pages(dmat, map, flags);
@@ -735,9 +756,7 @@ bounce_bus_dmamap_load_phys(bus_dma_tag_t dmat, bus_dm
while (buflen > 0) {
curaddr = buf;
sgsize = MIN(buflen, dmat->common.maxsegsz);
- if (((dmat->bounce_flags & BF_COULD_BOUNCE) != 0) &&
- map->pagesneeded != 0 &&
- bus_dma_run_filter(>common, curaddr)) {
+ if (map->pagesneeded != 0 && must_bounce(dmat, curaddr)) {
sgsize = MIN(sgsize, PAGE_SIZE - (curaddr & PAGE_MASK));
curaddr = add_bounce_page(dmat, map, 0, curaddr,
sgsize);
@@ -791,7 +810,7 @@ bounce_bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_
if (segs == NULL)
segs = dmat->segments;
- if ((dmat->bounce_flags & BF_COULD_BOUNCE) != 0) {
+ if (might_bounce(dmat)) {
_bus_dmamap_count_pages(dmat, map, pmap, buf, buflen, flags);
svn commit: r365750 - head/sys/arm64/arm64
Author: andrew Date: Tue Sep 15 14:15:04 2020 New Revision: 365750 URL: https://svnweb.freebsd.org/changeset/base/365750 Log: Use ATTR_DEFAULT in the arm64 locore.S We can use ATTR_DEFAULT directly in locore.S as it fits within an orr instruction operand. Sponsored by: Innovate UK Modified: head/sys/arm64/arm64/locore.S Modified: head/sys/arm64/arm64/locore.S == --- head/sys/arm64/arm64/locore.S Tue Sep 15 13:36:19 2020 (r365749) +++ head/sys/arm64/arm64/locore.S Tue Sep 15 14:15:04 2020 (r365750) @@ -614,10 +614,7 @@ build_l1_block_pagetable: /* Build the L1 block entry */ orr x12, x7, #L1_BLOCK - orr x12, x12, #(ATTR_AF) -#ifdef SMP - orr x12, x12, ATTR_SH(ATTR_SH_IS) -#endif + orr x12, x12, #(ATTR_DEFAULT) /* Only use the output address bits */ lsr x9, x9, #L1_SHIFT @@ -655,11 +652,8 @@ build_l2_block_pagetable: /* Build the L2 block entry */ lsl x12, x7, #2 orr x12, x12, #L2_BLOCK - orr x12, x12, #(ATTR_AF) + orr x12, x12, #(ATTR_DEFAULT) orr x12, x12, #(ATTR_S1_UXN) -#ifdef SMP - orr x12, x12, ATTR_SH(ATTR_SH_IS) -#endif /* Only use the output address bits */ lsr x9, x9, #L2_SHIFT ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r365727 - in head/usr.bin: . gprof
Author: andrew
Date: Mon Sep 14 16:18:53 2020
New Revision: 365727
URL: https://svnweb.freebsd.org/changeset/base/365727
Log:
Cleanups for gprof:
* Remove identical or almost identical headers
* Only build aout.c on amd64 and i386. None of the the other current
architectures ever supported running a.out binaries
* Enable on all architectures
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D26369
Deleted:
head/usr.bin/gprof/amd64.h
head/usr.bin/gprof/arm.h
head/usr.bin/gprof/i386.h
head/usr.bin/gprof/mips.h
head/usr.bin/gprof/powerpc.h
head/usr.bin/gprof/riscv.h
head/usr.bin/gprof/sparc64.h
Modified:
head/usr.bin/Makefile
head/usr.bin/gprof/Makefile
head/usr.bin/gprof/gprof.h
Modified: head/usr.bin/Makefile
==
--- head/usr.bin/Makefile Mon Sep 14 16:12:28 2020(r365726)
+++ head/usr.bin/Makefile Mon Sep 14 16:18:53 2020(r365727)
@@ -262,11 +262,7 @@ SUBDIR.${MK_TOOLCHAIN}+= ctags
SUBDIR.${MK_TOOLCHAIN}+= cxxfilt
SUBDIR.${MK_TOOLCHAIN}+= objcopy
SUBDIR.${MK_TOOLCHAIN}+= file2c
-# ARM64TODO gprof does not build
-# RISCVTODO gprof does not build
-.if ${MACHINE_ARCH} != "aarch64"
SUBDIR.${MK_TOOLCHAIN}+= gprof
-.endif
SUBDIR.${MK_TOOLCHAIN}+= indent
SUBDIR.${MK_TOOLCHAIN}+= lex
SUBDIR.${MK_TOOLCHAIN}+= mkstr
Modified: head/usr.bin/gprof/Makefile
==
--- head/usr.bin/gprof/Makefile Mon Sep 14 16:12:28 2020(r365726)
+++ head/usr.bin/gprof/Makefile Mon Sep 14 16:18:53 2020(r365727)
@@ -5,8 +5,7 @@ PROG= gprof
SRCS= gprof.c arcs.c dfn.c elf.c lookup.c hertz.c \
printgprof.c printlist.c kernel.c
-.if ${MACHINE_ARCH} != "aarch64" && ${MACHINE_CPUARCH} != "riscv" && \
-${MACHINE_ARCH} != "s390x"
+.if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386"
SRCS+= aout.c
CFLAGS+= -DWITH_AOUT
.endif
Modified: head/usr.bin/gprof/gprof.h
==
--- head/usr.bin/gprof/gprof.h Mon Sep 14 16:12:28 2020(r365726)
+++ head/usr.bin/gprof/gprof.h Mon Sep 14 16:18:53 2020(r365727)
@@ -39,27 +39,14 @@
#include
#include
-#if __amd64__
-# include "amd64.h"
-#endif
-#if __arm__
-# include "arm.h"
-#endif
-#if __i386__
-# include "i386.h"
-#endif
-#if __mips__
-# include "mips.h"
-#endif
-#if __powerpc__
-# include "powerpc.h"
-#endif
-#if __sparc64__
-# include "sparc64.h"
-#endif
-#if __riscv
-#include "riscv.h"
-#endif
+/*
+ * offset (in bytes) of the code from the entry address of a routine.
+ * (see asgnsamples for use and explanation.)
+ */
+#define OFFSET_OF_CODE 0
+
+enum opermodes { dummy };
+typedef enum opermodes operandenum;
/*
* booleans
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Re: svn commit: r365726 - in head: cddl/lib/libzfs cddl/lib/libzpool lib/libpmc share/mk sys/conf tests/sys/kern usr.bin/gcore
> On 14 Sep 2020, at 17:12, Andrew Turner wrote: > > Author: andrew > Date: Mon Sep 14 16:12:28 2020 > New Revision: 365726 > URL: https://svnweb.freebsd.org/changeset/base/365726 > > Log: > Use MACHINE_CPUARCH when checking for arm64 > > Use MACHINE_CPUARCH with arm64 (aarch64) when we build code that could run > on any 64-bit Arm instruction set. This will simplify checks in downstream > consumers targeting prototype instruction sets. > > The only place we check for MACHINE_ARCH == aarch64 is when building the > device tree blobs. As these are targeting current generation ISAs. > > Sponsored by:Innovate UK > Differential Revision: https://reviews.freebsd.org/D26370 I missed: Reviewed by: brooks Andrew ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r365726 - in head: cddl/lib/libzfs cddl/lib/libzpool lib/libpmc share/mk sys/conf tests/sys/kern usr.bin/gcore
Author: andrew
Date: Mon Sep 14 16:12:28 2020
New Revision: 365726
URL: https://svnweb.freebsd.org/changeset/base/365726
Log:
Use MACHINE_CPUARCH when checking for arm64
Use MACHINE_CPUARCH with arm64 (aarch64) when we build code that could run
on any 64-bit Arm instruction set. This will simplify checks in downstream
consumers targeting prototype instruction sets.
The only place we check for MACHINE_ARCH == aarch64 is when building the
device tree blobs. As these are targeting current generation ISAs.
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D26370
Modified:
head/cddl/lib/libzfs/Makefile
head/cddl/lib/libzpool/Makefile
head/lib/libpmc/Makefile
head/share/mk/bsd.endian.mk
head/share/mk/bsd.sys.mk
head/sys/conf/dtb.build.mk
head/tests/sys/kern/Makefile
head/usr.bin/gcore/Makefile
Modified: head/cddl/lib/libzfs/Makefile
==
--- head/cddl/lib/libzfs/Makefile Mon Sep 14 15:58:10 2020
(r365725)
+++ head/cddl/lib/libzfs/Makefile Mon Sep 14 16:12:28 2020
(r365726)
@@ -82,7 +82,7 @@ CFLAGS += -DHAVE_SSE2
ARCH_C += zfs_fletcher_avx512.c
CFLAGS+= -DHAVE_AVX2 -DHAVE_AVX -D__x86_64 -DHAVE_AVX512F
.endif
-.if ${MACHINE_ARCH} == "aarch64"
+.if ${MACHINE_CPUARCH} == "aarch64"
ARCH_C += zfs_fletcher_aarch64_neon.c
.endif
Modified: head/cddl/lib/libzpool/Makefile
==
--- head/cddl/lib/libzpool/Makefile Mon Sep 14 15:58:10 2020
(r365725)
+++ head/cddl/lib/libzpool/Makefile Mon Sep 14 16:12:28 2020
(r365726)
@@ -187,7 +187,7 @@ ARCH_C += zfs_fletcher_avx512.c
CFLAGS+= -DHAVE_AVX2 -DHAVE_AVX -D__x86_64 -DHAVE_AVX512F \
-DHAVE_AVX512BW
.endif
-.if ${MACHINE_ARCH} == "aarch64"
+.if ${MACHINE_CPUARCH} == "aarch64"
ARCH_C += zfs_fletcher_aarch64_neon.c
.endif
Modified: head/lib/libpmc/Makefile
==
--- head/lib/libpmc/MakefileMon Sep 14 15:58:10 2020(r365725)
+++ head/lib/libpmc/MakefileMon Sep 14 16:12:28 2020(r365726)
@@ -7,10 +7,10 @@ INCS= pmc.h pmclog.h pmcformat.h
CFLAGS+= -I${SRCTOP}/${RELDIR:H}/libpmcstat
-.if ${MACHINE_ARCH} == "aarch64" || ${MACHINE_ARCH} == "amd64" || \
+.if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_ARCH} == "amd64" || \
${MACHINE_ARCH} == "i386"
-.if ${MACHINE_ARCH} == "aarch64"
+.if ${MACHINE_CPUARCH} == "aarch64"
EVENT_ARCH="arm64"
.elif ${MACHINE_ARCH} == "amd64" || ${MACHINE_ARCH} == "i386"
EVENT_ARCH="x86"
Modified: head/share/mk/bsd.endian.mk
==
--- head/share/mk/bsd.endian.mk Mon Sep 14 15:58:10 2020(r365725)
+++ head/share/mk/bsd.endian.mk Mon Sep 14 16:12:28 2020(r365726)
@@ -1,6 +1,6 @@
# $FreeBSD$
-.if ${MACHINE_ARCH} == "aarch64" || \
+.if ${MACHINE_CPUARCH} == "aarch64" || \
${MACHINE_ARCH} == "amd64" || \
${MACHINE_ARCH} == "i386" || \
(${MACHINE} == "arm" && ${MACHINE_ARCH:Marm*eb*} == "") || \
Modified: head/share/mk/bsd.sys.mk
==
--- head/share/mk/bsd.sys.mkMon Sep 14 15:58:10 2020(r365725)
+++ head/share/mk/bsd.sys.mkMon Sep 14 16:12:28 2020(r365726)
@@ -187,7 +187,7 @@ CWARNFLAGS+=
-Wno-error=aggressive-loop-optimizations
.endif
# GCC's own arm_neon.h triggers various warnings
-.if ${MACHINE_ARCH} == "aarch64"
+.if ${MACHINE_CPUARCH} == "aarch64"
CWARNFLAGS+= -Wno-system-headers
.endif
.endif # gcc
Modified: head/sys/conf/dtb.build.mk
==
--- head/sys/conf/dtb.build.mk Mon Sep 14 15:58:10 2020(r365725)
+++ head/sys/conf/dtb.build.mk Mon Sep 14 16:12:28 2020(r365726)
@@ -22,7 +22,7 @@ SYSDIR= ${S}
.for _dts in ${DTS}
# DTB for aarch64 needs to preserve the immediate parent of the .dts, because
# these DTS are vendored and should be installed into their vendored directory.
-.if ${MACHINE_ARCH} == "aarch64"
+.if ${MACHINE_CPUARCH} == "aarch64"
DTB+= ${_dts:R:S/$/.dtb/}
.else
DTB+= ${_dts:T:R:S/$/.dtb/}
Modified: head/tests/sys/kern/Makefile
==
--- head/tests/sys/kern/MakefileMon Sep 14 15:58:10 2020
(r365725)
+++ head/tests/sys/kern/MakefileMon Sep 14 16:12:28 2020
(r365726)
@@ -57,7 +57,7 @@ LIBADD.mqueue_test+= rt
.if ${MACHINE_ARCH} == "amd64" || \
${MACHINE_ARCH} == "i386" || \
-${MACHINE_ARCH} == "aarch64"
+${MACHINE_CPUARCH} == "aarch64"
ATF_TESTS_C+= libkern_crc32
.if ${MACHINE_ARCH} == "amd64" || ${MACHINE_ARCH} == "i386"
LDADD.libkern_crc32+=
svn commit: r365709 - head/sys/dev/gpio
Author: andrew
Date: Mon Sep 14 08:59:16 2020
New Revision: 365709
URL: https://svnweb.freebsd.org/changeset/base/365709
Log:
Allow for interrupts on pl061 children
Add enough infrastructure for interrupts on children of the pl061 GPIO
controller. As gpiobus already provided these the pl061 driver also needs
to pass requests up the newbus hierarchy.
Currently there are no children that expect to configure interrupts, however
this is expected to change to support the ACPI Event Information interface.
Sponsored by: Innovate UK
Modified:
head/sys/dev/gpio/pl061.c
Modified: head/sys/dev/gpio/pl061.c
==
--- head/sys/dev/gpio/pl061.c Mon Sep 14 08:51:18 2020(r365708)
+++ head/sys/dev/gpio/pl061.c Mon Sep 14 08:59:16 2020(r365709)
@@ -553,6 +553,11 @@ static device_method_t pl061_methods[] = {
DEVMETHOD(device_attach,pl061_attach),
DEVMETHOD(device_detach,pl061_detach),
+ /* Bus interface */
+ DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
+ DEVMETHOD(bus_activate_resource,bus_generic_activate_resource),
+ DEVMETHOD(bus_deactivate_resource,
bus_generic_deactivate_resource),
+
/* GPIO protocol */
DEVMETHOD(gpio_get_bus, pl061_get_bus),
DEVMETHOD(gpio_pin_max, pl061_pin_max),
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svn commit: r365579 - in head/sys: arm64/include dev/gpio
Author: andrew
Date: Thu Sep 10 14:58:46 2020
New Revision: 365579
URL: https://svnweb.freebsd.org/changeset/base/365579
Log:
Move the pl061 acpi attachment earlier
As the pl061 driver can be an interrupt controller attach it earlier in the
boot so other drivers can use it.
Use a new GPIO xref to not conflict with the existing root interrupt
controller.
Sponsored by: Innovate UK
Modified:
head/sys/arm64/include/intr.h
head/sys/dev/gpio/pl061_acpi.c
Modified: head/sys/arm64/include/intr.h
==
--- head/sys/arm64/include/intr.h Thu Sep 10 14:13:49 2020
(r365578)
+++ head/sys/arm64/include/intr.h Thu Sep 10 14:58:46 2020
(r365579)
@@ -51,6 +51,7 @@ void intr_ipi_dispatch(u_int, struct trapframe *);
#ifdef DEV_ACPI
#defineACPI_INTR_XREF 1
#defineACPI_MSI_XREF 2
+#defineACPI_GPIO_XREF 3
#endif
#endif /* _MACHINE_INTR_H */
Modified: head/sys/dev/gpio/pl061_acpi.c
==
--- head/sys/dev/gpio/pl061_acpi.c Thu Sep 10 14:13:49 2020
(r365578)
+++ head/sys/dev/gpio/pl061_acpi.c Thu Sep 10 14:58:46 2020
(r365579)
@@ -76,7 +76,7 @@ pl061_acpi_attach(device_t dev)
if (error != 0)
return (error);
- if (!intr_pic_register(dev, ACPI_INTR_XREF)) {
+ if (!intr_pic_register(dev, ACPI_GPIO_XREF)) {
device_printf(dev, "couldn't register PIC\n");
pl061_detach(dev);
error = ENXIO;
@@ -98,6 +98,7 @@ DEFINE_CLASS_1(gpio, pl061_acpi_driver, pl061_acpi_met
static devclass_t pl061_devclass;
-DRIVER_MODULE(pl061, acpi, pl061_driver, pl061_devclass, NULL, NULL);
+EARLY_DRIVER_MODULE(pl061, acpi, pl061_acpi_driver, pl061_devclass, NULL, NULL,
+BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
MODULE_DEPEND(pl061, acpi, 1, 1, 1);
MODULE_DEPEND(pl061, gpiobus, 1, 1, 1);
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Re: svn commit: r365578 - head/stand/efi/loader/arch/arm64
We already discard it via objcopy when converting from elf -> EFI as we only
copy the sections needed in the final EFI file.
Andrew
> On 10 Sep 2020, at 15:22, Brandon Bergren wrote:
>
> You can truly get rid of it with /DISCARD/ and shave the bytes off entirely,
> by the way.
>
> On Thu, Sep 10, 2020, at 9:13 AM, Andrew Turner wrote:
>> Author: andrew
>> Date: Thu Sep 10 14:13:49 2020
>> New Revision: 365578
>> URL: https://svnweb.freebsd.org/changeset/base/365578
>>
>> Log:
>> Ignore the .interp section in the arm64 EFI loader
>>
>> When building the loader an unneeded .interp section may be added. Move
>> this to the unused section region so offsets of used sections don't
>> change.
>>
>> Obtained from: CheriBSD
>> Sponsored by: Innovate UK
>>
>> Modified:
>> head/stand/efi/loader/arch/arm64/ldscript.arm64
>>
>> Modified: head/stand/efi/loader/arch/arm64/ldscript.arm64
>> ==
>> --- head/stand/efi/loader/arch/arm64/ldscript.arm64 Thu Sep 10 14:12:25
>> 2020 (r365577)
>> +++ head/stand/efi/loader/arch/arm64/ldscript.arm64 Thu Sep 10 14:13:49
>> 2020 (r365578)
>> @@ -80,6 +80,7 @@ SECTIONS
>> _edata = .;
>>
>> /* Unused sections */
>> + .interp : { *(.interp) }
>> .dynstr: { *(.dynstr) }
>> .hash : { *(.hash) }
>> }
>>
>
> --
> Brandon Bergren
> bdra...@freebsd.org
>
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svn commit: r365578 - head/stand/efi/loader/arch/arm64
Author: andrew
Date: Thu Sep 10 14:13:49 2020
New Revision: 365578
URL: https://svnweb.freebsd.org/changeset/base/365578
Log:
Ignore the .interp section in the arm64 EFI loader
When building the loader an unneeded .interp section may be added. Move
this to the unused section region so offsets of used sections don't
change.
Obtained from:CheriBSD
Sponsored by: Innovate UK
Modified:
head/stand/efi/loader/arch/arm64/ldscript.arm64
Modified: head/stand/efi/loader/arch/arm64/ldscript.arm64
==
--- head/stand/efi/loader/arch/arm64/ldscript.arm64 Thu Sep 10 14:12:25
2020(r365577)
+++ head/stand/efi/loader/arch/arm64/ldscript.arm64 Thu Sep 10 14:13:49
2020(r365578)
@@ -80,6 +80,7 @@ SECTIONS
_edata = .;
/* Unused sections */
+ .interp : { *(.interp) }
.dynstr : { *(.dynstr) }
.hash: { *(.hash) }
}
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svn commit: r365559 - head/sys/dev/gpio
Author: andrew
Date: Thu Sep 10 09:50:43 2020
New Revision: 365559
URL: https://svnweb.freebsd.org/changeset/base/365559
Log:
Switch the name of the pl061 driver to gpio
We need it to be named gpio for gpiobus to work.
Sponsored by: Innovate UK
Modified:
head/sys/dev/gpio/pl061.c
head/sys/dev/gpio/pl061_acpi.c
Modified: head/sys/dev/gpio/pl061.c
==
--- head/sys/dev/gpio/pl061.c Thu Sep 10 09:42:37 2020(r365558)
+++ head/sys/dev/gpio/pl061.c Thu Sep 10 09:50:43 2020(r365559)
@@ -577,4 +577,4 @@ static device_method_t pl061_methods[] = {
DEVMETHOD_END
};
-DEFINE_CLASS_0(pl061, pl061_driver, pl061_methods, sizeof(struct pl061_softc));
+DEFINE_CLASS_0(gpio, pl061_driver, pl061_methods, sizeof(struct pl061_softc));
Modified: head/sys/dev/gpio/pl061_acpi.c
==
--- head/sys/dev/gpio/pl061_acpi.c Thu Sep 10 09:42:37 2020
(r365558)
+++ head/sys/dev/gpio/pl061_acpi.c Thu Sep 10 09:50:43 2020
(r365559)
@@ -93,7 +93,7 @@ static device_method_t pl061_acpi_methods[] = {
DEVMETHOD_END
};
-DEFINE_CLASS_1(pl061, pl061_acpi_driver, pl061_acpi_methods,
+DEFINE_CLASS_1(gpio, pl061_acpi_driver, pl061_acpi_methods,
sizeof(struct pl061_softc), pl061_driver);
static devclass_t pl061_devclass;
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svn commit: r365558 - head/sys/dev/gpio
Author: andrew Date: Thu Sep 10 09:42:37 2020 New Revision: 365558 URL: https://svnweb.freebsd.org/changeset/base/365558 Log: Only manage ofw gpio providers on ofw systems On arm64 we may boot via ACPI. In this case we will still try to manage the gpio providers as if we are using FDT. Fix this by checking if the FDT node is valid before registering a cross reference. Sponsored by: Innovate UK Modified: head/sys/dev/gpio/ofw_gpiobus.c Modified: head/sys/dev/gpio/ofw_gpiobus.c == --- head/sys/dev/gpio/ofw_gpiobus.c Thu Sep 10 09:37:30 2020 (r365557) +++ head/sys/dev/gpio/ofw_gpiobus.c Thu Sep 10 09:42:37 2020 (r365558) @@ -197,7 +197,8 @@ ofw_gpiobus_register_provider(device_t provider) phandle_t node; node = ofw_bus_get_node(provider); - OF_device_register_xref(OF_xref_from_node(node), provider); + if (node != -1) + OF_device_register_xref(OF_xref_from_node(node), provider); } void @@ -206,7 +207,8 @@ ofw_gpiobus_unregister_provider(device_t provider) phandle_t node; node = ofw_bus_get_node(provider); - OF_device_register_xref(OF_xref_from_node(node), NULL); + if (node != -1) + OF_device_register_xref(OF_xref_from_node(node), NULL); } static struct ofw_gpiobus_devinfo * ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r365557 - head/sys/dev/gpio
Author: andrew
Date: Thu Sep 10 09:37:30 2020
New Revision: 365557
URL: https://svnweb.freebsd.org/changeset/base/365557
Log:
Use the correct variable to check which interrupt mode to use
In the PL061 driver we incorrectly used the mask rather than mode to find
how to configure the interrupt.
Sponsored by: Innovate UK
Modified:
head/sys/dev/gpio/pl061.c
Modified: head/sys/dev/gpio/pl061.c
==
--- head/sys/dev/gpio/pl061.c Thu Sep 10 09:10:33 2020(r365556)
+++ head/sys/dev/gpio/pl061.c Thu Sep 10 09:37:30 2020(r365557)
@@ -335,22 +335,22 @@ pl061_pic_setup_intr(device_t dev, struct intr_irqsrc
PL061_LOCK(sc);
- if (mask & GPIO_INTR_EDGE_BOTH) {
+ if (mode & GPIO_INTR_EDGE_BOTH) {
mask_and_set(sc, PL061_INTBOTHEDGES, mask, mask);
mask_and_set(sc, PL061_INTSENSE, mask, 0);
- } else if (mask & GPIO_INTR_EDGE_RISING) {
+ } else if (mode & GPIO_INTR_EDGE_RISING) {
mask_and_set(sc, PL061_INTBOTHEDGES, mask, 0);
mask_and_set(sc, PL061_INTSENSE, mask, 0);
mask_and_set(sc, PL061_INTEVENT, mask, mask);
- } else if (mask & GPIO_INTR_EDGE_FALLING) {
+ } else if (mode & GPIO_INTR_EDGE_FALLING) {
mask_and_set(sc, PL061_INTBOTHEDGES, mask, 0);
mask_and_set(sc, PL061_INTSENSE, mask, 0);
mask_and_set(sc, PL061_INTEVENT, mask, 0);
- } else if (mask & GPIO_INTR_LEVEL_HIGH) {
+ } else if (mode & GPIO_INTR_LEVEL_HIGH) {
mask_and_set(sc, PL061_INTBOTHEDGES, mask, 0);
mask_and_set(sc, PL061_INTSENSE, mask, mask);
mask_and_set(sc, PL061_INTEVENT, mask, mask);
- } else if (mask & GPIO_INTR_LEVEL_LOW) {
+ } else if (mode & GPIO_INTR_LEVEL_LOW) {
mask_and_set(sc, PL061_INTBOTHEDGES, mask, 0);
mask_and_set(sc, PL061_INTSENSE, mask, mask);
mask_and_set(sc, PL061_INTEVENT, mask, 0);
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svn commit: r365451 - head/sys/conf
Author: andrew
Date: Tue Sep 8 11:46:33 2020
New Revision: 365451
URL: https://svnweb.freebsd.org/changeset/base/365451
Log:
Move gpio and hwpmc to the correct place in files.arm64
Sponsored by: Innovate UK
Modified:
head/sys/conf/files.arm64
Modified: head/sys/conf/files.arm64
==
--- head/sys/conf/files.arm64 Tue Sep 8 11:35:35 2020(r365450)
+++ head/sys/conf/files.arm64 Tue Sep 8 11:46:33 2020(r365451)
@@ -255,6 +255,11 @@ dev/axgbe/xgbe-dev.c optionalaxgbe
dev/axgbe/xgbe-drv.c optionalaxgbe
dev/axgbe/xgbe-mdio.c optionalaxgbe
dev/cpufreq/cpufreq_dt.c optionalcpufreq fdt
+dev/gpio/pl061.c optionalpl061 gpio
+dev/gpio/pl061_acpi.c optionalpl061 gpio acpi
+dev/gpio/pl061_fdt.c optionalpl061 gpio fdt
+dev/hwpmc/hwpmc_arm64.coptionalhwpmc
+dev/hwpmc/hwpmc_arm64_md.c optionalhwpmc
dev/ice/if_ice_iflib.c optionalice pci \
compile-with "${NORMAL_C} -I$S/dev/ice"
dev/ice/ice_lib.c optionalice pci \
@@ -305,11 +310,6 @@ dev/iicbus/sy8106a.c optionalsy8106a
fdt
dev/iicbus/twsi/mv_twsi.c optionaltwsi fdt
dev/iicbus/twsi/a10_twsi.c optionaltwsi fdt
dev/iicbus/twsi/twsi.c optionaltwsi fdt
-dev/gpio/pl061.c optionalpl061 gpio
-dev/gpio/pl061_acpi.c optionalpl061 gpio acpi
-dev/gpio/pl061_fdt.c optionalpl061 gpio fdt
-dev/hwpmc/hwpmc_arm64.coptionalhwpmc
-dev/hwpmc/hwpmc_arm64_md.c optionalhwpmc
dev/mbox/mbox_if.m optionalsoc_brcm_bcm2837
dev/mmc/host/dwmmc.c optionaldwmmc fdt
dev/mmc/host/dwmmc_altera.coptionaldwmmc dwmmc_altera fdt
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svn commit: r365450 - in head/sys: arm64/conf conf dev/gpio
nclude
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+#include
+#include
+
+#include
+#include
+
+#include "pl061.h"
+
+static char *gpio_ids[] = { "ARMH0061", NULL };
+
+static int
+pl061_acpi_probe(device_t dev)
+{
+ int rv;
+
+ if (acpi_disabled("gpio"))
+ return (ENXIO);
+
+ rv = ACPI_ID_PROBE(device_get_parent(dev), dev, gpio_ids, NULL);
+
+ if (rv <= 0)
+ device_set_desc(dev, "Arm PL061 GPIO Controller");
+
+ return (rv);
+}
+
+static int
+pl061_acpi_attach(device_t dev)
+{
+ int error;
+
+ error = pl061_attach(dev);
+ if (error != 0)
+ return (error);
+
+ if (!intr_pic_register(dev, ACPI_INTR_XREF)) {
+ device_printf(dev, "couldn't register PIC\n");
+ pl061_detach(dev);
+ error = ENXIO;
+ }
+
+ return (error);
+}
+
+static device_method_t pl061_acpi_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_probe, pl061_acpi_probe),
+ DEVMETHOD(device_attach,pl061_acpi_attach),
+
+ DEVMETHOD_END
+};
+
+DEFINE_CLASS_1(pl061, pl061_acpi_driver, pl061_acpi_methods,
+sizeof(struct pl061_softc), pl061_driver);
+
+static devclass_t pl061_devclass;
+
+DRIVER_MODULE(pl061, acpi, pl061_driver, pl061_devclass, NULL, NULL);
+MODULE_DEPEND(pl061, acpi, 1, 1, 1);
+MODULE_DEPEND(pl061, gpiobus, 1, 1, 1);
Added: head/sys/dev/gpio/pl061_fdt.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/gpio/pl061_fdt.c Tue Sep 8 11:35:35 2020
(r365450)
@@ -0,0 +1,97 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Andrew Turner
+ *
+ * This work was supported by Innovate UK project 105694, "Digital Security
+ * by Design (DSbD) Technology Platform Prototype".
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+
+#include "pl061.h"
+
+static int
+pl061_fdt_probe(device_t dev)
+{
+ if (!ofw_bus_status_okay(dev))
+ return (ENXIO);
+
+ if (!ofw_bus_is_compatible(dev, "arm,pl061"))
+ return (ENXIO);
+
+ device_set_desc(dev, "Arm PL061 GPIO Controller");
+
+ return (BUS_PROBE_DEFAULT);
+}
+
+static int
+pl061_fdt_attach(device_t dev)
+{
+ int error;
+
+ error = pl061_attach(dev);
+ if (error != 0)
+ return (error);
+
+ if (!intr_pic_register(dev, OF_xref_from_node(ofw_bus_get_node(dev {
+ device_printf(dev, "couldn't register PIC\n");
+ pl061_detach(dev);
+ error = ENXIO;
+ }
+
+ return (error);
+}
+
+static device_method_t pl061_fdt_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_probe, pl061_fdt_probe),
+ DEVMETHOD(device_attach,pl061_fdt_attach),
+
+ DEVMETHOD_END
+};
+
+DEFINE_CLASS_1(gpio, pl061_fdt_driver, pl061_fdt_methods,
+sizeof(struct pl061_softc), pl061_driver);
+
+static devclass_t pl061_devclass;
+
+EARLY_DRIVER_MODULE(pl061, ofwbus, pl061_fdt_driver, pl061_devclass, NULL,
NULL,
+BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
+MODULE_DEPEND(pl061, gpiobus, 1, 1, 1);
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svn commit: r365296 - in head/sys/arm64: arm64 include
Author: andrew
Date: Thu Sep 3 10:11:12 2020
New Revision: 365296
URL: https://svnweb.freebsd.org/changeset/base/365296
Log:
Switch to an empty ttbr0 pagetable when the MMU is enabled
We don't need these pagetables after the early boot. Remove the chance we
write to memory we didn't expect to and remove architectural undefined
behaviour.
Reviewed by: alc (earlier version), mmel
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D22606
Modified:
head/sys/arm64/arm64/locore.S
head/sys/arm64/arm64/machdep.c
head/sys/arm64/include/machdep.h
Modified: head/sys/arm64/arm64/locore.S
==
--- head/sys/arm64/arm64/locore.S Thu Sep 3 09:09:44 2020
(r365295)
+++ head/sys/arm64/arm64/locore.S Thu Sep 3 10:11:12 2020
(r365296)
@@ -128,6 +128,9 @@ _start:
/* Enable the mmu */
bl start_mmu
+ /* Load the new ttbr0 pagetable */
+ adr x27, pagetable_l0_ttbr0
+
/* Jump to the virtual address space */
ldr x15, .Lvirtdone
br x15
@@ -166,6 +169,7 @@ virtdone:
str x25, [x0, #BP_KERN_STACK]
str x24, [x0, #BP_KERN_L0PT]
str x23, [x0, #BP_BOOT_EL]
+ str x27, [x0, 40] /* kern_ttbr0 */
/* trace back starts here */
mov fp, #0
@@ -204,11 +208,14 @@ ENTRY(mpentry)
/* Load the kernel page table */
adr x24, pagetable_l0_ttbr1
/* Load the identity page table */
- adr x27, pagetable_l0_ttbr0
+ adr x27, pagetable_l0_ttbr0_boostrap
/* Enable the mmu */
bl start_mmu
+ /* Load the new ttbr0 pagetable */
+ adr x27, pagetable_l0_ttbr0
+
/* Jump to the virtual address space */
ldr x15, =mp_virtdone
br x15
@@ -218,6 +225,16 @@ mp_virtdone:
ldr x4, =bootstack
ldr x4, [x4]
mov sp, x4
+
+ /* Load the kernel ttbr0 pagetable */
+ msr ttbr0_el1, x27
+ isb
+
+ /* Invalidate the TLB */
+ tlbivmalle1
+ dsb sy
+ isb
+
b init_secondary
END(mpentry)
#endif
@@ -760,10 +777,13 @@ abort:
//.section .init_pagetable
.align 12 /* 4KiB aligned */
/*
-* 3 initial tables (in the following order):
+* 6 initial tables (in the following order):
* L2 for kernel (High addresses)
* L1 for kernel
-* L1 for user (Low addresses)
+* L0 for kernel
+* L1 bootstrap for user (Low addresses)
+* L0 bootstrap for user
+* L0 for user
*/
pagetable:
.space PAGE_SIZE
@@ -771,7 +791,9 @@ pagetable_l1_ttbr1:
.space PAGE_SIZE
pagetable_l0_ttbr1:
.space PAGE_SIZE
-pagetable_l1_ttbr0:
+pagetable_l1_ttbr0_bootstrap:
+ .space PAGE_SIZE
+pagetable_l0_ttbr0_boostrap:
.space PAGE_SIZE
pagetable_l0_ttbr0:
.space PAGE_SIZE
Modified: head/sys/arm64/arm64/machdep.c
==
--- head/sys/arm64/arm64/machdep.c Thu Sep 3 09:09:44 2020
(r365295)
+++ head/sys/arm64/arm64/machdep.c Thu Sep 3 10:11:12 2020
(r365296)
@@ -1235,6 +1235,8 @@ initarm(struct arm64_bootparams *abp)
valid = bus_probe();
cninit();
+ set_ttbr0(abp->kern_ttbr0);
+ cpu_tlb_flushID();
if (!valid)
panic("Invalid bus configuration: %s",
Modified: head/sys/arm64/include/machdep.h
==
--- head/sys/arm64/include/machdep.hThu Sep 3 09:09:44 2020
(r365295)
+++ head/sys/arm64/include/machdep.hThu Sep 3 10:11:12 2020
(r365296)
@@ -37,6 +37,7 @@ struct arm64_bootparams {
uint64_tkern_delta;
vm_offset_t kern_stack;
vm_offset_t kern_l0pt; /* L1 page table for the kernel */
+ vm_paddr_t kern_ttbr0;
int boot_el;/* EL the kernel booted from */
int pad;
};
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svn commit: r365247 - head/share/mk
Author: andrew
Date: Wed Sep 2 11:53:26 2020
New Revision: 365247
URL: https://svnweb.freebsd.org/changeset/base/365247
Log:
When CPUTYPE is an architecture name use -march
Allow architecture names to be passed in to the build system via CPUTYPE.
This allows the user to use values such as armv8.1-a or armv8-a+crc as
the CPUTYPE.
Sponsored by: Innovate UK
Modified:
head/share/mk/bsd.cpu.mk
Modified: head/share/mk/bsd.cpu.mk
==
--- head/share/mk/bsd.cpu.mkWed Sep 2 11:49:22 2020(r365246)
+++ head/share/mk/bsd.cpu.mkWed Sep 2 11:53:26 2020(r365247)
@@ -145,7 +145,13 @@ _CPUCFLAGS = -march=${CPUTYPE}
_CPUCFLAGS = -march=${CPUTYPE:S/^mips//}
. endif
. elif ${MACHINE_CPUARCH} == "aarch64"
+. if ${CPUTYPE:Marmv*} != ""
+# Use -march when the CPU type is an architecture value, e.g. armv8.1-a
+_CPUCFLAGS = -march=${CPUTYPE}
+. else
+# Otherwise assume we have a CPU type
_CPUCFLAGS = -mcpu=${CPUTYPE}
+. endif
. endif
# Set up the list of CPU features based on the CPU type. This is an
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svn commit: r365234 - head/sys/arm64/arm64
Author: andrew
Date: Wed Sep 2 09:04:08 2020
New Revision: 365234
URL: https://svnweb.freebsd.org/changeset/base/365234
Log:
Partially revert r365069.
This whitespace was intentionally added to help differentiate the different
register groups within this file.
While here add missing whitespace from earlier in the file,
Sponsored by: Innovate UK
Modified:
head/sys/arm64/arm64/identcpu.c
Modified: head/sys/arm64/arm64/identcpu.c
==
--- head/sys/arm64/arm64/identcpu.c Wed Sep 2 01:35:45 2020
(r365233)
+++ head/sys/arm64/arm64/identcpu.c Wed Sep 2 09:04:08 2020
(r365234)
@@ -82,6 +82,7 @@ sysctl_hw_machine(SYSCTL_HANDLER_ARGS)
static const char machine32[] = "arm";
#endif
int error;
+
#ifdef SCTL_MASK32
if ((req->flags & SCTL_MASK32) != 0 && adaptive_machine_arch)
error = SYSCTL_OUT(req, machine32, sizeof(machine32));
@@ -188,6 +189,7 @@ static const struct cpu_parts cpu_parts_arm[] = {
{ CPU_PART_NEOVERSE_N1, "Neoverse-N1" },
CPU_PART_NONE,
};
+
/* Cavium */
static const struct cpu_parts cpu_parts_cavium[] = {
{ CPU_PART_THUNDERX, "ThunderX" },
@@ -263,6 +265,7 @@ struct mrs_field_value {
MRS_FIELD_VALUE(13ul<< _reg ## _ ## _field ## _SHIFT, "14 "_desc "s"), \
MRS_FIELD_VALUE(14ul<< _reg ## _ ## _field ## _SHIFT, "15 "_desc "s"), \
MRS_FIELD_VALUE(15ul<< _reg ## _ ## _field ## _SHIFT, "16 "_desc "s")
+
#defineMRS_FIELD_VALUE_END { .desc = NULL }
struct mrs_field {
@@ -283,6 +286,7 @@ struct mrs_field {
.mask = _register ## _ ## _name ## _MASK, \
.values = (_values),\
}
+
#defineMRS_FIELD_END { .type = MRS_INVALID, }
/* ID_AA64AFR0_EL1 */
@@ -290,11 +294,13 @@ static struct mrs_field id_aa64afr0_fields[] = {
MRS_FIELD_END,
};
+
/* ID_AA64AFR1_EL1 */
static struct mrs_field id_aa64afr1_fields[] = {
MRS_FIELD_END,
};
+
/* ID_AA64DFR0_EL1 */
static struct mrs_field_value id_aa64dfr0_pmsver[] = {
MRS_FIELD_VALUE(ID_AA64DFR0_PMSVer_NONE, ""),
@@ -352,11 +358,13 @@ static struct mrs_field id_aa64dfr0_fields[] = {
MRS_FIELD_END,
};
+
/* ID_AA64DFR1 */
static struct mrs_field id_aa64dfr1_fields[] = {
MRS_FIELD_END,
};
+
/* ID_AA64ISAR0_EL1 */
static struct mrs_field_value id_aa64isar0_rndr[] = {
MRS_FIELD_VALUE(ID_AA64ISAR0_RNDR_NONE, ""),
@@ -453,6 +461,7 @@ static struct mrs_field id_aa64isar0_fields[] = {
MRS_FIELD_END,
};
+
/* ID_AA64ISAR1_EL1 */
static struct mrs_field_value id_aa64isar1_i8mm[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, I8MM, NONE, IMPL),
@@ -549,6 +558,7 @@ static struct mrs_field id_aa64isar1_fields[] = {
MRS_FIELD_END,
};
+
/* ID_AA64MMFR0_EL1 */
static struct mrs_field_value id_aa64mmfr0_tgran4[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR0, TGran4, NONE, IMPL),
@@ -614,6 +624,7 @@ static struct mrs_field id_aa64mmfr0_fields[] = {
MRS_FIELD_END,
};
+
/* ID_AA64MMFR1_EL1 */
static struct mrs_field_value id_aa64mmfr1_xnx[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR1, XNX, NONE, IMPL),
@@ -675,6 +686,7 @@ static struct mrs_field id_aa64mmfr1_fields[] = {
MRS_FIELD_END,
};
+
/* ID_AA64MMFR2_EL1 */
static struct mrs_field_value id_aa64mmfr2_nv[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR2, NV, NONE, IMPL),
@@ -725,6 +737,7 @@ static struct mrs_field id_aa64mmfr2_fields[] = {
MRS_FIELD_END,
};
+
/* ID_AA64PFR0_EL1 */
static struct mrs_field_value id_aa64pfr0_csv3[] = {
MRS_FIELD_VALUE(ID_AA64PFR0_CSV3_NONE, ""),
@@ -831,6 +844,7 @@ static struct mrs_field id_aa64pfr0_fields[] = {
MRS_FIELD(ID_AA64PFR0, EL0, false, MRS_LOWER, id_aa64pfr0_el0),
MRS_FIELD_END,
};
+
/* ID_AA64PFR1_EL1 */
static struct mrs_field_value id_aa64pfr1_bt[] = {
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Re: svn commit: r365054 - in head/sys: conf dev/sdhci
> On 1 Sep 2020, at 17:17, Marcin Wojtas wrote: > > Author: mw > Date: Tue Sep 1 16:17:21 2020 > New Revision: 365054 > URL: https://svnweb.freebsd.org/changeset/base/365054 > > Log: > Introduce the SDHCI driver for NXP QorIQ Layerscape SoCs > > Implement support for an eSDHC controller found in NXP QorIQ Layerscape SoCs. > > This driver has been tested with NXP LS1046A and LX2160A (Honeycomb board), > which is incompatible with the existing sdhci_fsl driver (aiming at older > chips from this family). As such, it is not intended as replacement for > the old driver, but rather serves as an improved alternative for SoCs that > support it. > It comes with support for both PIO and Single DMA modes and samples the > clock from the extres clk API. > > Submitted by: Artur Rojek > Reviewed by: manu, mmel, kibab > Obtained from: Semihalf > Sponsored by: Alstom Group > Differential Revision: https://reviews.freebsd.org/D26153 > > Added: > head/sys/dev/sdhci/sdhci_fsl_fdt.c (contents, props changed) > Modified: > head/sys/conf/files > > Modified: head/sys/conf/files > == > --- head/sys/conf/files Tue Sep 1 16:13:09 2020(r365053) > +++ head/sys/conf/files Tue Sep 1 16:17:21 2020(r365054) > @@ -3058,6 +3058,7 @@ dev/scc/scc_dev_z8530.c optional scc > dev/sdhci/sdhci.c optional sdhci > dev/sdhci/sdhci_fdt.c optional sdhci fdt > dev/sdhci/sdhci_fdt_gpio.coptional sdhci fdt gpio > +dev/sdhci/sdhci_fsl_fdt.coptional sdhci fdt gpio This looks wrong. It should be using an NXP specific option, not gpio. Andrew ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r365039 - head/sys/arm64/arm64
Author: andrew Date: Tue Sep 1 14:50:43 2020 New Revision: 365039 URL: https://svnweb.freebsd.org/changeset/base/365039 Log: Ensure the tlbi has completed before setting SCTLR When enabling the MMU on arm64 we need to ensure the tlb invalidation has completed before setting the enable bit in the SCTLR register. Reported by: alc Sponsored by: Innovate UK Modified: head/sys/arm64/arm64/locore.S Modified: head/sys/arm64/arm64/locore.S == --- head/sys/arm64/arm64/locore.S Tue Sep 1 13:58:17 2020 (r365038) +++ head/sys/arm64/arm64/locore.S Tue Sep 1 14:50:43 2020 (r365039) @@ -677,6 +677,8 @@ start_mmu: /* Invalidate the TLB */ tlbivmalle1is + dsb ish + isb ldr x2, mair msr mair_el1, x2 ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r365031 - head/sys/arm64/arm64
Author: andrew
Date: Tue Sep 1 11:02:43 2020
New Revision: 365031
URL: https://svnweb.freebsd.org/changeset/base/365031
Log:
Support stage 2 arm64 pmap in more places
Add support for stage 2 pmap to pmap_pte_dirty, pmap_release, and more
of pmap_enter. This adds support in all placess I have hit while testing
bhyve ehile faulting pages in as needed.
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D26065
Modified:
head/sys/arm64/arm64/pmap.c
Modified: head/sys/arm64/arm64/pmap.c
==
--- head/sys/arm64/arm64/pmap.c Tue Sep 1 09:02:43 2020(r365030)
+++ head/sys/arm64/arm64/pmap.c Tue Sep 1 11:02:43 2020(r365031)
@@ -662,13 +662,18 @@ static inline int
pmap_pte_dirty(pmap_t pmap, pt_entry_t pte)
{
- PMAP_ASSERT_STAGE1(pmap);
KASSERT((pte & ATTR_SW_MANAGED) != 0, ("pte %#lx is unmanaged", pte));
- KASSERT((pte & (ATTR_S1_AP_RW_BIT | ATTR_SW_DBM)) != 0,
- ("pte %#lx is writeable and missing ATTR_SW_DBM", pte));
- return ((pte & (ATTR_S1_AP_RW_BIT | ATTR_SW_DBM)) ==
- (ATTR_S1_AP(ATTR_S1_AP_RW) | ATTR_SW_DBM));
+ if (pmap->pm_stage == PM_STAGE1) {
+ KASSERT((pte & (ATTR_S1_AP_RW_BIT | ATTR_SW_DBM)) != 0,
+ ("pte %#lx is writeable and missing ATTR_SW_DBM", pte));
+
+ return ((pte & (ATTR_S1_AP_RW_BIT | ATTR_SW_DBM)) ==
+ (ATTR_S1_AP(ATTR_S1_AP_RW) | ATTR_SW_DBM));
+ }
+
+ return ((pte & ATTR_S2_S2AP(ATTR_S2_S2AP_WRITE)) ==
+ ATTR_S2_S2AP(ATTR_S2_S2AP_WRITE));
}
static __inline void
@@ -1940,20 +1945,27 @@ pmap_release(pmap_t pmap)
pmap->pm_stats.resident_count));
KASSERT(vm_radix_is_empty(>pm_root),
("pmap_release: pmap has reserved page table page(s)"));
- PMAP_ASSERT_STAGE1(pmap);
set = pmap->pm_asid_set;
KASSERT(set != NULL, ("%s: NULL asid set", __func__));
- mtx_lock_spin(>asid_set_mutex);
- if (COOKIE_TO_EPOCH(pmap->pm_cookie) == set->asid_epoch) {
- asid = COOKIE_TO_ASID(pmap->pm_cookie);
- KASSERT(asid >= ASID_FIRST_AVAILABLE &&
- asid < set->asid_set_size,
- ("pmap_release: pmap cookie has out-of-range asid"));
- bit_clear(set->asid_set, asid);
+ /*
+* Allow the ASID to be reused. In stage 2 VMIDs we don't invalidate
+* the entries when removing them so rely on a later tlb invalidation.
+* this will happen when updating the VMID generation. Because of this
+* we don't reuse VMIDs within a generation.
+*/
+ if (pmap->pm_stage == PM_STAGE1) {
+ mtx_lock_spin(>asid_set_mutex);
+ if (COOKIE_TO_EPOCH(pmap->pm_cookie) == set->asid_epoch) {
+ asid = COOKIE_TO_ASID(pmap->pm_cookie);
+ KASSERT(asid >= ASID_FIRST_AVAILABLE &&
+ asid < set->asid_set_size,
+ ("pmap_release: pmap cookie has out-of-range
asid"));
+ bit_clear(set->asid_set, asid);
+ }
+ mtx_unlock_spin(>asid_set_mutex);
}
- mtx_unlock_spin(>asid_set_mutex);
m = PHYS_TO_VM_PAGE(pmap->pm_l0_paddr);
vm_page_unwire_noq(m);
@@ -3464,8 +3476,11 @@ pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, v
if ((prot & VM_PROT_WRITE) != 0) {
new_l3 |= ATTR_SW_DBM;
if ((flags & VM_PROT_WRITE) == 0) {
- PMAP_ASSERT_STAGE1(pmap);
- new_l3 |= ATTR_S1_AP(ATTR_S1_AP_RO);
+ if (pmap->pm_stage == PM_STAGE1)
+ new_l3 |= ATTR_S1_AP(ATTR_S1_AP_RO);
+ else
+ new_l3 &=
+ ~ATTR_S2_S2AP(ATTR_S2_S2AP_WRITE);
}
}
}
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svn commit: r364393 - head/sys/kern
Author: andrew
Date: Wed Aug 19 14:11:25 2020
New Revision: 364393
URL: https://svnweb.freebsd.org/changeset/base/364393
Log:
Mark COVERAGE and KCOV as part of KCSAN
While not strictly true this stops them from trying to use the KCSAN atomic
hooks and allows these to be compiled into the same kernel.
Sponsored by: Innovate UK
Modified:
head/sys/kern/kern_kcov.c
head/sys/kern/subr_coverage.c
Modified: head/sys/kern/kern_kcov.c
==
--- head/sys/kern/kern_kcov.c Wed Aug 19 13:44:08 2020(r364392)
+++ head/sys/kern/kern_kcov.c Wed Aug 19 14:11:25 2020(r364393)
@@ -35,6 +35,8 @@
* $FreeBSD$
*/
+#defineKCSAN_RUNTIME
+
#include
__FBSDID("$FreeBSD$");
Modified: head/sys/kern/subr_coverage.c
==
--- head/sys/kern/subr_coverage.c Wed Aug 19 13:44:08 2020
(r364392)
+++ head/sys/kern/subr_coverage.c Wed Aug 19 14:11:25 2020
(r364393)
@@ -35,6 +35,8 @@
* $FreeBSD$
*/
+#defineKCSAN_RUNTIME
+
#include
__FBSDID("$FreeBSD$");
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svn commit: r364153 - in head: lib/libpmc sys/arm64/include sys/dev/hwpmc sys/sys
Author: andrew
Date: Wed Aug 12 10:17:17 2020
New Revision: 364153
URL: https://svnweb.freebsd.org/changeset/base/364153
Log:
Add support for Cortex-A76/Neoverse-N1 to hwpmc
This adds support for the Cortex-A76 and Neoverse-N1 PMU counters to pmc.
While here add more PMCR_IDCODE values and check the implementers code is
correct before setting the PMU type.
Reviewed by: bz, emaste (looks reasonable to me)
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D25959
Modified:
head/lib/libpmc/libpmc.c
head/sys/arm64/include/armreg.h
head/sys/dev/hwpmc/hwpmc_arm64.c
head/sys/dev/hwpmc/pmc_events.h
head/sys/sys/pmc.h
Modified: head/lib/libpmc/libpmc.c
==
--- head/lib/libpmc/libpmc.cWed Aug 12 10:13:37 2020(r364152)
+++ head/lib/libpmc/libpmc.cWed Aug 12 10:17:17 2020(r364153)
@@ -176,6 +176,11 @@ static const struct pmc_event_descr cortex_a57_event_t
__PMC_EV_ALIAS_ARMV8_CORTEX_A57()
};
+static const struct pmc_event_descr cortex_a76_event_table[] =
+{
+ __PMC_EV_ALIAS_ARMV8_CORTEX_A76()
+};
+
/*
* PMC_MDEP_TABLE(NAME, PRIMARYCLASS, ADDITIONAL_CLASSES...)
*
@@ -193,6 +198,7 @@ PMC_MDEP_TABLE(cortex_a8, ARMV7, PMC_CLASS_SOFT, PMC_C
PMC_MDEP_TABLE(cortex_a9, ARMV7, PMC_CLASS_SOFT, PMC_CLASS_ARMV7);
PMC_MDEP_TABLE(cortex_a53, ARMV8, PMC_CLASS_SOFT, PMC_CLASS_ARMV8);
PMC_MDEP_TABLE(cortex_a57, ARMV8, PMC_CLASS_SOFT, PMC_CLASS_ARMV8);
+PMC_MDEP_TABLE(cortex_a76, ARMV8, PMC_CLASS_SOFT, PMC_CLASS_ARMV8);
PMC_MDEP_TABLE(mips24k, MIPS24K, PMC_CLASS_SOFT, PMC_CLASS_MIPS24K);
PMC_MDEP_TABLE(mips74k, MIPS74K, PMC_CLASS_SOFT, PMC_CLASS_MIPS74K);
PMC_MDEP_TABLE(octeon, OCTEON, PMC_CLASS_SOFT, PMC_CLASS_OCTEON);
@@ -235,6 +241,7 @@ PMC_CLASS_TABLE_DESC(cortex_a9, ARMV7, cortex_a9, armv
#ifdefined(__aarch64__)
PMC_CLASS_TABLE_DESC(cortex_a53, ARMV8, cortex_a53, arm64);
PMC_CLASS_TABLE_DESC(cortex_a57, ARMV8, cortex_a57, arm64);
+PMC_CLASS_TABLE_DESC(cortex_a76, ARMV8, cortex_a76, arm64);
#endif
#if defined(__mips__)
PMC_CLASS_TABLE_DESC(beri, BERI, beri, mips);
@@ -817,6 +824,9 @@ static struct pmc_event_alias cortex_a53_aliases[] = {
static struct pmc_event_alias cortex_a57_aliases[] = {
EV_ALIAS(NULL, NULL)
};
+static struct pmc_event_alias cortex_a76_aliases[] = {
+ EV_ALIAS(NULL, NULL)
+};
static int
arm64_allocate_pmc(enum pmc_event pe, char *ctrspec __unused,
struct pmc_op_pmcallocate *pmc_config __unused)
@@ -1273,6 +1283,10 @@ pmc_event_names_of_class(enum pmc_class cl, const char
ev = cortex_a57_event_table;
count = PMC_EVENT_TABLE_SIZE(cortex_a57);
break;
+ case PMC_CPU_ARMV8_CORTEX_A76:
+ ev = cortex_a76_event_table;
+ count = PMC_EVENT_TABLE_SIZE(cortex_a76);
+ break;
}
break;
case PMC_CLASS_BERI:
@@ -1518,6 +1532,10 @@ pmc_init(void)
PMC_MDEP_INIT(cortex_a57);
pmc_class_table[n] = _a57_class_table_descr;
break;
+ case PMC_CPU_ARMV8_CORTEX_A76:
+ PMC_MDEP_INIT(cortex_a76);
+ pmc_class_table[n] = _a76_class_table_descr;
+ break;
#endif
#if defined(__mips__)
case PMC_CPU_MIPS_BERI:
@@ -1657,6 +1675,10 @@ _pmc_name_of_event(enum pmc_event pe, enum pmc_cputype
case PMC_CPU_ARMV8_CORTEX_A57:
ev = cortex_a57_event_table;
evfence = cortex_a57_event_table +
PMC_EVENT_TABLE_SIZE(cortex_a57);
+ break;
+ case PMC_CPU_ARMV8_CORTEX_A76:
+ ev = cortex_a76_event_table;
+ evfence = cortex_a76_event_table +
PMC_EVENT_TABLE_SIZE(cortex_a76);
break;
default:/* Unknown CPU type. */
break;
Modified: head/sys/arm64/include/armreg.h
==
--- head/sys/arm64/include/armreg.h Wed Aug 12 10:13:37 2020
(r364152)
+++ head/sys/arm64/include/armreg.h Wed Aug 12 10:17:17 2020
(r364153)
@@ -857,11 +857,20 @@
#definePMCR_LC (1 << 6) /* Long cycle count enable */
#definePMCR_IMP_SHIFT 24 /* Implementer code */
#definePMCR_IMP_MASK (0xff << PMCR_IMP_SHIFT)
+#define PMCR_IMP_ARM 0x41
#definePMCR_IDCODE_SHIFT 16 /* Identification code */
#definePMCR_IDCODE_MASK(0xff << PMCR_IDCODE_SHIFT)
-#define PMCR_IDCODE_CORTEX_A57 0x01
-#define PMCR_IDCODE_CORTEX_A72 0x02
-#define PMCR_IDCODE_CORTEX_A53 0x03
+#define PMCR_IDCODE_CORTEX_A57 0x01
+#define PMCR_IDCODE_CORTEX_A72 0x02
svn commit: r363909 - in head/sys: arm64/conf riscv/conf
Author: andrew Date: Wed Aug 5 11:54:51 2020 New Revision: 363909 URL: https://svnweb.freebsd.org/changeset/base/363909 Log: Add DDB_CTF to the arm64 and riscv kernel configs This allows DTrace fbt probes to find arguments. Sponsored by: Innovate UK Modified: head/sys/arm64/conf/GENERIC head/sys/riscv/conf/GENERIC Modified: head/sys/arm64/conf/GENERIC == --- head/sys/arm64/conf/GENERIC Wed Aug 5 11:54:02 2020(r363908) +++ head/sys/arm64/conf/GENERIC Wed Aug 5 11:54:51 2020(r363909) @@ -72,6 +72,7 @@ options CAPABILITIES# Capsicum capabilities optionsMAC # TrustedBSD MAC Framework optionsKDTRACE_FRAME # Ensure frames are compiled in optionsKDTRACE_HOOKS # Kernel DTrace hooks +optionsDDB_CTF # Kernel ELF linker loads CTF data optionsVFP # Floating-point support optionsRACCT # Resource accounting framework optionsRACCT_DEFAULT_TO_DISABLED # Set kern.racct.enable=0 by default Modified: head/sys/riscv/conf/GENERIC == --- head/sys/riscv/conf/GENERIC Wed Aug 5 11:54:02 2020(r363908) +++ head/sys/riscv/conf/GENERIC Wed Aug 5 11:54:51 2020(r363909) @@ -67,6 +67,7 @@ options CAPABILITIES# Capsicum capabilities optionsMAC # TrustedBSD MAC Framework optionsKDTRACE_FRAME # Ensure frames are compiled in optionsKDTRACE_HOOKS # Kernel DTrace hooks +optionsDDB_CTF # Kernel ELF linker loads CTF data optionsFPE # Floating-point extension support optionsRACCT # Resource accounting framework optionsRACCT_DEFAULT_TO_DISABLED # Set kern.racct.enable=0 by default ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r363802 - in head/sys: arm/broadcom/bcm2835 conf
Author: andrew
Date: Mon Aug 3 17:18:12 2020
New Revision: 363802
URL: https://svnweb.freebsd.org/changeset/base/363802
Log:
Add a GPIO driver for the Raspberry Pi firmware GPIOs
These exist on the Raspberry Pi 3 and 4 and control and external IO
expander.
Reviewed by: manu
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D25858
Added:
head/sys/arm/broadcom/bcm2835/raspberrypi_gpio.c (contents, props changed)
Modified:
head/sys/conf/files.arm64
Added: head/sys/arm/broadcom/bcm2835/raspberrypi_gpio.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/arm/broadcom/bcm2835/raspberrypi_gpio.cMon Aug 3 17:18:12
2020(r363802)
@@ -0,0 +1,457 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2012 Oleksandr Tymoshenko
+ * Copyright (c) 2012-2015 Luiz Otavio O Souza
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+#include
+__FBSDID("$FreeBSD$");
+
+#include "opt_platform.h"
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+
+#include "gpio_if.h"
+
+#defineRPI_FW_GPIO_PINS8
+#defineRPI_FW_GPIO_BASE128
+#defineRPI_FW_GPIO_DEFAULT_CAPS(GPIO_PIN_INPUT |
GPIO_PIN_OUTPUT)
+
+struct rpi_fw_gpio_softc {
+ device_tsc_busdev;
+ device_tsc_firmware;
+ struct sx sc_sx;
+ struct gpio_pin sc_gpio_pins[RPI_FW_GPIO_PINS];
+ uint8_t sc_gpio_state;
+};
+
+#defineRPI_FW_GPIO_LOCK(_sc) sx_xlock(&(_sc)->sc_sx)
+#defineRPI_FW_GPIO_UNLOCK(_sc) sx_xunlock(&(_sc)->sc_sx)
+
+static struct ofw_compat_data compat_data[] = {
+ {"raspberrypi,firmware-gpio", 1},
+ {NULL, 0}
+};
+
+static int
+rpi_fw_gpio_pin_configure(struct rpi_fw_gpio_softc *sc, struct gpio_pin *pin,
+unsigned int flags)
+{
+ union msg_get_gpio_config old_cfg;
+ union msg_set_gpio_config new_cfg;
+ int rv;
+
+ bzero(_cfg, sizeof(old_cfg));
+ bzero(_cfg, sizeof(new_cfg));
+ old_cfg.req.gpio = RPI_FW_GPIO_BASE + pin->gp_pin;
+
+ RPI_FW_GPIO_LOCK(sc);
+ rv = bcm2835_firmware_property(sc->sc_firmware,
+ BCM2835_FIRMWARE_TAG_GET_GPIO_CONFIG, _cfg, sizeof(old_cfg));
+ if (rv == 0 && old_cfg.resp.gpio != 0)
+ rv = EIO;
+ if (rv != 0)
+ goto fail;
+
+ new_cfg.req.gpio = RPI_FW_GPIO_BASE + pin->gp_pin;
+ if (flags & GPIO_PIN_INPUT) {
+ new_cfg.req.dir = BCM2835_FIRMWARE_GPIO_IN;
+ new_cfg.req.state = 0;
+ pin->gp_flags = GPIO_PIN_INPUT;
+ } else if (flags & GPIO_PIN_OUTPUT) {
+ new_cfg.req.dir = BCM2835_FIRMWARE_GPIO_OUT;
+ if (flags & (GPIO_PIN_PRESET_HIGH | GPIO_PIN_PRESET_LOW)) {
+ if (flags & GPIO_PIN_PRESET_HIGH) {
+ new_cfg.req.state = 1;
+ sc->sc_gpio_state |= (1 << pin->gp_pin);
+ } else {
+ new_cfg.req.state = 0;
+ sc->sc_gpio_state &= ~(1 << pin->gp_pin);
+ }
+ } else {
+ if ((sc->sc_gpio_state & (1 << pin->gp_pin)) != 0) {
+ new_cfg.req.state = 1;
+ } else {
+ new_cfg.req.state = 0;
+
svn commit: r363800 - head/sys/arm/broadcom/bcm2835
Author: andrew
Date: Mon Aug 3 16:43:40 2020
New Revision: 363800
URL: https://svnweb.freebsd.org/changeset/base/363800
Log:
Allow the Raspberry Pi firmware driver to be a bus
There are child nodes in the device tree, e.g. the Raspberry Pi firmware
GPIO device. Add support for this to be a bus so we can attach these
children.
Reviewed by: manu
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D25848
Modified:
head/sys/arm/broadcom/bcm2835/bcm2835_firmware.c
Modified: head/sys/arm/broadcom/bcm2835/bcm2835_firmware.c
==
--- head/sys/arm/broadcom/bcm2835/bcm2835_firmware.cMon Aug 3 16:26:10
2020(r363799)
+++ head/sys/arm/broadcom/bcm2835/bcm2835_firmware.cMon Aug 3 16:43:40
2020(r363800)
@@ -38,6 +38,8 @@ __FBSDID("$FreeBSD$");
#include
#include
+#include
+
#include
#include
@@ -47,7 +49,7 @@ __FBSDID("$FreeBSD$");
#include
struct bcm2835_firmware_softc {
- device_tsc_dev;
+ struct simplebus_softc sc;
phandle_t sc_mbox;
};
@@ -82,7 +84,6 @@ bcm2835_firmware_attach(device_t dev)
int rv;
sc = device_get_softc(dev);
- sc->sc_dev = dev;
node = ofw_bus_get_node(dev);
rv = OF_getencprop(node, "mboxes", , sizeof(mbox));
@@ -94,14 +95,17 @@ bcm2835_firmware_attach(device_t dev)
OF_device_register_xref(OF_xref_from_node(node), dev);
- ctx = device_get_sysctl_ctx(sc->sc_dev);
- tree_node = device_get_sysctl_tree(sc->sc_dev);
+ ctx = device_get_sysctl_ctx(dev);
+ tree_node = device_get_sysctl_tree(dev);
tree = SYSCTL_CHILDREN(tree_node);
SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "revision",
CTLTYPE_UINT | CTLFLAG_RD, sc, sizeof(*sc),
sysctl_bcm2835_firmware_get_revision, "IU",
"Firmware revision");
- return (0);
+
+ /* The firmwaare doesn't have a ranges property */
+ sc->sc.flags |= SB_FLAG_NO_RANGES;
+ return (simplebus_attach(dev));
}
int
@@ -150,7 +154,7 @@ sysctl_bcm2835_firmware_get_revision(SYSCTL_HANDLER_AR
uint32_t rev;
int err;
- if (bcm2835_firmware_property(sc->sc_dev,
+ if (bcm2835_firmware_property(sc->sc.dev,
BCM2835_MBOX_TAG_FIRMWARE_REVISION, , sizeof(rev)) != 0)
return (ENXIO);
@@ -171,11 +175,9 @@ static device_method_t bcm2835_firmware_methods[] = {
};
static devclass_t bcm2835_firmware_devclass;
-static driver_t bcm2835_firmware_driver = {
- "bcm2835_firmware",
- bcm2835_firmware_methods,
- sizeof(struct bcm2835_firmware_softc),
-};
+DEFINE_CLASS_1(bcm2835_firmware, bcm2835_firmware_driver,
+bcm2835_firmware_methods, sizeof(struct bcm2835_firmware_softc),
+simplebus_driver);
EARLY_DRIVER_MODULE(bcm2835_firmware, simplebus, bcm2835_firmware_driver,
bcm2835_firmware_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST);
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svn commit: r363799 - head/sys/dev/fdt
Author: andrew
Date: Mon Aug 3 16:26:10 2020
New Revision: 363799
URL: https://svnweb.freebsd.org/changeset/base/363799
Log:
Allow child classes of simplebus to call attach directly
Reduce code duplication when a bus is subclassed from simplebus by allowing
them to call simplebus_attach directly. This is useful when the child bus
will just implement the same calls.
As not all children will expect to have a ranges property, e.g. the
Raspberry Pi firmware, allow this property to be missing.
Reviewed by: manu
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D25925
Modified:
head/sys/dev/fdt/simplebus.c
head/sys/dev/fdt/simplebus.h
Modified: head/sys/dev/fdt/simplebus.c
==
--- head/sys/dev/fdt/simplebus.cMon Aug 3 13:12:07 2020
(r363798)
+++ head/sys/dev/fdt/simplebus.cMon Aug 3 16:26:10 2020
(r363799)
@@ -46,7 +46,6 @@ __FBSDID("$FreeBSD$");
* Bus interface.
*/
static int simplebus_probe(device_t dev);
-static int simplebus_attach(device_t dev);
static struct resource *simplebus_alloc_resource(device_t, device_t, int,
int *, rman_res_t, rman_res_t, rman_res_t, u_int);
static voidsimplebus_probe_nomatch(device_t bus, device_t child);
@@ -134,7 +133,7 @@ simplebus_probe(device_t dev)
return (BUS_PROBE_GENERIC);
}
-static int
+int
simplebus_attach(device_t dev)
{
struct simplebus_softc *sc;
@@ -142,7 +141,8 @@ simplebus_attach(device_t dev)
sc = device_get_softc(dev);
simplebus_init(dev, 0);
- if (simplebus_fill_ranges(sc->node, sc) < 0) {
+ if ((sc->flags & SB_FLAG_NO_RANGES) == 0 &&
+ simplebus_fill_ranges(sc->node, sc) < 0) {
device_printf(dev, "could not get ranges\n");
return (ENXIO);
}
Modified: head/sys/dev/fdt/simplebus.h
==
--- head/sys/dev/fdt/simplebus.hMon Aug 3 13:12:07 2020
(r363798)
+++ head/sys/dev/fdt/simplebus.hMon Aug 3 16:26:10 2020
(r363799)
@@ -47,6 +47,8 @@ struct simplebus_softc {
struct simplebus_range *ranges;
int nranges;
+#defineSB_FLAG_NO_RANGES (1 << 0) /* Bus doesn't have ranges
property */
+ int flags;
pcell_t acells, scells;
};
@@ -63,4 +65,7 @@ struct simplebus_devinfo *simplebus_setup_dinfo(device
struct simplebus_devinfo *di);
int simplebus_fill_ranges(phandle_t node,
struct simplebus_softc *sc);
+
+int simplebus_attach(device_t dev);
+
#endif /* _FDT_SIMPLEBUS_H */
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svn commit: r363795 - in head/sys: arm/broadcom/bcm2835 conf dev/usb/controller
Author: andrew
Date: Mon Aug 3 10:19:50 2020
New Revision: 363795
URL: https://svnweb.freebsd.org/changeset/base/363795
Log:
Handle Raspberry Pi 4 xhci firmware loading.
The newer hardware revisions of the Raspberry Pi 4 removed the ability of
the VIA VL805 xhci controller to load its own firmware. Instead the
firmware must be installed at the appropriate time by the VideoCore
coprocessor.
Submitted by: Robert Crowston
Differential Revision:https://reviews.freebsd.org/D25261
Added:
head/sys/arm/broadcom/bcm2835/bcm2838_xhci.c (contents, props changed)
Modified:
head/sys/arm/broadcom/bcm2835/bcm2835_mbox.c
head/sys/arm/broadcom/bcm2835/bcm2835_mbox_prop.h
head/sys/arm/broadcom/bcm2835/files.bcm283x
head/sys/conf/files.arm64
head/sys/dev/usb/controller/xhci.h
head/sys/dev/usb/controller/xhci_pci.c
Modified: head/sys/arm/broadcom/bcm2835/bcm2835_mbox.c
==
--- head/sys/arm/broadcom/bcm2835/bcm2835_mbox.cMon Aug 3 09:20:32
2020(r363794)
+++ head/sys/arm/broadcom/bcm2835/bcm2835_mbox.cMon Aug 3 10:19:50
2020(r363795)
@@ -397,10 +397,10 @@ int
bcm2835_mbox_property(void *msg, size_t msg_size)
{
struct bcm_mbox_softc *sc;
- struct msg_set_power_state *buf;
bus_dma_tag_t msg_tag;
bus_dmamap_t msg_map;
bus_addr_t msg_phys;
+ char *buf;
uint32_t reg;
device_t mbox;
int err;
@@ -468,6 +468,26 @@ bcm2835_mbox_set_power_state(uint32_t device_id, boole
}
int
+bcm2835_mbox_notify_xhci_reset(uint32_t pci_dev_addr)
+{
+ struct msg_notify_xhci_reset msg;
+ int err;
+
+ memset(, 0, sizeof(msg));
+ msg.hdr.buf_size = sizeof(msg);
+ msg.hdr.code = BCM2835_MBOX_CODE_REQ;
+ msg.tag_hdr.tag = BCM2835_MBOX_TAG_NOTIFY_XHCI_RESET;
+ msg.tag_hdr.val_buf_size = sizeof(msg.body);
+ msg.tag_hdr.val_len = sizeof(msg.body.req);
+ msg.body.req.pci_device_addr = pci_dev_addr;
+ msg.end_tag = 0;
+
+ err = bcm2835_mbox_property(, sizeof(msg));
+
+ return (err);
+}
+
+int
bcm2835_mbox_get_clock_rate(uint32_t clock_id, uint32_t *hz)
{
struct msg_get_clock_rate msg;
@@ -572,3 +592,4 @@ bcm2835_mbox_fb_init(struct bcm2835_fb_config *fb)
return (err);
}
+
Modified: head/sys/arm/broadcom/bcm2835/bcm2835_mbox_prop.h
==
--- head/sys/arm/broadcom/bcm2835/bcm2835_mbox_prop.h Mon Aug 3 09:20:32
2020(r363794)
+++ head/sys/arm/broadcom/bcm2835/bcm2835_mbox_prop.h Mon Aug 3 10:19:50
2020(r363795)
@@ -112,6 +112,24 @@ struct msg_set_power_state {
/* Sets the power state for a given device */
int bcm2835_mbox_set_power_state(uint32_t, boolean_t);
+#define BCM2835_MBOX_TAG_NOTIFY_XHCI_RESET 0x00030058
+
+struct msg_notify_xhci_reset {
+ struct bcm2835_mbox_hdr hdr;
+ struct bcm2835_mbox_tag_hdr tag_hdr;
+ union {
+ struct {
+ uint32_t pci_device_addr;
+ } req;
+ struct {
+ } resp;
+ } body;
+ uint32_t end_tag;
+};
+
+/* Prompts the VideoCore processor to reload the xhci firmware. */
+int bcm2835_mbox_notify_xhci_reset(uint32_t);
+
#define BCM2835_MBOX_CLOCK_ID_EMMC 0x0001
#define BCM2838_MBOX_CLOCK_ID_EMMC20x000c
Added: head/sys/arm/broadcom/bcm2835/bcm2838_xhci.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/arm/broadcom/bcm2835/bcm2838_xhci.cMon Aug 3 10:19:50
2020(r363795)
@@ -0,0 +1,217 @@
+/*-
+ * SPDX-License-Identifier: ISC
+ *
+ * Copyright (c) 2020 Dr Robert Harvey Crowston
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ *
+ * $FreeBSD$
+ *
+ */
+
+/*
+ * VIA VL805 controller on the Raspberry Pi 4.
+ * The VL805 is a generic xhci controller. However, in the newer hardware
+ * revisions of the Raspberry Pi 4, it is incapable of loading its own
firmware.
+ * Instead, the VideoCore GPU must load the firmware into the controller at the
+ * appropriate time. This
svn commit: r363660 - head/sys/arm/broadcom/bcm2835
Author: andrew
Date: Wed Jul 29 08:24:40 2020
New Revision: 363660
URL: https://svnweb.freebsd.org/changeset/base/363660
Log:
Only try managing the regulator when EXT_RESOURCES is defined
Not all Raspberry Pi kernel configs define EXT_RESOURCES. Check for this
before trying to manage the regulator.
Sponsored by: Innovate UK
Modified:
head/sys/arm/broadcom/bcm2835/bcm2835_sdhci.c
Modified: head/sys/arm/broadcom/bcm2835/bcm2835_sdhci.c
==
--- head/sys/arm/broadcom/bcm2835/bcm2835_sdhci.c Wed Jul 29 05:27:19
2020(r363659)
+++ head/sys/arm/broadcom/bcm2835/bcm2835_sdhci.c Wed Jul 29 08:24:40
2020(r363660)
@@ -394,10 +394,13 @@ bcm_sdhci_intr(void *arg)
static int
bcm_sdhci_update_ios(device_t bus, device_t child)
{
+#ifdef EXT_RESOURCES
struct bcm_sdhci_softc *sc;
struct mmc_ios *ios;
+#endif
int rv;
+#ifdef EXT_RESOURCES
sc = device_get_softc(bus);
ios = >sc_slot.host.ios;
@@ -407,17 +410,20 @@ bcm_sdhci_update_ios(device_t bus, device_t child)
if (sc->sc_mmc_helper.vqmmc_supply)
regulator_enable(sc->sc_mmc_helper.vqmmc_supply);
}
+#endif
rv = sdhci_generic_update_ios(bus, child);
if (rv != 0)
return (rv);
+#ifdef EXT_RESOURCES
if (ios->power_mode == power_off) {
if (sc->sc_mmc_helper.vmmc_supply)
regulator_disable(sc->sc_mmc_helper.vmmc_supply);
if (sc->sc_mmc_helper.vqmmc_supply)
regulator_disable(sc->sc_mmc_helper.vqmmc_supply);
}
+#endif
return (0);
}
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svn commit: r363647 - head/sys/arm/broadcom/bcm2835
Author: andrew
Date: Tue Jul 28 11:32:45 2020
New Revision: 363647
URL: https://svnweb.freebsd.org/changeset/base/363647
Log:
Add a workaround for a bug when setting the Raspberry GIO config and state
The Raspberry Pi GPIO config and state messages incorrectly return with
the tag length set to 0. We then check this value to have the response
flag set. Work around this by setting the response flag when setting the
GPIO config or state and this value is zero.
Sponsored by: Innovate UK
Modified:
head/sys/arm/broadcom/bcm2835/bcm2835_mbox.c
Modified: head/sys/arm/broadcom/bcm2835/bcm2835_mbox.c
==
--- head/sys/arm/broadcom/bcm2835/bcm2835_mbox.cTue Jul 28 11:23:37
2020(r363646)
+++ head/sys/arm/broadcom/bcm2835/bcm2835_mbox.cTue Jul 28 11:32:45
2020(r363647)
@@ -43,6 +43,7 @@ __FBSDID("$FreeBSD$");
#include
#include
+#include
#include
#include
#include
@@ -362,6 +363,16 @@ bcm2835_mbox_err(device_t dev, bus_addr_t msg_phys, ui
tag = (struct bcm2835_mbox_tag_hdr *)(msg + 1);
last = (uint8_t *)msg + len;
for (idx = 0; tag->tag != 0; idx++) {
+ /*
+* When setting the GPIO config or state the firmware doesn't
+* set tag->val_len correctly.
+*/
+ if ((tag->tag == BCM2835_FIRMWARE_TAG_SET_GPIO_CONFIG ||
+tag->tag == BCM2835_FIRMWARE_TAG_SET_GPIO_STATE) &&
+ tag->val_len == 0) {
+ tag->val_len = BCM2835_MBOX_TAG_VAL_LEN_RESPONSE |
+ tag->val_buf_size;
+ }
if ((tag->val_len & BCM2835_MBOX_TAG_VAL_LEN_RESPONSE) == 0) {
device_printf(dev, "tag %d response error\n", idx);
return (EIO);
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svn commit: r363645 - head/sys/arm/broadcom/bcm2835
Author: andrew
Date: Tue Jul 28 11:13:37 2020
New Revision: 363645
URL: https://svnweb.freebsd.org/changeset/base/363645
Log:
Aadd Raspberry Pi firmware messages to manage GPIOs
Some GPIOs are managed by an external IO expaandder through the firmware.
Add the message details for these.
Sponsored by: Innovate UK
Modified:
head/sys/arm/broadcom/bcm2835/bcm2835_firmware.h
Modified: head/sys/arm/broadcom/bcm2835/bcm2835_firmware.h
==
--- head/sys/arm/broadcom/bcm2835/bcm2835_firmware.hTue Jul 28 10:58:37
2020(r363644)
+++ head/sys/arm/broadcom/bcm2835/bcm2835_firmware.hTue Jul 28 11:13:37
2020(r363645)
@@ -142,6 +142,61 @@ union msg_set_turbo_body {
} resp;
};
+#defineBCM2835_FIRMWARE_TAG_GET_GPIO_STATE 0x00030041
+#defineBCM2835_FIRMWARE_TAG_SET_GPIO_STATE 0x00038041
+#defineBCM2835_FIRMWARE_TAG_GET_GPIO_CONFIG0x00030043
+#defineBCM2835_FIRMWARE_TAG_SET_GPIO_CONFIG0x00038043
+
+#defineBCM2835_FIRMWARE_GPIO_IN0
+#defineBCM2835_FIRMWARE_GPIO_OUT 1
+
+union msg_get_gpio_state {
+ struct {
+ uint32_t gpio;
+ } req;
+ struct {
+ uint32_t gpio;
+ uint32_t state;
+ } resp;
+};
+
+union msg_set_gpio_state {
+ struct {
+ uint32_t gpio;
+ uint32_t state;
+ } req;
+ struct {
+ uint32_t gpio;
+ } resp;
+};
+
+union msg_get_gpio_config {
+ struct {
+ uint32_t gpio;
+ } req;
+ struct {
+ uint32_t gpio;
+ uint32_t dir;
+ uint32_t pol;
+ uint32_t term_en;
+ uint32_t term_pull_up;
+ } resp;
+};
+
+union msg_set_gpio_config {
+ struct {
+ uint32_t gpio;
+ uint32_t dir;
+ uint32_t pol;
+ uint32_t term_en;
+ uint32_t term_pull_up;
+ uint32_t state;
+ } req;
+ struct {
+ uint32_t gpio;
+ } resp;
+};
+
int bcm2835_firmware_property(device_t, uint32_t, void *, size_t);
#endif
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svn commit: r363643 - head/sys/arm/broadcom/bcm2835
Author: andrew
Date: Tue Jul 28 10:45:29 2020
New Revision: 363643
URL: https://svnweb.freebsd.org/changeset/base/363643
Log:
Switch the bcm2835 cpufreq driver to use the firmware interface
Use the new Raspberry Pi firmware driver in the cpufreq driver. It is
intended all drivers that need to interact with the firmware will move to
use the firmware driver, this is the first.
Reviewed by: manu
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D25609
Modified:
head/sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
head/sys/arm/broadcom/bcm2835/bcm2835_firmware.h
head/sys/arm/broadcom/bcm2835/bcm2835_mbox_prop.h
Modified: head/sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
==
--- head/sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c Tue Jul 28 10:43:52
2020(r363642)
+++ head/sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c Tue Jul 28 10:45:29
2020(r363643)
@@ -47,12 +47,10 @@ __FBSDID("$FreeBSD$");
#include
#include
-#include
-#include
+#include
#include
#include "cpufreq_if.h"
-#include "mbox_if.h"
#ifdef DEBUG
#define DPRINTF(fmt, ...) do { \
@@ -101,6 +99,7 @@ static struct sysctl_ctx_list bcm2835_sysctl_ctx;
struct bcm2835_cpufreq_softc {
device_tdev;
+ device_tfirmware;
int arm_max_freq;
int arm_min_freq;
int core_max_freq;
@@ -161,7 +160,7 @@ static int
bcm2835_cpufreq_get_clock_rate(struct bcm2835_cpufreq_softc *sc,
uint32_t clock_id)
{
- struct msg_get_clock_rate msg;
+ union msg_get_clock_rate_body msg;
int rate;
int err;
@@ -181,16 +180,11 @@ bcm2835_cpufreq_get_clock_rate(struct bcm2835_cpufreq_
/* setup single tag buffer */
memset(, 0, sizeof(msg));
- msg.hdr.buf_size = sizeof(msg);
- msg.hdr.code = BCM2835_MBOX_CODE_REQ;
- msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_CLOCK_RATE;
- msg.tag_hdr.val_buf_size = sizeof(msg.body);
- msg.tag_hdr.val_len = sizeof(msg.body.req);
- msg.body.req.clock_id = clock_id;
- msg.end_tag = 0;
+ msg.req.clock_id = clock_id;
/* call mailbox property */
- err = bcm2835_mbox_property(, sizeof(msg));
+ err = bcm2835_firmware_property(sc->firmware,
+ BCM2835_FIRMWARE_TAG_GET_CLOCK_RATE, , sizeof(msg));
if (err) {
device_printf(sc->dev, "can't get clock rate (id=%u)\n",
clock_id);
@@ -198,7 +192,7 @@ bcm2835_cpufreq_get_clock_rate(struct bcm2835_cpufreq_
}
/* result (Hz) */
- rate = (int)msg.body.resp.rate_hz;
+ rate = (int)msg.resp.rate_hz;
DPRINTF("clock = %d(Hz)\n", rate);
return (rate);
}
@@ -207,7 +201,7 @@ static int
bcm2835_cpufreq_get_max_clock_rate(struct bcm2835_cpufreq_softc *sc,
uint32_t clock_id)
{
- struct msg_get_max_clock_rate msg;
+ union msg_get_clock_rate_body msg;
int rate;
int err;
@@ -227,16 +221,11 @@ bcm2835_cpufreq_get_max_clock_rate(struct bcm2835_cpuf
/* setup single tag buffer */
memset(, 0, sizeof(msg));
- msg.hdr.buf_size = sizeof(msg);
- msg.hdr.code = BCM2835_MBOX_CODE_REQ;
- msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MAX_CLOCK_RATE;
- msg.tag_hdr.val_buf_size = sizeof(msg.body);
- msg.tag_hdr.val_len = sizeof(msg.body.req);
- msg.body.req.clock_id = clock_id;
- msg.end_tag = 0;
+ msg.req.clock_id = clock_id;
/* call mailbox property */
- err = bcm2835_mbox_property(, sizeof(msg));
+ err = bcm2835_firmware_property(sc->firmware,
+ BCM2835_FIRMWARE_TAG_GET_MAX_CLOCK_RATE, , sizeof(msg));
if (err) {
device_printf(sc->dev, "can't get max clock rate (id=%u)\n",
clock_id);
@@ -244,7 +233,7 @@ bcm2835_cpufreq_get_max_clock_rate(struct bcm2835_cpuf
}
/* result (Hz) */
- rate = (int)msg.body.resp.rate_hz;
+ rate = (int)msg.resp.rate_hz;
DPRINTF("clock = %d(Hz)\n", rate);
return (rate);
}
@@ -253,7 +242,7 @@ static int
bcm2835_cpufreq_get_min_clock_rate(struct bcm2835_cpufreq_softc *sc,
uint32_t clock_id)
{
- struct msg_get_min_clock_rate msg;
+ union msg_get_clock_rate_body msg;
int rate;
int err;
@@ -273,16 +262,11 @@ bcm2835_cpufreq_get_min_clock_rate(struct bcm2835_cpuf
/* setup single tag buffer */
memset(, 0, sizeof(msg));
- msg.hdr.buf_size = sizeof(msg);
- msg.hdr.code = BCM2835_MBOX_CODE_REQ;
- msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MIN_CLOCK_RATE;
- msg.tag_hdr.val_buf_size = sizeof(msg.body);
- msg.tag_hdr.val_len = sizeof(msg.body.req);
- msg.body.req.clock_id = clock_id;
- msg.end_tag = 0;
+ msg.req.clock_id = clock_id;
/*
svn commit: r363642 - head/sys/arm/broadcom/bcm2835
Author: andrew
Date: Tue Jul 28 10:43:52 2020
New Revision: 363642
URL: https://svnweb.freebsd.org/changeset/base/363642
Log:
Move the bcm2835 firmware driver earlier in the boot.
It will be needed by other eaarly drivers.
While here make the dependency of the mailbox formal with MODULE_DEPEND.
Reviewed by: manu
Sponsored by: Innovate UK
Modified:
head/sys/arm/broadcom/bcm2835/bcm2835_firmware.c
Modified: head/sys/arm/broadcom/bcm2835/bcm2835_firmware.c
==
--- head/sys/arm/broadcom/bcm2835/bcm2835_firmware.cTue Jul 28 10:41:43
2020(r363641)
+++ head/sys/arm/broadcom/bcm2835/bcm2835_firmware.cTue Jul 28 10:43:52
2020(r363642)
@@ -177,5 +177,6 @@ static driver_t bcm2835_firmware_driver = {
sizeof(struct bcm2835_firmware_softc),
};
-DRIVER_MODULE(bcm2835_firmware, simplebus, bcm2835_firmware_driver,
-bcm2835_firmware_devclass, 0, 0);
+EARLY_DRIVER_MODULE(bcm2835_firmware, simplebus, bcm2835_firmware_driver,
+bcm2835_firmware_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST);
+MODULE_DEPEND(bcm2835_firmware, mbox, 1, 1, 1);
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svn commit: r363641 - head/sys/arm/broadcom/bcm2835
Author: andrew
Date: Tue Jul 28 10:41:43 2020
New Revision: 363641
URL: https://svnweb.freebsd.org/changeset/base/363641
Log:
Revert r363639 so I can use a more correct commit message
Modified:
head/sys/arm/broadcom/bcm2835/bcm2835_firmware.c
Modified: head/sys/arm/broadcom/bcm2835/bcm2835_firmware.c
==
--- head/sys/arm/broadcom/bcm2835/bcm2835_firmware.cTue Jul 28 10:40:00
2020(r363640)
+++ head/sys/arm/broadcom/bcm2835/bcm2835_firmware.cTue Jul 28 10:41:43
2020(r363641)
@@ -177,6 +177,5 @@ static driver_t bcm2835_firmware_driver = {
sizeof(struct bcm2835_firmware_softc),
};
-EARLY_DRIVER_MODULE(bcm2835_firmware, simplebus, bcm2835_firmware_driver,
-bcm2835_firmware_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST);
-MODULE_DEPEND(bcm2835_firmware, mbox, 1, 1, 1);
+DRIVER_MODULE(bcm2835_firmware, simplebus, bcm2835_firmware_driver,
+bcm2835_firmware_devclass, 0, 0);
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svn commit: r363640 - head/sys/arm/broadcom/bcm2835
Author: andrew
Date: Tue Jul 28 10:40:00 2020
New Revision: 363640
URL: https://svnweb.freebsd.org/changeset/base/363640
Log:
Move the bcm2835 mailbox driver earlier in the boot
This will be needed before the firmware driver is loaded
Modified:
head/sys/arm/broadcom/bcm2835/bcm2835_mbox.c
Modified: head/sys/arm/broadcom/bcm2835/bcm2835_mbox.c
==
--- head/sys/arm/broadcom/bcm2835/bcm2835_mbox.cTue Jul 28 10:37:58
2020(r363639)
+++ head/sys/arm/broadcom/bcm2835/bcm2835_mbox.cTue Jul 28 10:40:00
2020(r363640)
@@ -293,7 +293,8 @@ static driver_t bcm_mbox_driver = {
static devclass_t bcm_mbox_devclass;
-DRIVER_MODULE(mbox, simplebus, bcm_mbox_driver, bcm_mbox_devclass, 0, 0);
+EARLY_DRIVER_MODULE(mbox, simplebus, bcm_mbox_driver, bcm_mbox_devclass, 0, 0,
+BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST);
static void
bcm2835_mbox_dma_cb(void *arg, bus_dma_segment_t *segs, int nseg, int err)
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svn commit: r363639 - head/sys/arm/broadcom/bcm2835
Author: andrew
Date: Tue Jul 28 10:37:58 2020
New Revision: 363639
URL: https://svnweb.freebsd.org/changeset/base/363639
Log:
Have the bcm2835 firmware driver depend on the mailbox driver
The firmware driver uses the mailbox driver to communicate with the
firmware. Make this a more formal dependency.
Reviewed by: manu
Sponsored by: Innovate UK
Modified:
head/sys/arm/broadcom/bcm2835/bcm2835_firmware.c
Modified: head/sys/arm/broadcom/bcm2835/bcm2835_firmware.c
==
--- head/sys/arm/broadcom/bcm2835/bcm2835_firmware.cTue Jul 28 10:08:07
2020(r363638)
+++ head/sys/arm/broadcom/bcm2835/bcm2835_firmware.cTue Jul 28 10:37:58
2020(r363639)
@@ -177,5 +177,6 @@ static driver_t bcm2835_firmware_driver = {
sizeof(struct bcm2835_firmware_softc),
};
-DRIVER_MODULE(bcm2835_firmware, simplebus, bcm2835_firmware_driver,
-bcm2835_firmware_devclass, 0, 0);
+EARLY_DRIVER_MODULE(bcm2835_firmware, simplebus, bcm2835_firmware_driver,
+bcm2835_firmware_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST);
+MODULE_DEPEND(bcm2835_firmware, mbox, 1, 1, 1);
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svn commit: r363637 - head/sys/arm/broadcom/bcm2835
Author: andrew
Date: Tue Jul 28 09:46:58 2020
New Revision: 363637
URL: https://svnweb.freebsd.org/changeset/base/363637
Log:
Enable use of the regulator in the Broadcom SDHCI controller
This will be needed before a future GPIO controller driver is added
as the later enables regulators that leave the SDHCI controller disabled.
Reviewed by: manu
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D25834
Modified:
head/sys/arm/broadcom/bcm2835/bcm2835_sdhci.c
Modified: head/sys/arm/broadcom/bcm2835/bcm2835_sdhci.c
==
--- head/sys/arm/broadcom/bcm2835/bcm2835_sdhci.c Tue Jul 28 09:29:56
2020(r363636)
+++ head/sys/arm/broadcom/bcm2835/bcm2835_sdhci.c Tue Jul 28 09:46:58
2020(r363637)
@@ -48,6 +48,7 @@ __FBSDID("$FreeBSD$");
#include
#include
+#include
#include
@@ -155,6 +156,7 @@ struct bcm_sdhci_softc {
void * sc_intrhand;
struct mmc_request *sc_req;
struct sdhci_slot sc_slot;
+ struct mmc_fdt_helper sc_mmc_helper;
int sc_dma_ch;
bus_dma_tag_t sc_dma_tag;
bus_dmamap_tsc_dma_map;
@@ -315,6 +317,7 @@ bcm_sdhci_attach(device_t dev)
sc->sc_slot.quirks = sc->conf->quirks;
sdhci_init_slot(dev, >sc_slot, 0);
+ mmc_fdt_parse(dev, 0, >sc_mmc_helper, >sc_slot.host);
sc->sc_dma_ch = bcm_dma_allocate(BCM_DMA_CH_ANY);
if (sc->sc_dma_ch == BCM_DMA_CH_INVALID)
@@ -389,6 +392,37 @@ bcm_sdhci_intr(void *arg)
}
static int
+bcm_sdhci_update_ios(device_t bus, device_t child)
+{
+ struct bcm_sdhci_softc *sc;
+ struct mmc_ios *ios;
+ int rv;
+
+ sc = device_get_softc(bus);
+ ios = >sc_slot.host.ios;
+
+ if (ios->power_mode == power_up) {
+ if (sc->sc_mmc_helper.vmmc_supply)
+ regulator_enable(sc->sc_mmc_helper.vmmc_supply);
+ if (sc->sc_mmc_helper.vqmmc_supply)
+ regulator_enable(sc->sc_mmc_helper.vqmmc_supply);
+ }
+
+ rv = sdhci_generic_update_ios(bus, child);
+ if (rv != 0)
+ return (rv);
+
+ if (ios->power_mode == power_off) {
+ if (sc->sc_mmc_helper.vmmc_supply)
+ regulator_disable(sc->sc_mmc_helper.vmmc_supply);
+ if (sc->sc_mmc_helper.vqmmc_supply)
+ regulator_disable(sc->sc_mmc_helper.vqmmc_supply);
+ }
+
+ return (0);
+}
+
+static int
bcm_sdhci_get_ro(device_t bus, device_t child)
{
@@ -787,7 +821,7 @@ static device_method_t bcm_sdhci_methods[] = {
DEVMETHOD(bus_add_child,bus_generic_add_child),
/* MMC bridge interface */
- DEVMETHOD(mmcbr_update_ios, sdhci_generic_update_ios),
+ DEVMETHOD(mmcbr_update_ios, bcm_sdhci_update_ios),
DEVMETHOD(mmcbr_request,sdhci_generic_request),
DEVMETHOD(mmcbr_get_ro, bcm_sdhci_get_ro),
DEVMETHOD(mmcbr_acquire_host, sdhci_generic_acquire_host),
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svn commit: r363636 - in head/sys: conf dev/smc
Author: andrew
Date: Tue Jul 28 09:29:56 2020
New Revision: 363636
URL: https://svnweb.freebsd.org/changeset/base/363636
Log:
Add an ACPI attachment for if_smc
This is needed by some of the Arm simulators as they implement a smc based
network interface, but use ACPI rather than FDT.
Sponsored by: Innovate UK
Added:
head/sys/dev/smc/if_smc_acpi.c
- copied, changed from r363635, head/sys/dev/smc/if_smc_fdt.c
Modified:
head/sys/conf/files
head/sys/dev/smc/if_smc.c
head/sys/dev/smc/if_smc_fdt.c
head/sys/dev/smc/if_smcvar.h
Modified: head/sys/conf/files
==
--- head/sys/conf/files Tue Jul 28 07:07:38 2020(r363635)
+++ head/sys/conf/files Tue Jul 28 09:29:56 2020(r363636)
@@ -3029,6 +3029,7 @@ dev/smbus/smbconf.c optional smbus
dev/smbus/smbus.c optional smbus
dev/smbus/smbus_if.m optional smbus
dev/smc/if_smc.c optional smc
+dev/smc/if_smc_acpi.c optional smc acpi
dev/smc/if_smc_fdt.c optional smc fdt
dev/snp/snp.c optional snp
dev/sound/clone.c optional sound
Modified: head/sys/dev/smc/if_smc.c
==
--- head/sys/dev/smc/if_smc.c Tue Jul 28 07:07:38 2020(r363635)
+++ head/sys/dev/smc/if_smc.c Tue Jul 28 09:29:56 2020(r363636)
@@ -80,6 +80,8 @@ __FBSDID("$FreeBSD$");
#include
#include
+#include "miibus_if.h"
+
#defineSMC_LOCK(sc)mtx_lock(&(sc)->smc_mtx)
#defineSMC_UNLOCK(sc) mtx_unlock(&(sc)->smc_mtx)
#defineSMC_ASSERT_LOCKED(sc) mtx_assert(&(sc)->smc_mtx, MA_OWNED)
@@ -479,6 +481,27 @@ smc_detach(device_t dev)
return (0);
}
+
+static device_method_t smc_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_attach,smc_attach),
+ DEVMETHOD(device_detach,smc_detach),
+
+ /* MII interface */
+ DEVMETHOD(miibus_readreg, smc_miibus_readreg),
+ DEVMETHOD(miibus_writereg, smc_miibus_writereg),
+ DEVMETHOD(miibus_statchg, smc_miibus_statchg),
+
+ { 0, 0 }
+};
+
+driver_t smc_driver = {
+ "smc",
+ smc_methods,
+ sizeof(struct smc_softc),
+};
+
+DRIVER_MODULE(miibus, smc, miibus_driver, miibus_devclass, 0, 0);
static void
smc_start(struct ifnet *ifp)
Copied and modified: head/sys/dev/smc/if_smc_acpi.c (from r363635,
head/sys/dev/smc/if_smc_fdt.c)
==
--- head/sys/dev/smc/if_smc_fdt.c Tue Jul 28 07:07:38 2020
(r363635, copy source)
+++ head/sys/dev/smc/if_smc_acpi.c Tue Jul 28 09:29:56 2020
(r363636)
@@ -1,6 +1,7 @@
/*-
* Copyright (c) 2008 Benno Rice
* All rights reserved.
+ * Copyright (c) 2020 Andrew Turner
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -35,92 +36,45 @@ __FBSDID("$FreeBSD$");
#include
#include
-#include
-#include
-
-#include
#include
-#include
-#include
#include
-#include
-#include
+#include
+#include
-#include
-#include
-#include
-#include
+static int smc_acpi_probe(device_t);
-#include "miibus_if.h"
-
-static int smc_fdt_probe(device_t);
-static int smc_fdt_attach(device_t);
-static int smc_fdt_detach(device_t);
-
static int
-smc_fdt_probe(device_t dev)
+smc_acpi_probe(device_t dev)
{
struct smc_softc *sc;
+ ACPI_HANDLE h;
- if (!ofw_bus_status_okay(dev))
+ if ((h = acpi_get_handle(dev)) == NULL)
return (ENXIO);
- if (ofw_bus_is_compatible(dev, "smsc,lan91c111")) {
- sc = device_get_softc(dev);
- sc->smc_usemem = 1;
+ if (!acpi_MatchHid(h, "LNRO0003"))
+ return (ENXIO);
- if (smc_probe(dev) != 0) {
- return (ENXIO);
- }
+ sc = device_get_softc(dev);
+ sc->smc_usemem = 1;
- return (0);
- }
-
- return (ENXIO);
+ return (smc_probe(dev));
}
-static int
-smc_fdt_attach(device_t dev)
-{
-
- return smc_attach(dev);
-}
-
-static int
-smc_fdt_detach(device_t dev)
-{
-
- smc_detach(dev);
-
- return (0);
-}
-
-static device_method_t smc_fdt_methods[] = {
+static device_method_t smc_acpi_methods[] = {
/* Device interface */
- DEVMETHOD(device_probe, smc_fdt_probe),
- DEVMETHOD(device_attach,smc_fdt_attach),
- DEVMETHOD(device_detach,smc_fdt_detach),
-
- /* MII interface */
- DEVMETHOD(miibus_readreg, smc_miibus_readreg),
- DEVMETHOD(miibu
svn commit: r363390 - head/sys/dev/virtio/mmio
Author: andrew
Date: Tue Jul 21 14:25:36 2020
New Revision: 363390
URL: https://svnweb.freebsd.org/changeset/base/363390
Log:
Only write to VIRTIO_MMIO_GUEST_PAGE_SIZE with virtio mmio version 1
This register is only defined for the legacy v1 interface so only write
to it when interacting with a legacy device.
Sponsored by: Innovate UK
Modified:
head/sys/dev/virtio/mmio/virtio_mmio.c
Modified: head/sys/dev/virtio/mmio/virtio_mmio.c
==
--- head/sys/dev/virtio/mmio/virtio_mmio.c Tue Jul 21 14:17:35 2020
(r363389)
+++ head/sys/dev/virtio/mmio/virtio_mmio.c Tue Jul 21 14:25:36 2020
(r363390)
@@ -491,8 +491,10 @@ vtmmio_alloc_virtqueues(device_t dev, int flags, int n
if (sc->vtmmio_vqs == NULL)
return (ENOMEM);
- vtmmio_write_config_4(sc, VIRTIO_MMIO_GUEST_PAGE_SIZE,
- (1 << PAGE_SHIFT));
+ if (sc->vtmmio_version == 1) {
+ vtmmio_write_config_4(sc, VIRTIO_MMIO_GUEST_PAGE_SIZE,
+ (1 << PAGE_SHIFT));
+ }
for (idx = 0; idx < nvqs; idx++) {
vqx = >vtmmio_vqs[idx];
@@ -564,8 +566,10 @@ vtmmio_reinit(device_t dev, uint64_t features)
vtmmio_negotiate_features(dev, features);
- vtmmio_write_config_4(sc, VIRTIO_MMIO_GUEST_PAGE_SIZE,
- (1 << PAGE_SHIFT));
+ if (sc->vtmmio_version == 1) {
+ vtmmio_write_config_4(sc, VIRTIO_MMIO_GUEST_PAGE_SIZE,
+ (1 << PAGE_SHIFT));
+ }
for (idx = 0; idx < sc->vtmmio_nvqs; idx++) {
error = vtmmio_reinit_virtqueue(sc, idx);
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svn commit: r363272 - head/sys/cddl/dev/dtrace/aarch64
Author: andrew
Date: Fri Jul 17 14:39:07 2020
New Revision: 363272
URL: https://svnweb.freebsd.org/changeset/base/363272
Log:
Don't overflow the trap frame when accessing lr or xzr.
When emulating a load pair or store pair in dtrace on arm64 we need to
copy the data between the stack and trap frame. When the registers are
either the link register or the zero register we will access memory
past the end of the trap frame as these are encoded as registers 30 and
31 respectively while the array they access only has 30 entries.
Fix this by creating 2 helper functions to perform the operation with
special cases for these registers.
Sponsored by: Innovate UK
Modified:
head/sys/cddl/dev/dtrace/aarch64/dtrace_subr.c
Modified: head/sys/cddl/dev/dtrace/aarch64/dtrace_subr.c
==
--- head/sys/cddl/dev/dtrace/aarch64/dtrace_subr.c Fri Jul 17 14:17:13
2020(r363271)
+++ head/sys/cddl/dev/dtrace/aarch64/dtrace_subr.c Fri Jul 17 14:39:07
2020(r363272)
@@ -231,6 +231,31 @@ dtrace_probe_error(dtrace_state_t *state, dtrace_epid_
(uintptr_t)which, (uintptr_t)fault, (uintptr_t)fltoffs);
}
+static void
+dtrace_load64(uint64_t *addr, struct trapframe *frame, u_int reg)
+{
+
+ KASSERT(reg <= 31, ("dtrace_load64: Invalid register %u", reg));
+ if (reg < nitems(frame->tf_x))
+ frame->tf_x[reg] = *addr;
+ else if (reg == 30) /* lr */
+ frame->tf_lr = *addr;
+ /* Nothing to do for load to xzr */
+}
+
+static void
+dtrace_store64(uint64_t *addr, struct trapframe *frame, u_int reg)
+{
+
+ KASSERT(reg <= 31, ("dtrace_store64: Invalid register %u", reg));
+ if (reg < nitems(frame->tf_x))
+ *addr = frame->tf_x[reg];
+ else if (reg == 30) /* lr */
+ *addr = frame->tf_lr;
+ else if (reg == 31) /* xzr */
+ *addr = 0;
+}
+
static int
dtrace_invop_start(struct trapframe *frame)
{
@@ -258,12 +283,12 @@ dtrace_invop_start(struct trapframe *frame)
sp -= (~offs & OFFSET_MASK) + 1;
else
sp += (offs);
- *(sp + 0) = frame->tf_x[arg1];
- *(sp + 1) = frame->tf_x[arg2];
+ dtrace_store64(sp + 0, frame, arg1);
+ dtrace_store64(sp + 1, frame, arg2);
break;
case LDP_64:
- frame->tf_x[arg1] = *(sp + 0);
- frame->tf_x[arg2] = *(sp + 1);
+ dtrace_load64(sp + 0, frame, arg1);
+ dtrace_load64(sp + 1, frame, arg2);
if (offs >> (OFFSET_SIZE - 1))
sp -= (~offs & OFFSET_MASK) + 1;
else
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svn commit: r363191 - head/sys/arm64/arm64
Author: andrew
Date: Tue Jul 14 18:50:48 2020
New Revision: 363191
URL: https://svnweb.freebsd.org/changeset/base/363191
Log:
Print the arm64 registers in more exception handling panics
It can be useful to get a dump of all registers when investigating why we
received an exception that we are unable to handle. In these cases we
already call panic, however we don't always print the registers.
Add calls to print_registers and print esr and far when applicable.
Sponsored by: Innovate UK
Modified:
head/sys/arm64/arm64/trap.c
Modified: head/sys/arm64/arm64/trap.c
==
--- head/sys/arm64/arm64/trap.c Tue Jul 14 18:31:15 2020(r363190)
+++ head/sys/arm64/arm64/trap.c Tue Jul 14 18:50:48 2020(r363191)
@@ -170,8 +170,12 @@ static void
align_abort(struct thread *td, struct trapframe *frame, uint64_t esr,
uint64_t far, int lower)
{
- if (!lower)
+ if (!lower) {
+ print_registers(frame);
+ printf(" far: %16lx\n", far);
+ printf(" esr: %.8lx\n", esr);
panic("Misaligned access from kernel space!");
+ }
call_trapsignal(td, SIGBUS, BUS_ADRALN, (void *)frame->tf_elr);
userret(td, frame);
@@ -361,6 +365,7 @@ do_el1h_sync(struct thread *td, struct trapframe *fram
} else {
print_registers(frame);
printf(" far: %16lx\n", far);
+ printf(" esr: %.8lx\n", esr);
panic("Unhandled EL1 %s abort: %x",
exception == EXCP_INSN_ABORT ? "instruction" :
"data", dfsc);
@@ -397,6 +402,7 @@ do_el1h_sync(struct thread *td, struct trapframe *fram
/* FALLTHROUGH */
default:
print_registers(frame);
+ printf(" far: %16lx\n", READ_SPECIALREG(far_el1));
panic("Unknown kernel exception %x esr_el1 %lx\n", exception,
esr);
}
@@ -466,10 +472,14 @@ do_el0_sync(struct thread *td, struct trapframe *frame
if (dfsc < nitems(abort_handlers) &&
abort_handlers[dfsc] != NULL)
abort_handlers[dfsc](td, frame, esr, far, 1);
- else
+ else {
+ print_registers(frame);
+ printf(" far: %16lx\n", far);
+ printf(" esr: %.8lx\n", esr);
panic("Unhandled EL0 %s abort: %x",
exception == EXCP_INSN_ABORT_L ? "instruction" :
"data", dfsc);
+ }
break;
case EXCP_UNKNOWN:
if (!undef_insn(0, frame))
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svn commit: r363073 - head/sys/arm/broadcom/bcm2835
Author: andrew
Date: Fri Jul 10 09:34:47 2020
New Revision: 363073
URL: https://svnweb.freebsd.org/changeset/base/363073
Log:
Split long lines in the Raspberry Pi FB driver
Sponsored by: Innovate UK
Modified:
head/sys/arm/broadcom/bcm2835/bcm2835_fbd.c
Modified: head/sys/arm/broadcom/bcm2835/bcm2835_fbd.c
==
--- head/sys/arm/broadcom/bcm2835/bcm2835_fbd.c Fri Jul 10 09:24:27 2020
(r363072)
+++ head/sys/arm/broadcom/bcm2835/bcm2835_fbd.c Fri Jul 10 09:34:47 2020
(r363073)
@@ -88,17 +88,20 @@ bcm_fb_init(struct bcmsc_softc *sc, struct bcm2835_fb_
if (bcm2835_mbox_fb_get_bpp(fb) != 0)
return (ENXIO);
if (fb->bpp < FB_DEPTH) {
- device_printf(sc->dev, "changing fb bpp from %d to %d\n",
fb->bpp, FB_DEPTH);
+ device_printf(sc->dev, "changing fb bpp from %d to %d\n",
+ fb->bpp, FB_DEPTH);
fb->bpp = FB_DEPTH;
} else
- device_printf(sc->dev, "keeping existing fb bpp of %d\n",
fb->bpp);
+ device_printf(sc->dev, "keeping existing fb bpp of %d\n",
+ fb->bpp);
fb->vxres = fb->xres;
fb->vyres = fb->yres;
fb->xoffset = fb->yoffset = 0;
if ((err = bcm2835_mbox_fb_init(fb)) != 0) {
- device_printf(sc->dev, "bcm2835_mbox_fb_init failed, err=%d\n",
err);
+ device_printf(sc->dev, "bcm2835_mbox_fb_init failed, err=%d\n",
+ err);
return (ENXIO);
}
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svn commit: r363047 - in head/sys: arm/broadcom/bcm2835 conf
Author: andrew
Date: Thu Jul 9 16:28:13 2020
New Revision: 363047
URL: https://svnweb.freebsd.org/changeset/base/363047
Log:
Add a driver to talk to the Raspberry Pi firmware
Communicating with the Raspberry Pi firmware is currently handled by each
driver calling into the mbox driver, however the device tree is structured
such that they should be calling into a firmware driver.
Add a driver for this node with an interface to communicate to the firmware
via the mbox interface.
There is a sysctl to get the firmware revision. This is a unix date so can
be parsed with:
root@generic:~ # date -j -f '%s' sysctl -n dev.bcm2835_firmware.0.revision
Tue Nov 19 16:40:28 UTC 2019
Reviewed by: manu
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D25572
Added:
head/sys/arm/broadcom/bcm2835/bcm2835_firmware.c (contents, props changed)
head/sys/arm/broadcom/bcm2835/bcm2835_firmware.h (contents, props changed)
Modified:
head/sys/arm/broadcom/bcm2835/bcm2835_mbox_prop.h
head/sys/arm/broadcom/bcm2835/files.bcm283x
head/sys/conf/files.arm64
Added: head/sys/arm/broadcom/bcm2835/bcm2835_firmware.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/arm/broadcom/bcm2835/bcm2835_firmware.cThu Jul 9 16:28:13
2020(r363047)
@@ -0,0 +1,181 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Andrew Turner
+ *
+ * This work was supported by Innovate UK project 105694, "Digital Security
+ * by Design (DSbD) Technology Platform Prototype".
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+struct bcm2835_firmware_softc {
+ device_tsc_dev;
+ phandle_t sc_mbox;
+};
+
+static struct ofw_compat_data compat_data[] = {
+ {"raspberrypi,bcm2835-firmware",1},
+ {NULL, 0}
+};
+
+static int sysctl_bcm2835_firmware_get_revision(SYSCTL_HANDLER_ARGS);
+
+static int
+bcm2835_firmware_probe(device_t dev)
+{
+ if (!ofw_bus_status_okay(dev))
+ return (ENXIO);
+
+ if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
+ return (ENXIO);
+
+ device_set_desc(dev, "BCM2835 Firmware");
+ return (BUS_PROBE_DEFAULT);
+}
+
+static int
+bcm2835_firmware_attach(device_t dev)
+{
+ struct bcm2835_firmware_softc *sc;
+ struct sysctl_ctx_list *ctx;
+ struct sysctl_oid *tree_node;
+ struct sysctl_oid_list *tree;
+ phandle_t node, mbox;
+ int rv;
+
+ sc = device_get_softc(dev);
+ sc->sc_dev = dev;
+
+ node = ofw_bus_get_node(dev);
+ rv = OF_getencprop(node, "mboxes", , sizeof(mbox));
+ if (rv <= 0) {
+ device_printf(dev, "can't read mboxes property\n");
+ return (ENXIO);
+ }
+ sc->sc_mbox = mbox;
+
+ OF_device_register_xref(OF_xref_from_node(node), dev);
+
+ ctx = device_get_sysctl_ctx(sc->sc_dev);
+ tree_node = device_get_sysctl_tree(sc->sc_dev);
+ tree = SYSCTL_CHILDREN(tree_node);
+ SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "revision",
+ CTLTYPE_UINT | CTLFLAG_RD, sc, sizeof(*sc),
+ sysctl_bcm2835_firmware_get_revision, "IU",
+ "Firmware revision");
+ return (0);
+}
+
+int
+bcm2835_firmware_property(device_t
svn commit: r362954 - in head/sys: arm/broadcom/bcm2835 conf dev/pci
Author: andrew
Date: Mon Jul 6 08:51:55 2020
New Revision: 362954
URL: https://svnweb.freebsd.org/changeset/base/362954
Log:
Add a driver for bcm2838 PCI express controller
This adds support for the Broadcom bcm2711 PCI express controller, found
on the Raspberry Pi 4 (aka the bcm2838 SoC). The driver has only been
developed against the soldered-on VIA XHCI controller and not tested
with other end points.
Submitted by: Robert Crowston
Differential Revision:https://reviews.freebsd.org/D25068
Added:
head/sys/arm/broadcom/bcm2835/bcm2838_pci.c (contents, props changed)
Modified:
head/sys/arm/broadcom/bcm2835/files.bcm283x
head/sys/conf/files.arm64
head/sys/dev/pci/pci_host_generic_fdt.c
head/sys/dev/pci/pci_host_generic_fdt.h
Added: head/sys/arm/broadcom/bcm2835/bcm2838_pci.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/arm/broadcom/bcm2835/bcm2838_pci.c Mon Jul 6 08:51:55 2020
(r362954)
@@ -0,0 +1,743 @@
+/*-
+ * SPDX-License-Identifier: ISC
+ *
+ * Copyright (c) 2020 Dr Robert Harvey Crowston
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ *
+ * $FreeBSD$
+ *
+ */
+
+/*
+ * BCM2838-compatible PCI-express controller.
+ *
+ * Broadcom likes to give the same chip lots of different names. The name of
+ * this driver is taken from the Raspberry Pi 4 Broadcom 2838 chip.
+ */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include "pcib_if.h"
+#include "msi_if.h"
+
+extern struct bus_space memmap_bus;
+
+#define BUS_SPACE_3G_MAXADDR 0xc000
+#define PCI_ID_VAL30x43c
+#define CLASS_SHIFT0x10
+#define SUBCLASS_SHIFT 0x8
+
+#define REG_CONTROLLER_HW_REV 0x406c
+#define REG_BRIDGE_CTRL0x9210
+#define BRIDGE_DISABLE_FLAG0x1
+#define BRIDGE_RESET_FLAG 0x2
+#define REG_BRIDGE_SERDES_MODE 0x4204
+#define REG_BRIDGE_CONFIG 0x4008
+#define REG_BRIDGE_MEM_WINDOW_LOW 0x4034
+#define REG_BRIDGE_MEM_WINDOW_HIGH 0x4038
+#define REG_BRIDGE_MEM_WINDOW_10x403c
+#define REG_BRIDGE_GISB_WINDOW 0x402c
+#define REG_BRIDGE_STATE 0x4068
+#define REG_BRIDGE_LINK_STATE 0x00bc
+#define REG_BRIDGE_BUS_WINDOW_LOW 0x400c
+#define REG_BRIDGE_BUS_WINDOW_HIGH 0x4010
+#define REG_BRIDGE_CPU_WINDOW_LOW 0x4070
+#define REG_BRIDGE_CPU_WINDOW_START_HIGH 0x4080
+#define REG_BRIDGE_CPU_WINDOW_END_HIGH 0x4084
+
+#define REG_MSI_ADDR_LOW 0x4044
+#define REG_MSI_ADDR_HIGH 0x4048
+#define REG_MSI_CONFIG 0x404c
+#define REG_MSI_CLR0x4508
+#define REG_MSI_MASK_CLR 0x4514
+#define REG_MSI_RAISED 0x4500
+#define REG_MSI_EOI0x4060
+#define NUM_MSI32
+
+#define REG_EP_CONFIG_CHOICE 0x9000
+#define REG_EP_CONFIG_DATA 0x8000
+
+/*
+ * These values were obtained from runtime inspection of a Linux system using a
+ * JTAG. The very limited documentation I have obtained from Broadcom does not
+ * explain how to compute them.
+ */
+#define REG_VALUE_4GB_WINDOW 0x11
+#define REG_VALUE_4GB_CONFIG 0x88003000
+#define REG_VALUE_MSI_CONFIG 0xffe06540
+
+struct bcm_pcib_irqsrc {
+ struct intr_irqsrc isrc;
+ u_int irq;
+ boolallocated;
+};
+
+struct bcm_pcib_softc {
+ struct generic_pcie_fdt_softc base;
+ device_tdev;
+ struct mtx config_mtx;
+ struct mtx msi_mtx;
+ struct resource *msi_irq_res;
+ void*msi_intr_cookie;
+ struct bcm_pcib_irqsrc *msi_isrcs;
+
svn commit: r362944 - in head/sys: amd64/amd64 arm64/arm64 kern sys
Author: andrew
Date: Sun Jul 5 14:38:22 2020
New Revision: 362944
URL: https://svnweb.freebsd.org/changeset/base/362944
Log:
Rerun kernel ifunc resolvers after all CPUs have started
On architectures that use RELA relocations it is safe to rerun the ifunc
resolvers on after all CPUs have started, but while they are sill parked.
On arm64 with big.LITTLE this is needed as some SoCs have shipped with
different ID register values the big and little clusters meaning we were
unable to rely on the register values from the boot CPU.
Add support for rerunning the resolvers on arm64 and amd64 as these are
both RELA using architectures.
Reviewed by: kib
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D25455
Modified:
head/sys/amd64/amd64/elf_machdep.c
head/sys/amd64/amd64/machdep.c
head/sys/arm64/arm64/elf_machdep.c
head/sys/arm64/arm64/machdep.c
head/sys/kern/link_elf.c
head/sys/sys/linker.h
Modified: head/sys/amd64/amd64/elf_machdep.c
==
--- head/sys/amd64/amd64/elf_machdep.c Sun Jul 5 13:15:13 2020
(r362943)
+++ head/sys/amd64/amd64/elf_machdep.c Sun Jul 5 14:38:22 2020
(r362944)
@@ -186,7 +186,7 @@ elf_is_ifunc_reloc(Elf_Size r_info)
/* Process one elf relocation with addend. */
static int
elf_reloc_internal(linker_file_t lf, Elf_Addr relocbase, const void *data,
-int type, elf_lookup_fn lookup)
+int type, bool late_ifunc, elf_lookup_fn lookup)
{
Elf64_Addr *where, val;
Elf32_Addr *where32, val32;
@@ -226,6 +226,13 @@ elf_reloc_internal(linker_file_t lf, Elf_Addr relocbas
panic("unknown reloc type %d\n", type);
}
+ if (late_ifunc) {
+ KASSERT(type == ELF_RELOC_RELA,
+ ("Only RELA ifunc relocations are supported"));
+ if (rtype != R_X86_64_IRELATIVE)
+ return (0);
+ }
+
switch (rtype) {
case R_X86_64_NONE: /* none */
break;
@@ -305,7 +312,7 @@ elf_reloc(linker_file_t lf, Elf_Addr relocbase, const
elf_lookup_fn lookup)
{
- return (elf_reloc_internal(lf, relocbase, data, type, lookup));
+ return (elf_reloc_internal(lf, relocbase, data, type, false, lookup));
}
int
@@ -313,7 +320,15 @@ elf_reloc_local(linker_file_t lf, Elf_Addr relocbase,
int type, elf_lookup_fn lookup)
{
- return (elf_reloc_internal(lf, relocbase, data, type, lookup));
+ return (elf_reloc_internal(lf, relocbase, data, type, false, lookup));
+}
+
+int
+elf_reloc_late(linker_file_t lf, Elf_Addr relocbase, const void *data,
+int type, elf_lookup_fn lookup)
+{
+
+ return (elf_reloc_internal(lf, relocbase, data, type, true, lookup));
}
int
Modified: head/sys/amd64/amd64/machdep.c
==
--- head/sys/amd64/amd64/machdep.c Sun Jul 5 13:15:13 2020
(r362943)
+++ head/sys/amd64/amd64/machdep.c Sun Jul 5 14:38:22 2020
(r362944)
@@ -320,6 +320,13 @@ cpu_startup(dummy)
cpu_setregs();
}
+static void
+late_ifunc_resolve(void *dummy __unused)
+{
+ link_elf_late_ireloc();
+}
+SYSINIT(late_ifunc_resolve, SI_SUB_CPU, SI_ORDER_ANY, late_ifunc_resolve,
NULL);
+
/*
* Send an interrupt to process.
*
Modified: head/sys/arm64/arm64/elf_machdep.c
==
--- head/sys/arm64/arm64/elf_machdep.c Sun Jul 5 13:15:13 2020
(r362943)
+++ head/sys/arm64/arm64/elf_machdep.c Sun Jul 5 14:38:22 2020
(r362944)
@@ -143,8 +143,10 @@ reloc_instr_imm(Elf32_Addr *where, Elf_Addr val, u_int
*/
static int
elf_reloc_internal(linker_file_t lf, Elf_Addr relocbase, const void *data,
-int type, int local, elf_lookup_fn lookup)
+int type, int flags, elf_lookup_fn lookup)
{
+#defineARM64_ELF_RELOC_LOCAL (1 << 0)
+#defineARM64_ELF_RELOC_LATE_IFUNC (1 << 1)
Elf_Addr *where, addr, addend, val;
Elf_Word rtype, symidx;
const Elf_Rel *rel;
@@ -170,7 +172,14 @@ elf_reloc_internal(linker_file_t lf, Elf_Addr relocbas
panic("unknown reloc type %d\n", type);
}
- if (local) {
+ if ((flags & ARM64_ELF_RELOC_LATE_IFUNC) != 0) {
+ KASSERT(type == ELF_RELOC_RELA,
+ ("Only RELA ifunc relocations are supported"));
+ if (rtype != R_AARCH64_IRELATIVE)
+ return (0);
+ }
+
+ if ((flags & ARM64_ELF_RELOC_LOCAL) != 0) {
if (rtype == R_AARCH64_RELATIVE)
*where = elf_relocaddr(lf, relocbase + addend);
return (0);
@@ -229,7 +238,8 @@ elf_reloc_local(linker_file_t lf, Elf_Addr relocbase,
int type, elf_lookup_fn lookup)
{
- return
svn commit: r362845 - in head/sys/arm64: arm64 include
Author: andrew
Date: Wed Jul 1 16:57:57 2020
New Revision: 362845
URL: https://svnweb.freebsd.org/changeset/base/362845
Log:
Read the CPU 0 arm64 ID registers early in initarm
We also update the kernel view early in the boot. This will allow the
use of the common kernel view in ifunc resolvers.
Sponsored by: Innovate UK
Modified:
head/sys/arm64/arm64/identcpu.c
head/sys/arm64/arm64/machdep.c
head/sys/arm64/arm64/mp_machdep.c
head/sys/arm64/include/cpu.h
Modified: head/sys/arm64/arm64/identcpu.c
==
--- head/sys/arm64/arm64/identcpu.c Wed Jul 1 16:37:08 2020
(r362844)
+++ head/sys/arm64/arm64/identcpu.c Wed Jul 1 16:57:57 2020
(r362845)
@@ -992,7 +992,7 @@ update_lower_register(uint64_t val, uint64_t new_val,
return (val);
}
-static void
+void
update_special_regs(u_int cpu)
{
struct mrs_field *fields;
@@ -1072,7 +1072,8 @@ identify_cpu_sysinit(void *dummy __unused)
elf_hwcap = hwcap;
else
elf_hwcap &= hwcap;
- update_special_regs(cpu);
+ if (cpu != 0)
+ update_special_regs(cpu);
if (CTR_DIC_VAL(cpu_desc[cpu].ctr) == 0)
dic = false;
@@ -1457,23 +1458,15 @@ identify_cache(uint64_t ctr)
}
void
-identify_cpu(void)
+identify_cpu(u_int cpu)
{
u_int midr;
u_int impl_id;
u_int part_id;
- u_int cpu;
size_t i;
const struct cpu_parts *cpu_partsp = NULL;
- cpu = PCPU_GET(cpuid);
midr = get_midr();
-
- /*
-* Store midr to pcpu to allow fast reading
-* from EL0, EL1 and assembly code.
-*/
- PCPU_SET(midr, midr);
impl_id = CPU_IMPL(midr);
for (i = 0; i < nitems(cpu_implementers); i++) {
Modified: head/sys/arm64/arm64/machdep.c
==
--- head/sys/arm64/arm64/machdep.c Wed Jul 1 16:37:08 2020
(r362844)
+++ head/sys/arm64/arm64/machdep.c Wed Jul 1 16:57:57 2020
(r362845)
@@ -172,7 +172,6 @@ cpu_startup(void *dummy)
{
undef_init();
- identify_cpu();
install_cpu_errata();
vm_ksubmap_init();
@@ -1138,6 +1137,9 @@ initarm(struct arm64_bootparams *abp)
if (kmdp == NULL)
kmdp = preload_search_by_type("elf64 kernel");
+ identify_cpu(0);
+ update_special_regs(0);
+
link_elf_ireloc(kmdp);
try_load_dtb(kmdp);
@@ -1181,6 +1183,7 @@ initarm(struct arm64_bootparams *abp)
"msr tpidr_el1, %0" :: "r"(pcpup));
PCPU_SET(curthread, );
+ PCPU_SET(midr, get_midr());
/* Do basic tuning, hz etc */
init_param1();
Modified: head/sys/arm64/arm64/mp_machdep.c
==
--- head/sys/arm64/arm64/mp_machdep.c Wed Jul 1 16:37:08 2020
(r362844)
+++ head/sys/arm64/arm64/mp_machdep.c Wed Jul 1 16:57:57 2020
(r362845)
@@ -220,7 +220,7 @@ init_secondary(uint64_t cpu)
* We need this before signalling the CPU is ready to
* let the boot CPU use the results.
*/
- identify_cpu();
+ identify_cpu(cpu);
/* Ensure the stores in identify_cpu have completed */
atomic_thread_fence_acq_rel();
@@ -229,6 +229,8 @@ init_secondary(uint64_t cpu)
atomic_add_int(_started, 1);
while (!atomic_load_int(_ready))
__asm __volatile("wfe");
+
+ pcpup->pc_midr = get_midr();
/* Initialize curthread */
KASSERT(PCPU_GET(idlethread) != NULL, ("no idle thread"));
Modified: head/sys/arm64/include/cpu.h
==
--- head/sys/arm64/include/cpu.hWed Jul 1 16:37:08 2020
(r362844)
+++ head/sys/arm64/include/cpu.hWed Jul 1 16:57:57 2020
(r362845)
@@ -167,11 +167,12 @@ void cpu_halt(void) __dead2;
void cpu_reset(void) __dead2;
void fork_trampoline(void);
void identify_cache(uint64_t);
-void identify_cpu(void);
+void identify_cpu(u_int);
void install_cpu_errata(void);
void swi_vm(void *v);
/* Functions to read the sanitised view of the special registers */
+void update_special_regs(u_int);
bool extract_user_id_field(u_int, u_int, uint8_t *);
bool get_kernel_reg(u_int, uint64_t *);
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svn commit: r362841 - head/sys/arm64/include
Author: andrew Date: Wed Jul 1 16:17:51 2020 New Revision: 362841 URL: https://svnweb.freebsd.org/changeset/base/362841 Log: Move ID reading signatures to a better header The functions to read the common user and kernel ID registers should be in cpu.h rather than undefined.h as they are related to CPU details and used by undefined instruction handlers. Sponsored by: Innovate UK Modified: head/sys/arm64/include/cpu.h head/sys/arm64/include/undefined.h Modified: head/sys/arm64/include/cpu.h == --- head/sys/arm64/include/cpu.hWed Jul 1 15:42:48 2020 (r362840) +++ head/sys/arm64/include/cpu.hWed Jul 1 16:17:51 2020 (r362841) @@ -171,6 +171,10 @@ void identify_cpu(void); void install_cpu_errata(void); void swi_vm(void *v); +/* Functions to read the sanitised view of the special registers */ +bool extract_user_id_field(u_int, u_int, uint8_t *); +bool get_kernel_reg(u_int, uint64_t *); + #defineCPU_AFFINITY(cpu) __cpu_affinity[(cpu)] #defineCPU_CURRENT_SOCKET \ (CPU_AFF2(CPU_AFFINITY(PCPU_GET(cpuid Modified: head/sys/arm64/include/undefined.h == --- head/sys/arm64/include/undefined.h Wed Jul 1 15:42:48 2020 (r362840) +++ head/sys/arm64/include/undefined.h Wed Jul 1 16:17:51 2020 (r362841) @@ -63,10 +63,6 @@ void *install_undef_handler(bool, undef_handler_t); void remove_undef_handler(void *); int undef_insn(u_int, struct trapframe *); -/* Functions to read the sanitised view of the special registers */ -bool extract_user_id_field(u_int, u_int, uint8_t *); -bool get_kernel_reg(u_int, uint64_t *); - #endif /* _KERNEL */ #endif ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r362837 - head/sys/arm64/arm64
Author: andrew
Date: Wed Jul 1 15:17:45 2020
New Revision: 362837
URL: https://svnweb.freebsd.org/changeset/base/362837
Log:
Read the arm64 ID registers earlier in the boot process.
Also move parsing the registers to just after the secondary CPUs have
started. This means the kernel register view from all CPUs is available
after the CPU SYSINITs have finished, e.g. for use by ifunc resolvers.
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D25505
Modified:
head/sys/arm64/arm64/identcpu.c
head/sys/arm64/arm64/mp_machdep.c
Modified: head/sys/arm64/arm64/identcpu.c
==
--- head/sys/arm64/arm64/identcpu.c Wed Jul 1 15:02:56 2020
(r362836)
+++ head/sys/arm64/arm64/identcpu.c Wed Jul 1 15:17:45 2020
(r362837)
@@ -46,7 +46,6 @@ __FBSDID("$FreeBSD$");
#include
#include
-static int ident_lock;
static void print_cpu_features(u_int cpu);
static u_long parse_cpu_features_hwcap(u_int cpu);
@@ -67,6 +66,8 @@ static int allow_idc = 1;
SYSCTL_INT(_machdep_cache, OID_AUTO, allow_idc, CTLFLAG_RDTUN, _idc, 0,
"Allow optimizations based on the IDC cache bit");
+static void check_cpu_regs(u_int cpu);
+
/*
* The default implementation of I-cache sync assumes we have an
* aliasing cache until we know otherwise.
@@ -1063,8 +1064,9 @@ identify_cpu_sysinit(void *dummy __unused)
dic = (allow_dic != 0);
idc = (allow_idc != 0);
+
CPU_FOREACH(cpu) {
- print_cpu_features(cpu);
+ check_cpu_regs(cpu);
hwcap = parse_cpu_features_hwcap(cpu);
if (elf_hwcap == 0)
elf_hwcap = hwcap;
@@ -1096,8 +1098,18 @@ identify_cpu_sysinit(void *dummy __unused)
install_undef_handler(true, user_mrs_handler);
}
-SYSINIT(identify_cpu, SI_SUB_SMP, SI_ORDER_ANY, identify_cpu_sysinit, NULL);
+SYSINIT(identify_cpu, SI_SUB_CPU, SI_ORDER_ANY, identify_cpu_sysinit, NULL);
+static void
+cpu_features_sysinit(void *dummy __unused)
+{
+ u_int cpu;
+
+ CPU_FOREACH(cpu)
+ print_cpu_features(cpu);
+}
+SYSINIT(cpu_features, SI_SUB_SMP, SI_ORDER_ANY, cpu_features_sysinit, NULL);
+
static u_long
parse_cpu_features_hwcap(u_int cpu)
{
@@ -1468,7 +1480,8 @@ identify_cpu(void)
if (impl_id == cpu_implementers[i].impl_id ||
cpu_implementers[i].impl_id == 0) {
cpu_desc[cpu].cpu_impl = impl_id;
- cpu_desc[cpu].cpu_impl_name =
cpu_implementers[i].impl_name;
+ cpu_desc[cpu].cpu_impl_name =
+ cpu_implementers[i].impl_name;
cpu_partsp = cpu_implementers[i].cpu_parts;
break;
}
@@ -1505,77 +1518,68 @@ identify_cpu(void)
cpu_desc[cpu].id_aa64mmfr2 = READ_SPECIALREG(id_aa64mmfr2_el1);
cpu_desc[cpu].id_aa64pfr0 = READ_SPECIALREG(id_aa64pfr0_el1);
cpu_desc[cpu].id_aa64pfr1 = READ_SPECIALREG(id_aa64pfr1_el1);
+}
- if (cpu != 0) {
- /*
-* This code must run on one cpu at a time, but we are
-* not scheduling on the current core so implement a
-* simple spinlock.
-*/
- while (atomic_cmpset_acq_int(_lock, 0, 1) == 0)
- __asm __volatile("wfe" ::: "memory");
+static void
+check_cpu_regs(u_int cpu)
+{
- switch (cpu_aff_levels) {
- case 0:
- if (CPU_AFF0(cpu_desc[cpu].mpidr) !=
- CPU_AFF0(cpu_desc[0].mpidr))
- cpu_aff_levels = 1;
- /* FALLTHROUGH */
- case 1:
- if (CPU_AFF1(cpu_desc[cpu].mpidr) !=
- CPU_AFF1(cpu_desc[0].mpidr))
- cpu_aff_levels = 2;
- /* FALLTHROUGH */
- case 2:
- if (CPU_AFF2(cpu_desc[cpu].mpidr) !=
- CPU_AFF2(cpu_desc[0].mpidr))
- cpu_aff_levels = 3;
- /* FALLTHROUGH */
- case 3:
- if (CPU_AFF3(cpu_desc[cpu].mpidr) !=
- CPU_AFF3(cpu_desc[0].mpidr))
- cpu_aff_levels = 4;
- break;
- }
+ switch (cpu_aff_levels) {
+ case 0:
+ if (CPU_AFF0(cpu_desc[cpu].mpidr) !=
+ CPU_AFF0(cpu_desc[0].mpidr))
+ cpu_aff_levels = 1;
+ /* FALLTHROUGH */
+ case 1:
+ if (CPU_AFF1(cpu_desc[cpu].mpidr) !=
+ CPU_AFF1(cpu_desc[0].mpidr))
+ cpu_aff_levels = 2;
+ /* FALLTHROUGH */
+ case 2:
+ if
svn commit: r362834 - head/sys/kern
Author: andrew
Date: Wed Jul 1 12:07:28 2020
New Revision: 362834
URL: https://svnweb.freebsd.org/changeset/base/362834
Log:
Simplify the flow when getting/setting an isrc
Rather than unlocking and returning we can just perform the needed action
only when the interrupt source is valid and reuse the unlock in both the
valid irq and invalid irq cases.
Sponsored by: Innovate UK
Modified:
head/sys/kern/subr_intr.c
Modified: head/sys/kern/subr_intr.c
==
--- head/sys/kern/subr_intr.c Wed Jul 1 10:37:08 2020(r362833)
+++ head/sys/kern/subr_intr.c Wed Jul 1 12:07:28 2020(r362834)
@@ -1517,13 +1517,12 @@ intr_map_get_isrc(u_int res_id)
{
struct intr_irqsrc *isrc;
+ isrc = NULL;
mtx_lock(_map_lock);
- if ((res_id >= irq_map_count) || (irq_map[res_id] == NULL)) {
- mtx_unlock(_map_lock);
- return (NULL);
- }
- isrc = irq_map[res_id]->isrc;
+ if (res_id < irq_map_count && irq_map[res_id] != NULL)
+ isrc = irq_map[res_id]->isrc;
mtx_unlock(_map_lock);
+
return (isrc);
}
@@ -1532,11 +1531,8 @@ intr_map_set_isrc(u_int res_id, struct intr_irqsrc *is
{
mtx_lock(_map_lock);
- if ((res_id >= irq_map_count) || (irq_map[res_id] == NULL)) {
- mtx_unlock(_map_lock);
- return;
- }
- irq_map[res_id]->isrc = isrc;
+ if (res_id < irq_map_count && irq_map[res_id] != NULL)
+ irq_map[res_id]->isrc = isrc;
mtx_unlock(_map_lock);
}
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svn commit: r362803 - in head/sys: conf dev/usb/controller mips/mediatek
Author: andrew
Date: Tue Jun 30 15:58:29 2020
New Revision: 362803
URL: https://svnweb.freebsd.org/changeset/base/362803
Log:
Add dwc_otg_acpi
Create an acpi attachment for the DWC USB OTG device. This is present in
the Raspberry Pi 4 in the USB-C port normally used to power the board. Some
firmware presents the kernel with ACPI tables rather than FDT so we need
an ACPI attachment.
Submitted by: Greg V
Approved by: hselasky (removal of All rights reserved)
Differential Revision:https://reviews.freebsd.org/D25203
Added:
head/sys/dev/usb/controller/dwc_otg_acpi.c (contents, props changed)
Modified:
head/sys/conf/files
head/sys/dev/usb/controller/dwc_otg.c
head/sys/dev/usb/controller/dwc_otg_fdt.c
head/sys/mips/mediatek/mtk_dotg.c
Modified: head/sys/conf/files
==
--- head/sys/conf/files Tue Jun 30 15:57:11 2020(r362802)
+++ head/sys/conf/files Tue Jun 30 15:58:29 2020(r362803)
@@ -3189,6 +3189,7 @@ dev/uart/uart_tty.c optional uart
dev/usb/controller/musb_otg.c optional musb
dev/usb/controller/dwc_otg.c optional dwcotg
dev/usb/controller/dwc_otg_fdt.c optional dwcotg fdt
+dev/usb/controller/dwc_otg_acpi.c optional dwcotg acpi
dev/usb/controller/ehci.c optional ehci
dev/usb/controller/ehci_msm.c optional ehci_msm fdt
dev/usb/controller/ehci_pci.c optional ehci pci
Modified: head/sys/dev/usb/controller/dwc_otg.c
==
--- head/sys/dev/usb/controller/dwc_otg.c Tue Jun 30 15:57:11 2020
(r362802)
+++ head/sys/dev/usb/controller/dwc_otg.c Tue Jun 30 15:58:29 2020
(r362803)
@@ -66,6 +66,7 @@
#include
#include
#include
+#include
#include
#include
@@ -3873,12 +3874,40 @@ int
dwc_otg_init(struct dwc_otg_softc *sc)
{
uint32_t temp;
+ int err;
DPRINTF("start\n");
+ sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
+ sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
+ sc->sc_io_size = rman_get_size(sc->sc_io_res);
+
/* set up the bus structure */
+ sc->sc_bus.devices = sc->sc_devices;
+ sc->sc_bus.devices_max = DWC_OTG_MAX_DEVICES;
+ sc->sc_bus.dma_bits = 32;
sc->sc_bus.usbrev = USB_REV_2_0;
sc->sc_bus.methods = _otg_bus_methods;
+
+ /* get all DMA memory */
+ if (usb_bus_mem_alloc_all(>sc_bus,
+ USB_GET_DMA_TAG(sc->sc_bus.parent), NULL)) {
+ return (ENOMEM);
+ }
+
+ sc->sc_bus.bdev = device_add_child(sc->sc_bus.parent, "usbus", -1);
+ if (sc->sc_bus.bdev == NULL)
+ return (ENXIO);
+
+ device_set_ivars(sc->sc_bus.bdev, >sc_bus);
+
+ err = bus_setup_intr(sc->sc_bus.parent, sc->sc_irq_res,
+ INTR_TYPE_TTY | INTR_MPSAFE, _otg_filter_interrupt,
+ _otg_interrupt, sc, >sc_intr_hdl);
+ if (err) {
+ sc->sc_intr_hdl = NULL;
+ return (ENXIO);
+ }
usb_callout_init_mtx(>sc_timer,
>sc_bus.bus_mtx, 0);
Added: head/sys/dev/usb/controller/dwc_otg_acpi.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/usb/controller/dwc_otg_acpi.c Tue Jun 30 15:58:29 2020
(r362803)
@@ -0,0 +1,184 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2012 Hans Petter Selasky.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include "opt_acpi.h"
+
svn commit: r362778 - head/sys/arm64/arm64
Author: andrew Date: Mon Jun 29 09:37:07 2020 New Revision: 362778 URL: https://svnweb.freebsd.org/changeset/base/362778 Log: Fix the spelling of identify in the arm64 identcpu code Sponsored by: Innovate UK Modified: head/sys/arm64/arm64/identcpu.c Modified: head/sys/arm64/arm64/identcpu.c == --- head/sys/arm64/arm64/identcpu.c Mon Jun 29 09:08:36 2020 (r362777) +++ head/sys/arm64/arm64/identcpu.c Mon Jun 29 09:37:07 2020 (r362778) @@ -1096,7 +1096,7 @@ identify_cpu_sysinit(void *dummy __unused) install_undef_handler(true, user_mrs_handler); } -SYSINIT(idenrity_cpu, SI_SUB_SMP, SI_ORDER_ANY, identify_cpu_sysinit, NULL); +SYSINIT(identify_cpu, SI_SUB_SMP, SI_ORDER_ANY, identify_cpu_sysinit, NULL); static u_long parse_cpu_features_hwcap(u_int cpu) ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r362777 - in head/sys/arm64: arm64 include
Author: andrew
Date: Mon Jun 29 09:08:36 2020
New Revision: 362777
URL: https://svnweb.freebsd.org/changeset/base/362777
Log:
Create a kernel arm64 ID register view
In preparation for using ifuncs in the kernel is is useful to have a common
view of the arm64 ID registers across all CPUs. Add this and extract the
logic for finding the lower value of two fields to a new helper function.
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D25463
Modified:
head/sys/arm64/arm64/identcpu.c
head/sys/arm64/include/undefined.h
Modified: head/sys/arm64/arm64/identcpu.c
==
--- head/sys/arm64/arm64/identcpu.c Mon Jun 29 08:14:45 2020
(r362776)
+++ head/sys/arm64/arm64/identcpu.c Mon Jun 29 09:08:36 2020
(r362777)
@@ -134,6 +134,7 @@ struct cpu_desc {
};
static struct cpu_desc cpu_desc[MAXCPU];
+static struct cpu_desc kern_cpu_desc;
static struct cpu_desc user_cpu_desc;
static u_int cpu_print_regs;
#definePRINT_ID_AA64_AFR0 0x0001
@@ -936,46 +937,109 @@ extract_user_id_field(u_int reg, u_int field_shift, ui
return (false);
}
+bool
+get_kernel_reg(u_int reg, uint64_t *val)
+{
+ int i;
+
+ for (i = 0; i < nitems(user_regs); i++) {
+ if (user_regs[i].reg == reg) {
+ *val = CPU_DESC_FIELD(kern_cpu_desc, i);
+ return (true);
+ }
+ }
+
+ return (false);
+}
+
+static uint64_t
+update_lower_register(uint64_t val, uint64_t new_val, u_int shift,
+int width, bool sign)
+{
+ uint64_t mask;
+ uint64_t new_field, old_field;
+ bool update;
+
+ KASSERT(width > 0 && width < 64, ("%s: Invalid width %d", __func__,
+ width));
+
+ mask = (1ul << width) - 1;
+ new_field = (new_val >> shift) & mask;
+ old_field = (val >> shift) & mask;
+
+ update = false;
+ if (sign) {
+ /*
+* The field is signed. Toggle the upper bit so the comparison
+* works on unsigned values as this makes positive numbers,
+* i.e. those with a 0 bit, larger than negative numbers,
+* i.e. those with a 1 bit, in an unsigned comparison.
+*/
+ if ((new_field ^ (1ul << (width - 1))) <
+ (old_field ^ (1ul << (width - 1
+ update = true;
+ } else {
+ if (new_field < old_field)
+ update = true;
+ }
+
+ if (update) {
+ val &= ~(mask << shift);
+ val |= new_field << shift;
+ }
+
+ return (val);
+}
+
static void
-update_user_regs(u_int cpu)
+update_special_regs(u_int cpu)
{
struct mrs_field *fields;
- uint64_t cur, value;
- int i, j, cur_field, new_field;
+ uint64_t user_reg, kern_reg, value;
+ int i, j;
+ if (cpu == 0) {
+ /* Create a user visible cpu description with safe values */
+ memset(_cpu_desc, 0, sizeof(user_cpu_desc));
+ /* Safe values for these registers */
+ user_cpu_desc.id_aa64pfr0 = ID_AA64PFR0_AdvSIMD_NONE |
+ ID_AA64PFR0_FP_NONE | ID_AA64PFR0_EL1_64 |
+ ID_AA64PFR0_EL0_64;
+ user_cpu_desc.id_aa64dfr0 = ID_AA64DFR0_DebugVer_8;
+ }
+
for (i = 0; i < nitems(user_regs); i++) {
value = CPU_DESC_FIELD(cpu_desc[cpu], i);
- if (cpu == 0)
- cur = value;
- else
- cur = CPU_DESC_FIELD(user_cpu_desc, i);
+ if (cpu == 0) {
+ kern_reg = value;
+ user_reg = value;
+ } else {
+ kern_reg = CPU_DESC_FIELD(kern_cpu_desc, i);
+ user_reg = CPU_DESC_FIELD(user_cpu_desc, i);
+ }
fields = user_regs[i].fields;
for (j = 0; fields[j].type != 0; j++) {
switch (fields[j].type & MRS_TYPE_MASK) {
case MRS_EXACT:
- cur &= ~(0xfu << fields[j].shift);
- cur |=
+ user_reg &= ~(0xfu << fields[j].shift);
+ user_reg |=
(uint64_t)MRS_EXACT_FIELD(fields[j].type) <<
fields[j].shift;
break;
case MRS_LOWER:
- new_field = (value >> fields[j].shift) & 0xf;
- cur_field = (cur >> fields[j].shift) & 0xf;
- if ((fields[j].sign &&
-(int)new_field < (int)cur_field) ||
-
svn commit: r362726 - in head/sys/arm64: arm64 include
Author: andrew
Date: Sun Jun 28 15:03:07 2020
New Revision: 362726
URL: https://svnweb.freebsd.org/changeset/base/362726
Log:
Use EFI memory map to determine attributes for Acpi mappings on arm64.
AcpiOsMapMemory is used for device memory when e.g. an _INI method wants
to access physical memory, however, aarch64 pmap_mapbios is hardcoded to
writeback. Search for the correct memory type to use in pmap_mapbios.
Submitted by: Greg V
Differential Revision:https://reviews.freebsd.org/D25201
Modified:
head/sys/arm64/arm64/machdep.c
head/sys/arm64/arm64/pmap.c
head/sys/arm64/include/machdep.h
Modified: head/sys/arm64/arm64/machdep.c
==
--- head/sys/arm64/arm64/machdep.c Sun Jun 28 14:40:48 2020
(r362725)
+++ head/sys/arm64/arm64/machdep.c Sun Jun 28 15:03:07 2020
(r362726)
@@ -120,6 +120,7 @@ int has_pan;
* passed into the kernel and used by the EFI code to call runtime services.
*/
vm_paddr_t efi_systbl_phys;
+static struct efi_map_header *efihdr;
/* pagezero_* implementations are provided in support.S */
void pagezero_simple(void *);
@@ -1071,11 +1072,52 @@ cache_setup(void)
}
}
+int
+memory_mapping_mode(vm_paddr_t pa)
+{
+ struct efi_md *map, *p;
+ size_t efisz;
+ int ndesc, i;
+
+ if (efihdr == NULL)
+ return (VM_MEMATTR_WRITE_BACK);
+
+ /*
+* Memory map data provided by UEFI via the GetMemoryMap
+* Boot Services API.
+*/
+ efisz = (sizeof(struct efi_map_header) + 0xf) & ~0xf;
+ map = (struct efi_md *)((uint8_t *)efihdr + efisz);
+
+ if (efihdr->descriptor_size == 0)
+ return (VM_MEMATTR_WRITE_BACK);
+ ndesc = efihdr->memory_size / efihdr->descriptor_size;
+
+ for (i = 0, p = map; i < ndesc; i++,
+ p = efi_next_descriptor(p, efihdr->descriptor_size)) {
+ if (pa < p->md_phys ||
+ pa >= p->md_phys + p->md_pages * EFI_PAGE_SIZE)
+ continue;
+ if (p->md_type == EFI_MD_TYPE_IOMEM ||
+ p->md_type == EFI_MD_TYPE_IOPORT)
+ return (VM_MEMATTR_DEVICE);
+ else if ((p->md_attr & EFI_MD_ATTR_WB) != 0 ||
+ p->md_type == EFI_MD_TYPE_RECLAIM)
+ return (VM_MEMATTR_WRITE_BACK);
+ else if ((p->md_attr & EFI_MD_ATTR_WT) != 0)
+ return (VM_MEMATTR_WRITE_THROUGH);
+ else if ((p->md_attr & EFI_MD_ATTR_WC) != 0)
+ return (VM_MEMATTR_WRITE_COMBINING);
+ break;
+ }
+
+ return (VM_MEMATTR_DEVICE);
+}
+
void
initarm(struct arm64_bootparams *abp)
{
struct efi_fb *efifb;
- struct efi_map_header *efihdr;
struct pcpu *pcpup;
char *env;
#ifdef FDT
Modified: head/sys/arm64/arm64/pmap.c
==
--- head/sys/arm64/arm64/pmap.c Sun Jun 28 14:40:48 2020(r362725)
+++ head/sys/arm64/arm64/pmap.c Sun Jun 28 15:03:07 2020(r362726)
@@ -5449,7 +5449,7 @@ pmap_mapbios(vm_paddr_t pa, vm_size_t size)
/* L3 table is linked */
va = trunc_page(va);
pa = trunc_page(pa);
- pmap_kenter(va, size, pa, VM_MEMATTR_WRITE_BACK);
+ pmap_kenter(va, size, pa, memory_mapping_mode(pa));
}
return ((void *)(va + offset));
Modified: head/sys/arm64/include/machdep.h
==
--- head/sys/arm64/include/machdep.hSun Jun 28 14:40:48 2020
(r362725)
+++ head/sys/arm64/include/machdep.hSun Jun 28 15:03:07 2020
(r362726)
@@ -56,6 +56,7 @@ vm_offset_t parse_boot_param(struct arm64_bootparams *
#ifdef FDT
void parse_fdt_bootargs(void);
#endif
+int memory_mapping_mode(vm_paddr_t pa);
extern void (*pagezero)(void *);
#endif /* _KERNEL */
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svn commit: r362493 - head/sys/dev/pci
Author: andrew
Date: Mon Jun 22 10:49:50 2020
New Revision: 362493
URL: https://svnweb.freebsd.org/changeset/base/362493
Log:
Translaate the PCI address when activating a resource
When the PCI address != physical address we need to translate from the
former to the latter before passing to the parent to map into the kernels
virtual address space.
Sponsored by: Innovate UK
Modified:
head/sys/dev/pci/pci_host_generic.c
Modified: head/sys/dev/pci/pci_host_generic.c
==
--- head/sys/dev/pci/pci_host_generic.c Mon Jun 22 10:32:41 2020
(r362492)
+++ head/sys/dev/pci/pci_host_generic.c Mon Jun 22 10:49:50 2020
(r362493)
@@ -324,13 +324,11 @@ pci_host_generic_core_release_resource(device_t dev, d
return (bus_generic_release_resource(dev, child, type, rid, res));
}
-struct resource *
-pci_host_generic_core_alloc_resource(device_t dev, device_t child, int type,
-int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
+static bool
+generic_pcie_translate_resource(device_t dev, int type, rman_res_t start,
+rman_res_t end, rman_res_t *new_start, rman_res_t *new_end)
{
struct generic_pcie_core_softc *sc;
- struct resource *res;
- struct rman *rm;
uint64_t phys_base;
uint64_t pci_base;
uint64_t size;
@@ -338,19 +336,6 @@ pci_host_generic_core_alloc_resource(device_t dev, dev
bool found;
sc = device_get_softc(dev);
-
-#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
- if (type == PCI_RES_BUS) {
- return (pci_domain_alloc_bus(sc->ecam, child, rid, start, end,
- count, flags));
- }
-#endif
-
- rm = generic_pcie_rman(sc, type, flags);
- if (rm == NULL)
- return (BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
- type, rid, start, end, count, flags));
-
/* Translate the address from a PCI address to a physical address */
switch (type) {
case SYS_RES_IOPORT:
@@ -378,25 +363,57 @@ pci_host_generic_core_alloc_resource(device_t dev, dev
}
if (type == space) {
- start = start - pci_base + phys_base;
- end = end - pci_base + phys_base;
+ *new_start = start - pci_base + phys_base;
+ *new_end = end - pci_base + phys_base;
found = true;
break;
}
}
- if (!found) {
- device_printf(dev,
- "Failed to allocate %s resource %jx-%jx for %s\n",
- type == SYS_RES_IOPORT ? "IOPORT" : "MEMORY",
- (uintmax_t)start, (uintmax_t)end,
- device_get_nameunit(child));
- return (NULL);
- }
break;
default:
+ /* No translation for non-memory types */
+ *new_start = start;
+ *new_end = end;
+ found = true;
break;
}
+ return (found);
+}
+
+struct resource *
+pci_host_generic_core_alloc_resource(device_t dev, device_t child, int type,
+int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
+{
+ struct generic_pcie_core_softc *sc;
+ struct resource *res;
+ struct rman *rm;
+ rman_res_t phys_start, phys_end;
+
+ sc = device_get_softc(dev);
+
+#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
+ if (type == PCI_RES_BUS) {
+ return (pci_domain_alloc_bus(sc->ecam, child, rid, start, end,
+ count, flags));
+ }
+#endif
+
+ rm = generic_pcie_rman(sc, type, flags);
+ if (rm == NULL)
+ return (BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
+ type, rid, start, end, count, flags));
+
+ /* Translate the address from a PCI address to a physical address */
+ if (!generic_pcie_translate_resource(dev, type, start, end, _start,
+ _end)) {
+ device_printf(dev,
+ "Failed to translate resource %jx-%jx type %x for %s\n",
+ (uintmax_t)start, (uintmax_t)end, type,
+ device_get_nameunit(child));
+ return (NULL);
+ }
+
if (bootverbose) {
device_printf(dev,
"rman_reserve_resource: start=%#jx, end=%#jx, count=%#jx\n",
@@ -430,12 +447,21 @@ generic_pcie_activate_resource(device_t dev, device_t
int rid, struct resource *r)
{
struct generic_pcie_core_softc *sc;
+ rman_res_t start, end;
int res;
sc = device_get_softc(dev);
if ((res = rman_activate_resource(r)) != 0)
svn commit: r362489 - head/sys/arm/broadcom/bcm2835
Author: andrew
Date: Mon Jun 22 08:12:21 2020
New Revision: 362489
URL: https://svnweb.freebsd.org/changeset/base/362489
Log:
Fix reboot command on the Raspberry Pi series.
The Raspbery Pi computers do not properly implement PSCI. The canonical
way to reset them is to set a watchdog timer and allow it to expire.
Submitted by: Robert Crowston
Differential Revision:https://reviews.freebsd.org/D25268
Modified:
head/sys/arm/broadcom/bcm2835/bcm2835_wdog.c
Modified: head/sys/arm/broadcom/bcm2835/bcm2835_wdog.c
==
--- head/sys/arm/broadcom/bcm2835/bcm2835_wdog.cMon Jun 22 07:46:24
2020(r362488)
+++ head/sys/arm/broadcom/bcm2835/bcm2835_wdog.cMon Jun 22 08:12:21
2020(r362489)
@@ -35,6 +35,7 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
#include
#include
#include
@@ -89,10 +90,12 @@ struct bcmwd_softc {
static struct ofw_compat_data compat_data[] = {
{"broadcom,bcm2835-wdt",BSD_DTB},
{"brcm,bcm2835-pm-wdt", UPSTREAM_DTB},
+ {"brcm,bcm2835-pm", UPSTREAM_DTB},
{NULL, 0}
};
static void bcmwd_watchdog_fn(void *private, u_int cmd, int *error);
+static void bcmwd_reboot_system(void *, int);
static int
bcmwd_probe(device_t dev)
@@ -143,6 +146,15 @@ bcmwd_attach(device_t dev)
mtx_init(>mtx, "BCM2835 Watchdog", "bcmwd", MTX_DEF);
EVENTHANDLER_REGISTER(watchdog_list, bcmwd_watchdog_fn, sc, 0);
+ /*
+* Handle reboot events. This needs to happen with slightly greater
+* priority than the PSCI handler, since PSCI reset is not properly
+* implemented on the Pi and it just puts the Pi into a halt
+* state.
+*/
+ EVENTHANDLER_REGISTER(shutdown_final, bcmwd_reboot_system, sc,
+ SHUTDOWN_PRI_LAST-1);
+
return (0);
}
@@ -161,16 +173,17 @@ bcmwd_watchdog_fn(void *private, u_int cmd, int *error
if (cmd > 0) {
sec = ((uint64_t)1 << (cmd & WD_INTERVAL)) / 10;
if (sec == 0 || sec > 15) {
- /*
+ /*
* Can't arm
* disable watchdog as watchdog(9) requires
*/
device_printf(sc->dev,
"Can't arm, timeout must be between 1-15
seconds\n");
- WRITE(sc, BCM2835_RSTC_REG,
+ WRITE(sc, BCM2835_RSTC_REG,
(BCM2835_PASSWORD << BCM2835_PASSWORD_SHIFT) |
BCM2835_RSTC_RESET);
mtx_unlock(>mtx);
+ *error = EINVAL;
return;
}
@@ -187,7 +200,7 @@ bcmwd_watchdog_fn(void *private, u_int cmd, int *error
*error = 0;
}
else
- WRITE(sc, BCM2835_RSTC_REG,
+ WRITE(sc, BCM2835_RSTC_REG,
(BCM2835_PASSWORD << BCM2835_PASSWORD_SHIFT) |
BCM2835_RSTC_RESET);
@@ -208,6 +221,27 @@ bcmwd_watchdog_reset(void)
(READ(bcmwd_lsc, BCM2835_RSTC_REG) & BCM2835_RSTC_WRCFG_CLR) |
(BCM2835_PASSWORD << BCM2835_PASSWORD_SHIFT) |
BCM2835_RSTC_WRCFG_FULL_RESET);
+}
+
+static void
+bcmwd_reboot_system(void *sc, int howto)
+{
+ int cmd, error = 0;
+
+ /* Only handle reset. */
+ if (howto & RB_HALT || howto & RB_POWEROFF)
+ return;
+
+ printf("Resetting system ... ");
+
+ cmd = WD_TO_1SEC;
+ bcmwd_watchdog_fn(sc, cmd, );
+
+ /* Wait for watchdog timeout. */
+ DELAY(200);
+
+ /* Not reached ... one hopes. */
+ printf("failed to reset (errno %d).\n", error);
}
static device_method_t bcmwd_methods[] = {
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svn commit: r362397 - head/sys/dev/pci
Author: andrew Date: Fri Jun 19 18:00:20 2020 New Revision: 362397 URL: https://svnweb.freebsd.org/changeset/base/362397 Log: Use the correct address when creating pci resources When the PCI and CPU physical addresses are identical it doesn't matter which is used to create the resources, however on some systems, e.g. qemu armv7 virt, they are different. This leads to a panic as we try to map the wrong physical address into the kernel address space. Reported by: Jenkins via trasz Sponsored by: Innovate UK Modified: head/sys/dev/pci/pci_host_generic.c Modified: head/sys/dev/pci/pci_host_generic.c == --- head/sys/dev/pci/pci_host_generic.c Fri Jun 19 17:59:55 2020 (r362396) +++ head/sys/dev/pci/pci_host_generic.c Fri Jun 19 18:00:20 2020 (r362397) @@ -143,15 +143,15 @@ pci_host_generic_core_attach(device_t dev) case FLAG_TYPE_PMEM: sc->has_pmem = true; error = rman_manage_region(>pmem_rman, - phys_base, phys_base + size - 1); + pci_base, pci_base + size - 1); break; case FLAG_TYPE_MEM: error = rman_manage_region(>mem_rman, - phys_base, phys_base + size - 1); + pci_base, pci_base + size - 1); break; case FLAG_TYPE_IO: error = rman_manage_region(>io_rman, - phys_base, phys_base + size - 1); + pci_base, pci_base + size - 1); break; default: continue; ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r362295 - head/sys/dev/pci
Author: andrew
Date: Thu Jun 18 06:21:00 2020
New Revision: 362295
URL: https://svnweb.freebsd.org/changeset/base/362295
Log:
Stop assuming we can print rman_res_t with %lx
This is not the case on armv6 and armv7, where we also build this driver.
Fix by casting through uintmax_t and using %jx.
Sponsored by: Innovate UK
Modified:
head/sys/dev/pci/pci_host_generic.c
Modified: head/sys/dev/pci/pci_host_generic.c
==
--- head/sys/dev/pci/pci_host_generic.c Thu Jun 18 06:12:06 2020
(r362294)
+++ head/sys/dev/pci/pci_host_generic.c Thu Jun 18 06:21:00 2020
(r362295)
@@ -386,9 +386,10 @@ pci_host_generic_core_alloc_resource(device_t dev, dev
}
if (!found) {
device_printf(dev,
- "Failed to allocate %s resource %lx-%lx for %s\n",
+ "Failed to allocate %s resource %jx-%jx for %s\n",
type == SYS_RES_IOPORT ? "IOPORT" : "MEMORY",
- start, end, device_get_nameunit(child));
+ (uintmax_t)start, (uintmax_t)end,
+ device_get_nameunit(child));
return (NULL);
}
break;
___
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svn commit: r362285 - head/sys/dev/pci
Author: andrew
Date: Wed Jun 17 19:56:17 2020
New Revision: 362285
URL: https://svnweb.freebsd.org/changeset/base/362285
Log:
Clean up the pci host generic driver
- Support Prefetchable Memory.
- Use the correct rman when allocating memory and ioports.
- Translate PCI addresses in bus_alloc_resource to allow physical
addresses that are different than pci addresses.
Reviewed by: Robert Crowston
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D25121
Modified:
head/sys/dev/pci/pci_host_generic.c
head/sys/dev/pci/pci_host_generic.h
head/sys/dev/pci/pci_host_generic_acpi.c
head/sys/dev/pci/pci_host_generic_fdt.c
Modified: head/sys/dev/pci/pci_host_generic.c
==
--- head/sys/dev/pci/pci_host_generic.c Wed Jun 17 19:45:05 2020
(r362284)
+++ head/sys/dev/pci/pci_host_generic.c Wed Jun 17 19:56:17 2020
(r362285)
@@ -70,8 +70,11 @@ int
pci_host_generic_core_attach(device_t dev)
{
struct generic_pcie_core_softc *sc;
+ uint64_t phys_base;
+ uint64_t pci_base;
+ uint64_t size;
int error;
- int rid;
+ int rid, tuple;
sc = device_get_softc(dev);
sc->dev = dev;
@@ -101,12 +104,23 @@ pci_host_generic_core_attach(device_t dev)
sc->bst = rman_get_bustag(sc->res);
sc->bsh = rman_get_bushandle(sc->res);
+ sc->has_pmem = false;
+ sc->pmem_rman.rm_type = RMAN_ARRAY;
+ sc->pmem_rman.rm_descr = "PCIe Prefetch Memory";
+
sc->mem_rman.rm_type = RMAN_ARRAY;
sc->mem_rman.rm_descr = "PCIe Memory";
+
sc->io_rman.rm_type = RMAN_ARRAY;
sc->io_rman.rm_descr = "PCIe IO window";
/* Initialize rman and allocate memory regions */
+ error = rman_init(>pmem_rman);
+ if (error) {
+ device_printf(dev, "rman_init() failed. error = %d\n", error);
+ return (error);
+ }
+
error = rman_init(>mem_rman);
if (error) {
device_printf(dev, "rman_init() failed. error = %d\n", error);
@@ -119,6 +133,39 @@ pci_host_generic_core_attach(device_t dev)
return (error);
}
+ for (tuple = 0; tuple < MAX_RANGES_TUPLES; tuple++) {
+ phys_base = sc->ranges[tuple].phys_base;
+ pci_base = sc->ranges[tuple].pci_base;
+ size = sc->ranges[tuple].size;
+ if (phys_base == 0 || size == 0)
+ continue; /* empty range element */
+ switch (FLAG_TYPE(sc->ranges[tuple].flags)) {
+ case FLAG_TYPE_PMEM:
+ sc->has_pmem = true;
+ error = rman_manage_region(>pmem_rman,
+ phys_base, phys_base + size - 1);
+ break;
+ case FLAG_TYPE_MEM:
+ error = rman_manage_region(>mem_rman,
+ phys_base, phys_base + size - 1);
+ break;
+ case FLAG_TYPE_IO:
+ error = rman_manage_region(>io_rman,
+ phys_base, phys_base + size - 1);
+ break;
+ default:
+ continue;
+ }
+ if (error) {
+ device_printf(dev, "rman_manage_region() failed."
+ "error = %d\n", error);
+ rman_fini(>pmem_rman);
+ rman_fini(>mem_rman);
+ rman_fini(>io_rman);
+ return (error);
+ }
+ }
+
return (0);
}
@@ -236,13 +283,15 @@ generic_pcie_write_ivar(device_t dev, device_t child,
}
static struct rman *
-generic_pcie_rman(struct generic_pcie_core_softc *sc, int type)
+generic_pcie_rman(struct generic_pcie_core_softc *sc, int type, int flags)
{
switch (type) {
case SYS_RES_IOPORT:
return (>io_rman);
case SYS_RES_MEMORY:
+ if (sc->has_pmem && (flags & RF_PREFETCHABLE) != 0)
+ return (>pmem_rman);
return (>mem_rman);
default:
break;
@@ -266,7 +315,7 @@ pci_host_generic_core_release_resource(device_t dev, d
}
#endif
- rm = generic_pcie_rman(sc, type);
+ rm = generic_pcie_rman(sc, type, rman_get_flags(res));
if (rm != NULL) {
KASSERT(rman_is_region_manager(res, rm), ("rman mismatch"));
rman_release_resource(res);
@@ -282,6 +331,11 @@ pci_host_generic_core_alloc_resource(device_t dev, dev
struct generic_pcie_core_softc *sc;
struct resource *res;
struct rman *rm;
+ uint64_t phys_base;
+ uint64_t pci_base;
+ uint64_t size;
+ int i, space;
+ bool found;
sc = device_get_softc(dev);
@@
svn commit: r362284 - head/sys/arm64/arm64
Author: andrew
Date: Wed Jun 17 19:45:05 2020
New Revision: 362284
URL: https://svnweb.freebsd.org/changeset/base/362284
Log:
Support pmap_extract_and_hold on arm64 stage 2 mappings
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D24469
Modified:
head/sys/arm64/arm64/pmap.c
Modified: head/sys/arm64/arm64/pmap.c
==
--- head/sys/arm64/arm64/pmap.c Wed Jun 17 18:47:59 2020(r362283)
+++ head/sys/arm64/arm64/pmap.c Wed Jun 17 19:45:05 2020(r362284)
@@ -1228,9 +1228,8 @@ pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_
vm_offset_t off;
vm_page_t m;
int lvl;
+ bool use;
- PMAP_ASSERT_STAGE1(pmap);
-
m = NULL;
PMAP_LOCK(pmap);
pte = pmap_pte(pmap, va, );
@@ -1244,8 +1243,19 @@ pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_
(lvl < 3 && (tpte & ATTR_DESCR_MASK) == L1_BLOCK),
("pmap_extract_and_hold: Invalid pte at L%d: %lx", lvl,
tpte & ATTR_DESCR_MASK));
- if (((tpte & ATTR_S1_AP_RW_BIT) == ATTR_S1_AP(ATTR_S1_AP_RW)) ||
- ((prot & VM_PROT_WRITE) == 0)) {
+
+ use = false;
+ if ((prot & VM_PROT_WRITE) == 0)
+ use = true;
+ else if (pmap->pm_stage == PM_STAGE1 &&
+ (tpte & ATTR_S1_AP_RW_BIT) == ATTR_S1_AP(ATTR_S1_AP_RW))
+ use = true;
+ else if (pmap->pm_stage == PM_STAGE2 &&
+ ((tpte & ATTR_S2_S2AP(ATTR_S2_S2AP_WRITE)) ==
+ATTR_S2_S2AP(ATTR_S2_S2AP_WRITE)))
+ use = true;
+
+ if (use) {
switch(lvl) {
case 1:
off = va & L1_OFFSET;
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svn commit: r362273 - head/sys/arm64/include
Author: andrew Date: Wed Jun 17 11:56:10 2020 New Revision: 362273 URL: https://svnweb.freebsd.org/changeset/base/362273 Log: Add all the TCR_EL1 fields These will be used when adding support for new Armv8 extensions. Sponsored by: Innovate UK Modified: head/sys/arm64/include/armreg.h Modified: head/sys/arm64/include/armreg.h == --- head/sys/arm64/include/armreg.h Wed Jun 17 11:14:54 2020 (r362272) +++ head/sys/arm64/include/armreg.h Wed Jun 17 11:56:10 2020 (r362273) @@ -736,61 +736,108 @@ #definePSR_FLAGS 0xf000 /* TCR_EL1 - Translation Control Register */ -#defineTCR_HD_SHIFT40 -#defineTCR_HD (0x1UL << TCR_HD_SHIFT) -#defineTCR_HA_SHIFT39 -#defineTCR_HA (0x1UL << TCR_HA_SHIFT) +/* Bits 63:59 are reserved */ +#defineTCR_TCMA1_SHIFT 58 +#defineTCR_TCMA1 (1UL << TCR_TCMA1_SHIFT) +#defineTCR_TCMA0_SHIFT 57 +#defineTCR_TCMA0 (1UL << TCR_TCMA0_SHIFT) +#defineTCR_E0PD1_SHIFT 56 +#defineTCR_E0PD1 (1UL << TCR_E0PD1_SHIFT) +#defineTCR_E0PD0_SHIFT 55 +#defineTCR_E0PD0 (1UL << TCR_E0PD0_SHIFT) +#defineTCR_NFD1_SHIFT 54 +#defineTCR_NFD1(1UL << TCR_NFD1_SHIFT) +#defineTCR_NFD0_SHIFT 53 +#defineTCR_NFD0(1UL << TCR_NFD0_SHIFT) +#defineTCR_TBID1_SHIFT 52 +#defineTCR_TBID1 (1UL << TCR_TBID1_SHIFT) +#defineTCR_TBID0_SHIFT 51 +#defineTCR_TBID0 (1UL << TCR_TBID0_SHIFT) +#defineTCR_HWU162_SHIFT50 +#defineTCR_HWU162 (1UL << TCR_HWU162_SHIFT) +#defineTCR_HWU161_SHIFT49 +#defineTCR_HWU161 (1UL << TCR_HWU161_SHIFT) +#defineTCR_HWU160_SHIFT48 +#defineTCR_HWU160 (1UL << TCR_HWU160_SHIFT) +#defineTCR_HWU159_SHIFT47 +#defineTCR_HWU159 (1UL << TCR_HWU159_SHIFT) +#defineTCR_HWU1\ +(TCR_HWU159 | TCR_HWU160 | TCR_HWU161 | TCR_HWU162) +#defineTCR_HWU062_SHIFT46 +#defineTCR_HWU062 (1UL << TCR_HWU062_SHIFT) +#defineTCR_HWU061_SHIFT45 +#defineTCR_HWU061 (1UL << TCR_HWU061_SHIFT) +#defineTCR_HWU060_SHIFT44 +#defineTCR_HWU060 (1UL << TCR_HWU060_SHIFT) +#defineTCR_HWU059_SHIFT43 +#defineTCR_HWU059 (1UL << TCR_HWU059_SHIFT) +#defineTCR_HWU0\ +(TCR_HWU059 | TCR_HWU060 | TCR_HWU061 | TCR_HWU062) +#defineTCR_HPD1_SHIFT 42 +#defineTCR_HPD1(1UL << TCR_HPD1_SHIFT) +#defineTCR_HPD0_SHIFT 41 +#defineTCR_HPD0(1UL << TCR_HPD0_SHIFT) +#defineTCR_HD_SHIFT40 +#defineTCR_HD (1UL << TCR_HD_SHIFT) +#defineTCR_HA_SHIFT39 +#defineTCR_HA (1UL << TCR_HA_SHIFT) +#defineTCR_TBI1_SHIFT 38 +#defineTCR_TBI1(1UL << TCR_TBI1_SHIFT +#defineTCR_TBI0_SHIFT 37 +#defineTCR_TBI0(1U << TCR_TBI0_SHIFT) +#defineTCR_ASID_SHIFT 36 +#defineTCR_ASID_WIDTH 1 +#defineTCR_ASID_16 (1UL << TCR_ASID_SHIFT) +/* Bit 35 is reserved */ +#defineTCR_IPS_SHIFT 32 +#defineTCR_IPS_WIDTH 3 +#defineTCR_IPS_32BIT (0UL << TCR_IPS_SHIFT) +#defineTCR_IPS_36BIT (1UL << TCR_IPS_SHIFT) +#defineTCR_IPS_40BIT (2UL << TCR_IPS_SHIFT) +#defineTCR_IPS_42BIT (3UL << TCR_IPS_SHIFT) +#defineTCR_IPS_44BIT (4UL << TCR_IPS_SHIFT) +#defineTCR_IPS_48BIT (5UL << TCR_IPS_SHIFT) +#defineTCR_TG1_SHIFT 30 +#defineTCR_TG1_16K (1UL << TCR_TG1_SHIFT) +#defineTCR_TG1_4K (2UL << TCR_TG1_SHIFT) +#defineTCR_TG1_64K (3UL << TCR_TG1_SHIFT) +#defineTCR_SH1_SHIFT 28 +#defineTCR_SH1_IS (3UL << TCR_SH1_SHIFT) +#defineTCR_ORGN1_SHIFT 26 +#defineTCR_ORGN1_WBWA (1UL << TCR_ORGN1_SHIFT) +#defineTCR_IRGN1_SHIFT 24 +#defineTCR_IRGN1_WBWA (1UL << TCR_IRGN1_SHIFT) +#defineTCR_EPD1_SHIFT 23 +#defineTCR_EPD1(1UL << TCR_EPD1_SHIFT) +#defineTCR_A1_SHIFT22 +#defineTCR_A1 (0x1UL << TCR_A1_SHIFT) +#defineTCR_T1SZ_SHIFT 16 +#defineTCR_T1SZ(x) ((x) << TCR_T1SZ_SHIFT)
svn commit: r362263 - in head: . contrib/opencsd/decoder/include/common contrib/opencsd/decoder/include/i_dec contrib/opencsd/decoder/include/mem_acc contrib/opencsd/decoder/include/opencsd contrib...
Author: andrew Date: Wed Jun 17 10:42:20 2020 New Revision: 362263 URL: https://svnweb.freebsd.org/changeset/base/362263 Log: Update opencsd to 0.14.2 Sponsored by: Innovate UK Added: head/contrib/opencsd/decoder/include/common/ocsd_gen_elem_stack.h - copied unchanged from r362220, vendor/opencsd/dist/decoder/include/common/ocsd_gen_elem_stack.h head/contrib/opencsd/decoder/include/common/trc_raw_buffer.h - copied unchanged from r362220, vendor/opencsd/dist/decoder/include/common/trc_raw_buffer.h head/contrib/opencsd/decoder/include/opencsd/etmv4/trc_pkt_proc_etmv4i.h - copied unchanged from r362220, vendor/opencsd/dist/decoder/include/opencsd/etmv4/trc_pkt_proc_etmv4i.h head/contrib/opencsd/decoder/source/etmv4/trc_pkt_proc_etmv4i.cpp - copied unchanged from r362220, vendor/opencsd/dist/decoder/source/etmv4/trc_pkt_proc_etmv4i.cpp head/contrib/opencsd/decoder/source/ocsd_gen_elem_stack.cpp - copied unchanged from r362220, vendor/opencsd/dist/decoder/source/ocsd_gen_elem_stack.cpp Deleted: head/contrib/opencsd/decoder/include/opencsd/etmv4/trc_pkt_elem_etmv4d.h head/contrib/opencsd/decoder/source/etmv4/trc_pkt_elem_etmv4d.cpp head/contrib/opencsd/decoder/source/etmv4/trc_pkt_proc_etmv4.cpp head/contrib/opencsd/decoder/source/etmv4/trc_pkt_proc_etmv4d_impl.h head/contrib/opencsd/decoder/source/etmv4/trc_pkt_proc_etmv4i_impl.cpp head/contrib/opencsd/decoder/source/etmv4/trc_pkt_proc_etmv4i_impl.h Modified: head/ObsoleteFiles.inc head/contrib/opencsd/decoder/include/common/ocsd_dcd_mngr.h head/contrib/opencsd/decoder/include/common/ocsd_gen_elem_list.h head/contrib/opencsd/decoder/include/common/trc_core_arch_map.h head/contrib/opencsd/decoder/include/common/trc_gen_elem.h head/contrib/opencsd/decoder/include/common/trc_pkt_decode_base.h head/contrib/opencsd/decoder/include/i_dec/trc_i_decode.h head/contrib/opencsd/decoder/include/i_dec/trc_idec_arminst.h head/contrib/opencsd/decoder/include/mem_acc/trc_mem_acc_bufptr.h head/contrib/opencsd/decoder/include/opencsd/etmv3/trc_pkt_decode_etmv3.h head/contrib/opencsd/decoder/include/opencsd/etmv4/etmv4_decoder.h head/contrib/opencsd/decoder/include/opencsd/etmv4/trc_etmv4_stack_elem.h head/contrib/opencsd/decoder/include/opencsd/etmv4/trc_pkt_decode_etmv4i.h head/contrib/opencsd/decoder/include/opencsd/etmv4/trc_pkt_elem_etmv4i.h head/contrib/opencsd/decoder/include/opencsd/etmv4/trc_pkt_proc_etmv4.h head/contrib/opencsd/decoder/include/opencsd/etmv4/trc_pkt_types_etmv4.h head/contrib/opencsd/decoder/include/opencsd/ocsd_if_types.h head/contrib/opencsd/decoder/include/opencsd/ocsd_if_version.h head/contrib/opencsd/decoder/include/opencsd/ptm/trc_pkt_decode_ptm.h head/contrib/opencsd/decoder/include/opencsd/stm/trc_pkt_decode_stm.h head/contrib/opencsd/decoder/include/opencsd/trc_gen_elem_types.h head/contrib/opencsd/decoder/include/pkt_printers/pkt_printer_t.h head/contrib/opencsd/decoder/source/etmv3/trc_pkt_decode_etmv3.cpp head/contrib/opencsd/decoder/source/etmv4/trc_etmv4_stack_elem.cpp head/contrib/opencsd/decoder/source/etmv4/trc_pkt_decode_etmv4i.cpp head/contrib/opencsd/decoder/source/etmv4/trc_pkt_elem_etmv4i.cpp head/contrib/opencsd/decoder/source/i_dec/trc_i_decode.cpp head/contrib/opencsd/decoder/source/i_dec/trc_idec_arminst.cpp head/contrib/opencsd/decoder/source/mem_acc/trc_mem_acc_bufptr.cpp head/contrib/opencsd/decoder/source/ocsd_dcd_tree.cpp head/contrib/opencsd/decoder/source/ocsd_error.cpp head/contrib/opencsd/decoder/source/ptm/trc_pkt_decode_ptm.cpp head/contrib/opencsd/decoder/source/stm/trc_pkt_decode_stm.cpp head/contrib/opencsd/decoder/source/trc_component.cpp head/contrib/opencsd/decoder/source/trc_core_arch_map.cpp head/contrib/opencsd/decoder/source/trc_gen_elem.cpp head/lib/libopencsd/Makefile Directory Properties: head/contrib/opencsd/ (props changed) Modified: head/ObsoleteFiles.inc == --- head/ObsoleteFiles.inc Wed Jun 17 10:41:01 2020(r362262) +++ head/ObsoleteFiles.inc Wed Jun 17 10:42:20 2020(r362263) @@ -36,6 +36,9 @@ # xargs -n1 | sort | uniq -d; # done +# 20200617: update opencsd to 0.14.2 +OLD_FILES+=usr/include/opencsd/etmv4/trc_pkt_elem_etmv4d.h + # 20200606: retire binutils build infrastructure .if !defined(WITH_PORT_BASE_BINUTILS) OLD_FILES+=usr/bin/as Modified: head/contrib/opencsd/decoder/include/common/ocsd_dcd_mngr.h == --- head/contrib/opencsd/decoder/include/common/ocsd_dcd_mngr.h Wed Jun 17 10:41:01 2020(r362262) +++ head/contrib/opencsd/decoder/include/common/ocsd_dcd_mngr.h Wed Jun 17 10:42:20 2020(r362263) @@ -115,6 +115,9 @@ ocsd_err_t DecoderMngrBase::createDecoder(co if(!pkt_proc) return OCSD_ERR_MEM; +// set the op mode flags +
svn commit: r362220 - in head/contrib/opencsd: . decoder/build decoder/docs decoder/tests
Author: andrew Date: Tue Jun 16 08:59:44 2020 New Revision: 362220 URL: https://svnweb.freebsd.org/changeset/base/362220 Log: Re-add opencsd as a vendor import from the dist directory Sponsored by: Innovate UK Added: head/contrib/opencsd/ - copied from r353392, vendor/opencsd/dist/ Deleted: head/contrib/opencsd/.gitignore head/contrib/opencsd/HOWTO.md head/contrib/opencsd/LICENSE head/contrib/opencsd/README.md head/contrib/opencsd/TODO head/contrib/opencsd/decoder/build/ head/contrib/opencsd/decoder/docs/ head/contrib/opencsd/decoder/tests/ ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r362219 - head/contrib/opencsd
Author: andrew Date: Tue Jun 16 08:57:13 2020 New Revision: 362219 URL: https://svnweb.freebsd.org/changeset/base/362219 Log: Remove opencsd so I can re-import it with the correct ancestry Sponsored by: Innovate UK Deleted: head/contrib/opencsd/ ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r362195 - head/contrib/opencsd
Author: andrew Date: Mon Jun 15 13:03:01 2020 New Revision: 362195 URL: https://svnweb.freebsd.org/changeset/base/362195 Log: Bootstrap mergeinfo for OpenCSD Sponsored by: Innovate UK Modified: Directory Properties: head/contrib/opencsd/ (props changed) ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r362091 - head/sys/arm64/include
Author: andrew
Date: Fri Jun 12 10:43:21 2020
New Revision: 362091
URL: https://svnweb.freebsd.org/changeset/base/362091
Log:
Teach the arm64 vfp.h about struct thread.
Ensure struct thread is defined in vfp.h. In some cases it is not and stops
the kernel from building.
Sponsored by: Innovate UK
Modified:
head/sys/arm64/include/vfp.h
Modified: head/sys/arm64/include/vfp.h
==
--- head/sys/arm64/include/vfp.hFri Jun 12 10:13:23 2020
(r362090)
+++ head/sys/arm64/include/vfp.hFri Jun 12 10:43:21 2020
(r362091)
@@ -42,6 +42,7 @@ struct vfpstate {
#ifdef _KERNEL
struct pcb;
+struct thread;
void vfp_init(void);
void vfp_discard(struct thread *);
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svn commit: r362008 - head/stand/efi/loader
Author: andrew
Date: Wed Jun 10 09:31:37 2020
New Revision: 362008
URL: https://svnweb.freebsd.org/changeset/base/362008
Log:
Fix the efi serial console in the Arm models.
On some UEFI implementations the ConsOut EFI variable is not a device
path end type so we never move to the next node. Fix this by always
incrementing the device path node pointer, with a sanity check that
the node length is large enough so no two nodes overlap.
While here return failure on malloc failure rather than a NULL pointer
dereference.
Reviewed by: tsoome, imp (previous version)
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D25202
Modified:
head/stand/efi/loader/efiserialio.c
Modified: head/stand/efi/loader/efiserialio.c
==
--- head/stand/efi/loader/efiserialio.c Wed Jun 10 07:46:22 2020
(r362007)
+++ head/stand/efi/loader/efiserialio.c Wed Jun 10 09:31:37 2020
(r362008)
@@ -216,8 +216,9 @@ comc_get_con_serial_handle(const char *name)
status = efi_global_getenv(name, buf, );
if (status == EFI_BUFFER_TOO_SMALL) {
buf = malloc(sz);
- if (buf != NULL)
- status = efi_global_getenv(name, buf, );
+ if (buf == NULL)
+ return (NULL);
+ status = efi_global_getenv(name, buf, );
}
if (status != EFI_SUCCESS) {
free(buf);
@@ -232,17 +233,13 @@ comc_get_con_serial_handle(const char *name)
free(buf);
return (handle);
}
- if (IsDevicePathEndType(node) &&
- DevicePathSubType(node) ==
- END_INSTANCE_DEVICE_PATH_SUBTYPE) {
- /*
-* Start of next device path in list.
-*/
- node = NextDevicePathNode(node);
- continue;
- }
- if (IsDevicePathEnd(node))
+
+ /* Sanity check the node before moving to the next node. */
+ if (DevicePathNodeLength(node) < sizeof(*node))
break;
+
+ /* Start of next device path in list. */
+ node = NextDevicePathNode(node);
}
free(buf);
return (NULL);
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svn commit: r361547 - in head/sys/arm64: arm64 include
Author: andrew
Date: Wed May 27 08:00:38 2020
New Revision: 361547
URL: https://svnweb.freebsd.org/changeset/base/361547
Log:
Support creating and using arm64 pmap at stage 2
Add minimal support for creating stage 2 IPA -> PA mappings. For this we
need to:
- Create a new vmid set to allocate a vmid for each Virtual Machine
- Add the missing stage 2 attributes
- Use these in pmap_enter to create a new mapping
- Handle stage 2 faults
The vmid set is based on the current asid set that was generalised in
r358328. It adds a function pointer for bhyve to use when the kernel needs
to reset the vmid set. This will need to call into EL2 and invalidate the
TLB.
The stage 2 attributes have been added. To simplify setting these fields
two new functions are added to get the memory type and protection fields.
These are slightly different on stage 1 and stage 2 tables. We then use
them in pmap_enter to set the new level 3 entry to be stored.
The D-cache on all entries is cleaned to the point of coherency. This is
to allow the data to be visible to the VM. To allow for userspace to load
code when creating a new executable entry an invalid entry is created. When
the VM tried to use it the I-cache is invalidated. As the D-cache has
already been cleaned this will ensure the I-cache is synchronised with the
D-cache.
When the hardware implements a VPIPT I-cache we need to either have the
correct VMID set or invalidate it from EL2. As the host kernel will have
the wrong VMID set we need to call into EL2 to clean it. For this a second
function pointer is added that is called when this invalidation is needed.
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D23875
Modified:
head/sys/arm64/arm64/pmap.c
head/sys/arm64/include/cpufunc.h
head/sys/arm64/include/pcpu.h
head/sys/arm64/include/pmap.h
head/sys/arm64/include/pte.h
Modified: head/sys/arm64/arm64/pmap.c
==
--- head/sys/arm64/arm64/pmap.c Wed May 27 02:10:09 2020(r361546)
+++ head/sys/arm64/arm64/pmap.c Wed May 27 08:00:38 2020(r361547)
@@ -150,6 +150,7 @@ __FBSDID("$FreeBSD$");
#include
#definePMAP_ASSERT_STAGE1(pmap)MPASS((pmap)->pm_stage ==
PM_STAGE1)
+#definePMAP_ASSERT_STAGE2(pmap)MPASS((pmap)->pm_stage ==
PM_STAGE2)
#defineNL0PG (PAGE_SIZE/(sizeof (pd_entry_t)))
#defineNL1PG (PAGE_SIZE/(sizeof (pd_entry_t)))
@@ -293,6 +294,7 @@ struct asid_set {
};
static struct asid_set asids;
+static struct asid_set vmids;
static SYSCTL_NODE(_vm_pmap, OID_AUTO, asid, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
"ASID allocator");
@@ -303,6 +305,17 @@ SYSCTL_INT(_vm_pmap_asid, OID_AUTO, next, CTLFLAG_RD,
SYSCTL_INT(_vm_pmap_asid, OID_AUTO, epoch, CTLFLAG_RD, _epoch, 0,
"The current epoch number");
+static SYSCTL_NODE(_vm_pmap, OID_AUTO, vmid, CTLFLAG_RD, 0, "VMID allocator");
+SYSCTL_INT(_vm_pmap_vmid, OID_AUTO, bits, CTLFLAG_RD, _bits, 0,
+"The number of bits in an VMID");
+SYSCTL_INT(_vm_pmap_vmid, OID_AUTO, next, CTLFLAG_RD, _next, 0,
+"The last allocated VMID plus one");
+SYSCTL_INT(_vm_pmap_vmid, OID_AUTO, epoch, CTLFLAG_RD, _epoch, 0,
+"The current epoch number");
+
+void (*pmap_clean_stage2_tlbi)(void);
+void (*pmap_invalidate_vpipt_icache)(void);
+
/*
* A pmap's cookie encodes an ASID and epoch number. Cookies for reserved
* ASIDs have a negative epoch number, specifically, INT_MIN. Cookies for
@@ -590,6 +603,58 @@ pmap_l3_valid(pt_entry_t l3)
CTASSERT(L1_BLOCK == L2_BLOCK);
+static pt_entry_t
+pmap_pte_memattr(pmap_t pmap, vm_memattr_t memattr)
+{
+ pt_entry_t val;
+
+ if (pmap->pm_stage == PM_STAGE1) {
+ val = ATTR_S1_IDX(memattr);
+ if (memattr == VM_MEMATTR_DEVICE)
+ val |= ATTR_S1_XN;
+ return (val);
+ }
+
+ val = 0;
+
+ switch (memattr) {
+ case VM_MEMATTR_DEVICE:
+ return (ATTR_S2_MEMATTR(ATTR_S2_MEMATTR_DEVICE_nGnRnE) |
+ ATTR_S2_XN(ATTR_S2_XN_ALL));
+ case VM_MEMATTR_UNCACHEABLE:
+ return (ATTR_S2_MEMATTR(ATTR_S2_MEMATTR_NC));
+ case VM_MEMATTR_WRITE_BACK:
+ return (ATTR_S2_MEMATTR(ATTR_S2_MEMATTR_WB));
+ case VM_MEMATTR_WRITE_THROUGH:
+ return (ATTR_S2_MEMATTR(ATTR_S2_MEMATTR_WT));
+ default:
+ panic("%s: invalid memory attribute %x", __func__, memattr);
+ }
+}
+
+static pt_entry_t
+pmap_pte_prot(pmap_t pmap, vm_prot_t prot)
+{
+ pt_entry_t val;
+
+ val = 0;
+ if (pmap->pm_stage == PM_STAGE1) {
+ if ((prot & VM_PROT_EXECUTE) == 0)
+ val |= ATTR_S1_XN;
+ if ((prot & VM_PROT_WRITE) == 0)
+ val |= ATTR_S1_AP(ATTR_S1_AP_RO);
+ } else {
+
svn commit: r361259 - in head/sys/arm64: arm64 include
Author: andrew
Date: Tue May 19 16:04:27 2020
New Revision: 361259
URL: https://svnweb.freebsd.org/changeset/base/361259
Log:
Stop performing a full icache sync when the DIC and IDC flags are set
The DIC and IDC bits in the CTR_EL0 register signal to the kernel when it
can relax the instruction cache synchronisation operations. The IDC bit
means we can relax cleaning the data cache to the point of unification
while the DIC bit means we don't need to invalidate the instruction cache
for data coherence. In both cases an appropriate barrier is still needed.
For now only implement the case where both bits are set, as is the case
on the Neoverse-N1 as used in the Amazon AWS Graviton 2 CPU. Note that
this behaviour is a optional on the N1 so we may later need to implement
only one or the other bit being set.
There is a tunable to disable each flag on boot.
Testing on a 4 core Graviton 2 instance found a significant improvement
in sys and real time when running "make buildkernel -j4", with no
significant difference in user time.
Reviewed by: markj
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D24853
Modified:
head/sys/arm64/arm64/cpufunc_asm.S
head/sys/arm64/arm64/identcpu.c
head/sys/arm64/include/cpufunc.h
Modified: head/sys/arm64/arm64/cpufunc_asm.S
==
--- head/sys/arm64/arm64/cpufunc_asm.S Tue May 19 15:27:20 2020
(r361258)
+++ head/sys/arm64/arm64/cpufunc_asm.S Tue May 19 16:04:27 2020
(r361259)
@@ -133,9 +133,20 @@ ENTRY(arm64_dcache_inv_range)
END(arm64_dcache_inv_range)
/*
- * void arm64_icache_sync_range(vm_offset_t, vm_size_t)
+ * void arm64_dic_idc_icache_sync_range(vm_offset_t, vm_size_t)
+ * When the CTR_EL0.IDC bit is set cleaning to PoU becomes a dsb.
+ * When the CTR_EL0.DIC bit is set icache invalidation becomes an isb.
*/
-ENTRY(arm64_icache_sync_range)
+ENTRY(arm64_dic_idc_icache_sync_range)
+ dsb ishst
+ isb
+ ret
+END(arm64_dic_idc_icache_sync_range)
+
+/*
+ * void arm64_aliasing_icache_sync_range(vm_offset_t, vm_size_t)
+ */
+ENTRY(arm64_aliasing_icache_sync_range)
/*
* XXX Temporary solution - I-cache flush should be range based for
* PIPT cache or IALLUIS for VIVT or VIPT caches
@@ -146,7 +157,7 @@ ENTRY(arm64_icache_sync_range)
dsb ish
isb
ret
-END(arm64_icache_sync_range)
+END(arm64_aliasing_icache_sync_range)
/*
* int arm64_icache_sync_range_checked(vm_offset_t, vm_size_t)
Modified: head/sys/arm64/arm64/identcpu.c
==
--- head/sys/arm64/arm64/identcpu.c Tue May 19 15:27:20 2020
(r361258)
+++ head/sys/arm64/arm64/identcpu.c Tue May 19 16:04:27 2020
(r361259)
@@ -56,6 +56,24 @@ char machine[] = "arm64";
extern int adaptive_machine_arch;
#endif
+static SYSCTL_NODE(_machdep, OID_AUTO, cache, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
+"Cache management tuning");
+
+static int allow_dic = 1;
+SYSCTL_INT(_machdep_cache, OID_AUTO, allow_dic, CTLFLAG_RDTUN, _dic, 0,
+"Allow optimizations based on the DIC cache bit");
+
+static int allow_idc = 1;
+SYSCTL_INT(_machdep_cache, OID_AUTO, allow_idc, CTLFLAG_RDTUN, _idc, 0,
+"Allow optimizations based on the IDC cache bit");
+
+/*
+ * The default implementation of I-cache sync assumes we have an
+ * aliasing cache until we know otherwise.
+ */
+void (*arm64_icache_sync_range)(vm_offset_t, vm_size_t) =
+_aliasing_icache_sync_range;
+
static int
sysctl_hw_machine(SYSCTL_HANDLER_ARGS)
{
@@ -977,6 +995,7 @@ identify_cpu_sysinit(void *dummy __unused)
{
int cpu;
u_long hwcap;
+ bool dic, idc;
/* Create a user visible cpu description with safe values */
memset(_cpu_desc, 0, sizeof(user_cpu_desc));
@@ -985,6 +1004,8 @@ identify_cpu_sysinit(void *dummy __unused)
ID_AA64PFR0_FP_NONE | ID_AA64PFR0_EL1_64 | ID_AA64PFR0_EL0_64;
user_cpu_desc.id_aa64dfr0 = ID_AA64DFR0_DebugVer_8;
+ dic = (allow_dic != 0);
+ idc = (allow_idc != 0);
CPU_FOREACH(cpu) {
print_cpu_features(cpu);
hwcap = parse_cpu_features_hwcap(cpu);
@@ -993,6 +1014,17 @@ identify_cpu_sysinit(void *dummy __unused)
else
elf_hwcap &= hwcap;
update_user_regs(cpu);
+
+ if (CTR_DIC_VAL(cpu_desc[cpu].ctr) == 0)
+ dic = false;
+ if (CTR_IDC_VAL(cpu_desc[cpu].ctr) == 0)
+ idc = false;
+ }
+
+ if (dic && idc) {
+ arm64_icache_sync_range = _dic_idc_icache_sync_range;
+ if (bootverbose)
+ printf("Enabling DIC & IDC ICache sync\n");
}
if ((elf_hwcap & HWCAP_ATOMICS) != 0) {
Modified:
svn commit: r361258 - head/sys/arm64/arm64
Author: andrew
Date: Tue May 19 15:27:20 2020
New Revision: 361258
URL: https://svnweb.freebsd.org/changeset/base/361258
Log:
Create MSI/MSI-X isrcs as needed in the GICv3 ITS driver
Previously we would create an isrc for each MSI/MSI-X interrupt. This
causes issues for other interrupt sources in the system, e.g. a GPIO
driver, as they may be unable to allocate interrupts. This works around
this by allocating the isrc only when needed.
Reported by: alisa...@amazon.com
Reviewed by: mmel
Sponsored by: Innovaate UK
Differential Revision:https://reviews.freebsd.org/D24876
Modified:
head/sys/arm64/arm64/gicv3_its.c
Modified: head/sys/arm64/arm64/gicv3_its.c
==
--- head/sys/arm64/arm64/gicv3_its.cTue May 19 15:19:39 2020
(r361257)
+++ head/sys/arm64/arm64/gicv3_its.cTue May 19 15:27:20 2020
(r361258)
@@ -228,6 +228,7 @@ struct gicv3_its_irqsrc {
u_int gi_id;
u_int gi_lpi;
struct its_dev *gi_its_dev;
+ TAILQ_ENTRY(gicv3_its_irqsrc) gi_link;
};
struct gicv3_its_softc {
@@ -254,12 +255,14 @@ struct gicv3_its_softc {
size_t sc_its_cmd_next_idx;
vmem_t *sc_irq_alloc;
- struct gicv3_its_irqsrc *sc_irqs;
+ struct gicv3_its_irqsrc **sc_irqs;
u_int sc_irq_base;
u_int sc_irq_length;
+ u_int sc_irq_count;
struct mtx sc_its_dev_lock;
TAILQ_HEAD(its_dev_list, its_dev) sc_its_dev_list;
+ TAILQ_HEAD(free_irqs, gicv3_its_irqsrc) sc_free_irqs;
#defineITS_FLAGS_CMDQ_FLUSH0x0001
#defineITS_FLAGS_LPI_CONF_FLUSH0x0002
@@ -800,7 +803,6 @@ static int
gicv3_its_attach(device_t dev)
{
struct gicv3_its_softc *sc;
- const char *name;
uint32_t iidr;
int domain, err, i, rid;
@@ -875,6 +877,7 @@ gicv3_its_attach(device_t dev)
its_init_cpu(dev, sc);
TAILQ_INIT(>sc_its_dev_list);
+ TAILQ_INIT(>sc_free_irqs);
/*
* Create the vmem object to allocate INTRNG IRQs from. We try to
@@ -887,13 +890,6 @@ gicv3_its_attach(device_t dev)
sc->sc_irqs = malloc(sizeof(*sc->sc_irqs) * sc->sc_irq_length,
M_GICV3_ITS, M_WAITOK | M_ZERO);
- name = device_get_nameunit(dev);
- for (i = 0; i < sc->sc_irq_length; i++) {
- sc->sc_irqs[i].gi_id = -1;
- sc->sc_irqs[i].gi_lpi = i + sc->sc_irq_base - GIC_FIRST_LPI;
- err = intr_isrc_register(>sc_irqs[i].gi_isrc, dev, 0,
- "%s,%u", name, i);
- }
/* For GIC-500 install tracking sysctls. */
if ((iidr & (GITS_IIDR_PRODUCT_MASK | GITS_IIDR_IMPLEMENTOR_MASK)) ==
@@ -975,7 +971,7 @@ gicv3_its_intr(void *arg, uintptr_t irq)
struct trapframe *tf;
irq -= sc->sc_irq_base;
- girq = >sc_irqs[irq];
+ girq = sc->sc_irqs[irq];
if (girq == NULL)
panic("gicv3_its_intr: Invalid interrupt %ld",
irq + sc->sc_irq_base);
@@ -1201,6 +1197,53 @@ its_device_release(device_t dev, struct its_dev *its_d
free(its_dev, M_GICV3_ITS);
}
+static struct gicv3_its_irqsrc *
+gicv3_its_alloc_irqsrc(device_t dev, struct gicv3_its_softc *sc, u_int irq)
+{
+ struct gicv3_its_irqsrc *girq = NULL;
+
+ KASSERT(sc->sc_irqs[irq] == NULL,
+ ("%s: Interrupt %u already allocated", __func__, irq));
+ mtx_lock_spin(>sc_its_dev_lock);
+ if (!TAILQ_EMPTY(>sc_free_irqs)) {
+ girq = TAILQ_FIRST(>sc_free_irqs);
+ TAILQ_REMOVE(>sc_free_irqs, girq, gi_link);
+ }
+ mtx_unlock_spin(>sc_its_dev_lock);
+ if (girq == NULL) {
+ girq = malloc(sizeof(*girq), M_GICV3_ITS,
+ M_NOWAIT | M_ZERO);
+ if (girq == NULL)
+ return (NULL);
+ girq->gi_id = -1;
+ if (intr_isrc_register(>gi_isrc, dev, 0,
+ "%s,%u", device_get_nameunit(dev), irq) != 0) {
+ free(girq, M_GICV3_ITS);
+ return (NULL);
+ }
+ }
+ girq->gi_lpi = irq + sc->sc_irq_base - GIC_FIRST_LPI;
+ sc->sc_irqs[irq] = girq;
+
+ return (girq);
+}
+
+static void
+gicv3_its_release_irqsrc(struct gicv3_its_softc *sc,
+struct gicv3_its_irqsrc *girq)
+{
+ u_int irq;
+
+ mtx_assert(>sc_its_dev_lock, MA_OWNED);
+
+ irq = girq->gi_lpi + GIC_FIRST_LPI - sc->sc_irq_base;
+ sc->sc_irqs[irq] = NULL;
+
+ girq->gi_id = -1;
+ girq->gi_its_dev = NULL;
+ TAILQ_INSERT_TAIL(>sc_free_irqs, girq, gi_link);
+}
+
static int
gicv3_its_alloc_msi(device_t dev, device_t child, int count, int maxcount,
device_t *pic, struct intr_irqsrc **srcs)
@@ -1220,12 +1263,35 @@ gicv3_its_alloc_msi(device_t dev, device_t child, int
svn commit: r361216 - head/usr.sbin/acpi/acpidump
Author: andrew
Date: Mon May 18 15:05:59 2020
New Revision: 361216
URL: https://svnweb.freebsd.org/changeset/base/361216
Log:
Allow the FACS and XFACS to be zero in acpidump.
These are allowed to be zero when the hardware reduced APCI flag is set
Sponsored by: Innovate UK
Differential Revision:https://reviews.freebsd.org/D23207
Modified:
head/usr.sbin/acpi/acpidump/acpi.c
Modified: head/usr.sbin/acpi/acpidump/acpi.c
==
--- head/usr.sbin/acpi/acpidump/acpi.c Mon May 18 15:03:52 2020
(r361215)
+++ head/usr.sbin/acpi/acpidump/acpi.c Mon May 18 15:05:59 2020
(r361216)
@@ -245,6 +245,7 @@ acpi_handle_fadt(ACPI_TABLE_HEADER *sdp)
ACPI_TABLE_HEADER *dsdp;
ACPI_TABLE_FACS *facs;
ACPI_TABLE_FADT *fadt;
+ vm_offset_t addr;
int fadt_revision;
fadt = (ACPI_TABLE_FADT *)sdp;
@@ -252,12 +253,17 @@ acpi_handle_fadt(ACPI_TABLE_HEADER *sdp)
fadt_revision = acpi_get_fadt_revision(fadt);
if (fadt_revision == 1)
- facs = (ACPI_TABLE_FACS *)acpi_map_sdt(fadt->Facs);
+ addr = fadt->Facs;
else
- facs = (ACPI_TABLE_FACS *)acpi_map_sdt(fadt->XFacs);
- if (memcmp(facs->Signature, ACPI_SIG_FACS, 4) != 0 || facs->Length < 64)
- errx(1, "FACS is corrupt");
- acpi_print_facs(facs);
+ addr = fadt->XFacs;
+ if (addr != 0) {
+ facs = (ACPI_TABLE_FACS *)acpi_map_sdt(addr);
+
+ if (memcmp(facs->Signature, ACPI_SIG_FACS, 4) != 0 ||
+ facs->Length < 64)
+ errx(1, "FACS is corrupt");
+ acpi_print_facs(facs);
+ }
if (fadt_revision == 1)
dsdp = (ACPI_TABLE_HEADER *)acpi_map_sdt(fadt->Dsdt);
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svn commit: r361076 - in head/sys/arm64: arm64 include
Author: andrew Date: Fri May 15 13:33:48 2020 New Revision: 361076 URL: https://svnweb.freebsd.org/changeset/base/361076 Log: Remove arm64_idcache_wbinv_range as it's unused. Sponsored by: Innovate UK Modified: head/sys/arm64/arm64/cpufunc_asm.S head/sys/arm64/include/cpufunc.h Modified: head/sys/arm64/arm64/cpufunc_asm.S == --- head/sys/arm64/arm64/cpufunc_asm.S Fri May 15 12:47:39 2020 (r361075) +++ head/sys/arm64/arm64/cpufunc_asm.S Fri May 15 13:33:48 2020 (r361076) @@ -133,14 +133,6 @@ ENTRY(arm64_dcache_inv_range) END(arm64_dcache_inv_range) /* - * void arm64_idcache_wbinv_range(vm_offset_t, vm_size_t) - */ -ENTRY(arm64_idcache_wbinv_range) - cache_handle_range dcop = civac, ic = 1, icop = ivau - ret -END(arm64_idcache_wbinv_range) - -/* * void arm64_icache_sync_range(vm_offset_t, vm_size_t) */ ENTRY(arm64_icache_sync_range) Modified: head/sys/arm64/include/cpufunc.h == --- head/sys/arm64/include/cpufunc.hFri May 15 12:47:39 2020 (r361075) +++ head/sys/arm64/include/cpufunc.hFri May 15 13:33:48 2020 (r361076) @@ -216,7 +216,6 @@ extern int64_t dczva_line_size; #definecpu_dcache_inv_range(a, s) arm64_dcache_inv_range((a), (s)) #definecpu_dcache_wb_range(a, s) arm64_dcache_wb_range((a), (s)) -#definecpu_idcache_wbinv_range(a, s) arm64_idcache_wbinv_range((a), (s)) #definecpu_icache_sync_range(a, s) arm64_icache_sync_range((a), (s)) #define cpu_icache_sync_range_checked(a, s) arm64_icache_sync_range_checked((a), (s)) @@ -224,7 +223,6 @@ void arm64_nullop(void); void arm64_tlb_flushID(void); void arm64_icache_sync_range(vm_offset_t, vm_size_t); int arm64_icache_sync_range_checked(vm_offset_t, vm_size_t); -void arm64_idcache_wbinv_range(vm_offset_t, vm_size_t); void arm64_dcache_wbinv_range(vm_offset_t, vm_size_t); void arm64_dcache_inv_range(vm_offset_t, vm_size_t); void arm64_dcache_wb_range(vm_offset_t, vm_size_t); ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r360990 - head/sys/arm64/arm64
Author: andrew
Date: Tue May 12 21:00:13 2020
New Revision: 360990
URL: https://svnweb.freebsd.org/changeset/base/360990
Log:
Fix the name reported when the core supports a 64-bit CCIDX
Modified:
head/sys/arm64/arm64/identcpu.c
Modified: head/sys/arm64/arm64/identcpu.c
==
--- head/sys/arm64/arm64/identcpu.c Tue May 12 20:05:34 2020
(r360989)
+++ head/sys/arm64/arm64/identcpu.c Tue May 12 21:00:13 2020
(r360990)
@@ -601,7 +601,7 @@ static struct mrs_field_value id_aa64mmfr2_nv[] = {
static struct mrs_field_value id_aa64mmfr2_ccidx[] = {
MRS_FIELD_VALUE(ID_AA64MMFR2_CCIDX_32, "32bit CCIDX"),
- MRS_FIELD_VALUE(ID_AA64MMFR2_CCIDX_64, "32bit CCIDX"),
+ MRS_FIELD_VALUE(ID_AA64MMFR2_CCIDX_64, "64bit CCIDX"),
MRS_FIELD_VALUE_END,
};
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svn commit: r360655 - head/stand/efi/boot1
Author: andrew
Date: Tue May 5 10:01:10 2020
New Revision: 360655
URL: https://svnweb.freebsd.org/changeset/base/360655
Log:
Fix the EFI_DEBUG case, prio_str is only used when EFI_DEBUG is unset.
Sponsored by: Innovate UK
Modified:
head/stand/efi/boot1/proto.c
Modified: head/stand/efi/boot1/proto.c
==
--- head/stand/efi/boot1/proto.cTue May 5 09:42:26 2020
(r360654)
+++ head/stand/efi/boot1/proto.cTue May 5 10:01:10 2020
(r360655)
@@ -38,12 +38,14 @@ __FBSDID("$FreeBSD$");
static EFI_GUID BlockIoProtocolGUID = BLOCK_IO_PROTOCOL;
static EFI_GUID DevicePathGUID = DEVICE_PATH_PROTOCOL;
+#ifndef EFI_DEBUG
static const char *prio_str[] = {
"error",
"not supported",
"good",
"better"
};
+#endif
/*
* probe_handle determines if the passed handle represents a logical partition
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svn commit: r360654 - head/stand/efi/boot1
Author: andrew
Date: Tue May 5 09:42:26 2020
New Revision: 360654
URL: https://svnweb.freebsd.org/changeset/base/360654
Log:
As with r352446 align blocks in boot1.efi
We need to ensure the buffers are aligned before passing them to ReadBlocks.
Assume 512 bytes is enough for now.
Reviewed by: imp
MFC after:1 month
Sponsored by: Innovate UK
Modified:
head/stand/efi/boot1/ufs_module.c
Modified: head/stand/efi/boot1/ufs_module.c
==
--- head/stand/efi/boot1/ufs_module.c Tue May 5 04:42:47 2020
(r360653)
+++ head/stand/efi/boot1/ufs_module.c Tue May 5 09:42:26 2020
(r360654)
@@ -73,12 +73,12 @@ dskread(void *buf, uint64_t lba, int nblk)
#include "ufsread.c"
-static struct dmadat __dmadat;
+static struct dmadat __dmadat __aligned(512);
+static char ufs_buffer[BSD_LABEL_BUFFER] __aligned(512);
static int
init_dev(dev_info_t* dev)
{
- char buffer[BSD_LABEL_BUFFER];
struct disklabel *dl;
uint64_t bs;
int ok;
@@ -109,14 +109,14 @@ init_dev(dev_info_t* dev)
* will retry fsread(0) only if there's a label found with a non-zero
* offset.
*/
- if (dskread(buffer, 0, BSD_LABEL_BUFFER / DEV_BSIZE) != 0)
+ if (dskread(ufs_buffer, 0, BSD_LABEL_BUFFER / DEV_BSIZE) != 0)
return (-1);
dl = NULL;
bs = devinfo->dev->Media->BlockSize;
if (bs != 0 && bs <= BSD_LABEL_BUFFER / 2)
- dl = (struct disklabel *)[bs];
+ dl = (struct disklabel *)_buffer[bs];
if (dl == NULL || dl->d_magic != BSD_MAGIC || dl->d_magic2 != BSD_MAGIC)
- dl = (struct disklabel *)[BSD_LABEL_OFFSET];
+ dl = (struct disklabel *)_buffer[BSD_LABEL_OFFSET];
if (dl->d_magic != BSD_MAGIC || dl->d_magic2 != BSD_MAGIC ||
dl->d_partitions[0].p_offset == 0)
return (-1);
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svn commit: r360249 - head/sys/dev/pci
Author: andrew
Date: Fri Apr 24 11:03:15 2020
New Revision: 360249
URL: https://svnweb.freebsd.org/changeset/base/360249
Log:
Remove PCI_IO_WINDOW_OFFSET from the pci host generic fdt attachment.
It doesn't seem to be needed, and breaks booting under bhyve/arm64.
Discussed with: br
MFC after:2 weeks
Sponsored by: Innovate UK
Modified:
head/sys/dev/pci/pci_host_generic_fdt.c
Modified: head/sys/dev/pci/pci_host_generic_fdt.c
==
--- head/sys/dev/pci/pci_host_generic_fdt.c Fri Apr 24 10:20:54 2020
(r360248)
+++ head/sys/dev/pci/pci_host_generic_fdt.c Fri Apr 24 11:03:15 2020
(r360249)
@@ -65,8 +65,6 @@ __FBSDID("$FreeBSD$");
#include "pcib_if.h"
-#definePCI_IO_WINDOW_OFFSET0x1000
-
#defineSPACE_CODE_SHIFT24
#defineSPACE_CODE_MASK 0x3
#defineSPACE_CODE_IO_SPACE 0x1
@@ -170,8 +168,7 @@ pci_host_generic_attach(device_t dev)
pci_base, pci_base + size - 1);
} else if (sc->base.ranges[tuple].flags & FLAG_IO) {
error = rman_manage_region(>base.io_rman,
- pci_base + PCI_IO_WINDOW_OFFSET,
- pci_base + PCI_IO_WINDOW_OFFSET + size - 1);
+ pci_base, pci_base + size - 1);
} else
continue;
if (error) {
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svn commit: r360247 - head/stand
Author: andrew
Date: Fri Apr 24 10:03:11 2020
New Revision: 360247
URL: https://svnweb.freebsd.org/changeset/base/360247
Log:
Build the arm64 loader with -ffixed-x18
This stops the compiler from using the x18 register. Some UEFI
implementations assume this will be preserved when calling the Boot
Services.
MFC after:2 weeks
Sponsored by: Innovate UK
Modified:
head/stand/defs.mk
Modified: head/stand/defs.mk
==
--- head/stand/defs.mk Fri Apr 24 09:32:20 2020(r360246)
+++ head/stand/defs.mk Fri Apr 24 10:03:11 2020(r360247)
@@ -119,7 +119,7 @@ SSP_CFLAGS=
# currently has no /boot/loader, but may soon.
CFLAGS+= -ffreestanding ${CFLAGS_NO_SIMD}
.if ${MACHINE_CPUARCH} == "aarch64"
-CFLAGS+= -mgeneral-regs-only -fPIC
+CFLAGS+= -mgeneral-regs-only -ffixed-x18 -fPIC
.elif ${MACHINE_CPUARCH} == "riscv"
CFLAGS+= -march=rv64imac -mabi=lp64
.else
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svn commit: r359505 - head/usr.sbin/jail
Author: andrew
Date: Wed Apr 1 09:51:29 2020
New Revision: 359505
URL: https://svnweb.freebsd.org/changeset/base/359505
Log:
Use memmove to copy within a buffer
jail(8) would try to use strcpy to remove the interface from the start of
an IP address. This is undefined, and on arm64 will result in unexpected
IPv6 addresses.
Fix this by using memmove top move the string.
PR: 245102
Reported by: sbruno
MFC after:2 weeks
Sponsored by: Innovate UK
Modified:
head/usr.sbin/jail/config.c
Modified: head/usr.sbin/jail/config.c
==
--- head/usr.sbin/jail/config.c Wed Apr 1 09:01:35 2020(r359504)
+++ head/usr.sbin/jail/config.c Wed Apr 1 09:51:29 2020(r359505)
@@ -596,8 +596,8 @@ check_intparams(struct cfjail *j)
if (cs || defif)
add_param(j, NULL, IP__IP4_IFADDR, s->s);
if (cs) {
- strcpy(s->s, cs + 1);
s->len -= cs + 1 - s->s;
+ memmove(s->s, cs + 1, s->len + 1);
}
if ((cs = strchr(s->s, '/')) != NULL) {
*cs = '\0';
@@ -617,8 +617,8 @@ check_intparams(struct cfjail *j)
if (cs || defif)
add_param(j, NULL, IP__IP6_IFADDR, s->s);
if (cs) {
- strcpy(s->s, cs + 1);
s->len -= cs + 1 - s->s;
+ memmove(s->s, cs + 1, s->len + 1);
}
if ((cs = strchr(s->s, '/')) != NULL) {
*cs = '\0';
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svn commit: r358709 - head/sys/arm64/include
Author: andrew Date: Fri Mar 6 16:00:35 2020 New Revision: 358709 URL: https://svnweb.freebsd.org/changeset/base/358709 Log: Add more are64 special register fields Obtained from:https://github.com/FreeBSD-UPB/freebsd Modified: head/sys/arm64/include/armreg.h Modified: head/sys/arm64/include/armreg.h == --- head/sys/arm64/include/armreg.h Fri Mar 6 15:58:52 2020 (r358708) +++ head/sys/arm64/include/armreg.h Fri Mar 6 16:00:35 2020 (r358709) @@ -66,6 +66,18 @@ #defineUL(x) UINT64_C(x) +/* CNTHCTL_EL2 - Counter-timer Hypervisor Control register */ +#defineCNTHCTL_EVNTI_MASK (0xf << 4) /* Bit to trigger event stream */ +#defineCNTHCTL_EVNTDIR (1 << 3) /* Control transition trigger bit */ +#defineCNTHCTL_EVNTEN (1 << 2) /* Enable event stream */ +#defineCNTHCTL_EL1PCEN (1 << 1) /* Allow EL0/1 physical timer access */ +#defineCNTHCTL_EL1PCTEN(1 << 0) /*Allow EL0/1 physical counter access*/ + +/* CNTP_CTL_EL0 - Counter-timer Physical Timer Control register */ +#defineCNTP_CTL_ENABLE (1 << 0) +#defineCNTP_CTL_IMASK (1 << 1) +#defineCNTP_CTL_ISTATUS(1 << 2) + /* CPACR_EL1 */ #defineCPACR_FPEN_MASK (0x3 << 20) #define CPACR_FPEN_TRAP_ALL1 (0x0 << 20) /* Traps from EL0 and EL1 */ @@ -122,22 +134,53 @@ #defineDCZID_BS_SIZE(reg) (((reg) & DCZID_BS_MASK) >> DCZID_BS_SHIFT) /* ESR_ELx */ -#defineESR_ELx_ISS_MASK0x00ff +#defineESR_ELx_ISS_MASK0x01ff #define ISS_INSN_FnV (0x01 << 10) #define ISS_INSN_EA(0x01 << 9) #define ISS_INSN_S1PTW (0x01 << 7) #define ISS_INSN_IFSC_MASK (0x1f << 0) -#define ISS_DATA_ISV (0x01 << 24) -#define ISS_DATA_SAS_MASK (0x03 << 22) -#define ISS_DATA_SSE (0x01 << 21) -#define ISS_DATA_SRT_MASK (0x1f << 16) + +#define ISS_MSR_DIR_SHIFT 0 +#define ISS_MSR_DIR(0x01 << ISS_MSR_DIR_SHIFT) +#define ISS_MSR_Rt_SHIFT 5 +#define ISS_MSR_Rt_MASK(0x1f << ISS_MSR_Rt_SHIFT) +#define ISS_MSR_Rt(x) (((x) & ISS_MSR_Rt_MASK) >> ISS_MSR_Rt_SHIFT) +#define ISS_MSR_CRm_SHIFT 1 +#define ISS_MSR_CRm_MASK (0xf << ISS_MSR_CRm_SHIFT) +#define ISS_MSR_CRm(x) (((x) & ISS_MSR_CRm_MASK) >> ISS_MSR_CRm_SHIFT) +#define ISS_MSR_CRn_SHIFT 10 +#define ISS_MSR_CRn_MASK (0xf << ISS_MSR_CRn_SHIFT) +#define ISS_MSR_CRn(x) (((x) & ISS_MSR_CRn_MASK) >> ISS_MSR_CRn_SHIFT) +#define ISS_MSR_OP1_SHIFT 14 +#define ISS_MSR_OP1_MASK (0x7 << ISS_MSR_OP1_SHIFT) +#define ISS_MSR_OP1(x) (((x) & ISS_MSR_OP1_MASK) >> ISS_MSR_OP1_SHIFT) +#define ISS_MSR_OP2_SHIFT 17 +#define ISS_MSR_OP2_MASK (0x7 << ISS_MSR_OP2_SHIFT) +#define ISS_MSR_OP2(x) (((x) & ISS_MSR_OP2_MASK) >> ISS_MSR_OP2_SHIFT) +#define ISS_MSR_OP0_SHIFT 20 +#define ISS_MSR_OP0_MASK (0x3 << ISS_MSR_OP0_SHIFT) +#define ISS_MSR_OP0(x) (((x) & ISS_MSR_OP0_MASK) >> ISS_MSR_OP0_SHIFT) +#define ISS_MSR_REG_MASK \ +(ISS_MSR_OP0_MASK | ISS_MSR_OP2_MASK | ISS_MSR_OP1_MASK | \ + ISS_MSR_CRn_MASK | ISS_MSR_CRm_MASK) + + +#define ISS_DATA_ISV_SHIFT 24 +#define ISS_DATA_ISV (0x01 << ISS_DATA_ISV_SHIFT) +#define ISS_DATA_SAS_SHIFT 22 +#define ISS_DATA_SAS_MASK (0x03 << ISS_DATA_SAS_SHIFT) +#define ISS_DATA_SSE_SHIFT 21 +#define ISS_DATA_SSE (0x01 << ISS_DATA_SSE_SHIFT) +#define ISS_DATA_SRT_SHIFT 16 +#define ISS_DATA_SRT_MASK (0x1f << ISS_DATA_SRT_SHIFT) #define ISS_DATA_SF(0x01 << 15) #define ISS_DATA_AR(0x01 << 14) #define ISS_DATA_FnV (0x01 << 10) #define ISS_DATA_EA(0x01 << 9) #define ISS_DATA_CM(0x01 << 8) #define ISS_DATA_S1PTW (0x01 << 7) -#define ISS_DATA_WnR (0x01 << 6) +#define ISS_DATA_WnR_SHIFT 6 +#define ISS_DATA_WnR (0x01 << ISS_DATA_WnR_SHIFT) #define ISS_DATA_DFSC_MASK (0x3f << 0) #define ISS_DATA_DFSC_ASF_L0 (0x00 << 0) #define ISS_DATA_DFSC_ASF_L1 (0x01 << 0) @@ -170,10 +213,12 @@ #defineESR_ELx_EC_MASK (0x3f << 26) #defineESR_ELx_EXCEPTION(esr) (((esr) & ESR_ELx_EC_MASK) >> ESR_ELx_EC_SHIFT) #define EXCP_UNKNOWN 0x00/* Unkwn exception */ +#define EXCP_TRAP_WFI_WFE 0x01/* Trapped WFI or WFE */ #define
