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Hi Hal, Martin, list,
Any progress on this front? I've just run into this same issue (error
codes 0xC00020A1 or 0xC00018A1 depending on whether USB/floppy/1394
are enabled -- suspect USB is what's meaningful but haven't dissected
it) on a dc7800 with tboot-20100427 (w/ Q35 SINIT modules v18, 17,a
t remember for
sure).
It has 4GB of RAM, which I believe it has always had. I can always
try removing some...
Any ideas?
Thanks,
-Jon
On Thu, Jul 22, 2010 at 5:02 PM, Jonathan McCune wrote:
> Hi Hal, Martin, list,
>
> Any progress on this front? I've just run into this same issu
On Thu, Jul 22, 2010 at 9:28 PM, Cihula, Joseph wrote:
> The possible culprits for a change in behavior could be: "significant"
> memory change (e.g. <4GB to >4GB, PCI/PCIe devices added/removed, internal
> devices enabled/disabled (e.g. Azalia, ME). You could also try resetting the
> BIOS to
Hi all,
Some observations and questions below. Answers would be great, but I
also feel compelled to make some of this information available in case
others find it useful. Happy reading!
I am writing in regard to some ambiguities in the MLE Developer's
Guide and in Chapter 6 (Safer Mode Extensio
Although there are some distinct error codes for locality access
problems, you might check whether the Linux TPM driver is active. If
the TPM has an active locality (which would be locality 1 with Linux's
tpm_tis), then SENTER will not succeed. The easiest way to test if
this makes a difference i
aspx?c=us&cs=08W&l=en&s=bsdv&releaseid=R267128&SystemID=LAT_E4310&servicetag=&os=W732&osl=en&deviceid=21505&devlib=0&typecnt=0&vercnt=1&catid=-1&impid=-1&formatcnt=0&libid=60&typeid=-1&dateid=-1&formatid=-1&source=-1&am
I was originally going to post "how do I enable TXT in Linux kernel
2.6.37?" but I figured it out. As the process was rather non-obvious,
I post here with hopes that this information will be useful.
Working with the vanilla linux-2.6.37.tar.bz2 from kernel.org...
Documentation/intel_txt.txt does
-off-by: Jonathan McCune
---
Documentation/intel_txt.txt |4 +++-
security/Kconfig|2 +-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/Documentation/intel_txt.txt b/Documentation/intel_txt.txt
index 849de1a..8487f76 100644
--- a/Documentation/intel_txt.txt
+++ b
-Jon
On Fri, Jan 21, 2011 at 1:58 PM, Randy Dunlap wrote:
> On Fri, 21 Jan 2011 13:39:19 -0500 Jonathan McCune wrote:
>
>> This patch makes the documentation slightly more explicit about how to
>> enable Intel TXT support in the kernel, and adds two dependencies to
>> t
e linux install (2.6.30), run go.sh output seems correct.
> Change from an xterm to tty1 for extra output, run go.sh, system hangs at
> SENTER.
> 4. System now in reboot loop.
>
> -Jeff
>
> Jonathan McCune wrote:
>>
>> Ugh. That's really unfortunate tha
gt;
> The story is at the threads beginning with http://lkml.org/lkml/2009/6/30/664.
>
> Thanks.
> Shane
>
>> -Original Message-
>> From: Jonathan McCune [mailto:jonmcc...@cmu.edu]
>> Sent: Saturday, January 22, 2011 3:10 AM
>> To: tboot-devel@lists.sourcefo
this point in the code before it enters the if statement and after
it
>> > exits it reg_acc.active_locality is 1. I changed the line
>> >
>> > reg_acc.active_locality = 1;
>> >
>> > to
>> >
>> > reg_acc.active_locality = 0;
>> >
>&g
Hello,
tboot-20101005 is rebooting at GETSEC[SENTER]. Here is information
about the system:
Laptop: Dell Latitude E6400 with BIOS rev A28 (latest available as of
2011.03.20). VT-d, VT-x, TXT, TPM are all enabled in BIOS.
SINIT: GM45_GS45_PM45_SINIT_21.BIN
tboot-20101005, both default and debug
I have the same questions regarding the availability of SINIT modules
for Xeon-centric chipsets. The 5520 is a good place to start. Any
info?
Thanks,
-Jon
On Fri, Mar 18, 2011 at 1:59 PM, J Chapman Flack wrote:
> original question:
>
> Hi,
>
> I'm going to be building a system on Intel's S552
Hello list,
This page says tboot's license is the GPL:
http://sourceforge.net/projects/tboot/
...but the source files in the latest version all look like they are
covered by a BSD-style license.
Could you please resolve the ambiguity?
Thanks!
-Jon
--
Some quick and dirty thoughts inline...
> 1. Using tboot or a TPM (on the motherboard), is it possible to have a dual
> boot system where both OSes boot in trusted mode? If so, how is that
> configured?
Almost certainly, though it depends on your definition of "trusted
mode". If you just want "a
Hello tboot-devel:
First, thanks for all the Flicker-related support in the past.
I am writing to announce that development of the Flicker project has
acquired its own home at http://flickertcb.sourceforge.net/. All
further announcements in regard to the Flicker project will be sent to
the flick
Hi list,
I'm having a tough time recomputing the values that I find in PCR 17
following SENTER. I'm using i5_i7_DUAL_SINIT_18.BIN (I believe this
to be the latest available), which produces a version 7
sinit_to_mle_data.
Looking at Section 1.9.1 in the spec, it's quite unclear to me exactly
wha
Hello again,
Some progress to report! I've decided to write in with an incomplete
investigation because I suspect lots of other folks have similar
questions / concerns.
First, thank you JP for sharing your method.
Upon reading the spec more carefully, I realize that the nested SHA-1
expression
Hi Joseph,
Thanks so much for your detailed reply. I have indeed gotten things
to work. For the aid of others, here are some of the useful bits. I
may post some more complete code in a week or two.
> First, you need to adjust your calculation per the comment about
> 'SHA-256(SINIT) | EDX'. S
I believe the tboot build script will insert a revision number if
built in the revision control system (Mercurial? I think they're still
using mercurial) repository. If it can't find a version, it just
prints "unavailable".
-Jon
On Mon, Oct 17, 2011 at 12:40 PM, Steve Johnston
wrote:
> Hi All,
Hello list,
In both tboot-1.7.0 and the latest revision in the mercurial repo
(299:950fec11ef90, dated 1/15/2012):
tboot-1.7.0 $ patch --dry-run -p1 < test-patches/tpm-test.patch
patching file tboot/common/tpm.c
Hunk #1 succeeded at 2121 with fuzz 1 (offset 418 lines).
patching file tboot/include
We are pleased to announce the open-source release of the eXtensible,
Modular Hypervisor Framework (XMHF): http://xmhf.org
tl;dr: git clone git://git.code.sf.net/p/xmhf/xmhf
XMHF is a modular hypervisor platform for recent multicore x86
hardware with support for launching via dynamic root of trus
Hi Joanna,
On Fri, Aug 31, 2012 at 5:47 AM, Joanna Rutkowska
wrote:
> So, am I asking a wrong question? ;)
I can try to give an answer to a related question...
> On 08/09/12 20:19, Joanna Rutkowska wrote:
>> I'm curious whether activation of the JTAG interface affects PCR values,
>> be that tho
Hi Joanna,
On Fri, Aug 31, 2012 at 10:54 AM, Joanna Rutkowska
wrote:
> Thanks Jon. I have had a few moments in my life when I really wished I
> had access to such a CPU debugger, but ultimately never bought any ;)
I really only used it when I didn't know what I was doing, e.g., I had
never manip
that you can then empirically determine which
portions of the spec(s) actually describes the CPU's behavior.
HTH,
-Jon
On Mon, Sep 8, 2014 at 9:51 AM, Benjamin Block wrote:
> Hej Jonathan,
>
> On 08:57 Mon 08 Sep , Jonathan McCune wrote:
> > If you consider the alig
If you consider the alignment requirements of the entry point, and layout
your MLE with the entry point in the first 4K, you may be able to mask
things such that you do not have to care about the low 12 bits.
--
Want excite
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