Scott Cheloha [2022-09-23, 14:51 -0500]:
> On Fri, Sep 23, 2022 at 10:40:19PM +0300, Timo Myyr?? wrote:
>
>> Scott Cheloha [2022-09-23, 09:16 -0500]:
>>
>> > [...]
>> >
>> > Test results? Clues on reading the configuration space?
>> >
>> > [...]
>>
>> Hi,
>>
>> Here's a dmesg from thinkpad
Scott Cheloha wrote:
> > And it is the wrong time in the release cycle for this.
>
> This doesn't need to make release, I'm just gauging interest and
> testing code.
But you didn't say that in your email.
But Worse, you didn't think that you need to say it.
On Sat, Sep 24, 2022 at 11:06:24AM +1000, Jonathan Gray wrote:
> On Fri, Sep 23, 2022 at 09:16:25AM -0500, Scott Cheloha wrote:
> > Hi,
> >
> > TL;DR:
> >
> > I want to compute the TSC frequency on AMD CPUs using the methods laid
> > out in the AMD manuals instead of calibrating the TSC by hand.
>
On Fri, Sep 23, 2022 at 07:46:55PM -0600, Theo de Raadt wrote:
> > And it is the wrong time in the release cycle for this.
>
> No kidding.
>
> As this makes absolutely no difference for any existing code in 7.2,
> except the strong hazard of accidentally breaking a machine.
It does not need to
On Sat, Sep 24, 2022 at 11:06:24AM +1000, Jonathan Gray wrote:
> On Fri, Sep 23, 2022 at 09:16:25AM -0500, Scott Cheloha wrote:
> > [...]
> >
> > The only missing piece is code to read the configuration space on
> > family 10h-16h CPUs to determine how many boosted P-states we need to
> > skip to
> And it is the wrong time in the release cycle for this.
No kidding.
As this makes absolutely no difference for any existing code in 7.2,
except the strong hazard of accidentally breaking a machine.
On Fri, Sep 23, 2022 at 09:16:25AM -0500, Scott Cheloha wrote:
> Hi,
>
> TL;DR:
>
> I want to compute the TSC frequency on AMD CPUs using the methods laid
> out in the AMD manuals instead of calibrating the TSC by hand.
>
> If you have an AMD CPU with an invariant TSC, please apply this patch,
Anyone?
On Sat, Sep 17, 2022 at 04:28:15PM +0200, Alexander Bluhm wrote:
> Hi,
>
> Inspired by Taylor's talk at EuroBSDCon I think a memory barrier
> in counters_zero() is missing. Reading uses two consumer barriers,
> so writing should also have two.
>
> Following code would have no barrier
On Sat, Sep 03, 2022 at 03:39:00AM +0300, Vitaliy Makkoveev wrote:
> On Fri, Sep 02, 2022 at 11:56:02AM +0200, Alexander Bluhm wrote:
> I'm not blocking this, may be something other has the different opinion.
I strongly believe that userland should not care about short time
memory shortage in
Index: vm.conf.5
===
RCS file: /cvs/src/usr.sbin/vmd/vm.conf.5,v
retrieving revision 1.59
diff -u -p -r1.59 vm.conf.5
--- vm.conf.5 13 Sep 2022 10:28:19 - 1.59
+++ vm.conf.5 23 Sep 2022 19:36:01 -
@@ -25,8 +25,7 @@
In the few places I run httpd(8) patches usually float around and I do
look at them with Firefox.
But unless httpd.conf(5) contains `types { text/plain diff patch }' the
browser will download the file instead of displaying it as text.
Would it be sensible to add them to the default list so this
On Fri, Sep 23, 2022 at 10:40:19PM +0300, Timo Myyr?? wrote:
> Scott Cheloha [2022-09-23, 09:16 -0500]:
>
> > [...]
> >
> > Test results? Clues on reading the configuration space?
> >
> > [...]
>
> Hi,
>
> Here's a dmesg from thinkpad e485:
Thanks for testing.
> Does these timers affect the
Scott Cheloha [2022-09-23, 09:16 -0500]:
> Hi,
>
> TL;DR:
>
> I want to compute the TSC frequency on AMD CPUs using the methods laid
> out in the AMD manuals instead of calibrating the TSC by hand.
>
> If you have an AMD CPU with an invariant TSC, please apply this patch,
> recompile/boot the
deraadt objected to the time zone validation. I don't care about the
feature and I agree with the point that I shouldn't do it because there
is no API for it. I don't even know where the time zone files are.
To make this all more symmetric always print tm_zone, even if TZ is not
set.
OK?
diff
Index: rad.conf.5
===
RCS file: /cvs/src/usr.sbin/rad/rad.conf.5,v
retrieving revision 1.17
diff -u -p -r1.17 rad.conf.5
--- rad.conf.5 16 May 2020 16:58:12 - 1.17
+++ rad.conf.5 23 Sep 2022 18:52:37 -
@@ -158,7 +158,7
So, with the tzset(3) restriction in place I'd like to fix grdc, because
what we currently have is wrong:
There are time zones that have minute offsets, display those
correctly. Pointed out by pjanzen@.
To display the offset, use ISO 8601, as suggested by David Goerger.
Take a guess if tzset(3)
Hi,
TL;DR:
I want to compute the TSC frequency on AMD CPUs using the methods laid
out in the AMD manuals instead of calibrating the TSC by hand.
If you have an AMD CPU with an invariant TSC, please apply this patch,
recompile/boot the resulting kernel, and send me the resulting dmesg.
Family
Index: execve.2
===
RCS file: /cvs/src/lib/libc/sys/execve.2,v
retrieving revision 1.56
diff -u -p -r1.56 execve.2
--- execve.231 Mar 2022 17:27:16 - 1.56
+++ execve.223 Sep 2022 14:01:14 -
@@ -58,22 +58,19 @@
On Fri, Sep 23, 2022 at 12:10:45PM +0200, Claudio Jeker wrote:
> Linux is driving me nuts. The mix of net/, netinet/ includes and the need
> to also include some linux/ headers like linux/if.h and linux/in6.h result
> in absolute madness. Try to trim the includes in bgpd.h by defining our
> own
Linux is driving me nuts. The mix of net/, netinet/ includes and the need
to also include some linux/ headers like linux/if.h and linux/in6.h result
in absolute madness. Try to trim the includes in bgpd.h by defining our
own label size for route labels.
With this the net/route.h compat shim can
Errata patches for libexpat have been released for OpenBSD 7.0 and 7.1.
Binary updates for the amd64, i386 and arm64 platform are available
via the syspatch utility. Source code patches can be found on the
respective errata page:
https://www.openbsd.org/errata70.html
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