Re: arm: remove sa1/ixp12x0
On Sat, Mar 19, 2016 at 09:27:19AM +1100, Jonathan Gray wrote:
> On Fri, Mar 18, 2016 at 04:43:08PM +0100, Patrick Wildt wrote:
> > Hi,
> >
> > next up on the list is the StrongARM and IXP12x0.
> >
> > This diff removes most, but keeps the SA1100 headers,
> > which are still used by zaurus.
> >
> > Patrick
>
> Here is the diff I had:
>
> The only difference seems to be you've gone with
>
> #elif ARM_MMU_GENERIC == 1
>
> and I kept the != 0
>
> #elif (ARM_MMU_GENERIC) != 0
Yeah, I changed that to == 1 as there are no further calculations going
on anymore. As long as one of the versions goes in I'm happy.
>
> Index: arm/bus_space_asm_generic.S
> ===
> RCS file: /cvs/src/sys/arch/arm/arm/bus_space_asm_generic.S,v
> retrieving revision 1.2
> diff -u -p -r1.2 bus_space_asm_generic.S
> --- arm/bus_space_asm_generic.S 8 May 2009 02:57:31 - 1.2
> +++ arm/bus_space_asm_generic.S 18 Mar 2016 22:17:19 -
> @@ -50,7 +50,7 @@ ENTRY(generic_bs_r_1)
> ldrbr0, [r1, r2]
> mov pc, lr
>
> -#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
> +#if (ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
> ENTRY(generic_armv4_bs_r_2)
> ldrhr0, [r1, r2]
> mov pc, lr
> @@ -68,7 +68,7 @@ ENTRY(generic_bs_w_1)
> strbr3, [r1, r2]
> mov pc, lr
>
> -#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
> +#if (ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
> ENTRY(generic_armv4_bs_w_2)
> strhr3, [r1, r2]
> mov pc, lr
> @@ -96,7 +96,7 @@ ENTRY(generic_bs_rm_1)
>
> mov pc, lr
>
> -#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
> +#if (ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
> ENTRY(generic_armv4_bs_rm_2)
> add r0, r1, r2
> mov r1, r3
> @@ -144,7 +144,7 @@ ENTRY(generic_bs_wm_1)
>
> mov pc, lr
>
> -#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
> +#if (ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
> ENTRY(generic_armv4_bs_wm_2)
> add r0, r1, r2
> mov r1, r3
> @@ -192,7 +192,7 @@ ENTRY(generic_bs_rr_1)
>
> mov pc, lr
>
> -#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
> +#if (ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
> ENTRY(generic_armv4_bs_rr_2)
> add r0, r1, r2
> mov r1, r3
> @@ -240,7 +240,7 @@ ENTRY(generic_bs_wr_1)
>
> mov pc, lr
>
> -#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
> +#if (ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
> ENTRY(generic_armv4_bs_wr_2)
> add r0, r1, r2
> mov r1, r3
> @@ -287,7 +287,7 @@ ENTRY(generic_bs_sr_1)
>
> mov pc, lr
>
> -#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
> +#if (ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
> ENTRY(generic_armv4_bs_sr_2)
> add r0, r1, r2
> mov r1, r3
> @@ -319,7 +319,7 @@ ENTRY(generic_bs_sr_4)
> * copy region
> */
>
> -#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
> +#if (ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
> ENTRY(generic_armv4_bs_c_2)
> add r0, r1, r2
> ldr r2, [sp, #0]
> Index: arm/cpu.c
> ===
> RCS file: /cvs/src/sys/arch/arm/arm/cpu.c,v
> retrieving revision 1.24
> diff -u -p -r1.24 cpu.c
> --- arm/cpu.c 18 Mar 2016 13:16:02 - 1.24
> +++ arm/cpu.c 18 Mar 2016 22:17:20 -
> @@ -87,7 +87,6 @@ enum cpu_class {
> CPU_CLASS_ARM9ES,
> CPU_CLASS_ARM9EJS,
> CPU_CLASS_ARM10E,
> - CPU_CLASS_SA1,
> CPU_CLASS_XSCALE,
> CPU_CLASS_ARM11J,
> CPU_CLASS_ARMv7
> @@ -100,36 +99,6 @@ static const char * const generic_steppi
> "rev 12", "rev 13", "rev 14", "rev 15"
> };
>
> -static const char * const sa110_steppings[16] = {
> - "rev 0","step J", "step K", "step S",
> - "step T", "rev 5","rev 6","rev 7",
> - "rev 8","rev 9","rev 10", "rev 11",
> - "rev 12", "rev 13", "rev 14", "rev 15"
> -};
> -
> -static const char * const sa1100_steppings[16] = {
> - "rev 0","step B", "step C", "rev 3",
> - "rev 4","rev 5","rev 6","rev 7",
> - "step D", "step E", "rev 10""step G",
> - "rev 12", "rev 13", "rev 14", "rev 15"
> -};
> -
> -static const char * const sa1110_steppings[16] = {
> - "step A-0", "rev 1","rev 2","rev 3",
> - "step B-0", "step B-1", "step B-2", "step B-3",
> - "step B-4", "step B-5", "rev 10", "rev 11",
> - "rev 12", "rev 13", "rev 14", "rev 15"
> -};
> -
> -static const char * const ixp12x0_steppings[16] = {
> - "(IXP1200 step A)", "(IXP1200 step B)",
> - "rev 2",
arm: remove sa1/ixp12x0
Hi,
next up on the list is the StrongARM and IXP12x0.
This diff removes most, but keeps the SA1100 headers,
which are still used by zaurus.
Patrick
diff --git sys/arch/arm/arm/bus_space_asm_generic.S
sys/arch/arm/arm/bus_space_asm_generic.S
index b96ca4a..5e610e2 100644
--- sys/arch/arm/arm/bus_space_asm_generic.S
+++ sys/arch/arm/arm/bus_space_asm_generic.S
@@ -50,7 +50,7 @@ ENTRY(generic_bs_r_1)
ldrbr0, [r1, r2]
mov pc, lr
-#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
+#if (ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
ENTRY(generic_armv4_bs_r_2)
ldrhr0, [r1, r2]
mov pc, lr
@@ -68,7 +68,7 @@ ENTRY(generic_bs_w_1)
strbr3, [r1, r2]
mov pc, lr
-#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
+#if (ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
ENTRY(generic_armv4_bs_w_2)
strhr3, [r1, r2]
mov pc, lr
@@ -96,7 +96,7 @@ ENTRY(generic_bs_rm_1)
mov pc, lr
-#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
+#if (ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
ENTRY(generic_armv4_bs_rm_2)
add r0, r1, r2
mov r1, r3
@@ -144,7 +144,7 @@ ENTRY(generic_bs_wm_1)
mov pc, lr
-#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
+#if (ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
ENTRY(generic_armv4_bs_wm_2)
add r0, r1, r2
mov r1, r3
@@ -192,7 +192,7 @@ ENTRY(generic_bs_rr_1)
mov pc, lr
-#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
+#if (ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
ENTRY(generic_armv4_bs_rr_2)
add r0, r1, r2
mov r1, r3
@@ -240,7 +240,7 @@ ENTRY(generic_bs_wr_1)
mov pc, lr
-#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
+#if (ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
ENTRY(generic_armv4_bs_wr_2)
add r0, r1, r2
mov r1, r3
@@ -287,7 +287,7 @@ ENTRY(generic_bs_sr_1)
mov pc, lr
-#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
+#if (ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
ENTRY(generic_armv4_bs_sr_2)
add r0, r1, r2
mov r1, r3
@@ -319,7 +319,7 @@ ENTRY(generic_bs_sr_4)
* copy region
*/
-#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
+#if (ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
ENTRY(generic_armv4_bs_c_2)
add r0, r1, r2
ldr r2, [sp, #0]
diff --git sys/arch/arm/arm/cpu.c sys/arch/arm/arm/cpu.c
index c5cae81..593bdac 100644
--- sys/arch/arm/arm/cpu.c
+++ sys/arch/arm/arm/cpu.c
@@ -87,7 +87,6 @@ enum cpu_class {
CPU_CLASS_ARM9ES,
CPU_CLASS_ARM9EJS,
CPU_CLASS_ARM10E,
- CPU_CLASS_SA1,
CPU_CLASS_XSCALE,
CPU_CLASS_ARM11J,
CPU_CLASS_ARMv7
@@ -100,36 +99,6 @@ static const char * const generic_steppings[16] = {
"rev 12", "rev 13", "rev 14", "rev 15"
};
-static const char * const sa110_steppings[16] = {
- "rev 0","step J", "step K", "step S",
- "step T", "rev 5","rev 6","rev 7",
- "rev 8","rev 9","rev 10", "rev 11",
- "rev 12", "rev 13", "rev 14", "rev 15"
-};
-
-static const char * const sa1100_steppings[16] = {
- "rev 0","step B", "step C", "rev 3",
- "rev 4","rev 5","rev 6","rev 7",
- "step D", "step E", "rev 10""step G",
- "rev 12", "rev 13", "rev 14", "rev 15"
-};
-
-static const char * const sa1110_steppings[16] = {
- "step A-0", "rev 1","rev 2","rev 3",
- "step B-0", "step B-1", "step B-2", "step B-3",
- "step B-4", "step B-5", "rev 10", "rev 11",
- "rev 12", "rev 13", "rev 14", "rev 15"
-};
-
-static const char * const ixp12x0_steppings[16] = {
- "(IXP1200 step A)", "(IXP1200 step B)",
- "rev 2","(IXP1200 step C)",
- "(IXP1200 step D)", "(IXP1240/1250 step A)",
- "(IXP1240 step B)", "(IXP1250 step B)",
- "rev 8","rev 9","rev 10", "rev 11",
- "rev 12", "rev 13", "rev 14", "rev 15"
-};
-
static const char * const xscale_steppings[16] = {
"step A-0", "step A-1", "step B-0", "step C-0",
"step D-0", "rev 5","rev 6","rev 7",
@@ -206,16 +175,6 @@ const struct cpuidtab cpuids[] = {
{ CPU_ID_ARM1022ES, CPU_CLASS_ARM10E, "ARM1022E-S",
generic_steppings },
- { CPU_ID_SA110, CPU_CLASS_SA1, "SA-110",
- sa110_steppings },
- { CPU_ID_SA1100,CPU_CLASS_SA1, "SA-1100",
- sa1100_steppings },
- { CPU_ID_SA1110,CPU_CLASS_SA1, "SA-1110",
-
Re: arm: remove sa1/ixp12x0
On Fri, Mar 18, 2016 at 04:43:08PM +0100, Patrick Wildt wrote:
> Hi,
>
> next up on the list is the StrongARM and IXP12x0.
>
> This diff removes most, but keeps the SA1100 headers,
> which are still used by zaurus.
>
> Patrick
Here is the diff I had:
The only difference seems to be you've gone with
#elif ARM_MMU_GENERIC == 1
and I kept the != 0
#elif (ARM_MMU_GENERIC) != 0
Index: arm/bus_space_asm_generic.S
===
RCS file: /cvs/src/sys/arch/arm/arm/bus_space_asm_generic.S,v
retrieving revision 1.2
diff -u -p -r1.2 bus_space_asm_generic.S
--- arm/bus_space_asm_generic.S 8 May 2009 02:57:31 - 1.2
+++ arm/bus_space_asm_generic.S 18 Mar 2016 22:17:19 -
@@ -50,7 +50,7 @@ ENTRY(generic_bs_r_1)
ldrbr0, [r1, r2]
mov pc, lr
-#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
+#if (ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
ENTRY(generic_armv4_bs_r_2)
ldrhr0, [r1, r2]
mov pc, lr
@@ -68,7 +68,7 @@ ENTRY(generic_bs_w_1)
strbr3, [r1, r2]
mov pc, lr
-#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
+#if (ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
ENTRY(generic_armv4_bs_w_2)
strhr3, [r1, r2]
mov pc, lr
@@ -96,7 +96,7 @@ ENTRY(generic_bs_rm_1)
mov pc, lr
-#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
+#if (ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
ENTRY(generic_armv4_bs_rm_2)
add r0, r1, r2
mov r1, r3
@@ -144,7 +144,7 @@ ENTRY(generic_bs_wm_1)
mov pc, lr
-#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
+#if (ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
ENTRY(generic_armv4_bs_wm_2)
add r0, r1, r2
mov r1, r3
@@ -192,7 +192,7 @@ ENTRY(generic_bs_rr_1)
mov pc, lr
-#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
+#if (ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
ENTRY(generic_armv4_bs_rr_2)
add r0, r1, r2
mov r1, r3
@@ -240,7 +240,7 @@ ENTRY(generic_bs_wr_1)
mov pc, lr
-#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
+#if (ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
ENTRY(generic_armv4_bs_wr_2)
add r0, r1, r2
mov r1, r3
@@ -287,7 +287,7 @@ ENTRY(generic_bs_sr_1)
mov pc, lr
-#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
+#if (ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
ENTRY(generic_armv4_bs_sr_2)
add r0, r1, r2
mov r1, r3
@@ -319,7 +319,7 @@ ENTRY(generic_bs_sr_4)
* copy region
*/
-#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
+#if (ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
ENTRY(generic_armv4_bs_c_2)
add r0, r1, r2
ldr r2, [sp, #0]
Index: arm/cpu.c
===
RCS file: /cvs/src/sys/arch/arm/arm/cpu.c,v
retrieving revision 1.24
diff -u -p -r1.24 cpu.c
--- arm/cpu.c 18 Mar 2016 13:16:02 - 1.24
+++ arm/cpu.c 18 Mar 2016 22:17:20 -
@@ -87,7 +87,6 @@ enum cpu_class {
CPU_CLASS_ARM9ES,
CPU_CLASS_ARM9EJS,
CPU_CLASS_ARM10E,
- CPU_CLASS_SA1,
CPU_CLASS_XSCALE,
CPU_CLASS_ARM11J,
CPU_CLASS_ARMv7
@@ -100,36 +99,6 @@ static const char * const generic_steppi
"rev 12", "rev 13", "rev 14", "rev 15"
};
-static const char * const sa110_steppings[16] = {
- "rev 0","step J", "step K", "step S",
- "step T", "rev 5","rev 6","rev 7",
- "rev 8","rev 9","rev 10", "rev 11",
- "rev 12", "rev 13", "rev 14", "rev 15"
-};
-
-static const char * const sa1100_steppings[16] = {
- "rev 0","step B", "step C", "rev 3",
- "rev 4","rev 5","rev 6","rev 7",
- "step D", "step E", "rev 10""step G",
- "rev 12", "rev 13", "rev 14", "rev 15"
-};
-
-static const char * const sa1110_steppings[16] = {
- "step A-0", "rev 1","rev 2","rev 3",
- "step B-0", "step B-1", "step B-2", "step B-3",
- "step B-4", "step B-5", "rev 10", "rev 11",
- "rev 12", "rev 13", "rev 14", "rev 15"
-};
-
-static const char * const ixp12x0_steppings[16] = {
- "(IXP1200 step A)", "(IXP1200 step B)",
- "rev 2","(IXP1200 step C)",
- "(IXP1200 step D)", "(IXP1240/1250 step A)",
- "(IXP1240 step B)", "(IXP1250 step B)",
- "rev 8","rev 9","rev 10", "rev 11",
- "rev 12", "rev 13", "rev 14", "rev 15"
-};
-
static const char * const xscale_steppings[16] = {
"step A-0", "step A-1", "step B-0", "step C-0",
