If you haven't seen this yet:
http://www.ke5fx.com/HP_PN_seminar.pdf (7 MB)
... I'd strongly encourage you to check it out. The early part of the
document answers some of those questions pretty well.
-- john, KE5FX
-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]
Then for good measure, read this one:
http://www.ko4bb.com/Manuals/5)_GPS_Timing/John_Vig_Quartz_Crystal_Oscillato
r_Tutorial.pdf
Didier
-Original Message-
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On Behalf Of John Miles
Sent: Monday, April 28, 2008 1:15 AM
To:
Hello Don,
close-in phase noise within the PLL loop filter bandwidth in Synthesized
Signal Generators is a quality of the components used (among others), and the
optimization of the design.
For an output that is generated directly by the Oscillator (not a divider
chain, DDS etc) three
Don Collie jnr wrote:
I`m sorry, but I don`t understand what you mean in your second sentence
Bruce.
Thankyou for your comments, both!Don C.
Don
Rephrasing:
A VCO with a higher phase noise floor will have after division a higher
close in phase noise than a VCO
Two versions of the T'BoltMon software are available at the Trimble website.
V2.60 for the older Thunderbolt can be found at:
http://www.trimble.com/tmg_thunderbolt_ts.asp?Nav=Collection-2357
V3.16 for the Thunderbolt E can be found at:
http://www.trimble.com/thunderbolte_ts.asp
Both work
At this date I have no frequency standard at home.
I'd like to buy one FE-5650A Rb used unit (230US$ s/h included) so I will be
able to use it as a reference/comparation for my future DIY GPSDO.
BTW, I found interesting the provision to use the internal DDS to generate
different frequencies than
Don,
One effect I have observed on uP clock generators is that
fully differential circuits which utilize the crossover of
complementary signals are capable of lower jitter performance
than single ended circuits. At least 2 performance gains are
obvious;
1) the effective p-p swings are doubled
2)
Hello Bruce and all,
OK, now I think I understand : the more phase noise on the VCO, the more
jitter on the output of the divide by N.
This output spectrum comprises *only* the PRF+ close-in noise sidebands
[plus harmonics, and their noise sidebands]. Since the lowest frequency
Hi Don,
Any comparator or slicer has a noise density and a noise bandwidth.
The noise value of this slicer is the integral of the noise density
over the noise bandwidth. The noise bandwidth is the slicer
bandwidth, not the slicer frequency. Due to the slope, thus the slew
rate, of the
Elio,
I have an FE-5650A, and am very pleased with it. Yes, it will operate on
any frequency from 0 to nearly 20MHz, but I think it will depend on
which option you get. Mine was an Opt 58 I think, which originally had
outputs at 8.388688MHz and 1pps. It is now modified to add a serial link
for
Given the low prices Thunderbolts have been selling for lately, I believe
most people are better off with one of those, or a similar high-quality GPS
slock. If you expect very poor GPS coverage with lots of complete signal
dropouts, then perhaps an Rb-based standard makes more sense.
-- john,
Just bought a
Zeta Labs X76 Multiplier 7600 MHz Output Model 5856-01
on ebay. Anybody have any info on these? What kind of drive should I give it?
Thanks,
Matt
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I don't have a Thunderbolt, but I do have a Z3801A.
It's running off a 48V 1.6A switcher.
Idle (no Z3801A)
4W, 6VA
Normal (after warmup)
20W, 33VA
During warmup
35W, 51VA
Measurements are at the wall, using a Kill-A-Watt. They are down around $20
now.
--
These are my opinions, not
Don
Don Collie jnr wrote:
Hello Bruce and all,
OK, now I think I understand : the more phase noise on the VCO, the more
jitter on the output of the divide by N.
This output spectrum comprises *only* the PRF+ close-in noise sidebands
[plus harmonics, and their noise sidebands]. Since
Matt Ettus wrote:
Just bought a
Zeta Labs X76 Multiplier 7600 MHz Output Model 5856-01
on ebay. Anybody have any info on these? What kind of drive should I give
it?
Thanks,
Matt
Matt,
You'll be very lucky to find data for an old exotic beast like that. It looks
like a step
My thunderbolt power measurements:
Voltage Current (Trimble spec) Actual (during warm-up) Actual (in
operation)
+12 V 750 mA 530 mA 160 mA
+5 V 400 mA 260 mA 260 mA
-12 V 10 mA 3 mA 3 mA
/tvb
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time-nuts mailing list --
Henk ten Pierick wrote:
Hi Don,
Any comparator or slicer has a noise density and a noise bandwidth.
The noise value of this slicer is the integral of the noise density
over the noise bandwidth. The noise bandwidth is the slicer
bandwidth, not the slicer frequency. Due to the slope,
Don Collie jnr wrote:
Hello Bruce and all,
OK, now I think I understand : the more phase noise on the VCO, the more
jitter on the output of the divide by N.
This output spectrum comprises *only* the PRF+ close-in noise sidebands
[plus harmonics, and their noise sidebands]. Since the
I worked for Zeta Labs many years ago. This multiplier
undoubtedly has a step recovery diode that is being driven
at a level of a good watt or two. In most cases there was
a hefty transistor to make this power. You probably need
+10 dBm or so to drive it, maybe as much as +20 dBm. Take
the
Thanks Rick. My main reason for buying this is to be able to better
measure the phase noise of my 100 MHz oscillator. I figured this
would give a truer measure than a brick since there is no PLL
involved. But then I thought there might be too much filtering going
on. If the filters are at
Usually bricks are good for at least a few MHz either side of the sweet
spot. There's little incentive for the manufacturer to install an expensive
crystal filter. I'd just sweep it by hand with an 8640B or something like
that, to verify the frequency and power levels it wants to see.
BTW, I
Does anyone have a manual or at least a schematic for
an HP-5085A back-up power supply?
I searched the web and didn't find anything. That doesn't
mean it's there, just that I was unable to find it!
Thanks in advance,
-Brian, WA1ZMS
___
time-nuts
This is a complicated question. First of all, there is definitely
no crystal filter involved. However, the multiplier can have its
own phase noise due to either the amplifier or the SRD. There can
also be AM to PM conversion and vice versa. I have found the
technique of multiplying a source to
So to summarise : To make a synthesiser`s phase noise low :
- Apply the KIS principle [Keep It Simple]
- Use high speed [non-saturating?] logic rather than low
- The logic supplies should be well regulated, distributed
and decoupled.
- Make the PRF to the P/F detector as high as
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