Hi
So everything is inside a 10 ms sdev except:
UBLOX LEA-6T NMEA at 11.1 ms (Binary is much better)
Adafruit Ultimate at 39.8 ms
Neither one of those are really surprising. NMEA is not the best thing on uBlox.
The specs on the Adafruit part have never made much sense for timing. Somebody
was
Hi
> On Jul 27, 2016, at 12:57 PM, Ron Ott wrote:
>
> There might be two Qs: one relating to the axil rotation and another
> concerning the volume behavior of the earth as a giant bowl of Jello. But
> you'd have to figure out how to really slam the planet to excite the
Neville Michie wrote:
> The conical pendulum has a simple form of a weight on a string, instead
> of oscillating in one plane as a conventional pendulum, it swings around
> in a circular orbit in the horizontal plane. It has a definite resonant
> frequency.
I don't think it
Yo Mark!
On Thu, 28 Jul 2016 02:13:09 +
Mark Sims wrote:
> I found what was causing the apparent ramps in the message offset
> time for the Motorola mode receivers and the Z38xx receivers.
And the problem was?
RGDS
GARY
There might be two Qs: one relating to the axil rotation and another concerning
the volume behavior of the earth as a giant bowl of Jello. But you'd have to
figure out how to really slam the planet to excite the entire volume.
Earthquakes are probably too wimpy.
Ron
From: Chris Caudle
The Skylab is effectively useless for sub-second timing. The message arrival
time periodically jumps around, up to +/- 300 msecs. There are a couple of
values that it seems to prefer, but any value can be seen.
NMEA works a lot better on most receivers that I expected. They send several
Lady Heather keeps the date/time time in two sets of variables. One is the
receiver time message values in UTC (or GPS) time. The other is local time
(UTC/GPS adjusted for time zone or time scale) that is used for the clock
displays. There are integer year,month,day, hours,minutes,seconds
On Thu, 28 Jul 2016 14:06:09 -0700
Alex Pummer wrote:
> On 7/28/2016 11:03 AM, Attila Kinali wrote:
> > On Fri, 22 Jul 2016 08:19:43 + (UTC)
> > Bruce Griffiths wrote:
> >
> >> No, the first one merely uses a pair of cascaded heterodyne PLLs
>
Hi,
Been a while since I visited, I recall there are many, well, time nuts here. I
am trying to track down a source of phase noise in a frequency synthesizer
design. One part of the frequency reference upconverts a DDS and then divides
it down again using a digital divider - standard
Hi Guys,
This is a little outside of time-nuts scope, but not by much. I'm interested
in finding the time between two rising edges above a set threshold with
preferably nS or high ps timing accuracy. Can this be simply done with a few
programmed Microchip PICs or with a good short term OCXO
if you send the circuit to me Attila, I would try to help you
73
KJ6UHN
Alex
by the way aside of that ham license, I have some fifty years of
experience and also an MSEE
On 7/28/2016 11:03 AM, Attila Kinali wrote:
On Fri, 22 Jul 2016 08:19:43 + (UTC)
Bruce Griffiths
http://users.megapathdsl.net/~hmurray/time-nuts/T2-hist.png
24K samples from KS-24361
200K samples from Z3801A
The systems collecting the data have 200-300 microsec peak-peak of clock
offset, mostly tracking daily temperature swings.
A major fraction of the timing difference is explained by
Hi All,
Tom gave me a nudge to look here - I hadn't been following this thread.
For those that don't know, I study pulsars and so the way we measure what
pulsars do could be relevant to this discussion.
First, I have never heard of a Q measure when referencing a pulsar. I think
the key here is
Diophantine Frequency Synthesizer Design for Timekeeping Systems
| |
| | | | | | | |
| Diophantine Frequency Synthesizer Design for Timekeepi...Abstract Diophantine
Frequency Synthesis (DFS), a number-theoretic approach to the design of very
high resolution frequency synthesizers,
Taking a look for it also turned up a recent time-nuts thread
https://www.febo.com/pipermail/time-nuts/2016-May/097801.html
On Thursday, 28 July 2016, Scott Stobbe wrote:
> There was a pic app note on alternate uses for the cap sense block a while
> back, not sure it
Hi
If you have a need to do < 1 ns with a counter approach, the counter will need
to have a GHz clock in it. If you want to use an MCU counter, it will need to
have a GHz level clock routed to it. You are unlikely to find an MCU that will
do that. An FPGA can get you to 1.25 ns with direct
There was a pic app note on alternate uses for the cap sense block a while
back, not sure it that it will push you into the ps.
On Thursday, 28 July 2016, Jerome Blaha wrote:
> Hi Guys,
>
> This is a little outside of time-nuts scope, but not by much. I'm
>
On Fri, 22 Jul 2016 08:19:43 + (UTC)
Bruce Griffiths wrote:
> No, the first one merely uses a pair of cascaded heterodyne PLLs
> as shown on p3 of the manual.
Ok. I tried to understand how this circuit works. While I can see
how a small and precise frequency
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