Hi

If you have a need to do < 1 ns with a counter approach, the counter will need 
to have a GHz clock in it. If you want to use an MCU counter, it will need to 
have a GHz level clock routed to it. You are unlikely to find an MCU that will 
do that. An FPGA can get you to 1.25 ns with direct counting. With gate based 
delay line techniques you can get down below 100 ps in an FPGA. 

The other approach is to build a counter to get as fast as you practically can 
and then do an analog TDC to get a few more bits. 

There are a *lot* of messy details past all that.

Bob

> On Jul 28, 2016, at 7:12 PM, Jerome Blaha <[email protected]> wrote:
> 
> Hi Guys,
> 
> This is a little outside of time-nuts scope, but not by much.  I'm interested 
> in finding the time between two rising edges above a set threshold with 
> preferably nS or high ps timing accuracy.  Can this be simply done with a few 
> programmed Microchip PICs or with a good short term OCXO clock?  The issue I 
> see is that a 10Mhz timing reference with 1 cycle difference in time yields 
> 100ns resolution, which is far too large, so maybe a PIC can solve this.
> 
> This weekend project would be a multi-element antenna array, each with a 
> super-fast response log peak power detector fed into several PICs for time of 
> arrival.  Whenever a nearby high energy RF pulse is detected, the time of 
> arrival between two antenna elements and hence the direction toward the TX 
> could be roughly computed.  Some typical log peak detectors have an 8ns input 
> pulse response time, so I'm hoping that rise times are similar between 
> multiple detectors, negating the delayed response.
> 
> There are time of arrival/AoA systems out there with synthetic doppler, 
> phased arrays, correlative interferometers, and phase comparators, but it 
> would be interesting to accomplish super wideband AoA timing on two rising 
> pulses with relatively cheap parts. 
> 
> Thanks,
> 
> -Jerome
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