I am using Leo Bodnar's GPSDO that is based on the 5328 and what looks to
be a good TCXO as an external reference clock for a Perseus SDR. Using
that, I measured phase noise and Allan Deviation of the best sources I have
available and found the phase noise and Allan Deviation to be close to what
ha
Hi Mark --
Thanks! To clarify, when you say you've found "it" acceptable, you're
referring to the 5328?
What caught my eye about the 5351 was the three (or eight) outputs. My
idea was to build a board that would provide independent LO oscillators
for multiple VHF/UHF transverters. It look
On Jan 19, 2018 6:01 AM, "John Ackermann N8UR" wrote:
> Sorry to hijack the thread, but the Si5351 looks interesting for another
> project I'm working on. I know it specifies "low jitter" but has anyone
> looked at the phase noise? Is it usable for RF applications?
>
Datasheet states jitter i
Sorry to hijack the thread, but the Si5351 looks interesting for another
project I'm working on. I know it specifies "low jitter" but has anyone
looked at the phase noise? Is it usable for RF applications?
Thanks,
John
On 01/18/2018 08:53 AM, D. Jeff Dionne wrote:
Chris,
You don't nee
Chris,
You don't need to do that. The SiLabs part will accept the 10MHz sin from an
OCXO directly into the XA pin. That pin normally connects to a crystal, so
there is a high gain amp in the chip to square it up already... I did the tests
a while back, see the thread here:
https://www.silabs
Hi
Depending on the noise floor of the phase detector (which probably is not super
duper), even the noise *inside* the PLL bandwidth may not be all that great.
Bob
> On Jan 8, 2018, at 2:23 PM, Bruce Griffiths
> wrote:
>
> Yes, but the PN noise (outside the PLL bandwidth) will be much higher
Yes, but the PN noise (outside the PLL bandwidth) will be much higher than with
a classical multiplier.
Bruce
>
> On 09 January 2018 at 02:14 Chris Wilson wrote:
>
> Hello Bruce, Sorry, this went to you direct as well, in error.
>
> Thanks for the very fast reply! Would it be pos
On Mon, 8 Jan 2018 13:14:16 +
Chris Wilson wrote:
> Thanks for the very fast reply! Would it be possible to use one of
> these frequency multiplier IC's? Sounds simpler, but maybe there are
> down sides?
>
> http://uk.farnell.com/on-semiconductor/nb3n502dg/pll-clock-multiplier-8soic/dp/21018
Hello Bruce, Sorry, this went to you direct as well, in error.
Thanks for the very fast reply! Would it be possible to use one of
these frequency multiplier IC's? Sounds simpler, but maybe there are
down sides?
http://uk.farnell.com/on-semiconductor/nb3n502dg/pll-clock-multiplier-8soic/dp/2101849
Divide the 10MHz by 2 and use a filter to extract the fifth harmonic from the
5MHz square wave output.
Amplify the 25MHz output from the filter if required...
Bruce
>
> On 09 January 2018 at 00:31 Chris Wilson wrote:
>
> 08/01/2018 11:28
>
> Is there an easy way to get 25 or 27
08/01/2018 11:28
Is there an easy way to get 25 or 27 MHz from my Trimble Thunderbolt
as a reference clock at 1v P to P square wave for a Si5351a
synthesizer chip please? I have the David Partridge divider board from
way back that is still going strong, but 25 MHz is not an option as it
divide
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