Yes, but the PN noise (outside the PLL bandwidth) will be much higher than with 
a classical multiplier.

Bruce

> 
>     On 09 January 2018 at 02:14 Chris Wilson <[email protected]> wrote:
> 
>     Hello Bruce, Sorry, this went to you direct as well, in error.
> 
>     Thanks for the very fast reply! Would it be possible to use one of
>     these frequency multiplier IC's? Sounds simpler, but maybe there are
>     down sides?
> 
>     
> http://uk.farnell.com/on-semiconductor/nb3n502dg/pll-clock-multiplier-8soic/dp/2101849
> 
>     on 08/01/2018 13:11 you wrote:
> 
>         > > 
> >         Divide the 10MHz by 2 and use a filter to extract the fifth
> >         harmonic from the 5MHz square wave output.
> > 
> >         Amplify the 25MHz output from the filter if required...
> > 
> >         Bruce
> > 
> >         On 09 January 2018 at 00:31 Chris Wilson <[email protected]> 
> > wrote:
> > 
> >         08/01/2018 11:28
> > 
> >         Is there an easy way to get 25 or 27 MHz from my Trimble Thunderbolt
> >         as a reference clock at 1v P to P square wave for a Si5351a
> >         synthesizer chip please? I have the David Partridge divider board 
> > from
> >         way back that is still going strong, but 25 MHz is not an option as 
> > it
> >         divides only. Thanks, please keep replies to the level an idiot 
> > might
> >         comprehend :)
> > 
> >         --
> >         Best Regards,
> >         Chris Wilson.
> >         mailto: [email protected]
> > 
> >     > 
>     --
>     Best Regards,
>     Chris Wilson.
> 
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