On 11/22/21 10:25 AM, Andy Talbot wrote:
But you don't need a DDS route to get 1 PPS from any frequency that is an
exact multiple of 1Hz.
I clock a PIC with 10MHz from a master reference. An interrupt is
generated at an exact submultiple of this, and additional code outputs a
pulse every 25
On 11/22/21 10:19 AM, Gerhard Hoffmann wrote:
Am 22.11.21 um 18:31 schrieb Erik Kaashoek:
Some time ago I needed a output at 10,00.001Hz so I tried to do
that with a SI5351.
Using pure integer math (as the PLL and divider register are
integers) i search for a combination of 3
But you don't need a DDS route to get 1 PPS from any frequency that is an
exact multiple of 1Hz.
I clock a PIC with 10MHz from a master reference. An interrupt is
generated at an exact submultiple of this, and additional code outputs a
pulse every 25 clocks (clock freq = Fosc / 4)
Or from
On 11/22/21 8:52 AM, Jeremy Elson wrote:
I did not see any such setting in the Rigol, but I'll check again. in April
I did write to Rigol to report the problem and had the following (abridged)
conversation with support:
Me:
"I recently tried to use your DG1022Z signal generator to generate one
The frequency setting error is the clock frequency divided by the
accumulator length, at least in a DDS
If it has a 32 bit NCO clocked at 200Mhz, the setting error will be
200MHz/2^32 = 0.046Hz.
Max possible error will be 2^-32 of te hclock.
Not sure how that AWG would be set up, but if you can
Some time ago I needed a output at 10,00.001Hz so I tried to do that
with a SI5351.
Using pure integer math (as the PLL and divider register are integers) i
search for a combination of 3 divider/multipliers that gave the least error.
If the reference frequency is not integer related to the
Andy,
I was thinking in the same direction - the device can create arbitrary
waveforms so they're almost certainly using DDS. So I assumed it was some
sort of round-off error. I just can't quite convince myself of this because
it seems like round-off errors would be bigger, i.e. an error of one
Could the Rigol be using a DDS / NCO lookup approach to its frequency
generation? In which case you'll be subject to rounding errors on the DDS
increment, whose maximum magnitude will be dependent on the register
length.
Andy
www.g4jnt.com
On Mon, 22 Nov 2021 at 16:53, Jeremy Elson wrote:
I did not see any such setting in the Rigol, but I'll check again. in April
I did write to Rigol to report the problem and had the following (abridged)
conversation with support:
Me:
"I recently tried to use your DG1022Z signal generator to generate one
pulse-per-second (pulse mode, frequency
Jeremy Elson writes:
> [...] I plugged an RbXO into the DG1022Z and simply asked the
> DG1022Z to divide it down to a 1pps signal. That is, I configured it to
> create a pulse with a small duty cycle and 1hz frequency using the external
> clock as a reference. To my surprise, it
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