Hello!
I am trying to activate watchdog timer on my tcm-bf537 platform, but when I do
this, I have a copmpiling error. And I really don't know what to do.
u-Boot: u-boot-2011.09
---
My steps are:
1. Add
#define CONFIG_WATCHDOG
to ./include/configs/tcm-bf537.h
2. make tcm-bf537
Hi all,
I was able to compile u-boot (I retrieved the last revision by git) for FADS
board, load it on the board and then to boot it on the board!
Then I set a ethernet address, IP address, mask ...
I had a problem with the fast ethernet controller (FEC): after launching the
ping command the
Hello Heiko,
On Wed, Oct 5, 2011 at 4:28 PM, Heiko Schocher h...@denx.de wrote:
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Albert ARIBAUD albert.u.b...@aribaud.net
Cc: Sandeep Paulraj s-paul...@ti.com
---
Makefile | 8 +++-
On 10/06/2011 12:50 AM, Anatolij Gustschin wrote:
Hi Stefano,
On Wed, 28 Sep 2011 11:21:15 +0200
Stefano Babic sba...@denx.de wrote:
The framebuffer driver for MX5 is based on CONFIG_LCD.
In the current implementation, there is a serious bug
because the required memory is allocated
Hello Christian,
Christian Riesch wrote:
Hello Heiko,
On Wed, Oct 5, 2011 at 4:28 PM, Heiko Schocher h...@denx.de wrote:
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Albert ARIBAUD albert.u.b...@aribaud.net
Cc: Sandeep Paulraj s-paul...@ti.com
---
Makefile
Dear Stefan Roese,
In message 201110060754.18167...@denx.de you wrote:
Acked-by: Stefan Roese s...@denx.de
Feel free to apply directly if this is easier for you.
Thanks, but actually the patch is incomplete; there is another similar
place that needs fixing, too.
Will send a v2 soon.
Best
On 10/06/2011 12:44 AM, Anatolij Gustschin wrote:
From: Stefano Babic sba...@denx.de
The framebuffer driver for MX5 is based on CONFIG_LCD.
In the current implementation, there is a serious bug
because the required memory is allocated before
relocation, but the driver knows only later which
On 10/06/2011 12:44 AM, Anatolij Gustschin wrote:
From: Stefano Babic sba...@denx.de
Pixel format defines must be available for boards to set up
the right display. Move them and export in a new file.
Signed-off-by: Stefano Babic sba...@denx.de
CC: Anatolij Gustschin ag...@denx.de
CC:
Dear Denis Konstantinov,
In message 309251317881...@web10.yandex.ru you wrote:
I am trying to activate watchdog timer on my tcm-bf537 platform, but when I
do this, I have a copmpiling error. And I really don't know what to do.
Did you read the error messages ?
On 10/06/2011 12:44 AM, Anatolij Gustschin wrote:
From: Marek Vasut marek.va...@gmail.com
Signed-off-by: Marek Vasut marek.va...@gmail.com
Signed-off-by: Stefano Babic sba...@denx.de
Signed-off-by: Anatolij Gustschin ag...@denx.de
---
V3: rebased to apply on top of previous changes
Dear Christian Riesch,
In message
CABkLObrZtiGdQEpP2sxdJy6PgDgb3qRszi8b7npBCHBYr9af=w...@mail.gmail.com you
wrote:
However, I had to add a gd-have_console = true; to the code above
since this is required due to commit
e3e454cd72f319908355427b1a3ae54b3dd53356.
I think this is a bad idea.
Dear Davide Gallo Cassarino,
In message 1317883643.25164.yahoomail...@web29706.mail.ird.yahoo.com you
wrote:
I was able to compile u-boot (I retrieved the last revision by git)
for FADS board, load it on the board and then to boot it on the board!
Which exact configuration did you use?
Hi Stefano,
On Thu, 06 Oct 2011 09:57:44 +0200
Stefano Babic sba...@denx.de wrote:
On 10/06/2011 12:44 AM, Anatolij Gustschin wrote:
From: Marek Vasut marek.va...@gmail.com
Signed-off-by: Marek Vasut marek.va...@gmail.com
Signed-off-by: Stefano Babic sba...@denx.de
Signed-off-by:
Hi Ilya,
On 10/06/11 01:42, Ilya Yanok wrote:
This patch adds support for the HTKW mcx AM3517-based board.
Serial, Ethernet, NAND and MMC are supported.
Signed-off-by: Ilya Yanok ya...@emcraft.com
---
MAINTAINERS |4 +
board/htkw/mcx/Makefile | 44 +
Some Davinci processors supports the Application
Image Script (AIS) boot process. The patch adds the generation
of the AIS image inside the mkimage tool to make possible
to generate a bootable U-boot without external tools
(TI Davinci AIS Generator).
Signed-off-by: Stefano Babic sba...@denx.de
On 10/06/11 01:42, Ilya Yanok wrote:
This patch adds support for the HTKW mcx AM3517-based board.
Serial, Ethernet, NAND and MMC are supported.
Signed-off-by: Ilya Yanok ya...@emcraft.com
---
This patch looks dependent on the:
[RFC PATCH 0/0] Support for DaVinci EMAC on TI AM35xx
series
The 'time' command runs and reports execution time of commands.
Sample usage:
u-boot# time crc 0x1000 1000
CRC32 for 1000 ... 1fff == ae94dc4b
time: 0.004 seconds, 4 ticks
Signed-off-by: Che-Liang Chiou clch...@chromium.org
---
Changes Since V1
Hi Mike,
Thanks for comments. Reply inlined.
On Thu, Oct 6, 2011 at 1:24 AM, Mike Frysinger vap...@gentoo.org wrote:
On Wednesday 05 October 2011 03:09:15 Che-Liang Chiou wrote:
The 'time' command runs and reports execution time of commands.
cool
Sameple usage:
typo: Sample
Done.
---
Sorry, I'll be more precise:
FADS board with mpc8xx and the command to obtain u-boot.bin was:
make FADS860T_config
make
and setting ARCH=powerpc, CROSS_COMPILE=ppc_8xx-
Thanks!
Da: Wolfgang Denk w...@denx.de
A: Davide Gallo Cassarino davidega...@yahoo.com
Dear Davide Gallo Cassarino,
In message 1317891128.83717.yahoomail...@web29706.mail.ird.yahoo.com you
wrote:
FADS board with mpc8xx and the command to obtain u-boot.bin was:
make FADS860T_config
Hm... the FADS860T has been orphaned for a number of years. I have to
admit that I'm actually
On 10/04/2011 07:45 AM, Lukasz Majewski wrote:
I2C or SPI PMIC devices can be accessed.
Separate files: pmic_i2c.c and pmic_spi.c are responsible
for handling transmission over I2C or SPI bus.
New flags:
CONFIG_PMIC - enable PMIC general device.
CONFIG_PMIC_I2C/SPI - specify the interface
Add generic header files support for nds32 architecture.
Cache, ptregs, data type and other definitions are included.
Signed-off-by: Macpaul Lin macp...@andestech.com
---
Changes for v1-v4:
- Code cleanup and style formatting.
Changes for v5-v6:
- This patch also updated the following changes
Add NDS32 support into common header file.
Signed-off-by: Macpaul Lin macp...@andestech.com
---
Changes for v1-v7:
- No change
Changes for v8:
- Fix the patch according to dependency of x86's Fix
Changes for v9-v15:
- No change
include/common.h |4
1 files changed, 4
Add N1213 cpu core (N12 Core family) support for NDS32 arch.
This patch includes start.S for the initialize procedure of N1213.
Start procedure:
start.S will start up the N1213 CPU core at first,
then jump to SoC dependent lowlevel_init.S and
watchdog.S to configure peripheral devices.
SoC ag101 is the first chip using NDS32 N1213 cpu core.
Add header file of device offset support for SoC ag101.
Add main function of SoC ag101 based on NDS32 n1213 core.
Add lowlevel_init.S and other periphal related code.
This version of lowlevel_init.S also replace hardcode value
by MARCO
Add Makefile, board.c, interrupts.c and bootm.c functions
to nds32 architecture.
Signed-off-by: Macpaul Lin macp...@andestech.com
---
Changes for v1-v4:
- code clean up and formatting style.
Changes for v5-v6:
- board.c
- Do some clean up and add code
- Remove display banner which
Add standalone program related support for nds32 architecture.
Signed-off-by: Macpaul Lin macp...@andestech.com
---
Changes for v1-v6:
- code clean up.
Changes for v7-v11:
- No change.
Changes for v12:
- clean up for linker script.
Changes for v13-v15:
- No change.
Add support of NDS32 to common commands bdinfo, bootm, and image format.
Signed-off-by: Macpaul Lin macp...@andestech.com
---
Changes for v1-v6:
- Code clean up
Changes for v7-v9:
- No Change.
Changes for v10:
- fix up according to the changes in master tree.
Changes for v11:
- No Change.
Add evaluation board adp-ag101 configuration file adp-ag101.h.
Add adp-ag101.c board config and related settings.
Add board adp-ag101 into boards.cfg
Signed-off-by: Macpaul Lin macp...@andestech.com
---
Changes for v1-v4:
- code clean up
Changes for v5-v6:
- Refine the definitions and
Documents and READMEs for NDS32 architecture.
It patch also provides usage of SoC AG101 and board ADP-AG101.
Signed-off-by: Macpaul Lin macp...@andestech.com
---
Changes for v1-v10:
- The patch of documentation was not included.
Changes for v11:
- Add the documents of NDS32, ag101, N1213.
Hi Stefano,
I suppose you are talking about cases like the following:
#define CONFIG_SPI_FLASH_CS (1 | 121 8)
Yes, this construct will cause range overflow.
+struct p_spi {
+ unsigned char cs;
+ unsigned char mode;
+ unsigned char bitlen;
Therefore the above
On 10/06/2011 01:13 PM, Lukasz Majewski wrote:
Hi Stefano,
Hi Lukasz,
I suppose you are talking about cases like the following:
#define CONFIG_SPI_FLASH_CS (1 | 121 8)
Yes, this construct will cause range overflow.
+struct p_spi {
+unsigned char cs;
+unsigned
I2C or SPI PMIC devices can be accessed.
Separate files: pmic_i2c.c and pmic_spi.c are responsible
for handling transmission over I2C or SPI bus.
New flags:
CONFIG_PMIC - enable PMIC general device.
CONFIG_PMIC_I2C/SPI - specify the interface to be used.
Signed-off-by: Lukasz Majewski
Hi Stefano,
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).o
+
+COBJS := tt01.o
+# reuse the mx31pdk low-level setup
+SOBJS := ../../freescale/mx31pdk/lowlevel_init.o
It is always a good idea to reuse code, but taking it to another board
seems hackish. Your board
On 10/06/2011 03:07 PM, Helmut Raiger wrote:
Hi Stefano,
Hi Helmut,
Reading this file I do not see (except setting the AIPS) no good reason
to write this part in assembly. Everything can be done for example in
board_early_init_f, and even better we can rationalize this code and put
it
Hello,
I'm creating a configuration for a board that uses an AT91RM9200
and I'm getting unresolved linker errors concerning the i2c functions
(i2c_write/read/probe/init).
I know that the I2C peripheral for this SoC is buggy and am looking for
a GPIO bus option - does this exist in u-boot, or do
Hi Marek,
On Tue, Oct 4, 2011 at 8:07 PM, Marek Vasut marek.va...@gmail.com wrote:
On Tuesday, October 04, 2011 08:35:10 AM Lei Wen wrote:
Previous magic number is hard to parse its meaning, change it to
respective macro definition
Signed-off-by: Lei Wen lei...@marvell.com
[..]
---
Hi,
Le 06/10/2011 17:00, Jamie Risk a écrit :
I'm creating a configuration for a board that uses an AT91RM9200
and I'm getting unresolved linker errors concerning the i2c functions
(i2c_write/read/probe/init).
I know that the I2C peripheral for this SoC is buggy and am looking for
a GPIO
On 10/05/2011 07:13 PM, Marek Vasut wrote:
Introduce CONFIG_SPL_NO_CPU_SUPPORT_CODE to avoid compiling the CPU support
library. This can be useful on some setups.
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev
On Wed, Oct 5, 2011 at 10:45 PM, Heiko Schocher h...@denx.de wrote:
similiar to commit dc7cd8e59ba077f3b4c1a4557c9cd86a31b9ab1f, only
adapted for the new spl framework.
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Scott Wood scottw...@freescale.com
Cc: Albert ARIBAUD
On Thursday, October 06, 2011 05:10:32 PM Lei Wen wrote:
Hi Marek,
On Tue, Oct 4, 2011 at 8:07 PM, Marek Vasut marek.va...@gmail.com wrote:
On Tuesday, October 04, 2011 08:35:10 AM Lei Wen wrote:
Previous magic number is hard to parse its meaning, change it to
respective macro definition
On 10/04/2011 11:32 AM, Jon Medhurst (Tixy) wrote:
From: Jon Medhurst jon.medhu...@linaro.org
The new IO FPGA implementation for Versatile Express contains an MMCI
(PL180) cell with the FIFO extended to 128 words. This causes the
read_bytes() function to go into an infinite loop; as it will
On Thu, 6 Oct 2011 00:44:14 +0200
Anatolij Gustschin ag...@denx.de wrote:
From: Stefano Babic sba...@denx.de
The framebuffer driver for MX5 is based on CONFIG_LCD.
In the current implementation, there is a serious bug
because the required memory is allocated before
relocation, but the
On Thu, 6 Oct 2011 00:44:15 +0200
Anatolij Gustschin ag...@denx.de wrote:
From: Stefano Babic sba...@denx.de
Pixel format defines must be available for boards to set up
the right display. Move them and export in a new file.
Signed-off-by: Stefano Babic sba...@denx.de
CC: Anatolij
On Thu, 6 Oct 2011 00:44:16 +0200
Anatolij Gustschin ag...@denx.de wrote:
From: Marek Vasut marek.va...@gmail.com
Signed-off-by: Marek Vasut marek.va...@gmail.com
Signed-off-by: Stefano Babic sba...@denx.de
Signed-off-by: Anatolij Gustschin ag...@denx.de
---
V3: rebased to apply on top
Dear Lei Wen,
In message calzhosrhbf2vmu5olp3hwh4yq4xfip19ajd24gn4sy-rm6b...@mail.gmail.com
you wrote:
The ext_csd current usage in mmc.c is not too much, here I mean only few of
the fields of the ext_csd is used, also fully definition of ext_csd
member would seems so huge a structure at its
Dear Marek Vasut,
In message 201110060016.53891.marek.va...@gmail.com you wrote:
Dear Wolfgang Denk,
...
Applied, thanks.
You're thanking to yourself ? ;-)
Yes, I do. Sometimes I need that. Actually I think I should treat
myself not worse than anybody elase (well, at least not in
Dear Lei Wen,
In message 1317565013-22438-5-git-send-email-lei...@marvell.com you wrote:
Build pass with following config:
dkb_config
aspenite_config
edminiv2_config
openrd_ultimate_config
sheevaplug_config
mv88f6281gtw_ge_config
rd6281a_config
guruplug_config
km_kirkwood_config
This centralizes knowledge of MMC clocking into the MMC driver. This also
removes clock setup from the board files, which will simplify later changes
that modify the Harmony board to support the correct set of MMC controllers.
Signed-off-by: Stephen Warren swar...@nvidia.com
---
Note: These
Pass the GPIO numbers for power and card detect to tegra2_mmc_init(), and
modify that function to perform all required GPIO initialization. This
removes the need for board files to perform these operations.
Move board_mmc_getcd() into tegra2_mmc.c now that the driver knows which
GPIOs to use.
For Seaboard, this is mostly a cut/paste of board_mmc_init() and
pin_mux_mmc() into seaboard.c; pin_mux_mmc() was modified to add some
missing pinmux_tristate_disable calls for the GPIOs.
For Harmony, those functions were modified to configure SDMMC2 (index 2)
instead of SDMMC3 (index 1), since
Ventana is a board which is very similar to Seaboard. Support it by
re-using board/nvidia/seaboard/seaboard.c with minor run-time conditionals.
Signed-off-by: Stephen Warren swar...@nvidia.com
---
board/nvidia/seaboard/seaboard.c | 11 ++-
board/nvidia/ventana/Makefile| 55
Stephen Warren wrote at Friday, September 30, 2011 1:53 PM:
uImage files contain absolute load and entry addresses. Such a concept
is incompatible with using the same kernel image on multiple SoCs, each with
a potentially different SDRAM base. To support that, augment the FIT image
syntax with
Dear Laurence Withers,
In message e1r9lku-0002as...@rhodium.platinum.guralp.com you wrote:
The generated file asm-offsets.s may be found at various depths in the
arch subdirectories, so simply ignore it throughout the tree.
Signed-off-by: Laurence Withers lwith...@guralp.com
---
Dear Jason Cooper,
In message 1311715171-13128-2-git-send-email-u-b...@lakedaemon.net you wrote:
...
+ printf(CPU running @ %dMHz L2 running @ %dMHz\n,
+ cpu_clk, l2_clk);
+ printf(SysClock = %dMHz, TClock = %dMHz\n,
+ sys_clk, t_clk / 100);
Please use
Dear Jason Cooper,
In message 1311715171-13128-4-git-send-email-u-b...@lakedaemon.net you wrote:
Copied wholeheartedly from board/Marvell/guruplug and modified to add support
for SPI NOR flash.
...
+ /* command to read PHY dev address */
+ if (miiphy_read(name, 0xEE, 0xEE, (u16 *)
Dear =?UTF-8?q?Lo=C3=AFc=20Minier?=,
In message 1317635832-10764-2-git-send-email-loic.min...@linaro.org you wrote:
Tools such as mkimage include version information but are
config-agnostic; build timestamp_autogenerated.h even when config.mk
isn't generated to fix make tools build failure:
Dear =?UTF-8?q?Lo=C3=AFc=20Minier?=,
In message 1317635832-10764-3-git-send-email-loic.min...@linaro.org you wrote:
Generate timestamp_autogenerated.h as safely as version_autogenerated.h.
Cc: patc...@linaro.org
Signed-off-by: Loïc Minier loic.min...@linaro.org
---
Makefile |5 +++--
Dear =?UTF-8?q?Lo=C3=AFc=20Minier?=,
In message 1317635832-10764-4-git-send-email-loic.min...@linaro.org you wrote:
mkimage's ublimage support can't depend of build-time board configs;
instead, this should be set in ublimage.cfg. Since currently no configs
in u-boot override the NAND block
Dear Che-Liang Chiou,
In message
ce61e361e4b8456b9e0584a72f37d2e278ff2ab1.1317715598.git.clch...@chromium.org
you wrote:
This patch exports LCD and video information and bitmap-rendering
functions to external apps.
This patch is tested on a Seaboard, which does not have a video output.
So
Dear Che-Liang Chiou,
In message
11c2761c2883cf217a6efae98dccb83d19606927.1317715598.git.clch...@chromium.org
you wrote:
The functions for clearing and drawing bitmaps on the screen were not
exposed publicly and are made public in this patch in preparation for
implementing the display
Dear Lei Wen,
In message 1315455079-13051-1-git-send-email-lei...@marvell.com you wrote:
Previous output:
Marvell mmc part
Partition Map for MMC device 1 -- Partition Type: EFI
Part Start LBA End LBA
gpt1 0x8C000xCBFF
gpt2 0xCC000x57BFF
gpt3 0x57C000xA2BFF
gpt4
Dear Anton Staaf,
In message 1317763491-7274-2-git-send-email-robot...@chromium.org you wrote:
This macro is used to allocate cache line size aligned stack
buffers for use with DMA hardware.
Signed-off-by: Anton Staaf robot...@chromium.org
Acked-by: Mike Frysinger vap...@gentoo.org
Cc:
Dear Anton Staaf,
In message 1317763491-7274-3-git-send-email-robot...@chromium.org you wrote:
CONFIG_SYS_CACHELINE_SIZE is supposed to be defined for all
configs. But most configs do not specify it. This patch
will set CONFIG_SYS_CACHELINE_SIZE to a default value equal
to the GCC builtin
Dear Anton Staaf,
In message 1317763491-7274-4-git-send-email-robot...@chromium.org you wrote:
Signed-off-by: Anton Staaf robot...@chromium.org
Acked-by: Mike Frysinger vap...@gentoo.org
Cc: Tom Warren twarren.nvi...@gmail.com
Cc: Simon Glass s...@chromium.org
Cc: Mike Frysinger
Dear Anton Staaf,
In message 1317763491-7274-5-git-send-email-robot...@chromium.org you wrote:
Currently the sd_change_freq function allocates two buffers on the
stack that it passes down to the MMC device driver. These buffers
could be unaligned to the L1 dcache line size. This causes
Dear Anton Staaf,
In message 1317763491-7274-6-git-send-email-robot...@chromium.org you wrote:
Currently, if a device read request is done that does not begin or end
on a sector boundary a stack allocated bounce buffer is used to perform
the read, and then just the part of the sector that is
Dear Anton Staaf,
In message 1317763491-7274-7-git-send-email-robot...@chromium.org you wrote:
Currently the mmc_change_freq and mmc_startup functions allocates
buffers on the stack that are passed down to the MMC device driver.
These buffers could be unaligned to the L1 dcache line size.
Dear Anton Staaf,
In message 1317763491-7274-8-git-send-email-robot...@chromium.org you wrote:
Currently part_efi.c allocates buffers for the gpt_header, the
legacy_mbr, and the pte (partition table entry) that may be
incorrectly aligned for DMA operations.
This patch uses
Dear Michal Simek,
In message 1317020588-12083-1-git-send-email-mon...@monstr.eu you wrote:
Add support for SERIAL MULTI for uartlite.
Signed-off-by: Michal Simek mon...@monstr.eu
---
v2: Use in/out_be32 functions
v3: Clean coding style
v4: Simplify userial_ports array
gpio_free() should not have the side effect of setting the line to input since
this prevents the gpio command from being able to set a line as output.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
Cc: Joe Hershberger joe.hershber...@gmail.com
Cc: Sandeep Paulraj s-paul...@ti.com
---
Enable the gpio command
Configure the pads to allow access to the button on GPIO_121 and the 2 LEDS on
GPIO_7 and GPIO_8
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
Cc: Joe Hershberger joe.hershber...@gmail.com
Cc: Sandeep Paulraj s-paul...@ti.com
---
board/ti/panda/panda_mux_data.h
On Thu, Oct 6, 2011 at 04:38, Che-liang Chiou wrote:
On Thu, Oct 6, 2011 at 1:24 AM, Mike Frysinger wrote:
On Wednesday 05 October 2011 03:09:15 Che-Liang Chiou wrote:
+ cmd_tbl_t *target_cmdtp = NULL;
const
I guess I cannot change it to a const pointer. cmdtp-cmd() signature
requires
On Thu, Oct 6, 2011 at 04:33, Che-Liang Chiou wrote:
+ /*
+ * TODO(clchiou): get_timer_masked() is only defined in certain ARM
+ * boards. We could use the new timer API that Graeme is proposing
+ * so that this piece of code would be arch-independent.
+ */
Dear Michal Simek,
In message 1316094617-13657-1-git-send-email-mon...@monstr.eu you wrote:
Add axi_ethernet driver for little-endian Microblaze.
RX/TX BDs and rxframe buffer are shared among all axi_ethernet MACs.
Only one MAC can work in one time.
Signed-off-by: Michal Simek
Dear Stephen Warren,
In message 1317412383-7731-1-git-send-email-swar...@nvidia.com you wrote:
uImage files contain absolute load and entry addresses. Such a concept
is incompatible with using the same kernel image on multiple SoCs, each with
a potentially different SDRAM base. To support
Dear Stephen Warren,
In message 74cdbe0f657a3d45afbb94109fb122ff173a2c7...@hqmail01.nvidia.com you
wrote:
Wolfgang, does this change look like a reasonable approach?
Yes, looks good to me - with the nitpick of a bit more explicit
comment. See previous message.
What are your thoughts on the
gpio_free() should not have the side effect of setting the line to input since
this prevents the gpio command from being able to set a line as output.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
Cc: Joe Hershberger joe.hershber...@gmail.com
Cc: Sandeep Paulraj s-paul...@ti.com
---
Enable the gpio command
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
Cc: Joe Hershberger joe.hershber...@gmail.com
Cc: Sandeep Paulraj s-paul...@ti.com
---
Changes for v2:
- Correct a bad merge... sorry.
board/ti/panda/panda_mux_data.h |2 +-
include/configs/omap4_panda.h |
Wolfgang Denk wrote at Thursday, October 06, 2011 1:20 PM:
In message 74cdbe0f657a3d45afbb94109fb122ff173a2c7...@hqmail01.nvidia.com
you wrote:
Wolfgang, does this change look like a reasonable approach?
Yes, looks good to me - with the nitpick of a bit more explicit
comment. See
Dear Angelo Dureghello,
In message 4e882617.2070...@gmail.com you wrote:
Add support for mcf5307 based Sysam AMCORE open board.
Board main features:
cpu : Freescale mcf5307
flash : 4MB, nor, SST39VF3201B
sdram : 16M, MT48LC4M32B2
eth : 1 x dm9000e
rtc : ds1338, i2c
Dear Angelo Dureghello,
In message 4e882611.1080...@gmail.com you wrote:
Add support for mcf5307 cpu.
Signed-off-by: Angelo Dureghello sysa...@gmail.com
---
Changes for v5:
- updated to current remote master
arch/m68k/cpu/mcf530x/Makefile | 48 +++
Dear Stephen Warren,
In message 74cdbe0f657a3d45afbb94109fb122ff173a2c7...@hqmail01.nvidia.com you
wrote:
I suggest we define a new image type (say, IH_TYPE_KERNEL_REL) for
this purpose. This would probably cause the least conflicts.
OK. Wouldn't we also need e.g.
Dear Macpaul Lin,
In message 1317896723-9284-6-git-send-email-macp...@andestech.com you wrote:
Add standalone program related support for nds32 architecture.
Signed-off-by: Macpaul Lin macp...@andestech.com
---
Changes for v1-v6:
- code clean up.
Changes for v7-v11:
- No change.
Dear Macpaul Lin,
In message 1317896723-9284-5-git-send-email-macp...@andestech.com you wrote:
Add Makefile, board.c, interrupts.c and bootm.c functions
to nds32 architecture.
Signed-off-by: Macpaul Lin macp...@andestech.com
---
Changes for v1-v4:
- code clean up and formatting style.
Dear Macpaul Lin,
In message 1317896723-9284-4-git-send-email-macp...@andestech.com you wrote:
SoC ag101 is the first chip using NDS32 N1213 cpu core.
Add header file of device offset support for SoC ag101.
Add main function of SoC ag101 based on NDS32 n1213 core.
Add lowlevel_init.S and
Dear Macpaul Lin,
In message 1317896723-9284-3-git-send-email-macp...@andestech.com you wrote:
Add N1213 cpu core (N12 Core family) support for NDS32 arch.
This patch includes start.S for the initialize procedure of N1213.
Start procedure:
start.S will start up the N1213 CPU core at first,
Dear Macpaul Lin,
In message 1317896723-9284-1-git-send-email-macp...@andestech.com you wrote:
Add generic header files support for nds32 architecture.
Cache, ptregs, data type and other definitions are included.
Signed-off-by: Macpaul Lin macp...@andestech.com
---
Changes for v1-v4:
-
Dear Ilya Yanok,
In message 1317858127-16794-1-git-send-email-ya...@emcraft.com you wrote:
This patch adds support for the HTKW mcx AM3517-based board.
Serial, Ethernet, NAND and MMC are supported.
Signed-off-by: Ilya Yanok ya...@emcraft.com
---
MAINTAINERS |4 +
Dear Ilya Yanok,
In message 1317857806-16549-7-git-send-email-ya...@emcraft.com you wrote:
AM35xx has DaVinci-compatible EMAC.
Signed-off-by: Ilya Yanok ya...@emcraft.com
---
arch/arm/include/asm/arch-omap3/emac_defs.h | 57
+++
1 files changed, 57
Dear Ilya Yanok,
In message 1317857806-16549-3-git-send-email-ya...@emcraft.com you wrote:
On AM35xx CPPI RAM had different addresses when accessed from the CPU
and from the EMAC. We need to account this to deal with the buffer
descriptors correctly.
Signed-off-by: Ilya Yanok
Dear Ilya Yanok,
In message 1317857806-16549-2-git-send-email-ya...@emcraft.com you wrote:
DaVinci EMAC is found not only on DaVinci SoCs but on some OMAP3 SoCs
also. This patch moves common defines from arch-davinci/emac_defs.h to
drivers/net/davinci_emac.h
Signed-off-by: Ilya Yanok
Dear Joe Hershberger,
In message 1317856455-30829-2-git-send-email-joe.hershber...@ni.com you wrote:
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
Cc: Joe Hershberger joe.hershber...@gmail.com
Cc: Kim Phillips kim.phill...@freescale.com
---
arch/powerpc/cpu/mpc83xx/interrupts.c |
Wolfgang Denk wrote at Thursday, October 06, 2011 2:52 PM:
In message 74cdbe0f657a3d45afbb94109fb122ff173a2c7...@hqmail01.nvidia.com
you wrote:
I suggest we define a new image type (say, IH_TYPE_KERNEL_REL) for
this purpose. This would probably cause the least conflicts.
OK.
Dear Timur Tabi,
In message 1317841251-27295-3-git-send-email-ti...@freescale.com you wrote:
The work-around for P4080 erratum SERDES9 says that the SERDES receiver lanes
should be reset after the XAUI starts tranmitting alignment signals.
Signed-off-by: Timur Tabi ti...@freescale.com
---
Dear Hitz, Christian,
In message
CD1B567EF015FE41B29FF476B8600DDD26BBF25B89@vsrv-mail01.newtechgroup.local you
wrote:
This patch synchronizes the nand driver with the Linux 3.0 state.
Signed-off-by: Christian Hitz christian.h...@aizo.com
---
drivers/mtd/nand/nand_base.c | 578
Wolfgang Denk wrote:
WARNING: externs should be avoided in .c files
#114: FILE: board/freescale/corenet_ds/eth_p4080.c:100:
+ extern struct phy_driver tn2020_driver;
This is intentional. There's no header file for the teranetics driver, and
referencing the structure allows me to avoid
Dear Hitz, Christian,
In message
CD1B567EF015FE41B29FF476B8600DDD26BBF25B88@vsrv-mail01.newtechgroup.local you
wrote:
This patch merges the BCH ECC algorithm from the 3.0 Linux kernel.
This enables U-Boot to support modern NAND flash chips that
require more than 1-bit of ECC in software.
Dear Macpaul Lin,
In message 1317801394-18455-1-git-send-email-macp...@andestech.com you wrote:
From: Gavin Guo gavin...@andestech.com
FTPCI100 is a SoC PCI componenet of Faraday company.
Which is usually built into SoC chips for providing
embedded PCI functions.
Signed-off-by: Gavin Guo
Dear Tom Rini,
In message 1317740363-7033-2-git-send-email-tr...@ti.com you wrote:
This changes to making the board be responsible for providing a
memory initialization function for SPL and converts the existing
function to provide these services for devkit 8000. As part of this
suffix the
1 - 100 of 226 matches
Mail list logo
