Dear Tom,
In message 20140331195316.GZ16360@bill-the-cat you wrote:
I've pushed v2014.04-rc3 out to the repository and tarballs should exist
soon.
Tarball is out.
Thanks!
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235
Dear Masahiro,
In message 1396238924-12140-1-git-send-email-yamad...@jp.panasonic.com you
wrote:
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Wolfgang Denk w...@denx.de
---
arch/powerpc/cpu/mpc8xx/wlkbd.c | 20
1 file changed, 20 deletions(-)
delete
Hello,
This code was applied to u-boot-samsung few weeks ago.
On 03/31/2014 11:15 AM, Lukasz Majewski wrote:
Hi Marek,
On Monday, March 31, 2014 at 10:48:48 AM, Lukasz Majewski wrote:
From: Przemyslaw Marczak p.marc...@samsung.com
Thanks to this multiple calls of function
On Tuesday, April 01, 2014 at 08:47:05 AM, Przemyslaw Marczak wrote:
Hello,
This code was applied to u-boot-samsung few weeks ago.
Please do NOT top-post. Why did it arrive in the ML yesterday ?
On 03/31/2014 11:15 AM, Lukasz Majewski wrote:
Hi Marek,
On Monday, March 31, 2014 at
Dear Prabhakar Kushwaha,
Prabhakar Kushwaha prabhakar at freescale.com writes:
On 4/1/2014 4:40 AM, Rommel G Custodio wrote:
Dear Prabhakar Kushwaha,
Prabhakar Kushwaha prabhakar at freescale.com writes:
8 snipped 8
+#Flush PBL data
+091380c0 000F
That's a Wait command.
hi David,
I have checked the ARMv8's Architecture Reference Manual
DDI0487A_a_armv8_arm.pdf chapter C4.4.1
DC CISW, Data or unified Cache line Clean and Invalidate by Set/Way, u
can see the description as below:
SetWay, bits [31:4]
Contains two fields:
• Way, bits[31:32-A], the number of the
hi David,
On 04/01/2014 11:25 AM, feng...@phytium.com.cn wrote:
hi Leo,
Please reference ARMv8-TRM, the associativity field does not have
to be a power of 2. I made the same mistake with you previously and
scott identify this.
*发件人:* Leo Yan mailto:l...@marvell.com
*发送时间:*
Hi Marek,
On Monday, March 31, 2014 at 05:49:12 PM, Mateusz Zalega wrote:
Change-Id: Id1bab29ec026d83f7e811ba82802aad33f77bea0
Yes, definitely :-).
Those Change-Ids are a PITA.
You samsung guys need to fix your mailers ... and you need to learn
to write commit messages.
On Monday, March 31, 2014 at 11:09:14 PM, Troy Kisky wrote:
On 3/31/2014 12:47 PM, Marek Vasut wrote:
On Monday, March 31, 2014 at 09:38:02 PM, Otavio Salvador wrote:
On Mon, Mar 31, 2014 at 4:22 PM, Marek Vasut ma...@denx.de wrote:
On Monday, March 31, 2014 at 08:36:55 PM, Troy Kisky
Hi Marek,
On Tuesday, April 01, 2014 at 08:47:05 AM, Przemyslaw Marczak wrote:
Hello,
This code was applied to u-boot-samsung few weeks ago.
Please do NOT top-post. Why did it arrive in the ML yesterday ?
It was mine over-zeal :-). Sorry for confusion.
On 03/31/2014 11:15 AM, Lukasz
On 05/03/2014 20:01, Marek Vasut wrote:
When using HAB, there are additional special requirements on the placement of
U-Boot and the U-Boot SPL in memory. To fullfill these, this patch moves the
U-Boot binary a little further from the begining of the DRAM, so the HAB CST
and IVT can be placed
References to the wireless keyboard should also be removed
from README.console.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Wolfgang Denk w...@denx.de
---
Changes in v2:
- Fix README.console as Wolfgang suggested
arch/powerpc/cpu/mpc8xx/wlkbd.c | 20
On 06/03/2014 01:52, Marek Vasut wrote:
Add yet another OCOTP driver for this i.MX family. This time, it's a driver
for
the OCOTP variant found in the i.MX23 and i.MX28. This version of OCOTP is too
different from the i.MX6 one that I could not use the mxc_ocotp.c driver
without
making it
On 05/03/2014 20:01, Marek Vasut wrote:
This patch adds the groundwork for generating signed BootStream, which
can be used by the HAB library in i.MX28. We are adding a new target,
u-boot-signed.sb , since the process for generating regular non-signed
BootStream is much easier. Moreover, the
Hi Wolfgang,
On Tue, 01 Apr 2014 08:37:21 +0200
Wolfgang Denk w...@denx.de wrote:
Dear Masahiro,
In message 1396238924-12140-1-git-send-email-yamad...@jp.panasonic.com you
wrote:
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Wolfgang Denk w...@denx.de
---
On 22/03/2014 16:17, Eric Nelson wrote:
Use of PCIe on SABRE Lite and Nitrogen6x boards
is atypical and requires the use of custom daughter
boards.
Use in U-Boot is even rarer, so this patch removes it from
the standard configuration.
Signed-off-by: Eric Nelson
Am 2014-03-11 18:43, schrieb ste...@agner.ch:
From: Stefan Agner ste...@agner.ch
This patch series addresses several fixes and enhancements for the
vybrid tower.
snip
*Bump*, could we get an Ack on this?
Sorry about the missing thread/references, somehow my git format-patch
was
On 16/03/2014 22:20, Fabio Estevam wrote:
From: Fabio Estevam fabio.este...@freescale.com
CONFIG_BOOT_INTERNAL is not used anywhere, so let's remove it.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
--
On 23/03/2014 22:45, Marek Vasut wrote:
Implement a callback to toggle the slot power supply. The callback
can be overriden in case some more complex power supply for the slot
was implemented in hardware, yet for the usual case, one can define
a GPIO which toggles the power to the slot.
On 23/03/2014 22:45, Marek Vasut wrote:
Add support for PCIe on MX6 SabreSDP board and enable the support
in the config file.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Stefano Babic sba...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Liu Ying ying@freescale.com
---
On 28/03/2014 08:30, Marek Vasut wrote:
Fix memory access slowness on i.MX53 MX53QSB board. Let us inspect the
issue: First of all, the i.MX53 CPU has two memory banks mapped at
0x7000_ and 0xb000_ and each of those can hold up to 1GiB of
DRAM memory. Notice that the memory area is not
On 28/03/2014 08:30, Marek Vasut wrote:
The DRAM size can be easily detected at runtime on i.MX53. Implement
such detection on MX53QSB and adjust the rest of the macros accordingly
to use the detected values.
An important thing to note here is that we had to override the function
for
On 28/03/2014 08:31, Marek Vasut wrote:
The DRAM size can be easily detected at runtime on i.MX53. Implement
such detection on M53EVK and adjust the rest of the macros accordingly
to use the detected values.
An important thing to note here is that we had to override the function
for
On 28/03/2014 08:31, Marek Vasut wrote:
Fix memory access slowness on i.MX53 M53EVK board. Let us inspect the
issue: First of all, the i.MX53 CPU has two memory banks mapped at
0x7000_ and 0xb000_ and each of those can hold up to 1GiB of
DRAM memory. Notice that the memory area is not
On 19/03/2014 02:21, Marek Vasut wrote:
Add support for serial console into the i.MX23/i.MX28 SPL. A full,
uncrippled serial console support comes very helpful when debugging
various spectacular hardware bringup issues early in the process.
Because we do not use SPL framework, but have our own
On 19/03/2014 02:21, Marek Vasut wrote:
Set the GD pointer in the SPL to a defined symbol so various
functions from U-Boot can be used without adverse side effects.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Stefano Babic sba...@denx.de
---
Applied to u-boot-imx, thanks !
Best regards,
Hi Eric,
On 31/03/2014 22:02, Eric Bénard wrote:
Hi Stefano,
Le Sun, 30 Mar 2014 18:20:49 +0200,
Stefano Babic sba...@denx.de a écrit :
A general remark. I agree by reading the whole thread about checking at
runtime which is the running board (you do it getting the cpu type).
However,
Hi!
Actually socfpga board folder includes code to support both Cyclone V
and Arria V soc dev kit.
ok. I expect that you are talking about 2 completely different boards
which are here
http://www.altera.com/products/devkits/altera/kit-cyclone-v-soc.html
From: Kuo-Jung Su dant...@faraday-tech.com
It would be better to have strlcpy() moved to lib/string.c,
so that it could be reused by others without enabling
USB Gadget Ethernet.
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Albert Aribaud albert.u.b...@aribaud.net
CC: Wolfgang Denk
From: Kuo-Jung Su dant...@faraday-tech.com
These patches introduce Faraday A369 Virtual SoC platform support.
Here are some public documents for your reference.
http://www.faraday-tech.com/html/Product/SoCPlatform/SoCreativeIII.htm
On Tuesday, April 01, 2014 at 10:34:38 AM, Stefano Babic wrote:
On 19/03/2014 02:21, Marek Vasut wrote:
Add support for serial console into the i.MX23/i.MX28 SPL. A full,
uncrippled serial console support comes very helpful when debugging
various spectacular hardware bringup issues early in
From: Kuo-Jung Su dant...@faraday-tech.com
This ports the legacy linux clock framework from linux-3.10
(i.e., no common clock support)
Please check the list bellow for details:
1. CONFIG_CLKDEV_LOOKUP
- Core clock management APIs
- clk_get_sys(), clk_put(), clkdev_add(),
From: Kuo-Jung Su dant...@faraday-tech.com
Faraday FTTMR010 is a simple APB device which supports
generic timer functions.
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Albert Aribaud albert.u.b...@aribaud.net
---
Changes for v12:
- Rollback to v10.
Because we now
From: Kuo-Jung Su dant...@faraday-tech.com
The A369 is an ARM CPU-based SoC with rich SoC features and
convenient FPGA link for building fast system prototyping
and mass production.
More information about this hardware can be found at:
From: Kuo-Jung Su dant...@faraday-tech.com
Faraday FTPWMTMR010 is a simple APB device which supports
both timer and pwm functions.
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Albert Aribaud albert.u.b...@aribaud.net
---
Changes for v12:
- Rollback to v10.
Because we
From: Kuo-Jung Su dant...@faraday-tech.com
This includes the Faraday ARMv5TE core support and
generic clock framework.
Here is the list of verified Faraday ARM cores:
1. FA606TE (ARMv5TE, no mmu)
2. FA626TE (ARMv5TE)
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Albert Aribaud
From: Kuo-Jung Su dant...@faraday-tech.com
Faraday Virtual Machine (FVM) is a QEMU based emulator
which is designed for early stage software development
(i.e., IPL, SPL development).
Please check the link bellow for details:
From: Kuo-Jung Su dant...@faraday-tech.com
For the Faraday FTSDC021 (SDHCI) controller driver source is
sent out before the patches for Faraday Virtual Machine (FVM)
which actually uses this chip.
So its header file (ftsdc021.h) has been accidentally removed
by commit 3b98b57fa.
This patch
Hi Stefano,
Le Tue, 01 Apr 2014 10:41:50 +0200,
Stefano Babic sba...@denx.de a écrit :
On 31/03/2014 22:02, Eric Bénard wrote:
Le Sun, 30 Mar 2014 18:20:49 +0200,
Stefano Babic sba...@denx.de a écrit :
A general remark. I agree by reading the whole thread about checking at
runtime which
Hi Tormod,
On Mon, Mar 31, 2014 at 10:44 PM, Lukasz Majewski wrote:
The DFU 1.1 standard in its appendinx B specifies the DFU suffix.
It has the crc32 for the whole file, vendorID, device ID and other
handy fields.
Unfortunately, this part of the standard is not supported neither at
Hi Tom,
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 03/31/2014 04:44 PM, Lukasz Majewski wrote:
On Mon, 31 Mar 2014 14:05:17 -0400
Tom Rini tr...@ti.com wrote:
On Mon, Mar 31, 2014 at 10:48:49AM +0200, Lukasz Majewski wrote:
Up till now the CRC32 of received data was
Hi Pavel
On 04/01/2014 10:46 AM, Pavel Machek wrote:
Hi!
Actually socfpga board folder includes code to support both Cyclone V
and Arria V soc dev kit.
ok. I expect that you are talking about 2 completely different boards
which are here
On Tuesday, April 01, 2014 at 10:46:52 AM, Kuo-Jung Su wrote:
From: Kuo-Jung Su dant...@faraday-tech.com
It would be better to have strlcpy() moved to lib/string.c,
so that it could be reused by others without enabling
USB Gadget Ethernet.
Signed-off-by: Kuo-Jung Su
Hello.
On Tue, 2014-04-01 at 11:00, Lukasz Majewski wrote:
Hi Tormod,
On Mon, Mar 31, 2014 at 10:44 PM, Lukasz Majewski wrote:
The DFU 1.1 standard in its appendinx B specifies the DFU suffix.
It has the crc32 for the whole file, vendorID, device ID and other
handy fields.
-Original Messages-
From: Leo Yan l...@marvell.com
Sent Time: 2014-03-31 09:11:47 (Monday)
To: u-boot@lists.denx.de, David Feng feng...@phytium.com.cn, Scott Wood
scottw...@freescale.com
Cc: Leo Yan l...@marvell.com
Subject: [PATCH] ARMv8: fix bug for flush data cache by set/way
Dear Masahiro Yamada,
In message 1396340113-5952-1-git-send-email-yamad...@jp.panasonic.com you
wrote:
References to the wireless keyboard should also be removed
from README.console.
Acked-by: Wolfgang Denk w...@denx.de
thanks a lot!
Best regards,
Wolfgang Denk
--
DENX Software
Hi Stefan,
Hello.
On Tue, 2014-04-01 at 11:00, Lukasz Majewski wrote:
Hi Tormod,
On Mon, Mar 31, 2014 at 10:44 PM, Lukasz Majewski wrote:
The DFU 1.1 standard in its appendinx B specifies the DFU
suffix. It has the crc32 for the whole file, vendorID, device
ID and other
Hi!
On Tue, Apr 01, 2014 at 11:07:45AM +0200, Michal Simek wrote:
Hi Pavel
On 04/01/2014 10:46 AM, Pavel Machek wrote:
Hi!
Actually socfpga board folder includes code to support both Cyclone V
and Arria V soc dev kit.
ok. I expect that you are talking about 2 completely
This driver add support to STMicroelectronics ST33ZP24 SPI TPM.
Signed-off-by: Jean-Luc BLANC jean-luc.bl...@st.com
---
README | 12 +
drivers/tpm/Makefile |1 +
drivers/tpm/tpm_spi_stm_st33.c | 671
3 files
Hello,
This set of patch offer ST33ZP24 TPM support to U-Boot.
There is SPI and I2C driver.
Best Regards,
Jean-Luc BLANC
TPM Application
STMicroelectronics
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
This driver add support to STMicroelectronics ST33ZP24 SPI TPM.
Signed-off-by: Jean-Luc BLANC jean-luc.bl...@st.com
---
README | 12 +
drivers/tpm/Makefile |1 +
drivers/tpm/tpm_spi_stm_st33.c | 671
3 files
In order to support 2 SPI TPMs on same platform, add spi_select()
to tpm command set. Selection is done at driver level to keep compatibility
with standard tpm commands.
---
README | 13
common/cmd_tpm.c | 31
This set of patch offer ST33ZP24 TPM support to U-Boot.
There is SPI and I2C driver.
Best Regards,
Jean-Luc BLANC
TPM Application
STMicroelectronics
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Add the support of direct hash function in locality 4. hash_loc4()
command added in TPM command set.
Signed-off-by: Jean-Luc BLANC jean-luc.bl...@st.com
---
README |4
common/cmd_tpm.c | 32
In order to support 2 SPI TPMs on same platform, add spi_select()
to tpm command set. Selection is done at driver level to keep compatibility
with standard tpm commands.
---
README | 13
common/cmd_tpm.c | 31
This driver add support to STMicroelectronics ST33ZP24 I2C TPM.
Signed-off-by: Jean-Luc BLANC jean-luc.bl...@st.com
---
README |7 +
drivers/tpm/tpm_i2c_stm_st33.c | 659
2 files changed, 666 insertions(+)
create mode 100644
Hi Tim,
On 03/28/2014 04:20 PM, Tim Sander wrote:
Hi Michal
On 03/27/2014 05:32 PM, Tim Sander wrote:
Hi Michal
Am Donnerstag, 27. März 2014, 14:17:41 schrieb Michal Simek:
Please check and may be you can try u-boot-dtb.elf.
Mh, don't know how to create this kind of file?
Jagan maybe
Hi Eli,
On 04/01/2014 04:09 PM, Eli Nidam wrote:
Hi Roger,
In u-boot I tried to run twice the command “scsi init” and on the second time
it’s hung,,
after debug I found the patch ahci: Fix cache align error messages
replace the malloc with ALLOC_CACHE_ALIGN_BUFFER.
And remove the line
Hi Roger,
I used the definition CONFIG_SYS_DCACHE_OFF (in our u-boot the cache is off)
For this reason I didn't get this message.
Thanks
Eli
-Original Message-
From: Roger Quadros [mailto:rog...@ti.com]
Sent: Tuesday, April 01, 2014 4:41 PM
To: Eli Nidam; Rini, Tom
Cc:
Changes in lib/uuid.c to:
- uuid_str_to_bin()
- uuid_bin_to_str()
New parameter is added to specify input/output string format in listed functions
This change allows easy recognize which UUID type is or should be stored in
given
string array. Binary data of UUID and GUID is always stored in big
This patch adds support to generate UUID (Universally Unique Identifier)
in version 4 based on RFC4122, which is randomly.
Source: https://www.ietf.org/rfc/rfc4122.txt
Changes:
- new configs:
- CONFIG_LIB_UUID for compile lib/uuid.c
- CONFIG_RANDOM_UUID for functions gen_rand_uuid() and
Those commands basis on implementation of random UUID generator version 4
which is described in RFC4122. The same algorithm is used for generation
both ids but string representation is different as below.
char: 0914 19 24 36
----
Changes:
- randomly generate partition uuid if any is undefined and CONFIG_RAND_UUID
is defined
- print debug info about set/unset/generated uuid
- update doc/README.gpt
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Acked-by: Lukasz Majewski l.majew...@samsung.com
Cc: Piotr Wilczek
This change enables automatically uuid generation by command gpt.
In case of updating partitions layout user don't need to care about
generate uuid manually.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Piotr Wilczek p.wilc...@samsung.com
Cc:
Commit 2faf5fb82ed6 introduced a regression that causes a data
abort when running scsi init followed by scsi reset.
There are 2 problems with the original commit
1) ALLOC_CACHE_ALIGN_BUFFER() allocates memory on the stack but is
assigned to ataid[port] and used by other functions.
2) The function
This commit introduces cleanup for uuid library.
Changes:
- move uuid-string conversion functions into lib/uuid.c so they can be
used by code outside part_efi.c.
- rename uuid_string() to uuid_bin_to_str() for consistency with existing
uuid_str_to_bin()
- add an error return code to
Hi Tom,
On Mon, 2014-03-24 at 17:27 +0400, Alexey Brodkin wrote:
With 32 milliseconds delay on some boards EEMPROM got written inconsistently.
With 64 msec all of our existig boards show properly written EEPROM.
Cc: Tom Rini tr...@ti.com
Signed-off-by: Alexey Brodkin abrod...@synopsys.com
Signed-off-by: Alexey Brodkin abrod...@synopsys.com
---
include/configs/axs101.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/configs/axs101.h b/include/configs/axs101.h
index 8d03110..c22d6d0 100644
--- a/include/configs/axs101.h
+++ b/include/configs/axs101.h
On 03/30/2014 11:30 PM, tiger...@via-alliance.com wrote:
Hi, fenghua:
I found you defined these marcoes in vexpress_aemv8a.h :
#define CONFIG_SYS_DCACHE_OFF
#define CONFIG_SYS_ICACHE_OFF
Most ARMv7 platform will enable Icache to make code run faster.
So, why not turn on Icache on ARMv8 FVP
On 03/26/2014 04:37 PM, Tom Warren wrote:
Albert,
Please pull u-boot-tegra/master into ARM/master. Thanks!
...
Stephen Warren (1):
ARM: tegra: make all I2C ports open-drain
I'd really like this change to make it into 2014.04. Can it please be
pulled?
Cc: Prafulla Wadaskar prafu...@marvell.com
Signed-off-by: Michael Walle mich...@walle.cc
---
Changes v2:
- none
---
include/configs/lsxl.h |1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h
index 2ae8a27..4ad5eb8 100644
---
Move addresses for kernel, ramdisk and fdt blob to own variables. Add dtb
blob loading to all existing boot scripts, dtb filenames were taken from
vanilla kernel. Introduce new boot script bootcmd_legacy, which only loads
a kernel and a ramdisk. Make this the default boot script. This should also
-Original Message-
From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On
Behalf Of
Karicheri, Muralidharan
Sent: Monday, March 31, 2014 4:10 PM
To: Jagan Teki
Cc: Rini, Tom; u-boot@lists.denx.de; Chang, Rex
Subject: Re: [U-Boot] [PATCH v3 8/9] spi: davinci: add
From: Vitaly Andrianov vita...@ti.com
This patch add basic support for the architecture timer found on recent
ARMv7 based SoCs.
Signed-off-by: Vitaly Andrianov vita...@ti.com
Signed-off-by: Murali Karicheri m-kariche...@ti.com
Acked-by: Tom Rini tr...@ti.com
---
arch/arm/lib/Makefile |1
currently only spi0 is enabled on k2hk evm. This
configuration update is needed to enable spi1 and spi2.
Signed-off-by: Murali Karicheri m-kariche...@ti.com
Acked-by: Tom Rini tr...@ti.com
---
include/configs/k2hk_evm.h |9 +
1 file changed, 9 insertions(+)
diff --git
This patch moves the davinci i2c_defs.h file to drivers.i2c directory.
It will allow to reuse the davinci_i2c driver for TI Keystone2 SOCs.
Not used git mv command to move the file because small part of
it with definitions specific for Davinci SOCs has to remain in the
This patch introduces a configurable mechanism to disable
subpage writes in the DaVinci NAND driver.
Signed-off-by: Vitaly Andrianov vita...@ti.com
Signed-off-by: Murali Karicheri m-kariche...@ti.com
Acked-by: Tom Rini tr...@ti.com
---
README |5 +
From: Vitaly Andrianov vita...@ti.com
The keystone2 SOC requires to fix all 32 bit aliased addresses
to their 36 physical format. This has to happen after all fdt
nodes are added or modified.
Signed-off-by: Vitaly Andrianov vita...@ti.com
Signed-off-by: Murali Karicheri m-kariche...@ti.com
This patch set add support for Keystone2 SoC and K2HK EVM.
Change history:
v5
- Rebased to v2014.04-rc3
- Replaced reg_rmw() with clrsetbits_le32()
- i2c Makefile update to add davinci_i2c sorted
- simplified spi_cs_is_valid() in davinci_spi driver
Currently davinci spi driver supports only bus 0 cs 0.
This patch allows driver to support bus 1 and bus 2 with
configurable number of chip selects. Also defaults are
selected in a way to avoid regression on other platforms
that uses davinci spi driver and has only one spi bus.
Signed-off-by: Rex
From: Vitaly Andrianov vita...@ti.com
- add davinci driver to new multibus/multiadpater support
- adapted all config files, which uses this driver
Signed-off-by: Vitaly Andrianov vita...@ti.com
Signed-off-by: Murali Karicheri m-kariche...@ti.com
---
This patch add support for gpimage format as a preparatory
patch for porting u-boot for keystone2 devices and is
based on omapimage format. It re-uses gph header to store the
size and loadaddr as done in omapimage.c
Signed-off-by: Vitaly Andrianov vita...@ti.com
Signed-off-by: Murali Karicheri
From: Vitaly Andrianov vita...@ti.com
Multicore navigator consists of Network Coprocessor (NetCP) and
Queue Manager sub system. More details on the hardware can
be obtained from the following links:-
Network Coprocessor: http://www.ti.com/lit/pdf/sprugz6
Multicore Navigator:
Ethernet driver configures the CPSW, SGMI and Phy and uses
the the Navigator APIs. The driver supports 4 Ethernet ports and
can work with only one port at a time.
Port configurations are defined in board.c.
Signed-off-by: Vitaly Andrianov vita...@ti.com
Signed-off-by: Murali Karicheri
This patch set add support for keystone network driver.
Change history:
v4
- replaced reg_rmw() with clrsetbits_le32() and similar for clr/set
functions
v3
- Review comments against the previous version except phylib support.
I have
Hi Stephen,
On Tue, 01 Apr 2014 10:33:20 -0600, Stephen Warren
swar...@wwwdotorg.org wrote:
On 03/26/2014 04:37 PM, Tom Warren wrote:
Albert,
Please pull u-boot-tegra/master into ARM/master. Thanks!
...
Stephen Warren (1):
ARM: tegra: make all I2C ports open-drain
I'd
This is a possible out of bounds error, caught by Klockworks. Adding
check before using as array index. Klockworks also gives warning when
pre-compiling conditions should be used instead of runtime.
Signed-off-by: York Sun york...@freescale.com
---
drivers/ddr/fsl/ctrl_regs.c |8 ++--
On Mon, 2014-03-31 at 15:34 +0530, Prabhakar Kushwaha wrote:
SPI driver perform its operation(read/write) on 64KB buffer chunk for data
greater than 64KB. This buffer chunk is allocated from system heap.
During SPL boot, 768KB of data is read from SPI flash.
Here, heap size may not be
On Mon, 2014-03-31 at 15:34 +0530, Prabhakar Kushwaha wrote:
GD(Global Data) structure has pointer to environment variable array.
but, it always point to default_environment assuming it is running from
final location.
So update GD pointer with env variable array during SPL boot.
On Mon, 2014-03-31 at 15:34 +0530, Prabhakar Kushwaha wrote:
nand_spl_load_image() can also be used for non TPL framework.
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
drivers/mtd/nand/fsl_ifc_spl.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
On Mon, 2014-03-31 at 15:35 +0530, Prabhakar Kushwaha wrote:
Objective of this target to have concatenate binary having
- SPL binary in PBL command format
- U-boot binary
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
Makefile | 19 +++
README |4
Hello Tim,
On Thu, Mar 27, 2014 at 2:56 PM, Tim Harvey thar...@gateworks.com wrote:
On Mon, Mar 10, 2014 at 11:40 AM, Stefano Babic sba...@denx.de wrote:
On 07/03/2014 13:36, Andy Ng wrote:
Dear colleagues,
Has anyone tried to build NAND SPL support on imx6. Does it work?
SPL support is
On Mon, 2014-03-31 at 15:35 +0530, Prabhakar Kushwaha wrote:
+void board_init_f(ulong bootflag)
+{
+ u32 plat_ratio, sys_clk, uart_clk;
+ ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+
+ /* Memcpy existing GD at CONFIG_SPL_GD_ADDR */
+ memcpy((void
Thanks, Albert!
Another PR with Stefan and Stephen's latest Tegra changes should be ready
before the end of the week.
Tom
On Tue, Apr 1, 2014 at 1:11 PM, Albert ARIBAUD albert.u.b...@aribaud.netwrote:
Hi Tom,
On Wed, 26 Mar 2014 15:37:07 -0700, Tom Warren
twarren.nvi...@gmail.com wrote:
On 04/01/2014 04:26 PM, Tom Warren wrote:
Thanks, Albert!
Another PR with Stefan and Stephen's latest Tegra changes should be ready
before the end of the week.
Well, those other patches (of mine at least) are probably for the next
release, so a PR to Albert probably isn't needed before
Hi, York:
Thanks a lot!
I have noted your recent patch about ARMv8 cache flush.
Best wishes,
___
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On 01/04/14 23:30, Przemyslaw Marczak wrote:
This change enables automatically uuid generation by command gpt.
In case of updating partitions layout user don't need to care about
generate uuid manually.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Minkyu Kang
On 4/2/2014 3:32 AM, Scott Wood wrote:
On Mon, 2014-03-31 at 15:34 +0530, Prabhakar Kushwaha wrote:
SPI driver perform its operation(read/write) on 64KB buffer chunk for data
greater than 64KB. This buffer chunk is allocated from system heap.
During SPL boot, 768KB of data is read from SPI
On 4/2/2014 3:34 AM, Scott Wood wrote:
On Mon, 2014-03-31 at 15:34 +0530, Prabhakar Kushwaha wrote:
GD(Global Data) structure has pointer to environment variable array.
but, it always point to default_environment assuming it is running from
final location.
So update GD pointer with env
On 4/2/2014 3:35 AM, Scott Wood wrote:
On Mon, 2014-03-31 at 15:35 +0530, Prabhakar Kushwaha wrote:
Objective of this target to have concatenate binary having
- SPL binary in PBL command format
- U-boot binary
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
Makefile | 19
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