Hello Wolfgang,
2014-10-22 18:56 GMT+02:00 Wolfgang Denk w...@denx.de:
Dear Dirk,
In message
CANVMifLGzKz+=-k-e9_ssxbxpypdg1yqexc-tscapi7wvxq...@mail.gmail.com you
wrote:
I had exactly the same behaviour some time ago and tracked it down to
this (and posted it on the mailing list, but
Hello, Mr. Glass.
On Wednesday 22 October 2014 11:29:00 AM Simon Glass wrote:
One little nit below but it looks OK to me. I'm assume that no one
would want to replace the command line completely?
In some setups, one image can be used with several versions, or even
different boards of
MAKEALL -s tegra is error/warning-free.
The following changes since commit 3d420cbd355a5f09e4f113eb10579a264a8ef138:
Merge branch 'u-boot-socfpga/topic/arm/socfpga-20141010' into
'u-boot-arm/master' (2014-10-11 01:20:55 +0200)
are available in the git repository at:
Hello Wolfgang,
2014-10-22 18:56 GMT+02:00 Wolfgang Denk w...@denx.de:
Dear Dirk,
In message
CANVMifLGzKz+=-k-e9_ssxbxpypdg1yqexc-tscapi7wvxq...@mail.gmail.com you
wrote:
I had exactly the same behaviour some time ago and tracked it down to
this (and posted it on the mailing
Dear Simon,
On 06.10.14 20:14, Simon Glass wrote:
Modify this driver to support driver model, with platform data required to
determine the GPIOs that it controls.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/arm/include/asm/arch-at91/gpio.h | 6 +
drivers/gpio/at91_gpio.c
Hi Simon,
On 06.10.14 20:14, Simon Glass wrote:
These boards all have the same GPIO arrangement, so add some common platform
data that can be used by all boards. Remove the configs which are no longer
required.
Signed-off-by: Simon Glass s...@chromium.org
---
Since commit ff94bc40af34 (mtd, ubi, ubifs: resync with Linux-3.14),
chip-scan_bbt() is called at the end of nand_scan_tail().
It means the first read access happens immediately after the generic
NAND initialization process.
It causes a problem to some SoCs of UniPhier platform because some of
Hi Marek, Hi Heiko!
On 21.10.2014 08:44, Heiko Schocher wrote:
/*
+ * I2C support
+ */
+#define CONFIG_HARD_I2C
No ... do not add this define please.
+#define CONFIG_DW_I2C
+#define CONFIG_I2C_MULTI_BUS
I presume this should be converted to CONFIG_SYS_I2C framework instead
of using
this
Hi Marek, and Fabio
Shouldn't this be conditional?
#if defined CONFIG_MXS_ENABLE_4P2
mxs_power_enable_4p2();
#endif
Then the boards that need this power supply enable
CONFIG_MXS_ENABLE_4P2 in its config file.
No, we want to start the DCDC converter unconditionally when
Hi Christian,
On 22/10/2014 11:29, Christian Gmeiner wrote:
Commit 155fa9af95ac5be857a7327e7a968a296e60d4c8 changed the way
to define a GPIO line, which can be used to force CS high
across multiple transactions. In order to fix sf detection
change board code to make use of
Hi Christian,
On 22/10/2014 11:55, Christian Gmeiner wrote:
One of the possible boot devices can be sata.
Signed-off-by: Christian Gmeiner christian.gmei...@gmail.com
---
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
--
On Wed, Oct 22, 2014 at 09:07:40PM -0600, Simon Glass wrote:
Hi,
On 11 September 2014 10:00, Albert ARIBAUD albert.u.b...@aribaud.net wrote:
Hi Thierry,
On Tue, 26 Aug 2014 17:33:48 +0200, Thierry Reding
thierry.red...@gmail.com wrote:
From: Thierry Reding tred...@nvidia.com
On Tue, Oct 21, 2014 at 5:26 AM, Marcel Ziswiler mar...@ziswiler.com wrote:
I finally had a look at the datasheet and spotted an additional
register address difference between regular E1000 and i210/i211 chips.
This patch fixes this and now successfully works on programmed
i210/i211 as well as
Hi Ian,
On 10/22/2014 08:55 PM, Ian Campbell wrote:
On Wed, 2014-10-22 at 15:45 +0200, Hans de Goede wrote:
if (!fake) {
#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
-armv7_init_nonsec();
-secure_ram_addr(_do_nonsec_entry)(kernel_entry,
-
- Do not insert a whitespace between a function name and
an open paranthesis
- Fix comment style
- Do not split an error message into multiple lines
even if it exceeds 80 columns
- Do not split for statement where it fits in 80 columns
- Do not use assignment in if condition
Hi Simon,
On Wed, 22 Oct 2014 21:31:22 -0600
Simon Glass s...@chromium.org wrote:
diff --git a/include/configs/ph1_sld8.h b/include/configs/ph1_sld8.h
index 41e2299..1062aac 100644
--- a/include/configs/ph1_sld8.h
+++ b/include/configs/ph1_sld8.h
@@ -28,9 +28,7 @@
* SoC UART
Add a Kconfig option which users can select when they want to boot older
kernels, e.g. the linux-sunxi 3.4 kernels. For now this just forces the pll5
p value to 1 (divide by 2) as that is what those kernels are hardcoded too,
in the future this may enable further workarounds.
Signed-off-by: Hans
Actually, unmap_sysmem() does nothing. Just in case.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Simon Glass s...@chromium.org
---
common/cmd_mem.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/common/cmd_mem.c b/common/cmd_mem.c
index bfca59e..0d50dcf 100644
---
Hi Tom,
On 10/22/2014 09:24 PM, Tom Rini wrote:
On Wed, Oct 22, 2014 at 03:45:23PM +0200, Hans de Goede wrote:
Old kernels cannot handle booting in non-secure (hyp) mode, so when
CONFIG_OLD_KERNEL_COMPAT is set, also set CONFIG_ARMV7_SEC_BY_DEFAULT.
Note that whether to booting secure or
Hi,
On 10/22/2014 08:57 PM, Ian Campbell wrote:
On Wed, 2014-10-22 at 15:45 +0200, Hans de Goede wrote:
Old kernels cannot handle booting in non-secure (hyp) mode, so when
CONFIG_OLD_KERNEL_COMPAT is set, also set CONFIG_ARMV7_SEC_BY_DEFAULT.
Note that whether to booting secure or non-secure
The platform_data structures are generally referenced from both
drivers and board files. That is why header files defining
platform_data sturectures are placed in include directory,
but our top level include directory is already too cluttered.
Let's collect platform_data definitions under the
On Thursday, October 23, 2014 at 09:55:25 AM, Stefan Roese wrote:
Hi Marek, Hi Heiko!
Hi all!
On 21.10.2014 08:44, Heiko Schocher wrote:
/*
+ * I2C support
+ */
+#define CONFIG_HARD_I2C
No ... do not add this define please.
+#define CONFIG_DW_I2C
+#define
On Thu, 2014-10-23 at 10:22 +0200, Hans de Goede wrote:
Hi Ian,
On 10/22/2014 08:55 PM, Ian Campbell wrote:
On Wed, 2014-10-22 at 15:45 +0200, Hans de Goede wrote:
if (!fake) {
#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
- armv7_init_nonsec();
-
Hi,
On 10/23/2014 11:30 AM, Ian Campbell wrote:
On Thu, 2014-10-23 at 10:22 +0200, Hans de Goede wrote:
Hi Ian,
On 10/22/2014 08:55 PM, Ian Campbell wrote:
On Wed, 2014-10-22 at 15:45 +0200, Hans de Goede wrote:
if (!fake) {
#if defined(CONFIG_ARMV7_NONSEC) ||
Older Linux kernels will not properly boot in hype mode, add support for a
bootm_boot_mode environment variable, which when set to sec will cause
u-boot to boot in secure mode even when build with non-sec (and hyp) support.
Signed-off-by: Hans de Goede hdego...@redhat.com
Acked-by: Marc Zyngier
As auto-negotiation is not supported for 2.5G SGMII, we need
to add a new type PHY_INTERFACE_MODE_SGMII_2500 to differentiate
SGMII-1G and SGMII-2.5G with different setting for auto-negotiation.
Signed-off-by: Shaohui Xie shaohui@freescale.com
Signed-off-by: Shengzhou Liu
-Original Message-
From: Shengzhou Liu [mailto:shengzhou@freescale.com]
Sent: Thursday, October 23, 2014 5:21 PM
To: u-boot@lists.denx.de; Sun York-R58495
Cc: Liu Shengzhou-B36685; Xie Shaohui-B21989
Subject: [PATCH 1/4] net/fm: add 2.5G SGMII support
[Shengzhou] This is a
In preparation for the SoCFPGA support of the designware I2C driver,
convert this driver to the common CONFIG_SYS_I2C framework.
This patch converts all users of this driver, this is:
- ST spearxxx boards
- AXS101 (ARC700 platform)
I couldn't test this patch on those boards. Only compile tested
Fix the following build warning by including linux/compat.h:
include/linux/usb/musb.h:110: warning: 'struct device' declared inside
parameter list
include/linux/usb/musb.h:110: warning: its scope is only this definition
or declaration, which is probably not what you want
Signed-off-by: Igor
Signed-off-by: Christian Gmeiner christian.gmei...@gmail.com
---
board/bachmann/ot1200/ot1200.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/board/bachmann/ot1200/ot1200.c b/board/bachmann/ot1200/ot1200.c
index 45d761f..2ed8cf7 100644
---
The older 'mr' variant and the generic variant of the
OT1200 differ in some places. As the name suggests the
generic variant supports more boot devices.
In order to be compatible with the 'mr' variant we define
some 'feature' GPIOs. On the 'mr' variant this pads are
not connected so we define
On the 'mr' variant switching to 'mmc dev 1' will result
in MMC: no card present.
Signed-off-by: Christian Gmeiner christian.gmei...@gmail.com
---
board/bachmann/ot1200/ot1200.c | 54 ++
1 file changed, 49 insertions(+), 5 deletions(-)
diff --git
Hi Simon,
On Wed, 22 Oct 2014 21:24:22 -0600
Simon Glass s...@chromium.org wrote:
HI Masahiro,
On 22 October 2014 03:13, Masahiro Yamada yamad...@jp.panasonic.com wrote:
1/7: bug fix of console serial
2/7 - 3/7: cleanup
4/7: prepare some Kconfig entries
5/7 - 7/7: convert UniPhier
Since commit ff94bc40af34 (mtd, ubi, ubifs: resync with Linux-3.14),
chip-scan_bbt() is called at the end of nand_scan_tail().
It means the first read access happens immediately after the generic
NAND initialization process.
It causes a problem to some SoCs of UniPhier platform because some of
Hey,
So a common use case for me is building a single board. I've updated my
wrapper script from BUILD_DIR=$MACHINE ./MAKEALL $MACHINE (roughly, of
course) to:
./tools/buildman/buildman --keep-outputs -dvel --output $MACHINE ^$MACHINE$
Which results in my output being
On Thu, Oct 23, 2014 at 10:52:23AM +0200, Hans de Goede wrote:
Hi Tom,
On 10/22/2014 09:24 PM, Tom Rini wrote:
On Wed, Oct 22, 2014 at 03:45:23PM +0200, Hans de Goede wrote:
Old kernels cannot handle booting in non-secure (hyp) mode, so when
CONFIG_OLD_KERNEL_COMPAT is set, also set
Dear Joakim, dear Dirk,
In message
of14c3d470.864842b6-onc1257d7a.002471ac-c1257d7a.0024d...@transmode.se you
wrote:
Ouch, that was a nasty surprise.
Indeed.
In my original mail I referenced this potential solution, at least it
worked for me:
On Thu, Oct 23, 2014 at 10:40:53AM +0200, Hans de Goede wrote:
Add a Kconfig option which users can select when they want to boot older
kernels, e.g. the linux-sunxi 3.4 kernels. For now this just forces the pll5
p value to 1 (divide by 2) as that is what those kernels are hardcoded too,
in
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in v2: None
configs/ph1_ld4_defconfig | 1 +
configs/ph1_pro4_defconfig | 1 +
configs/ph1_sld8_defconfig | 1 +
drivers/serial/Kconfig | 6 ++
include/configs/ph1_ld4.h | 4
1/8: cleanup
2/8: bug fix
3/8 - 4/8: cleanup
5/8: prepare some Kconfig entries
7/8 - 8/8: convert UniPhier serial driver and some cleanups
Masahiro Yamada (8):
serial: add static directive to local functions
dm: serial: fix console putc
dm: serial: remove unnecessary casting
dm: serial:
The UniPhier serial driver has been converted to driver model.
Let's remove uniphier_serial_initialize() call from the old
serial driver framework.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in v2: None
drivers/serial/serial.c |
The type (void *) can be directly passed to a function that
takes a specific pointer type.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
Changes in v2:
- Rebase
drivers/serial/serial-uclass.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git
Commit b8893327e9d2 (dm: serial: Put common code into separate functions)
consolidated getc() correctly, but introduced another bug to putc();
serial_stub_putc() passes sdev-priv to serial_putc_dev(), but
serial_putc_dev() uses cur_dev instead of the given argument.
Signed-off-by: Masahiro Yamada
Commit b8893327e9d2 (dm: serial: Put common code into separate functions)
consolidated getc() and putc(). This commit does more puts() and tsts().
Also rename locally used functions to _serial_*() for clarification
because we have similar functions names here are there in this file.
Create entries of CONFIG_DM, CONFIG_DM_SERIAL, CONFIG_DM_GPIO
and CONFIG_DM_SPI.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Add CONFIG_DM_SPI
drivers/core/Kconfig | 6 ++
drivers/gpio/Kconfig | 6 ++
This commit converts UniPhier on-chip serial driver to driver model.
Since UniPhier SoCs do not have Device Tree support, some board files
should be added under arch/arm/cpu/armv7/uniphier/ph1-*/ directories.
(Device Tree support for UniPhier platform is still under way.)
Now the base address
The functions _serial_putc, _serial_putc_raw, _serial_puts,
_serial_getc, _serial_tstc, _serial_setbrg are defined and used
locally in each of serial_ns16550.c and serial_s3c24x0.c.
Add static directive to them and remove declarations from
include/common.h.
Signed-off-by: Masahiro Yamada
Hi Simon,
On Wed, 22 Oct 2014 17:36:06 -0600
Simon Glass s...@chromium.org wrote:
drivers/serial/serial-uclass.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index 6dde4ea..163308b 100644
This series fix several bugs in current ICH SPI driver as well as
adding byte program support for the SST25* flash.
Note only SST25* flash params are updated in patch #4 and #5 as an
example. Other flash parts are untouched but can be updated after
checking all flash parts' datasheets.
Simon, I
The ich spi controller driver spi_xfer() tries to align reading
address to 64 bytes when doing spi data in, which causes a bug of
either infinite loop or a huge size memcpy().
Actually the ich spi controller does not have such requirement of
64 bytes alignment when reading data from spi slave
ICH 7 SPI controller only supports array read command (03h).
Fast array read command (0Bh) is not supported.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
drivers/spi/ich.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
index c4d3a29..b356411
Currently if SST flash advertises SST_WP flag in the params table
the word program command (ADh) with auto address increment will be
used for the flash write op. However some SPI controllers do not
support the word program command (like the Intel ICH 7), the byte
programm command (02h) has to be
Explicitly list supported read commands in the flash prarmas table
for SST25* flash parts.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
drivers/mtd/spi/sf_params.c | 20 ++--
include/spi_flash.h | 3 ++-
2 files changed, 12 insertions(+), 11 deletions(-)
diff --git
Change SST25* flash sector size to 4KiB to match SECT_4K. This makes
'sf erase offset +len' work on real 4KiB boundary instead of 64KiB.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
drivers/mtd/spi/sf_params.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff
From: Markus Niebel markus.nie...@tq-group.com
two trivial fixes for the TQ Systems TQMa6 modules.
Thanks to Anatolij Gustschin to bring the first to
my attention
Markus Niebel (2):
tqma6: fix sf detection
tqma6: fix typo in header guard define
board/tqc/tqma6/tqma6.c| 10 +-
From: Markus Niebel markus.nie...@tq-group.com
Signed-off-by: Markus Niebel markus.nie...@tq-group.com
---
board/tqc/tqma6/tqma6_bb.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/tqc/tqma6/tqma6_bb.h b/board/tqc/tqma6/tqma6_bb.h
index 9d072d2..fb7b462 100644
---
From: Markus Niebel markus.nie...@tq-group.com
Commit 155fa9af95ac5be857a7327e7a968a296e60d4c8 changed the way
to define a GPIO line, which can be used to force CS high
across multiple transactions. In order to fix sf detection
change board code to make use of board_spi_cs_gpio(..).
Dear Tom,
In message 20141014084744.GH25506@bill-the-cat you wrote:
I've pushed v2014.10 out to the repository and tarballs should exist
soon.
Sorry, I nearly forgot about the release statistics (thanks to Fabio
for the reminder!); here it comes:
Changes since v2014.07:
Processed
Hello Wolfgang,
2014-10-23 15:10 GMT+02:00 Wolfgang Denk w...@denx.de:
Given that GCC 4.9.1 apparently solves this issue I wonder which
approach we should take?
Should we blacklist GCC 4.8.x (and 4.9.0) like the kernel folks are
doing [1] ?
[1] https://lkml.org/lkml/2014/10/10/272
Hey all,
One of the things that I mentioned at the U-Boot mini-summit was that I
had talked with Albert and he's OK with patches that aren't ARM core
changes but just SoC centric changes not going into u-boot-arm first.
So in that vein, I'm going to start with treating the ARM SoC trees like I
On Wed, Oct 22, 2014 at 09:55:47PM -0600, Simon Glass wrote:
Hi Tom,
These are the last of the x86 patches before it is converted to driver model.
The following changes since commit 35d4fed320d577a4446531d7b9350ce40065c4b0:
x86: Fix GDT limit in start16.S (2014-10-22 09:03:07 -0600)
On Wed, Oct 22, 2014 at 09:07:30PM -0600, Simon Glass wrote:
Hi Tom,
These patches are part of a larger series, but I have already ACKed
them and they are independent of that series, so let's bring them in.
The following changes since commit a84c8107d9b050fe8a31220d28588abfc2d99aee:
From: Markus Niebel markus.nie...@tq-group.com
the second reset prevents other registers to be written.
This will prevent to have the correct signal levels for
SCLK before writing to the config reg in spi_xchg_single.
Tested with GPIO based chipselect and SPI_MODE_3 on i.MX6S
Signed-off-by:
From: Markus Niebel markus.nie...@tq-group.com
current implementation of the mxc_spi host driver gives issues,
if using more than one slave on the same bus. These patches try
to improve this use case.
They were tested on a TQMa6S (i.MX6S) with a custom mainboard
using two slave devices in SPI
From: Markus Niebel markus.nie...@tq-group.com
it is not correct to init for a specific slave in spi_setup_slave.
instead buffer the values and delay init until spi_claim_bus.
Signed-off-by: Markus Niebel markus.nie...@tq-group.com
---
Changes since v1:
- rebase to current master
Hi Valentin,
On 10/14/2014 04:21 PM, Valentin Longchamp wrote:
Hi Matthias,
On 10/14/2014 02:32 PM, Matthias Fuchs wrote:
Hi Valentin,
my patch fixed environment from i2c eeprom. I am not sure on which board
I ran into that trouble. Probably PMC440. So reverting my former patch
will
On Wed 2014-10-22 21:55:58, Marek Vasut wrote:
Zap the offset-based register access and use the struct-based one
as this is the preferred method.
No functional change, but there are some line-over-80 problems in
the driver, which will be addressed later.
For 1-7:
Acked-by: Pavel Machek
In order to fit within the current binary size limits, drop the 'nfs'
command support.
Cc: Prafulla Wadaskar prafu...@marvell.com
Signed-off-by: Tom Rini tr...@ti.com
---
include/configs/openrd.h |1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/openrd.h
Hi York,
On 10/01/2014 05:41 PM, York Sun wrote:
On 10/01/2014 08:39 AM, Valentin Longchamp wrote:
Hi York,
On 09/30/2014 05:48 PM, York Sun wrote:
Valentin,
We are seeing the image size of kmcoge4 and kmlion1 are on the edge.
Attempts to
add new features cause overflow. Would you
On Wed, Oct 22, 2014 at 12:13:07PM +0200, Stefan Roese wrote:
This move makes it possible to use this kirkwood SPI driver from other
MVEBU platforms as well. This will be used by the upcoming Armada XP
support.
Signed-off-by: Stefan Roese s...@denx.de
Reviewed-by: Jagannadha Sutradharudu
On Wed, Oct 22, 2014 at 12:13:06PM +0200, Stefan Roese wrote:
This move makes is possible to use this header not only from kirkwood
platforms but from all Marvell mvebu platforms.
Signed-off-by: Stefan Roese s...@denx.de
Tested-by: Luka Perkov l...@openwrt.org
Applied to u-boot/master,
On Wed, Oct 22, 2014 at 12:13:05PM +0200, Stefan Roese wrote:
By moving some kirkwood files into a Marvell common directory, those files
can be used by other Marvell platforms as well. The name mvebu is taken
from the Linux kernel source tree. It has been chosen there to represent
the SoC's
On Wed, Oct 22, 2014 at 12:13:09PM +0200, Stefan Roese wrote:
These mbus functions are ported from Barebox. The Barebox version is
ported from Linux. These functions will be first used by the upcoming
Armada XP support. Later other Marvell SoC's will be adopted to use
these functions as well
On Wed, Oct 22, 2014 at 12:13:08PM +0200, Stefan Roese wrote:
This patch does the following:
- Rename defines and registers to not use kirkwood
- Remove unused defines
- Use clrsetbits() accessor functions
- Coding style cleanup
- Clear 25MHZ bit in timer controller register init for Armada
On Wed, Oct 22, 2014 at 12:13:11PM +0200, Stefan Roese wrote:
This makes is possible to use those gpio functions from other MVEBU SoC's as
well.
Signed-off-by: Stefan Roese s...@denx.de
Tested-by: Luka Perkov l...@openwrt.org
Acked-by: Prafulla Wadaskar prafu...@marvell.com
Applied to
On Wed, Oct 22, 2014 at 12:13:10PM +0200, Stefan Roese wrote:
Compile the pin multiplexing only on Kirkwood platforms. As the
Armada XP doesn't need it.
Signed-off-by: Stefan Roese s...@denx.de
Reviewed-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
Tested-by: Luka Perkov
On Wed, Oct 22, 2014 at 12:13:12PM +0200, Stefan Roese wrote:
This makes is possible to use this SPI driver from other MVEBU SoC's as well.
As the upcoming Armada XP support will do.
Signed-off-by: Stefan Roese s...@denx.de
Reviewed-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
On Wed, Oct 22, 2014 at 12:13:14PM +0200, Stefan Roese wrote:
This patch adds support for the NETA ethernet controller which is integrated
in the Marvell Armada XP SoC's. This port is based on the Linux driver which
has been stripped of the in U-Boot unused portions.
Tested on the Marvell
On Wed, Oct 22, 2014 at 12:13:13PM +0200, Stefan Roese wrote:
Additionally the SDRAM address decoding register address is not hard coded
in the C code any more. A define is introduced for this base address.
This makes is possible to use those gpio functions from other MVEBU SoC's
as well.
On Wed, Oct 22, 2014 at 12:13:15PM +0200, Stefan Roese wrote:
The Marvell MV78460 eval board DB-78460-BP seems to need a longer
PHY autonegotiation timeout than the standard 4 seconds. So lets
make this timeout configurable. If not defined in the board config
header the original 4000ms is
On Wed, Oct 22, 2014 at 12:13:17PM +0200, Stefan Roese wrote:
This basic support for the Marvell Armada XP is base on the existing kirkwood
support. Which has been generatized by moving some common files into
common marvell locations.
This is in preparation for the upcoming Armada XP
This file should contain the bin_hdr generated by the original Marvell
U-Boot implementation. As this is currently not included in this
U-Boot version, we have added this placeholder, so that the U-Boot
image can be generated without errors.
If you have a known to be working bin_hdr for your
On Wed, Oct 22, 2014 at 12:13:19PM +0200, Stefan Roese wrote:
The maxBCM board is equipped with the Marvell Armada-XP MV78460 SoC. It
integrates an SPI NOR flash and an Marvell 88E6185 switch.
Signed-off-by: Stefan Roese s...@denx.de
Applied to u-boot/master, thanks!
--
Tom
On Wed, Oct 22, 2014 at 12:13:16PM +0200, Stefan Roese wrote:
To support the Armada XP SoC, we just need to include the correct header.
Signed-off-by: Stefan Roese s...@denx.de
Acked-by: Heiko Schocher h...@denx.de
Tested-by: Luka Perkov l...@openwrt.org
Applied to u-boot/master, thanks!
On Wed, Oct 22, 2014 at 12:13:18PM +0200, Stefan Roese wrote:
This patch adds basic support for the Marvell DB-MV784MP-GP evaulation
board. This is the first board that uses the recently created
Armada XP 78460 SoC support.
Signed-off-by: Stefan Roese s...@denx.de
Tested-by: Luka Perkov
On Wed, Oct 22, 2014 at 12:13:20PM +0200, Stefan Roese wrote:
All those functions removed with this patch are not accessed at all. So lets
remove them.
Signed-off-by: Stefan Roese s...@denx.de
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Oct 22, 2014 at 12:13:22PM +0200, Stefan Roese wrote:
Signed-off-by: Stefan Roese s...@denx.de
Tested-by: Luka Perkov l...@openwrt.org
Applied to u-boot/master, thanks!
--
Tom
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___
U-Boot
On Wed, Oct 22, 2014 at 12:13:21PM +0200, Stefan Roese wrote:
The barebox version of the kwboot tool has evolved a bit. To support
Armada XP and Dove. Additionally a few minor fixes have been applied.
So lets sync with the latest barebox version.
Please note that the main difference between
On Wed, Oct 22, 2014 at 12:13:23PM +0200, Stefan Roese wrote:
This patch integrates the Barebox version of this kwbimage.c file into
U-Boot. As this version supports the image version 1 type for the
Armada XP / 370 SoCs.
It was easier to integrate the existing and known to be working
On Wed, Oct 22, 2014 at 12:13:24PM +0200, Stefan Roese wrote:
Add target to build it automatically upon make / MAKEALL. This can/should
be set by board / cpu specific headers if a special U-Boot image is
required for this SoC / board.
E.g. used by Marvell Armada XP to automatically build
On Thu, Oct 23, 2014 at 04:15:24PM +0200, Matthias Fuchs wrote:
Hi Valentin,
On 10/14/2014 04:21 PM, Valentin Longchamp wrote:
Hi Matthias,
On 10/14/2014 02:32 PM, Matthias Fuchs wrote:
Hi Valentin,
my patch fixed environment from i2c eeprom. I am not sure on which board
I ran
On 10/23/2014 08:02 AM, Valentin Longchamp wrote:
Hi York,
On 10/01/2014 05:41 PM, York Sun wrote:
On 10/01/2014 08:39 AM, Valentin Longchamp wrote:
Hi York,
On 09/30/2014 05:48 PM, York Sun wrote:
Valentin,
We are seeing the image size of kmcoge4 and kmlion1 are on the edge.
Attempts
Hi Valentin,
On 10/14/2014 04:21 PM, Valentin Longchamp wrote:
Hi Matthias,
On 10/14/2014 02:32 PM, Matthias Fuchs wrote:
Hi Valentin,
my patch fixed environment from i2c eeprom. I am not sure on which board
I ran into that trouble. Probably PMC440. So reverting my former patch
will
Hi Simon,
I have questions of driver model serial.
The comment block in include/serial.h states .pending is optional
8---
* pending() - Check if input/output characters are waiting
*
* This can be used to return an indication of the
- switch to GENERIC_BOARD
- fix env support from eeprom
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
board/esd/pmc440/cmd_pmc440.c |6 +++---
include/configs/PMC440.h |3 +++
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/board/esd/pmc440/cmd_pmc440.c
Hi Matthias,
On Thu, 23 Oct 2014 17:50:23 +0200
Matthias Fuchs matthias.fu...@esd.eu wrote:
...
diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h
index c5e2f16..dc2c976 100644
--- a/include/configs/PMC440.h
+++ b/include/configs/PMC440.h
@@ -29,6 +29,8 @@
#define
Masahiro Yamada (7):
kconfig: move CONFIG_SYS_HZ to lib/Kconfig
x86: set CONFIG_USE_PRIVATE_LIBGCC to y
kbuild: drop CONFIG_USE_PRIVATE_LIBGCC=path/to/libgcc syntax
kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig
kbuild: fix a bug of the u-boot-spl link rule
kconfig: invoke
CONFIG_SYS_HZ is always defined as 1000 in config_fallbacks.h
(but some boards still have redundant definitions).
This commit moves the definition and the document in README to
Kconfig. Since lib/Kconfig can assure that CONFIG_SYS_HZ is 1000,
the sanity check in lib/time.c should be removed.
The motivation of this commit is to change CONFIG_USE_PRIVATE_LIBGCC
to a boolean macro so we can move it to Kconfig.
In the current implementation, there are two forms of syntax
for this macro:
- CONFIG_USE_PRIVATE_LIBGCC=y
- CONFIG_USE_PRIVATE_LIBGCC=path/to/private/libgcc
The latter is
When spl/.config is updated by make spl/menuconfig or friends,
spl/include/config/auto.conf, spl/include/generated/autoconf.h
and some other files must be updated by make silentoldconfig.
There is no hook for SPL in the top Makefile, so this commit
touches .config when spl/.config is updated to
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