On Tue, Jan 16, 2018 at 05:43:48PM +0100, Giulio Benetti wrote:
> flags member of struct timing was not initialized,
> this took to unpredictable behaviour of display flags,
> such DISPLAY_FLAGS_HSYNC_HIGH instead of _LOW etc.
>
> Init timing->flags = 0
>
> Signed-off-by: Giulio Benetti
Hi,
+Vignesh
On Tuesday 16 January 2018 08:55 PM, Tom Rini wrote:
> On Tue, Jan 16, 2018 at 01:43:40PM +0530, Faiz Abbas wrote:
>> Now the u-boot spi image is greater than 0x9, increase the same in
>> env during spi erase.
>>
>> Signed-off-by: Faiz Abbas
>> ---
>>
Hi,
On 16.1.2018 19:38, Ezequiel Garcia wrote:
> On 16 January 2018 at 09:08, Michal Simek wrote:
>> On 15.1.2018 16:46, Ezequiel Garcia wrote:
>>> This commit adds CPU and silicon version information
>>> consuming the SLCR IDCODE and DEVCFG MCTRL registers,
>>>
Signed-off-by: Ashish Kumar
---
include/configs/ls1088aqds.h | 4
include/configs/ls1088ardb.h | 2 ++
2 files changed, 6 insertions(+)
diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h
index d5075c3..5ff632c 100644
---
Previously only SD, NAND etc were secondary boot source and had
IFC-NOR as primary booting target. But for SoC like LS1088
IFC-NOR can be secondary boot source, while QSPI-NOR is primary
booting target, So add options in qixis to switch to other targets
using new commands.
E.g.
'=> qixis_reset
Updating year in zynq files. Also add missing Copyright to board.c.
Signed-off-by: Michal Simek
---
arch/arm/mach-zynq/ddrc.c | 2 +-
arch/arm/mach-zynq/lowlevel_init.S | 2 +-
arch/arm/mach-zynq/slcr.c | 2 +-
arch/arm/mach-zynq/spl.c | 2
compiling U-Boot with bosch_mpcd_sd_defconfig
drops warning:
arch/arm/lib/bootm-fdt.c: In function ‘arch_fixup_fdt’:
arch/arm/lib/bootm-fdt.c:37:6: warning: unused variable ‘ret’
[-Wunused-variable]
int ret = 0;
^~~
Fix it.
Signed-off-by: Heiko Schocher
---
Hello Breno,
Am 16.01.2018 um 15:36 schrieb Breno Matheus Lima:
Hi Jim,
2018-01-16 10:47 GMT-02:00 Heiko Schocher :
Hello Fabio,
Am 16.01.2018 um 12:50 schrieb Fabio Estevam:
Hi Heiko,
On Tue, Jan 16, 2018 at 3:29 AM, Heiko Schocher wrote:
And some Tested-by
Hi Anand,
On 01/17/2018 02:18 AM, Anand Moon wrote:
> Hi Jaehoon
>
> On 16 January 2018 at 12:03, Jaehoon Chung wrote:
>> S2MPS11 has the 10-bucks and 38-ldos regulators.
>> To control the each power, add the s2mps11 regulator driver.
>> Tested with Odroid-xu3 board
ATF use bl32_ep_info->pc to decide if thre is an available bl32,
let's mark it as NULL first.
Signed-off-by: Kever Yang
---
common/spl/spl_atf.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index
Hi Siva,
On 01/16/2018 07:10 PM, Siva Durga Prasad Paladugu wrote:
> Hi Jaehoon,
>
> Any review comments on this.
Thanks for reminding. Will check! :)
Best Regards,
Jaehoon Chung
>
> Thanks,
> Siva
>
>> -Original Message-
>> From: Siva Durga Prasad Paladugu
Hi Breno,
On Tue, Jan 16, 2018 at 12:36 PM, Breno Matheus Lima
wrote:
> I tested your patch on a mx6sabresd board and U-Boot is hanging in
> power_init_board():
Thanks for testing!
Seems like this patch needs a rework then.
Thanks
Michal,
On 01/04/2018 03:56 PM, Michal Simek wrote:
Hi Kever,
On 3.1.2018 03:34, Kever Yang wrote:
Hi Philipp,
On 01/03/2018 04:16 AM, Philipp Tomsich wrote:
The Rockchip-released ATF for the Firefly apparently (i.e. Kever
reported this) does not tolerate a FDT being passed as the
Add support for RZ/A1 series SoCs.
Signed-off-by: Chris Brandt
---
v2:
* Rebased against current tree
---
drivers/serial/serial_sh.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h
index
Rockchip Rockusb driver already merged. So we enable rockusb
support on rk3036 based device.
Signed-off-by: Eddie Cai
---
arch/arm/mach-rockchip/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-rockchip/Kconfig
On Tue, Jan 16, 2018 at 06:56:13AM -0800, Simon Glass wrote:
> Hi Tom,
>
> Here are the patches left over from last time, along with the two to
> fix the 'old dtc' problem you identified. Let me know if there are any
> problems.
>
> I'm still a bit conflicted about the move from fdt@1, kernel@1
On Tue, Jan 16, 2018 at 10:52:14AM +0100, Heiko Schocher wrote:
> Hello Tom,
>
> please pull from u-boot-i2c.git master
>
> The following changes since commit fdb6c3232f66bc9c07c30de87928506477ac4e63:
>
> Merge git://git.denx.de/u-boot-net (2018-01-15 19:01:23 -0500)
>
> are available in
On Tue, Jan 16, 2018 at 10:16:36AM +0100, Maxime Ripard wrote:
> Hi,
>
> Here is a second attempt at transitioning away from the MMC raw environment
> to a FAT-based one for Allwinner SoCs. Since the RFC was quite well
> received, I actually tested it and fixed a few rough edges.
>
> You'll find
Commit 4f425280fa71 ("mmc: fsl_esdhc: Allow all supported prescaler
values") made it possible to set SYSCTL.SDCLKFS to 0 in SDR mode on
i.MX, thus bypassing the SD clock frequency prescaler, in order to be
able to get higher SD clock frequencies in some contexts. However, that
commit missed the
On 01/16/2018 02:47 PM, Alexander Graf wrote:
> Currently our serial device search chokes on the fact that the serial
> probe function could fail. If it does, instead of searching for the next
> usable serial device, it just quits.
>
> This patch changes the fallback logic so that even when a
On 16 January 2018 at 12:29, Tom Rini wrote:
> In some cases when "more" is told to page a given file it will prepend
> the output with:
> ::
> /PATH/TO/THE/FILE
> ::
>
> And when this happens the output will not match the expected length.
> Further, if
In some cases when "more" is told to page a given file it will prepend
the output with:
::
/PATH/TO/THE/FILE
::
And when this happens the output will not match the expected length.
Further, if we use a different pager we will instead fail the coverage
tests as we will not
When in early SPL we make some secure ROM calls that can effect
DRAM, due to this it is more stable to store the args for these
calls in SRAM, but uninitialized and zero'd globals are placed
in BSS, located in DRAM. Force our args into the data section
which is in SRAM during SPL.
Signed-off-by:
Hi Duncan,
On Mon, Jan 15, 2018 at 11:01 AM, Duncan Hare wrote:
>
>
>
>
> Hi Duncan,
>
> On Wed, Jan 10, 2018 at 8:18 PM, Duncan Hare wrote:
>> Date: Wed, 10 Jan 2018 17:54:07 -0800
>> Subject: [PATCH] git_msg_1
>>
>> TCP and
This is useful to make sure no stale data exists in caches after bootloaders.
The worst thing could be some lines of cache were locked in a bootloader
for example during DDR recalibration and never unlocked. This may lead
to really unpredictable issues later down the line.
Signed-off-by: Eugeniy
On 16 January 2018 at 09:08, Michal Simek wrote:
> On 15.1.2018 16:46, Ezequiel Garcia wrote:
>> This commit adds CPU and silicon version information
>> consuming the SLCR IDCODE and DEVCFG MCTRL registers,
>> respectively.
>>
>> Signed-off-by: Ariel D'Alessandro
On Tue, Jan 16, 2018 at 10:47:43AM -0700, Stephen Warren wrote:
> On 01/15/2018 06:53 AM, Tom Rini wrote:
> >On Fri, Jan 12, 2018 at 10:37:06AM -0700, Tom Warren wrote:
> >
> >>Tom,
> >>
> >>Please pull u-boot-tegra/master into U-Boot/master. Thanks!
> >>
> >>All Tegra builds are OK, and Stephen's
On 01/15/2018 06:53 AM, Tom Rini wrote:
On Fri, Jan 12, 2018 at 10:37:06AM -0700, Tom Warren wrote:
Tom,
Please pull u-boot-tegra/master into U-Boot/master. Thanks!
All Tegra builds are OK, and Stephen's automated test system reports that
all tests pass.
The following changes since commit
Add cgu-clk (clock generation unit) node to hsdk device tree.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/dts/hsdk.dts | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arc/dts/hsdk.dts b/arch/arc/dts/hsdk.dts
index a7b276c..67dfb93 100644
---
Add 'Hz' when printing clock frequency in error messages.
Signed-off-by: Eugeniy Paltsev
---
drivers/clk/clk-hsdk-cgu.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/clk-hsdk-cgu.c b/drivers/clk/clk-hsdk-cgu.c
index
Allocate hsdk_cgu_clk private data structure using priv_auto_alloc_size
instead of platdata_auto_alloc_size.
Signed-off-by: Eugeniy Paltsev
---
drivers/clk/clk-hsdk-cgu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/clk-hsdk-cgu.c
Update default AXI, TUN, ARC clock set options:
instead of changing only idiv divider settings adjust also domain PLL
settings.
Add support of TUN_ROM and TUN_PWM clocks (subclocks of TUNN_PLL)
Signed-off-by: Eugeniy Paltsev
---
drivers/clk/clk-hsdk-cgu.c
On 01/15/2018 08:38 PM, Yogesh Gaur wrote:
> For for case of lazyapply method, API fdt_fixup_board_enet() gets invoked
> before DPL being deployed.
> This leads to an issue that fsl-mc fdt fixup status marked as fail and
> dprc driver didn't get registered in linux boot.
>
> Fixes this issue by
Handle the controller version even if quirks are set. The controller in
Renesas Gen3 SoCs does provide the version register, which indicates a
controller v10 and the controller does support internal DMA and /1024
divider.
Signed-off-by: Marek Vasut
Cc: Jaehoon
Enable the HS200 on RCar Gen3 platforms, since the SDHI core supports it.
Signed-off-by: Marek Vasut
Cc: Nobuhiro Iwamatsu
---
configs/r8a7795_salvator-x_defconfig | 3 +++
configs/r8a7795_ulcb_defconfig | 3 +++
The DMA READ completion flag position differs on Socionext and Renesas
SoCs. It is bit 20 on Socionext SoCs and using bit 17 is a hardware bug
and forbidden. It is bit 17 on Renesas SoCs and bit 20 does not work on
them.
Signed-off-by: Marek Vasut
Cc: Jaehoon Chung
Hi Jaehoon
On 16 January 2018 at 12:03, Jaehoon Chung wrote:
> S2MPS11 has the 10-bucks and 38-ldos regulators.
> To control the each power, add the s2mps11 regulator driver.
> Tested with Odroid-xu3 board (Exynos5422)
>
> ODROID-XU3 # regulator list
> | Device
On the Renesas version of the IP, the /1 divider is realized by
setting the clock register [7:0] to 0xff instead of setting bit
10 of the register. Check the quirk and handle accordingly.
Signed-off-by: Marek Vasut
Cc: Jaehoon Chung
Cc:
Add a quirk to identify that the controller is Renesas RCar variant
of the Matsushita SD IP and another quirk indicating it can support
Renesas RCar HS200/HS400/SDR104 modes.
Signed-off-by: Marek Vasut
Cc: Jaehoon Chung
Cc: Masahiro Yamada
Add code for PHY tuning required for SDR104/HS200 support on Renesas RCar.
Signed-off-by: Marek Vasut
Cc: Jaehoon Chung
Cc: Masahiro Yamada
---
drivers/mmc/uniphier-sd.c | 290
Factor out the regulator handling into set_ios and add support for
selecting pin configuration based on the voltage to support UHS modes.
Signed-off-by: Marek Vasut
Cc: Jaehoon Chung
Cc: Masahiro Yamada
---
Drop the ad-hoc DT caps parsing in favor of common framework function.
Signed-off-by: Marek Vasut
Cc: Jaehoon Chung
Cc: Masahiro Yamada
---
drivers/mmc/uniphier-sd.c | 23 +++
1 file
The SD driver calls clk_set_rate() before clk_enable(), yet clk_set_rate()
implementation in the clock driver does not set the SD-IF divider. Fix it.
Signed-off-by: Marek Vasut
Cc: Nobuhiro Iwamatsu
---
drivers/clk/renesas/clk-rcar-gen3.c |
On 01/12/2018 10:15 AM, Jaehoon Chung wrote:
> On 01/07/2018 04:29 AM, Marek Vasut wrote:
>> Factor out the regulator handling into set_ios and add support for
>> selecting pin configuration based on the voltage to support UHS modes.
>>
>> Signed-off-by: Marek Vasut
flags member of struct timing was not initialized,
this took to unpredictable behaviour of display flags,
such DISPLAY_FLAGS_HSYNC_HIGH instead of _LOW etc.
Init timing->flags = 0
Signed-off-by: Giulio Benetti
---
drivers/video/sunxi/sunxi_display.c | 2 ++
1
2018-01-16 23:56 GMT+09:00 Simon Glass :
> On 9 January 2018 at 01:34, Masahiro Yamada
> wrote:
>> libfdt_env.h is supposed to provide system-dependent defines.
>>
>> scripts/dtc/libfdt/libfdt_env.h from upstream DTC is suitable
>> for user-space,
As HSDK is development board it is better to hang on panic instead of
reset the board when panic occurs.
Signed-off-by: Eugeniy Paltsev
---
configs/hsdk_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig
Disable IOC by default with option to enable it.
We don't want to enable IOC in u-boot by default as we want
keep IOC HW at same state as after reset when we launching linux.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/lib/cache.c | 5 -
1 file changed, 4
Signed-off-by: Eugeniy Paltsev
---
arch/arc/lib/cache.c | 18 --
1 file changed, 8 insertions(+), 10 deletions(-)
diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c
index d17948d..04f1d9d 100644
--- a/arch/arc/lib/cache.c
+++
ARC_AUX_SLC_RGN_START1 and ARC_AUX_SLC_RGN_END1 register exist
only if PAE exists in current HW. So we had to check pae_exist bit
before using them.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/include/asm/arcregs.h | 3 +++
arch/arc/lib/cache.c | 28
Previous slc_line_op implementation is broken. It was never tested/used
as we use u-boot with IOC enabled. So if we disable IOC we will
get a lot of errors while using DMA peripherals.
Fix it by replacingi broken slc_line_op with slc region operations (which
are used in linux kernel)
Main
2018-01-16 23:56 GMT+09:00 Simon Glass :
> On 9 January 2018 at 01:34, Masahiro Yamada
> wrote:
>> Remove the tons of code duplication between include/libfdt.h and
>> sciprts/dtc/libfdt/libfdt.h. I am keeping U-Boot local code in
>>
On Tue, Jan 16, 2018 at 01:43:40PM +0530, Faiz Abbas wrote:
> Now the u-boot spi image is greater than 0x9, increase the same in
> env during spi erase.
>
> Signed-off-by: Faiz Abbas
> ---
> include/configs/ti_armv7_keystone2.h | 2 +-
> 1 file changed, 1 insertion(+), 1
Hi Simon,
2018-01-16 23:50 GMT+09:00 Simon Glass :
> Hi Masahiro,
>
> On 9 January 2018 at 01:34, Masahiro Yamada
> wrote:
>> include/libfdt.h is a wrapper of lib/libfdt/libfdt.h, but
>> lib/libfdt/ is no longer a central point of libfdt.
>>
Move generic functions to common location psu_spl_init.c. Function
declarations are added to private header.
These changes are done in connection to the fact that still files from
HDF can be copied over and compilation should pass.
Signed-off-by: Michal Simek
---
Remove SPL_BUILD dependency from zynqmp.c and move it to header file.
Use only one symbol for including psu_init.
Signed-off-by: Michal Simek
---
Changes in v2:
- New patch in this series
board/xilinx/zynqmp/zynqmp.c| 2 +-
include/configs/xilinx_zynqmp.h | 4
On 10 January 2018 at 23:16, Heinrich Schuchardt wrote:
> We should consistently use the efi_handle_t typedef when
> referring to handles.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> v3
> no change
> v2
> no change
> ---
> cmd/bootefi.c
Add low level initialization for zcu102-rev1.0.
Signed-off-by: Michal Simek
---
Changes in v2:
- Get serdes init back because of sata
.../zynqmp/zynqmp-zcu102-rev1.0/psu_init_gpl.c | 975 +
1 file changed, 975 insertions(+)
create mode 100644
On 11 January 2018 at 09:11, Álvaro Fernández Rojas wrote:
> It's a Spansion (s25fl064a) 8 MB SPI flash.
>
> Signed-off-by: Álvaro Fernández Rojas
> Reviewed-by: Daniel Schwierzeck
> Reviewed-by: Jagan Teki
On 11 January 2018 at 09:11, Álvaro Fernández Rojas wrote:
> It's a Winbond (w25x32) 4 MB SPI flash.
>
> Signed-off-by: Álvaro Fernández Rojas
> Reviewed-by: Daniel Schwierzeck
> Reviewed-by: Jagan Teki
>
On 11 January 2018 at 09:11, Álvaro Fernández Rojas wrote:
> This driver manages the SPI controller present on this SoC.
>
> Signed-off-by: Álvaro Fernández Rojas
> Reviewed-by: Daniel Schwierzeck
> Reviewed-by: Jagan Teki
On 10 January 2018 at 23:15, Heinrich Schuchardt wrote:
> CloseProtocol cannot be called without agent handle.
>
> There is no need to close the device path protocol if
> it has been opened without agent handle.
>
> Signed-off-by: Heinrich Schuchardt
> ---
On 11 January 2018 at 09:11, Álvaro Fernández Rojas wrote:
> This driver manages the SPI controller present on this SoC.
>
> Signed-off-by: Álvaro Fernández Rojas
> Reviewed-by: Daniel Schwierzeck
> Reviewed-by: Jagan Teki
On 11 January 2018 at 09:11, Álvaro Fernández Rojas wrote:
> This driver manages the low speed SPI controller present on this SoC.
>
> Signed-off-by: Álvaro Fernández Rojas
> Reviewed-by: Daniel Schwierzeck
> Reviewed-by: Jagan
Hi Peng,
On 9 January 2018 at 04:11, Peng Fan wrote:
> Add heler functions for wait mask set/clr.
>
> Signed-off-by: Peng Fan
> Cc: Stefano Babic
> Cc: Fabio Estevam
> Cc: Masahiro Yamada
On 11 January 2018 at 09:11, Álvaro Fernández Rojas wrote:
> This driver manages the SPI controller present on this SoC.
>
> Signed-off-by: Álvaro Fernández Rojas
> Reviewed-by: Daniel Schwierzeck
> Reviewed-by: Jagan Teki
Hi Mehmet,
On Tue, Jan 16, 2018 at 11:40 AM, Mehmet Ali İPİN
wrote:
> Dear Estevam,
>
> Thank you for your helps. I finally managed to build u-boot-2018. With these
> commands:
> export CROSS_COMPILE=/opt/gcc-arm-none-eabi-7-2017-q4-major/bin/arm-none-eabi-
> export
On 10 January 2018 at 23:15, Heinrich Schuchardt wrote:
> Add color coding to output:
> test sectionblue
> success green
> errors red
> todoyellow
> summary white
> others light gray
>
> Signed-off-by: Heinrich Schuchardt
On 11 January 2018 at 09:11, Álvaro Fernández Rojas wrote:
> This driver manages the SPI controller present on this SoC.
>
> Signed-off-by: Álvaro Fernández Rojas
> Reviewed-by: Daniel Schwierzeck
> Reviewed-by: Jagan Teki
On 10 January 2018 at 23:15, Heinrich Schuchardt wrote:
> Replace list_for_each_safe() and list_entry() by
> list_for_each_entry_safe().
>
> Signed-off-by: Heinrich Schuchardt
> ---
> v3
> no change
> v2
> no change
> ---
>
On 9 January 2018 at 01:34, Masahiro Yamada
wrote:
> Remove the tons of code duplication between include/libfdt.h and
> sciprts/dtc/libfdt/libfdt.h. I am keeping U-Boot local code in
> include/libfdt.h.
>
> Signed-off-by: Masahiro Yamada
On 9 January 2018 at 04:11, Peng Fan wrote:
> Allow the dm driver be omitted by SPL.
>
> Signed-off-by: Peng Fan
> Reviewed-by: Simon Glass
> Cc: Jaehoon Chung
> Cc: Stefano Babic
> ---
>
On 10 January 2018 at 09:06, Heinrich Schuchardt wrote:
> For debugging efi_loader we need the capability to print EFI
> device paths. With this patch we can write:
>
> debug("device path: %pD", dp);
>
> A possible output would be
>
> device path:
On 9 January 2018 at 01:34, Masahiro Yamada
wrote:
> libfdt_env.h is supposed to provide system-dependent defines.
>
> scripts/dtc/libfdt/libfdt_env.h from upstream DTC is suitable
> for user-space, so we should use this for USE_HOSTCC case.
>
> For compiling
Hi Tom,
Here are the patches left over from last time, along with the two to
fix the 'old dtc' problem you identified. Let me know if there are any
problems.
I'm still a bit conflicted about the move from fdt@1, kernel@1 to
fdt-1 and kernel-1 in the FIT format. I've been thinking whether we
On 9 January 2018 at 01:34, Masahiro Yamada
wrote:
> Several host-tools use "bool" type without including .
> This relies on the crappy header inclusion chain.
>
> tools/Makefile has the following line:
>
> HOST_EXTRACFLAGS += -include
On 9 January 2018 at 01:34, Masahiro Yamada
wrote:
> libfdt_env.h exists to contain system-dependent defines:
>
> - typedef of fdt*_t
> - fdt*_to_cpu(), cpu_to_fdt*
>
> working_fdt and FDT_RAMDISK_OVERHEAD are unrelated to the environment,
> so they must get out
Hi Masahiro,
On 9 January 2018 at 01:34, Masahiro Yamada
wrote:
> include/libfdt.h is a wrapper of lib/libfdt/libfdt.h, but
> lib/libfdt/ is no longer a central point of libfdt.
> (Now, scripts/dtc/libfdt is synced with upstream)
>
> Move the content to
On 9 January 2018 at 01:34, Masahiro Yamada
wrote:
> I do not remember why, but this is apparently a file-copy mistake.
> The file name is libfdt.h, but its content is that of libfdt_env.h
>
> Re-import it from upstream Linux.
>
> Signed-off-by: Masahiro Yamada
On 9 January 2018 at 01:34, Masahiro Yamada
wrote:
> The only difference between scripts/dtc/libfdt/fdt_rw.c and
> lib/libfdt/fdt_rw.c is fdt_remove_unused_strings().
>
> It is only used by fdtgrep, so we do not need to compile it for U-Boot
> image. Move it to
On 12/27/2017 06:04 AM, tien.fong.c...@intel.com wrote:
Whoa, this improved substantially since last time I checked. Minor
nitpicks below.
[...]
> +/* USB build is not supported yet in SPL */
> +#ifndef CONFIG_SPL_BUILD
> +#ifdef CONFIG_USB_STORAGE
> +static int init_usb(void)
> +{
> + int
On 14.01.18 16:59, Heinrich Schuchardt wrote:
> On 01/14/2018 04:27 AM, Heinrich Schuchardt wrote:
>> On the x86 architecture the e820 BIOS table defines reserved memory.
>> Mark it as EFI reserved memory.
>>
>
> Hello Simon, hello Bin,
>
> is there a place in the x86 start up code where we
Hi Jim,
2018-01-16 10:47 GMT-02:00 Heiko Schocher :
> Hello Fabio,
>
> Am 16.01.2018 um 12:50 schrieb Fabio Estevam:
>>
>> Hi Heiko,
>>
>> On Tue, Jan 16, 2018 at 3:29 AM, Heiko Schocher wrote:
>>
>>> And some Tested-by would be helpful ...
>>>
>>> @Stefano, @Fabio:
On Tue, Jan 16, 2018 at 07:58:00AM +, Chee, Tien Fong wrote:
> On Mon, 2018-01-15 at 11:36 -0500, Tom Rini wrote:
> > On Wed, Dec 27, 2017 at 01:04:38PM +0800, tien.fong.c...@intel.com
> > wrote:
> >
> > >
> > > From: Tien Fong Chee
> > >
> > > This is file system
On 16.01.18 09:35, Udit Kumar wrote:
>
>
>> -Original Message-
>> From: Heinrich Schuchardt [mailto:xypron.g...@gmx.de]
>> Sent: Tuesday, January 16, 2018 12:39 PM
>> To: Udit Kumar ; Alexander Graf
>> Cc: u-boot@lists.denx.de
>> Subject: Re: UEFI on
Hi Richard,
On Tue, Jan 16, 2018 at 1:22 PM, Richard Weinberger
wrote:
> Heiko, Martin,
>
> Am Dienstag, 16. Januar 2018, 10:11:41 CET schrieb Martin Townsend:
>> Ah. Must be the mail client. Sorry about that I'll setup git send-mail
>> for v2. I'll wait to see what
We are switching to a model where our board file can directly fail probing
of serial devices when they're not usable, so remove the current runtime
hack we have.
Signed-off-by: Alexander Graf
---
arch/arm/mach-bcm283x/include/mach/gpio.h | 1 -
board/raspberrypi/rpi/rpi.c
Now that we have all infrastructure in place to dynamically determine whether
a serial device is actually usable (read: routed to user accessible pins), we
can wire it up to the board.
This patch adds support to determine whether the pl011 or mini-uart or no serial
is routed to the UART RX/TX
Firmware on the Raspberry Pi family of devices can dynamically configure either
the PL011, Mini-UART or no device at all to be routed to the user accessible
UART pins.
That means we need to always include both drivers, because we can never be sure
which of the two serial devices firmware actually
We are switching to a model where a serial device doesn't even get probed when
it's not muxed properly, so we don't need device specific disabling
functionality anymore.
Signed-off-by: Alexander Graf
---
drivers/serial/serial_bcm283x_mu.c | 18 +-
The RPi has proprietary firmware that can be configured (using config.txt)
to expose either the PL11, Mini-UART or no serial device to the UART pins
on the GPIO pin bar of the RPi.
So far we've only half-heartedly dealt with that, with lost of heuristics
that ended up falling apart at times. For
The serial devices on the raspberry pi are based on clocks we can't easily
read and influence in U-Boot. However, the serial devices are always already
properly set up when coming up, so all we need to do is leave them alone.
The way to do that is to specify "skip-init" in device tree usually,
On some boards, serial devices may or may not be muxed properly to actual
pins, depending on firmware configuration. To determine whether we should
use a serial device for U-Boot in-/output, we need to check whether it
is muxed properly.
This is something only the board file can do, so let's
Currently our serial device search chokes on the fact that the serial
probe function could fail. If it does, instead of searching for the next
usable serial device, it just quits.
This patch changes the fallback logic so that even when a serial device
was not probed correctly, we just try the
The BCM2835 family of SoCs has 2 different SD controllers: One based on
the SDHCI spec and a custom, home-grown one.
This patch implements a driver for the latter based on the Linux driver. This
is needed so that we can make use of device trees that assume driver presence
of both SD controllers.
On the bcm2835 the GPIO IP block is responsible to control pin muxing
of the configurable pins on the chip.
This adds a simple helper function that allows a device driver to set
pin muxing according to device tree configuration on those devices.
Signed-off-by: Alexander Graf
---
The bcm2835 firmware provided device trees expect device tree users
to support pin muxing for the SD devices to work properly.
This patch adds pin muxing support to the sdhci based SD controller
on said family of SoCs, so that its pins are getting configured
correctly on boot.
Signed-off-by:
The Raspberry Pi (bcm283x SoC) family contains 2 IP blocks to drive SD
peripherals: A pretty standard SDHCI one called iProc and a home grown
one called "sdhost".
When driving U-Boot by the same device tree that we use for Linux, we
end up in situations where only the "sdhost" device is available
Dear Estevam,
Thank you for your helps. I finally managed to build u-boot-2018. With these
commands:
export CROSS_COMPILE=/opt/gcc-arm-none-eabi-7-2017-q4-major/bin/arm-none-eabi-
export ARCH=arm
make distclean
make mx6sabreauto_defconfig
make
There are u-boot, u-boot.bin, u-boot.img, ...
+ML
Hi Vincenzo,
On Tue, Jan 16, 2018 at 8:21 PM, vnktux wrote:
> Hi all,
>
> I managed to fully boot a bare metal U-Boot on the Intel Camelback Mountain
> CRB (Broadwell-DE).
>
This is great!
> However I have a small problem, basically U-Boot does not override the FSP
1 - 100 of 159 matches
Mail list logo