On 26.4.2018 18:46, Alexander Graf wrote:
> On 04/26/2018 06:33 PM, Michal Simek wrote:
>> On 26.4.2018 13:37, Alexander Graf wrote:
>>> Some times it's handy to have a partition loaded immediately after
>>> the end of the previous blob. The most obvious example for this is
>>> a U-Boot binary
Hi Chris,
On 27.04.2018 00:45, Chris Packham wrote:
On 26/04/18 18:00, Jagan Teki wrote:
On Thu, Mar 15, 2018 at 5:03 PM, Jagan Teki wrote:
kirkwood now support dt along with platform data,
respective boards need to switch into dm for the same.
Added all board
> On Apr 26, 2018, at 19:58, Prabhakar Kushwaha
> wrote:
>>
>
> Even though there are 2 bytes.
> But NAND sub-system only consume 1 byte because all NAND flash has 1 byte
> status register.
>
Then the commit message should describe the position of primary
Hi York,
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of York Sun
> Sent: Friday, April 27, 2018 2:31 AM
> To: Jagdish Gediya ; u-boot@lists.denx.de
> Cc: o...@buserror.net
> Subject: Re: [U-Boot] [PATCH][v2] mtd: nand:
Seems setting bootargs is not legal in bootz command, so segregated the two.
However, the end-result is same as in my original email.
tftp 0x4900 sun7i-a20-cubieboard2.dtb
tftp 0x4600 zImage-Cubieboard2
setenv bootargs console=ttyS0,115200 root=/dev/nfs
On Thu, Apr 19, 2018 at 10:58 AM, Marek Vasut wrote:
> On 04/19/2018 11:50 AM, Ley Foon Tan wrote:
>> Add SPL driver support for Stratix SoC
>>
>> Signed-off-by: Chin Liang See
>> Signed-off-by: Ley Foon Tan
>> ---
>>
On Thu, Apr 19, 2018 at 10:49 AM, Marek Vasut wrote:
> On 04/19/2018 11:50 AM, Ley Foon Tan wrote:
>> Add misc support such as EMAC and cpu info printout for Stratix SoC
>>
>> Signed-off-by: Chin Liang See
>> Signed-off-by: Ley Foon Tan
Hi All.
a)
As a pre-requisite, on the host-machine (serverip 192.168.0.1), the
nfs-export is listed fine :
ajay@latitude-3480:~showmount -e localhost
Export list for localhost:
/srv/nfs/cubieboard2 *
b)
The zImage and dtb files have been generated from 4.6 kernel, as per steps at
The following changes since commit a61f9d1fbbca3c5e59b907ad3071db70ef174872:
Merge git://git.denx.de/u-boot-spi (2018-04-25 20:50:28 -0400)
are available in the Git repository at:
git://git.denx.de/u-boot-usb.git master
for you to fetch changes up to
The following changes since commit d2a1f120cf638fd8a149bc8a46aec961c2fb9406:
Merge git://git.denx.de/u-boot-rockchip (2018-04-26 07:21:41 -0400)
are available in the Git repository at:
git://git.denx.de/u-boot-socfpga.git master
for you to fetch changes up to
The following changes since commit a61f9d1fbbca3c5e59b907ad3071db70ef174872:
Merge git://git.denx.de/u-boot-spi (2018-04-25 20:50:28 -0400)
are available in the Git repository at:
git://git.denx.de/u-boot-sh.git master
for you to fetch changes up to
Hi Jagan,
On 26/04/18 18:00, Jagan Teki wrote:
> On Thu, Mar 15, 2018 at 5:03 PM, Jagan Teki
> wrote:
>> kirkwood now support dt along with platform data,
>> respective boards need to switch into dm for the same.
>
> Added all board mainatiner, using this driver on
Hi Sam,
> Can I ask you some questions about this code?
> 1. Do I understand correctly that this is just some old patch hanging
> in mailing list [1]?
Yes, it is from an old post to the mailing list.
> 2. What is the motivation of adding this command? We already have
> Android boot image
On 04/26/2018 10:47 PM, Bryan O'Donoghue wrote:
> Compiling the f_mass_storage driver for an x86 target results in a
> compilation error as set_bit and clear_bit are provided by bitops.h
>
> The local version of set_bit and clear_bit are doing some IP-block specific
> bit-twiddling so we don't
On 04/17/2018 12:24 PM, Ronak Desai wrote:
> Corrected the chip selection in IFC_NAND_CSEL register. Due to this
> issue in multi-chip nand use-case, IFC was always pointing to the last
> probed chip even though user select another device through "nand device
> " command.
>
> Also, updated the
On 03/20/2018 10:24 PM, Jagdish Gediya wrote:
> As per the IFC hardware manual, Most significant 2 bytes in
> nand_fsr register are the outcome of NAND READ STATUS command.
>
> So status value need to be shifted and aligned as per the nand
> framework requirement.
>
> Signed-off-by: Jagdish
Hi Tom,
On Thu, Apr 26, 2018 at 8:26 AM, Tom Rini wrote:
> Hey all,
>
> This was already brought up by Heinrich Schuchardt, but didn't get much
> traction. So, I'm bringing it up again now. The little feedback from
> that thread was we should move to Linux Kernel style
Hi,
> On 04/26/2018 06:58 PM, Bryan O'Donoghue wrote:
> > On 26/04/18 16:14, Marek Vasut wrote:
> >> On 04/26/2018 04:41 PM, Bryan O'Donoghue wrote:
> >>> Compiling the f_mass_storage driver for an x86 target results in a
> >>> compilation error as set_bit and clear_bit are provided by
> >>>
On 04/26/2018 06:58 PM, Bryan O'Donoghue wrote:
> On 26/04/18 16:14, Marek Vasut wrote:
>> On 04/26/2018 04:41 PM, Bryan O'Donoghue wrote:
>>> Compiling the f_mass_storage driver for an x86 target results in a
>>> compilation error as set_bit and clear_bit are provided by bitops.h
>>>
>>> Fix that
On 04/26/2018 09:33 PM, Dr. Philipp Tomsich wrote:
>
>> On 26 Apr 2018, at 20:18, Klaus Goger
>> wrote:
>>
>> When building the mxs platform in thumb mode gcc generates code using
>> the intra procedure call scratch register (ip/r12) for the calling the
>>
> On 26 Apr 2018, at 20:18, Klaus Goger
> wrote:
>
> When building the mxs platform in thumb mode gcc generates code using
> the intra procedure call scratch register (ip/r12) for the calling the
> lowlevel_init function. This modifies the lr in flush_dcache
On Thu, Apr 26, 2018 at 06:21:31PM +0530, Lokesh Vutla wrote:
> Cache maintenance procedure is same for v7A and v7R
> processors. So re-use cache-cp15.c file except for
> mmu parts.
>
> Tested-by: Michal Simek
> Signed-off-by: Lokesh Vutla
On Thu, Apr 26, 2018 at 06:21:30PM +0530, Lokesh Vutla wrote:
> The Memory Protection Unit(MPU) allows to partition memory into regions
> and set individual protection attributes for each region. In absence
> of MPU a default map[1] will take effect. Add support for configuring
> MPU on Cortex-R,
On Thu, Apr 26, 2018 at 09:20:24AM +0200, Dr. Philipp Tomsich wrote:
> Tom,
>
> I have a number of fixes, cleanups and config-changes for the upcoming release
> ready for you in u-boot-rockchip/master. Please pull.
>
> The Travis-CI report for this tree can be found at
>
On 19 April 2018 at 20:21, Stanislas BERTRAND wrote:
> Hi Alex,
>
> I used work available in
> https://android.googlesource.com/platform/external/u-boot/+/android-o-mr1-iot-preview-7.
> I selected the n-iot-preview-4 because it is U-Boot version 2017.01 which is
>
Hi Kever,
libavb and libavb_ab are different things, and we split them for a
reason. Adding libavb is great, but you don't need to add libavb_ab as an
A/B implementation. The boot_android command referenced by Igor doesn't use
that as an A/B implementation, but uses the structs already defined
The current arch implementation of memcpy cannot be called
from thumb code, because it does not use bx instructions on return.
This patch addresses that. Note, that this patch does not touch
the hot loop of memcpy, so performance is not affected.
Tested on MXS (arm926ejs) with and without
While trying to compile u-boot in thumb due space constraints on a mxs
platform it was observed that there are some thumb-interwork issues
in the handwritten assembly files.
Since the first patch only applies to ARM926EJS and no board on that platform
has thumb enabled for now,it was probably
When building the mxs platform in thumb mode gcc generates code using
the intra procedure call scratch register (ip/r12) for the calling the
lowlevel_init function. This modifies the lr in flush_dcache which
causes u-boot proper to end in an endless loop.
40002334: e1a0c00emov
On 26/04/18 16:14, Marek Vasut wrote:
On 04/26/2018 04:41 PM, Bryan O'Donoghue wrote:
Compiling the f_mass_storage driver for an x86 target results in a
compilation error as set_bit and clear_bit are provided by bitops.h
Fix that now by only compiling up the local definition of set_bit and
This patch adds support for DM to the sh_spi driver. legacy driver support is
removed.
Some TODOs are left over for later, These would be enhancements to the
original functionality, and can come later. The legacy functionality is
removed in this version.
This patch is not tested on board as well
This patch adds support for DM to the mxs spi driver.
Some TODOs are left over for later, These would be enhancements to the
original functionality, and can come later.
The legacy functionality is present in this version, so old boards in the tree
is working with legacy SPI driver functionality.
This patch adds support for DM to the sh_qspi SPI driver.
The legacy functionality is removed in this version, so old boards in
the tree is not working with legacy SPI driver functionality.
Some TODOs are left over for later, These would be enhancements to the
original functionality, and can come
Compiling the f_mass_storage driver for an x86 target results in a
compilation error as set_bit and clear_bit are provided by bitops.h
Fix that now by only compiling up the local definition of set_bit and
clear_bit only if not already provided by the environment.
Signed-off-by: Bryan O'Donoghue
On 26 April 2018 at 00:03, Praneeth Bajjuri wrote:
> Boot android over emmc by default thru FIT image
>
> Signed-off-by: Praneeth Bajjuri
> Suggested-by: Andrew F.Davis
> ---
Reviewed-by: Sam Protsenko
>
On 26 April 2018 at 00:03, Praneeth Bajjuri wrote:
> Enable the FDT library overlay support for all TI SOC family.
>
> Without this option, when Loading fdt from FIT image, the
> following warning is seen.
>
> "config with overlays but CONFIG_OF_LIBFDT_OVERLAY not set".
>
>
On 04/26/2018 06:33 PM, Michal Simek wrote:
On 26.4.2018 13:37, Alexander Graf wrote:
Some times it's handy to have a partition loaded immediately after
the end of the previous blob. The most obvious example for this is
a U-Boot binary (coming from .elf) and a device tree file.
This patch adds
On 26.4.2018 13:37, Alexander Graf wrote:
> Some times it's handy to have a partition loaded immediately after
> the end of the previous blob. The most obvious example for this is
> a U-Boot binary (coming from .elf) and a device tree file.
>
> This patch adds that logic. With this, the following
On 26.4.2018 18:02, Alexander Graf wrote:
> On 04/26/2018 05:40 PM, Michal Simek wrote:
>> On 26.4.2018 17:21, Alexander Graf wrote:
>>> On 04/20/2018 09:46 AM, Michal Simek wrote:
From: Nitin Jain
This patch used for filling the MMU map for DDR at run time
Signed-off-by: Masahiro Yamada
---
test/dm/regmap.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/test/dm/regmap.c b/test/dm/regmap.c
index 8125345..4b7dac1 100644
--- a/test/dm/regmap.c
+++ b/test/dm/regmap.c
@@ -1,6 +1,6 @@
/*
*
Hi Simon,
2018-04-26 23:40 GMT+09:00 Simon Glass :
> Hi Masahiro,
>
> On 18 April 2018 at 21:14, Masahiro Yamada
> wrote:
>> device_is_compatible() takes udevice, but there is no such a helper
>> that takes ofnode.
>>
>> Signed-off-by: Masahiro
Test ofnode_device_is_compatible(), and also ofnode_path().
Requested-by: Simon Glass
Signed-off-by: Masahiro Yamada
---
test/dm/Makefile | 1 +
test/dm/ofnode.c | 19 +++
2 files changed, 20 insertions(+)
create mode 100644
On 04/26/2018 05:40 PM, Michal Simek wrote:
On 26.4.2018 17:21, Alexander Graf wrote:
On 04/20/2018 09:46 AM, Michal Simek wrote:
From: Nitin Jain
This patch used for filling the MMU map for DDR at run time based
information read from Device Tree or automatically
On 26.4.2018 17:21, Alexander Graf wrote:
> On 04/20/2018 09:46 AM, Michal Simek wrote:
>> From: Nitin Jain
>>
>> This patch used for filling the MMU map for DDR at run time based
>> information read from Device Tree or automatically detected from static
>> configuration.
>
Hi,
On 26/04/2018 16:40, Simon Glass wrote:
> Hi Neil,
>
> On 23 April 2018 at 08:16, Neil Armstrong wrote:
>> Add the regmap_update_bits() to simply the read/modify/write of registers
>> in a single command. The function is taken from Linux regmap
>> implementation.
>>
On 04/20/2018 09:46 AM, Michal Simek wrote:
From: Nitin Jain
This patch used for filling the MMU map for DDR at run time based
information read from Device Tree or automatically detected from static
configuration.
The sentence above is missing a word somewhere :).
On 04/26/2018 04:23 PM, Patrice Chotard wrote:
> From: Christophe Kerello
>
> This patch adds phy tranceiver driver for STM32 USB PHY
> Controller (usbphyc) that provides dual port High-Speed
> phy for OTG (single port) and EHCI/OHCI host controller
> (two ports).
>
On 04/26/2018 02:51 PM, Lokesh Vutla wrote:
The Cortex-R* processors are a mid-range CPUs for use in deeply-embedded,
real-time systems. It implements the ARMv7-R architecture, and includes
Thumb-2 technology for optimum code density and processing throughput.
Except for MPU(Memory Protection
On 04/26/2018 04:41 PM, Bryan O'Donoghue wrote:
> Compiling the f_mass_storage driver for an x86 target results in a
> compilation error as set_bit and clear_bit are provided by bitops.h
>
> Fix that now by only compiling up the local definition of set_bit and
> clear_bit only if not already
From: Christophe Kerello
Enable support for the regulator functions of the STPMU1X PMIC. The
driver implements get/set api for the various BUCKS and LDOs supported
by the PMIC device. This driver is controlled by a device tree node
which includes voltage limits.
This series :
_ adds stpmu1 regulator driver
_ enables regulator relative flags in stm32mp15_basic_defconfig
_ updates pmic driver to bind regulator child nodes
_ adds regulator nodes entry in DT
Christophe Kerello (1):
power: regulator: stpmu1: Introduce stpmu1 driver
Patrice
Enable DM_REGULATOR_STPMU1 flag to activate regulator
driver for STM32MP15 SoC and CMD_REGULATOR flag to be
able to set/get regulator state int U-boot command line.
Disable PMIC_CHILDREN as this flag is not needed in SPL
for STM32MP1.
Signed-off-by: Patrice Chotard
---
Add regulator nodes needed by stpmu1 regulator driver
Add vmmc-supply and vqmmc-supply regulator property for
sdmmc1 and sdmmc2.
Signed-off-by: Christophe Kerello
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32mp157c-ed1.dts| 272
Add regulator bindings to get access to regulator managed
by drivers/power/regulator/stpmu1.c regulator driver.
Signed-off-by: Christophe Kerello
Signed-off-by: Patrick Delaunay
Signed-off-by: Patrice Chotard
---
it misses one patch, sorry
i ressend it right now
Patrice
On 04/26/2018 04:42 PM, Patrice Chotard wrote:
>
> This series :
>_ adds stpmu1 regulator driver
>_ enables regulator relative flags in stm32mp15_basic_defconfig
>_ updates pmic driver to bind regulator child nodes
>_
Add missing reset property in quadspi node.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32f746.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
index 8581df9a2778..4845279ccfca 100644
---
From: Christophe Kerello
Quad-SPI interface is able to manage 2 spi nor devices.
FSEL bit selects the flash memory to be addressed in single flash mode.
Signed-off-by: Christophe Kerello
Signed-off-by: Patrice Chotard
Align qspi bindings following kernel dt-bindings
Documentation/devicetree/bindings/mtd/stm32-quadspi.txt
from kernel v4.17-rc1.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32f746.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
In some situation, QSPI controller is already configured by an early
boot stage, adding reset support will insure that QSPI controller is
started from a pristine state.
Signed-off-by: Patrice Chotard
---
drivers/spi/stm32_qspi.c | 15 +++
1 file changed, 15
From: Christophe Kerello
Align qspi bindings following kernel dt-bindings
Documentation/devicetree/bindings/mtd/stm32-quadspi.txt
from kernel v4.12-rc1.
Signed-off-by: Christophe Kerello
Signed-off-by: Patrice Chotard
Use dev_read_xxx() instead of old manner fdt_xxx() API
Signed-off-by: Patrice Chotard
---
drivers/spi/stm32_qspi.c | 17 ++---
1 file changed, 6 insertions(+), 11 deletions(-)
diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
index
Sort include files by alphabetical order
Signed-off-by: Patrice Chotard
---
drivers/spi/stm32_qspi.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
index 4977b89548d7..7ce8afb91eb3 100644
---
From: Patrick Delaunay
Fix parameters function alingemnt
Fix variable declaration
Signed-off-by: Patrick Delaunay
Signed-off-by: Patrice Chotard
---
drivers/spi/stm32_qspi.c | 31 ++-
1
From: Christophe Kerello
Add "st,stm32f469-qspi" compatible which is used on kernel side.
This will be necessary when DT will be synchronised from kernel.
Signed-off-by: Christophe Kerello
Signed-off-by: Patrice Chotard
From: Christophe Kerello
We face issue on Macronix/Spansion spi nors due to bad mode management.
We solve these issues using following mode configurations:
- read_cmd = CMD_READ_QUAD_OUTPUT_FAST => 1-1-4
- read_cmd = CMD_READ_DUAL_OUTPUT_FAST => 1-1-2
- write_cmd =
As all platforms which uses this driver have CONFIG_CLK flag
enable in their defconfig, we can remove it from driver code.
Signed-off-by: Patrice Chotard
---
drivers/spi/stm32_qspi.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git
This series :
_ removes useless CONFIG_CLK flag
_ fixes checkpatch warnings
_ sorts include files in alphabetical order
_ align DT bindings with kernel in DT and in driver code
_ updates mode management
_ add chip select management
_ uses dev_read_xxx API
_ add reset support
From: Fabrice Gasnier
Add regulator driver for STM32 voltage reference buffer which can be
used as voltage reference for ADCs, DACs and external components through
dedicated VREF+ pin.
Signed-off-by: Fabrice Gasnier
Signed-off-by: Patrice Chotard
This series :
_ adds STM32 VREFBUF regulator driver
_ adds VREFBUF clock gating
_ enables STM32_VREFBUF flag in stm32mp15_basic_defconfig
_ adds VREFBUF DT node
Fabrice Gasnier (3):
power: regulator: Add support for stm32-vrefbuf
clk: stm32mp1: Add VREF clock gating
configs:
From: Fabrice Gasnier
Enable vrefbuf on stm32mp15, to be used by ADC.
Signed-off-by: Fabrice Gasnier
Signed-off-by: Patrice Chotard
---
configs/stm32mp15_basic_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git
Add vrefbuf device tree node. This allows to get
a voltage reference for ADCs.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32mp157.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/dts/stm32mp157.dtsi b/arch/arm/dts/stm32mp157.dtsi
index
From: Fabrice Gasnier
Add VREF clock gating, that may be used by STM32 VREFBUF regulator.
Signed-off-by: Fabrice Gasnier
Signed-off-by: Patrice Chotard
---
drivers/clk/clk_stm32mp1.c | 3 +++
1 file changed, 3
From: Patrick Delaunay
This driver binds and manages the following regulator of
SoC's PWR block :
- reg11
- reg18
- usb33
Signed-off-by: Patrick Delaunay
Signed-off-by: Patrice Chotard
---
Add SoC power regulator entry for reg11, reg18 and usb33
regulator.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32mp157.dtsi | 33 +
1 file changed, 33 insertions(+)
diff --git a/arch/arm/dts/stm32mp157.dtsi
This series :
_ adds stmpu157 SoC power regulator driver
_ populates DT with SoC power regulator entry
Patrice Chotard (1):
ARM: dts: stm32mp157: Add SoC pwr regulator entry
Patrick Delaunay (1):
stm32mp: regulator: add SoC pwr regulator support
arch/arm/dts/stm32mp157.dtsi
Add regulator nodes needed by stpmu1 regulator driver
Add vmmc-supply and vqmmc-supply regulator property for
sdmmc1 and sdmmc2.
Signed-off-by: Christophe Kerello
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32mp157c-ed1.dts| 272
Add regulator bindings to get access to regulator managed
by drivers/power/regulator/stpmu1.c regulator driver.
Signed-off-by: Christophe Kerello
Signed-off-by: Patrick Delaunay
Signed-off-by: Patrice Chotard
---
This series :
_ adds stpmu1 regulator driver
_ enables regulator relative flags in stm32mp15_basic_defconfig
_ updates pmic driver to bind regulator child nodes
_ adds regulator nodes entry in DT
Patrice Chotard (3):
power: pmic: stpmu1: Add regulator bindings
ARM: dts:
Hi Mario,
On 26 April 2018 at 00:07, Mario Six wrote:
> Hi Simon,
>
> On Tue, Apr 24, 2018 at 11:53 PM, Simon Glass wrote:
>> Hi Mario,
>>
>> On 19 April 2018 at 01:50, Mario Six wrote:
>>>
>>> Hi Simon,
>>>
>>> On Wed, Apr 18, 2018 at
Enable DM_REGULATOR_STPMU1 flag to activate regulator
driver for STM32MP15 SoC and CMD_REGULATOR flag to be
able to set/get regulator state int U-boot command line.
Disable PMIC_CHILDREN as this flag is not needed in SPL
for STM32MP1.
Signed-off-by: Patrice Chotard
---
Hi Neil,
On 23 April 2018 at 08:18, Neil Armstrong wrote:
> Add an 'adc' cli command to get adc devices informations and read single
> shots datas.
>
> Signed-off-by: Neil Armstrong
> ---
> cmd/Kconfig | 7
> cmd/Makefile | 1 +
>
Hi Masahiro,
On 18 April 2018 at 21:14, Masahiro Yamada
wrote:
> device_is_compatible() takes udevice, but there is no such a helper
> that takes ofnode.
>
> Signed-off-by: Masahiro Yamada
> ---
>
> Changes in v2: None
>
>
Hi Neil,
On 23 April 2018 at 08:16, Neil Armstrong wrote:
> Add the regmap_update_bits() to simply the read/modify/write of registers
> in a single command. The function is taken from Linux regmap
> implementation.
>
> Signed-off-by: Neil Armstrong
Hi Miquel,
On 24 April 2018 at 07:17, Miquel Raynal wrote:
> Hi Simon,
>
> On Fri, 30 Mar 2018 06:42:32 +0800, Simon Glass
> wrote:
>
>> Hi Miquel,
>>
>> On 29 March 2018 at 15:43, Miquel Raynal wrote:
>> > Add support
On 18 April 2018 at 21:14, Masahiro Yamada
wrote:
> Currently, regmap_init_mem() takes a udevice. This requires the node
> has already been associated with a device. It prevents syscon/regmap
> from behaving like those in Linux.
>
> Change the first argumenet to
Hi Miquel,
On 24 April 2018 at 06:53, Miquel Raynal wrote:
> Hi Simon,
>
> I am back on that topic, let me answer some of your questions before
> addressing them in a next version.
>
> On Fri, 30 Mar 2018 06:42:25 +0800, Simon Glass
> wrote:
>
>> Hi
From: Christophe Kerello
This patch adds phy tranceiver driver for STM32 USB PHY
Controller (usbphyc) that provides dual port High-Speed
phy for OTG (single port) and EHCI/OHCI host controller
(two ports).
One port of the phy is shared between the two USB controllers
This series addresses a PCIe reliability issue as observed on Apalis T30
related to a PCIe reset timing violation.
This series is available at
http://git.toradex.com/cgit/u-boot-toradex.git/log/?h=for-next
Changes in v3:
- Updated copyright period to 2014-2018.
- Added a blank line after
From: Marcel Ziswiler
Add some more comments describing the various PCIe ports available.
Signed-off-by: Marcel Ziswiler
---
Changes in v3: None
Changes in v2: None
arch/arm/dts/tegra30-apalis.dts | 3 +++
1 file changed, 3
From: Marcel Ziswiler
Allow optionally bringing up the Apalis type specific 4 lane PCIe port
as well as the PCIe switch as found on the Apalis Evaluation board. In
order to avoid violating the PCIe reset timing do this by overriding the
tegra_pcie_board_port_reset()
From: Marcel Ziswiler
Fix optional Apalis type specific 4 lane PCIe port 0 and Apalis PCIe
port 1 pin muxing.
Signed-off-by: Marcel Ziswiler
---
Changes in v3: None
Changes in v2:
- Leave resp. enable all port 0 pins input drivers as
Hi Patrice,
> Hi
>
> It's a gentle reminder as this patch is present on mailing list since
> 5 weeks without any feedback.
Deepest apologizes for the delay.
I will test this patch - as some Samsung SoCs may use this feature and
let you know.
>
> Thanks
>
> On 03/15/2018 09:34 AM,
Le 26/04/2018 à 12:31, Jaehoon Chung a écrit :
Hi,
On 04/09/2018 09:02 PM, Guillaume Gardet wrote:
Hi Jaehoon,
There are problems with SD card access on Samsung Chromebook (snow) with latest
master (and also 2018.05-rc1 and 2018.03).
eMMC is ok, but SD card access leads to 'unable to
On 04/26/2018 03:13 PM, Patrice CHOTARD wrote:
> Hi
>
> It's a gentle reminder as this patch is present on mailing list since 5
> weeks without any feedback.
This should've been like a third non-gentle ping, seriously, two weeks
without feedback is already sucky. Time to buzz Lukasz, although
Hi
It's a gentle reminder as this patch is present on mailing list since 5
weeks without any feedback.
Thanks
On 03/15/2018 09:34 AM, patrice.chot...@st.com wrote:
> From: Christophe Kerello
>
> In case usb configuration is unknown (cdev->config == NULL), non
This commit adds support for DDC and HSC boards from
K+P in u-boot.
Console output:
U-Boot 2018.05-rc2-00090-g752b7ed6f9 (Apr 26 2018 - 14:24:24 +0200)
CPU: Freescale i.MX53 rev2.1 at 800 MHz
Reset cause: WDOG
Model: K+P iMX53
DRAM: 512 MiB
MMC: FSL_SDHC: 0
Loading Environment from MMC...
On 26 April 2018 at 06:05, Kever Yang wrote:
> Hi Igor,
>
> It's great to see the patch set to support AVB2.0, the upstream
> libavb(from aosp) combine the AVB with A/B which I think should be
> two separate feature, are you going to split them?
Hi Kever,
Right,
On 04/26/2018 08:15 AM, Ang, Chee Hong wrote:
> On Fri, 2018-04-20 at 05:42 +0200, Marek Vasut wrote:
>> On 04/20/2018 05:26 AM, chee.hong@intel.com wrote:
>>>
>>> From: Chee Hong Ang
>>>
>>> Enable 'fpga' command in u-boot. User will be able to use the
>>> fpga
On 04/26/2018 08:12 AM, Ang, Chee Hong wrote:
> On Fri, 2018-04-20 at 05:41 +0200, Marek Vasut wrote:
>> On 04/20/2018 05:26 AM, chee.hong@intel.com wrote:
>>>
>>> From: Chee Hong Ang
>>>
>>> Enable FPGA reconfiguration support on Stratix10 SoC.
>>>
>>> Signed-off-by:
Cache maintenance procedure is same for v7A and v7R
processors. So re-use cache-cp15.c file except for
mmu parts.
Tested-by: Michal Simek
Signed-off-by: Lokesh Vutla
---
arch/arm/cpu/armv7/mpu_v7r.c | 11 +++
arch/arm/lib/cache-cp15.c|
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