Now that BUILD_TARGET is in Kconfig we can define a default for boards
using the Kirkwood SoC.
Signed-off-by: Chris Packham
Cc: Jagan Teki
---
This is based on http://patchwork.ozlabs.org/patch/1026858/
Kconfig| 1 +
configs/SBx81LIFKW_defconfig | 1 -
Fix a typo in the error message from CheckOutputDir().
Signed-off-by: Chris Packham
---
tools/buildman/control.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/buildman/control.py b/tools/buildman/control.py
index 27916d3c355d..fcf531c5f143 100644
---
Migrate CONFIG_BUILD_TARGET into Kconfig.
Signed-off-by: Jagan Teki
---
Changes for v2:
- build target type 'u-boot.itb' when SPL_LOAD_FIT being used
Kconfig | 13 +
README| 7 ---
Add u-boot.itb BUILD_TARGET for Rockchip platform when SPL_LOAD_FIT
is being used. This can get rid of building itb explicitly with
'make u-boot.itb' all required images will now build just by make.
Signed-off-by: Jagan Teki
---
Changes for v2:
- build target type 'u-boot.itb' when SPL_LOAD_FIT
On 1/17/19 7:52 AM, tien.fong.c...@intel.com wrote:
> From: Stefan Agner
>
> Drop the statically allocated get_contents_vfatname_block and
> dynamically allocate a buffer only if required. This saves
> 64KiB of memory.
>
> Signed-off-by: Stefan Agner
> Signed-off-by: Tien Fong Chee
> ---
>
On 1/17/19 7:57 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> This is minimum memory pool size required to get SPL booting to U-Boot,
> such as FPGA program and loading U-Boot image from FAT.
Rather, this is the minimal size needed for FAT to work ? But then ,
maybe you should
On Fri, 18 Jan 2019, 8:03 PM Jagan Teki On Fri, Jan 18, 2019 at 12:18 PM Chris Packham
> wrote:
> >
> >
> >
> > On Fri, 18 Jan 2019, 6:57 AM Jagan Teki wrote:
> >>
> >> Migrate CONFIG_BUILD_TARGET into Kconfig.
> >>
> >> Signed-off-by: Jagan Teki
> >> ---
> >> Kconfig
On Fri, Jan 18, 2019 at 12:18 PM Chris Packham wrote:
>
>
>
> On Fri, 18 Jan 2019, 6:57 AM Jagan Teki >
>> Migrate CONFIG_BUILD_TARGET into Kconfig.
>>
>> Signed-off-by: Jagan Teki
>> ---
>> Kconfig | 13 +
>> README
On Fri, 18 Jan 2019, 6:57 AM Jagan Teki Migrate CONFIG_BUILD_TARGET into Kconfig.
>
> Signed-off-by: Jagan Teki
> ---
> Kconfig | 13 +
> README| 7 ---
> arch/arm/mach-mvebu/include/mach/config.h | 5 -
On Fri, 18 Jan 2019, 7:15 PM Stefan Roese Hi Chris,
>
> On 17.01.19 20:57, Chris Packham wrote:
> > Hi Stefan,
> >
> > On Fri, Jan 18, 2019 at 2:35 AM Stefan Roese wrote:
> >>
> >> This patch enables the DT PCIe nodes for the Armada XP/37x/38x boards.
> >> This is needed for the new DM_PCI
On 1/17/19 6:15 PM, Tom Rini wrote:
> On Thu, Jan 17, 2019 at 05:50:27PM -0700, Stephen Warren wrote:
>> On 1/17/19 5:42 PM, Tom Rini wrote:
>>> On Thu, Jan 17, 2019 at 05:34:57PM -0700, Stephen Warren wrote:
>>>
Tom,
The recent set of patches pushed to u-boot/master cause DFU
On 17.01.19 18:56, Jagan Teki wrote:
Migrate CONFIG_BUILD_TARGET into Kconfig.
Signed-off-by: Jagan Teki
---
Kconfig | 13 +
README| 7 ---
arch/arm/mach-mvebu/include/mach/config.h | 5 -
Hi Chris,
On 17.01.19 20:57, Chris Packham wrote:
Hi Stefan,
On Fri, Jan 18, 2019 at 2:35 AM Stefan Roese wrote:
This patch enables the DT PCIe nodes for the Armada XP/37x/38x boards.
This is needed for the new DM_PCI support in the MVEBU PCIe driver.
Signed-off-by: Stefan Roese
Cc: Dirk
> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Thursday, January 17, 2019 11:51 PM
> To: Anup Patel ; Rick Chen ;
> Bin Meng ; Joe Hershberger
> ; Lukas Auer ;
> Masahiro Yamada ; Simon Glass
>
> Cc: Palmer Dabbelt ; Paul Walmsley
> ; Atish Patra ;
>
> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Thursday, January 17, 2019 11:37 PM
> To: Anup Patel ; Rick Chen ;
> Bin Meng ; Joe Hershberger
> ; Lukas Auer ;
> Masahiro Yamada ; Simon Glass
>
> Cc: Palmer Dabbelt ; Paul Walmsley
> ; Atish Patra ;
>
> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Friday, January 18, 2019 4:39 AM
> To: Anup Patel ; Rick Chen ;
> Bin Meng ; Joe Hershberger
> ; Lukas Auer ;
> Masahiro Yamada ; Simon Glass
>
> Cc: Palmer Dabbelt ; Paul Walmsley
> ; Atish Patra ;
> Christoph
> -Original Message-
> From: York Sun
> Sent: Friday, January 18, 2019 2:43 AM
> To: Rajesh Bhagat ; u-boot@lists.denx.de
> Cc: Prabhakar Kushwaha ; Pankit Garg
>
> Subject: Re: [PATCH 2/7] drivers: ifc: restore the legacy flow for IFC config
>
> On 12/26/18 8:37 PM, Rajesh Bhagat
On 1/17/19 8:58 AM, Troy Benjegerdes wrote:
So I take it I could use my version of U-boot to load BBL,
then your S-mode U-boot?
No need of your version of U-boot to load BBL. This patchset intend
to follow the standard boot flow.
ZSBL->FSBL->BBL/OpenSBI->U-boot->Linux.
(From ROM)--(M
On Thu, 2019-01-17 at 07:23 -0500, Tom Rini wrote:
> On Thu, Jan 17, 2019 at 03:01:49PM +0800, tien.fong.c...@intel.com
> wrote:
>
> >
> > From: Tien Fong Chee
> >
> > CONFIG_SPL_EXT_SUPPORT can be used to include/exclude the FS EXT4
> > from
> > SPL build. Excluding the FS EXT4 from SPL build
On Thu, 2019-01-17 at 07:25 -0500, Tom Rini wrote:
> On Thu, Jan 17, 2019 at 08:54:48AM +0100, Simon Goldschmidt wrote:
> >
> > On Thu, Jan 17, 2019 at 8:10 AM wrote:
> > >
> > >
> > > From: Tien Fong Chee
> > >
> > > Most of the time SPL only needs very simple FAT reading, so
> > > having
>
On Thu, Jan 17, 2019 at 09:16:26PM +, André Przywara wrote:
> On Thu, 17 Jan 2019 21:09:45 +0530
> Manivannan Sadhasivam wrote:
>
> Hi,
>
> > [On top of Andre's review]
> >
> > On Mon, Jan 14, 2019 at 06:11:03PM +0530, Amit Singh Tomar wrote:
> > > This adds common arch owl support that
Hi Shawn,
On Fri, Jan 18, 2019 at 08:57:03AM +0800, Shawn Guo wrote:
> Hi Manivannan,
>
> On Thu, Jan 17, 2019 at 08:23:08PM +0530, Manivannan Sadhasivam wrote:
> > Hi Shawn,
> >
> > On Thu, Jan 17, 2019 at 12:09:50PM +0800, Shawn Guo wrote:
> > > It adds missing pinctrl headers, updates clock
On Thu, Jan 17, 2019 at 05:50:27PM -0700, Stephen Warren wrote:
> On 1/17/19 5:42 PM, Tom Rini wrote:
> >On Thu, Jan 17, 2019 at 05:34:57PM -0700, Stephen Warren wrote:
> >
> >>Tom,
> >>
> >>The recent set of patches pushed to u-boot/master cause DFU failures on both
> >>Jetson TK1 and Jetson TX1
Hi Jagan,
This is the patch I'm looking for, I try to enable u-boot.itb build but
I failed with modify the legacy Makefile, thanks.
On 01/18/2019 01:57 AM, Jagan Teki wrote:
> Add u-boot.itb BUILD_TARGET for Rockchip RK3368 and RK3399
> SoC, this can get rid of building itb explicitly with
>
Hi Igor,
On Thu, Jan 17, 2019 at 04:37:40PM +0200, Igor Opaniuk wrote:
> As Poplar supports running TF-A with OP-TEE as BL32
> payload, add op-tee node in DT, which enables usage of
> OP-TEE driver (which provides an interface for requesting services
> from OP-TEE).
>
> Signed-off-by: Igor
Hi Manivannan,
On Thu, Jan 17, 2019 at 08:23:08PM +0530, Manivannan Sadhasivam wrote:
> Hi Shawn,
>
> On Thu, Jan 17, 2019 at 12:09:50PM +0800, Shawn Guo wrote:
> > It adds missing pinctrl headers, updates clock header and sync up Poplar
> > device tree with kernel 4.20 release.
> >
> >
On 1/17/19 5:42 PM, Tom Rini wrote:
On Thu, Jan 17, 2019 at 05:34:57PM -0700, Stephen Warren wrote:
Tom,
The recent set of patches pushed to u-boot/master cause DFU failures on both
Jetson TK1 and Jetson TX1 (i.e. all platforms where I run the DFU test) with
the following in the log:
host:
On Thu, Jan 17, 2019 at 05:34:57PM -0700, Stephen Warren wrote:
> Tom,
>
> The recent set of patches pushed to u-boot/master cause DFU failures on both
> Jetson TK1 and Jetson TX1 (i.e. all platforms where I run the DFU test) with
> the following in the log:
>
> host:
> dfu-util -a 0 -U
>
Tom,
The recent set of patches pushed to u-boot/master cause DFU failures on
both Jetson TK1 and Jetson TX1 (i.e. all platforms where I run the DFU
test) with the following in the log:
host:
dfu-util -a 0 -U
On 17.01.19 11:38, Anup Patel wrote:
> This patchset adds SiFive Freedom Unleashed (FU540) support
> to RISC-V U-Boot.
>
> The patches are based upon latest RISC-V U-Boot tree
> (git://git.denx.de/u-boot-riscv.git) at commit id
> 91882c472d8c0aef4db699d3f2de55bf43d4ae4b
>
> All drivers namely:
On 17.01.19 11:39, Anup Patel wrote:
> This patch adds SiFive FU540 board support. For now, only
> SiFive serial, SiFive PRCI, and Cadance MACB drivers are
> only enabled. The SiFive FU540 defconfig by default builds
> U-Boot for S-Mode because U-Boot on SiFive FU540 will run
> in S-Mode as
On Mon, Jan 14, 2019 at 10:38:18PM +0100, Simon Goldschmidt wrote:
> This adds two new functions, lmb_alloc_addr and
> lmb_get_unreserved_size.
>
> lmb_alloc_addr behaves like lmb_alloc, but it tries to allocate a
> pre-specified address range. Unlike lmb_reserve, this address range
> must be
On Mon, Jan 14, 2019 at 10:38:17PM +0100, Simon Goldschmidt wrote:
> boot_fdt_add_mem_rsv_regions() adds reserved memory sections to an lmb
> struct. Currently, it only parses regions described by /memreserve/
> entries.
>
> Extend this to the more commonly used scheme of the "reserved-memory"
>
On Mon, Jan 14, 2019 at 10:38:19PM +0100, Simon Goldschmidt wrote:
> This fixes CVE-2018-18440 ("insufficient boundary checks in filesystem
> image load") by using lmb to check the load size of a file against
> reserved memory addresses.
>
> Signed-off-by: Simon Goldschmidt
> Reviewed-by: Simon
On Mon, Jan 14, 2019 at 10:38:15PM +0100, Simon Goldschmidt wrote:
> The lmb code fails if base + size of RAM overflows to zero.
>
> Fix this by calculating end as 'base + size - 1' instead of 'base + size'
> where appropriate.
>
> Added tests to assert this is fixed.
>
> Signed-off-by: Simon
On Mon, Jan 14, 2019 at 10:38:22PM +0100, Simon Goldschmidt wrote:
> This fixes CVE-2018-18439 ("insufficient boundary checks in network
> image boot") by using lmb to check for a valid range to store
> received blocks.
>
> Signed-off-by: Simon Goldschmidt
> Acked-by: Joe Hershberger
With
On Mon, Jan 14, 2019 at 10:38:21PM +0100, Simon Goldschmidt wrote:
> lmb.h includes an extern declaration of "struct lmb lmb;" which
> is not used anywhere, so remove it.
>
> Signed-off-by: Simon Goldschmidt
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
On Mon, Jan 14, 2019 at 10:38:23PM +0100, Simon Goldschmidt wrote:
> This fixes 'arch_lmb_reserve()' for ARM that tries to detect in which
> DRAM bank 'sp' is in.
>
> This code failed if a bank was at the end of physical address range
> (i.e. size + length overflowed to 0).
>
> To fix this,
On Mon, Jan 14, 2019 at 10:38:20PM +0100, Simon Goldschmidt wrote:
> This reduces duplicate code only.
>
> Signed-off-by: Simon Goldschmidt
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
On Mon, Jan 14, 2019 at 10:38:16PM +0100, Simon Goldschmidt wrote:
> lmb_add_region handles overlapping regions wrong: instead of merging
> or rejecting to add a new reserved region that overlaps an existing
> one, it just adds the new region.
>
> Since internally the same function is used for
On Mon, Jan 14, 2019 at 10:38:14PM +0100, Simon Goldschmidt wrote:
> Add basic tests for the lmb memory allocation code used to reserve and
> allocate memory during boot.
>
> Signed-off-by: Simon Goldschmidt
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
signature.asc
On Tue, Dec 11, 2018 at 10:13:56AM +0100, Horatiu Vultur wrote:
> The spi_flash_read_env function is a wrapper over spi_flash_read, which
> enables the env to read multiple flash page size from flash until '\0\0'
> is read or the end of env partition is reached. Instead of reading the
> entire
On Thu, Dec 06, 2018 at 02:57:09PM +0100, Stefan Agner wrote:
> From: Stefan Agner
>
> Each ECC layout consumes about 2984 bytes in the .data section. Allow
> to disable the default ECC layouts if a driver is known to provide its
> own ECC layout.
>
> Signed-off-by: Stefan Agner
>
On Thu, Jan 17, 2019 at 12:20:32PM +0100, Felix Brack wrote:
> Hi Tom,
>
> On 29.11.2018 21:27, Tom Rini wrote:
> > On Thu, Nov 29, 2018 at 05:07:47PM +0100, Felix Brack wrote:
> >> On 29.11.2018 16:52, Tom Rini wrote:
> >>> On Thu, Nov 29, 2018 at 04:33:36PM +0100, Felix Brack wrote:
> On
On Mon, Dec 17, 2018 at 2:35 PM Adam Ford wrote:
>
> The omap2430 driver only currently supports host only. In
> preparation for supporting peripheral mode, this patch makes
> the driver support only the host by creating a ofdata_to_platdata
> function host/peripheral agnostic with a host helper
On Fri, Jan 18, 2019 at 08:57:43AM +1300, Chris Packham wrote:
> Hi Stefan,
>
> On Fri, Jan 18, 2019 at 2:35 AM Stefan Roese wrote:
> >
> > This patch enables the DT PCIe nodes for the Armada XP/37x/38x boards.
> > This is needed for the new DM_PCI support in the MVEBU PCIe driver.
> >
> >
Follow up question:
I notice that u-boot-spl-pad.bin is empty even though CONFIG_SPL_PAD_TO =
CONFIG_SPL_MAX_SIZE = 0x18000. Is that why it isn’t find the dtb because it
isn’t padded properly?
Dan
> On Jan 17, 2019, at 2:09 AM, eugen.hris...@microchip.com wrote:
>
>
>
> On 17.01.2019
On Thu, 17 Jan 2019 20:45:44 +0530
Manivannan Sadhasivam wrote:
Hi,
> On Tue, Jan 15, 2019 at 12:43:36AM +, André Przywara wrote:
> > On 14/01/2019 12:41, Amit Singh Tomar wrote:
> >
> > Hi,
> >
> > > CMU block on most of the actions SoC seems to be
> > > identical(at-least, S900 and
On Thu, 17 Jan 2019 21:09:45 +0530
Manivannan Sadhasivam wrote:
Hi,
> [On top of Andre's review]
>
> On Mon, Jan 14, 2019 at 06:11:03PM +0530, Amit Singh Tomar wrote:
> > This adds common arch owl support that can drive, 64-bits SoCs
> > from Actions Semi.
> >
>
> Could be, "This commit
On 12/26/18 8:37 PM, Rajesh Bhagat wrote:
> Restore the legacy flow along with TFABOOT flow for
> IFC configuration.
What's the reason to go back to old flow?
York
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On 1/17/19 9:11 AM, Andrew F. Davis wrote:
> On 1/17/19 8:15 AM, Tom Rini wrote:
>> On Thu, Jan 17, 2019 at 08:13:21AM -0600, Andrew F. Davis wrote:
>>> On 1/16/19 3:14 PM, Tom Rini wrote:
On Wed, Dec 05, 2018 at 11:51:33AM -0600, Andrew F. Davis wrote:
> Like AM33xx and AM43xx,
Hi Stefan,
On Fri, Jan 18, 2019 at 2:35 AM Stefan Roese wrote:
>
> This patch enables the DT PCIe nodes for the Armada XP/37x/38x boards.
> This is needed for the new DM_PCI support in the MVEBU PCIe driver.
>
> Signed-off-by: Stefan Roese
> Cc: Dirk Eibach
> Cc: Mario Six
> Cc: Chris Packham
Add a new defconfig file for the AM57xx High Security EVM. This config
is specific for the case of USB/UART booting.
Signed-off-by: Andrew F. Davis
Reviewed-by: Tom Rini
---
MAINTAINERS | 1 +
configs/am57xx_hs_evm_usb_defconfig | 92 +
2
Like AM33xx and AM43xx, DRA7xx and AM57xx devices may need to
have an non-standard boot address in memory. This may be due
to the device being a high security variant, which place the
Initial SoftWare (ISW) after certificates and secure software.
Allow these devices to set this from Kconfig.
Booting from UART and USB on HS devices is now supported for this
platform. Update documentation for the same.
Signed-off-by: Andrew F. Davis
Reviewed-by: Tom Rini
---
doc/README.ti-secure | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/doc/README.ti-secure
Add a new defconfig file for the DRA7xx High Security EVM. This config
is specific for the case of USB booting.
Signed-off-by: Andrew F. Davis
Reviewed-by: Tom Rini
---
MAINTAINERS | 1 +
configs/dra7xx_hs_evm_usb_defconfig | 106
2 files
CLI support with the HUSH parser is not currently SPL safe due to it's
use of realloc. That function is not defined for SPLs that use
SYS_MALLOC_SIMPLE. CLI support can be built in to SPL and some functions
do work, but use of some like run_command() will cause build to fail.
When no SPL code
Hello all,
This series adds USB boot support to HS DRA7xx/AM57xx platforms.
We start by cleaning up DFU boot in SPL support. What is done in the
first patch for DFU, if acceptable, should be done to the other boot
modes.
The 4th patch is needed as on HS devices a header is added to the
boot
Do this by using $(SPL_) in Makefiles and CONFIG_IS_ENABLED in C code.
This ensures the files and features are only built into the right build
for which they are enabled. Using the macros to simplify this patch was
made possible by the config symbol rename done in the last patch.
Signed-off-by:
The symbol CONFIG_SPL_DFU_SUPPORT in SPL build has the same
meaning as CONFIG_DFU in regular U-Boot. Drop the _SUPPORT
to allow for cleaner use in code.
Signed-off-by: Andrew F. Davis
Reviewed-by: Tom Rini
---
arch/arm/cpu/armv8/zynqmp/spl.c | 2 +-
arch/arm/mach-omap2/boot-common.c | 2 +-
So I did a fresh clone of Uboot and got the same result:
RomBOOT
Missing DTB
### ERROR ### Please RESET the board ###
To create the boot.bin I ran the following:
make mrproper
make sama5d3_xplained_nandflash_defconfig
I would then use an SD card to boot linux and then copy the boot.bin and
On 01/17/2019 11:39 AM, Anup Patel wrote:
From: Atish Patra
Currently, timer driver is bound only for hart0.
There is no mandatory requirement that hart0 should always
come up. In fact, HiFive Unleashed SoC hart0 doesn't boot
in S-mode because it only has M-mode.
The timer driver should be
On 01/17/2019 11:39 AM, Anup Patel wrote:
From: Atish Patra
It is possible that input clock is not available because clk
device was not available and 'clock-frequency' DT property is
also not available.
In this case, instead of failing we should just skip baudrate
config by returning zero.
On 01/17/2019 11:39 AM, Anup Patel wrote:
From: Atish Patra
Compute the baud rate multipler with more precision.
Signed-off-by: Atish Patra
Reviewed-by: Alexander Graf
Alex
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On 01/17/2019 11:39 AM, Anup Patel wrote:
This patch adds fixed-factor clock driver which derives clock
rate by dividing (div) and multiplying (mult) fixed factors
to a parent clock.
Signed-off-by: Anup Patel
Signed-off-by: Atish Patra
---
drivers/clk/Makefile | 4 +-
On 01/17/2019 11:39 AM, Anup Patel wrote:
Add driver code for the SiFive FU540 PRCI IP block. This IP block
handles reset and clock control for the SiFive FU540 device and
implements SoC-level clock tree controls and dividers.
Based on code written by Wesley Terpstra
found in commit
On 01/17/2019 11:38 AM, Anup Patel wrote:
From: Atish Patra
Fix MID bit field check to correctly identify all GEM hardwares.
The check is updated as per macb driver in Linux location:
/drivers/net/ethernet/cadence/macb_main.c:259
Signed-off-by: Atish Patra
I found the respective Linux
Hi Neil,
On Tue, 2019-01-15 at 13:59 +0100, Neil Armstrong wrote:
> There is no reason not to use the Linux "jedec,spi-nor" binding in U-Boot
> dts files. This compatible has been added in sf_probe, let use it.
>
> This patch switches to jedec,spi-nor when spi-flash is used in the DTS
> and DTSI
On 01/17/2019 11:38 AM, Anup Patel wrote:
This patch does following fixes in MACB ethernet driver
for using it on RISC-V systems (particularly QEMU sifive_u
machine):
1. asm/arch/clk.h is not available on RISC-V port so include
it only for non-RISC-V systems.
2. Don't fail in
On 01/17/2019 11:38 AM, Anup Patel wrote:
On 64bit systems, the DRAM top can be easily beyond 4GB and U-Boot
DMA mapping APIs will generate DMA addresses beyond 4GB. This
breaks DMA programming in 32bit DMA capable devices (such as
Cadence MACB ethernet). For example, If DRAM is more then 2GB
on
On 01/17/2019 11:38 AM, Anup Patel wrote:
This patch adds asm/dma-mapping.h for Linux-like DMA mappings
APIs required by some of the drivers (such as, Cadance MACB
Ethernet driver).
Signed-off-by: Anup Patel
Reviewed-by: Bin Meng
Reviewed-by: Alexander Graf
Alex
On 01/17/2019 11:38 AM, Anup Patel wrote:
The QEMU CPU support under arch/riscv is pretty much generic
and works fine for SiFive Unleashed as well. In fact, there
will be quite a few RISC-V SOCs for which QEMU CPU support
will work fine.
This patch renames cpu/qemu to cpu/generic to indicate
Add u-boot.itb BUILD_TARGET for Rockchip RK3368 and RK3399
SoC, this can get rid of building itb explicitly with
'make u-boot.itb' all required images will now build just
by make.
Signed-off-by: Jagan Teki
---
Kconfig| 1 +
board/rockchip/evb_rk3399/README
Migrate CONFIG_BUILD_TARGET into Kconfig.
Signed-off-by: Jagan Teki
---
Kconfig | 13 +
README| 7 ---
arch/arm/mach-mvebu/include/mach/config.h | 5 -
configs/SBx81LIFKW_defconfig | 1 +
Environment and fastboot MMC devices are configured based number
of mmc slots defined on particular board in sunxi platform.
If number of slots are not more than 1, it assigns 0 which usually mmc
device on SD slot. With DM_MMC it is detected as 0 since mmc0 node always
be an mmc device.
If
Unlike other Allwinner SoC's, H6 comes with different
clock and reset control offset values. So support them
via driver data.
Signed-off-by: Jagan Teki
---
.../arm/include/asm/arch-sunxi/clock_sun50i_h6.h | 3 +++
drivers/mmc/sunxi_mmc.c | 16
2 files
Added H5, A64 compatible for mmc and emmc.
Signed-off-by: Jagan Teki
---
drivers/mmc/sunxi_mmc.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index c25967afd1..b1c177bba3 100644
--- a/drivers/mmc/sunxi_mmc.c
+++
Enable DM_MMC for all Allwinner SoCs, this will eventually
enable BLK.
Also removed DM_MMC enablement in few parts of sunxi
configurations.
Signed-off-by: Jagan Teki
---
arch/arm/Kconfig | 1 +
arch/arm/mach-sunxi/Kconfig | 1 -
Unlike other Allwinner SoC's, A80 comes with different ahb
gate clock offset values and also has mmc common controller.
So support them via driver data.
Cc: Rask Ingemann Lambertsen
Signed-off-by: Jagan Teki
---
drivers/mmc/sunxi_mmc.c | 24
1 file changed, 24
Start with Allwinner A31, mmc controllers do support reset
control bit. This code add support to enable the reset control
start from SUN6I even though it share same compatible between
SUN4I and SUN6I.
Signed-off-by: Jagan Teki
---
drivers/mmc/sunxi_mmc.c | 21 +++--
1 file
Add emmc compatible for A83T SoC.
Signed-off-by: Jagan Teki
---
drivers/mmc/sunxi_mmc.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index 0e53701c5b..c25967afd1 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@
V2 for previous version[1] changes, for enabling DM_MMC
on Allwinner platform.
Changes for v2:
- update the 'reset enablement' logic to do
required SoC's
Note: All changes available at u-boot-sunxi/next
[1] https://patchwork.ozlabs.org/cover/1023710/
Any comments?
Jagan.
Jagan Teki
It is not possible to link the SPL image when CONFIG_GPIO is enabled
but CONFIG_SPL_GPIO is not. Use the IS_ENABLED macro instead to
correctly check whether CONFIG_{SPL_}GPIO is enabled.
This commit fixes the following errors:
* undefined reference to `dm_gpio_get_value
*
The code is checking for incomplete read when it see the INT_XFER_COMPL
flag, but it forget to first check whether there is anything left in the
FIFO to copy to the RX buffer. This means that sometimes we will get
errors because of erroneous incomplete read operation.
This commit fixes the driver
So I take it I could use my version of U-boot to load BBL,
then your S-mode U-boot?
I've been holding off on refactoring or submitting anything
from the MicroSemi U-boot that runs in M-mode and inits the
DRAM until I have some decent method to regression test the
whole system (bootloader, kernel,
On Mon, Jan 14, 2019 at 06:11:09PM +0530, Amit Singh Tomar wrote:
> Devices like uart and clk are needed to be enabled before relocation.
> this patch adds u-boot.dtsi file that mark these device as dm-pre-reloc.
>
> Signed-off-by: Amit Singh Tomar
> ---
> Changes since v1:
> * This is
On Mon, Jan 14, 2019 at 06:11:06PM +0530, Amit Singh Tomar wrote:
> This patch adds basic support for Actions Semi based S700
> SoC, which is driven by common owl framework.
>
> Signed-off-by: Amit Singh Tomar
> ---
> Changes since v1:
> * S700 specific changes are factored out here
>
On Mon, Jan 14, 2019 at 06:11:08PM +0530, Amit Singh Tomar wrote:
> The Cubieboard is a single board computer containing a
> Actions S700 SoC(with 4 ARMv8 Cortex-A53 cores).
>
> This patch adds respective defconfig alongwith device tree(sync with
> Linux 4.20).
>
> Signed-off-by: Amit Singh
On Mon, Jan 14, 2019 at 10:57:47PM +, André Przywara wrote:
> On 14/01/2019 12:41, Amit Singh Tomar wrote:
> > The Cubieboard is a single board computer containing a
> > Actions S700 SoC(with 4 ARMv8 Cortex-A53 cores).
> >
> > This patch adds respective defconfig alongwith device tree(sync
On Mon, Jan 14, 2019 at 06:11:04PM +0530, Amit Singh Tomar wrote:
> This adds memory regions needed to setup MMU for actions
> S900 and S700 SoCs.
>
> Signed-off-by: Amit Singh Tomar
> ---
> Changes since v1:
> * compile sysmap-owl.c against CONFIG_ARM64 now.
> ---
>
This patch adds support for the Microsemi Ethernet switch present on
Ocelot SoCs.
Signed-off-by: Gregory CLEMENT
---
MAINTAINERS | 1 +
drivers/net/Kconfig | 7 +
drivers/net/Makefile| 1 +
drivers/net/ocelot_switch.c | 765
On some ocelots platform a workaround is needed in order to be able to
reset the switch without resetting the DDR.
Signed-off-by: Gregory CLEMENT
---
board/mscc/ocelot/ocelot.c | 24
1 file changed, 24 insertions(+)
diff --git a/board/mscc/ocelot/ocelot.c
Now that network support is added for the ocelot platform, let's add it
in the default configuration.
Signed-off-by: Gregory CLEMENT
---
configs/mscc_ocelot_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/mscc_ocelot_defconfig b/configs/mscc_ocelot_defconfig
index
Import Ethernet related nodes from Linux
Signed-off-by: Gregory CLEMENT
---
arch/mips/dts/mscc,ocelot.dtsi | 97 +
arch/mips/dts/ocelot_pcb123.dts | 20 +++
2 files changed, 117 insertions(+)
diff --git a/arch/mips/dts/mscc,ocelot.dtsi
Hello,
this the third version of a series allowing to use the switch
component of the Ocelots SoC as a network interface.
The binding used is exactly the same of the one already used by Linux.
There is also a patch adding a workaround needed on the Ocelot based
boards: indeed the pin connected
Hi,
[On top of Andre's review]
On Mon, Jan 14, 2019 at 06:11:03PM +0530, Amit Singh Tomar wrote:
> This adds common arch owl support that can drive, 64-bits SoCs
> from Actions Semi.
>
Could be, "This commit adds common arch support for Actions Semi Owl
series SoCs and removes the Bubblegum96
Hi,
On Tue, Jan 15, 2019 at 12:43:36AM +, André Przywara wrote:
> On 14/01/2019 12:41, Amit Singh Tomar wrote:
>
> Hi,
>
> > CMU block on most of the actions SoC seems to be identical(at-least, S900
> > and S700).
>
> Actually they are not. Not even for the small subset that we implement
On 1/17/19 8:15 AM, Tom Rini wrote:
> On Thu, Jan 17, 2019 at 08:13:21AM -0600, Andrew F. Davis wrote:
>> On 1/16/19 3:14 PM, Tom Rini wrote:
>>> On Wed, Dec 05, 2018 at 11:51:33AM -0600, Andrew F. Davis wrote:
>>>
Like AM33xx and AM43xx, DRA7xx and AM57xx devices may need to
have an
Add board support, configuration and DTS for Servalt SoC
family. Currently there is one board in this family.
Reviewed-by: Daniel Schwierzeck
Signed-off-by: Horatiu Vultur
---
arch/mips/dts/Makefile | 1 +
arch/mips/dts/mscc,servalt.dtsi | 149
As Ocelot, Luton and Jaguar2, this family of SoCs are found
in Microsemi Switches solution.
Reviewed-by: Daniel Schwierzeck
Signed-off-by: Horatiu Vultur
---
arch/mips/mach-mscc/Kconfig| 8 +
arch/mips/mach-mscc/cpu.c | 2 +-
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