On 10/11/19 6:18 AM, Denis 'GNUtoo' Carikli wrote:
> The following commit enabled raw SPL booting:
> 22d90d560a omap3: Use raw SPL by default for mmc1
> but it was reverted by the following commit:
> 821c89d38c Revert "omap3: Use raw SPL by default for mmc1"
> because SPL is unable to
On Mon, 2020-01-20 at 08:08 +0100, Stefan Roese wrote:
> Hi Weijie,
>
> On 19.01.20 03:12, Weijie Gao wrote:
> > On Fri, 2020-01-17 at 15:40 +0100, Stefan Roese wrote:
> >> Hi Weijie,
> >>
> >> I've added another of my mail addresses to cc (m...@roese.nl) as the
> >> sending to the other 2
On 20.01.20 08:08, Stefan Roese wrote:
Hi Weijie,
On 19.01.20 03:12, Weijie Gao wrote:
On Fri, 2020-01-17 at 15:40 +0100, Stefan Roese wrote:
Hi Weijie,
I've added another of my mail addresses to cc (m...@roese.nl) as the
sending to the other 2 addresses does not seem to work.
On 17.01.20
Hi Weijie,
On 19.01.20 03:12, Weijie Gao wrote:
On Fri, 2020-01-17 at 15:40 +0100, Stefan Roese wrote:
Hi Weijie,
I've added another of my mail addresses to cc (m...@roese.nl) as the
sending to the other 2 addresses does not seem to work.
On 17.01.20 08:45, Weijie Gao wrote:
This patch
Hi Joel,
On 19.01.20 17:16, Joel Johnson wrote:
On 2020-01-19 09:11, Baruch Siach wrote:
Hi Joel,
On Sun, Jan 19 2020, Joel Johnson wrote:
On 2020-01-19 01:38, Baruch Siach wrote:
On Sun, Jan 19 2020, Joel Johnson wrote:
This patch series adds support for ClearFog Base static
On 20. 01. 20 2:33, Luis Araneda wrote:
> From: Milan Obuch
>
> The board has two push button connected to MIO pins
> 50 and 51, which have a pull-down resistor and are
> connected to 1.8V when pressed.
>
> These two pins are wrongly initialized with internal
> pull-up enabled so they are
On 20. 01. 20 2:32, Luis Araneda wrote:
> From: Milan Obuch
>
> The board uses 100 MHz clock for UART bitrate generator,
> but is configured as 50 MHz on defconfig.
>
> This produces wrong console output.
> The first message, "Debug uart enabled" is received as:
> "��b"
>
> Fix the issue
Hi Pragnesh
> From: Pragnesh Patel [mailto:pragnesh.pa...@sifive.com]
> Sent: Friday, January 17, 2020 8:46 PM
> To: u-boot@lists.denx.de
> Cc: atish.pa...@wdc.com; palmerdabb...@google.com; bmeng...@gmail.com;
> paul.walms...@sifive.com; ja...@amarulasolutions.com;
>
On 04/12/19 1:25 AM, Dario Binacchi wrote:
> In locked condition CLKOUT = CLKINP * [M / (N + 1)].
>
> Signed-off-by: Dario Binacchi
Merged into u-boot-ti.
Thanks and regards,
Lokesh
> ---
>
> arch/arm/mach-omap2/am33xx/clock_am33xx.c | 2 +-
> 1 file changed, 1 insertion(+), 1
On Fri, Jan 17, 2020 at 6:18 PM Pragnesh Patel
wrote:
>
> This patch provides sifive_fu540_spl_defconfig which can support
> U-boot SPL to boot from L2 LIM (0x0800_) and then boot U-boot
> FIT image including OpenSBI FW_DYNAMIC firmware and U-Boot proper
> images from MMC boot devices.
>
>
On 09/12/19 10:37 AM, Vignesh Raghavendra wrote:
> This series adds USB support for AM654 SoC that has DWC3 USB controller.
>
> Patch 1 adds new compatible for DWC3 driver. Patch 2 and 3 adds PHY
> related changes and remaining patches add DT and configs related to USB
> host,device and DFU
On 11/01/20 1:05 AM, Andrew F. Davis wrote:
> Hello all,
>
> This series brings up High-Security (HS) device support on the J721e
> platform. Support for this K3 HS device is much like the existing
> AM65x HS and this series leverages much of that support.
>
> There are also a couple
On 08/01/20 2:57 AM, Andrew F. Davis wrote:
> Sync new additions to non-HS defconfig with HS defconfig.
>
> Signed-off-by: Andrew F. Davis
Merged into u-boot-ti
Thanks and regards,
Lokesh
On 08/01/20 2:54 AM, Andrew F. Davis wrote:
> Sync new additions to non-HS defconfig with HS defconfig.
>
> Signed-off-by: Andrew F. Davis
Merged into u-boot-ti
Thanks and regards,
Lokesh
On 07/01/20 1:15 PM, Lokesh Vutla wrote:
> This series enable I2C and EEPROM support on J721e common processor
> board.
>
> Logs: https://pastebin.ubuntu.com/p/HTrQk3VnZm/
Merged into u-boot-ti
Thanks and regards,
Lokesh
>
> Changes since v1:
> - Fixed board_is_j721e_som() to use the right
On 02/01/20 7:47 PM, Caleb Robey wrote:
> The following patches
>
> 1) Introduce the emmc based board detection for BBAI due to a lack of
> eeprom onboard the BBAI (to be fixed in future revision of the board).
> 2) Add structures in the pinctrl to detect the beaglebone AI and add checks
>
On 16/01/20 7:42 PM, Faiz Abbas wrote:
> The following patches add support for MMC/SD in J721e. Currently, SD
> card is capped at 25 MBps and eMMC is capped at 50 MBps. Support for
> higher speeds and eMMC boot support will be added in futures series.
>
> v2:
> 1. Dropped FAT_WRITE patch
On 09/12/19 10:25 AM, Vignesh Raghavendra wrote:
> This series adds DMA support for J721e using exist K3 UDMA driver.
>
> One main change is thati, on J721e, DMA resources such as DMA channels are
> shared between different entities running on different cores of the SoC.
> Therefore, U-Boot
On Fri, Jan 17, 2020 at 6:18 PM Pragnesh Patel
wrote:
>
> Add header files needed for U-boot SPL
>
> Signed-off-by: Pragnesh Patel
First of all, PATCH7 and PATCH8 does not make sense.
Instead of PATCH7 and PATCH8, we should have following
patch breakup:
1. A PATCH for adding ddrregs.c,required
On 13/11/19 9:16 PM, Adam Ford wrote:
> Currently, the da850-lcdk uses SPL_OF_PLATDATA and manually loads
> the necessary source code instead of using the auto-generated,
> because the drivers don't properly autogenerate the code.
>
> This patch simply enables the various device tree options
On 11/11/19 3:15 PM, Faiz Abbas wrote:
> The CORE_TEMP_SENSOR_MPU register gives a raw adc value which needs to
> be indexed into a lookup table to get the actual temperature. Fix the
> naming and datatype of the adc value variable.
>
> Signed-off-by: Faiz Abbas
Merged into u-boot-ti.
On 18/11/19 7:16 PM, Vignesh Raghavendra wrote:
> Add USB support for J721e SoC.
> First patch fixes a compile issue with Cadence USB driver. Rest of the
> patches add env, DT and configs related to USB.
patches 2,3,4 merged into u-boot-ti.
Thanks and regards,
Lokesh
>
> Vignesh Raghavendra
On Fri, Jan 17, 2020 at 6:18 PM Pragnesh Patel
wrote:
>
> Devicetree files in FU540 platform is synced from Linux, like other
> platforms does. Apart from these u-boot in FU540 would also require
> some u-boot specific node like clint.
>
> So, create board specific -u-boot.dtsi files. This would
On Fri, Jan 17, 2020 at 6:18 PM Pragnesh Patel
wrote:
>
> When build U-boot SPL, meet an issue of undefined reference to
> 'crc7' for drivers/mmc/mmc_spi.c, so let's compile crc7.c when
> CONFIG_MMC_SPI selected.
>
> Signed-off-by: Pragnesh Patel
> ---
> lib/Makefile | 1 +
> 1 file changed, 1
On Fri, Jan 17, 2020 at 6:17 PM Pragnesh Patel
wrote:
>
> For SPL_SEPARATE_BSS, Device tree will put at _image_binary_end
>
> Signed-off-by: Pragnesh Patel
> ---
> arch/riscv/cpu/u-boot-spl.lds | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/riscv/cpu/u-boot-spl.lds
On Fri, Jan 17, 2020 at 6:17 PM Pragnesh Patel
wrote:
>
> Add fu540 SoC specific header files
>
> Signed-off-by: Pragnesh Patel
> ---
> arch/riscv/include/asm/arch-fu540/cache.h | 42 ++
> arch/riscv/include/asm/arch-fu540/gpio.h | 14
> arch/riscv/include/asm/arch-fu540/otp.h
On Fri, Jan 17, 2020 at 6:17 PM Pragnesh Patel
wrote:
>
> Added FU540 place-holder so that SoC specific values
> will be kept here.
>
> Signed-off-by: Pragnesh Patel
> ---
> arch/riscv/include/asm/arch-fu540/clk.h | 14 ++
> board/sifive/fu540/Kconfig | 3 +++
> 2
On Fri, Jan 17, 2020 at 6:17 PM Pragnesh Patel
wrote:
>
> Added a misc driver to handle OTP memory in FU540.
>
> Signed-off-by: Pragnesh Patel
> ---
> arch/riscv/dts/fu540-c000-u-boot.dtsi | 13 ++
> .../dts/hifive-unleashed-a00-u-boot.dtsi | 6 +
> board/sifive/fu540/fu540.c
Hi Jagan,
On 19/11/19 3:43 pm, Vignesh Raghavendra wrote:
> First patch moves driver over to spi-mem framework and implement
> spi_mem_ops. This is require to support more SPI Flash opcodes like SFDP
> parsing etc. Series is in prepartion to add Octal mode for support for
> the same driver to
On Fri, Jan 17, 2020 at 6:18 PM Pragnesh Patel
wrote:
>
> Add descriptions about U-Boot SPL feature and how to build and run.
>
> Signed-off-by: Pragnesh Patel
> ---
> doc/board/sifive/fu540.rst | 370 +
> 1 file changed, 370 insertions(+)
>
> diff --git
On Fri, Jan 17, 2020 at 6:16 PM Pragnesh Patel
wrote:
>
> This series add support for SPL to FU540. This series depends on
> https://patchwork.ozlabs.org/patch/1196703/
> (riscv: dts: Add hifive-unleashed-a00 dts from Linux)
>
> U-Boot SPL can boot from L2 LIM (0x0800_) and jump to
>
Hi Jagan,
On Sun, Jan 12, 2020 at 11:36 PM Chen-Yu Tsai wrote:
>
> From: Chen-Yu Tsai
>
> Hi everyone,
>
> This patch series syncs up the device tree files and header files for
> Allwinner H3/H5 SoCs and related boards to linux-next-20200108, and
> then adds support for Libre Computer ALL-H3-IT
Hi Tom,
Please pull the rockchip updates:
- Support SPI boot and redundant boot for rk3399
- Support binman for rockchip platform
- Update ram driver and add ddr4 support for rk3328
Travis:
https://travis-ci.org/keveryang/u-boot/builds/639069624
Thanks,
- Kever
The following changes since
From: Milan Obuch
The board uses 100 MHz clock for UART bitrate generator,
but is configured as 50 MHz on defconfig.
This produces wrong console output.
The first message, "Debug uart enabled" is received as:
"��b"
Fix the issue by configuring the correct clock for the
UART baudrate
From: Milan Obuch
The board has two push button connected to MIO pins
50 and 51, which have a pull-down resistor and are
connected to 1.8V when pressed.
These two pins are wrongly initialized with internal
pull-up enabled so they are reported as 1 all the time
with no change when pressed.
Hi Jorge,
On Sun, Jan 19, 2020 at 3:52 PM Jorge Ramirez-Ortiz, Foundries
wrote:
> hi Favio/all
>
> plese could you confirm if this patch will be merged (just so we dont have to
> carry it separately in our product branches)
Yes, I think it makes sense to apply it. I have already given my
Currently, the sf command will probe anything attached to an spi bus, regardless
of whether it is UCLASS_SPI_FLASH. This came up when testing the mmc_spi driver,
which is accessed via spi but is UCLASS_MMC. If the uclass is not what sf
expects, then the "flash" variable will not actually have type
Currently, the sf command will probe anything attached to an spi bus, regardless
of whether it is UCLASS_SPI_FLASH. This came up when testing the mmc_spi driver,
which is accessed via spi but is UCLASS_MMC. If the uclass is not what sf
expects, then the "flash" variable will not actually have type
On 17/01/20 08:51:45, Fabio Estevam wrote:
> On Thu, Jan 16, 2020 at 4:40 AM Jorge Ramirez-Ortiz, Foundries
> wrote:
> >
> > On 16/01/20 02:22:35, Peng Fan wrote:
> > > > Subject: [PATCH] arm: dts: imx7ulp-evk: remove mux value from pad
> > > > configuration
> > > >
> > > > The mux mode is
On 17/01/20 13:08:44, Jorge Ramirez-Ortiz, Gmail wrote:
> On 17/01/20 08:53:03, Fabio Estevam wrote:
> > Hi Jorge,
> >
> > On Fri, Jan 17, 2020 at 6:50 AM Jorge Ramirez-Ortiz
> > wrote:
> > >
> > > On SPL enabled systems, the current s_init code (wdog, clock and ldo
> > > init) is executed
Function mod_exp_sw() is only used via the operators of the uclass.
It is not defined in any include.
Make mod_exp_sw() static.
Signed-off-by: Heinrich Schuchardt
---
drivers/crypto/rsa_mod_exp/mod_exp_sw.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
drivers/rng/sandbox_rng.c requires rand() to be defined but configuration
option CONFIG_CONFIG_LIB_RAND selected in drivers/rng/Kconfig does not
exist.
test/lib/test_aes.c requires rand() to be defined.
Fix the selection criteria for choice "Pseudo-random library support type".
Signed-off-by:
On 1/19/20 8:48 AM, Peng Fan wrote:
[...]
Because, I believe we can both agree that dumping such ad-hoc code
which implements reset in board code is not the right way, esp.
nowadays with all the DM/DT stuff in.
>>>
>>> Alought we still have ocram space, but our SPL is huge now,
drivers/rng/sandbox_rng.c requires rand() to be defined but configuration
option CONFIG_CONFIG_LIB_RAND selected in drivers/rng/Kconfig does not
exist.
test/lib/test_aes.c requires rand() to be defined.
Fix the selection criteria for choice "Pseudo-random library support type".
Signed-off-by:
On 2020-01-19 09:11, Baruch Siach wrote:
Hi Joel,
On Sun, Jan 19 2020, Joel Johnson wrote:
On 2020-01-19 01:38, Baruch Siach wrote:
On Sun, Jan 19 2020, Joel Johnson wrote:
This patch series adds support for ClearFog Base static
configuration,
as well as updating and fixing the ClearFog
On 2020-01-19 01:41, Baruch Siach wrote:
Hi Joel,
On Sun, Jan 19 2020, Joel Johnson wrote:
On 2020-01-19 00:22, Baruch Siach wrote:
On Sun, Jan 19 2020, Joel Johnson wrote:
This set of patches applies on top of
https://patchwork.ozlabs.org/cover/1200324/,
based on testing using the static
Hi Joel,
On Sun, Jan 19 2020, Joel Johnson wrote:
> On 2020-01-19 01:38, Baruch Siach wrote:
>> On Sun, Jan 19 2020, Joel Johnson wrote:
>>> This patch series adds support for ClearFog Base static configuration,
>>> as well as updating and fixing the ClearFog support for MMC and SPI
>>> booting.
On 2020-01-19 01:38, Baruch Siach wrote:
Hi Joel,
On Sun, Jan 19 2020, Joel Johnson wrote:
This patch series adds support for ClearFog Base static configuration,
as well as updating and fixing the ClearFog support for MMC and SPI
booting.
V2 changes:
- updated against, and dependent on,
On Sun, 2020-01-19 at 12:18 +0800, Weijie Gao wrote:
> On Fri, 2020-01-17 at 13:15 +0100, Daniel Schwierzeck wrote:
> >
> > Am 17.01.20 um 08:45 schrieb Weijie Gao:
> > > In U-Boot the exception vector base will be moved to top of memory, to be
> > > used to display register dump when exception
Hi Joel,
On Sun, Jan 19 2020, Joel Johnson wrote:
> On 2020-01-19 00:22, Baruch Siach wrote:
>> On Sun, Jan 19 2020, Joel Johnson wrote:
>>> This set of patches applies on top of
>>> https://patchwork.ozlabs.org/cover/1200324/,
>>> based on testing using the static configuration fallback updates
Hi Joel,
On Sun, Jan 19 2020, Joel Johnson wrote:
> This patch series adds support for ClearFog Base static configuration,
> as well as updating and fixing the ClearFog support for MMC and SPI
> booting.
>
> V2 changes:
> - updated against, and dependent on,
>
CONFIG_SPL_RSA is meant to control if lib/rsa/* is used for SPL. Adjust
lib/Makefile to consider this setting.
This was correctly setup with commit 51c14cd128f4 ("verified-boot: Minimal
support for booting U-Boot proper from SPL") and got lost with commit
089df18bfe9d ("lib: move hash CONFIG
52 matches
Mail list logo
