RE: [PATCH v4 13/14] sifive: fix palmer's email address

Hi, >-Original Message- >From: Palmer Dabbelt >Sent: 06 March 2020 06:01 >To: Pragnesh Patel >Cc: u-boot@lists.denx.de; Atish Patra ; >bmeng...@gmail.com; Paul Walmsley ; >ja...@amarulasolutions.com; Troy Benjegerdes >; Anup Patel ; Sagar >Kadam ; Pragnesh Patel > >Subject: Re: [PATCH

RE: [PATCH v4 01/14] misc: add driver for the SiFive otp controller

Hi Palmer, >-Original Message- >From: Palmer Dabbelt >Sent: 06 March 2020 06:07 >To: Pragnesh Patel >Cc: u-boot@lists.denx.de; Atish Patra ; >bmeng...@gmail.com; Paul Walmsley ; >ja...@amarulasolutions.com; Troy Benjegerdes >; Anup Patel ; Sagar >Kadam ; Pragnesh Patel >;

Re: [U-Boot] [PATCH] board: ti: README: Update OP-TEE binary name

On 05/03/20 7:10 PM, Andrew F. Davis wrote: > The OP-TEE binary to use is renamed to v2 as the v1 binary has been > deprecated and is no longer built by default. > > Reported-by: Grygorii Strashko > Signed-off-by: Andrew F. Davis Applied to u-boot-ti next. Thanks and regards, Lokesh

Re: [PATCH v2 0/3] arm: dts: k3-j721e: Enable OSPI1/QSPI

On 04/03/20 10:09 AM, Keerthy wrote: > The patch series enables he OSPI1 aka QSPI node. > This is a precursor for enabling QSPI boot on j721e. > > Changes in v2: > > * Moved the pin definitions out of u-boot.dtsi to r5 and a72 > based dts files. Applied to u-boot-ti next. Thanks and

RE: [RESEND v8 7/8] dm: arm64: ls1046a: add i2c DM support

>-Original Message- >From: U-Boot On Behalf Of Biwen Li >Sent: Wednesday, March 4, 2020 9:28 AM >To: Biwen Li ; Jagdish Gediya ; >Priyanka Jain ; h...@denx.de; >ja...@amarulasolutions.com; aford...@gmail.com; Alison Wang >; jh80.ch...@samsung.com; Pramod Kumar >; Rajesh Bhagat ; >Ruchika

RE: [PATCH] arm: socfpga: arria10: Add save_boot_params()

> -Original Message- > From: Marek Vasut > Sent: Friday, March 6, 2020 8:43 AM > To: Tan, Ley Foon ; Ley Foon Tan > > Cc: u-boot@lists.denx.de; Simon Goldschmidt > ; See, Chin Liang > ; Chee, Tien Fong > Subject: Re: [PATCH] arm: socfpga: arria10: Add save_boot_params() > > On 3/6/20

Re: [PATCH] arm: socfpga: arria10: Add save_boot_params()

On 3/6/20 1:33 AM, Tan, Ley Foon wrote: [...] Aren't those already defined in include/configs/socfpga_common.h ? >>> socfpga_common.h have this: >>> #define CONFIG_SYS_INIT_RAM_SIZE(0x4 - >> CONFIG_SYS_SPL_MALLOC_SIZE) >>> >>> But, we can't use it here.

Re: [PATCH v1 6/8] spi: dw: Add mem_ops

On 3/5/20 5:15 PM, Eugeniy Paltsev wrote: > Hi Sean, > > do you have branch with this code (all dw spi changes) in some public repo? > I would like to test it with our board (which have DW SPI). > > --- > Eugeniy Paltsev A full tree is available at

Re: [PATCH v4 13/14] sifive: fix palmer's email address

On Mon, 24 Feb 2020 00:32:45 PST (-0800), pragnesh.pa...@sifive.com wrote: Fix Palmer's email address Signed-off-by: Pragnesh Patel --- board/sifive/fu540/MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/sifive/fu540/MAINTAINERS

porting marvell-nand driver for u-boot

Hello all! I've recently run into an issue where I have enabled on-die ECC in Linux which required the block sizing I had been using to change from 2048 to 512. This is now causing UBI to throw the following error: ubi0 error: ubi_io_read: error -74 (ECC error) while reading 64 bytes from PEB

Re: [RFC PATCH 0/1] Add boot hartid to a Device tree

On Wed, Mar 4, 2020 at 7:22 PM Schaefer, Daniel (DualStudy) wrote: > > Hi, > > I have started to implement the corresponding changes in EDK2: > https://github.com/changab/edk2-staging-riscv/compare/5f63e9249751ccb9302514455b9a1a7038f34547...RISC-V-DT-fixup > What happens is: The DTB is embedded

RE: [PATCH] arm: socfpga: arria10: Add save_boot_params()

> -Original Message- > From: Marek Vasut > Sent: Thursday, March 5, 2020 8:23 PM > To: Ley Foon Tan > Cc: Tan, Ley Foon ; u-boot@lists.denx.de; Simon > Goldschmidt ; See, Chin Liang > ; Chee, Tien Fong > Subject: Re: [PATCH] arm: socfpga: arria10: Add save_boot_params() > > On 3/5/20

[RFT PATCH v5 2/3] image: Add a common compression type detection function.

Currently, there is no method that can detect compression types given a file. This is very useful where a compressed kernel image is loaded directly to the memory. Inspect initial few bytes to figure out compression type of the image. It will be used in booti method for now but can be reused any

[RFT PATCH v5 3/3] image: Add compressed Image parsing support in booti.

Add compressed Image parsing support so that booti can parse both flat and compressed Image to boot Linux. Currently, it is difficult to calculate a safe address for every board where the compressed image can be decompressed. It is also not possible to figure out the size of the compressed file as

[RFT PATCH v5 0/3] Add compressed Image booting support

This patch series extends booti to support compressed images as well. Following compressed images are supported for now. lzma, lzo, bzip2, gz. Other compression methods can easily be supported if required. The above compression methods are common ones that Linux kernel (ARM64/RISC-V) and U-Boot

[RFT PATCH v5 1/3] lib: kconfig: Add option to set BZIP2 compression method

There is no way to select BZIP2 compression method. Add it under library/compression config where all other compression related configs are present. Signed-off-by: Atish Patra Reviewed-by: Tom Rini --- lib/Kconfig | 5 + 1 file changed, 5 insertions(+) diff --git a/lib/Kconfig

Re: [U-Boot] [RFC/RFT PATCH v4 3/3] image: Add compressed Image parsing support in booti.

On Mon, Mar 2, 2020 at 10:41 AM Tom Rini wrote: > > On Fri, Feb 28, 2020 at 05:15:53PM -0800, Atish Patra wrote: > > On Thu, Feb 20, 2020 at 2:25 PM Atish Patra wrote: > > > > > > On Thu, Feb 20, 2020 at 1:14 PM David Abdurachmanov > > > wrote: > > > > > > > > On Tue, Feb 18, 2020 at 10:38 PM

Re: [PATCH] net: phy: dp83867: Add SGMII mode type switching

On Tue, Feb 18, 2020 at 6:51 AM Michal Simek wrote: > > This patch adds ability to switch beetween two PHY SGMII modes. > Some hardware, for example, FPGA IP designs may use 6-wire mode > which enables differential SGMII clock to MAC. > > Patch description, dt flags have been done in mainline

Re: [PATCH v2] net: phy: add XFI, USXGMII types to is_10g_interface() helper

On Thu, Jan 9, 2020 at 2:50 AM Alex Marginean wrote: > > The helper is used to reset PHYs on connect and it determines the clause > to use (C22/C45) based on interface type. This fixes 'PHY reset timed out' > warnings in console for USXGMII/XFI PHYs. > > Signed-off-by: Alex Marginean Acked-by:

Re: [PATCH] net: eth-uclass: Do not return error when no MAC is found

On Thu, Jan 9, 2020 at 12:29 PM Fabio Estevam wrote: > > On some i.MX8QXP MEK boards with no MAC address stored, the following > hang is seen: > > Error: ethernet@5b04 address not set. > > (Board hangs) > > One way to avoid this issue is to select CONFIG_NET_RANDOM_ETHADDR, so > that a random

Re: [PATCH] net: phy: Fix overlong PHY timeout

On Sat, Jan 4, 2020 at 3:56 AM Andre Przywara wrote: > > Commit 27c3f70f3b50 ("net: phy: Increase link up delay in > genphy_update_link()") increased the per-iteration waiting time from > 1ms to 50ms, without adjusting the timeout counter. This lead to the > timeout increasing from the typical 4

Re: [PATCH] doc: net: Rewrite network driver documentation

On Sat, Dec 28, 2019 at 9:19 AM Andre Przywara wrote: > > doc/README.drivers.eth seems like a good source for understanding > U-Boot's network subsystem, but is only talking about legacy network > drivers. This is particularly sad as proper documentation would help in > porting drivers over to

Re: [PATCH 1/2] drivers: net: phy: aquantia: drop XGMII as a valid system interface proto

On Wed, Dec 4, 2019 at 8:06 AM Alex Marginean wrote: > > Use either USXGMII or XFI in aquantia_set_proto and drop XGMII as a valid > protocol configuration. The PHY doesn't support it, it's just used as an > alias for one of the other two protocols. > > Signed-off-by: Florin Chiculita >

Re: [PATCH 2/2] drivers: net: phy: aquantia: make it less verbose

On Wed, Dec 4, 2019 at 7:42 AM Alex Marginean wrote: > > The driver now unconditionally prints some information that's not > universally useful. Replace printf with debug. > > Signed-off-by: Alex Marginean Acked-by: Joe Hershberger

Re: [PATCH v2 12/12] phy: atheros: consolidate {ar8031|ar8035}_config()

On Thu, Dec 5, 2019 at 5:05 PM Michael Walle wrote: > > The two functions are now exactly the same, remove one of them. > > Signed-off-by: Michael Walle Acked-by: Joe Hershberger

Re: [PATCH v2 11/12] phy: atheros: ar8035: remove static clock config

On Thu, Dec 5, 2019 at 5:04 PM Michael Walle wrote: > > We can configure the clock output in the device tree. Disable the > hardcoded one in here. This is highly board-specific and should have > never been enabled in the PHY driver. > > If bisecting shows that this commit breaks your board it

Re: [PATCH v2 10/12] phy: atheros: add device tree bindings and config

On Thu, Dec 5, 2019 at 5:04 PM Michael Walle wrote: > > Add support for configuring the CLK_25M pin as well as the RGMII I/O > voltage by the device tree. > > By default the AT803x PHYs outputs the 25MHz clock of the XTAL input. > But this output can also be changed by software to other

Re: [PATCH v2 09/12] phy: atheros: move delay config to common function

On Thu, Dec 5, 2019 at 5:03 PM Michael Walle wrote: > > Signed-off-by: Michael Walle Acked-by: Joe Hershberger

Re: [PATCH v2 08/12] phy: atheros: introduce debug read and write functions

On Thu, Dec 5, 2019 at 5:00 PM Michael Walle wrote: > > Provide functions to read and write the Atheros debug registers. > > Signed-off-by: Michael Walle Acked-by: Joe Hershberger

Re: [PATCH v2 06/12] phy: atheros: fix AR8021 PHY ID mask

On Thu, Dec 5, 2019 at 5:02 PM Michael Walle wrote: > > The upper bits are all the OUI. > > Signed-off-by: Michael Walle Acked-by: Joe Hershberger

Re: [PATCH v1 6/8] spi: dw: Add mem_ops

Hi Sean, do you have branch with this code (all dw spi changes) in some public repo? I would like to test it with our board (which have DW SPI). --- Eugeniy Paltsev From: Sean Anderson Sent: Thursday, March 5, 2020 22:19 To: u-boot@lists.denx.de Cc:

Re: [PATCH v1] doc: board: verdin-imx8mm: use mainline TF-A

Hi Bin, On Thu, Mar 5, 2020 at 10:56 PM Igor Opaniuk wrote: > > From: Igor Opaniuk > > 1. Update build steps where mainline Trusted Firmware A is used. > 2. Fix BL31_BASE to the proper one according to the SoC reference > manual. > > Signed-off-by: Igor Opaniuk > --- > >

[PATCH v1] doc: board: verdin-imx8mm: use mainline TF-A

From: Igor Opaniuk 1. Update build steps where mainline Trusted Firmware A is used. 2. Fix BL31_BASE to the proper one according to the SoC reference manual. Signed-off-by: Igor Opaniuk --- doc/board/toradex/verdin-imx8mm.rst | 26 ++ 1 file changed, 6 insertions(+),

[PATCH v1 2/3] imx8mm_evk: adjust dram size in case bl32 is used

From: Igor Opaniuk Adjust DRAM size in case BL32 secure payload is loaded (OP-TEE/Trusty), so during MMU initialization U-Boot won't touch this mem area. BL32 is loaded to the end of DRAM, bl32 payload size is read from rom_pointer[1]. This relates to the issue described in 59efa6b52b("imx8m:

[PATCH v1 1/3] verdin-imx8mm: adjust dram size in case bl32 is used

From: Igor Opaniuk Adjust DRAM size in case BL32 secure payload is loaded (OP-TEE/Trusty), so during MMU initialization U-Boot won't touch this mem area. BL32 is loaded to the end of DRAM, bl32 payload size is read from rom_pointer[1]. This relates to the issue described in 59efa6b52b("imx8m:

[PATCH v1 3/3] verdin-imx8mm: add nfsboot wrapper to env

From: Igor Opaniuk Add nfsboot wrapper to env to boot Linux kernel from TFTP/NFS. Signed-off-by: Igor Opaniuk --- include/configs/verdin-imx8mm.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index

[PATCH v1 8/8] riscv: Add support for SPI on Kendryte K210

This patch enables configs necessary for usign SPI. It also adds some documentation. Signed-off-by: Sean Anderson --- board/sipeed/maix/Kconfig | 10 configs/sipeed_maix_bitm_defconfig | 8 +++ doc/board/sipeed/maix.rst | 94 +++--- 3 files

[PATCH v1 6/8] spi: dw: Add mem_ops

The designware ssi device has "broken" chip select behaviour [1], and needs specific manipulation to use the built-in chip select. The existing fix is to use an external GPIO for chip select, but typically the K210 has SPI3 directly connected to a flash chip with dedicated pins. This makes it

[PATCH v1 4/8] spi: dw: Use generic function to read reg address

Using an fdt-specific function causes problems when compiled with a live tree. Signed-off-by: Sean Anderson --- drivers/spi/designware_spi.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c index

[PATCH v1 7/8] riscv: Add device tree bindings for SPI

This patch adds bindings for the MMC slot and SPI flash on the Sipeed Maix Bit. Signed-off-by: Sean Anderson --- arch/riscv/dts/k210-maix-bit.dts | 90 arch/riscv/dts/k210.dtsi | 12 + 2 files changed, 102 insertions(+) diff --git

[PATCH v1 5/8] spi: dw: Speed up transfer loops

The transfer loops are very tight on some platforms (especially on higher speeds). If we don't read/write fast enough we can run into over-/under- flow problems. This patch removes several divisions and log statements, and simplifies the read logic. Signed-off-by: Sean Anderson ---

[PATCH v1 2/8] spi: dw: Add device tree properties for fields in CTRL0

Some devices have different layouts for the fields in CTRL0 (e.g. the Kendryte K210). Allow this layout to be configurable from the device tree. The documentation has been taken from Linux. Signed-off-by: Sean Anderson Reviewed-by: Simon Glass --- .../spi/snps,dw-apb-ssi.txt

[PATCH v1 3/8] spi: dw: Rename "cs-gpio" to "cs-gpios"

This property is named differently than other SPI drivers with the same property, as well as the property as used in Linux. Signed-off-by: Sean Anderson --- arch/arc/dts/axs10x_mb.dtsi | 3 ++- arch/arc/dts/hsdk.dts| 3 ++- drivers/spi/designware_spi.c | 10 +++--- 3 files

[PATCH v1 1/8] doc: Fix typo in FIT documentation

u_boot should be u-boot Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- doc/uImage.FIT/source_file_format.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/doc/uImage.FIT/source_file_format.txt b/doc/uImage.FIT/source_file_format.txt index 18d2aedcb7..00c4dc337c

[PATCH v1 0/8] riscv: Add SPI support for Kendryte K210

This patch adds support for SPI on the Kendryte K210. This includes the MMC slot and SPI flash on the Sipeed Maix Bit. This patch series was previously part of https://patchwork.ozlabs.org/project/uboot/list/?series=161576 This patch series depends on

[PATCH v1 8/8] riscv: Add FPIOA and GPIO support for Kendryte K210

This patch adds the necessary configs and docs for FPIOA and GPIO support on the K210. Signed-off-by: Sean Anderson --- board/sipeed/maix/Kconfig | 12 doc/board/sipeed/maix.rst | 64 +-- 2 files changed, 74 insertions(+), 2 deletions(-) diff --git

[PATCH v1 4/8] gpio: dw: Add a trailing underscore to generated name

Previously, if there was no bank-name property, it was easy to have confusing gpio names like "gpio1@08", instead of "gpio1@0_8". This patch follows the example of the sifive gpio driver. Signed-off-by: Sean Anderson --- This patch was previously submitted as part of

[PATCH v1 1/8] pinctrl: Add support for Kendryte K210 FPIOA

The Fully-Programmable Input/Output Array (FPIOA) device controls pin multiplexing on the K210. The FPIOA can remap any supported function to any multifunctional IO pin. It can also perform basic GPIO functions, such as reading the current value of a pin. Signed-off-by: Sean Anderson --- This

[PATCH v1 6/8] led: gpio: Default to using node name if label is absent

This more closely mirrors Linux's behaviour, and will make it easier to transition to using function+color in the future. Signed-off-by: Sean Anderson --- This patch was previously submitted as part of https://patchwork.ozlabs.org/project/uboot/list/?series=161576 drivers/led/led_gpio.c | 7

[PATCH v1 7/8] riscv: Add pinmux and gpio bindings for Kendryte K210

This patch adds the necessary device tree bindings. Signed-off-by: Sean Anderson --- arch/riscv/dts/k210-maix-bit.dts | 196 +++ arch/riscv/dts/k210.dtsi | 43 ++- 2 files changed, 234 insertions(+), 5 deletions(-) diff --git

[PATCH v1 5/8] gpio: dw: Return output value when direction is out

dm_gpio_ops.get_value can be called when the gpio is either input or output. The current dw code always returns the input value, which is invalid if the direction is set to out. Signed-off-by: Sean Anderson --- This patch was previously submitted as part of

[PATCH v1 0/8] riscv: Add FPIOA and GPIO support for Kendryte K210

This patch series adds support for pinmuxing, gpios, and leds on the Kendyte K210. This patch series was previously part of https://patchwork.ozlabs.org/project/uboot/list/?series=161576 This patch series depends on https://patchwork.ozlabs.org/project/uboot/list/?series=162643 Sean Anderson

[PATCH v1 3/8] gpio: dw: Fix warnings about casting int to pointer

Change the type of gpio_dwabp_platdata.base from fdt_addr_t to a void pointer, since we pass it to readl. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- This patch was previously submitted as part of https://patchwork.ozlabs.org/project/uboot/list/?series=161576

[PATCH v1 2/8] gpio: sifive: Use generic reg read function

Using an fdt-specific function causes problems with a live tree. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- This patch was previously submitted as part of https://patchwork.ozlabs.org/project/uboot/list/?series=161576 drivers/gpio/sifive-gpio.c | 2 +- 1 file changed, 1

RE: [PATCH v4 2/5] usb: host: dwc2: add phy support

> -Original Message- > From: Simon Goldschmidt > Sent: mercredi 4 mars 2020 20:52 > To: Patrick DELAUNAY ; u-boot@lists.denx.de > Cc: ley.foon@intel.com; b.galv...@gmail.com; Daniel Schwierzeck > ; Marek Vasut ; Michal > Suchanek ; Simon Glass ; U-Boot > STM32 > Subject: Re: [PATCH

[PATCH v6 19/19] riscv: Add Sipeed Maix support

The Sipeed Maix series is a collection of boards built around the RISC-V Kendryte K210 processor. This processor contains several peripherals to accelerate neural network processing and other "ai" tasks. This includes a "KPU" neural network processor, an audio processor supporting beamforming

[PATCH v6 18/19] riscv: Add device tree for K210 and Sipeed Maix BitM

Where possible, I have tried to find compatible drivers based on the layout of registers. However, many devices remain untested. All untested devices have been left disabled, but some tentative properties (such as compatible strings, and clocks, interrupts, and resets properties) have been added.

[PATCH v6 14/19] riscv: Add option to support RISC-V privileged spec 1.9

Some older processors (notably the Kendryte K210) use an older version of the RISC-V privileged specification. The primary changes between the old and new are in virtual memory, and in the merging of three separate counter enable CSRs. Using the new CSR on an old processor causes an illegal

[PATCH v6 17/19] riscv: Enable cpu clock if it is present

The cpu clock is probably already enabled if we are executing code (though we could be executing from a different core). This patch prevents the cpu clock or its parents from being disabled. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- This patch was previously submitted on its own as

[PATCH v6 16/19] riscv: Try to get cpu frequency from a "clocks" node if it exists

Instead of always using the "clock-frequency" property to determine cpu frequency, try using a clock in "clocks" if it exists. This patch also fixes a bug where there could be spurious higher frequencies if sizeof(u32) != sizeof(ulong). Signed-off-by: Sean Anderson Reviewed-by: Bin Meng ---

[PATCH v6 13/19] riscv: Fix race conditions when initializing IPI

The IPI code could have race conditions in several places. * Several harts could race on the value of gd->arch->clint/plic * Non-boot harts could race with the main hart on the DM subsystem In addition, if an IPI was pending when U-Boot started, it would cause the IPI handler to jump to

[PATCH v6 11/19] lib: Always set errno in hcreate_r

This could give a confusing error message if it failed and didn't set errno. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- Changes in v5: - New lib/hashtable.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/lib/hashtable.c b/lib/hashtable.c index

[PATCH v6 12/19] riscv: Add headers for asm/global_data.h

This header depended on bd_t and ulong, but did not include the appropriate headers. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- Changes in v4: - Include compiler.h not linux/compiler.h arch/riscv/include/asm/global_data.h | 2 ++ 1 file changed, 2 insertions(+) diff --git

[PATCH v6 15/19] riscv: Allow use of reset drivers

Currently, one cannot use a reset driver on RISC-V. Follow the MIPS example, and disable the default reset handler when the sysreset driver is enabled. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- Changes in v3: - New arch/riscv/lib/reset.c | 2 ++ 1 file changed, 2 insertions(+)

[PATCH v6 05/19] clk: Add K210 pll support

This pll code is primarily based on the code from the kendryte standalone sdk in lib/drivers/sysctl.c. k210_pll_calc_params is roughly analogous to the algorithm used to set the pll frequency, but it has been completely rewritten to be fixed-point based. Signed-off-by: Sean Anderson --- Changes

[PATCH v6 10/19] reset: Add generic reset driver

This patch adds a generic reset driver. It is designed to be useful when one has a register in a regmap which contains bits that reset other devices. I thought this seemed like a very generic use, so here is a generic driver. The overall structure has been modeled on the syscon-reboot driver.

[PATCH v6 09/19] dm: Fix error handling for dev_read_addr_ptr

dev_read_addr_ptr had different semantics depending on whether OF_LIVE was enabled. This patch converts both implementations to return NULL on error, and converts all call sites which check for FDT_ADDR_T_NONE to check for NULL instead. This patch also removes the call to map_physmem, since we

[PATCH v6 08/19] dm: Add support for simple-pm-bus

This type of bus is used in Linux to designate buses which have power domains and/or clocks which need to be enabled before their child devices can be used. Because power domains are automatically enabled before probing in U-Boot, we just need to enable any clocks present. Signed-off-by: Sean

[PATCH v6 06/19] clk: Add a bypass clock for K210

This is a small driver to do a software bypass of a clock if hardware bypass is not working. I have tried to write this in a generic fashion, so that it could be potentially broken out of the kendryte code at some future date. For the K210, it is used to have aclk bypass pll0 and use in0 instead

[PATCH v6 07/19] clk: Add K210 clock support

Due to the large number of clocks, I decided to use the CCF. The overall structure is modeled after the imx code. Clocks are stored in several arrays. There are some translation macros (FOOIFY()) which allow for more dense packing. A possible improvement could be to only store the parameters we

[PATCH v6 03/19] clk: Unconditionally recursively en-/dis-able clocks

For clocks not in the CCF, their parents will not have UCLASS_CLK, so we just enable them as normal. The enable count is local to the struct clk, but this will never result in the actual en-/dis-able op being called (unless the same struct clk is enabled twice). For clocks in the CCF, we always

[PATCH v6 02/19] clk: Check that ops of composite clock components exist before calling

clk_composite_ops was shared between all devices in the composite clock driver. If one clock had a feature (such as supporting set_parent) which another clock did not, it could call a null pointer dereference. This patch does three things 1. It adds null-pointer checks to all composite clock

[PATCH v6 01/19] clk: Always use the supplied struct clk

CCF clocks should always use the struct clock passed to their methods for extracting the driver-specific clock information struct. Previously, many functions would use the clk->dev->priv if the device was bound. This could cause problems with composite clocks. The individual clocks in a composite

[PATCH v6 00/19] riscv: Add Sipeed Maix support

This patch series adds support for Sipeed Maix boards and the Kendryte K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other models are similar. This series depends on (clk: Include missing headers for linux/clk-provider.h). This

[PATCH v6 04/19] clk: Add functions to register CCF clock structs

This patch adds alternate versions of the clk_*_register functions for use with statically-allocated struct clks. This allows drivers to define clocks at compile-time and register them at run-time without malloc-ing. This increases the size of the binary, but should not affect ram usage (since the

RE: [PATCH v4 1/5] dm: clk: add stub when CONFIG_CLK is desactivated

Hi Simon, > From: Simon Goldschmidt > Sent: mercredi 4 mars 2020 20:49 > > Am 18.02.2020 um 09:34 schrieb Patrick Delaunay: > > Add stub for functions clk_...() when CONFIG_CLK is desactivated. > > > > This patch avoids compilation issues for driver using these API > > without protection (#if

RE: [PATCH 1/2] drivers/rng: simplify Kconfig

Hi Heinrich, > From: U-Boot On Behalf Of Heinrich Schuchardt > Sent: mercredi 4 mars 2020 02:18 > > For all sandbox systems with DM_RNG we enable RNG_SANDBOX. So we can > simply set the default to yes. > > All rng drivers depend on DM_RNG. Use a single 'if' instead of individual >

Re: [PATCH] Makefile: doesn't need check stack size when dtb is not built

On 3/4/20 5:39 PM, AKASHI Takahiro wrote: On Wed, Mar 04, 2020 at 05:22:25PM -0700, Stephen Warren wrote: On 3/4/20 5:15 PM, AKASHI Takahiro wrote: On Wed, Mar 04, 2020 at 09:21:29AM -0700, Stephen Warren wrote: On 3/3/20 11:54 PM, AKASHI Takahiro wrote: The commit 5fed97af20da ("Makefile:

Re: [RFC] dm: uclass: add functions to get device by platdata

Hi Simon, On 5/3/20 10:54, Walter Lozano wrote: Let me check if I understand correctly, your suggestion is to do something like diff --git a/include/dm/uclass.h b/include/dm/uclass.h index 92c07f8426..bf09dadf3f 100644 --- a/include/dm/uclass.h +++ b/include/dm/uclass.h @@ -167,8 +167,8 @@

How to set boot count in U-boot for NXP iMX.6 Dual and Dual lite?

Hello All, I want to set boot count to 5 for iMX.6 to set attempt counter, in case of failures at boot time. I am using both Dual and Dual lite modules. U-boot source code reference: Freescale's U-Boot 2014.04. As I checked, CONFIG_BOOTCOUNT_LIMIT MACRO can be used to configure attempt

Re: [RFC] dm: uclass: add functions to get device by platdata

Hi Simon, Thanks for taking the time to check for my comments On 4/3/20 20:11, Simon Glass wrote: Hi Walter, On Wed, 4 Mar 2020 at 12:40, Walter Lozano wrote: When OF_PLATDATA is enabled DT information is parsed and platdata structures are populated. In this context the links between DT

[U-Boot] [PATCH] board: ti: README: Update OP-TEE binary name

The OP-TEE binary to use is renamed to v2 as the v1 binary has been deprecated and is no longer built by default. Reported-by: Grygorii Strashko Signed-off-by: Andrew F. Davis --- board/ti/am65x/README | 2 +- board/ti/j721e/README | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff

Please pull u-boot-x86

Hi Tom, This PR includes the following changes for v2020.04 release: - Revert "x86: use invd instead of wbinvd in real mode start code" - Convert toradex boards README to reST - serial: ns16550: Move PCI access from ofdata_to_platdata() to probe() - x86: apl: Use cpu_x86_get_count() for

Re: [PATCH] arm: socfpga: arria10: Add save_boot_params()

On 3/5/20 9:56 AM, Ley Foon Tan wrote: Hi, [...] >> Aren't those already defined in include/configs/socfpga_common.h ? > socfpga_common.h have this: > #define CONFIG_SYS_INIT_RAM_SIZE(0x4 - CONFIG_SYS_SPL_MALLOC_SIZE) > > But, we can't use it here.

Re: [U-Boot] [PATCH V3 15/27] imx8m: Fix MMU table issue for OPTEE memory

On Thu, Mar 5, 2020 at 12:46 PM Peng Fan wrote: > > > Subject: Re: [U-Boot] [PATCH V3 15/27] imx8m: Fix MMU table issue for > > OPTEE memory > > > > Hi Peng, > > > > On Thu, Mar 5, 2020 at 2:50 AM Peng Fan wrote: > > > > > > > Subject: Re: [U-Boot] [PATCH V3 15/27] imx8m: Fix MMU table issue > >

Re: [PATCH v1] x86: acpi: Refactor XSDT handling in acpi_add_table()

On Tue, Mar 03, 2020 at 07:47:56PM -0700, Simon Glass wrote: > On Tue, 3 Mar 2020 at 02:23, Andy Shevchenko > wrote: > > On Tue, Mar 3, 2020 at 1:36 AM Simon Glass wrote: > > > On Mon, 2 Mar 2020 at 13:47, Andy Shevchenko > > > wrote: > > > > On Mon, Mar 2, 2020 at 9:47 PM Simon Glass wrote:

Re: [PATCH v3 2/6] mmc: meson-gx: enable input clocks

Hi Jerome, On Thu, 5 Mar 2020 at 16:43, Jerome Brunet wrote: > > Until now, the mmc clock was left in a good enough state by the ROM > code to be used by the controller. However on some SoC, if the ROM > code finds a bootloader on USB or SPI, it might leave the MMC clock > in state the

Re: [PATCH v3 00/11] Add Support for eMMC boot in AM65x and J721e

On 3/5/20 8:00 PM, Peng Fan wrote: >> Subject: Re: [PATCH v3 00/11] Add Support for eMMC boot in AM65x and >> J721e >> >> Peng, >> >> On 26/02/20 4:31 pm, Jaehoon Chung wrote: >>> Hi Faiz, >>> >>> On 2/26/20 5:14 PM, Faiz Abbas wrote: The following patches add support for eMMC boot in TI's

[PATCH v3 4/6] arm64: dts: meson: sync dt and bindings from v5.6-rc2

Sync the device tree and dt-bindings from Linux v5.6-rc2 11a48a5a18c6 ("Linux 5.6-rc2") The only exception to this is the mmc pinctrl pin bias of gxl SoC family. This is a fix which found its way to u-boot but not Linux yet. Acked-by: Neil Armstrong Signed-off-by: Jerome Brunet ---

Re: [RFC PATCH 0/1] Add boot hartid to a Device tree

Hi, I have started to implement the corresponding changes in EDK2: https://github.com/changab/edk2-staging-riscv/compare/5f63e9249751ccb9302514455b9a1a7038f34547...RISC-V-DT-fixup What happens is: The DTB is embedded in the FW image and passed to sbi_init in SEC phase. We initialize OpenSBI as

[PATCH v3 5/6] arm64: dts: meson: import libretech-pc from linux v5.6-rc2

Sync the libretech-pc device tree from Linux v5.6-rc2 11a48a5a18c6 ("Linux 5.6-rc2") Acked-by: Neil Armstrong Signed-off-by: Jerome Brunet --- arch/arm/dts/meson-gx-libretech-pc.dtsi | 375 ++ arch/arm/dts/meson-gxl-s905d-libretech-pc.dts | 16 +

[PATCH v3 2/6] mmc: meson-gx: enable input clocks

Until now, the mmc clock was left in a good enough state by the ROM code to be used by the controller. However on some SoC, if the ROM code finds a bootloader on USB or SPI, it might leave the MMC clock in state the controller cannot work with. Enable the input clocks provided to the mmc

[PATCH v3 6/6] arm64: dts: meson: add libretech-pc support

Add support for the Amlogic based libretech-pc platform. This platform comes with 2 variant, based on the s905d or s912 SoC. Acked-by: Neil Armstrong Signed-off-by: Jerome Brunet --- arch/arm/dts/Makefile | 2 + .../meson-gxl-s905d-libretech-pc-u-boot.dtsi | 7 ++

[PATCH v3 3/6] clk: meson: reset mmc clock on probe

On some SoCs, depending on the boot device, the MMC clock block may be left in a weird state by the ROM code, in which no decent clock may be provided. Reset the related register to make sure a sane MMC clock is ready for the controller. Reviewed-by: Neil Armstrong Tested-by: Anand Moon

[PATCH v3 1/6] dt-bindings: leds: import common led bindings from linux v5.5

Import the common leds bindings definition from linux d5226fa6dbae ("Linux 5.5") Reviewed-by: Neil Armstrong Signed-off-by: Jerome Brunet --- include/dt-bindings/leds/common.h | 75 +++ 1 file changed, 75 insertions(+) create mode 100644

[PATCH v3 0/6] arm64: meson: add libretech-pc support

Add libretech PC platform support. This platform comes in 2 variants, one with the s905d and the other s912. While working on these boards, I've found a problem related the mmc clock. In some cases, the ROM code will leave the mmc clocks in such a weird state that any access to the mmc controller

RE: [PATCH v3 00/11] Add Support for eMMC boot in AM65x and J721e

> Subject: Re: [PATCH v3 00/11] Add Support for eMMC boot in AM65x and > J721e > > Peng, > > On 26/02/20 4:31 pm, Jaehoon Chung wrote: > > Hi Faiz, > > > > On 2/26/20 5:14 PM, Faiz Abbas wrote: > >> The following patches add support for eMMC boot in TI's Am65x and > >> J721e devices. > > > >

RE: [U-Boot] [PATCH V3 15/27] imx8m: Fix MMU table issue for OPTEE memory

> Subject: Re: [U-Boot] [PATCH V3 15/27] imx8m: Fix MMU table issue for > OPTEE memory > > Hi Peng, > > On Thu, Mar 5, 2020 at 2:50 AM Peng Fan wrote: > > > > > Subject: Re: [U-Boot] [PATCH V3 15/27] imx8m: Fix MMU table issue > > > for OPTEE memory > > > > > > Hi Peng, > > > > > > On Tue, Aug

Re: [U-Boot] [PATCH V3 15/27] imx8m: Fix MMU table issue for OPTEE memory

Hi Peng, On Thu, Mar 5, 2020 at 2:50 AM Peng Fan wrote: > > > Subject: Re: [U-Boot] [PATCH V3 15/27] imx8m: Fix MMU table issue for > > OPTEE memory > > > > Hi Peng, > > > > On Tue, Aug 27, 2019 at 9:38 AM Peng Fan wrote: > > > > > > When running with OPTEE, the MMU table in u-boot does not

Re: [PATCH v2] serial: ns16550: Move PCI access from ofdata_to_platdata() to probe()

On Mon, Mar 2, 2020 at 9:41 PM Wolfgang Wallner wrote: > > Currently the ofdata_to_platdata() method calls dev_read_addr_pci(), > which potentially accesses the parent PCI bus. If this happens before > the parent PCI bus is probed the resulting address will be wrong. > > This behavior was

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