On 7/22/21 1:19 PM, Jorge Ramirez-Ortiz wrote:
> Confirm the secure boot configuration on the console.
>
> Signed-off-by: Jorge Ramirez-Ortiz
> ---
> arch/arm/mach-zynqmp/include/mach/hardware.h | 3 ++-
> board/xilinx/zynqmp/zynqmp.c | 16 +++-
> 2 files
In DM Ethernet, the old "egiga0" name is no longer valid,
so replace with Ethernet PHY name from device tree. Also, read
Ethernet PHY address from device tree.
Signed-off-by: Tony Dinh
---
board/Seagate/dockstar/dockstar.c | 25 +
1 file changed, 13 insertions(+), 12
On 7/16/21 7:16 PM, Jorge Ramirez-Ortiz wrote:
> As a security feature, if boot.bin was configured for secure boot the
> CSU will disable the JTAG interface on all cases.
>
> Some boards might rely on this interface for flashing to QSPI in which
> case those systems might end up bricked during
- Add DM_ETH and associated configs
- Add SYS_THUMB_BUILD to keep u-boot image size within 512K
(ENV_OFFSET is at 512K in NAND).
Signed-off-by: Tony Dinh
---
configs/dockstar_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/configs/dockstar_defconfig
- Enable DM Ethernet.
- Turn on CONFIG_SYS_THUMB_BUILD to keep u-boot image size within 512K
(ENV_OFFSET is at 512K in NAND).
- Use Ethernet PHY names from device tree. And also look up Ethernet
PHY addr from device tree.
- This patch series depends on
Sorry to resend this, I forget to re-subscribe mail list.
The 'sdmmc0m1_gpio' is defined, more see last email.
Thanks,
- Jason
Jason Lee 于2021年8月12日周四 上午9:57写道：
>
> The 'sdmmc0m1_gpio' is defined in arch/arm/dts/rk3328.dtsi, which is
> included at the beginning of rk3328-nanopi-r2s.dts.
>
>
On 2021/8/11 下午6:05, Kever Yang wrote:
Adam Lee 于2021年7月6日周二 下午10:42写道：
From 29cf326e24b657180e4cf90ded2366d49f33e88e Mon Sep 17 00:00:00 2001
From: jason416
Date: Mon, 5 Jul 2021 23:22:29 +0800
Subject: [PATCH] rockchip: rk3328: fix booting error for nanopi-r2s
devices can not boot
On 2021/7/22 下午11:20, Peter Robinson wrote:
Sync the rk3399 DTs and associated bits from 5.14-rc1.
Signed-off-by: Peter Robinson
---
arch/arm/dts/rk3399-evb.dts | 4 +
arch/arm/dts/rk3399-ficus.dts | 29 +-
arch/arm/dts/rk3399-firefly.dts
On Wed, Aug 11, 2021 at 08:41:29PM -0300, Fabio Estevam wrote:
> Hi Tom,
>
> On Wed, Aug 11, 2021 at 6:27 PM Tom Rini wrote:
>
> > So where did we end up here? I didn't see a patch going by dropping the
> > mx28 configs Fabio doesn't want (and the patch needs a minor refresh for
> > email I
Hi Tom,
On Wed, Aug 11, 2021 at 6:27 PM Tom Rini wrote:
> So where did we end up here? I didn't see a patch going by dropping the
> mx28 configs Fabio doesn't want (and the patch needs a minor refresh for
> email I think anyhow). No comments on few others. I'd like to make a
>
mx28evk_auart_console_defconfig, mx28evk_nand_defconfig and
mx28evk_spi_defconfig have not been converted to DM.
Keep only the main mx28evk_defconfig to ease maintenance.
Signed-off-by: Fabio Estevam
---
board/freescale/mx28evk/MAINTAINERS | 3 --
board/freescale/mx28evk/README |
> The rest of that series which was i.MX specific was already applied by
> Stefano. So if you could take this one as a singleton that would be great.
> Thanks!
Will do, but it won't happen until at least next Monday as I'm OOTO til then.
Tom
--
nvpublic
-Original Message-
From: Marcel
On Thu, Jul 29, 2021 at 08:14:34AM -0400, Tom Rini wrote:
> On Thu, Jul 29, 2021 at 12:30:27PM +0200, Stefano Babic wrote:
> > On 28.07.21 21:21, Tom Rini wrote:
> > > On Wed, Jul 28, 2021 at 04:09:48PM -0300, Fabio Estevam wrote:
> > > > Hi Stefano,
> > > >
> > > > On Wed, Jul 28, 2021 at 3:58
On Wed, Aug 11, 2021 at 12:28:13PM -0600, Simon Glass wrote:
> Hi Tom,
>
> On Wed, 11 Aug 2021 at 09:40, Tom Rini wrote:
> >
> > On Wed, Aug 11, 2021 at 08:26:38AM -0600, Simon Glass wrote:
> > > Hi Tom,
> > >
> > > On Wed, 11 Aug 2021 at 08:17, Tom Rini wrote:
> > > >
> > > > On Wed, Aug 11,
On Wed, Aug 11, 2021 at 08:47:24AM -0600, Simon Glass wrote:
> Hi Tom,
>
> On Wed, 11 Aug 2021 at 08:31, Tom Rini wrote:
> >
> > On Wed, Aug 11, 2021 at 08:11:41AM -0600, Simon Glass wrote:
> > > Hi Tom,
> > >
> > > On Wed, 11 Aug 2021 at 08:02, Tom Rini wrote:
> > > >
> > > > On Wed, Aug 11,
On Wed, Aug 11, 2021 at 04:14:51PM -0400, Sean Anderson wrote:
>
>
> On 8/11/21 10:17 AM, Tom Rini wrote:
> > On Wed, Aug 11, 2021 at 08:03:00AM -0600, Simon Glass wrote:
> > > Hi Tom,
> > >
> > > On Wed, 11 Aug 2021 at 07:47, Tom Rini wrote:
> > > >
> > > > On Wed, Aug 11, 2021 at 06:56:31AM
On 8/11/21 10:17 AM, Tom Rini wrote:
On Wed, Aug 11, 2021 at 08:03:00AM -0600, Simon Glass wrote:
Hi Tom,
On Wed, 11 Aug 2021 at 07:47, Tom Rini wrote:
>
> On Wed, Aug 11, 2021 at 06:56:31AM -0600, Simon Glass wrote:
> > Hi Tom,
> >
> > On Tue, 10 Aug 2021 at 13:38, Tom Rini wrote:
>
On Wed, 2021-08-11 at 16:45 +, Tom Warren wrote:
> I'm fine with someone else taking this tegra patch in if it's part of a
> larger series. If not, let me know
> and I'll take it as a singleton.
The rest of that series which was i.MX specific was already applied by Stefano.
So if you could
On Monday 26 July 2021 17:24:26 Marek Behun wrote:
> On Mon, 26 Jul 2021 16:58:04 +0200
> Pali Rohár wrote:
>
> > On Monday 26 July 2021 16:55:22 Marek Behun wrote:
> > > On Mon, 26 Jul 2021 14:58:59 +0200
> > > Pali Rohár wrote:
> > >
> > > > Static inline function _debug_uart_init() should
On 16/07/21, Jorge Ramirez-Ortiz wrote:
reminder
> As a security feature, if boot.bin was configured for secure boot the
> CSU will disable the JTAG interface on all cases.
>
> Some boards might rely on this interface for flashing to QSPI in which
> case those systems might end up bricked
On 22/07/21, Jorge Ramirez-Ortiz wrote:
reminder
> Confirm the secure boot configuration on the console.
>
> Signed-off-by: Jorge Ramirez-Ortiz
> ---
> arch/arm/mach-zynqmp/include/mach/hardware.h | 3 ++-
> board/xilinx/zynqmp/zynqmp.c | 16 +++-
> 2 files
Like for all other mvebu platforms with CONFIG_SYS_TCLK macro, define
CONFIG_SYS_REF_CLK macro for a37xx with base reference clock value which is
read from latched reset register.
Replace all usages of get_ref_clk() function by this CONFIG_SYS_REF_CLK
macro and completely remove get_ref_clk()
File mach/soc.h is included also in 64-bit mvebu processors, so define
Armada XP related macros only when compiling for Armada XP.
Signed-off-by: Pali Rohár
---
arch/arm/mach-mvebu/include/mach/soc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Hi Tom,
On Wed, 11 Aug 2021 at 09:40, Tom Rini wrote:
>
> On Wed, Aug 11, 2021 at 08:26:38AM -0600, Simon Glass wrote:
> > Hi Tom,
> >
> > On Wed, 11 Aug 2021 at 08:17, Tom Rini wrote:
> > >
> > > On Wed, Aug 11, 2021 at 08:03:00AM -0600, Simon Glass wrote:
> > > > Hi Tom,
> > > >
> > > > On
I'm fine with someone else taking this tegra patch in if it's part of a larger
series. If not, let me know and I'll take it as a singleton.
Tom
--
nvpublic
-Original Message-
From: Stefano Babic
Sent: Wednesday, August 11, 2021 6:24 AM
To: Marcel Ziswiler ; u-boot@lists.denx.de
Cc:
On Wed, Aug 11, 2021 at 12:47:17PM +0200, Stefan Roese wrote:
> Hi Tom,
>
> please pull the next batch of CFI flash related patches. Here the
> summary log:
>
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
On Wed, Aug 11, 2021 at 10:30:58AM +0200, Stefan Roese wrote:
> Hi Tom,
>
> please pull the next batch of Marvell MVEBU related patches. Here the
> summary log:
>
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
On Wed, Aug 11, 2021 at 09:41:21AM +0200, Neil Armstrong wrote:
> Hi Tom,
>
> Here's a bunch of changes concerning:
> - single fix for odroid-n2+ detection
> - HW reboot_reason drop in favor of BCB for Android boot state tracking
> - meson64_android config cleanups and support for A/V, AVB and
On Wed, Aug 11, 2021 at 08:26:38AM -0600, Simon Glass wrote:
> Hi Tom,
>
> On Wed, 11 Aug 2021 at 08:17, Tom Rini wrote:
> >
> > On Wed, Aug 11, 2021 at 08:03:00AM -0600, Simon Glass wrote:
> > > Hi Tom,
> > >
> > > On Wed, 11 Aug 2021 at 07:47, Tom Rini wrote:
> > > >
> > > > On Wed, Aug 11,
Hi Tom,
On Wed, 11 Aug 2021 at 08:31, Tom Rini wrote:
>
> On Wed, Aug 11, 2021 at 08:11:41AM -0600, Simon Glass wrote:
> > Hi Tom,
> >
> > On Wed, 11 Aug 2021 at 08:02, Tom Rini wrote:
> > >
> > > On Wed, Aug 11, 2021 at 06:56:31AM -0600, Simon Glass wrote:
> > > [snip]
> > > > Having thought a
On Wed, Aug 11, 2021 at 08:11:41AM -0600, Simon Glass wrote:
> Hi Tom,
>
> On Wed, 11 Aug 2021 at 08:02, Tom Rini wrote:
> >
> > On Wed, Aug 11, 2021 at 06:56:31AM -0600, Simon Glass wrote:
> > [snip]
> > > Having thought a bit more, perhaps we have the wrong attitude to
> > > Kconfig. The
On 11.08.21 16:25, Tom Rini wrote:
On Wed, Aug 11, 2021 at 04:02:39PM +0200, Stefan Roese wrote:
On an NXP LX2160 based platform it has been noticed, that the currently
implemented memset/memcpy functions for aarch64 are suboptimal.
Especially the memset() for clearing the NXP MC firmware
Hi Tom,
On Wed, 11 Aug 2021 at 08:17, Tom Rini wrote:
>
> On Wed, Aug 11, 2021 at 08:03:00AM -0600, Simon Glass wrote:
> > Hi Tom,
> >
> > On Wed, 11 Aug 2021 at 07:47, Tom Rini wrote:
> > >
> > > On Wed, Aug 11, 2021 at 06:56:31AM -0600, Simon Glass wrote:
> > > > Hi Tom,
> > > >
> > > > On
On Wed, Aug 11, 2021 at 04:02:39PM +0200, Stefan Roese wrote:
>
> On an NXP LX2160 based platform it has been noticed, that the currently
> implemented memset/memcpy functions for aarch64 are suboptimal.
> Especially the memset() for clearing the NXP MC firmware memory is very
> expensive
On 11.08.21 10:14, Pali Rohár wrote:
There are already IBR_HDR_* constants for these numbers, so use them.
Signed-off-by: Pali Rohár
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
tools/kwbimage.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git
On 11.08.21 10:14, Pali Rohár wrote:
Part of image data is 4 byte checksum, so every image must contain at least
4 bytes. Verify it to prevent memory corruptions.
Signed-off-by: Pali Rohár
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
tools/kwbimage.c | 2 +-
1 file changed, 1
On 11.08.21 10:14, Pali Rohár wrote:
Check that extended image header size is not larger than file size.
Signed-off-by: Pali Rohár
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
tools/kwbimage.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/tools/kwbimage.c b/tools/kwbimage.c
On 11.08.21 10:14, Pali Rohár wrote:
Only image versions 0 and 1 are supported. Verify it in
kwbimage_verify_header() function.
Signed-off-by: Pali Rohár
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
tools/kwbimage.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff
On 11.08.21 10:08, Pali Rohár wrote:
Define all standard baudrates plus 3 non-standard high speed:
3125000 400 515
3125000 matches divisor 5 with 250 MHz TCLK and divisor 4 with 200 MHz TCLK.
400 is the rounded value for divisor 4 with 250 MHz TCLK (3906250) and
divisor 3 with 200
On Wed, Aug 11, 2021 at 08:03:00AM -0600, Simon Glass wrote:
> Hi Tom,
>
> On Wed, 11 Aug 2021 at 07:47, Tom Rini wrote:
> >
> > On Wed, Aug 11, 2021 at 06:56:31AM -0600, Simon Glass wrote:
> > > Hi Tom,
> > >
> > > On Tue, 10 Aug 2021 at 13:38, Tom Rini wrote:
> > [snip]
> > > > I need to take
Hi Tom,
On Wed, 11 Aug 2021 at 08:02, Tom Rini wrote:
>
> On Wed, Aug 11, 2021 at 06:56:31AM -0600, Simon Glass wrote:
> [snip]
> > Having thought a bit more, perhaps we have the wrong attitude to
> > Kconfig. The CONFIG() macro I am talking about works by building an
> > xxx or SPL_xxx config.
Hi Tom,
On Wed, 11 Aug 2021 at 07:47, Tom Rini wrote:
>
> On Wed, Aug 11, 2021 at 06:56:31AM -0600, Simon Glass wrote:
> > Hi Tom,
> >
> > On Tue, 10 Aug 2021 at 13:38, Tom Rini wrote:
> [snip]
> > > I need to take another pass at converting a bunch of symbols, to see
> > > where we're at.
Ported from https://github.com/ARM-software/optimized-routines
These files are included from this repository, including the latest
git commit ID:
string/aarch64/memcpy.S: afd6244a1f8d
string/aarch64/memset.S: e823e3abf5f8
string/asmdefs.h: e823e3abf5f8
Note that memmove is also handled by the
The optimized memset uses the dc opcode, which causes problems when the
cache is disabled. This patch adds a check if the cache is disabled and
uses a very simple memset implementation in this case. Otherwise the
optimized version is used.
Signed-off-by: Stefan Roese
---
(no changes since v2)
On an NXP LX2160 based platform it has been noticed, that the currently
implemented memset/memcpy functions for aarch64 are suboptimal.
Especially the memset() for clearing the NXP MC firmware memory is very
expensive (time-wise).
By using optimized functions, a speedup of ~ factor 6 has been
This patch enables the use of the optimized memset(), memmove() &
memcpy() versions recently added on ARM64.
Signed-off-by: Stefan Roese
---
Changes in v3:
- Add memmove as well
arch/arm/Kconfig | 38 +--
arch/arm/include/asm/string.h | 4
2
On Wed, Aug 11, 2021 at 06:56:31AM -0600, Simon Glass wrote:
[snip]
> Having thought a bit more, perhaps we have the wrong attitude to
> Kconfig. The CONFIG() macro I am talking about works by building an
> xxx or SPL_xxx config. If we have separate autoconf.h files for each
> phase
Hi Grant,
On Wed, 11 Aug 2021 at 07:47, Grant Likely wrote:
>
> On Wed, Aug 11, 2021 at 1:58 PM Simon Glass wrote:
> >
> > Hi Grant,
> >
> > On Wed, 11 Aug 2021 at 03:58, Grant Likely
> > wrote:
> > >
> > > On Mon, Aug 9, 2021 at 8:11 PM Tom Rini wrote:
> > > >
> > > > On Sat, Aug 07, 2021
On Wed, Aug 11, 2021 at 06:56:31AM -0600, Simon Glass wrote:
> Hi Tom,
>
> On Tue, 10 Aug 2021 at 13:38, Tom Rini wrote:
[snip]
> > I need to take another pass at converting a bunch of symbols, to see
> > where we're at. Probably the biggest chunk of progress next would be to
> > start
On Wed, Aug 11, 2021 at 1:58 PM Simon Glass wrote:
>
> Hi Grant,
>
> On Wed, 11 Aug 2021 at 03:58, Grant Likely wrote:
> >
> > On Mon, Aug 9, 2021 at 8:11 PM Tom Rini wrote:
> > >
> > > On Sat, Aug 07, 2021 at 04:23:36PM -0600, Simon Glass wrote:
> > > > Comments welcome!
> > >
> > > I think
Hallo Marcel,
On 11.08.21 15:12, Marcel Ziswiler wrote:
From: Marcel Ziswiler
The USB recovery mode is used by Toradex to load the Toradex Easy
Installer image which supports further system images installation.
Prepare for loading and launching the Toradex Easy Installer if the
USB Recovery
From: Marcel Ziswiler
The USB recovery mode is used by Toradex to load the Toradex Easy
Installer image which supports further system images installation.
Prepare for loading and launching the Toradex Easy Installer if the
USB Recovery mode is activated.
Signed-off-by: Marcel Ziswiler
On Wed, Aug 11, 2021 at 8:31 AM Fabio Estevam wrote:
> I still cannot boot:
>
> U-Boot SPL 2021.07-1-g54086b3f1019-dirty (Aug 10 2021 - 18:39:22
> -0300)
> DDRINFO: Cfg attempt: [ 1/6 ]
> DDRINFO(M): mr5-8 [ 0xff10 ]
> DDRINFO(T): mr5-8 [ 0x510 ]
> resetting ...
Hi Grant,
On Wed, 11 Aug 2021 at 03:58, Grant Likely wrote:
>
> On Mon, Aug 9, 2021 at 8:11 PM Tom Rini wrote:
> >
> > On Sat, Aug 07, 2021 at 04:23:36PM -0600, Simon Glass wrote:
> > > Comments welcome!
> >
> > I think what this is really showing is that Yamada-san was right. All
> > the
Hi Tom,
On Tue, 10 Aug 2021 at 13:38, Tom Rini wrote:
>
> On Tue, Aug 10, 2021 at 08:58:46AM -0600, Simon Glass wrote:
> > Hi Tom,
> >
> > On Mon, 9 Aug 2021 at 13:11, Tom Rini wrote:
> > >
> > > On Sat, Aug 07, 2021 at 04:23:36PM -0600, Simon Glass wrote:
> > > > Hi,
> > > >
> > > > U-Boot can
Check that the watchdog_reset() implementation in wdt-uclass behaves
as expected:
- resets all activated watchdog devices
- leaves unactivated/stopped devices alone
- that the rate-limiting works, with a per-device threshold
Reviewed-by: Simon Glass
Reviewed-by: Stefan Roese
Signed-off-by:
A rather common kind of external watchdog circuit is one that is kept
alive by toggling a gpio. Add a driver for handling such a watchdog.
The corresponding linux driver apparently has support for some
watchdog circuits which can be disabled by tri-stating the gpio, but I
have never actually
It seems that no other test has claimed gpio_a:7 yet, so use that.
The only small wrinkle is modifying the existing wdt test to use
uclass_get_device_by_driver() since we now have two UCLASS_WDT
instances in play, so it's a little more robust to fetch the device by
driver and not merely
A board can have and make use of more than one watchdog device, say
one built into the SOC and an external gpio-petted one. Having
wdt-uclass only handle the first is both a little arbitrary and
unexpected.
So change initr_watchdog() so we visit (probe) all DM watchdog
devices, and call the
Since the gd->watchdog_dev member is going away, switch to using the
new wdt_stop_all() helper.
While here, clean up the preprocessor conditional: The ->watchdog_dev
member is actually guarded by CONFIG_WDT [disabling that in
x530_defconfig while keeping CONFIG_WATCHDOG breaks the build], and in
Since the watchdog_dev member of struct global_data is going away in
favor of the wdt-uclass handling all watchdog devices, prepare for
that by adding a helper to call wdt_stop() on all known devices.
Initially, this will only be used in one single
place (board/alliedtelesis/x530/x530.c), and
For the unit tests, it is more convenient if the tests are in charge
of when the watchdog devices are started and stopped, so prevent
wdt-uclass from doing it automatically.
Reviewed-by: Simon Glass
Reviewed-by: Stefan Roese
Signed-off-by: Rasmus Villemoes
---
configs/sandbox64_defconfig | 1
As a step towards handling all DM watchdogs in watchdog_reset(), use a
per-device flag to keep track of whether the device has been started
instead of a bit in gd->flags.
We will still need that bit to know whether we are past
initr_watchdog() and hence have populated gd->watchdog_dev -
In preparation for handling all DM watchdogs in watchdog_reset(), pull
out the code which handles starting (or not) the gd->watchdog_dev
device.
Include the device name in various printfs.
Reviewed-by: Simon Glass
Reviewed-by: Stefan Roese
Signed-off-by: Rasmus Villemoes
---
The addition of .pre_probe and .per_device_auto made this look
bad. Fix it.
Reviewed-by: Simon Glass
Reviewed-by: Stefan Roese
Signed-off-by: Rasmus Villemoes
---
drivers/watchdog/wdt-uclass.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git
As preparation for having the wdt-uclass provided watchdog_reset()
function handle all DM watchdog devices, and not just the first such,
introduce a uclass-owned struct to hold the reset_period and
next_reset, so these become per-device instead of being static
variables.
No functional change
wdt_start() does the "no ->start? return -ENOSYS" check, don't
open-code that in wdt_expire_now().
Also, wdt_start() maintains some global (and later some per-device)
state, which would get out of sync with this direct method call - not
that it matters much here since the board is supposed to
This series is an attempt at expanding the wdt-uclass provided
watchdog_reset() to handle all DM watchdogs, not just the first
one. Some of the ad hoc work done for the first DM watchdog in
initr_watchdog() is now moved to a .pre_probe hook so it is
automatically done for all devices.
It also
On Wed, Aug 11, 2021 at 02:29:12PM +0200, Wolfgang Denk wrote:
> Dear Rasmus,
>
> In message <3d48015a-07d3-e296-b9ba-a1edd455c...@prevas.dk> you wrote:
> >
> > >> + if (ret) {
> > >> + log_debug("Error getting UCLASS_WDT: %d\n", ret);
> > >
> > > Perhaps log_err()?
> >
> >
Dear Rasmus,
In message <3d48015a-07d3-e296-b9ba-a1edd455c...@prevas.dk> you wrote:
>
> >> + if (ret) {
> >> + log_debug("Error getting UCLASS_WDT: %d\n", ret);
> >
> > Perhaps log_err()?
>
> No, we've already been over this in earlier discussions (it's the exact
> same
Hi Ilias,
On 8/4/21 12:50 PM, Ilias Apalodimas wrote:
> Hi Michal
> Apologies for my late reply, I was on vacation!
no problem at all.
>
> [...]
>
When Abort happened I connected Xilinx debugger via jtag and look at cpu
backtrace.
>>>
>>> OK, but we are already in grub here and
Hi Kever,
Thank you for your comment.
On 8/11/21 12:01 PM, Kever Yang wrote:
> Hi Johan,
> Thanks for your patch, where does this source code come from?
Copied it from here:
https://github.com/rockchip-linux/u-boot/blame/next-dev/drivers/phy/phy-rockchip-inno-usb2.c
phy: add a new driver
Peter Robinson 于2021年7月22日周四 下午11:21写道：
>
> Sync the rk3399 DTs and associated bits from 5.14-rc1.
>
> Signed-off-by: Peter Robinson
Reviewed-by: Kever Yang
Thanks,
- Kever
> ---
> arch/arm/dts/rk3399-evb.dts | 4 +
> arch/arm/dts/rk3399-ficus.dts | 29 +-
Héllo Luka,
Le 11/08/2021 à 12:15, Luka Kovacic a écrit :
Hi Gerald,
On Wed, Aug 11, 2021 at 10:35 AM Gerald Kerma wrote:
From: Kerma Gérald
The hw_info command is implemented to enable parsing Marvell hw_info
formatted environments. This format is often used on Marvell Armada A37XX
based
From: Kerma Gérald
Add initial support for the ESPRESSOBin-Ultra board from Globalscale
Technologies, Inc.
The board is based on the 64-bit dual-core Marvell Armada 3720 SoC.
Peripherals:
- 5 Gigabit Ethernet ports (WAN has PoE, up to 30W, Topaz 6341 switch)
- RTC clock (PCF8563)
- USB 3.0
From: Kerma Gérald
Add the loadaddr U-Boot environment variable, as this is available in
the stock Marvell U-Boot by default on Marvell Armada A37XX platforms.
Signed-off-by: Kerma Gérald
Cc: Luka Kovacic
Cc: Luka Perkov
Cc: Robert Marko
---
include/configs/mvebu_armada-37xx.h | 1 +
1
From: Kerma Gérald
The hw_info command is implemented to enable parsing Marvell hw_info
formatted environments. This format is often used on Marvell Armada A37XX
based devices to store parameters like the board serial number, factory
MAC addresses and some other information.
These parameters are
From: Kerma Gérald
Add support for the GST ESPRESSOBin-Ultra board
Kerma Gérald (3):
cmd: mvebu: Implement the Marvell hw_info command
arm: mvebu: mvebu_armada-37xx: Define the loadaddr environment
variable
arm: mvebu: Initial ESPRESSOBin-Ultra board support
arch/arm/dts/Makefile
This code is no longer used, remove it.
Signed-off-by: Tom Rini
---
arch/powerpc/cpu/mpc85xx/Makefile| 1 -
arch/powerpc/cpu/mpc85xx/ether_fcc.c | 460 ---
arch/powerpc/cpu/mpc8xxx/cpu.c | 4 -
include/configs/MPC8560ADS.h | 47 +--
4 files
On 08/08/21 11:50 pm, Simon Glass wrote:
> This converts the following to Kconfig:
>CONFIG_TI_EDMA3
>
> Signed-off-by: Simon Glass
> ---
>
[..snip..]
> diff --git a/include/configs/ti_armv7_keystone2.h
> b/include/configs/ti_armv7_keystone2.h
> index cfc2be7b9f0..fa4a8c7a24f 100644
>
On 11.08.21 14:13, Rasmus Villemoes wrote:
On 11/08/2021 13.49, Stefan Roese wrote:
Hi Rasmus,
On 11.08.21 13:32, Rasmus Villemoes wrote:
On 03/08/2021 10.28, Stefan Roese wrote:
Hi Rasmus,
#endif
diff --git a/include/asm-generic/global_data.h
b/include/asm-generic/global_data.h
index
On 11/08/2021 13.49, Stefan Roese wrote:
> Hi Rasmus,
>
> On 11.08.21 13:32, Rasmus Villemoes wrote:
>> On 03/08/2021 10.28, Stefan Roese wrote:
>>> Hi Rasmus,
>>>
#endif
diff --git a/include/asm-generic/global_data.h
b/include/asm-generic/global_data.h
index
Hi Rasmus,
On 11.08.21 13:32, Rasmus Villemoes wrote:
On 03/08/2021 10.28, Stefan Roese wrote:
Hi Rasmus,
#endif
diff --git a/include/asm-generic/global_data.h
b/include/asm-generic/global_data.h
index e55070303f..28d749538c 100644
--- a/include/asm-generic/global_data.h
+++
Based on thread
https://lists.denx.de/pipermail/u-boot/2021-June/451828.html
especially
"Overall we have a deficiency in the UEFI implementation in that we
cannot deal with block devices added or removed after initialization."
there is a need to deal with removable media as usb/scsi/sata.
That's
On 03/08/2021 10.28, Stefan Roese wrote:
> Hi Rasmus,
>
>> #endif
>> diff --git a/include/asm-generic/global_data.h
>> b/include/asm-generic/global_data.h
>> index e55070303f..28d749538c 100644
>> --- a/include/asm-generic/global_data.h
>> +++ b/include/asm-generic/global_data.h
>> @@ -447,12
Hi Paul,
On Tue, Aug 10, 2021 at 10:33 PM Fabio Estevam wrote:
>
> Hi Paul,
>
> On Tue, Aug 10, 2021 at 10:06 PM Paul Liu wrote:
> >
> > Hi Fabio,
> >
> > It might work. But why? I mean the imx8mm-evk has already switched to
> > binman on the mainline.
> > So we should do the same. If you
Reviewed-by: Marek Behún
Hi Tom,
please pull the next batch of CFI flash related patches. Here the
summary log:
- Some CFI flash related fixups (Kconfig & header) (Bin)
- Enable CFI flash support on the QEMU RISC-V virt machine. (Bin)
On 07.08.21 07:00, Bin Meng wrote:
Enable support to the 2 NOR flashes on the QEMU RISC-V virt machine.
Signed-off-by: Bin Meng
Applied to u-boot-cfi-flash/master
Thanks,
Stefan
---
board/emulation/qemu-riscv/Kconfig | 2 ++
include/configs/qemu-riscv.h | 2 ++
2 files changed,
On 07.08.21 07:00, Bin Meng wrote:
Those embers wrapped with CONFIG_SYS_FLASH_CFI in struct flash_info_t
are unconditionally used in the cfi_flash.c driver.
Drop the #ifdefs in the definition of flash_info_t.
Signed-off-by: Bin Meng
Applied to u-boot-cfi-flash/master
Thanks,
Stefan
---
On 07.08.21 07:00, Bin Meng wrote:
The DM version CFI flash driver is in driver/mtd/cfi_flash.c, which
only gets built when FLASH_CFI_DRIVER is on. If CFI_FLASH is on but
FLASH_CFI_DRIVER is not, nothing is enabled at all.
Fix this dependency by selecting FLASH_CFI_DRIVER when CFI_FLASH is
On Thu, 5 Aug 2021 at 10:28, Jon Lin wrote:
>
> Make px30 SFC clock configurable
>
> Signed-off-by: Jon Lin
Reviewed-by: Philipp Tomsich
On Thu, 5 Aug 2021 at 10:27, Jon Lin wrote:
>
> From: Chris Morgan
>
> Adds support for XT25F128B used on Odroid Go Advance. Unfortunately
> this chip uses a continuation code which I cannot seem to parse, so
> there are possibly going to be collisions with chips that use the same
>
On Thu, 5 Aug 2021 at 10:26, Jon Lin wrote:
>
> From: Chris Morgan
>
> This patch adds support for the Rockchip serial flash controller
> found on the PX30 SoC. It should work for versions 3-5 of the SFC
> IP, however I am only able to test it on v3.
>
> This is adapted from the WIP SPI-MEM
On Tue, 29 Jun 2021 at 10:24, Yifeng Zhao wrote:
>
> This patch adds support for the RK3568 platform to this driver.
>
> Signed-off-by: Yifeng Zhao
I thought I had raised an objection to this patch previously, but did
not see a discussion...
So here we go again.
In 2017, we decided to split
On 2021/8/5 下午4:27, Jon Lin wrote:
Make px30 SFC clock configurable
Signed-off-by: Jon Lin
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changes in v7:
- Make px30 SFC clock configurable
drivers/clk/rockchip/clk_px30.c | 32
1 file changed, 32
On 2021/8/5 下午4:26, Jon Lin wrote:
From: Chris Morgan
Adds support for XT25F128B used on Odroid Go Advance. Unfortunately
this chip uses a continuation code which I cannot seem to parse, so
there are possibly going to be collisions with chips that use the same
manufacturer/ID.
On 2021/8/5 下午4:27, Jon Lin wrote:
From: Chris Morgan
The Odroid Go Advance uses a Rockchip Serial Flash Controller with an
XT25F128B SPI NOR flash chip. This adds support for both. Note that
while both the controller and chip support quad mode, only two lines
are connected to the chip.
On 2021/8/5 下午4:26, Jon Lin wrote:
From: Chris Morgan
Add the serial flash controller to the devicetree for the PX30.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
Reviewed-by: Kever Yang
Thanks,
- Kever
---
(no changes since v5)
Changes in v5:
- px30 use "rockchip, sfc" as
On 2021/8/5 下午4:26, Jon Lin wrote:
From: Chris Morgan
This patch adds support for setting the correct pin configuration
for the Rockchip Serial Flash Controller found on the PX30.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
Reviewed-by: Kever Yang
Thanks,
- Kever
---
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