[PATCH v1 1/1] arm: socfpga: agilex5: Coverity issue cleanup in jtag_usercode check

From: Tingting Meng A redundant comparison (jtag_usercode >= 0) was removed from the condition checking jtag_usercode. Since jtag_usercode is an unsigned integer, the check for non-negativity was always true. The code was simplified to resolve the Coverity warning. Signed-off-by: Tingting M

[PATCH v1 1/1] arm: socfpga: agilex5: Sub-device check enabled for runtime workaround

From: Tingting Meng Sub-device information is retrieved from the JTAG ID in Boot Scratch Cold 4 Register. This interface is introduced to allow device-specific errata workarounds to be applied in the future, based on the detected sub-device type. Signed-off-by: Tingting Meng --- arch/arm/mach

[PATCH v1 5/5] ddr: altera: iossm: Enhance debug information for ECC errors

From: Tingting Meng ECC debug information was enhanced to improve the readability of error messages. Signed-off-by: Tingting Meng --- drivers/ddr/altera/iossm_mailbox.c | 64 -- 1 file changed, 51 insertions(+), 13 deletions(-) diff --git a/drivers/ddr/altera

[PATCH v1 4/5] ddr: altera: agilex5: LPDDRs in-line ECC support

From: Tingting Meng In-line ECC support was added for LPDDR by reserving the last one-eighth of the memory space for ECC data. Full memory initialization using the BIST MEM INIT mailbox command, based on address and size, is required to correctly generate ECC data and enable proper ECC logic

[PATCH v1 3/5] arm: dts: agilex5: Update CCU configuration

From: Tingting Meng Cache allocation for dirty writes in the CCU system cache was disabled for performance optimization. Signed-off-by: Tingting Meng --- arch/arm/dts/socfpga_agilex5-u-boot.dtsi | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts

[PATCH v1 2/5] arm: socfpga: socfpga_soc64: Enable LMB_ARCH_MEM_MAP

From: Tingting Meng LMB_ARCH_MEM_MAP is enabled, and lmb_arch_add_memory() is introduced to correctly handle memory reservations for the second and third DDR memory banks. Signed-off-by: Tingting Meng --- arch/arm/Kconfig | 1 + arch/arm/mach-socfpga/board.c | 13

[PATCH v1 1/5] arm: socfpga: agilex5: Add MMU mapping region

From: Tingting Meng MMU mapping regions were added for the second and third DDR memory banks. Signed-off-by: Tingting Meng --- arch/arm/mach-socfpga/mmu-arm64_s10.c | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/mach-socfpga/mmu-arm64_s10.c b/arch/arm/mach

[PATCH v1 0/5] Agilex5 DDR Driver Enhancement

From: Tingting Meng This patch series enhances the U-Boot DDR driver for Agilex 5 with improvements in memory handling, cache control, and ECC support. The updates include: 1. MMU mapping regions were added for the second and third DDR memory banks. 2. LMB_ARCH_MEM_MAP

[Agilex7 M-series Platform Enablement v1 16/16] configs: Add defconfig for Agilex7 M-series

From: Wan Yee Lau Add defconfig for Agilex7 M-series. Signed-off-by: Wan Yee Lau Signed-off-by: Teik Heng Chong Signed-off-by: Tingting Meng --- ...onfig => socfpga_agilex7m_sdmmc_defconfig} | 110 +- 1 file changed, 54 insertions(+), 56 deletions(-) copy conf

[Agilex7 M-series Platform Enablement v1 15/16] arch: arm: dts: Update Makefile for new platform Agilex7 M-series

From: Wan Yee Lau Update Makefile to support Agilex7 M-series platform enablement. Signed-off-by: Wan Yee Lau Signed-off-by: Teik Heng Chong Signed-off-by: Tingting Meng --- arch/arm/dts/Makefile | 1 + arch/arm/mach-socfpga/Makefile | 18 ++ board/intel

[Agilex7 M-series Platform Enablement v1 14/16] arch: arm: mach-socfpga: Update kconfig for new platform Agilex7 M-series

From: Wan Yee Lau Update Kconfig for new platform Agilex7 M-series. Signed-off-by: Wan Yee Lau Signed-off-by: Teik Heng Chong Signed-off-by: Tingting Meng --- arch/arm/Kconfig | 4 +++- arch/arm/mach-socfpga/Kconfig | 19 +++ 2 files changed, 22 insertions

[Agilex7 M-series Platform Enablement v1 13/16] ddr: altera: soc64: Fix dram size calculation in clamshell mode

From: Teik Heng Chong This patch is to fix wrong memory size calculation in clamshell mode Signed-off-by: Teik Heng Chong Signed-off-by: Tingting Meng --- drivers/ddr/altera/sdram_soc64.c | 16 +++- drivers/ddr/altera/sdram_soc64.h | 5 + 2 files changed, 20 insertions(+), 1

[Agilex7 M-series Platform Enablement v1 12/16] ddr: altera: soc64: Clean up bit-shift by zero bit

From: Teik Heng Chong Clean up bit-shift by zero bit Signed-off-by: Teik Heng Chong Signed-off-by: Tingting Meng --- drivers/ddr/altera/sdram_soc64.h | 20 ++-- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/ddr/altera/sdram_soc64.h b/drivers/ddr

[Agilex7 M-series Platform Enablement v1 11/16] ddr: altera: soc64: Restructure SDRAM firewall function

From: Sin Hui Kho Restructure SDRAM firewall function. Move the non-F2SDRAM firewall configuration to an individual function, in preparation to support F2SDRAM firewall configuration. Signed-off-by: Sin Hui Kho Signed-off-by: Tingting Meng --- drivers/ddr/altera/sdram_soc64.c | 11

[Agilex7 M-series Platform Enablement v1 10/16] ddr: altera: Add DDR driver for Agilex7 M-series

-off-by: Wan Yee Lau Signed-off-by: Teik Heng Chong Signed-off-by: Tingting Meng --- .../include/mach/base_addr_soc64.h| 6 +- .../include/mach/system_manager_soc64.h | 7 +- drivers/ddr/altera/Makefile | 3 +- drivers/ddr/altera/sdram_agilex7m.c

[Agilex7 M-series Platform Enablement v1 09/16] ddr: altera: Add uibssm mailbox for Agilex7 M-series

the list of supported mailbox command type and opcode. Signed-off-by: Teik Heng Chong Signed-off-by: Tingting Meng --- drivers/ddr/altera/uibssm_mailbox.c | 311 drivers/ddr/altera/uibssm_mailbox.h | 117 +++ 2 files changed, 428 insertions(+) create mode

[Agilex7 M-series Platform Enablement v1 08/16] ddr: altera: Add iossm mailbox for Agilex7 M-series

the list of supported mailbox command type and opcode. Signed-off-by: Wan Yee Lau Signed-off-by: Teik Heng Chong Signed-off-by: Tingting Meng --- drivers/ddr/altera/iossm_mailbox.c | 637 + drivers/ddr/altera/iossm_mailbox.h | 182 + 2 files changed, 819

[Agilex7 M-series Platform Enablement v1 07/16] clk: altera: Add clock support for Agilex7 M-series

From: Teik Heng Chong Agilex7 M-series reuse the clock driver from Agilex. Signed-off-by: Wan Yee Lau Signed-off-by: Teik Heng Chong Signed-off-by: Tingting Meng --- arch/arm/mach-socfpga/include/mach/clock_manager.h | 2 +- arch/arm/mach-socfpga/misc.c | 2 +- drivers

[Agilex7 M-series Platform Enablement v1 06/16] include: configs: soc64: Use CONFIG_SPL_ATF to differentiate bootfile

roper. Signed-off-by: Siew Chin Lim Signed-off-by: Teik Heng Chong Signed-off-by: Tingting Meng --- arch/arm/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a0842e1933..56e190adf6 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig

[Agilex7 M-series Platform Enablement v1 05/16] include: configs: Add config header file for Agilex7 M-series

From: Wan Yee Lau Add config header file for new platform Agilex7 M-series. Signed-off-by: Wan Yee Lau Signed-off-by: Teik Heng Chong Signed-off-by: Tingting Meng --- .../{socfpga_agilex5_socdk.h => socfpga_agilex7m_socdk.h} | 6 +++--- 1 file changed, 3 insertions(+), 3 deleti

[Agilex7 M-series Platform Enablement v1 04/16] arch: arm: mach-socfpga: Update handoff settings for Agilex7 M-series

From: Wan Yee Lau Handoff settings updated for new platform Agilex7 M-series. Signed-off-by: Wan Yee Lau Signed-off-by: Teik Heng Chong Signed-off-by: Tingting Meng --- arch/arm/mach-socfpga/include/mach/handoff_soc64.h | 14 -- 1 file changed, 12 insertions(+), 2 deletions

[Agilex7 M-series Platform Enablement v1 03/16] arch: arm: mach-socfpga: Improve help info.

From: Teik Heng Chong To improve help info for bridge enable/disable command. Signed-off-by: Wan Yee Lau Signed-off-by: Teik Heng Chong Signed-off-by: Tingting Meng --- arch/arm/mach-socfpga/misc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-socfpga

[Agilex7 M-series Platform Enablement v1 02/16] arch: arm: mach-socfpga: Add Agilex7 M-series mach-socfgpa enablement

From: Wan Yee Lau Add platform related files for new platform Agilex7 M-series. Signed-off-by: Wan Yee Lau Signed-off-by: Teik Heng Chong Signed-off-by: Tingting Meng --- arch/arm/mach-socfpga/include/mach/misc.h | 3 +- .../{spl_agilex.c => spl_agilex7m.c} |

[Agilex7 M-series Platform Enablement v1 01/16] arch: arm: dts: Add dts and dtsi for new platform Agilex7 M-series

From: Wan Yee Lau Add Agilex7 M-series dtsi and dts for new platform Agilex7 M-series. Signed-off-by: Wan Yee Lau Signed-off-by: Teik Heng Chong Signed-off-by: Tingting Meng --- ...tsi => socfpga_agilex7m_socdk-u-boot.dtsi} | 37 - ...x_socdk.dts => socfpga_agilex7m_socdk.dts}

[Agilex7 M-series Platform Enablement v1 00/16]

From: Tingting Meng Intel Agilex7 M-Series is the highest peformance FPGA targeted for compute and memory-intensive application,this series is built using intel 7 process technology and expands upon I-Series device feature, offering in-package high bandwidth memory (HBM), memory interfaces for