On 01/30/2018 09:07 PM, Sumit Garg wrote:
>> -Original Message-
>> From: York Sun
>> Sent: Tuesday, January 30, 2018 2:57 AM
>> To: Sumit Garg <sumit.g...@nxp.com>; u-boot@lists.denx.de
>> Cc: Ruchika Gupta <ruchika.gu...@nxp.com>; Prabhakar Kush
On 01/30/2018 02:29 AM, Sriram Dash wrote:
> Remove dependency of SYS_HAS_SERDES for Layerscape Chasis 3/2.
>
> Signed-off-by: Sriram Dash
> ---
> Changes in v3:
> - Rebase to latest code.
> - Include changes for LSCH2.
>
> Changes in v2:
> - Remove ifdef when
On 02/02/2018 04:07 AM, Rajat Srivastava wrote:
> Currently in LS1088A, XIP mode in QSPI works up to 16 MB
> addresses. This patch enables QSPI support in XIP mode for
> addresses above 16 MB as well.
>
> Signed-off-by: Rajat Srivastava
> ---
Applied to fsl-qoriq
On 02/04/2018 09:47 PM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang
>
> Enable PCIe and E1000 in ls1046aqds lpuart defconfig.
>
> Signed-off-by: Hou Zhiqiang
> ---
Applied to fsl-qoriq master, awaiting upstream. Thanks
York
handles
Rajat Srivastava (1):
armv8: ls1088a: qspi: Enable XIP mode above 16 MB addresses
Sriram Dash (1):
armv8: Remove dependency of SERDES for LSCH2 and LSCH3
Vinitha Pillai-B57223 (1):
armv8: ls1012ardb: Add distro secure boot support
York Sun (1):
drivers/ddr/fsl
On 02/09/2018 12:23 PM, Goldschmidt Simon wrote:
> With multiple environments, the 'get_char' callback for env
> drivers does not really make sense any more because it is
> only supported by two drivers (eeprom and nvram).
>
> To restore single character loading for these drivers,
> override
On 02/08/2018 02:05 AM, Simon Goldschmidt wrote:
> On 08.02.2018 09:38, Maxime Ripard wrote:
>> Hi,
>>
>> Thanks for your patch
>>
>> On Wed, Feb 07, 2018 at 02:17:11PM -0800, York Sun wrote:
>>> Commit 7d714a24d725 ("env: Support multiple environment
On 02/04/2018 05:40 AM, Simon Glass wrote:
> Hi York,
>
> On 24 January 2018 at 12:04, York Sun <york@nxp.com> wrote:
>> For DDR4, command/address delay in mode registers and parity latency
>> in timing config register are only needed for UDIMMs, but not RDIMMs.
Commit 8a3a7e2270b3 ("env: Pass additional parameters to the env
lookup function") dropped the default action if driver doesn't have
get_char() defined. This causes failure to get environmental
variables from NOR flash. Add back this default action for now.
Signed-off-by: York
ble wasn't writable. This causes failure when
saving the environment. To save this location, global data must be
used instead.
Signed-off-by: York Sun <york@nxp.com>
CC: Maxime Ripard <maxime.rip...@free-electrons.com>
---
Limited test on LS1043ARDB.
env/env.c | 8
On 02/07/2018 12:45 PM, Goldschmidt Simon wrote:
> On 02/07/2018 21:18, York Sun wrote:
>> On 02/07/2018 12:43 AM, Maxime Ripard wrote:
>>> Hi,
>>>
>>> On Tue, Jan 30, 2018 at 11:02:49PM +, York Sun wrote:
>>>> On 01/30/2018 12:16 PM, York S
On 02/07/2018 12:43 AM, Maxime Ripard wrote:
> Hi,
>
> On Tue, Jan 30, 2018 at 11:02:49PM +0000, York Sun wrote:
>> On 01/30/2018 12:16 PM, York Sun wrote:
>>> On 01/30/2018 11:40 AM, York Sun wrote:
>>>> On 01/30/2018 12:19 AM, Simon Goldschmidt wrote:
>
To make this driver easier to be reused, dual-license DDR driver.
Signed-off-by: York Sun <york@nxp.com>
CC: Simon Glass <s...@chromium.org>
CC: Tom Rini <tr...@konsulko.com>
CC: Heinrich Schuchardt <xypron.g...@gmx.de>
CC: Thomas Schaefer <thomas.schae...@kontr
On 02/06/2018 02:59 AM, Rajat Srivastava wrote:
>
>
>> How do you put the image into it to begin with? Don't tell me you were using
>> an
>> external tool or a hacked version of older U-Boot.
>>
> This patch enables data read above 16MB using AHB (on Uboot prompt) and does
> not involve our
On 02/04/2018 09:37 PM, Rajat Srivastava wrote:
>
>
>> -Original Message-----
>> From: York Sun
>> Sent: Friday, February 02, 2018 9:29 PM
>> To: Rajat Srivastava <rajat.srivast...@nxp.com>; u-boot@lists.denx.de
>> Subject: Re: [PATCH] ls1088a: q
On 02/05/2018 05:44 AM, Maxime Ripard wrote:
> Hi York,
>
> On Fri, Feb 02, 2018 at 08:04:12PM +0000, York Sun wrote:
>> On 02/02/2018 10:51 AM, Maxime Ripard wrote:
>>>>> This patch looks correct. But it doesn't fix NOR flash. Do you have plan
>>>>&g
On 02/02/2018 10:51 AM, Maxime Ripard wrote:
>>> Simon,
>>>
>>> This patch looks correct. But it doesn't fix NOR flash. Do you have plan
>>> to add .get_char function to other drivers? Without that function, we
>>> cannot get env variables before relocation.
>>
>> Ehrm, sorry I don't plan
On 02/02/2018 04:07 AM, Rajat Srivastava wrote:
> Currently in LS1088A, XIP mode in QSPI works up to 16 MB
> addresses. This patch enables QSPI support in XIP mode for
> addresses above 16 MB as well.
Can you write to QSPI above 16MB address?
York
___
fdt fixup for lazyapply dpl
York Sun (8):
drivers/ddr/fsl: Fix DDR4 RDIMM support
drivers/ddr/fsl: Fix workaround for A009803
drivers/ddr/fsl: Add 3DS RDIMM support
drivers/ddr/fsl: Add calculation of register control words
drivers/ddr/fsl: Modify binding registers
On 01/30/2018 10:57 PM, Simon Goldschmidt wrote:
> env_get_f calls env_get_char to load single characters from the
> environment. However, the return value of env_get_char was not
> checked for errors. Now if the env driver does not support the
> .get_char call, env_get_f did not notice this and
On 01/30/2018 12:16 PM, York Sun wrote:
> On 01/30/2018 11:40 AM, York Sun wrote:
>> On 01/30/2018 12:19 AM, Simon Goldschmidt wrote:
>>> On 23.01.2018 21:16, Maxime Ripard wrote:
>>>> Now that we have everything in place to support multiple environment, let's
>&
On 01/30/2018 11:40 AM, York Sun wrote:
> On 01/30/2018 12:19 AM, Simon Goldschmidt wrote:
>> On 23.01.2018 21:16, Maxime Ripard wrote:
>>> Now that we have everything in place to support multiple environment, let's
>>> make sure the current code can use it.
>&g
On 01/30/2018 12:19 AM, Simon Goldschmidt wrote:
> On 23.01.2018 21:16, Maxime Ripard wrote:
>> Now that we have everything in place to support multiple environment, let's
>> make sure the current code can use it.
>>
>> The priority used between the various environment is the same one that was
>>
Ashish,
Please use proper quotation ">" when you reply.
On 01/30/2018 06:24 AM, Ashish Kumar wrote:
>
>
> -Original Message-
> From: York Sun
> Sent: Tuesday, January 30, 2018 2:54 AM
> To: Ashish Kumar <ashish.ku...@nxp.com>; u-boot@lists
On 01/15/2018 09:34 AM, Sumit Garg wrote:
>> From: York Sun
>> Sent: Monday, January 15, 2018 10:59 PM
>>
>> On 01/08/2018 09:59 PM, Sumit Garg wrote:
>>> From: Vinitha Pillai-B57223 <vinitha.pil...@nxp.com>
>>>
>>> Enable valid
On 01/01/2018 09:24 PM, Ashish Kumar wrote:
> IFC-NOR and QSPI-NOR pins are muxed on SoC,so they
> cannot be accessed simultaneously, but
> IFC-NOR can be accessed along with SD-BOOT.
>
> ls1088aqds_sdcard_ifc_defconfig: is defconfig for
> SD as boot source and IFC-NOR to be used as flash,
> this
DDR4 RDIMM has some information in SPD to be used to calculate the
control words for register chip. The rest can be found from JEDEC
spec DDR4RCD02.
Signed-off-by: York Sun <york@nxp.com>
---
Changes in v5:
Fix compiling warning for unused variable.
Changes in v4:
New patch to a
This adds 2Rx8 RDIMM on LS1046ARDB board. Tested with RDIMM
MTA18ASF2G72PDZ and MTA9ASF1G72PZ.
Signed-off-by: York Sun <york@nxp.com>
---
Changes in v4:
Adjust write leveling start to align with timing_cfg_7[PAR_LAT].
Add single rank RDIMM.
Remove RCW override in board file.
Modi
Variable "row_density" is no longer used. Drop it from DIMM structure.
Signed-off-by: York Sun <york@nxp.com>
---
Changes in v4:
New patch to cleanup unused variables.
Changes in v3: None
Changes in v2: None
drivers/ddr/fsl/ddr1_dimm_params.c | 1 -
drivers/ddr/fsl/ddr2_d
to half and restore it after data initialization.
Three-way interleaving is no longer used and is removed.
Signed-off-by: York Sun <york@nxp.com>
---
Changes in v4:
New patch to reduce data init time by half.
Changes in v3: None
Changes in v2: None
drivers/ddr/fsl/fsl_ddr_gen4.
DDR4 RDIMM has some information in SPD to be used to calculate the
control words for register chip. The rest can be found from JEDEC
spec DDR4RCD02.
Signed-off-by: York Sun <york@nxp.com>
---
Changes in v4:
New patch to add RCW calculation.
Changes in v3: None
Changes in v2: None
d
On top of RDIMM support, add new register calculation to support
3DS RDIMMs. Only symmetrical 3DS is supported at this time.
Signed-off-by: York Sun <york@nxp.com>
---
Changes in v4:
New patch to add 3DS support.
Changes in v3: None
Changes in v2: None
drivers/ddr/fsl/ctrl_
Wrong field was masked in this workaround due to wrong endianness. The
impacted SoCs have big-endian.
Signed-off-by: York Sun <york@nxp.com>
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
drivers/ddr/fsl/fsl_ddr_gen4.c | 2 +-
1 file changed, 1 insertion(+), 1 de
registers. Use hexadecimal format for
printing RCW (register control word) registers.
Signed-off-by: York Sun <york@nxp.com>
---
Changes in v4:
Fix calculation of timing_cfg_7 using rcw_2
Fix calculation of timing_cfg_8
Changes in v3: None
Changes in v2: None
drivers/ddr/fsl/ctrl_
On 01/16/2018 10:45 PM, Ashish Kumar wrote:
> Signed-off-by: Ashish Kumar
> ---
Modified subject and add commit message.
Applied to fsl-qoriq master. Thanks.
York
___
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On 01/16/2018 10:45 PM, Ashish Kumar wrote:
> Previously only SD, NAND etc were secondary boot source and had
> IFC-NOR as primary booting target. But for SoC like LS1088
> IFC-NOR can be secondary boot source, while QSPI-NOR is primary
> booting target, So add options in qixis to switch to other
On 01/17/2018 04:02 AM, Breno Lima wrote:
> The hash command function were not flushing the dcache before passing data
> to CAAM/DMA and not invalidating the dcache when getting data back.
>
> Due the data cache incoherency, HW accelerated hash commands used to fail
> with CAAM errors like
ale (now NXP) SoCs and boards under GPLv2+/X11 dual license.
>
> Same trend is followed in linux.
>
> Cc: Priyanka Jain <priyanka.j...@nxp.com>
> Cc: Mingkai Hu <mingkai...@nxp.com>
> Cc: York Sun <york@nxp.com>
> Signed-off-by: Pankaj Bansal <pankaj.ban...
On 01/17/2018 02:42 AM, Rajesh Bhagat wrote:
> Adds SERDES voltage and reset SERDES lanes API and makes
> enable/disable DDR controller support 0.9V API common.
>
> Signed-off-by: Ashish Kumar
> Signed-off-by: Rajesh Bhagat
> ---
> Changes in v8:
>
This adds 2Rx8 RDIMM on LS1046ARDB board. Tested with address
parity enabled and disabled with RDIMM MTA18ASF2G72PDZ.
Signed-off-by: York Sun <york@nxp.com>
---
Changes in v3:
Update register control words for different speeds.
Changes in v2:
Update timing table for lower speeds
Wrong field was masked in this workaround due to wrong endianness. The
impacted SoCs have big-endian.
Signed-off-by: York Sun <york@nxp.com>
---
Changes in v3: None
Changes in v2: None
drivers/ddr/fsl/fsl_ddr_gen4.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
for printing RCW (register control word) registers.
Signed-off-by: York Sun <york@nxp.com>
---
Changes in v3: None
Changes in v2: None
drivers/ddr/fsl/ctrl_regs.c| 32 +---
drivers/ddr/fsl/ddr4_dimm_params.c | 2 ++
drivers/ddr/fsl/interactive.c
Tom,
The following changes since commit 485c13c7536731991c59f7b3432bc33c9dafb0f0:
Merge git://git.denx.de/u-boot-dm (2018-01-21 20:13:29 -0500)
are available in the git repository at:
git://git.denx.de/u-boot-fsl-qoriq.git
6c8945ec41cb7bff27fbacc88316e3e557c20240
for you to fetch changes
On 01/18/2018 06:45 AM, Pankaj Bansal wrote:
>>
>> OK, good. But there's
>> http://www.denx.de/wiki/view/U-
>> Boot/Patches#Attributing_Code_Copyrights_Sign
>> and you need to say what kernel you're syncing this file against (since there
>> shouldn't be anything U-Boot specific in any of these
On 12/14/2017 04:06 AM, Ashish Kumar wrote:
> Signed-off-by: Ashish Kumar
> ---
Applied to fsl-qoriq master. Thanks.
York
___
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On 12/14/2017 04:06 AM, Ashish Kumar wrote:
> ENV variables can now be used before relocation.
>
> Signed-off-by: Ashish Kumar
> ---
> v2:
> replace & with && in #if
>
> Tested on ls1088ardb.
> Tested on ls1012hexa after defining CONFIG_ENV_ADDR
>
Applied to fsl-qoriq
On 01/01/2018 09:24 PM, Ashish Kumar wrote:
> Signed-off-by: Ashish Kumar
> ---
Applied to fsl-qoriq master. Thanks.
York
___
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On 01/03/2018 12:12 AM, Yuantian Tang wrote:
> Sata is equipped on ls1012a and can be a boot source.
> Add sata boot support as a option if available.
>
> Signed-off-by: Tang Yuantian
> ---
Minor change to commit message.
Applied to fsl-qoriq master. Thanks.
York
On 01/03/2018 12:12 AM, Yuantian Tang wrote:
> Sata is equipped on ls1046a and can be a boot source.
> Add sata boot support as a option if available.
>
> Signed-off-by: Tang Yuantian
> ---
Minor change to commit message.
Applied to fsl-qoriq master. Thanks.
York
On 01/03/2018 05:58 AM, Tom Rini wrote:
> Both the "qixis_reset" and esbc_validate" commands can only be used in
> full U-Boot so do not build them in SPL. As part of this rework the
> qixis code to declare things as static and make use of __weak for
> function alias
gt;
> Cc: Alison Wang <alison.w...@freescale.com>
> Cc: Sumit Garg <sumit.g...@nxp.com>
> Cc: York Sun <york@nxp.com>
> Signed-off-by: Tom Rini <tr...@konsulko.com>
> ---
Minor change to commit message.
Applied to fsl-qoriq master. Thanks.
York
_
On 01/03/2018 06:13 AM, Tom Rini wrote:
> Add a CONFIG_SPL_BUILD guard around the code for the "mux" command so it
> is not included in SPL.
>
> Cc: Qiang Zhao <qiang.z...@nxp.com>
> Cc: York Sun <york@nxp.com>
> Signed-off-by: Tom Rini <tr...@konsu
On 01/07/2018 10:51 PM, Priyanka Jain wrote:
> QMAP value contains information about QSPI chip-selects.
> These bits are used to display information of boot device
> in checkboard() function.
>
> QMAP value is stored in most significant 3-bits
> of 8-bit register brdcfg[0] in Qixis, this patch
>
On 01/07/2018 11:29 PM, Priyanka Jain wrote:
> Remove Board Arch print as its value is always
> constant '1' and does not contain any important
> information to display during boot
>
> Add print to display Board FPGA version.
>
> Signed-off-by: Priyanka Jain
> ---
On 01/08/2018 12:23 AM, Sumit Garg wrote:
> As part of chain of trust with confidentiality along with distro
> boot, linux kernel image needs to be stored in encrypted form on
> ext4 boot partition. So enable CONFIG_CMD_EXT4_WRITE in case of
> Secure boot on ARM based platforms.
>
>
On 01/09/2018 12:45 AM, ying.zhang22...@nxp.com wrote:
> From: Zhang Ying-22455
>
> The SP805-WDT module on LS1088A requires configuration of PMU's
> PCTBENR register to enable watchdog counter decrement and reset
> signal generation. The watchdog clock needs to be
On 01/09/2018 10:27 PM, Sriram Dash wrote:
> Identify and distinguish between platform device type of MX7ULP
> and LS1021A.
>
> This is a fix to: 7edf5c45 serial: lpuart: add i.MX7ULP support
>
> Signed-off-by: Sriram Dash
> Acked-by: Peng Fan
> ---
On 01/11/2018 11:24 AM, Bhaskar Upadhaya wrote:
> LS1012A-2G5RDB belongs to LS1012A family with features
> 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi
> DDR, eMMC, QuadSPI, UART
>
> Signed-off-by: Bhaskar Upadhaya
> ---
> changes for v2:
> - LS1012A-2G5RDB patches
On 01/11/2018 11:23 AM, Bhaskar Upadhaya wrote:
> Align boards belonging to LS1012A, LS2080A SoC at
> one place
>
> Signed-off-by: Bhaskar Upadhaya
> ---
Applied to fsl-qoriq master. Thanks.
York
___
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On 01/18/2018 11:17 AM, Tom Rini wrote:
> On Thu, Jan 18, 2018 at 06:14:07PM +0000, York Sun wrote:
>> On 01/18/2018 10:11 AM, Tom Rini wrote:
>>> On Thu, Jan 18, 2018 at 06:09:22PM +, York Sun wrote:
>>>> On 01/18/2018 10:04 AM, Tom Rini wrote:
>>>
Mingkai and Suresh,
Please look into LS1046ARDB QSPI boot. The environmental variables fail
to load. It always reports "Warning - bad CRC, using default environment".
York
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On 01/18/2018 10:11 AM, Tom Rini wrote:
> On Thu, Jan 18, 2018 at 06:09:22PM +0000, York Sun wrote:
>> On 01/18/2018 10:04 AM, Tom Rini wrote:
>>>>>
>>>>> With regards to dts files, this is another reason I would like to see
>>>>> that done as
On 01/18/2018 10:04 AM, Tom Rini wrote:
>>>
>>> With regards to dts files, this is another reason I would like to see
>>> that done as a strict re-sync with Linux rather than a stand-alone
>>> change. Saying we're importing file X from the kernel at revision Y
>>> makes the license change pretty
On 01/18/2018 09:59 AM, Tom Rini wrote:
> On Thu, Jan 18, 2018 at 05:25:01PM +0000, York Sun wrote:
>
>> Tom and Wolfgang,
>>
>> Do we have guideline on dual licensing the code in U-Boot? If I collect
>> consent from all contributors and copyright holders to a parti
Tom and Wolfgang,
Do we have guideline on dual licensing the code in U-Boot? If I collect
consent from all contributors and copyright holders to a particular
file, am I able to re-license the file? If yes, how to determine the
list of contributors?
York
Tom,
The following changes since commit 3dde8f20377c3a051dda64497bdf0cdb23e03a2d:
Merge git://git.denx.de/u-boot-mmc (2018-01-14 22:26:38 -0500)
are available in the git repository at:
git://git.denx.de/u-boot-fsl-qoriq.git
for you to fetch changes up to
On 01/15/2018 08:38 PM, Yogesh Gaur wrote:
> For for case of lazyapply method, API fdt_fixup_board_enet() gets invoked
> before DPL being deployed.
> This leads to an issue that fsl-mc fdt fixup status marked as fail and
> dprc driver didn't get registered in linux boot.
>
> Fixes this issue by
On 12/14/2017 04:06 AM, Ashish Kumar wrote:
> Signed-off-by: Ashish Kumar
> ---
> include/configs/ls1088a_common.h | 6 ++
> include/configs/ls1088aqds.h | 1 -
> include/configs/ls1088ardb.h | 2 +-
> 3 files changed, 7 insertions(+), 2 deletions(-)
>
> diff
On 01/08/2018 10:03 PM, Vinitha Pillai-B57223 wrote:
> From: Vinitha V Pillai
>
> Signed-off-by: Vinitha V Pillai
> ---
> include/configs/ls2080ardb.h | 14 +++---
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git
On 01/08/2018 09:59 PM, Sumit Garg wrote:
> From: Vinitha Pillai-B57223
>
> Enable validation of boot.scr script prior to its execution dependent
> on "secureboot" flag in environment. Enable fall back option to
> qspi boot in case of secure boot.
>
> Signed-off-by:
On 01/10/2018 01:15 AM, Sriram Dash wrote:
> Remove dependency of SYS_HAS_SERDES for Layerscape Chasis 3.
>
> Signed-off-by: Sriram Dash
> ---
> Changes in v2:
> - Remove ifdef when including fsl_serdes.h
>
> arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 6 --
> 1 file
On 01/11/2018 09:19 PM, Yogesh Gaur wrote:
> For for case of lazyapply method, API fdt_fixup_board_enet() gets invoked
> before DPL being deployed.
> This leads to an issue that fsl-mc fdt fixup status marked as fail and
> dprc driver didn't get registered in linux boot.
>
> Fixes this issue by
On 01/15/2018 09:09 AM, Sumit Garg wrote:
>> From: York Sun
>> Sent: Monday, January 15, 2018 10:16 PM
>>
>> On 01/14/2018 08:55 PM, Sumit Garg wrote:
>>> Enable support for multiple loadable images in SEC firmware FIT image.
>>>
>>> Signed-off-by
On 01/14/2018 08:55 PM, Sumit Garg wrote:
> Enable support for multiple loadable images in SEC firmware FIT image.
>
> Signed-off-by: Sumit Garg
> ---
> arch/arm/cpu/armv8/sec_firmware.c | 51
> +++
> 1 file changed, 41 insertions(+), 10
On 01/12/2018 01:12 AM, Michal Simek wrote:
> On 11.1.2018 20:36, York Sun wrote:
>> On 12/27/2017 09:20 PM, Alison Wang wrote:
>>> 855873: An eviction might overtake a cache clean operation
>>> Workaround: The erratum can be avoided by upgrading cache clean by
>
On 12/15/2017 01:01 PM, Ahmed Mansour wrote:
> The CONFIG_SYS_DPAA_QBMAN define is used by DPAA1 freescale SOCs to
> add device tree fixups that allow deep sleep in Linux. The define was
> placed in header files included by a number of boards, but was not
> explicitly documented in any of the
On 12/15/2017 01:01 PM, Ahmed Mansour wrote:
> This patch adds changes necessary to move functionality present in
> PowerPC folders with ARM architectures that have DPAA1 QBMan hardware
>
> - Create new board/freescale/common/fsl_portals.c to house shared
> device tree fixups for DPAA1 devices
On 01/05/2018 08:00 AM, Sumit Garg wrote:
> Signed-off-by: Udit Agarwal
> Signed-off-by: Sumit Garg
> ---
>
> Changes in v2:
> Rebased to top of master
Dropped CONFIG_ENV_IS_IN_MMC=y from defconfig file.
Applied to fsl-qoriq master. Thanks.
York
On 01/05/2018 08:00 AM, Sumit Garg wrote:
> Using changes in this patch we were able to reduce approx 8k
> size of u-boot-spl.bin image. Following is breif description of
> changes to reduce SPL size:
> 1. Changes in board/freescale/ls1088a/Makefile to remove
>compilation of eth.c and cpld.c
On 01/05/2018 08:00 AM, Sumit Garg wrote:
> Compile-off mp.c and libfdt.c in case of SPL build. SPL size reduces
> by approx 2k.
>
> Signed-off-by: Sumit Garg
> ---
>
> Changes in v2:
> Removed code specific to D-Cache off. With GCC 6.2 tool-chain, able
> to reduce size to
On 12/18/2017 06:52 PM, Bao Xiaowei wrote:
> Remove duplicate macro CONFIG_FSL_PCIE_RESET and update its comment.
> It enables PCIe reset to fix link width 2x - 4x.
>
> Signed-off-by: Bao Xiaowei
> ---
Applied to fsl-qoriq master. Thanks.
York
On 12/27/2017 09:20 PM, Alison Wang wrote:
> 855873: An eviction might overtake a cache clean operation
> Workaround: The erratum can be avoided by upgrading cache clean by
> address operations to cache clean and invalidate operations. For
> Cortex-A53 r0p3 and later release, this can be achieved
On 12/10/2017 09:31 PM, Yuantian Tang wrote:
> Sata registers PP2C and PP3C are used to control the configuration
> of the PHY control OOB timing for the COMINIT/COMWAKE parameters
> respectively.
> Calculate those parameters from port clock frequency. Overwrite those
> registers with calculated
On 12/07/2017 09:39 PM, Ashish Kumar wrote:
> Signed-off-by: Ashish Kumar
> ---
Applied to fsl-qoriq master. Thanks.
York
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On 01/11/2018 01:26 AM, Ashish Kumar wrote:
>
>
>> -Original Message-----
>> From: York Sun
>> Sent: Monday, January 08, 2018 11:11 PM
>> To: Ashish Kumar <ashish.ku...@nxp.com>; u-boot@lists.denx.de
>> Subject: Re: [PATCH] armv8: ls1088aqds
On 01/11/2018 01:30 AM, Ashish Kumar wrote:
>
>
>> -Original Message-----
>> From: York Sun
>> Sent: Monday, January 08, 2018 11:15 PM
>> To: Ashish Kumar <ashish.ku...@nxp.com>; u-boot@lists.denx.de
>> Subject: Re: [PATCH] armv8: ls1088: Add U
Tom,
The following changes since commit f3dd87e0b98999a78e500e8c6d2b063ebadf535a:
Prepare v2018.01 (2018-01-08 20:25:29 -0500)
are available in the git repository at:
git://git.denx.de/u-boot-fsl-qoriq.git
for you to fetch changes up to 1cabeb88ebbae0e5d418333cdd2526b06b397c91:
On 01/05/2018 08:00 AM, Sumit Garg wrote:
> Signed-off-by: Udit Agarwal
> Signed-off-by: Sumit Garg
> ---
>
> Changes in v2:
> Rebased to top of master
>
> arch/arm/include/asm/fsl_secure_boot.h | 16
>
On 12/08/2017 12:26 AM, Bhaskar Upadhaya wrote:
> Previously LS1012A-2G5RDB dts includes fsl-ls1012a-rdb.dtsi which
> further includes fsl-ls1012a.dtsi.Now LS1012A-2G5RDB dts include
> fsl-ls1012a.dtsi.
>
> Signed-off-by: Bhaskar Upadhaya
> ---
As discussed, please
On 01/09/2018 08:15 AM, Bhaskar Upadhaya wrote:
>
>
>> -Original Message-----
>> From: York Sun
>> Sent: Tuesday, January 09, 2018 12:13 AM
>> To: Bhaskar Upadhaya <bhaskar.upadh...@nxp.com>; u-boot@lists.denx.de
>> Subject: Re: [PATCH 3/3] driv
On 01/09/2018 08:12 AM, Bhaskar Upadhaya wrote:
>
>
>> -Original Message-----
>> From: York Sun
>> Sent: Tuesday, January 09, 2018 1:10 AM
>> To: Bhaskar Upadhaya <bhaskar.upadh...@nxp.com>; u-boot@lists.denx.de
>> Subject: Re: [PATCH v3 2/3] board
On 11/29/2017 09:13 PM, Bhaskar Upadhaya wrote:
> LS1012A-2G5RDB belongs to LS1012A family with features
> 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi
> DDR, eMMC, QuadSPI, UART
>
> Signed-off-by: Bhaskar Upadhaya
> ---
> changes for v3:
> 1. remove pfe driver
On 11/29/2017 09:13 PM, Bhaskar Upadhaya wrote:
> PCS initialization sequence for 2.5G SGMII interface governs
> auto negotiation to be in disabled mode
>
> Signed-off-by: Bhaskar Upadhaya
> ---
> Depends on
>
On 12/14/2017 04:06 AM, Ashish Kumar wrote:
> ENV variables can now be used before relocation.
>
> Signed-off-by: Ashish Kumar
> ---
> v2:
> replace & with && in #if
>
> Tested on ls1088ardb.
> Tested on ls1012hexa after defining CONFIG_ENV_ADDR
>
> env/sf.c | 21
On 12/20/2017 12:18 AM, ying.zhang22...@nxp.com wrote:
> From: Zhang Ying-22455
>
> Add support new regular chip: LTC3882.
>
> The origianl VID code didn't properly read the FUSESR on all chips
> and set the voltages on all chips. It didn't properly support the
>
On 01/01/2018 09:24 PM, Ashish Kumar wrote:
> Signed-off-by: Ashish Kumar
> ---
> depends on:
>
On 01/01/2018 09:24 PM, Ashish Kumar wrote:
> IFC-NOR and QSPI-NOR pins are muxed on SoC,so they
> cannot be accessed simultaneously, but
> IFC-NOR can be accessed along with SD-BOOT.
>
> ls1088aqds_sdcard_ifc_defconfig: is defconfig for
> SD as boot source and IFC-NOR to be used as flash,
> this
On 01/05/2018 08:22 AM, Sumit Garg wrote:
>> -Original Message-
>> From: York Sun
>> Sent: Friday, January 05, 2018 9:40 PM
>> To: Sumit Garg <sumit.g...@nxp.com>; u-boot@lists.denx.de
>> Cc: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
On 01/05/2018 08:07 AM, Sumit Garg wrote:
>>
>> Sumit,
>>
>> PPA has been fixed to not claim OCRAM. Please rework your patch.
>>
>> York
>
> York,
>
> I have just sent reworked patches without removing dcache cache code. It's
> been working
> only with toolchain above GCC 6 that reduces SPL
On 01/05/2018 05:02 AM, Clemens Gruber wrote:
>
> York: Should I send a v3 or a fixup patch ontop of v2.
I have reset my git head. Please send v3 patch.
York
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