Re: [U-Boot] [RFC PATCH 0/3] Implement fastboot flash for eMMC
Hi Rob, On Wed, Jun 25, 2014 at 7:16 PM, Steve Rae s...@broadcom.com wrote: Rob, On 14-06-25 06:59 AM, Rob Herring wrote: On Mon, Jun 23, 2014 at 1:37 PM, Steve Rae s...@broadcom.com wrote: Rob Sebastian I would appreciate your comments on this issue; I suspect that you had some ideas regarding the implementation of the fastboot flash and erase commands I agree with Lukasz's and Marek's comments unless there are good reasons not to use it which can't be fixed. Curiously, USB mass storage does not use the DFU backend, but I don't know why. Perhaps there are incompatibilities or converting it is on the todo list. Are your performance concerns measurable or it's just the fact you are adding another layer? The concern is not performance related -- just the amount of (overhead) code required to implement the DFU backend versus calling mmc_dev-block_write() (maybe someone can tell me where to interface into DFU: is it at dfu_write() or ) Yes, I believe it is dfu_write. dfu_write should be used. I'd really like to see the eMMC backend be a generic block device backend. There's no good reason for it to be eMMC/SD specific. As I understand it, the block_write callback function is in the block_dev_desc_t. Isn't this the part of the generic block device interface? Please explain... There are commands for SATA, SCSI (also SATA), eMMC, IDE, etc. They are all pretty much the same set of sub-commands and duplicate the same functionality. Those could all be combined to a single implementation and/or command for block devices. That part is not DFU related, but this problem then proliferates to other areas as it has for DFU. The file drivers/dfu/dfu_mmc.c is mostly generic, but has some eMMC dependencies with find_mmc_device and mmc_switch_part. dfu_mmc.c is intended to handle eMMC/SD card writing. Please note that there are other files - dfu_nand.c and dfu_raw.c, which are responsible for accessing and storing data to other medium. The generic file here is the dfu.c which tries to combine all available media. So read and write are already pretty much generic, but there's still some work to do around device addressing/selection. Rob -- Best regards, Lukasz Majewski Samsung RD Institute Poland (SRPOL) | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH 0/3] Implement fastboot flash for eMMC
Hi Steve, On 14-06-26 06:20 AM, Rob Herring wrote: On Wed, Jun 25, 2014 at 7:16 PM, Steve Rae s...@broadcom.com wrote: Rob, On 14-06-25 06:59 AM, Rob Herring wrote: On Mon, Jun 23, 2014 at 1:37 PM, Steve Rae s...@broadcom.com wrote: Rob Sebastian I would appreciate your comments on this issue; I suspect that you had some ideas regarding the implementation of the fastboot flash and erase commands I agree with Lukasz's and Marek's comments unless there are good reasons not to use it which can't be fixed. Curiously, USB mass storage does not use the DFU backend, but I don't know why. Perhaps there are incompatibilities or converting it is on the todo list. Are your performance concerns measurable or it's just the fact you are adding another layer? The concern is not performance related -- just the amount of (overhead) code required to implement the DFU backend versus calling mmc_dev-block_write() (maybe someone can tell me where to interface into DFU: is it at dfu_write() or ) Yes, I believe it is dfu_write. I'd really like to see the eMMC backend be a generic block device backend. There's no good reason for it to be eMMC/SD specific. As I understand it, the block_write callback function is in the block_dev_desc_t. Isn't this the part of the generic block device interface? Please explain... There are commands for SATA, SCSI (also SATA), eMMC, IDE, etc. They are all pretty much the same set of sub-commands and duplicate the same functionality. Those could all be combined to a single implementation and/or command for block devices. That part is not DFU related, but this problem then proliferates to other areas as it has for DFU. The file drivers/dfu/dfu_mmc.c is mostly generic, but has some eMMC dependencies with find_mmc_device and mmc_switch_part. So read and write are already pretty much generic, but there's still some work to do around device addressing/selection. Rob While I agree in general that to make everything generic is ideal, IMO, I don't think that there is a design or a roadmap to get us there yet I would suggest that any generic interface would also need to support: - handling of multiple HW partitions (0=USER 1-BOOT1 2=BOOT2 etc.) which I already attempted to implement (and abandoned): http://lists.denx.de/pipermail/u-boot/2014-May/180468.html As fair as I remember there are available methods to switch HW partitions (like mmc_access_part()). - handling of partition names for EFI Partitions, this did get accepted: http://lists.denx.de/pipermail/u-boot/2014-May/180292.html So now I would propose two phases: (1) short term - get fastboot flash working (and erase, and oem format, etc.) Would the short term solution allow writing fastboot only to eMMC or other media are going to be supported? I have code that works for eMMC device (and potentially for NAMD...) (2) longer term - define the generic block device (probably enhance block_dev_desc_t ?!?!?) and move the short term solution into this new design. I will submit a v2 to see if it will get accepted as part of the short term solution. I will do my best to review your patches. -- Best regards, Lukasz Majewski Samsung RD Institute Poland (SRPOL) | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mmc: sdhci: Fixed timeout for sdhci_send_command()
Hi Eli,
On Jun 12, 2014, at 12:41 PM, Eli Billauer wrote:
The current wait loop just reads the status 1 times, which makes the
actual timeout period platform-dependent. The udelay() call within the loop
makes the new timeout ~100 ms.
Signed-off-by: Eli Billauer eli.billa...@gmail.com
---
drivers/mmc/sdhci.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 3125d13..80f3a91 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -226,6 +226,7 @@ int sdhci_send_command(struct mmc *mmc, struct mmc_cmd
*cmd,
break;
if (--retry == 0)
break;
+ udelay(10);
} while ((stat mask) != mask);
if (retry == 0) {
--
1.7.2.3
Looking at the linux sources is no good, cause linux is interrupt driven.
This delay is used because the driver is not interrupt driven, so you have
to wait until the interrupt indication is delivered.
The only reference to interrupt latency I found is related to tuning and is
set to 50ms which I supposed is very pessimistic.
I think a timeout of 100ms would be fine.
Regards
-- Pantelis
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Re: [U-Boot] [PATCH v3 06/11] arm:reset: call the reset_misc() before the cpu reset
Dear Przemyslaw Marczak,
On 26/06/14 23:15, Przemyslaw Marczak wrote:
On an Odroid U3 board, the SOC is unable to reset the eMMC card
in the DWMMC mode by the cpu software reset. Manual reset of the card
by switching proper gpio pin - fixes this issue.
Such solution needs to add a call to pre reset function.
This is done by the reset_misc() function, which is called before reset_cpu().
The function reset_misc() is a weak function.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
Cc: Albert ARIBAUD albert.u.b...@aribaud.net
Cc: Tom Rini tr...@ti.com
---
arch/arm/lib/reset.c | 7 +++
include/common.h | 1 +
2 files changed, 8 insertions(+)
diff --git a/arch/arm/lib/reset.c b/arch/arm/lib/reset.c
index 7a03580..3b39466 100644
--- a/arch/arm/lib/reset.c
+++ b/arch/arm/lib/reset.c
@@ -23,6 +23,11 @@
#include common.h
+void __reset_misc(void) {}
+
+void reset_misc(void)
+ __attribute((weak, alias(__reset_misc)));
+
int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
puts (resetting ...\n);
@@ -30,6 +35,8 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
udelay (5); /* wait 50 ms */
disable_interrupts();
+
+ reset_misc();
reset_cpu(0);
/*NOTREACHED*/
diff --git a/include/common.h b/include/common.h
index 232136c..04bab78 100644
--- a/include/common.h
+++ b/include/common.h
@@ -629,6 +629,7 @@ int checkicache (void);
int checkdcache (void);
void upmconfig (unsigned int, unsigned int *, unsigned int);
ulongget_tbclk (void);
+void reset_misc(void);
void reset_cpu (ulong addr);
#if defined (CONFIG_OF_LIBFDT) defined (CONFIG_OF_BOARD_SETUP)
void ft_cpu_setup(void *blob, bd_t *bd);
I'm not sure that we really need to add this function to arm common.
We can do this in reset_cpu (arch/arm/cpu/armv7/exynos/soc.c).
But if other SoCs also need to add such things then, it can be added as arm
common.
Thanks,
Minkyu Kang.
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Re: [U-Boot] [PATCH v3 02/11] board:samsung: add function boot_device() for checking boot medium
Dear Przemyslaw Marczak,
On 26/06/14 23:15, Przemyslaw Marczak wrote:
It is possible to boot from a few media devices, especially
using a micro SD or eMMC slots. In this situation depends on
a boot device - some setup can be changeg.
This change adds function:
boot_device() - which returns an OM[1:5] bits value
This allows checking if boot device is SD(0x2).
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
Changes v3:
- new commit after separate one into two
---
board/samsung/common/board.c | 10 +-
include/samsung/misc.h | 7 +++
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index 9dc7c83..ecf3f76 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -41,6 +41,13 @@ int __exynos_power_init(void)
int exynos_power_init(void)
__attribute__((weak, alias(__exynos_power_init)));
+unsigned int boot_device(void)
+{
+ unsigned int om_stat = samsung_get_base_power();
+
+ return BOOT_DEVICE(readl(om_stat));
+}
+
#if defined CONFIG_EXYNOS_TMU
/* Boot Time Thermal Analysis for SoC temperature threshold breach */
static void boot_temp_check(void)
@@ -243,19 +250,20 @@ int board_eth_init(bd_t *bis)
int board_mmc_init(bd_t *bis)
{
int ret;
+
#ifdef CONFIG_DWMMC
/* dwmmc initializattion for available channels */
ret = exynos_dwmmc_init(gd-fdt_blob);
if (ret)
debug(dwmmc init failed\n);
#endif
-
#ifdef CONFIG_SDHCI
/* mmc initializattion for available channels */
ret = exynos_mmc_init(gd-fdt_blob);
if (ret)
debug(mmc init failed\n);
#endif
+
return ret;
}
#endif
diff --git a/include/samsung/misc.h b/include/samsung/misc.h
index 10653a1..57bac7d 100644
--- a/include/samsung/misc.h
+++ b/include/samsung/misc.h
@@ -28,4 +28,11 @@ void check_boot_mode(void);
void draw_logo(void);
#endif
+#define BOOT_DEVICE_SDMMC0x2
+#define BOOT_DEVICE_MASK 0x1f
+#define BOOT_DEVICE_SHIFT0x1
+#define BOOT_DEVICE(x) (((x) BOOT_DEVICE_SHIFT)
BOOT_DEVICE_MASK)
+
+unsigned int boot_device(void);
Hm, do we need to make this function to non-static?
If so, it should be placed in power.c - get_om_stat()?
Thanks,
Minkyu Kang.
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Re: [U-Boot] [PATCH v3 03/11] board:samsung: check the boot device and init the right mmc driver.
Dear Przemyslaw Marczak,
On 26/06/14 23:15, Przemyslaw Marczak wrote:
It is possible to boot device using a micro SD or eMMC slots.
In this situation, boot device should be registered as a block
device 0 in the MMC framework, because CONFIG_SYS_MMC_ENV_DEV
is usually set to 0 in the most config cases.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
Changes V3:
- separate two changes into two commits
---
board/samsung/common/board.c | 24 +---
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index ecf3f76..f07a900 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -251,18 +251,28 @@ int board_mmc_init(bd_t *bis)
{
int ret;
+ if (boot_device() == BOOT_DEVICE_SDMMC) {
+#ifdef CONFIG_SDHCI
+ /* mmc initializattion for available channels */
+ ret = exynos_mmc_init(gd-fdt_blob);
+#endif
#ifdef CONFIG_DWMMC
- /* dwmmc initializattion for available channels */
- ret = exynos_dwmmc_init(gd-fdt_blob);
- if (ret)
- debug(dwmmc init failed\n);
+ /* dwmmc initializattion for available channels */
+ ret = exynos_dwmmc_init(gd-fdt_blob);
+#endif
+ } else {
+#ifdef CONFIG_DWMMC
+ /* dwmmc initializattion for available channels */
+ ret = exynos_dwmmc_init(gd-fdt_blob);
#endif
#ifdef CONFIG_SDHCI
- /* mmc initializattion for available channels */
- ret = exynos_mmc_init(gd-fdt_blob);
+ /* mmc initializattion for available channels */
+ ret = exynos_mmc_init(gd-fdt_blob);
+#endif
+ }
+
It looks little confused.
Could you please re-arrange this code like this?
#ifdef CONFIG_SDHCI
if (boot) {
} else {
}
#endif
#ifdef CONFIG_DWMMC
if (boot) {
} else {
}
#endif
Thanks,
Minkyu Kang.
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Re: [U-Boot] [PATCH v3 07/11] samsung: board: enable support of multiple board types
On 26/06/14 23:15, Przemyslaw Marczak wrote: This change adds declaration of functions: - set_board_type() - called at checkboard() - get_board_type() - called at checkboard() - get_board_name() For supporting multiple board types in a one config - it is welcome to display the current board model. This is what get_board_type() should return. Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com Cc: Piotr Wilczek p.wilc...@samsung.com Cc: Minkyu Kang mk7.k...@samsung.com --- Changes v3: - change the commit order - include/samsung/misc.h: add new functions declaration - update a commit message --- board/samsung/common/board.c | 7 +++ include/samsung/misc.h | 5 + 2 files changed, 12 insertions(+) diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c index fd5f21f..f2dbfa0 100644 --- a/board/samsung/common/board.c +++ b/board/samsung/common/board.c @@ -96,6 +96,7 @@ int board_init(void) #ifdef CONFIG_EXYNOS_SPI spi_init(); #endif + return exynos_init(); } @@ -285,7 +286,13 @@ int checkboard(void) board_name = fdt_getprop(gd-fdt_blob, 0, model, NULL); printf(Board: %s\n, board_name ? board_name : unknown); +#ifdef CONFIG_BOARD_TYPES + set_board_type(); + + const char *board_type = get_board_type(); please don't declare local variable at middle of function. + printf(Model: %s\n, board_type ? board_type : unknown); +#endif return 0; } #endif diff --git a/include/samsung/misc.h b/include/samsung/misc.h index c3fcc29..fcec5ea 100644 --- a/include/samsung/misc.h +++ b/include/samsung/misc.h @@ -40,5 +40,10 @@ char *get_dfu_alt_system(void); char *get_dfu_alt_boot(void); void set_dfu_alt_info(void); #endif +#ifdef CONFIG_BOARD_TYPES +void set_board_type(void); +const char *get_board_type(void); +const char *get_board_name(void); +#endif #endif /* __SAMSUNG_MISC_COMMON_H__ */ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 03/11] board:samsung: check the boot device and init the right mmc driver.
On 06/27/2014 06:40 PM, Minkyu Kang wrote:
Dear Przemyslaw Marczak,
On 26/06/14 23:15, Przemyslaw Marczak wrote:
It is possible to boot device using a micro SD or eMMC slots.
In this situation, boot device should be registered as a block
device 0 in the MMC framework, because CONFIG_SYS_MMC_ENV_DEV
is usually set to 0 in the most config cases.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
Changes V3:
- separate two changes into two commits
---
board/samsung/common/board.c | 24 +---
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index ecf3f76..f07a900 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -251,18 +251,28 @@ int board_mmc_init(bd_t *bis)
{
int ret;
+if (boot_device() == BOOT_DEVICE_SDMMC) {
+#ifdef CONFIG_SDHCI
+/* mmc initializattion for available channels */
+ret = exynos_mmc_init(gd-fdt_blob);
+#endif
#ifdef CONFIG_DWMMC
-/* dwmmc initializattion for available channels */
-ret = exynos_dwmmc_init(gd-fdt_blob);
-if (ret)
-debug(dwmmc init failed\n);
+/* dwmmc initializattion for available channels */
+ret = exynos_dwmmc_init(gd-fdt_blob);
+#endif
+} else {
+#ifdef CONFIG_DWMMC
+/* dwmmc initializattion for available channels */
+ret = exynos_dwmmc_init(gd-fdt_blob);
#endif
#ifdef CONFIG_SDHCI
-/* mmc initializattion for available channels */
-ret = exynos_mmc_init(gd-fdt_blob);
+/* mmc initializattion for available channels */
+ret = exynos_mmc_init(gd-fdt_blob);
+#endif
+}
+
It looks little confused.
Could you please re-arrange this code like this?
If re-arrange the below code, i want to call the dwmmc-init function at first.
Is there a special reason for sequence(sdhci-dwmmc)?
Best Regards,
Jaehoon Chung
#ifdef CONFIG_SDHCI
if (boot) {
} else {
}
#endif
#ifdef CONFIG_DWMMC
if (boot) {
} else {
}
#endif
Thanks,
Minkyu Kang.
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[U-Boot] [PATCH v1 19/25] arm: armada-xp: Add basic support for the Marvell DB-78460-BP board
This patch adds basic support for the Marvell DB-78460-BP evaulation
board. This is the first board that uses the recently created
Armada XP 78460 SoC support.
Signed-off-by: Stefan Roese s...@denx.de
---
board/Marvell/db-78460-bp/Makefile | 7 ++
board/Marvell/db-78460-bp/db-78460-bp.c | 120
board/Marvell/db-78460-bp/kwbimage.cfg | 12
boards.cfg | 1 +
include/configs/db-78460-bp.h | 67 ++
5 files changed, 207 insertions(+)
create mode 100644 board/Marvell/db-78460-bp/Makefile
create mode 100644 board/Marvell/db-78460-bp/db-78460-bp.c
create mode 100644 board/Marvell/db-78460-bp/kwbimage.cfg
create mode 100644 include/configs/db-78460-bp.h
diff --git a/board/Marvell/db-78460-bp/Makefile
b/board/Marvell/db-78460-bp/Makefile
new file mode 100644
index 000..c7006d0
--- /dev/null
+++ b/board/Marvell/db-78460-bp/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2014 Stefan Roese s...@denx.de
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := db-78460-bp.o
diff --git a/board/Marvell/db-78460-bp/db-78460-bp.c
b/board/Marvell/db-78460-bp/db-78460-bp.c
new file mode 100644
index 000..369b3a8
--- /dev/null
+++ b/board/Marvell/db-78460-bp/db-78460-bp.c
@@ -0,0 +1,120 @@
+/*
+ * Copyright (C) 2014 Stefan Roese s...@denx.de
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include miiphy.h
+#include asm/io.h
+#include asm/arch/cpu.h
+#include asm/arch/soc.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define BIT(nr)(1UL (nr))
+
+#define ETH_PHY_CTRL_REG 0
+#define ETH_PHY_CTRL_POWER_DOWN_BIT11
+#define ETH_PHY_CTRL_POWER_DOWN_MASK (1 ETH_PHY_CTRL_POWER_DOWN_BIT)
+
+/*
+ * Those values and defines are taken from the Marvell U-Boot version
+ * u-boot-2011.12-2014_T1.0 for the board rd78460gp aka
+ * RD-AXP-GP rev 1.0.
+ *
+ * GPPs
+ * MPP#NAMEIN/OUT
+ * --
+ * 21 SW_Reset_ OUT
+ * 25 Phy_Int#IN
+ * 28 SDI_WP IN
+ * 29 SDI_Status IN
+ * 54-61 On GPP Connector?
+ * 62 Switch InterruptIN
+ * 63-65 Reserved from SW Board ?
+ * 66 SW_BRD connectedIN
+ */
+#define RD_78460_GP_GPP_OUT_ENA_LOW(~(BIT(21) | BIT(20)))
+#define RD_78460_GP_GPP_OUT_ENA_MID(~(BIT(26) | BIT(27)))
+#define RD_78460_GP_GPP_OUT_ENA_HIGH (~(0x0))
+
+#define RD_78460_GP_GPP_OUT_VAL_LOW(BIT(21) | BIT(20))
+#define RD_78460_GP_GPP_OUT_VAL_MID(BIT(26) | BIT(27))
+#define RD_78460_GP_GPP_OUT_VAL_HIGH 0x0
+
+int board_early_init_f(void)
+{
+ /* Configure MPP */
+ writel(0x, MVEBU_MPP_BASE + 0x00);
+ writel(0x, MVEBU_MPP_BASE + 0x04);
+ writel(0x3300, MVEBU_MPP_BASE + 0x08);
+ writel(0x1100, MVEBU_MPP_BASE + 0x0c);
+ writel(0x, MVEBU_MPP_BASE + 0x10);
+ writel(0x00221100, MVEBU_MPP_BASE + 0x14);
+ writel(0x0003, MVEBU_MPP_BASE + 0x18);
+ writel(0x, MVEBU_MPP_BASE + 0x1c);
+ writel(0x, MVEBU_MPP_BASE + 0x20);
+
+ /* Configure GPIO */
+ writel(RD_78460_GP_GPP_OUT_VAL_LOW, MVEBU_GPIO0_BASE + 0x00);
+ writel(RD_78460_GP_GPP_OUT_ENA_LOW, MVEBU_GPIO0_BASE + 0x04);
+ writel(RD_78460_GP_GPP_OUT_VAL_MID, MVEBU_GPIO1_BASE + 0x00);
+ writel(RD_78460_GP_GPP_OUT_ENA_MID, MVEBU_GPIO1_BASE + 0x04);
+ writel(RD_78460_GP_GPP_OUT_VAL_HIGH, MVEBU_GPIO2_BASE + 0x00);
+ writel(RD_78460_GP_GPP_OUT_ENA_HIGH, MVEBU_GPIO2_BASE + 0x04);
+
+ return 0;
+}
+
+int board_init(void)
+{
+ /* adress of boot parameters */
+ gd-bd-bi_boot_params = mvebu_sdram_bar(0) + 0x100;
+
+ return 0;
+}
+
+int checkboard(void)
+{
+ puts(Board: Marvell DB-78460-BP\n);
+
+ return 0;
+}
+
+#ifdef CONFIG_RESET_PHY_R
+/* Configure and enable MV88E1545 PHY */
+void reset_phy(void)
+{
+ u16 devadr = CONFIG_PHY_BASE_ADDR;
+ char *name = neta0;
+ u16 reg;
+
+ if (miiphy_set_current_dev(name))
+ return;
+
+ /* Enable QSGMII AN */
+ /* Set page to 4 */
+ miiphy_write(name, devadr, 0x16, 4);
+ /* Enable AN */
+ miiphy_write(name, devadr, 0x0, 0x1140);
+ /* Set page to 0 */
+ miiphy_write(name, devadr, 0x16, 0);
+
+ /* Phy C_ANEG */
+ miiphy_read(name, devadr, 0x4, reg);
+ reg |= 0x1E0;
+ miiphy_write(name, devadr, 0x4, reg);
+
+ /* Soft-Reset */
+ miiphy_write(name, devadr, 22, 0x);
+ miiphy_write(name, devadr, 0, 0x9140);
+
+ /* Power up the phy */
+ miiphy_read(name, devadr, ETH_PHY_CTRL_REG, reg);
+ reg = ~(ETH_PHY_CTRL_POWER_DOWN_MASK);
+ miiphy_write(name, devadr, ETH_PHY_CTRL_REG, reg);
+
+ printf(88E1545 Initialized on %s\n, name);
+}
[U-Boot] [PATCH v1 24/25] tools: kwbimage: Add image version 1 support for Armada XP / 370
This patch integrates the Barebox version of this kwbimage.c file into
U-Boot. As this version supports the image version 1 type for the
Armada XP / 370 SoCs.
It was easier to integrate the existing and known to be working Barebox
source than to update the current U-Boot version to support this
v1 image header format. Now all Marvell MVEBU SoCs are supported:
Image type 0: Kirkwood Dove
Image type 1: Armada 370 Armada XP
Please note that the current v1 support has this restuction (same as
has Barebox version):
Not implemented: support for the register headers and secure headers
in v1 images
Tested on Marvell DB-78460-BP eval board.
Signed-off-by: Stefan Roese s...@denx.de
---
tools/kwbimage.c | 1050 --
1 file changed, 782 insertions(+), 268 deletions(-)
diff --git a/tools/kwbimage.c b/tools/kwbimage.c
index 109d616..1120e9b 100644
--- a/tools/kwbimage.c
+++ b/tools/kwbimage.c
@@ -1,364 +1,805 @@
/*
- * (C) Copyright 2008
- * Marvell Semiconductor www.marvell.com
- * Written-by: Prafulla Wadaskar prafu...@marvell.com
+ * Image manipulator for Marvell SoCs
+ * supports Kirkwood, Dove, Armada 370, and Armada XP
+ *
+ * (C) Copyright 2013 Thomas Petazzoni
+ * thomas.petazz...@free-electrons.com
*
* SPDX-License-Identifier:GPL-2.0+
+ *
+ * Not implemented: support for the register headers and secure
+ * headers in v1 images
*/
#include imagetool.h
#include image.h
+#include stdint.h
#include kwbimage.h
-/*
- * Supported commands for configuration file
- */
-static table_entry_t kwbimage_cmds[] = {
- {CMD_BOOT_FROM, BOOT_FROM,boot command, },
- {CMD_NAND_ECC_MODE, NAND_ECC_MODE,NAND mode,},
- {CMD_NAND_PAGE_SIZE,NAND_PAGE_SIZE, NAND size,},
- {CMD_SATA_PIO_MODE, SATA_PIO_MODE,SATA mode,},
- {CMD_DDR_INIT_DELAY,DDR_INIT_DELAY, DDR init dly, },
- {CMD_DATA, DATA, Reg Write Data, },
- {CMD_INVALID, , , },
+#define ALIGN_SUP(x, a) (((x) + (a - 1)) ~(a - 1))
+
+/* Structure of the main header, version 0 (Kirkwood, Dove) */
+struct main_hdr_v0 {
+ uint8_t blockid; /*0 */
+ uint8_t nandeccmode; /*1 */
+ uint16_t nandpagesize; /*2-3 */
+ uint32_t blocksize; /*4-7 */
+ uint32_t rsvd1; /*8-11 */
+ uint32_t srcaddr; /*12-15 */
+ uint32_t destaddr; /*16-19 */
+ uint32_t execaddr; /*20-23 */
+ uint8_t satapiomode; /*24*/
+ uint8_t rsvd3; /*25*/
+ uint16_t ddrinitdelay; /*26-27 */
+ uint16_t rsvd2; /*28-29 */
+ uint8_t ext; /*30*/
+ uint8_t checksum; /*31*/
+};
+
+struct ext_hdr_v0_reg {
+ uint32_t raddr;
+ uint32_t rdata;
+};
+
+#define EXT_HDR_V0_REG_COUNT ((0x1dc - 0x20) / sizeof(struct ext_hdr_v0_reg))
+
+struct ext_hdr_v0 {
+ uint32_t offset;
+ uint8_t reserved[0x20 - sizeof(uint32_t)];
+ struct ext_hdr_v0_reg rcfg[EXT_HDR_V0_REG_COUNT];
+ uint8_t reserved2[7];
+ uint8_t checksum;
+};
+
+/* Structure of the main header, version 1 (Armada 370, Armada XP) */
+struct main_hdr_v1 {
+ uint8_t blockid; /* 0 */
+ uint8_t reserved1; /* 1 */
+ uint16_t reserved2; /* 2-3 */
+ uint32_t blocksize; /* 4-7 */
+ uint8_t version; /* 8 */
+ uint8_t headersz_msb; /* 9 */
+ uint16_t headersz_lsb; /* A-B */
+ uint32_t srcaddr; /* C-F */
+ uint32_t destaddr; /* 10-13 */
+ uint32_t execaddr; /* 14-17 */
+ uint8_t reserved3; /* 18 */
+ uint8_t nandblocksize; /* 19 */
+ uint8_t nandbadblklocation;/* 1A */
+ uint8_t reserved4; /* 1B */
+ uint16_t reserved5; /* 1C-1D */
+ uint8_t ext; /* 1E */
+ uint8_t checksum; /* 1F */
};
/*
- * Supported Boot options for configuration file
+ * Header for the optional headers, version 1 (Armada 370, Armada XP)
*/
-static table_entry_t kwbimage_bootops[] = {
- {IBR_HDR_SPI_ID,spi, SPI Flash,},
- {IBR_HDR_NAND_ID, nand, NAND Flash, },
- {IBR_HDR_SATA_ID, sata, Sata port,},
- {IBR_HDR_PEX_ID,pex, PCIe port,},
- {IBR_HDR_UART_ID, uart, Serial port, },
- {-1,, Invalid, },
+struct opt_hdr_v1 {
+ uint8_t headertype;
+ uint8_t headersz_msb;
+ uint16_t headersz_lsb;
+
[U-Boot] [PATCH v1 0/25] Add Marvell Armada XP MV78460 SoC support
This patch series adds support for the Marvell Armada XP SoC's. Specifically
the MV78460.
Basic support for the db-78460-bp evaluation board is added. Supporting the
following interfaces:
- UART
- SPI (including SPI NOR flash)
- I2C
- Ethernet (neta)
While doing this port, I tried to consolidate common Marvell code into
the arch/arm/mvebu-common directory. This directory should be used to
collect more common code for the MVEBU SoC's (Dove, Kirkwood, Armada 370,
Armada 380, Armada XP). I started with Kirkwood and some of its
interfaces. Dove is definitely a candidate to move some of its code
into thise directory as well.
Because of the renaming of some functions from kirkwood to mvebu (to make
them better usable on other MVEBU SoCs), this patch series not only
touches the ARM SoC specific files (in arch/arm/...). But also some
device drivers (e.g. SPI, I2C). Separating these driver specific patches
into different patches that are not depending on this ARM patch series
seems hard if not impossible. Thats why I would really like to get this
patch series to get applied completely be one custodian. Not sure if
this could / should go through Tom directly? Only if all the subsystem
custodians have given their Acked-by ... of course.
Testing on Kirkwood based boards would be greatly appreciated. So anyone with
access to some of those board, please give this patch series a try. I really
hope that I didn't break anything while merging some of the code into the
common mvebu directory.
Please note that this Armada XP port still requires the Binary Header
(bin_hdr) from the Marvell U-Boot tree to be included as a binary blob
into the resulting image (u-boot.kwb) that can be booted by the MVEBU
BootROM. This binary bin_hdr is usually responsible for the DDR3
controller configuration and the DDR3 training. One way to extract this
bin_hdr binary from an existing Marvell boot image right now is to use
the kwbimage tool from Barebox. Please refer to the documentation
thats available there for more details.
Thanks,
Stefan
Stefan Roese (25):
sf: Add M25PX64 SPI NOR flash ID
arm: kirkwood: spi.h: Add some missing parenthesis
spi: kirkwood_spi.c: Some fixes and cleanup
spi: kirkwood_spi.c: Make global variable static
spi: kirkwood_spi.c: cosmetic: Fix minor coding style issues
arm: kirkwood: Move some SoC files into new arch/arm/mvebu-common
arm: marvell: Move arch/kirkwood.h to arch/soc.h
arm: marvell: Move arch-kirkwood/spi.h to arch-mvebu/spi.h
arm: marvell: Rework timer.c to make it usable for other MVEBU
platforms
arm: mvebu: Add common mbus functions to use on Marvell SoCs
spi: kirkwood_spi.c: Compile MPP (pin-mux) only for kirkwood SoC's
arm: marvell: Extract kirkwood gpio functions into new common file
gpio.c
spi: kirkwood_spi.c: Change KW_SPI_BASE to MVEBU_SPI_BASE
arm: kirkwood: Change naming of dram functions from km_foo() to
mvebu_foo()
net: mvneta.c: Add support for the ethernet controller of the Marvell
Armada XP SoC
net: phy.h: Make PHY autonegotiation timeout configurable
i2c: mvtwsi: Add support for Marvell Armada XP
arm: armada-xp: Add basic support for Marvell Armada XP SoC
arm: armada-xp: Add basic support for the Marvell DB-78460-BP board
arm: kirkwood: Remove some dead code from cpu.c
arm: kirkwood: Use mvebu new common mbus API
tools/kwboot: Sync with latest barebox version to support Armada XP
tools: Compile kwboot for Marvell Armada XP as those SoCs are now
supported
tools: kwbimage: Add image version 1 support for Armada XP / 370
Makefile: Add CONFIG_BUILD_TARGET to automatically build an special
image
Makefile |9 +
README |8 +
arch/arm/cpu/arm926ejs/kirkwood/Makefile |4 +-
arch/arm/cpu/arm926ejs/kirkwood/cpu.c | 174 +--
arch/arm/cpu/arm926ejs/kirkwood/mpp.c |2 +-
arch/arm/cpu/armv7/armada-xp/Makefile |7 +
arch/arm/cpu/armv7/armada-xp/cpu.c | 186 +++
arch/arm/include/asm/arch-armada-xp/config.h | 80 +
arch/arm/include/asm/arch-armada-xp/cpu.h | 103 ++
arch/arm/include/asm/arch-armada-xp/soc.h | 57 +
arch/arm/include/asm/arch-kirkwood/config.h|2 +-
arch/arm/include/asm/arch-kirkwood/cpu.h | 71 +-
arch/arm/include/asm/arch-kirkwood/gpio.h | 16 +-
.../asm/arch-kirkwood/{kirkwood.h = soc.h}| 25 +-
.../asm/{arch-kirkwood = arch-mvebu}/spi.h|8 +-
arch/arm/mvebu-common/Makefile | 12 +
.../arm926ejs/kirkwood = mvebu-common}/dram.c | 63 +-
arch/arm/mvebu-common/gpio.c | 30 +
arch/arm/mvebu-common/mbus.c | 477 ++
.../arm926ejs/kirkwood = mvebu-common}/timer.c| 92 +-
board/LaCie/net2big_v2/net2big_v2.c|8 +-
board/LaCie/netspace_v2/netspace_v2.c
[U-Boot] [PATCH v1 02/25] arm: kirkwood: spi.h: Add some missing parenthesis
Signed-off-by: Stefan Roese s...@denx.de
Cc: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
arch/arm/include/asm/arch-kirkwood/spi.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/include/asm/arch-kirkwood/spi.h
b/arch/arm/include/asm/arch-kirkwood/spi.h
index b1cf614..e512dce 100644
--- a/arch/arm/include/asm/arch-kirkwood/spi.h
+++ b/arch/arm/include/asm/arch-kirkwood/spi.h
@@ -43,10 +43,10 @@ struct kwspi_registers {
#define KWSPI_XFERLEN_2BYTE(1 5)
#define KWSPI_XFERLEN_MASK (1 5)
#define KWSPI_ADRLEN_1BYTE 0
-#define KWSPI_ADRLEN_2BYTE 1 8
-#define KWSPI_ADRLEN_3BYTE 2 8
-#define KWSPI_ADRLEN_4BYTE 3 8
-#define KWSPI_ADRLEN_MASK 3 8
+#define KWSPI_ADRLEN_2BYTE (1 8)
+#define KWSPI_ADRLEN_3BYTE (2 8)
+#define KWSPI_ADRLEN_4BYTE (3 8)
+#define KWSPI_ADRLEN_MASK (3 8)
#define KWSPI_TIMEOUT 1
#endif /* __KW_SPI_H__ */
--
2.0.1
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[U-Boot] [PATCH v1 10/25] arm: mvebu: Add common mbus functions to use on Marvell SoCs
These mbus functions are ported from Barebox. The Barebox version is
ported from Linux. These functions will be first used by the upcoming
Armada XP support. Later other Marvell SoC's will be adopted to use
these functions as well (Kirkwood, Orion).
Signed-off-by: Stefan Roese s...@denx.de
---
arch/arm/mvebu-common/Makefile | 1 +
arch/arm/mvebu-common/mbus.c | 477 +
include/linux/mbus.h | 61 ++
3 files changed, 539 insertions(+)
create mode 100644 arch/arm/mvebu-common/mbus.c
create mode 100644 include/linux/mbus.h
diff --git a/arch/arm/mvebu-common/Makefile b/arch/arm/mvebu-common/Makefile
index 4d20d2c..391a125 100644
--- a/arch/arm/mvebu-common/Makefile
+++ b/arch/arm/mvebu-common/Makefile
@@ -7,4 +7,5 @@
#
obj-y = dram.o
+obj-$(CONFIG_ARMADA_XP) += mbus.o
obj-y += timer.o
diff --git a/arch/arm/mvebu-common/mbus.c b/arch/arm/mvebu-common/mbus.c
new file mode 100644
index 000..3db28a0
--- /dev/null
+++ b/arch/arm/mvebu-common/mbus.c
@@ -0,0 +1,477 @@
+/*
+ * Address map functions for Marvell EBU SoCs (Kirkwood, Armada
+ * 370/XP, Dove, Orion5x and MV78xx0)
+ *
+ * Ported from the Barebox version to U-Boot by:
+ * Stefan Roese s...@denx.de
+ *
+ * The Barebox version is:
+ * Sebastian Hesselbarth sebastian.hesselba...@gmail.com
+ *
+ * based on mbus driver from Linux
+ * (C) Copyright 2008 Marvell Semiconductor
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ *
+ * The Marvell EBU SoCs have a configurable physical address space:
+ * the physical address at which certain devices (PCIe, NOR, NAND,
+ * etc.) sit can be configured. The configuration takes place through
+ * two sets of registers:
+ *
+ * - One to configure the access of the CPU to the devices. Depending
+ * on the families, there are between 8 and 20 configurable windows,
+ * each can be use to create a physical memory window that maps to a
+ * specific device. Devices are identified by a tuple (target,
+ * attribute).
+ *
+ * - One to configure the access to the CPU to the SDRAM. There are
+ * either 2 (for Dove) or 4 (for other families) windows to map the
+ * SDRAM into the physical address space.
+ *
+ * This driver:
+ *
+ * - Reads out the SDRAM address decoding windows at initialization
+ * time, and fills the mbus_dram_info structure with these
+ * informations. The exported function mv_mbus_dram_info() allow
+ * device drivers to get those informations related to the SDRAM
+ * address decoding windows. This is because devices also have their
+ * own windows (configured through registers that are part of each
+ * device register space), and therefore the drivers for Marvell
+ * devices have to configure those device - SDRAM windows to ensure
+ * that DMA works properly.
+ *
+ * - Provides an API for platform code or device drivers to
+ * dynamically add or remove address decoding windows for the CPU -
+ * device accesses. This API is mvebu_mbus_add_window_by_id(),
+ * mvebu_mbus_add_window_remap_by_id() and
+ * mvebu_mbus_del_window().
+ */
+
+#include common.h
+#include asm/errno.h
+#include asm/io.h
+#include asm/arch/cpu.h
+#include asm/arch/soc.h
+#include linux/mbus.h
+
+#define BIT(nr)(1UL (nr))
+
+/* DDR target is the same on all platforms */
+#define TARGET_DDR 0
+
+/* CPU Address Decode Windows registers */
+#define WIN_CTRL_OFF 0x
+#define WIN_CTRL_ENABLE BIT(0)
+#define WIN_CTRL_TGT_MASK 0xf0
+#define WIN_CTRL_TGT_SHIFT4
+#define WIN_CTRL_ATTR_MASK0xff00
+#define WIN_CTRL_ATTR_SHIFT 8
+#define WIN_CTRL_SIZE_MASK0x
+#define WIN_CTRL_SIZE_SHIFT 16
+#define WIN_BASE_OFF 0x0004
+#define WIN_BASE_LOW 0x
+#define WIN_BASE_HIGH 0xf
+#define WIN_REMAP_LO_OFF 0x0008
+#define WIN_REMAP_LOW 0x
+#define WIN_REMAP_HI_OFF 0x000c
+
+#define ATTR_HW_COHERENCY (0x1 4)
+
+#define DDR_BASE_CS_OFF(n) (0x + ((n) 3))
+#define DDR_BASE_CS_HIGH_MASK 0xf
+#define DDR_BASE_CS_LOW_MASK 0xff00
+#define DDR_SIZE_CS_OFF(n) (0x0004 + ((n) 3))
+#define DDR_SIZE_ENABLED BIT(0)
+#define DDR_SIZE_CS_MASK 0x1c
+#define DDR_SIZE_CS_SHIFT 2
+#define DDR_SIZE_MASK 0xff00
+
+#define DOVE_DDR_BASE_CS_OFF(n) ((n) 4)
+
+struct mvebu_mbus_state;
+
+struct mvebu_mbus_soc_data {
+ unsigned int num_wins;
+ unsigned int num_remappable_wins;
+ unsigned int (*win_cfg_offset)(const int win);
+ void (*setup_cpu_target)(struct mvebu_mbus_state *s);
+};
+
+struct mvebu_mbus_state {
+ void __iomem *mbuswins_base;
+ void __iomem *sdramwins_base;
+ struct dentry *debugfs_root;
+ struct dentry *debugfs_sdram;
+ struct dentry *debugfs_devs;
+ const struct mvebu_mbus_soc_data *soc;
+ int hw_io_coherency;
+};
+
+static struct mvebu_mbus_state mbus_state
+ __attribute__
[U-Boot] [PATCH v1 06/25] arm: kirkwood: Move some SoC files into new arch/arm/mvebu-common
By moving some kirkwood files into a Marvell common directory, those files
can be used by other Marvell platforms as well. The name mvebu is taken
from the Linux kernel source tree. It has been chosen there to represent
the SoC's from the Marvell EBU (Engineering Business Unit). Those SoC's
currently are:
Armada 370/375/XP, Dove, mv78xx0, Kirkwood, Orion5x
This will be used by the upcoming Armada XP (MV78460) platform support.
Signed-off-by: Stefan Roese s...@denx.de
---
Makefile | 4
arch/arm/cpu/arm926ejs/kirkwood/Makefile | 4 +---
arch/arm/mvebu-common/Makefile| 10 ++
arch/arm/{cpu/arm926ejs/kirkwood = mvebu-common}/dram.c | 8 +++-
arch/arm/{cpu/arm926ejs/kirkwood = mvebu-common}/timer.c | 0
5 files changed, 22 insertions(+), 4 deletions(-)
create mode 100644 arch/arm/mvebu-common/Makefile
rename arch/arm/{cpu/arm926ejs/kirkwood = mvebu-common}/dram.c (91%)
rename arch/arm/{cpu/arm926ejs/kirkwood = mvebu-common}/timer.c (100%)
diff --git a/Makefile b/Makefile
index e429212..106840a 100644
--- a/Makefile
+++ b/Makefile
@@ -636,6 +636,10 @@ ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35 mxs
vf610))
libs-y += arch/$(ARCH)/imx-common/
endif
+ifneq (,$(filter $(SOC), kirkwood))
+libs-y += arch/$(ARCH)/mvebu-common/
+endif
+
libs-$(CONFIG_ARM) += arch/arm/cpu/
libs-$(CONFIG_PPC) += arch/powerpc/cpu/
diff --git a/arch/arm/cpu/arm926ejs/kirkwood/Makefile
b/arch/arm/cpu/arm926ejs/kirkwood/Makefile
index c230ce8..df4756e 100644
--- a/arch/arm/cpu/arm926ejs/kirkwood/Makefile
+++ b/arch/arm/cpu/arm926ejs/kirkwood/Makefile
@@ -7,7 +7,5 @@
#
obj-y = cpu.o
-obj-y += dram.o
-obj-y += mpp.o
-obj-y += timer.o
obj-y += cache.o
+obj-y += mpp.o
diff --git a/arch/arm/mvebu-common/Makefile b/arch/arm/mvebu-common/Makefile
new file mode 100644
index 000..4d20d2c
--- /dev/null
+++ b/arch/arm/mvebu-common/Makefile
@@ -0,0 +1,10 @@
+#
+# (C) Copyright 2009
+# Marvell Semiconductor www.marvell.com
+# Written-by: Prafulla Wadaskar prafu...@marvell.com
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y = dram.o
+obj-y += timer.o
diff --git a/arch/arm/cpu/arm926ejs/kirkwood/dram.c
b/arch/arm/mvebu-common/dram.c
similarity index 91%
rename from arch/arm/cpu/arm926ejs/kirkwood/dram.c
rename to arch/arm/mvebu-common/dram.c
index d73ae47..bb5989b 100644
--- a/arch/arm/cpu/arm926ejs/kirkwood/dram.c
+++ b/arch/arm/mvebu-common/dram.c
@@ -110,7 +110,13 @@ int dram_init(void)
if (gd-bd-bi_dram[i].start != gd-ram_size)
break;
- gd-ram_size += gd-bd-bi_dram[i].size;
+ /*
+* Don't report more than 3GiB of SDRAM, otherwise there is no
+* address space left for the internal registers etc.
+*/
+ if ((gd-ram_size + gd-bd-bi_dram[i].size != 0)
+ (gd-ram_size + gd-bd-bi_dram[i].size = (3 30)))
+ gd-ram_size += gd-bd-bi_dram[i].size;
}
diff --git a/arch/arm/cpu/arm926ejs/kirkwood/timer.c
b/arch/arm/mvebu-common/timer.c
similarity index 100%
rename from arch/arm/cpu/arm926ejs/kirkwood/timer.c
rename to arch/arm/mvebu-common/timer.c
--
2.0.1
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[U-Boot] [PATCH v1 14/25] arm: kirkwood: Change naming of dram functions from km_foo() to mvebu_foo()
Additionally the SDRAM address decoding register address is not hard coded
in the C code any more. A define is introduced for this base address.
This makes is possible to use those gpio functions from other MVEBU SoC's
as well.
Signed-off-by: Stefan Roese s...@denx.de
---
arch/arm/include/asm/arch-kirkwood/cpu.h| 6 +--
arch/arm/include/asm/arch-kirkwood/soc.h| 1 +
arch/arm/mvebu-common/dram.c| 53 +
board/LaCie/net2big_v2/net2big_v2.c | 2 +-
board/LaCie/netspace_v2/netspace_v2.c | 2 +-
board/LaCie/wireless_space/wireless_space.c | 2 +-
board/Marvell/dreamplug/dreamplug.c | 2 +-
board/Marvell/guruplug/guruplug.c | 2 +-
board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c | 2 +-
board/Marvell/openrd/openrd.c | 2 +-
board/Marvell/rd6281a/rd6281a.c | 2 +-
board/Marvell/sheevaplug/sheevaplug.c | 2 +-
board/Seagate/dockstar/dockstar.c | 2 +-
board/Seagate/goflexhome/goflexhome.c | 2 +-
board/buffalo/lsxl/lsxl.c | 2 +-
board/cloudengines/pogo_e02/pogo_e02.c | 2 +-
board/d-link/dns325/dns325.c| 2 +-
board/iomega/iconnect/iconnect.c| 2 +-
board/karo/tk71/tk71.c | 2 +-
board/keymile/km_arm/km_arm.c | 4 +-
board/raidsonic/ib62x0/ib62x0.c | 2 +-
21 files changed, 50 insertions(+), 48 deletions(-)
diff --git a/arch/arm/include/asm/arch-kirkwood/cpu.h
b/arch/arm/include/asm/arch-kirkwood/cpu.h
index 5900a15..926d347 100644
--- a/arch/arm/include/asm/arch-kirkwood/cpu.h
+++ b/arch/arm/include/asm/arch-kirkwood/cpu.h
@@ -140,9 +140,9 @@ struct kwgpio_registers {
* functions
*/
unsigned char get_random_hex(void);
-unsigned int kw_sdram_bar(enum memory_bank bank);
-unsigned int kw_sdram_bs(enum memory_bank bank);
-void kw_sdram_size_adjust(enum memory_bank bank);
+unsigned int mvebu_sdram_bar(enum memory_bank bank);
+unsigned int mvebu_sdram_bs(enum memory_bank bank);
+void mvebu_sdram_size_adjust(enum memory_bank bank);
int kw_config_adr_windows(void);
void mvebu_config_gpio(unsigned int gpp0_oe_val, unsigned int gpp1_oe_val,
unsigned int gpp0_oe, unsigned int gpp1_oe);
diff --git a/arch/arm/include/asm/arch-kirkwood/soc.h
b/arch/arm/include/asm/arch-kirkwood/soc.h
index 379ce13..75120b1 100644
--- a/arch/arm/include/asm/arch-kirkwood/soc.h
+++ b/arch/arm/include/asm/arch-kirkwood/soc.h
@@ -22,6 +22,7 @@
#define KW_REG_UNDOC_0x1470(KW_REGISTER(0x1470))
#define KW_REG_UNDOC_0x1478(KW_REGISTER(0x1478))
+#define MVEBU_SDRAM_BASE (KW_REGISTER(0x1500))
#define KW_TWSI_BASE (KW_REGISTER(0x11000))
#define KW_UART0_BASE (KW_REGISTER(0x12000))
#define KW_UART1_BASE (KW_REGISTER(0x12100))
diff --git a/arch/arm/mvebu-common/dram.c b/arch/arm/mvebu-common/dram.c
index e468136..db18791 100644
--- a/arch/arm/mvebu-common/dram.c
+++ b/arch/arm/mvebu-common/dram.c
@@ -14,27 +14,27 @@
DECLARE_GLOBAL_DATA_PTR;
-struct kw_sdram_bank {
+struct sdram_bank {
u32 win_bar;
u32 win_sz;
};
-struct kw_sdram_addr_dec {
- struct kw_sdram_banksdram_bank[4];
+struct sdram_addr_dec {
+ struct sdram_bank sdram_bank[4];
};
-#define KW_REG_CPUCS_WIN_ENABLE(1 0)
-#define KW_REG_CPUCS_WIN_WR_PROTECT(1 1)
-#define KW_REG_CPUCS_WIN_WIN0_CS(x)(((x) 0x3) 2)
-#define KW_REG_CPUCS_WIN_SIZE(x) (((x) 0xff) 24)
+#define REG_CPUCS_WIN_ENABLE (1 0)
+#define REG_CPUCS_WIN_WR_PROTECT (1 1)
+#define REG_CPUCS_WIN_WIN0_CS(x) (((x) 0x3) 2)
+#define REG_CPUCS_WIN_SIZE(x) (((x) 0xff) 24)
/*
- * kw_sdram_bar - reads SDRAM Base Address Register
+ * mvebu_sdram_bar - reads SDRAM Base Address Register
*/
-u32 kw_sdram_bar(enum memory_bank bank)
+u32 mvebu_sdram_bar(enum memory_bank bank)
{
- struct kw_sdram_addr_dec *base =
- (struct kw_sdram_addr_dec *)KW_REGISTER(0x1500);
+ struct sdram_addr_dec *base =
+ (struct sdram_addr_dec *)MVEBU_SDRAM_BASE;
u32 result = 0;
u32 enable = 0x01 readl(base-sdram_bank[bank].win_sz);
@@ -46,31 +46,31 @@ u32 kw_sdram_bar(enum memory_bank bank)
}
/*
- * kw_sdram_bs_set - writes SDRAM Bank size
+ * mvebu_sdram_bs_set - writes SDRAM Bank size
*/
-static void kw_sdram_bs_set(enum memory_bank bank, u32 size)
+static void mvebu_sdram_bs_set(enum memory_bank bank, u32 size)
{
- struct kw_sdram_addr_dec *base =
- (struct kw_sdram_addr_dec *)KW_REGISTER(0x1500);
+ struct sdram_addr_dec *base =
+ (struct sdram_addr_dec *)MVEBU_SDRAM_BASE;
/* Read current register value */
u32 reg = readl(base-sdram_bank[bank].win_sz);
/* Clear window size
[U-Boot] [PATCH v1 23/25] tools: Compile kwboot for Marvell Armada XP as those SoCs are now supported
Signed-off-by: Stefan Roese s...@denx.de --- tools/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/tools/Makefile b/tools/Makefile index 61b2048..9aab9da 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -139,6 +139,7 @@ ubsha1-objs := os_support.o ubsha1.o lib/sha1.o HOSTCFLAGS_ubsha1.o := -pedantic hostprogs-$(CONFIG_KIRKWOOD) += kwboot +hostprogs-$(CONFIG_ARMADA_XP) += kwboot hostprogs-y += proftool hostprogs-$(CONFIG_STATIC_RELA) += relocate-rela -- 2.0.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v1 03/25] spi: kirkwood_spi.c: Some fixes and cleanup
This patch introduces the clrsetbits_le32() accessor functions in the
kirkwood SPI driver. Note that it also includes a fix:
-writel(~KWSPI_CSN_ACT | KWSPI_SMEMRDY, spireg-ctrl);
+writel(KWSPI_SMEMRDY, spireg-ctrl);
Here the bit KWSPI_CSN_ACT (0x1) should have been cleared. Instead
0xfffe is written into this control register. This is the main
reason to use the clrsetbits() functions now. As they make clearing
bits much less error prone.
Additionally KWSPI_IRQUNMASK is not used in spi_cs_activate() and
spi_cs_deactivate() any more. Its the wrong macro but has the same
value as the correct one (KWSPI_CSN_ACT).
This is in preparation for use of this driver on the Marvell Armada XP
platform as well.
Signed-off-by: Stefan Roese s...@denx.de
Cc: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
drivers/spi/kirkwood_spi.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
index 942a208..449e9f8 100644
--- a/drivers/spi/kirkwood_spi.c
+++ b/drivers/spi/kirkwood_spi.c
@@ -37,7 +37,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned
int cs,
if (!slave)
return NULL;
- writel(~KWSPI_CSN_ACT | KWSPI_SMEMRDY, spireg-ctrl);
+ writel(KWSPI_SMEMRDY, spireg-ctrl);
/* calculate spi clock prescaller using max_hz */
data = ((CONFIG_SYS_TCLK / 2) / max_hz) + 0x10;
@@ -137,12 +137,12 @@ void spi_init(void)
void spi_cs_activate(struct spi_slave *slave)
{
- writel(readl(spireg-ctrl) | KWSPI_IRQUNMASK, spireg-ctrl);
+ setbits_le32(spireg-ctrl, KWSPI_CSN_ACT);
}
void spi_cs_deactivate(struct spi_slave *slave)
{
- writel(readl(spireg-ctrl) KWSPI_IRQMASK, spireg-ctrl);
+ clrbits_le32(spireg-ctrl, KWSPI_CSN_ACT);
}
int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
@@ -161,8 +161,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
const void *dout,
* handle data in 8-bit chunks
* TBD: 2byte xfer mode to be enabled
*/
- writel(((readl(spireg-cfg) ~KWSPI_XFERLEN_MASK) |
- KWSPI_XFERLEN_1BYTE), spireg-cfg);
+ clrsetbits_le32(spireg-cfg, KWSPI_XFERLEN_MASK, KWSPI_XFERLEN_1BYTE);
while (bitlen 4) {
debug(loopstart bitlen %d\n, bitlen);
@@ -172,7 +171,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
const void *dout,
if (dout)
tmpdout = *(u32 *) dout 0x0ff;
- writel(~KWSPI_SMEMRDIRQ, spireg-irq_cause);
+ clrbits_le32(spireg-irq_cause, KWSPI_SMEMRDIRQ);
writel(tmpdout, spireg-dout); /* Write the data out */
debug(*** spi_xfer: ... %08x written, bitlen %d\n,
tmpdout, bitlen);
--
2.0.1
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[U-Boot] [PATCH v1 12/25] arm: marvell: Extract kirkwood gpio functions into new common file gpio.c
This makes is possible to use those gpio functions from other MVEBU SoC's as
well.
Signed-off-by: Stefan Roese s...@denx.de
---
arch/arm/cpu/arm926ejs/kirkwood/cpu.c | 17 --
arch/arm/include/asm/arch-kirkwood/cpu.h| 2 +-
arch/arm/include/asm/arch-kirkwood/gpio.h | 16 ++---
arch/arm/include/asm/arch-kirkwood/soc.h| 4 ++--
arch/arm/mvebu-common/Makefile | 1 +
arch/arm/mvebu-common/gpio.c| 30 +
board/LaCie/net2big_v2/net2big_v2.c | 4 ++--
board/LaCie/netspace_v2/netspace_v2.c | 4 ++--
board/LaCie/wireless_space/wireless_space.c | 4 ++--
board/Marvell/dreamplug/dreamplug.c | 6 ++---
board/Marvell/guruplug/guruplug.c | 6 ++---
board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c | 6 ++---
board/Marvell/openrd/openrd.c | 6 ++---
board/Marvell/rd6281a/rd6281a.c | 6 ++---
board/Marvell/sheevaplug/sheevaplug.c | 6 ++---
board/Seagate/dockstar/dockstar.c | 8 +++
board/Seagate/goflexhome/goflexhome.c | 8 +++
board/buffalo/lsxl/lsxl.c | 6 ++---
board/cloudengines/pogo_e02/pogo_e02.c | 6 ++---
board/d-link/dns325/dns325.c| 4 ++--
board/iomega/iconnect/iconnect.c| 6 ++---
board/karo/tk71/tk71.c | 6 ++---
board/keymile/km_arm/km_arm.c | 4 ++--
board/raidsonic/ib62x0/ib62x0.c | 6 ++---
24 files changed, 93 insertions(+), 79 deletions(-)
create mode 100644 arch/arm/mvebu-common/gpio.c
diff --git a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
index c8f90ba..00abcfd 100644
--- a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
@@ -139,23 +139,6 @@ int kw_config_adr_windows(void)
}
/*
- * kw_config_gpio - GPIO configuration
- */
-void kw_config_gpio(u32 gpp0_oe_val, u32 gpp1_oe_val, u32 gpp0_oe, u32 gpp1_oe)
-{
- struct kwgpio_registers *gpio0reg =
- (struct kwgpio_registers *)KW_GPIO0_BASE;
- struct kwgpio_registers *gpio1reg =
- (struct kwgpio_registers *)KW_GPIO1_BASE;
-
- /* Init GPIOS to default values as per board requirement */
- writel(gpp0_oe_val, gpio0reg-dout);
- writel(gpp1_oe_val, gpio1reg-dout);
- writel(gpp0_oe, gpio0reg-oe);
- writel(gpp1_oe, gpio1reg-oe);
-}
-
-/*
* kw_config_mpp - Multi-Purpose Pins Functionality configuration
*
* Each MPP can be configured to different functionality through
diff --git a/arch/arm/include/asm/arch-kirkwood/cpu.h
b/arch/arm/include/asm/arch-kirkwood/cpu.h
index 97daa40..5900a15 100644
--- a/arch/arm/include/asm/arch-kirkwood/cpu.h
+++ b/arch/arm/include/asm/arch-kirkwood/cpu.h
@@ -144,7 +144,7 @@ unsigned int kw_sdram_bar(enum memory_bank bank);
unsigned int kw_sdram_bs(enum memory_bank bank);
void kw_sdram_size_adjust(enum memory_bank bank);
int kw_config_adr_windows(void);
-void kw_config_gpio(unsigned int gpp0_oe_val, unsigned int gpp1_oe_val,
+void mvebu_config_gpio(unsigned int gpp0_oe_val, unsigned int gpp1_oe_val,
unsigned int gpp0_oe, unsigned int gpp1_oe);
int kw_config_mpp(unsigned int mpp0_7, unsigned int mpp8_15,
unsigned int mpp16_23, unsigned int mpp24_31,
diff --git a/arch/arm/include/asm/arch-kirkwood/gpio.h
b/arch/arm/include/asm/arch-kirkwood/gpio.h
index 5f4d786..aa8c5da 100644
--- a/arch/arm/include/asm/arch-kirkwood/gpio.h
+++ b/arch/arm/include/asm/arch-kirkwood/gpio.h
@@ -21,14 +21,14 @@
#define GPIO_MAX 50
#define GPIO_OFF(pin) (((pin) 5) ? 0x0040 : 0x)
-#define GPIO_OUT(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x00)
-#define GPIO_IO_CONF(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x04)
-#define GPIO_BLINK_EN(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x08)
-#define GPIO_IN_POL(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x0c)
-#define GPIO_DATA_IN(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x10)
-#define GPIO_EDGE_CAUSE(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x14)
-#define GPIO_EDGE_MASK(pin)(KW_GPIO0_BASE + GPIO_OFF(pin) + 0x18)
-#define GPIO_LEVEL_MASK(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x1c)
+#define GPIO_OUT(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x00)
+#define GPIO_IO_CONF(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x04)
+#define GPIO_BLINK_EN(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x08)
+#define GPIO_IN_POL(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x0c)
+#define GPIO_DATA_IN(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x10)
+#define GPIO_EDGE_CAUSE(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x14)
+#define GPIO_EDGE_MASK(pin)(MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x18)
+#define GPIO_LEVEL_MASK(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x1c)
/*
* Kirkwood-specific GPIO API
diff
[U-Boot] [PATCH v1 21/25] arm: kirkwood: Use mvebu new common mbus API
Now that the new common mvebu mbus API is available, lets use it
on kirkwood as well. This includes a small change in the kirkwood
EHCI driver. Making it more similar to the Linux driver from which
it is ported.
Signed-off-by: Stefan Roese s...@denx.de
---
arch/arm/cpu/arm926ejs/kirkwood/cpu.c| 102 ++-
arch/arm/include/asm/arch-kirkwood/cpu.h | 63 ++-
arch/arm/include/asm/arch-kirkwood/soc.h | 16 ++---
arch/arm/mvebu-common/Makefile | 2 +-
drivers/usb/host/ehci-marvell.c | 43 -
5 files changed, 74 insertions(+), 152 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
index c384565..6bfa4ec 100644
--- a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
@@ -13,101 +13,37 @@
#include asm/arch/cpu.h
#include asm/arch/soc.h
-void reset_cpu(unsigned long ignored)
-{
- struct kwcpu_registers *cpureg =
- (struct kwcpu_registers *)KW_CPU_REG_BASE;
-
- writel(readl(cpureg-rstoutn_mask) | (1 2),
- cpureg-rstoutn_mask);
- writel(readl(cpureg-sys_soft_rst) | 1,
- cpureg-sys_soft_rst);
- while (1) ;
-}
-
-/*
- * Window Size
- * Used with the Base register to set the address window size and location.
- * Must be programmed from LSB to MSB as sequence of ones followed by
- * sequence of zeros. The number of ones specifies the size of the window in
- * 64 KByte granularity (e.g., a value of 0x00FF specifies 256 = 16 MByte).
- * NOTE: A value of 0x0 specifies 64-KByte size.
- */
-unsigned int kw_winctrl_calcsize(unsigned int sizeval)
-{
- int i;
- unsigned int j = 0;
- u32 val = sizeval 1;
-
- for (i = 0; val = 0x1; i++) {
- j |= (1 i);
- val = val 1;
- }
- return (0x j);
-}
-
-/*
- * kw_config_adr_windows - Configure address Windows
- *
- * There are 8 address windows supported by Kirkwood Soc to addess different
- * devices. Each window can be configured for size, BAR and remap addr
- * Below configuration is standard for most of the cases
- *
- * If remap function not used, remap_lo must be set as base
- *
- * Reference Documentation:
- * Mbus-L to Mbus Bridge Registers Configuration.
- * (Sec 25.1 and 25.3 of Datasheet)
- */
-int kw_config_adr_windows(void)
-{
- struct kwwin_registers *winregs =
- (struct kwwin_registers *)KW_CPU_WIN_BASE;
-
+static struct mbus_win windows[] = {
/* Window 0: PCIE MEM address space */
- writel(KWCPU_WIN_CTRL_DATA(1024 * 1024 * 256, KWCPU_TARGET_PCIE,
- KWCPU_ATTR_PCIE_MEM, KWCPU_WIN_ENABLE), winregs[0].ctrl);
-
- writel(KW_DEFADR_PCI_MEM, winregs[0].base);
- writel(KW_DEFADR_PCI_MEM, winregs[0].remap_lo);
- writel(0x0, winregs[0].remap_hi);
+ { DEFADR_PCI_MEM, 256 20, CPU_TARGET_PCIE, CPU_ATTR_PCIE_MEM },
/* Window 1: PCIE IO address space */
- writel(KWCPU_WIN_CTRL_DATA(1024 * 64, KWCPU_TARGET_PCIE,
- KWCPU_ATTR_PCIE_IO, KWCPU_WIN_ENABLE), winregs[1].ctrl);
- writel(KW_DEFADR_PCI_IO, winregs[1].base);
- writel(KW_DEFADR_PCI_IO_REMAP, winregs[1].remap_lo);
- writel(0x0, winregs[1].remap_hi);
+ { DEFADR_PCI_IO, 64 10, CPU_TARGET_PCIE, CPU_ATTR_PCIE_IO },
/* Window 2: NAND Flash address space */
- writel(KWCPU_WIN_CTRL_DATA(1024 * 1024 * 128, KWCPU_TARGET_MEMORY,
- KWCPU_ATTR_NANDFLASH, KWCPU_WIN_ENABLE), winregs[2].ctrl);
- writel(KW_DEFADR_NANDF, winregs[2].base);
- writel(KW_DEFADR_NANDF, winregs[2].remap_lo);
- writel(0x0, winregs[2].remap_hi);
+ { DEFADR_NANDF, 128 20, CPU_TARGET_MEMORY, CPU_ATTR_NANDFLASH },
/* Window 3: SPI Flash address space */
- writel(KWCPU_WIN_CTRL_DATA(1024 * 1024 * 128, KWCPU_TARGET_MEMORY,
- KWCPU_ATTR_SPIFLASH, KWCPU_WIN_ENABLE), winregs[3].ctrl);
- writel(KW_DEFADR_SPIF, winregs[3].base);
- writel(KW_DEFADR_SPIF, winregs[3].remap_lo);
- writel(0x0, winregs[3].remap_hi);
+ { DEFADR_SPIF, 128 20, CPU_TARGET_MEMORY, CPU_ATTR_SPIFLASH },
/* Window 4: BOOT Memory address space */
- writel(KWCPU_WIN_CTRL_DATA(1024 * 1024 * 128, KWCPU_TARGET_MEMORY,
- KWCPU_ATTR_BOOTROM, KWCPU_WIN_ENABLE), winregs[4].ctrl);
- writel(KW_DEFADR_BOOTROM, winregs[4].base);
+ { DEFADR_BOOTROM, 128 20, CPU_TARGET_MEMORY, CPU_ATTR_BOOTROM },
/* Window 5: Security SRAM address space */
- writel(KWCPU_WIN_CTRL_DATA(1024 * 64, KWCPU_TARGET_SASRAM,
- KWCPU_ATTR_SASRAM, KWCPU_WIN_ENABLE), winregs[5].ctrl);
- writel(KW_DEFADR_SASRAM, winregs[5].base);
+ { DEFADR_SASRAM, 64 10, CPU_TARGET_SASRAM, CPU_ATTR_SASRAM },
+};
- /* Window 6-7: Disabled */
- writel(KWCPU_WIN_DISABLE, winregs[6].ctrl);
- writel(KWCPU_WIN_DISABLE,
[U-Boot] [PATCH v1 05/25] spi: kirkwood_spi.c: cosmetic: Fix minor coding style issues
Signed-off-by: Stefan Roese s...@denx.de
Cc: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
drivers/spi/kirkwood_spi.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
index 7d1c1f9..3d58bcc 100644
--- a/drivers/spi/kirkwood_spi.c
+++ b/drivers/spi/kirkwood_spi.c
@@ -46,7 +46,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned
int cs,
/* program spi clock prescaller using max_hz */
writel(KWSPI_ADRLEN_3BYTE | data, spireg-cfg);
- debug(data = 0x%08x \n, data);
+ debug(data = 0x%08x\n, data);
writel(KWSPI_SMEMRDIRQ, spireg-irq_cause);
writel(KWSPI_IRQMASK, spireg-irq_mask);
@@ -100,7 +100,6 @@ int spi_claim_bus(struct spi_slave *slave)
/* set new spi mpp and save current mpp config */
kirkwood_mpp_conf(spi_mpp_config, spi_mpp_backup);
-
#endif
return board_spi_claim_bus(slave);
@@ -127,7 +126,7 @@ void spi_release_bus(struct spi_slave *slave)
*/
int spi_cs_is_valid(unsigned int bus, unsigned int cs)
{
- return (bus == 0 (cs == 0 || cs == 1));
+ return bus == 0 (cs == 0 || cs == 1);
}
#endif
@@ -169,7 +168,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
const void *dout,
/* Shift data so it's msb-justified */
if (dout)
- tmpdout = *(u32 *) dout 0x0ff;
+ tmpdout = *(u32 *)dout 0xff;
clrbits_le32(spireg-irq_cause, KWSPI_SMEMRDIRQ);
writel(tmpdout, spireg-dout); /* Write the data out */
@@ -185,12 +184,11 @@ int spi_xfer(struct spi_slave *slave, unsigned int
bitlen, const void *dout,
if (readl(spireg-irq_cause) KWSPI_SMEMRDIRQ) {
isread = 1;
tmpdin = readl(spireg-din);
- debug
- (spi_xfer: din %p..%08x read\n,
- din, tmpdin);
+ debug(spi_xfer: din %p..%08x read\n,
+ din, tmpdin);
if (din) {
- *((u8 *) din) = (u8) tmpdin;
+ *((u8 *)din) = (u8)tmpdin;
din += 1;
}
if (dout)
--
2.0.1
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[U-Boot] [PATCH v1 22/25] tools/kwboot: Sync with latest barebox version to support Armada XP
The barebox version of the kwboot tool has evolved a bit. To support
Armada XP and Dove. Additionally a few minor fixes have been applied.
So lets sync with the latest barebox version.
Please note that the main difference between both versions now is, that
the U-Boot version still supports the -p option, to dynamically patch
an image for UART boot mode. I didn't test it now though.
Signed-off-by: Stefan Roese s...@denx.de
---
tools/kwboot.c | 97 +-
1 file changed, 83 insertions(+), 14 deletions(-)
diff --git a/tools/kwboot.c b/tools/kwboot.c
index e773f01..c47970e 100644
--- a/tools/kwboot.c
+++ b/tools/kwboot.c
@@ -1,5 +1,6 @@
/*
- * Boot a Marvell Kirkwood SoC, with Xmodem over UART0.
+ * Boot a Marvell SoC, with Xmodem over UART0.
+ * supports Kirkwood, Dove, Armada 370, Armada XP
*
* (c) 2012 Daniel Stodden daniel.stod...@gmail.com
*
@@ -37,8 +38,12 @@ static unsigned char kwboot_msg_boot[] = {
0xBB, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77
};
-#define KWBOOT_MSG_REQ_DELAY 10 /* ms */
-#define KWBOOT_MSG_RSP_TIMEO 50 /* ms */
+static unsigned char kwboot_msg_debug[] = {
+ 0xDD, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77
+};
+
+#define KWBOOT_MSG_REQ_DELAY 1000 /* ms */
+#define KWBOOT_MSG_RSP_TIMEO 1000 /* ms */
/*
* Xmodem Transfers
@@ -184,6 +189,9 @@ kwboot_tty_send(int fd, const void *buf, size_t len)
int rc;
ssize_t n;
+ if (!buf)
+ return 0;
+
rc = -1;
do {
@@ -268,7 +276,10 @@ kwboot_bootmsg(int tty, void *msg)
int rc;
char c;
- kwboot_printv(Sending boot message. Please reboot the target...);
+ if (msg == NULL)
+ kwboot_printv(Please reboot the target into UART boot
mode...);
+ else
+ kwboot_printv(Sending boot message. Please reboot the
target...);
do {
rc = tcflush(tty, TCIOFLUSH);
@@ -293,6 +304,37 @@ kwboot_bootmsg(int tty, void *msg)
}
static int
+kwboot_debugmsg(int tty, void *msg)
+{
+ int rc;
+
+ kwboot_printv(Sending debug message. Please reboot the target...);
+
+ do {
+ char buf[16];
+
+ rc = tcflush(tty, TCIOFLUSH);
+ if (rc)
+ break;
+
+ rc = kwboot_tty_send(tty, msg, 8);
+ if (rc) {
+ usleep(KWBOOT_MSG_REQ_DELAY * 1000);
+ continue;
+ }
+
+ rc = kwboot_tty_recv(tty, buf, 16, KWBOOT_MSG_RSP_TIMEO);
+
+ kwboot_spinner();
+
+ } while (rc);
+
+ kwboot_printv(\n);
+
+ return rc;
+}
+
+static int
kwboot_xm_makeblock(struct kwboot_block *block, const void *data,
size_t size, int pnum)
{
@@ -300,6 +342,7 @@ kwboot_xm_makeblock(struct kwboot_block *block, const void
*data,
size_t n;
int i;
+ block-soh = SOH;
block-pnum = pnum;
block-_pnum = ~block-pnum;
@@ -326,9 +369,15 @@ kwboot_xm_sendblock(int fd, struct kwboot_block *block)
if (rc)
break;
- rc = kwboot_tty_recv(fd, c, 1, KWBOOT_BLK_RSP_TIMEO);
- if (rc)
- break;
+ do {
+ rc = kwboot_tty_recv(fd, c, 1, KWBOOT_BLK_RSP_TIMEO);
+ if (rc)
+ break;
+
+ if (c != ACK c != NAK c != CAN)
+ printf(%c, c);
+
+ } while (c != ACK c != NAK c != CAN);
if (c != ACK)
kwboot_progress(-1, '+');
@@ -511,7 +560,6 @@ kwboot_mmap_image(const char *path, size_t *size, int prot)
void *img;
rc = -1;
- fd = -1;
img = NULL;
fd = open(path, O_RDONLY);
@@ -601,11 +649,15 @@ static void
kwboot_usage(FILE *stream, char *progname)
{
fprintf(stream,
- Usage: %s -b image [ -p ] [ -t ]
- [-B baud ] TTY\n, progname);
+ Usage: %s [-d | -b image | -D image ] [ -t ] [-B baud ]
TTY\n,
+ progname);
fprintf(stream, \n);
- fprintf(stream, -b image: boot image\n);
+ fprintf(stream,
+ -b image: boot image with preamble (Kirkwood, Armada
370/XP)\n);
fprintf(stream, -p: patch image to type 0x69 (uart boot)\n);
+ fprintf(stream,
+ -D image: boot image without preamble (Dove)\n);
+ fprintf(stream, -d: enter debug mode\n);
fprintf(stream, \n);
fprintf(stream, -t: mini terminal\n);
fprintf(stream, \n);
@@ -619,6 +671,7 @@ main(int argc, char **argv)
const char *ttypath, *imgpath;
int rv, rc, tty, term, prot, patch;
void *bootmsg;
+ void *debugmsg;
void *img;
size_t size;
speed_t speed;
@@ -626,6 +679,7 @@ main(int
[U-Boot] [PATCH v1 20/25] arm: kirkwood: Remove some dead code from cpu.c
All those functions removed with this patch are not accessed at all. So lets
remove them.
Signed-off-by: Stefan Roese s...@denx.de
---
arch/arm/cpu/arm926ejs/kirkwood/cpu.c | 55 ---
1 file changed, 55 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
index 00abcfd..c384565 100644
--- a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
@@ -9,13 +9,10 @@
#include common.h
#include netdev.h
#include asm/cache.h
-#include u-boot/md5.h
#include asm/io.h
#include asm/arch/cpu.h
#include asm/arch/soc.h
-#define BUFLEN 16
-
void reset_cpu(unsigned long ignored)
{
struct kwcpu_registers *cpureg =
@@ -29,31 +26,6 @@ void reset_cpu(unsigned long ignored)
}
/*
- * Generates Ramdom hex number reading some time varient system registers
- * and using md5 algorithm
- */
-unsigned char get_random_hex(void)
-{
- int i;
- u32 inbuf[BUFLEN];
- u8 outbuf[BUFLEN];
-
- /*
-* in case of 88F6281/88F6282/88F6192 A0,
-* Bit7 need to reset to generate random values in KW_REG_UNDOC_0x1470
-* Soc reg offsets KW_REG_UNDOC_0x1470 and KW_REG_UNDOC_0x1478 are
-* reserved regs and does not have names at this moment
-* (no errata available)
-*/
- writel(readl(KW_REG_UNDOC_0x1478) ~(1 7), KW_REG_UNDOC_0x1478);
- for (i = 0; i BUFLEN; i++) {
- inbuf[i] = readl(KW_REG_UNDOC_0x1470);
- }
- md5((u8 *) inbuf, (BUFLEN * sizeof(u32)), outbuf);
- return outbuf[outbuf[7] % 0x0f];
-}
-
-/*
* Window Size
* Used with the Base register to set the address window size and location.
* Must be programmed from LSB to MSB as sequence of ones followed by
@@ -139,33 +111,6 @@ int kw_config_adr_windows(void)
}
/*
- * kw_config_mpp - Multi-Purpose Pins Functionality configuration
- *
- * Each MPP can be configured to different functionality through
- * MPP control register, ref (sec 6.1 of kirkwood h/w specification)
- *
- * There are maximum 64 Multi-Pourpose Pins on Kirkwood
- * Each MPP functionality can be configuration by a 4bit value
- * of MPP control reg, the value and associated functionality depends
- * upon used SoC varient
- */
-int kw_config_mpp(u32 mpp0_7, u32 mpp8_15, u32 mpp16_23, u32 mpp24_31,
- u32 mpp32_39, u32 mpp40_47, u32 mpp48_55)
-{
- u32 *mppreg = (u32 *) KW_MPP_BASE;
-
- /* program mpp registers */
- writel(mpp0_7, mppreg[0]);
- writel(mpp8_15, mppreg[1]);
- writel(mpp16_23, mppreg[2]);
- writel(mpp24_31, mppreg[3]);
- writel(mpp32_39, mppreg[4]);
- writel(mpp40_47, mppreg[5]);
- writel(mpp48_55, mppreg[6]);
- return 0;
-}
-
-/*
* SYSRSTn Duration Counter Support
*
* Kirkwood SoC implements a hardware-based SYSRSTn duration counter.
--
2.0.1
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[U-Boot] [PATCH v1 13/25] spi: kirkwood_spi.c: Change KW_SPI_BASE to MVEBU_SPI_BASE
This makes is possible to use this SPI driver from other MVEBU SoC's as well. As the upcoming Armada XP support will do. Signed-off-by: Stefan Roese s...@denx.de Cc: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- arch/arm/include/asm/arch-kirkwood/soc.h | 2 +- drivers/spi/kirkwood_spi.c | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-kirkwood/soc.h b/arch/arm/include/asm/arch-kirkwood/soc.h index 37cbae9..379ce13 100644 --- a/arch/arm/include/asm/arch-kirkwood/soc.h +++ b/arch/arm/include/asm/arch-kirkwood/soc.h @@ -30,7 +30,7 @@ #define MVEBU_GPIO1_BASE (KW_REGISTER(0x10140)) #define KW_RTC_BASE(KW_REGISTER(0x10300)) #define KW_NANDF_BASE (KW_REGISTER(0x10418)) -#define KW_SPI_BASE(KW_REGISTER(0x10600)) +#define MVEBU_SPI_BASE (KW_REGISTER(0x10600)) #define KW_CPU_WIN_BASE(KW_REGISTER(0x2)) #define KW_CPU_REG_BASE(KW_REGISTER(0x20100)) #define MVEBU_TIMER_BASE (KW_REGISTER(0x20300)) diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c index ce2ba96..e7b0982 100644 --- a/drivers/spi/kirkwood_spi.c +++ b/drivers/spi/kirkwood_spi.c @@ -18,7 +18,8 @@ #endif #include asm/arch-mvebu/spi.h -static struct kwspi_registers *spireg = (struct kwspi_registers *)KW_SPI_BASE; +static struct kwspi_registers *spireg = + (struct kwspi_registers *)MVEBU_SPI_BASE; #ifdef CONFIG_KIRKWOOD static u32 cs_spi_mpp_back[2]; -- 2.0.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v1 09/25] arm: marvell: Rework timer.c to make it usable for other MVEBU platforms
This patch does the following:
- Rename defines and registers to not use kirkwood
- Remove unused defines
- Use clrsetbits() accessor functions
- Coding style cleanup
- Clear 25MHZ bit in timer controller register init for Armada XP
There is no functional change for kirkwood. At least not intentionally.
This will be used by the upcoming Armada XP support.
Signed-off-by: Stefan Roese s...@denx.de
---
arch/arm/include/asm/arch-kirkwood/soc.h | 2 +-
arch/arm/mvebu-common/timer.c| 90 ++--
2 files changed, 41 insertions(+), 51 deletions(-)
diff --git a/arch/arm/include/asm/arch-kirkwood/soc.h
b/arch/arm/include/asm/arch-kirkwood/soc.h
index bc207f5..4261c35 100644
--- a/arch/arm/include/asm/arch-kirkwood/soc.h
+++ b/arch/arm/include/asm/arch-kirkwood/soc.h
@@ -33,7 +33,7 @@
#define KW_SPI_BASE(KW_REGISTER(0x10600))
#define KW_CPU_WIN_BASE(KW_REGISTER(0x2))
#define KW_CPU_REG_BASE(KW_REGISTER(0x20100))
-#define KW_TIMER_BASE (KW_REGISTER(0x20300))
+#define MVEBU_TIMER_BASE (KW_REGISTER(0x20300))
#define KW_REG_PCIE_BASE (KW_REGISTER(0x4))
#define KW_USB20_BASE (KW_REGISTER(0x5))
#define KW_EGIGA0_BASE (KW_REGISTER(0x72000))
diff --git a/arch/arm/mvebu-common/timer.c b/arch/arm/mvebu-common/timer.c
index b7aa645..40c4bc2 100644
--- a/arch/arm/mvebu-common/timer.c
+++ b/arch/arm/mvebu-common/timer.c
@@ -9,73 +9,66 @@
#include asm/io.h
#include asm/arch/soc.h
-#define UBOOT_CNTR 0 /* counter to use for uboot timer */
-
-/* Timer reload and current value registers */
-struct kwtmr_val {
- u32 reload; /* Timer reload reg */
- u32 val;/* Timer value reg */
-};
-
-/* Timer registers */
-struct kwtmr_registers {
- u32 ctrl; /* Timer control reg */
- u32 pad[3];
- struct kwtmr_val tmr[2];
- u32 wdt_reload;
- u32 wdt_val;
-};
-
-struct kwtmr_registers *kwtmr_regs = (struct kwtmr_registers *)KW_TIMER_BASE;
+#define UBOOT_CNTR 0 /* counter to use for U-Boot timer */
/*
* ARM Timers Registers Map
*/
-#define CNTMR_CTRL_REG kwtmr_regs-ctrl
-#define CNTMR_RELOAD_REG(tmrnum) kwtmr_regs-tmr[tmrnum].reload
-#define CNTMR_VAL_REG(tmrnum) kwtmr_regs-tmr[tmrnum].val
+#define CNTMR_CTRL_REG tmr_regs-ctrl
+#define CNTMR_RELOAD_REG(tmrnum) tmr_regs-tmr[tmrnum].reload
+#define CNTMR_VAL_REG(tmrnum) tmr_regs-tmr[tmrnum].val
/*
* ARM Timers Control Register
* CPU_TIMERS_CTRL_REG (CTCR)
*/
#define CTCR_ARM_TIMER_EN_OFFS(cntr) (cntr * 2)
-#define CTCR_ARM_TIMER_EN_MASK(cntr) (1 CTCR_ARM_TIMER_EN_OFFS)
#define CTCR_ARM_TIMER_EN(cntr)(1
CTCR_ARM_TIMER_EN_OFFS(cntr))
-#define CTCR_ARM_TIMER_DIS(cntr) (0 CTCR_ARM_TIMER_EN_OFFS(cntr))
#define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1)
-#define CTCR_ARM_TIMER_AUTO_MASK(cntr) (1 1)
#define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 CTCR_ARM_TIMER_AUTO_OFFS(cntr))
-#define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 CTCR_ARM_TIMER_AUTO_OFFS(cntr))
-/*
- * ARM Timer\Watchdog Reload Register
- * CNTMR_RELOAD_REG (TRR)
- */
-#define TRG_ARM_TIMER_REL_OFFS 0
-#define TRG_ARM_TIMER_REL_MASK 0x
+/* Only Armada XP have the 25MHz enable bit (Kirkwood doesn't) */
+#if defined(CONFIG_ARMADA_XP)
+#define CTCR_ARM_TIMER_25MHZ_OFFS(cntr)(cntr + 11)
+#define CTCR_ARM_TIMER_25MHZ(cntr) (1 CTCR_ARM_TIMER_25MHZ_OFFS(cntr))
+#else
+#define CTCR_ARM_TIMER_25MHZ(cntr) 0
+#endif
-/*
- * ARM Timer\Watchdog Register
- * CNTMR_VAL_REG (TVRG)
- */
-#define TVR_ARM_TIMER_OFFS 0
-#define TVR_ARM_TIMER_MASK 0x
-#define TVR_ARM_TIMER_MAX 0x
#define TIMER_LOAD_VAL 0x
-#define READ_TIMER (readl(CNTMR_VAL_REG(UBOOT_CNTR)) /
\
-(CONFIG_SYS_TCLK / 1000))
+#define timestamp gd-arch.tbl
+#define lastdecgd-arch.lastinc
+
+/* Timer reload and current value registers */
+struct kwtmr_val {
+ u32 reload; /* Timer reload reg */
+ u32 val;/* Timer value reg */
+};
+
+/* Timer registers */
+struct kwtmr_registers {
+ u32 ctrl; /* Timer control reg */
+ u32 pad[3];
+ struct kwtmr_val tmr[4];
+ u32 wdt_reload;
+ u32 wdt_val;
+};
DECLARE_GLOBAL_DATA_PTR;
-#define timestamp gd-arch.tbl
-#define lastdec gd-arch.lastinc
+static struct kwtmr_registers *tmr_regs =
+ (struct kwtmr_registers *)MVEBU_TIMER_BASE;
+
+static inline ulong read_timer(void)
+{
+ return readl(CNTMR_VAL_REG(UBOOT_CNTR)) / (CONFIG_SYS_TCLK / 1000);
+}
ulong get_timer_masked(void)
{
- ulong now = READ_TIMER;
+ ulong now = read_timer();
[U-Boot] [PATCH v1 01/25] sf: Add M25PX64 SPI NOR flash ID
Add ID for this Numonix / STMicro chip.
Tested on Marvell DB-78460-BP board.
Signed-off-by: Stefan Roese s...@denx.de
Cc: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
drivers/mtd/spi/sf_params.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c
index ac886fd..b8186e9 100644
--- a/drivers/mtd/spi/sf_params.c
+++ b/drivers/mtd/spi/sf_params.c
@@ -71,6 +71,7 @@ const struct spi_flash_params spi_flash_params_table[] = {
{M25P32, 0x202016, 0x0, 64 * 1024,64, 0,
0},
{M25P64, 0x202017, 0x0, 64 * 1024, 128, 0,
0},
{M25P128,0x202018, 0x0, 256 * 1024,64, 0,
0},
+ {M25PX64,0x207117, 0x0, 64 * 1024, 128, 0,
SECT_4K},
{N25Q32, 0x20ba16, 0x0, 64 * 1024,64, RD_FULL,
WR_QPP | SECT_4K},
{N25Q32A,0x20bb16, 0x0, 64 * 1024,64, RD_FULL,
WR_QPP | SECT_4K},
{N25Q64, 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL,
WR_QPP | SECT_4K},
--
2.0.1
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[U-Boot] [PATCH v1 15/25] net: mvneta.c: Add support for the ethernet controller of the Marvell Armada XP SoC
This patch adds support for the NETA ethernet controller which is integrated in the Marvell Armada XP SoC's. This port is based on the Linux driver which has been stripped of the in U-Boot unused portions. Tested on the Marvell MV78460 eval board db-78460-bp. Signed-off-by: Stefan Roese s...@denx.de Cc: Joe Hershberger joe.hershber...@gmail.com --- drivers/net/Makefile |1 + drivers/net/mvneta.c | 1653 ++ include/netdev.h |1 + 3 files changed, 1655 insertions(+) create mode 100644 drivers/net/mvneta.c diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 6005f7e..a30254d 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -39,6 +39,7 @@ obj-$(CONFIG_MCFFEC) += mcffec.o mcfmii.o obj-$(CONFIG_MPC5xxx_FEC) += mpc5xxx_fec.o obj-$(CONFIG_MPC512x_FEC) += mpc512x_fec.o obj-$(CONFIG_MVGBE) += mvgbe.o +obj-$(CONFIG_MVNETA) += mvneta.o obj-$(CONFIG_NATSEMI) += natsemi.o obj-$(CONFIG_DRIVER_NE2000) += ne2000.o ne2000_base.o obj-$(CONFIG_DRIVER_AX88796L) += ax88796.o ne2000_base.o diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c new file mode 100644 index 000..a2a69b4 --- /dev/null +++ b/drivers/net/mvneta.c @@ -0,0 +1,1653 @@ +/* + * Driver for Marvell NETA network card for Armada XP and Armada 370 SoCs. + * + * U-Boot version: + * Copyright (C) 2014 Stefan Roese s...@denx.de + * + * Based on the Linux version which is: + * Copyright (C) 2012 Marvell + * + * Rami Rosen ros...@marvell.com + * Thomas Petazzoni thomas.petazz...@free-electrons.com + * + * SPDX-License-Identifier:GPL-2.0 + */ + +#include common.h +#include net.h +#include netdev.h +#include config.h +#include malloc.h +#include asm/io.h +#include asm/errno.h +#include phy.h +#include miiphy.h +#include watchdog.h +#include asm/arch/cpu.h +#include asm/arch/soc.h +#include linux/compat.h +#include linux/mbus.h + +#if !defined(CONFIG_PHYLIB) +# error Marvell mvneta requires PHYLIB +#endif + +/* Some linux - U-Boot compatibility stuff */ +#define netdev_err(dev, fmt, args...) \ + printf(fmt, ##args) +#define netdev_warn(dev, fmt, args...) \ + printf(fmt, ##args) +#define netdev_info(dev, fmt, args...) \ + printf(fmt, ##args) + +#define CONFIG_NR_CPUS 1 +#define BIT(nr)(1UL (nr)) +#define ETH_HLEN 14 /* Total octets in header */ + +/* 2(HW hdr) 14(MAC hdr) 4(CRC) 32(extra for cache prefetch) */ +#define WRAP (2 + ETH_HLEN + 4 + 32) +#define MTU1500 +#define RX_BUFFER_SIZE (ALIGN(MTU + WRAP, ARCH_DMA_MINALIGN)) + +#define MVNETA_SMI_TIMEOUT 1 + +/* Registers */ +#define MVNETA_RXQ_CONFIG_REG(q)(0x1400 + ((q) 2)) +#define MVNETA_RXQ_HW_BUF_ALLOCBIT(1) +#define MVNETA_RXQ_PKT_OFFSET_ALL_MASK (0xf 8) +#define MVNETA_RXQ_PKT_OFFSET_MASK(offs) ((offs) 8) +#define MVNETA_RXQ_THRESHOLD_REG(q) (0x14c0 + ((q) 2)) +#define MVNETA_RXQ_NON_OCCUPIED(v) ((v) 16) +#define MVNETA_RXQ_BASE_ADDR_REG(q) (0x1480 + ((q) 2)) +#define MVNETA_RXQ_SIZE_REG(q) (0x14a0 + ((q) 2)) +#define MVNETA_RXQ_BUF_SIZE_SHIFT 19 +#define MVNETA_RXQ_BUF_SIZE_MASK (0x1fff 19) +#define MVNETA_RXQ_STATUS_REG(q)(0x14e0 + ((q) 2)) +#define MVNETA_RXQ_OCCUPIED_ALL_MASK 0x3fff +#define MVNETA_RXQ_STATUS_UPDATE_REG(q) (0x1500 + ((q) 2)) +#define MVNETA_RXQ_ADD_NON_OCCUPIED_SHIFT 16 +#define MVNETA_RXQ_ADD_NON_OCCUPIED_MAX255 +#define MVNETA_PORT_RX_RESET0x1cc0 +#define MVNETA_PORT_RX_DMA_RESET BIT(0) +#define MVNETA_PHY_ADDR 0x2000 +#define MVNETA_PHY_ADDR_MASK 0x1f +#define MVNETA_SMI 0x2004 +#define MVNETA_PHY_REG_MASK0x1f +/* SMI register fields */ +#define MVNETA_SMI_DATA_OFFS 0 /* Data */ +#define MVNETA_SMI_DATA_MASK (0x MVNETA_SMI_DATA_OFFS) +#define MVNETA_SMI_DEV_ADDR_OFFS 16 /* PHY device address */ +#define MVNETA_SMI_REG_ADDR_OFFS 21 /* PHY device reg addr*/ +#define MVNETA_SMI_OPCODE_OFFS 26 /* Write/Read opcode */ +#define MVNETA_SMI_OPCODE_READ (1 MVNETA_SMI_OPCODE_OFFS) +#define MVNETA_SMI_READ_VALID (1 27) /* Read Valid */ +#define MVNETA_SMI_BUSY(1 28) /* Busy */ +#define MVNETA_MBUS_RETRY 0x2010 +#define MVNETA_UNIT_INTR_CAUSE 0x2080 +#define MVNETA_UNIT_CONTROL 0x20B0 +#define MVNETA_PHY_POLLING_ENABLE BIT(1) +#define MVNETA_WIN_BASE(w) (0x2200 + ((w) 3)) +#define MVNETA_WIN_SIZE(w) (0x2204 + ((w) 3))
[U-Boot] [PATCH v1 16/25] net: phy.h: Make PHY autonegotiation timeout configurable
The Marvell MV78460 eval board DB-78460-BP seems to need a longer
PHY autonegotiation timeout than the standard 4 seconds. So lets
make this timeout configurable. If not defined in the board config
header the original 4000ms is used.
Signed-off-by: Stefan Roese s...@denx.de
Cc: Joe Hershberger joe.hershber...@gmail.com
---
include/phy.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/phy.h b/include/phy.h
index d3ecd63..713742e 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -32,7 +32,9 @@
#define PHY_10G_FEATURES (PHY_GBIT_FEATURES | \
SUPPORTED_1baseT_Full)
+#ifndef PHY_ANEG_TIMEOUT
#define PHY_ANEG_TIMEOUT 4000
+#endif
typedef enum {
--
2.0.1
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[U-Boot] [PATCH v1 07/25] arm: marvell: Move arch/kirkwood.h to arch/soc.h
This move makes is possible to use this header not only from kirkwood
platforms but from all Marvell mvebu platforms.
Signed-off-by: Stefan Roese s...@denx.de
---
arch/arm/cpu/arm926ejs/kirkwood/cpu.c| 2 +-
arch/arm/cpu/arm926ejs/kirkwood/mpp.c| 2 +-
arch/arm/include/asm/arch-kirkwood/config.h | 2 +-
arch/arm/include/asm/arch-kirkwood/{kirkwood.h = soc.h} | 0
arch/arm/mvebu-common/dram.c | 2 +-
arch/arm/mvebu-common/timer.c| 2 +-
board/LaCie/net2big_v2/net2big_v2.c | 2 +-
board/LaCie/netspace_v2/netspace_v2.c| 2 +-
board/LaCie/wireless_space/wireless_space.c | 2 +-
board/Marvell/dreamplug/dreamplug.c | 2 +-
board/Marvell/guruplug/guruplug.c| 2 +-
board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c | 2 +-
board/Marvell/openrd/openrd.c| 2 +-
board/Marvell/rd6281a/rd6281a.c | 2 +-
board/Marvell/sheevaplug/sheevaplug.c| 2 +-
board/Seagate/dockstar/dockstar.c| 2 +-
board/Seagate/goflexhome/goflexhome.c| 2 +-
board/buffalo/lsxl/lsxl.c| 2 +-
board/cloudengines/pogo_e02/pogo_e02.c | 2 +-
board/d-link/dns325/dns325.c | 2 +-
board/iomega/iconnect/iconnect.c | 2 +-
board/karo/tk71/tk71.c | 2 +-
board/keymile/km_arm/km_arm.c| 2 +-
board/raidsonic/ib62x0/ib62x0.c | 2 +-
drivers/block/mvsata_ide.c | 2 +-
drivers/gpio/kw_gpio.c | 2 +-
drivers/i2c/mvtwsi.c | 2 +-
drivers/mtd/nand/kirkwood_nand.c | 2 +-
drivers/net/mvgbe.c | 2 +-
drivers/rtc/mvrtc.h | 2 +-
drivers/spi/kirkwood_spi.c | 2 +-
drivers/usb/host/ehci-marvell.c | 2 +-
32 files changed, 31 insertions(+), 31 deletions(-)
rename arch/arm/include/asm/arch-kirkwood/{kirkwood.h = soc.h} (100%)
diff --git a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
index da80240..c8f90ba 100644
--- a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
@@ -12,7 +12,7 @@
#include u-boot/md5.h
#include asm/io.h
#include asm/arch/cpu.h
-#include asm/arch/kirkwood.h
+#include asm/arch/soc.h
#define BUFLEN 16
diff --git a/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
b/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
index 0ba6f09..7222504 100644
--- a/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
@@ -12,7 +12,7 @@
#include common.h
#include asm/io.h
#include asm/arch/cpu.h
-#include asm/arch/kirkwood.h
+#include asm/arch/soc.h
#include asm/arch/mpp.h
static u32 kirkwood_variant(void)
diff --git a/arch/arm/include/asm/arch-kirkwood/config.h
b/arch/arm/include/asm/arch-kirkwood/config.h
index 7a688e4..01bbfc4 100644
--- a/arch/arm/include/asm/arch-kirkwood/config.h
+++ b/arch/arm/include/asm/arch-kirkwood/config.h
@@ -23,7 +23,7 @@
#error SOC Name not defined
#endif /* CONFIG_KW88F6281 */
-#include asm/arch/kirkwood.h
+#include asm/arch/soc.h
#define CONFIG_ARM926EJS 1 /* Basic Architecture */
#define CONFIG_SYS_CACHELINE_SIZE 32
/* default Dcache Line length for kirkwood */
diff --git a/arch/arm/include/asm/arch-kirkwood/kirkwood.h
b/arch/arm/include/asm/arch-kirkwood/soc.h
similarity index 100%
rename from arch/arm/include/asm/arch-kirkwood/kirkwood.h
rename to arch/arm/include/asm/arch-kirkwood/soc.h
diff --git a/arch/arm/mvebu-common/dram.c b/arch/arm/mvebu-common/dram.c
index bb5989b..e468136 100644
--- a/arch/arm/mvebu-common/dram.c
+++ b/arch/arm/mvebu-common/dram.c
@@ -10,7 +10,7 @@
#include common.h
#include asm/io.h
#include asm/arch/cpu.h
-#include asm/arch/kirkwood.h
+#include asm/arch/soc.h
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/arm/mvebu-common/timer.c b/arch/arm/mvebu-common/timer.c
index a08f4a1..b7aa645 100644
--- a/arch/arm/mvebu-common/timer.c
+++ b/arch/arm/mvebu-common/timer.c
@@ -7,7 +7,7 @@
#include common.h
#include asm/io.h
-#include asm/arch/kirkwood.h
+#include asm/arch/soc.h
#define UBOOT_CNTR 0 /* counter to use for uboot timer */
diff --git a/board/LaCie/net2big_v2/net2big_v2.c
b/board/LaCie/net2big_v2/net2big_v2.c
index 4c3a9ba..471db77 100644
--- a/board/LaCie/net2big_v2/net2big_v2.c
+++ b/board/LaCie/net2big_v2/net2big_v2.c
@@ -13,7 +13,7 @@
#include command.h
#include i2c.h
#include asm/arch/cpu.h
-#include asm/arch/kirkwood.h
+#include asm/arch/soc.h
#include asm/arch/mpp.h
[U-Boot] [PATCH v1 17/25] i2c: mvtwsi: Add support for Marvell Armada XP
To support the Armada XP SoC, we just need to include the correct header. Signed-off-by: Stefan Roese s...@denx.de Cc: Heiko Schocher h...@denx.de --- drivers/i2c/mvtwsi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c index 4a49291..7cbf109 100644 --- a/drivers/i2c/mvtwsi.c +++ b/drivers/i2c/mvtwsi.c @@ -20,7 +20,7 @@ #if defined(CONFIG_ORION5X) #include asm/arch/orion5x.h -#elif defined(CONFIG_KIRKWOOD) +#elif (defined(CONFIG_KIRKWOOD) || defined(CONFIG_ARMADA_XP)) #include asm/arch/soc.h #else #error Driver mvtwsi not supported by SoC or board -- 2.0.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v1 08/25] arm: marvell: Move arch-kirkwood/spi.h to arch-mvebu/spi.h
This move makes it possible to use this kirkwood SPI driver from other
MVEBU platforms as well. This will be used by the upcoming Armada XP
support.
Signed-off-by: Stefan Roese s...@denx.de
---
arch/arm/include/asm/{arch-kirkwood = arch-mvebu}/spi.h | 0
drivers/spi/kirkwood_spi.c | 2 +-
2 files changed, 1 insertion(+), 1 deletion(-)
rename arch/arm/include/asm/{arch-kirkwood = arch-mvebu}/spi.h (100%)
diff --git a/arch/arm/include/asm/arch-kirkwood/spi.h
b/arch/arm/include/asm/arch-mvebu/spi.h
similarity index 100%
rename from arch/arm/include/asm/arch-kirkwood/spi.h
rename to arch/arm/include/asm/arch-mvebu/spi.h
diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
index de0e914..9710f12 100644
--- a/drivers/spi/kirkwood_spi.c
+++ b/drivers/spi/kirkwood_spi.c
@@ -13,8 +13,8 @@
#include spi.h
#include asm/io.h
#include asm/arch/soc.h
-#include asm/arch/spi.h
#include asm/arch/mpp.h
+#include asm/arch-mvebu/spi.h
static struct kwspi_registers *spireg = (struct kwspi_registers *)KW_SPI_BASE;
--
2.0.1
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[U-Boot] [PATCH v1 11/25] spi: kirkwood_spi.c: Compile MPP (pin-mux) only for kirkwood SoC's
Compile the pin multiplexing only on Kirkwood platforms. As the
Armada XP doesn't need it.
Signed-off-by: Stefan Roese s...@denx.de
Cc: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
drivers/spi/kirkwood_spi.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
index 9710f12..ce2ba96 100644
--- a/drivers/spi/kirkwood_spi.c
+++ b/drivers/spi/kirkwood_spi.c
@@ -13,22 +13,28 @@
#include spi.h
#include asm/io.h
#include asm/arch/soc.h
+#ifdef CONFIG_KIRKWOOD
#include asm/arch/mpp.h
+#endif
#include asm/arch-mvebu/spi.h
static struct kwspi_registers *spireg = (struct kwspi_registers *)KW_SPI_BASE;
+#ifdef CONFIG_KIRKWOOD
static u32 cs_spi_mpp_back[2];
+#endif
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
{
struct spi_slave *slave;
u32 data;
+#ifdef CONFIG_KIRKWOOD
static const u32 kwspi_mpp_config[2][2] = {
{ MPP0_SPI_SCn, 0 }, /* if cs == 0 */
{ MPP7_SPI_SCn, 0 } /* if cs != 0 */
};
+#endif
if (!spi_cs_is_valid(bus, cs))
return NULL;
@@ -51,15 +57,19 @@ struct spi_slave *spi_setup_slave(unsigned int bus,
unsigned int cs,
writel(KWSPI_SMEMRDIRQ, spireg-irq_cause);
writel(KWSPI_IRQMASK, spireg-irq_mask);
+#ifdef CONFIG_KIRKWOOD
/* program mpp registers to select SPI_CSn */
kirkwood_mpp_conf(kwspi_mpp_config[cs ? 1 : 0], cs_spi_mpp_back);
+#endif
return slave;
}
void spi_free_slave(struct spi_slave *slave)
{
+#ifdef CONFIG_KIRKWOOD
kirkwood_mpp_conf(cs_spi_mpp_back, NULL);
+#endif
free(slave);
}
--
2.0.1
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[U-Boot] [PATCH v1 04/25] spi: kirkwood_spi.c: Make global variable static
Signed-off-by: Stefan Roese s...@denx.de Cc: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- drivers/spi/kirkwood_spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c index 449e9f8..7d1c1f9 100644 --- a/drivers/spi/kirkwood_spi.c +++ b/drivers/spi/kirkwood_spi.c @@ -18,7 +18,7 @@ static struct kwspi_registers *spireg = (struct kwspi_registers *)KW_SPI_BASE; -u32 cs_spi_mpp_back[2]; +static u32 cs_spi_mpp_back[2]; struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, unsigned int max_hz, unsigned int mode) -- 2.0.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v1 18/25] arm: armada-xp: Add basic support for Marvell Armada XP SoC
This basic support for the Marvell Armada XP is base on the existing kirkwood
support. Which has been generatized by moving some common files into
common marvell locations.
This is in preparation for the upcoming Armada XP MV78460 support.
Signed-off-by: Stefan Roese s...@denx.de
---
Makefile | 2 +-
arch/arm/cpu/armv7/armada-xp/Makefile| 7 +
arch/arm/cpu/armv7/armada-xp/cpu.c | 186 +++
arch/arm/include/asm/arch-armada-xp/config.h | 80
arch/arm/include/asm/arch-armada-xp/cpu.h| 103 +++
arch/arm/include/asm/arch-armada-xp/soc.h| 57
6 files changed, 434 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/cpu/armv7/armada-xp/Makefile
create mode 100644 arch/arm/cpu/armv7/armada-xp/cpu.c
create mode 100644 arch/arm/include/asm/arch-armada-xp/config.h
create mode 100644 arch/arm/include/asm/arch-armada-xp/cpu.h
create mode 100644 arch/arm/include/asm/arch-armada-xp/soc.h
diff --git a/Makefile b/Makefile
index 106840a..e45a25c 100644
--- a/Makefile
+++ b/Makefile
@@ -636,7 +636,7 @@ ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35 mxs
vf610))
libs-y += arch/$(ARCH)/imx-common/
endif
-ifneq (,$(filter $(SOC), kirkwood))
+ifneq (,$(filter $(SOC), armada-xp kirkwood))
libs-y += arch/$(ARCH)/mvebu-common/
endif
diff --git a/arch/arm/cpu/armv7/armada-xp/Makefile
b/arch/arm/cpu/armv7/armada-xp/Makefile
new file mode 100644
index 000..885dcee
--- /dev/null
+++ b/arch/arm/cpu/armv7/armada-xp/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2014 Stefan Roese s...@denx.de
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y = cpu.o
diff --git a/arch/arm/cpu/armv7/armada-xp/cpu.c
b/arch/arm/cpu/armv7/armada-xp/cpu.c
new file mode 100644
index 000..3ad43d2
--- /dev/null
+++ b/arch/arm/cpu/armv7/armada-xp/cpu.c
@@ -0,0 +1,186 @@
+/*
+ * Copyright (C) 2014 Stefan Roese s...@denx.de
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include netdev.h
+#include asm/io.h
+#include asm/arch/cpu.h
+#include asm/arch/soc.h
+
+#define DDR_BASE_CS_OFF(n) (0x + ((n) 3))
+#define DDR_SIZE_CS_OFF(n) (0x0004 + ((n) 3))
+
+static struct mbus_win windows[] = {
+ /* PCIE MEM address space */
+ { DEFADR_PCI_MEM, 256 20, CPU_TARGET_PCIE13, CPU_ATTR_PCIE_MEM },
+
+ /* PCIE IO address space */
+ { DEFADR_PCI_IO, 64 10, CPU_TARGET_PCIE13, CPU_ATTR_PCIE_IO },
+
+ /* SPI */
+ { DEFADR_SPIF, 8 20, CPU_TARGET_DEVICEBUS_BOOTROM_SPI,
+ CPU_ATTR_SPIFLASH },
+
+ /* NOR */
+ { DEFADR_BOOTROM, 8 20, CPU_TARGET_DEVICEBUS_BOOTROM_SPI,
+ CPU_ATTR_BOOTROM },
+};
+
+void reset_cpu(unsigned long ignored)
+{
+ struct mvebu_system_registers *reg =
+ (struct mvebu_system_registers *)MVEBU_SYSTEM_REG_BASE;
+
+ writel(readl(reg-rstoutn_mask) | 1, reg-rstoutn_mask);
+ writel(readl(reg-sys_soft_rst) | 1, reg-sys_soft_rst);
+ while (1)
+ ;
+}
+
+#if defined(CONFIG_DISPLAY_CPUINFO)
+int print_cpuinfo(void)
+{
+ u16 devid = (readl(MVEBU_REG_PCIE_DEVID) 16) 0x;
+ u8 revid = readl(MVEBU_REG_PCIE_REVID) 0xff;
+
+ puts(SoC: );
+
+ switch (devid) {
+ case SOC_MV78460_ID:
+ puts(MV78460-);
+ break;
+ default:
+ puts(Unknown-);
+ break;
+ }
+
+ switch (revid) {
+ case 1:
+ puts(A0\n);
+ break;
+ case 2:
+ puts(B0\n);
+ break;
+ default:
+ puts(??\n);
+ break;
+ }
+
+ return 0;
+}
+#endif /* CONFIG_DISPLAY_CPUINFO */
+
+/*
+ * This function initialize Controller DRAM Fastpath windows.
+ * It takes the CS size information from the 0x1500 scratch registers
+ * and sets the correct windows sizes and base addresses accordingly.
+ *
+ * These values are set in the scratch registers by the Marvell
+ * DDR3 training code, which is executed by the BootROM before the
+ * main payload (U-Boot) is executed. This training code is currently
+ * only available in the Marvell U-Boot version. It needs to be
+ * ported to mainline U-Boot SPL at some point.
+ */
+static void update_sdram_window_sizes(void)
+{
+ u64 base = 0;
+ u32 size, temp;
+ int i;
+
+ for (i = 0; i SDRAM_MAX_CS; i++) {
+ size = readl((MVEBU_SDRAM_SCRATCH + (i * 8))) SDRAM_ADDR_MASK;
+ if (size != 0) {
+ size |= ~(SDRAM_ADDR_MASK);
+
+ /* Set Base Address */
+ temp = (base 0xFF00ll) | ((base 32) 0xF);
+ writel(temp, MVEBU_SDRAM_BASE + DDR_BASE_CS_OFF(i));
+
+ /*
+* Check if out of max window size and resize
+* the window
+*/
+
[U-Boot] [PATCH v1 25/25] Makefile: Add CONFIG_BUILD_TARGET to automatically build an special image
Add target to build it automatically upon make / MAKEALL. This can/should be set by board / cpu specific headers if a special U-Boot image is required for this SoC / board. E.g. used by Marvell Armada XP to automatically build the u-boot.kwb target. Signed-off-by: Stefan Roese s...@denx.de Cc: Masahiro Yamada yamad...@jp.panasonic.com --- Makefile | 5 + README | 8 2 files changed, 13 insertions(+) diff --git a/Makefile b/Makefile index e45a25c..44572c0 100644 --- a/Makefile +++ b/Makefile @@ -742,6 +742,11 @@ endif endif endif +# Add optional build target if defined in board/cpu/soc headers +ifneq ($(CONFIG_BUILD_TARGET),) +ALL-y += $(CONFIG_BUILD_TARGET:%=%) +endif + LDFLAGS_u-boot += $(LDFLAGS_FINAL) ifneq ($(CONFIG_SYS_TEXT_BASE),) LDFLAGS_u-boot += -Ttext $(CONFIG_SYS_TEXT_BASE) diff --git a/README b/README index fe5cacb..4b4633c 100644 --- a/README +++ b/README @@ -2657,6 +2657,14 @@ CBFS (Coreboot Filesystem) support 200 ms. - Configuration Management: + CONFIG_BUILD_TARGET + + Some SoCs need special image types (e.g. U-Boot binary + with a special header) as build targets. By defining + CONFIG_BUILD_TARGET in the SoC / board header, this + special image will be automatically built upon calling + make / MAKEALL. + CONFIG_IDENT_STRING If defined, this string will be added to the U-Boot -- 2.0.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] U-Boot Digest, Vol 73, Issue 46
Grazie per il tuo messaggio. Sono fuori azienda con accesso limitato alle mail fino al 3 Luglio. Thank you for your message I am out of office and will be back on Thursday the third of July. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] U-Boot Digest, Vol 73, Issue 47
Grazie per il tuo messaggio. Sono fuori azienda con accesso limitato alle mail fino al 3 Luglio. Thank you for your message I am out of office and will be back on Thursday the third of July. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v1 0/25] Add Marvell Armada XP MV78460 SoC support
-Original Message- From: Stefan Roese [mailto:s...@denx.de] Sent: 27 June 2014 15:25 To: u-boot@lists.denx.de Cc: Prafulla Wadaskar; tr...@ti.com Subject: [PATCH v1 0/25] Add Marvell Armada XP MV78460 SoC support This patch series adds support for the Marvell Armada XP SoC's. Specifically the MV78460. Basic support for the db-78460-bp evaluation board is added. Supporting the following interfaces: - UART - SPI (including SPI NOR flash) - I2C - Ethernet (neta) While doing this port, I tried to consolidate common Marvell code into the arch/arm/mvebu-common directory. This directory should be used to collect more common code for the MVEBU SoC's (Dove, Kirkwood, Armada 370, Armada 380, Armada XP). I started with Kirkwood and some of its interfaces. Dove is definitely a candidate to move some of its code into thise directory as well. Because of the renaming of some functions from kirkwood to mvebu (to make them better usable on other MVEBU SoCs), this patch series not only touches the ARM SoC specific files (in arch/arm/...). But also some device drivers (e.g. SPI, I2C). Separating these driver specific patches into different patches that are not depending on this ARM patch series seems hard if not impossible. Thats why I would really like to get this patch series to get applied completely be one custodian. Not sure if this could / should go through Tom directly? Only if all the subsystem custodians have given their Acked-by ... of course. Hi Stefan, I agree with you, since this patch series have huge changes it may go to Tom directly, I will review, test and provide ack/nack accordingly. Testing on Kirkwood based boards would be greatly appreciated. So anyone with access to some of those board, please give this patch series a try. I really hope that I didn't break anything while merging some of the code into the common mvebu directory. I will certainly help to test testing this stuff on all possible boards that I can access. Please note that this Armada XP port still requires the Binary Header (bin_hdr) from the Marvell U-Boot tree to be included as a binary blob into the resulting image (u-boot.kwb) that can be booted by the MVEBU BootROM. This binary bin_hdr is usually responsible for the DDR3 controller configuration and the DDR3 training. One way to extract this bin_hdr binary from an existing Marvell boot image right now is to use the kwbimage tool from Barebox. Please refer to the documentation thats available there for more details. Finally, last but not least, may thanks for your efforts and all the best for smooth migration ahead. Regards... Prafulla . . . Thanks, Stefan Stefan Roese (25): sf: Add M25PX64 SPI NOR flash ID arm: kirkwood: spi.h: Add some missing parenthesis spi: kirkwood_spi.c: Some fixes and cleanup spi: kirkwood_spi.c: Make global variable static spi: kirkwood_spi.c: cosmetic: Fix minor coding style issues arm: kirkwood: Move some SoC files into new arch/arm/mvebu-common arm: marvell: Move arch/kirkwood.h to arch/soc.h arm: marvell: Move arch-kirkwood/spi.h to arch- mvebu/spi.h arm: marvell: Rework timer.c to make it usable for other MVEBU platforms arm: mvebu: Add common mbus functions to use on Marvell SoCs spi: kirkwood_spi.c: Compile MPP (pin-mux) only for kirkwood SoC's arm: marvell: Extract kirkwood gpio functions into new common file gpio.c spi: kirkwood_spi.c: Change KW_SPI_BASE to MVEBU_SPI_BASE arm: kirkwood: Change naming of dram functions from km_foo() to mvebu_foo() net: mvneta.c: Add support for the ethernet controller of the Marvell Armada XP SoC net: phy.h: Make PHY autonegotiation timeout configurable i2c: mvtwsi: Add support for Marvell Armada XP arm: armada-xp: Add basic support for Marvell Armada XP SoC arm: armada-xp: Add basic support for the Marvell DB- 78460-BP board arm: kirkwood: Remove some dead code from cpu.c arm: kirkwood: Use mvebu new common mbus API tools/kwboot: Sync with latest barebox version to support Armada XP tools: Compile kwboot for Marvell Armada XP as those SoCs are now supported tools: kwbimage: Add image version 1 support for Armada XP / 370 Makefile: Add CONFIG_BUILD_TARGET to automatically build an special image Makefile | 9 + README | 8 + arch/arm/cpu/arm926ejs/kirkwood/Makefile | 4 +- arch/arm/cpu/arm926ejs/kirkwood/cpu.c | 174 +-- arch/arm/cpu/arm926ejs/kirkwood/mpp.c | 2 +- arch/arm/cpu/armv7/armada-xp/Makefile | 7 + arch/arm/cpu/armv7/armada-xp/cpu.c | 186 +++ arch/arm/include/asm/arch-armada-xp/config.h | 80 + arch/arm/include/asm/arch-armada-xp/cpu.h | 103 ++ arch/arm/include/asm/arch-armada-xp/soc.h
[U-Boot] [PATCH] Samsung: Goni: change maintainer to Robert Baldyga
Robert Baldyga will now take care of this board. Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com Cc: Robert Baldyga r.bald...@samsung.com Cc: Minkyu Kang mk7.k...@samsung.com --- boards.cfg | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/boards.cfg b/boards.cfg index 1527ebe..673e599 100644 --- a/boards.cfg +++ b/boards.cfg @@ -379,7 +379,7 @@ Active arm armv7 rmobile renesas koelsch Active arm armv7 rmobile renesas koelsch koelsch_nor koelsch:NORFLASH Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com Active arm armv7 rmobile renesas lager lager - Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com Active arm armv7 rmobile renesas lager lager_nor lager:NORFLASH Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com -Active arm armv7 s5pc1xx samsung goni s5p_goni - Przemyslaw Marczak p.marc...@samsung.com +Active arm armv7 s5pc1xx samsung goni s5p_goni - Robert Baldyga r.bald...@samsung.com Active arm armv7 s5pc1xx samsung smdkc100 smdkc100 - Minkyu Kang mk7.k...@samsung.com Active arm armv7 socfpga altera socfpga socfpga_cyclone5 - - Active arm armv7 sunxi - sunxi Cubietrucksun7i:CUBIETRUCK,SPL,SUNXI_GMAC,RGMII - -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Samsung: Goni: change maintainer to Robert Baldyga
Hi Przemyslaw, Robert Baldyga will now take care of this board. Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com Cc: Robert Baldyga r.bald...@samsung.com Cc: Minkyu Kang mk7.k...@samsung.com --- boards.cfg | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/boards.cfg b/boards.cfg index 1527ebe..673e599 100644 --- a/boards.cfg +++ b/boards.cfg @@ -379,7 +379,7 @@ Active arm armv7 rmobile renesas koelsch Active arm armv7 rmobile renesas koelsch koelsch_nor koelsch:NORFLASH Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com Active arm armv7 rmobile renesas lager lager - Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com Active arm armv7 rmobile renesas lager lager_nor lager:NORFLASH Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com -Active arm armv7 s5pc1xx samsung gonis5p_goni - Przemyslaw Marczak p.marc...@samsung.com +Active arm armv7 s5pc1xx samsung goni s5p_goni - Robert Baldyga r.bald...@samsung.com Active arm armv7 s5pc1xx samsung smdkc100 smdkc100 - Minkyu Kang mk7.k...@samsung.com Active arm armv7 socfpga altera socfpga socfpga_cyclone5 - - Active arm armv7 sunxi - sunxi Cubietruck sun7i:CUBIETRUCK,SPL,SUNXI_GMAC,RGMII - Acked-by: Lukasz Majewski l.majew...@samsung.com -- Best regards, Lukasz Majewski Samsung RD Institute Poland (SRPOL) | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 02/11] board:samsung: add function boot_device() for checking boot medium
Dear Minkyu,
On 06/27/2014 11:40 AM, Minkyu Kang wrote:
Dear Przemyslaw Marczak,
On 26/06/14 23:15, Przemyslaw Marczak wrote:
It is possible to boot from a few media devices, especially
using a micro SD or eMMC slots. In this situation depends on
a boot device - some setup can be changeg.
This change adds function:
boot_device() - which returns an OM[1:5] bits value
This allows checking if boot device is SD(0x2).
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
Changes v3:
- new commit after separate one into two
---
board/samsung/common/board.c | 10 +-
include/samsung/misc.h | 7 +++
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index 9dc7c83..ecf3f76 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -41,6 +41,13 @@ int __exynos_power_init(void)
int exynos_power_init(void)
__attribute__((weak, alias(__exynos_power_init)));
+unsigned int boot_device(void)
+{
+ unsigned int om_stat = samsung_get_base_power();
+
+ return BOOT_DEVICE(readl(om_stat));
+}
+
#if defined CONFIG_EXYNOS_TMU
/* Boot Time Thermal Analysis for SoC temperature threshold breach */
static void boot_temp_check(void)
@@ -243,19 +250,20 @@ int board_eth_init(bd_t *bis)
int board_mmc_init(bd_t *bis)
{
int ret;
+
#ifdef CONFIG_DWMMC
/* dwmmc initializattion for available channels */
ret = exynos_dwmmc_init(gd-fdt_blob);
if (ret)
debug(dwmmc init failed\n);
#endif
-
#ifdef CONFIG_SDHCI
/* mmc initializattion for available channels */
ret = exynos_mmc_init(gd-fdt_blob);
if (ret)
debug(mmc init failed\n);
#endif
+
return ret;
}
#endif
diff --git a/include/samsung/misc.h b/include/samsung/misc.h
index 10653a1..57bac7d 100644
--- a/include/samsung/misc.h
+++ b/include/samsung/misc.h
@@ -28,4 +28,11 @@ void check_boot_mode(void);
void draw_logo(void);
#endif
+#define BOOT_DEVICE_SDMMC 0x2
+#define BOOT_DEVICE_MASK 0x1f
+#define BOOT_DEVICE_SHIFT 0x1
+#define BOOT_DEVICE(x) (((x) BOOT_DEVICE_SHIFT) BOOT_DEVICE_MASK)
+
+unsigned int boot_device(void);
Hm, do we need to make this function to non-static?
If so, it should be placed in power.c - get_om_stat()?
Thanks,
Minkyu Kang.
It is non-static because it is called also outside this file, so I will
move it to power.c.
Thank you,
--
Przemyslaw Marczak
Samsung RD Institute Poland
Samsung Electronics
p.marc...@samsung.com
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Re: [U-Boot] [PATCH v3 06/11] arm:reset: call the reset_misc() before the cpu reset
On 06/27/2014 11:40 AM, Minkyu Kang wrote:
Dear Przemyslaw Marczak,
On 26/06/14 23:15, Przemyslaw Marczak wrote:
On an Odroid U3 board, the SOC is unable to reset the eMMC card
in the DWMMC mode by the cpu software reset. Manual reset of the card
by switching proper gpio pin - fixes this issue.
Such solution needs to add a call to pre reset function.
This is done by the reset_misc() function, which is called before reset_cpu().
The function reset_misc() is a weak function.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
Cc: Albert ARIBAUD albert.u.b...@aribaud.net
Cc: Tom Rini tr...@ti.com
---
arch/arm/lib/reset.c | 7 +++
include/common.h | 1 +
2 files changed, 8 insertions(+)
diff --git a/arch/arm/lib/reset.c b/arch/arm/lib/reset.c
index 7a03580..3b39466 100644
--- a/arch/arm/lib/reset.c
+++ b/arch/arm/lib/reset.c
@@ -23,6 +23,11 @@
#include common.h
+void __reset_misc(void) {}
+
+void reset_misc(void)
+ __attribute((weak, alias(__reset_misc)));
+
int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
puts (resetting ...\n);
@@ -30,6 +35,8 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
udelay (5); /* wait 50 ms */
disable_interrupts();
+
+ reset_misc();
reset_cpu(0);
/*NOTREACHED*/
diff --git a/include/common.h b/include/common.h
index 232136c..04bab78 100644
--- a/include/common.h
+++ b/include/common.h
@@ -629,6 +629,7 @@ int checkicache (void);
int checkdcache (void);
void upmconfig (unsigned int, unsigned int *, unsigned int);
ulong get_tbclk (void);
+void reset_misc(void);
void reset_cpu (ulong addr);
#if defined (CONFIG_OF_LIBFDT) defined (CONFIG_OF_BOARD_SETUP)
void ft_cpu_setup(void *blob, bd_t *bd);
I'm not sure that we really need to add this function to arm common.
We can do this in reset_cpu (arch/arm/cpu/armv7/exynos/soc.c).
But if other SoCs also need to add such things then, it can be added as arm
common.
Thanks,
Minkyu Kang.
No one used this before, so probably better is to move it into exynos
soc.c code.
Thank you,
--
Przemyslaw Marczak
Samsung RD Institute Poland
Samsung Electronics
p.marc...@samsung.com
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Re: [U-Boot] [PATCH v3 03/11] board:samsung: check the boot device and init the right mmc driver.
On 06/27/2014 11:40 AM, Minkyu Kang wrote:
Dear Przemyslaw Marczak,
On 26/06/14 23:15, Przemyslaw Marczak wrote:
It is possible to boot device using a micro SD or eMMC slots.
In this situation, boot device should be registered as a block
device 0 in the MMC framework, because CONFIG_SYS_MMC_ENV_DEV
is usually set to 0 in the most config cases.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
Changes V3:
- separate two changes into two commits
---
board/samsung/common/board.c | 24 +---
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index ecf3f76..f07a900 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -251,18 +251,28 @@ int board_mmc_init(bd_t *bis)
{
int ret;
+ if (boot_device() == BOOT_DEVICE_SDMMC) {
+#ifdef CONFIG_SDHCI
+ /* mmc initializattion for available channels */
+ ret = exynos_mmc_init(gd-fdt_blob);
+#endif
#ifdef CONFIG_DWMMC
- /* dwmmc initializattion for available channels */
- ret = exynos_dwmmc_init(gd-fdt_blob);
- if (ret)
- debug(dwmmc init failed\n);
+ /* dwmmc initializattion for available channels */
+ ret = exynos_dwmmc_init(gd-fdt_blob);
+#endif
+ } else {
+#ifdef CONFIG_DWMMC
+ /* dwmmc initializattion for available channels */
+ ret = exynos_dwmmc_init(gd-fdt_blob);
#endif
#ifdef CONFIG_SDHCI
- /* mmc initializattion for available channels */
- ret = exynos_mmc_init(gd-fdt_blob);
+ /* mmc initializattion for available channels */
+ ret = exynos_mmc_init(gd-fdt_blob);
+#endif
+ }
+
It looks little confused.
Could you please re-arrange this code like this?
#ifdef CONFIG_SDHCI
if (boot) {
} else {
}
#endif
#ifdef CONFIG_DWMMC
if (boot) {
} else {
}
#endif
Thanks,
Minkyu Kang.
There are few schemes:
- defined SDHCI and DWMMC or
- defined SDHCI only or
- defined DWMMC only or
So I need #ifdefs to take into account those all schemes.
To clean some mess I can do something like this:
static int init_sdhci(void) {
#ifdef CONFIG_SDHCI
/* mmc initializattion for available channels */
return exynos_mmc_init(gd-fdt_blob);
#else
return 0;
#endif
}
static int init_dwmmc(void) {
#ifdef CONFIG_DWMMC
/* dwmmc initializattion for available channels */
return exynos_dwmmc_init(gd-fdt_blob);
#else
return 0;
#endif
}
#ifdef CONFIG_GENERIC_MMC
int board_mmc_init(bd_t *bis)
{
int ret;
if (boot_device() == BOOT_DEVICE_SDMMC) {
ret = init_sdhci();
ret |= init_dwmmc();
} else {
ret = init_dwmmc();
ret |= init_sdhci();
}
if (ret)
debug(mmc init failed\n);
return ret;
}
#endif
or with the ternary operator:
int board_mmc_init(bd_t *bis)
{
int ret;
int sd_boot = (boot_device() == BOOT_DEVICE_SDMMC);
sd_boot ? ((ret = init_sdhci()) (ret |= init_dwmmc()))
: ((ret = init_dwmmc()) (ret |= init_sdhci()));
if (ret)
debug(mmc init failed\n);
return ret;
}
Thank you,
--
Przemyslaw Marczak
Samsung RD Institute Poland
Samsung Electronics
p.marc...@samsung.com
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Re: [U-Boot] [PATCH v3 07/11] samsung: board: enable support of multiple board types
On 06/27/2014 11:40 AM, Minkyu Kang wrote: On 26/06/14 23:15, Przemyslaw Marczak wrote: This change adds declaration of functions: - set_board_type() - called at checkboard() - get_board_type() - called at checkboard() - get_board_name() For supporting multiple board types in a one config - it is welcome to display the current board model. This is what get_board_type() should return. Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com Cc: Piotr Wilczek p.wilc...@samsung.com Cc: Minkyu Kang mk7.k...@samsung.com --- Changes v3: - change the commit order - include/samsung/misc.h: add new functions declaration - update a commit message --- board/samsung/common/board.c | 7 +++ include/samsung/misc.h | 5 + 2 files changed, 12 insertions(+) diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c index fd5f21f..f2dbfa0 100644 --- a/board/samsung/common/board.c +++ b/board/samsung/common/board.c @@ -96,6 +96,7 @@ int board_init(void) #ifdef CONFIG_EXYNOS_SPI spi_init(); #endif + return exynos_init(); } @@ -285,7 +286,13 @@ int checkboard(void) board_name = fdt_getprop(gd-fdt_blob, 0, model, NULL); printf(Board: %s\n, board_name ? board_name : unknown); +#ifdef CONFIG_BOARD_TYPES + set_board_type(); + + const char *board_type = get_board_type(); please don't declare local variable at middle of function. ok, I will fix this. + printf(Model: %s\n, board_type ? board_type : unknown); +#endif return 0; } #endif diff --git a/include/samsung/misc.h b/include/samsung/misc.h index c3fcc29..fcec5ea 100644 --- a/include/samsung/misc.h +++ b/include/samsung/misc.h @@ -40,5 +40,10 @@ char *get_dfu_alt_system(void); char *get_dfu_alt_boot(void); void set_dfu_alt_info(void); #endif +#ifdef CONFIG_BOARD_TYPES +void set_board_type(void); +const char *get_board_type(void); +const char *get_board_name(void); +#endif #endif /* __SAMSUNG_MISC_COMMON_H__ */ Thank you for review. Regards, -- Przemyslaw Marczak Samsung RD Institute Poland Samsung Electronics p.marc...@samsung.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 03/11] board:samsung: check the boot device and init the right mmc driver.
hello Jaehoon,
On 06/27/2014 11:45 AM, Jaehoon Chung wrote:
On 06/27/2014 06:40 PM, Minkyu Kang wrote:
Dear Przemyslaw Marczak,
On 26/06/14 23:15, Przemyslaw Marczak wrote:
It is possible to boot device using a micro SD or eMMC slots.
In this situation, boot device should be registered as a block
device 0 in the MMC framework, because CONFIG_SYS_MMC_ENV_DEV
is usually set to 0 in the most config cases.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
Changes V3:
- separate two changes into two commits
---
board/samsung/common/board.c | 24 +---
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index ecf3f76..f07a900 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -251,18 +251,28 @@ int board_mmc_init(bd_t *bis)
{
int ret;
+ if (boot_device() == BOOT_DEVICE_SDMMC) {
+#ifdef CONFIG_SDHCI
+ /* mmc initializattion for available channels */
+ ret = exynos_mmc_init(gd-fdt_blob);
+#endif
#ifdef CONFIG_DWMMC
- /* dwmmc initializattion for available channels */
- ret = exynos_dwmmc_init(gd-fdt_blob);
- if (ret)
- debug(dwmmc init failed\n);
+ /* dwmmc initializattion for available channels */
+ ret = exynos_dwmmc_init(gd-fdt_blob);
+#endif
+ } else {
+#ifdef CONFIG_DWMMC
+ /* dwmmc initializattion for available channels */
+ ret = exynos_dwmmc_init(gd-fdt_blob);
#endif
#ifdef CONFIG_SDHCI
- /* mmc initializattion for available channels */
- ret = exynos_mmc_init(gd-fdt_blob);
+ /* mmc initializattion for available channels */
+ ret = exynos_mmc_init(gd-fdt_blob);
+#endif
+ }
+
It looks little confused.
Could you please re-arrange this code like this?
If re-arrange the below code, i want to call the dwmmc-init function at first.
Is there a special reason for sequence(sdhci-dwmmc)?
Best Regards,
Jaehoon Chung
Please look at my proposed solution in the reply to Minkyu email.
Thanks,
--
Przemyslaw Marczak
Samsung RD Institute Poland
Samsung Electronics
p.marc...@samsung.com
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[U-Boot] [PATCH] doc/README.falcon: Clarify steps slightly.
Make it clear that we need to load a legacy-formatted (aka uImage) kernel into memory as well as the DT if used before using spl export. Cc: Yebio Mesfin ymes...@ti.com Signed-off-by: Tom Rini tr...@ti.com --- doc/README.falcon |7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/doc/README.falcon b/doc/README.falcon index 82a254b..e9f8a75 100644 --- a/doc/README.falcon +++ b/doc/README.falcon @@ -31,9 +31,10 @@ informed to load it before running the kernel. To boot the kernel, these steps under a Falcon-aware U-Boot are required: 1. Boot the board into U-Boot. -Use the spl export command to generate the kernel parameters area or the DT. -U-Boot runs as when it boots the kernel, but stops before passing the control -to the kernel. +After loading the desired legacy-format kernel image into memory (and DT as +well, if used), use the spl export command to generate the kernel parameters +area or the DT. U-Boot runs as when it boots the kernel, but stops before +passing the control to the kernel. 2. Save the prepared snapshot into persistent media. The address where to save it must be configured into board configuration -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] usb: host: xhci: make sure to power up PHY
Hi
On 06/23/2014 04:25 PM, Felipe Balbi wrote:
some boards won't work if the PHY isn't explicitly
powered up.
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/usb/host/xhci-omap.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/host/xhci-omap.c b/drivers/usb/host/xhci-omap.c
index e667810..912b2bd 100644
--- a/drivers/usb/host/xhci-omap.c
+++ b/drivers/usb/host/xhci-omap.c
@@ -98,6 +98,7 @@ static int omap_xhci_core_init(struct omap_xhci *omap)
{
int ret = 0;
+ usb_phy_power(1);
Should this not be in the omap_usb_phy.c in the omap_enable_phy call below?
I mean you are enabling the PHY right?
omap_enable_phy(omap);
ret = dwc3_core_init(omap-dwc3_reg);
--
--
Dan Murphy
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Re: [U-Boot] [PATCH 1/2] usb: host: xhci: make sure to power up PHY
On 06/27/2014 10:36 AM, Felipe Balbi wrote:
On Fri, Jun 27, 2014 at 10:27:30AM -0500, Dan Murphy wrote:
Hi
On 06/23/2014 04:25 PM, Felipe Balbi wrote:
some boards won't work if the PHY isn't explicitly
powered up.
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/usb/host/xhci-omap.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/host/xhci-omap.c b/drivers/usb/host/xhci-omap.c
index e667810..912b2bd 100644
--- a/drivers/usb/host/xhci-omap.c
+++ b/drivers/usb/host/xhci-omap.c
@@ -98,6 +98,7 @@ static int omap_xhci_core_init(struct omap_xhci *omap)
{
int ret = 0;
+ usb_phy_power(1);
Should this not be in the omap_usb_phy.c in the omap_enable_phy call below?
I mean you are enabling the PHY right?
no, I'm powering it up :-) moreover omap_xhci_core_exit() calls
usb_power_power(0), so it's only balancing the calls.
OK that makes sense then
--
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Re: [U-Boot] [PATCH 1/2] usb: host: xhci: make sure to power up PHY
On Fri, Jun 27, 2014 at 10:27:30AM -0500, Dan Murphy wrote:
Hi
On 06/23/2014 04:25 PM, Felipe Balbi wrote:
some boards won't work if the PHY isn't explicitly
powered up.
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/usb/host/xhci-omap.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/host/xhci-omap.c b/drivers/usb/host/xhci-omap.c
index e667810..912b2bd 100644
--- a/drivers/usb/host/xhci-omap.c
+++ b/drivers/usb/host/xhci-omap.c
@@ -98,6 +98,7 @@ static int omap_xhci_core_init(struct omap_xhci *omap)
{
int ret = 0;
+ usb_phy_power(1);
Should this not be in the omap_usb_phy.c in the omap_enable_phy call below?
I mean you are enabling the PHY right?
no, I'm powering it up :-) moreover omap_xhci_core_exit() calls
usb_power_power(0), so it's only balancing the calls.
--
balbi
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[U-Boot] ARMv8 spin-table patches
Dear Albert, Wolfgang, Tom, I have seen some patches for PSCI. We don't have PSCI enabled on Freescale ARMv8 SoCs. Will spin-table patches be acceptable? York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Return value of run command
On Fri, May 30, 2014 at 05:03:36PM +0200, Enric Balletbo Serra wrote:
Hi all,
Should the command 'run something' return the value that returns
something or just return true if can execute something and false
if it can't ?
I'll explain. Imagine you have a variable that loads a file from the
mmc but this files doesn't exist.
loadfile=load mmc ${mmcdev} ${loadaddr} my-file
In the case you do the following script
if run loadfile; then echo true; else echo false; fi
the result is always true, either the file doesn't exist
OTOH, if you do :
if ${loadfile}; then echo true; else echo false; fi
Then the result is true if file exist and false if file doesn't exist.
For me looks like the run something command should return the result
of the command but this is not the behaviour. With current behaviour
something like CONFIG_EXTRA_ENV_SETTINGS from
include/configs/am335x_evm.h file,
129 echo SD/MMC found on device ${mmcdev}; \
130 if run loadbootenv; then \
131 echo Loaded environment from
${bootenv}; \
132 run importbootenv; \
133 fi; \
Either uEnv.txt file exist or not, the run loadbootenv always
returns true, so always tries to run run importbootenv. I supose
this is not the expected behaviour.
The question is. It's a problem with run command or with the
definition of CONFIG_EXTRA_ENV_SETTING, that should be something like
that:
- 130 if run loadbootenv; then \
+ 130 if ${loadbootenv}; then \
Sorry for sitting on this for so long. There's been a change in
behaviour that I'm going to go track down now and see what we can do
about.
--
Tom
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Re: [U-Boot] Return value of run command
On Fri, Jun 27, 2014 at 12:24:49PM -0400, Tom Rini wrote:
On Fri, May 30, 2014 at 05:03:36PM +0200, Enric Balletbo Serra wrote:
Hi all,
Should the command 'run something' return the value that returns
something or just return true if can execute something and false
if it can't ?
I'll explain. Imagine you have a variable that loads a file from the
mmc but this files doesn't exist.
loadfile=load mmc ${mmcdev} ${loadaddr} my-file
In the case you do the following script
if run loadfile; then echo true; else echo false; fi
the result is always true, either the file doesn't exist
OTOH, if you do :
if ${loadfile}; then echo true; else echo false; fi
Then the result is true if file exist and false if file doesn't exist.
For me looks like the run something command should return the result
of the command but this is not the behaviour. With current behaviour
something like CONFIG_EXTRA_ENV_SETTINGS from
include/configs/am335x_evm.h file,
129 echo SD/MMC found on device ${mmcdev}; \
130 if run loadbootenv; then \
131 echo Loaded environment from
${bootenv}; \
132 run importbootenv; \
133 fi; \
Either uEnv.txt file exist or not, the run loadbootenv always
returns true, so always tries to run run importbootenv. I supose
this is not the expected behaviour.
The question is. It's a problem with run command or with the
definition of CONFIG_EXTRA_ENV_SETTING, that should be something like
that:
- 130 if run loadbootenv; then \
+ 130 if ${loadbootenv}; then \
Sorry for sitting on this for so long. There's been a change in
behaviour that I'm going to go track down now and see what we can do
about.
Derp-de-derp, yes, we've fixed this regression since then, time to track
down if I've got an outstanding pull request to Albert somewhere..
--
Tom
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Re: [U-Boot] ARMv8 spin-table patches
On Fri, Jun 27, 2014 at 09:11:39AM -0700, York Sun wrote: Dear Albert, Wolfgang, Tom, I have seen some patches for PSCI. We don't have PSCI enabled on Freescale ARMv8 SoCs. Will spin-table patches be acceptable? Baring some technical reasons why no, you can't do that, yes, lets see the patches :) -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] ARM: tegra: Disable VPR
On Tue, Jun 24, 2014 at 11:45:29AM +0900, Alexandre Courbot wrote: From: Bryan Wu pe...@nvidia.com On Tegra114 and Tegra124 platforms, certain display-related registers cannot be accessed unless the VPR registers are programmed. For bootloader, we probably don't care about VPR, so we disable it (which counts as programming it, and allows those display-related registers to be accessed. This patch is based on the commit 5f499646c83ba08079f3fdff6591f638a0ce4c0c in Chromium OS U-Boot project. Signed-off-by: Andrew Chew ac...@nvidia.com Signed-off-by: Jimmy Zhang jimmzh...@nvidia.com Signed-off-by: Bryan Wu pe...@nvidia.com [acourbot: ensure write went through, vpr.c style changes] Signed-off-by: Alexandre Courbot acour...@nvidia.com Reviewed-by: Stephen Warren swar...@nvidia.com Cc: Tom Warren twar...@nvidia.com Cc: Stephen Warren swar...@nvidia.com Cc: Terje Bergstrom tbergst...@nvidia.com --- Changes since v2: - Remove useless switch case Changes since v1: - Use proper defines for fields values - Move MC layout to T124 arch as it is exclusive to it - Only compile VPR support if T124 is enabled arch/arm/cpu/tegra-common/Makefile | 1 + arch/arm/cpu/tegra-common/ap.c | 3 ++ arch/arm/cpu/tegra-common/vpr.c | 35 +++ arch/arm/include/asm/arch-tegra/ap.h| 9 ++ arch/arm/include/asm/arch-tegra124/mc.h | 49 + 5 files changed, 97 insertions(+) create mode 100644 arch/arm/cpu/tegra-common/vpr.c create mode 100644 arch/arm/include/asm/arch-tegra124/mc.h Tested-by: Thierry Reding tred...@nvidia.com pgphvNHD9uVDy.pgp Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [Patch v1 3/4] ARMv8/ls2085a: Enable secondary cores
Spin table is at the very beginning of boot page. All cores are released by the first entry address. If individual entry address is needed, undef CONFIG_FSL_SMP_RELEASE_ALL. FDT fixup is called to update spin table address. Signed-off-by: York Sun york...@freescale.com --- This set depends on this bundle http://patchwork.ozlabs.org/bundle/yorksun/armv8_fsl-lsch3/ board/freescale/ls2085a/ls2085a.c |2 ++ include/configs/ls2085a_common.h |2 ++ 2 files changed, 4 insertions(+) diff --git a/board/freescale/ls2085a/ls2085a.c b/board/freescale/ls2085a/ls2085a.c index a18db1d..3daa787 100644 --- a/board/freescale/ls2085a/ls2085a.c +++ b/board/freescale/ls2085a/ls2085a.c @@ -88,6 +88,8 @@ void ft_board_setup(void *blob, bd_t *bd) phys_addr_t base; phys_size_t size; + ft_cpu_setup(blob, bd); + /* limit the memory size to bank 1 until Linux can handle 40-bit PA */ base = getenv_bootm_low(); size = getenv_bootm_size(); diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h index 49e2971..6da431f 100644 --- a/include/configs/ls2085a_common.h +++ b/include/configs/ls2085a_common.h @@ -56,6 +56,7 @@ */ #define SECONDARY_CPU_BOOT_PAGE(CONFIG_SYS_SDRAM_BASE) #define CPU_RELEASE_ADDR SECONDARY_CPU_BOOT_PAGE +#define CONFIG_FSL_SMP_RELEASE_ALL /* Generic Timer Definitions */ #define COUNTER_FREQUENCY 1200/* 12MHz */ @@ -171,6 +172,7 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x1000) +#define CONFIG_ARCH_EARLY_INIT_R /* Physical Memory Map */ /* fixme: these need to be checked against the board */ -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [Patch v1 4/4] ARMv8/ls2085a: Move u-boot location to make room for RCW
When booting with SP, RCW resides at the beginning of IFC NOR flash. Signed-off-by: York Sun york...@freescale.com --- This set depends on this bundle http://patchwork.ozlabs.org/bundle/yorksun/armv8_fsl-lsch3/ include/configs/ls2085a_common.h |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h index 6da431f..049329d 100644 --- a/include/configs/ls2085a_common.h +++ b/include/configs/ls2085a_common.h @@ -15,7 +15,7 @@ #define CONFIG_GICV3 /* Link Definitions */ -#define CONFIG_SYS_TEXT_BASE 0x3000 +#define CONFIG_SYS_TEXT_BASE 0x30001000 #define CONFIG_SYS_NO_FLASH -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [Patch v1 2/4] armv8/fsl-lsch3: Release secondary cores from boot hold off with Boot Page
Secondary cores need to be released from holdoff by boot release
registers. With GPP bootrom, they can boot from main memory
directly. Individual spin table is used for each core. If a single
release address is needed, defining macro CONFIG_FSL_SMP_RELEASE_ALL
will use the CPU_RELEASE_ADDR. Spin table and the boot page is reserved
in device tree so OS won't overwrite.
Signed-off-by: York Sun york...@freescale.com
Signed-off-by: Arnab Basu arnab.b...@freescale.com
---
This set depends on this bundle
http://patchwork.ozlabs.org/bundle/yorksun/armv8_fsl-lsch3/
arch/arm/cpu/armv8/fsl-lsch3/Makefile |2 +
arch/arm/cpu/armv8/fsl-lsch3/cpu.c| 13 ++
arch/arm/cpu/armv8/fsl-lsch3/cpu.h|1 +
arch/arm/cpu/armv8/fsl-lsch3/fdt.c| 56 +++
arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S | 119 +++---
arch/arm/cpu/armv8/fsl-lsch3/mp.c | 171 +
arch/arm/cpu/armv8/fsl-lsch3/mp.h | 36 +
arch/arm/cpu/armv8/transition.S | 63 +---
arch/arm/include/asm/arch-fsl-lsch3/config.h |3 +-
arch/arm/include/asm/arch-fsl-lsch3/immap_lsch3.h | 35 +
arch/arm/include/asm/macro.h | 81 ++
arch/arm/lib/gic_64.S | 10 +-
common/board_f.c |2 +-
13 files changed, 502 insertions(+), 90 deletions(-)
create mode 100644 arch/arm/cpu/armv8/fsl-lsch3/fdt.c
create mode 100644 arch/arm/cpu/armv8/fsl-lsch3/mp.c
create mode 100644 arch/arm/cpu/armv8/fsl-lsch3/mp.h
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/Makefile
b/arch/arm/cpu/armv8/fsl-lsch3/Makefile
index 9249537..f920eeb 100644
--- a/arch/arm/cpu/armv8/fsl-lsch3/Makefile
+++ b/arch/arm/cpu/armv8/fsl-lsch3/Makefile
@@ -7,3 +7,5 @@
obj-y += cpu.o
obj-y += lowlevel.o
obj-y += speed.o
+obj-$(CONFIG_MP) += mp.o
+obj-$(CONFIG_OF_LIBFDT) += fdt.o
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
index c129d03..47b947f 100644
--- a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
@@ -11,6 +11,7 @@
#include asm/io.h
#include asm/arch-fsl-lsch3/immap_lsch3.h
#include cpu.h
+#include mp.h
#include speed.h
#include fsl_mc.h
@@ -434,3 +435,15 @@ int cpu_eth_init(bd_t *bis)
#endif
return error;
}
+
+
+int arch_early_init_r(void)
+{
+ int rv;
+ rv = fsl_lsch3_wake_seconday_cores();
+
+ if (rv)
+ printf(Did not wake secondary cores\n);
+
+ return 0;
+}
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/cpu.h
b/arch/arm/cpu/armv8/fsl-lsch3/cpu.h
index 28544d7..2e3312b 100644
--- a/arch/arm/cpu/armv8/fsl-lsch3/cpu.h
+++ b/arch/arm/cpu/armv8/fsl-lsch3/cpu.h
@@ -5,3 +5,4 @@
*/
int fsl_qoriq_core_to_cluster(unsigned int core);
+u32 cpu_mask(void);
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/fdt.c
b/arch/arm/cpu/armv8/fsl-lsch3/fdt.c
new file mode 100644
index 000..cd34e16
--- /dev/null
+++ b/arch/arm/cpu/armv8/fsl-lsch3/fdt.c
@@ -0,0 +1,56 @@
+/*
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include libfdt.h
+#include fdt_support.h
+#include mp.h
+
+#ifdef CONFIG_MP
+void ft_fixup_cpu(void *blob)
+{
+ int off;
+ __maybe_unused u64 spin_tbl_addr = (u64)get_spin_tbl_addr();
+ u64 *reg;
+ u64 val;
+
+ off = fdt_node_offset_by_prop_value(blob, -1, device_type, cpu, 4);
+ while (off != -FDT_ERR_NOTFOUND) {
+ reg = (u64 *)fdt_getprop(blob, off, reg, 0);
+ if (reg) {
+ val = spin_tbl_addr;
+#ifndef CONFIG_FSL_SMP_RELEASE_ALL
+ val += id_to_core(fdt64_to_cpu(*reg)) * SIZE_BOOT_ENTRY;
+#endif
+ val = cpu_to_fdt64(val);
+ fdt_setprop_string(blob, off, enable-method,
+ spin-table);
+ fdt_setprop(blob, off, cpu-release-addr,
+ val, sizeof(val));
+ } else {
+ puts(cpu NULL\n);
+ }
+ off = fdt_node_offset_by_prop_value(blob, off, device_type,
+ cpu, 4);
+ }
+ /*
+* Boot page and spin table can be reserved here if not done staticlly
+* in device tree.
+*
+* fdt_add_mem_rsv(blob, bootpg,
+* *((u64 *)(__secondary_boot_page_size)));
+* If defined CONFIG_FSL_SMP_RELEASE_ALL, the release address should
+* also be reserved.
+*/
+}
+#endif
+
+void ft_cpu_setup(void *blob, bd_t *bd)
+{
+#ifdef CONFIG_MP
+ ft_fixup_cpu(blob);
+#endif
+}
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S
b/arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S
index b4720ae..162d3d6 100644
--- a/arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S
[U-Boot] [Patch v1 1/4] ARMv8/ls2085a: Fix CPU_RELEASE_ADDR
From: Arnab Basu arnab.b...@freescale.com Remove trailing UL from CONFIG_SYS_SDRAM_BASE to be used from assembly. Fix CPU_RELEASE_ADDR to use the beginning of SDRAM. Signed-off-by: Arnab Basu arnab.b...@freescale.com Signed-off-by: York Sun york...@freescale.com --- This set depends on this bundle http://patchwork.ozlabs.org/bundle/yorksun/armv8_fsl-lsch3/ include/configs/ls2085a_common.h | 12 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h index 2bd5a47..49e2971 100644 --- a/include/configs/ls2085a_common.h +++ b/include/configs/ls2085a_common.h @@ -45,14 +45,18 @@ #define CONFIG_SYS_FSL_DDR_INTLV_256B /* force 256 byte interleaving */ -/* SMP Definitions */ -#define CPU_RELEASE_ADDR CONFIG_SYS_INIT_SP_ADDR - -#define CONFIG_SYS_DDR_SDRAM_BASE 0x8000UL +#define CONFIG_SYS_DDR_SDRAM_BASE 0x8000 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x808000ULL +/* + * SMP Definitions + * Spin table is at the beginning of boot page. + */ +#define SECONDARY_CPU_BOOT_PAGE(CONFIG_SYS_SDRAM_BASE) +#define CPU_RELEASE_ADDR SECONDARY_CPU_BOOT_PAGE + /* Generic Timer Definitions */ #define COUNTER_FREQUENCY 1200/* 12MHz */ -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] doc/README.falcon: Clarify steps slightly.
Dear Tom, In message 1403874230-31939-1-git-send-email-tr...@ti.com you wrote: Make it clear that we need to load a legacy-formatted (aka uImage) kernel into memory as well as the DT if used before using spl export. Can this not also be a FIT image (or even a zImage)? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Buy land. They've stopped making it. - Mark Twain ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v1 22/25] tools/kwboot: Sync with latest barebox version to support Armada XP
Hi Stefan,
It's great to see you working on adding support for Marvell's new SoCs :)
Since now kwboot is going to support more SoCs except kirkwood it makes
sense to rename it to mvboot. I've sent this patch long ago, dunno if it
still applies:
http://patchwork.ozlabs.org/patch/219741/
Also, I'd like to test this series on some boards I have - do you have
patches on some git tree that can be pulled easily?
Luka
On Fri, Jun 27, 2014 at 11:55:08AM +0200, Stefan Roese wrote:
The barebox version of the kwboot tool has evolved a bit. To support
Armada XP and Dove. Additionally a few minor fixes have been applied.
So lets sync with the latest barebox version.
Please note that the main difference between both versions now is, that
the U-Boot version still supports the -p option, to dynamically patch
an image for UART boot mode. I didn't test it now though.
Signed-off-by: Stefan Roese s...@denx.de
---
tools/kwboot.c | 97
+-
1 file changed, 83 insertions(+), 14 deletions(-)
diff --git a/tools/kwboot.c b/tools/kwboot.c
index e773f01..c47970e 100644
--- a/tools/kwboot.c
+++ b/tools/kwboot.c
@@ -1,5 +1,6 @@
/*
- * Boot a Marvell Kirkwood SoC, with Xmodem over UART0.
+ * Boot a Marvell SoC, with Xmodem over UART0.
+ * supports Kirkwood, Dove, Armada 370, Armada XP
*
* (c) 2012 Daniel Stodden daniel.stod...@gmail.com
*
@@ -37,8 +38,12 @@ static unsigned char kwboot_msg_boot[] = {
0xBB, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77
};
-#define KWBOOT_MSG_REQ_DELAY 10 /* ms */
-#define KWBOOT_MSG_RSP_TIMEO 50 /* ms */
+static unsigned char kwboot_msg_debug[] = {
+ 0xDD, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77
+};
+
+#define KWBOOT_MSG_REQ_DELAY 1000 /* ms */
+#define KWBOOT_MSG_RSP_TIMEO 1000 /* ms */
/*
* Xmodem Transfers
@@ -184,6 +189,9 @@ kwboot_tty_send(int fd, const void *buf, size_t len)
int rc;
ssize_t n;
+ if (!buf)
+ return 0;
+
rc = -1;
do {
@@ -268,7 +276,10 @@ kwboot_bootmsg(int tty, void *msg)
int rc;
char c;
- kwboot_printv(Sending boot message. Please reboot the target...);
+ if (msg == NULL)
+ kwboot_printv(Please reboot the target into UART boot
mode...);
+ else
+ kwboot_printv(Sending boot message. Please reboot the
target...);
do {
rc = tcflush(tty, TCIOFLUSH);
@@ -293,6 +304,37 @@ kwboot_bootmsg(int tty, void *msg)
}
static int
+kwboot_debugmsg(int tty, void *msg)
+{
+ int rc;
+
+ kwboot_printv(Sending debug message. Please reboot the target...);
+
+ do {
+ char buf[16];
+
+ rc = tcflush(tty, TCIOFLUSH);
+ if (rc)
+ break;
+
+ rc = kwboot_tty_send(tty, msg, 8);
+ if (rc) {
+ usleep(KWBOOT_MSG_REQ_DELAY * 1000);
+ continue;
+ }
+
+ rc = kwboot_tty_recv(tty, buf, 16, KWBOOT_MSG_RSP_TIMEO);
+
+ kwboot_spinner();
+
+ } while (rc);
+
+ kwboot_printv(\n);
+
+ return rc;
+}
+
+static int
kwboot_xm_makeblock(struct kwboot_block *block, const void *data,
size_t size, int pnum)
{
@@ -300,6 +342,7 @@ kwboot_xm_makeblock(struct kwboot_block *block, const
void *data,
size_t n;
int i;
+ block-soh = SOH;
block-pnum = pnum;
block-_pnum = ~block-pnum;
@@ -326,9 +369,15 @@ kwboot_xm_sendblock(int fd, struct kwboot_block *block)
if (rc)
break;
- rc = kwboot_tty_recv(fd, c, 1, KWBOOT_BLK_RSP_TIMEO);
- if (rc)
- break;
+ do {
+ rc = kwboot_tty_recv(fd, c, 1, KWBOOT_BLK_RSP_TIMEO);
+ if (rc)
+ break;
+
+ if (c != ACK c != NAK c != CAN)
+ printf(%c, c);
+
+ } while (c != ACK c != NAK c != CAN);
if (c != ACK)
kwboot_progress(-1, '+');
@@ -511,7 +560,6 @@ kwboot_mmap_image(const char *path, size_t *size, int
prot)
void *img;
rc = -1;
- fd = -1;
img = NULL;
fd = open(path, O_RDONLY);
@@ -601,11 +649,15 @@ static void
kwboot_usage(FILE *stream, char *progname)
{
fprintf(stream,
- Usage: %s -b image [ -p ] [ -t ]
- [-B baud ] TTY\n, progname);
+ Usage: %s [-d | -b image | -D image ] [ -t ] [-B baud ]
TTY\n,
+ progname);
fprintf(stream, \n);
- fprintf(stream, -b image: boot image\n);
+ fprintf(stream,
+ -b image: boot image with preamble (Kirkwood, Armada
370/XP)\n);
fprintf(stream, -p: patch image to type 0x69 (uart boot)\n);
+ fprintf(stream,
+
[U-Boot] [PATCH 1/2] am43xx: Update EMIF DDR3 Configuration for AM43x GP
From: Franklin S. Cooper Jr fcoo...@ti.com
* Boot failures have been discovered due to a combination of routing issues and
non optimal ddr3 timings in the EMIF
* Since ddr3 timings are different after significant board layout changes
different timings are required for alpha, beta and production boards.
Signed-off-by: Franklin S. Cooper Jr fcoo...@ti.com
---
arch/arm/include/asm/arch-am33xx/omap.h |2 +
board/ti/am43xx/board.c | 101 +++
board/ti/am43xx/board.h | 11
3 files changed, 114 insertions(+)
diff --git a/arch/arm/include/asm/arch-am33xx/omap.h
b/arch/arm/include/asm/arch-am33xx/omap.h
index 0855d16..e5c0b0d 100644
--- a/arch/arm/include/asm/arch-am33xx/omap.h
+++ b/arch/arm/include/asm/arch-am33xx/omap.h
@@ -29,6 +29,8 @@
#define SRAM_SCRATCH_SPACE_ADDR0x40337C00
#define AM4372_BOARD_NAME_STARTSRAM_SCRATCH_SPACE_ADDR
#define AM4372_BOARD_NAME_END SRAM_SCRATCH_SPACE_ADDR + 0xC
+#define AM4372_BOARD_VERSION_START SRAM_SCRATCH_SPACE_ADDR + 0xD
+#define AM4372_BOARD_VERSION_END SRAM_SCRATCH_SPACE_ADDR + 0x14
#define QSPI_BASE 0x4790
#endif
#endif
diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c
index 054a452..5eaa4a5 100644
--- a/board/ti/am43xx/board.c
+++ b/board/ti/am43xx/board.c
@@ -68,6 +68,9 @@ static int read_eeprom(struct am43xx_board_id *header)
strncpy(am43xx_board_name, (char *)header-name, sizeof(header-name));
am43xx_board_name[sizeof(header-name)] = 0;
+ strncpy(am43xx_board_rev, (char *)header-version,
sizeof(header-version));
+ am43xx_board_rev[sizeof(header-version)] = 0;
+
return 0;
}
@@ -217,6 +220,44 @@ const struct emif_regs ddr3_emif_regs_400Mhz = {
.emif_rd_wr_exec_thresh = 0x0405
};
+/* EMIF DDR3 Configurations are different for beta AM43X GP EVMs */
+const struct emif_regs ddr3_emif_regs_400Mhz_beta = {
+ .sdram_config = 0x638413B2,
+ .ref_ctrl = 0x0C30,
+ .sdram_tim1 = 0xEAAAD4DB,
+ .sdram_tim2 = 0x266B7FDA,
+ .sdram_tim3 = 0x107F8678,
+ .read_idle_ctrl = 0x0005,
+ .zq_config = 0x50074BE4,
+ .temp_alert_config = 0x0,
+ .emif_ddr_phy_ctlr_1= 0x0E004008,
+ .emif_ddr_ext_phy_ctrl_1= 0x08020080,
+ .emif_ddr_ext_phy_ctrl_2= 0x0065,
+ .emif_ddr_ext_phy_ctrl_3= 0x0091,
+ .emif_ddr_ext_phy_ctrl_4= 0x00B5,
+ .emif_ddr_ext_phy_ctrl_5= 0x00E5,
+ .emif_rd_wr_exec_thresh = 0x0405
+};
+
+/* EMIF DDR3 Configurations are different for production AM43X GP EVMs */
+const struct emif_regs ddr3_emif_regs_400Mhz_production = {
+ .sdram_config = 0x638413B2,
+ .ref_ctrl = 0x0C30,
+ .sdram_tim1 = 0xEAAAD4DB,
+ .sdram_tim2 = 0x266B7FDA,
+ .sdram_tim3 = 0x107F8678,
+ .read_idle_ctrl = 0x0005,
+ .zq_config = 0x50074BE4,
+ .temp_alert_config = 0x0,
+ .emif_ddr_phy_ctlr_1= 0x0E004008,
+ .emif_ddr_ext_phy_ctrl_1= 0x08020080,
+ .emif_ddr_ext_phy_ctrl_2= 0x0066,
+ .emif_ddr_ext_phy_ctrl_3= 0x0091,
+ .emif_ddr_ext_phy_ctrl_4= 0x00B9,
+ .emif_ddr_ext_phy_ctrl_5= 0x00E6,
+ .emif_rd_wr_exec_thresh = 0x0405
+};
+
static const struct emif_regs ddr3_sk_emif_regs_400Mhz = {
.sdram_config = 0x638413b2,
.sdram_config2 = 0x,
@@ -262,6 +303,52 @@ const u32 ext_phy_ctrl_const_base_ddr3[] = {
0x08102040
};
+const u32 ext_phy_ctrl_const_base_ddr3_beta[] = {
+ 0x,
+ 0x0045,
+ 0x0046,
+ 0x0048,
+ 0x0047,
+ 0x,
+ 0x004C,
+ 0x0070,
+ 0x0085,
+ 0x00A3,
+ 0x,
+ 0x000C,
+ 0x0030,
+ 0x0045,
+ 0x0063,
+ 0x,
+ 0x0,
+ 0x0,
+ 0x4000,
+ 0x08102040
+};
+
+const u32 ext_phy_ctrl_const_base_ddr3_production[] = {
+ 0x,
+ 0x0044,
+ 0x0044,
+ 0x0046,
+ 0x0046,
+ 0x,
+ 0x0059,
+ 0x0077,
+ 0x0093,
+ 0x00A8,
+ 0x,
+ 0x0019,
+ 0x0037,
+ 0x0053,
+ 0x0068,
+ 0x,
+ 0x0,
+ 0x0,
+ 0x4000,
+ 0x08102040
+};
+
static const u32 ext_phy_ctrl_const_base_ddr3_sk[] = {
/* first 5 are taken care by emif_regs */
[U-Boot] [PATCH 2/2] am43xx: Tune the system to avoid DSS underflows
* This is done by limiting the ARM's bandwidth and setting DSS priority in
the EMIF controller to ensure underflows do not occur.
---
arch/arm/cpu/armv7/am33xx/ddr.c| 12
arch/arm/include/asm/arch-am33xx/cpu.h | 23 ++-
arch/arm/include/asm/arch-am33xx/hardware_am43xx.h |3 +
arch/arm/include/asm/emif.h| 15 -
board/ti/am43xx/board.c| 68 ++--
5 files changed, 111 insertions(+), 10 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/ddr.c b/arch/arm/cpu/armv7/am33xx/ddr.c
index bbe9d1a..fc66872 100644
--- a/arch/arm/cpu/armv7/am33xx/ddr.c
+++ b/arch/arm/cpu/armv7/am33xx/ddr.c
@@ -94,6 +94,18 @@ void config_sdram_emif4d5(const struct emif_regs *regs, int
nr)
writel(regs-emif_rd_wr_exec_thresh,
emif_reg[nr]-emif_rd_wr_exec_thresh);
+ /*
+* for most SOCs these registers won't need to be changed so only
+* write to these registers if someone explicitly has set the
+* register's value.
+*/
+ if(regs-emif_cos_config) {
+ writel(regs-emif_prio_class_serv_map,
emif_reg[nr]-emif_prio_class_serv_map);
+ writel(regs-emif_connect_id_serv_1_map,
emif_reg[nr]-emif_connect_id_serv_1_map);
+ writel(regs-emif_connect_id_serv_2_map,
emif_reg[nr]-emif_connect_id_serv_2_map);
+ writel(regs-emif_cos_config, emif_reg[nr]-emif_cos_config);
+ }
+
writel(regs-ref_ctrl, emif_reg[nr]-emif_sdram_ref_ctrl);
writel(regs-ref_ctrl, emif_reg[nr]-emif_sdram_ref_ctrl_shdw);
writel(regs-sdram_config, emif_reg[nr]-emif_sdram_config);
diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h
b/arch/arm/include/asm/arch-am33xx/cpu.h
index aa10fab..8dd69b3 100644
--- a/arch/arm/include/asm/arch-am33xx/cpu.h
+++ b/arch/arm/include/asm/arch-am33xx/cpu.h
@@ -489,6 +489,12 @@ struct ctrl_stat {
#define OMAP_GPIO_SETDATAOUT 0x0194
/* Control Device Register */
+
+ /* Control Device Register */
+#define MREQPRIO_0_SAB_INIT1_MASK 0xFF8F
+#define MREQPRIO_0_SAB_INIT0_MASK 0xFFF8
+#define MREQPRIO_1_DSS_MASK0xFF8F
+
struct ctrl_dev {
unsigned int deviceid; /* offset 0x00 */
unsigned int resv1[7];
@@ -502,10 +508,25 @@ struct ctrl_dev {
unsigned int macid1h; /* offset 0x3c */
unsigned int resv4[4];
unsigned int miisel;/* offset 0x50 */
- unsigned int resv5[106];
+ unsigned int resv5[7];
+ unsigned int mreqprio_0;/* offset 0x70 */
+ unsigned int mreqprio_1;/* offset 0x74 */
+ unsigned int resv6[97];
unsigned int efuse_sma; /* offset 0x1FC */
};
+/* Bandwidth Limiter Portion of the L3Fast Configuration Register */
+#define BW_LIMITER_BW_FRAC_MASK 0xFFE0
+#define BW_LIMITER_BW_INT_MASK 0xFFF0
+#define BW_LIMITER_BW_WATERMARK_MASK0xF800
+
+struct l3f_cfg_bwlimiter {
+ u32 padding0[2];
+ u32 modena_init0_bw_fractional;
+ u32 modena_init0_bw_integer;
+ u32 modena_init0_watermark_0;
+};
+
/* gmii_sel register defines */
#define GMII1_SEL_MII 0x0
#define GMII1_SEL_RMII 0x1
diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
index 15399dc..b470319 100644
--- a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
+++ b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
@@ -13,6 +13,9 @@
/* Module base addresses */
+/* L3 Fast Configuration Bandwidth Limiter Base Address */
+#define L3F_CFG_BWLIMITER 0x44005200
+
/* UART Base Address */
#define UART0_BASE 0x44E09000
diff --git a/arch/arm/include/asm/emif.h b/arch/arm/include/asm/emif.h
index 45668ca..b8d6bdc 100644
--- a/arch/arm/include/asm/emif.h
+++ b/arch/arm/include/asm/emif.h
@@ -642,11 +642,16 @@ struct emif_reg_struct {
u32 emif_ddr_phy_ctrl_1;
u32 emif_ddr_phy_ctrl_1_shdw;
u32 emif_ddr_phy_ctrl_2;
- u32 padding7[12];
+ u32 padding7[4];
+ u32 emif_prio_class_serv_map;
+ u32 emif_connect_id_serv_1_map;
+ u32 emif_connect_id_serv_2_map;
+ u32 padding8[5];
u32 emif_rd_wr_exec_thresh;
- u32 padding8[7];
+ u32 emif_cos_config;
+ u32 padding9[6];
u32 emif_ddr_phy_status[21];
- u32 padding9[27];
+ u32 padding10[27];
u32 emif_ddr_ext_phy_ctrl_1;
u32 emif_ddr_ext_phy_ctrl_1_shdw;
u32 emif_ddr_ext_phy_ctrl_2;
@@ -1137,6 +1142,10 @@ struct emif_regs {
u32 emif_rd_wr_lvl_rmp_ctl;
u32 emif_rd_wr_lvl_ctl;
u32 emif_rd_wr_exec_thresh;
+ u32 emif_prio_class_serv_map;
+ u32 emif_connect_id_serv_1_map;
+ u32 emif_connect_id_serv_2_map;
+ u32 emif_cos_config;
};
struct lpddr2_mr_regs {
diff --git
Re: [U-Boot] [PATCH v3 06/11] arm:reset: call the reset_misc() before the cpu reset
Hello Przemyslaw,
On 27-06-14 13:34, Przemyslaw Marczak wrote:
On 06/27/2014 11:40 AM, Minkyu Kang wrote:
Dear Przemyslaw Marczak,
On 26/06/14 23:15, Przemyslaw Marczak wrote:
On an Odroid U3 board, the SOC is unable to reset the eMMC card
in the DWMMC mode by the cpu software reset. Manual reset of the card
by switching proper gpio pin - fixes this issue.
Such solution needs to add a call to pre reset function.
This is done by the reset_misc() function, which is called before
reset_cpu().
The function reset_misc() is a weak function.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
Cc: Albert ARIBAUD albert.u.b...@aribaud.net
Cc: Tom Rini tr...@ti.com
---
arch/arm/lib/reset.c | 7 +++
include/common.h | 1 +
2 files changed, 8 insertions(+)
diff --git a/arch/arm/lib/reset.c b/arch/arm/lib/reset.c
index 7a03580..3b39466 100644
--- a/arch/arm/lib/reset.c
+++ b/arch/arm/lib/reset.c
@@ -23,6 +23,11 @@
#include common.h
+void __reset_misc(void) {}
+
+void reset_misc(void)
+__attribute((weak, alias(__reset_misc)));
+
can you please use __weak here and provide a prototype, wherever it
ends up in the end. It prevents 3 warnings and makes it type safe..
Regards,
Jeroen
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Re: [U-Boot] [PATCH] usb: ci_udc: fix interaction with CONFIG_USB_ETH_CDC
I added the last series of patches beginning from 2014-06-10 for testing purposes. The patches from 2014-05-29 were already applied. First series of patches: Applying: usb: ci_udc: call udc_disconnect() from ci_pullup() Applying: usb: ci_udc: fix freeing of ep0 req Applying: usb: ci_udc: fix probe error cleanup Applying: usb: ci_udc: clean up all allocations in unregister Calling tftp the first time after a reset runs fine, but calling it a second time ends always in a crash. I have to reset the device. Next patch: Applying: usb: ci_udc: terminate ep0 INs with a zlp when required Did not help. Next patch: Applying: usb: ci_udc: fix interaction with CONFIG_USB_ETH_CDC This helps! U-Boot does not crash anymore. But there is still a problem: I have to wait some seconds before I can run a second time tftp. This is the output from U-Boot: = run update_rootfs Updating rootfs ... using ci_udc, OUT ep- IN ep- STATUS ep- high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet USB network up! Using usb_ether device [snip] = run update_rootfs Updating rootfs ... using ci_udc, OUT ep- IN ep- STATUS ep- high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet ERROR: The remote end did not respond in time. at drivers/usb/gadget/ether.c:2388/usb_eth_init() Wait some seconds ... = run update_rootfs Updating rootfs ... using ci_udc, OUT ep- IN ep- STATUS ep- high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet USB network up! Using usb_ether device [snip] Best regards Jörg Krause On 06/25/2014 06:06 PM, Stephen Warren wrote: On 06/25/2014 07:51 AM, Marek Vasut wrote: On Monday, June 23, 2014 at 08:02:48 PM, Stephen Warren wrote: +CC Jorg, rest of email is intact. Jorg, does this patch fix your issue? Jorg's issue was timeouts during transfers, whereas this patch addresses cleanup issues once the device isn't being used any more. I can't imagine how this patch could influence the issue Jorg is seeing. From: Stephen Warren swar...@nvidia.com ci_udc.c's usb_gadget_unregister_driver() doesn't call driver-unbind() unlike other USB gadget drivers. Fix it to do this. Without this, when ether.c's CDC Ethernet device is torn down, eth_unbind() is never called, so dev-gadget is never set to NULL. For some reason, usb_eth_halt() is called both at the end of the first use of the Ethernet device, and prior to any subsequent use. Since dev-gadget is never cleared, all calls to usb_eth_halt() attempt to stop, disconnect, and clean up the device, resulting in double cleanup, which hangs U-Boot on my Tegra device at least. ci_udc allocates its own singleton EP0 request object, and cleans it up during usb_gadget_unregister_driver(). This appears necessary when using the USB gadget framework in U-Boot, since that does not allocate/free the EP0 request. However, the CDC Ethernet driver *does* allocate and free its own EP0 requests. Consequently, we must protect ci_ep_free_request() against double-freeing the request. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] usb: ci_udc: fix interaction with CONFIG_USB_ETH_CDC
I have tested a little bit more. It does NOT help waiting some seconds before running tftp again. Sometimes it just works running tfpd immediately after a previous tfpd. Sometimes waiting even a minute ends up in the described error. Odd, very odd, sorry :-) On 06/27/2014 11:37 PM, Jörg Krause wrote: I added the last series of patches beginning from 2014-06-10 for testing purposes. The patches from 2014-05-29 were already applied. First series of patches: Applying: usb: ci_udc: call udc_disconnect() from ci_pullup() Applying: usb: ci_udc: fix freeing of ep0 req Applying: usb: ci_udc: fix probe error cleanup Applying: usb: ci_udc: clean up all allocations in unregister Calling tftp the first time after a reset runs fine, but calling it a second time ends always in a crash. I have to reset the device. Next patch: Applying: usb: ci_udc: terminate ep0 INs with a zlp when required Did not help. Next patch: Applying: usb: ci_udc: fix interaction with CONFIG_USB_ETH_CDC This helps! U-Boot does not crash anymore. But there is still a problem: I have to wait some seconds before I can run a second time tftp. This is the output from U-Boot: = run update_rootfs Updating rootfs ... using ci_udc, OUT ep- IN ep- STATUS ep- high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet USB network up! Using usb_ether device [snip] = run update_rootfs Updating rootfs ... using ci_udc, OUT ep- IN ep- STATUS ep- high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet ERROR: The remote end did not respond in time. at drivers/usb/gadget/ether.c:2388/usb_eth_init() Wait some seconds ... = run update_rootfs Updating rootfs ... using ci_udc, OUT ep- IN ep- STATUS ep- high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet USB network up! Using usb_ether device [snip] Best regards Jörg Krause On 06/25/2014 06:06 PM, Stephen Warren wrote: On 06/25/2014 07:51 AM, Marek Vasut wrote: On Monday, June 23, 2014 at 08:02:48 PM, Stephen Warren wrote: +CC Jorg, rest of email is intact. Jorg, does this patch fix your issue? Jorg's issue was timeouts during transfers, whereas this patch addresses cleanup issues once the device isn't being used any more. I can't imagine how this patch could influence the issue Jorg is seeing. From: Stephen Warren swar...@nvidia.com ci_udc.c's usb_gadget_unregister_driver() doesn't call driver-unbind() unlike other USB gadget drivers. Fix it to do this. Without this, when ether.c's CDC Ethernet device is torn down, eth_unbind() is never called, so dev-gadget is never set to NULL. For some reason, usb_eth_halt() is called both at the end of the first use of the Ethernet device, and prior to any subsequent use. Since dev-gadget is never cleared, all calls to usb_eth_halt() attempt to stop, disconnect, and clean up the device, resulting in double cleanup, which hangs U-Boot on my Tegra device at least. ci_udc allocates its own singleton EP0 request object, and cleans it up during usb_gadget_unregister_driver(). This appears necessary when using the USB gadget framework in U-Boot, since that does not allocate/free the EP0 request. However, the CDC Ethernet driver *does* allocate and free its own EP0 requests. Consequently, we must protect ci_ep_free_request() against double-freeing the request. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] usb: ci_udc: fix interaction with CONFIG_USB_ETH_CDC
On 06/27/2014 03:37 PM, Jörg Krause wrote: I added the last series of patches beginning from 2014-06-10 for testing purposes. The patches from 2014-05-29 were already applied. First series of patches: Applying: usb: ci_udc: call udc_disconnect() from ci_pullup() Applying: usb: ci_udc: fix freeing of ep0 req Applying: usb: ci_udc: fix probe error cleanup Applying: usb: ci_udc: clean up all allocations in unregister Calling tftp the first time after a reset runs fine, I thought the issue you reported was that the *first* time you run the tftp command, it has issues such as timeouts? Did I misunderstand, or did that issue somehow go away? but calling it a second time ends always in a crash. I have to reset the device. Yes, issues running tftp (or perhaps similar commands too) failing the second time are expected with just those patches applied... Next patch: Applying: usb: ci_udc: terminate ep0 INs with a zlp when required Did not help. Next patch: Applying: usb: ci_udc: fix interaction with CONFIG_USB_ETH_CDC This helps! U-Boot does not crash anymore. Yes, that is certainly expected to solve issues with *multiple* invocations of tftp or similar commands and ethernet over ci_udc. The first hunk in that patch fixes something I probably introduced during one of my ci_udc patches (probably the one that you originally replied to usb: ci_udc: allow multiple buffer allocs per ep), but the second hunk fixes a problem that I /think/ has always been there. Did multiple invocations of tftp using ci_udc as the network device ever work for you before, without random crashes or memory leaks? But there is still a problem: I have to wait some seconds before I can run a second time tftp. This is the output from U-Boot: = run update_rootfs Updating rootfs ... using ci_udc, OUT ep- IN ep- STATUS ep- high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet USB network up! Using usb_ether device [snip] = run update_rootfs Updating rootfs ... using ci_udc, OUT ep- IN ep- STATUS ep- high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet ERROR: The remote end did not respond in time. at drivers/usb/gadget/ether.c:2388/usb_eth_init() Wait some seconds ... = run update_rootfs Updating rootfs ... using ci_udc, OUT ep- IN ep- STATUS ep- high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet USB network up! Using usb_ether device [snip] Hmm. That's odd. I didn't notice that, but I'll try retesting sometime. What exactly does $update_rootfs contain? It might be useful to know some details of your network topology (e.g. is the TFTP server on the machine that the USB cable is plugged into or further away, and are the machine and network lightly loaded) and rough sizes of the files you're downloading. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] usb: ci_udc: fix interaction with CONFIG_USB_ETH_CDC
On 06/27/2014 03:52 PM, Jörg Krause wrote: I have tested a little bit more. It does NOT help waiting some seconds before running tftp again. Sometimes it just works running tfpd immediately after a previous tfpd. Sometimes waiting even a minute ends up in the described error. Odd, very odd, sorry :-) OK, that makes a little more sense. Intermittent issues are fine, but intermittent issues affected by time delays are odd! Does the *first* invocation of tftp after the board is powered on always work perfectly? On 06/27/2014 11:37 PM, Jörg Krause wrote: I added the last series of patches beginning from 2014-06-10 for testing purposes. The patches from 2014-05-29 were already applied. First series of patches: Applying: usb: ci_udc: call udc_disconnect() from ci_pullup() Applying: usb: ci_udc: fix freeing of ep0 req Applying: usb: ci_udc: fix probe error cleanup Applying: usb: ci_udc: clean up all allocations in unregister Calling tftp the first time after a reset runs fine, but calling it a second time ends always in a crash. I have to reset the device. Next patch: Applying: usb: ci_udc: terminate ep0 INs with a zlp when required Did not help. Next patch: Applying: usb: ci_udc: fix interaction with CONFIG_USB_ETH_CDC This helps! U-Boot does not crash anymore. But there is still a problem: I have to wait some seconds before I can run a second time tftp. This is the output from U-Boot: = run update_rootfs Updating rootfs ... using ci_udc, OUT ep- IN ep- STATUS ep- high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet USB network up! Using usb_ether device [snip] = run update_rootfs Updating rootfs ... using ci_udc, OUT ep- IN ep- STATUS ep- high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet ERROR: The remote end did not respond in time. at drivers/usb/gadget/ether.c:2388/usb_eth_init() Wait some seconds ... = run update_rootfs Updating rootfs ... using ci_udc, OUT ep- IN ep- STATUS ep- high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet USB network up! Using usb_ether device [snip] Best regards Jörg Krause On 06/25/2014 06:06 PM, Stephen Warren wrote: On 06/25/2014 07:51 AM, Marek Vasut wrote: On Monday, June 23, 2014 at 08:02:48 PM, Stephen Warren wrote: +CC Jorg, rest of email is intact. Jorg, does this patch fix your issue? Jorg's issue was timeouts during transfers, whereas this patch addresses cleanup issues once the device isn't being used any more. I can't imagine how this patch could influence the issue Jorg is seeing. From: Stephen Warren swar...@nvidia.com ci_udc.c's usb_gadget_unregister_driver() doesn't call driver-unbind() unlike other USB gadget drivers. Fix it to do this. Without this, when ether.c's CDC Ethernet device is torn down, eth_unbind() is never called, so dev-gadget is never set to NULL. For some reason, usb_eth_halt() is called both at the end of the first use of the Ethernet device, and prior to any subsequent use. Since dev-gadget is never cleared, all calls to usb_eth_halt() attempt to stop, disconnect, and clean up the device, resulting in double cleanup, which hangs U-Boot on my Tegra device at least. ci_udc allocates its own singleton EP0 request object, and cleans it up during usb_gadget_unregister_driver(). This appears necessary when using the USB gadget framework in U-Boot, since that does not allocate/free the EP0 request. However, the CDC Ethernet driver *does* allocate and free its own EP0 requests. Consequently, we must protect ci_ep_free_request() against double-freeing the request. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] usb: ci_udc: fix interaction with CONFIG_USB_ETH_CDC
On 06/27/2014 11:55 PM, Stephen Warren wrote:
On 06/27/2014 03:37 PM, Jörg Krause wrote:
I added the last series of patches beginning from 2014-06-10 for testing
purposes. The patches from 2014-05-29 were already applied.
First series of patches:
Applying: usb: ci_udc: call udc_disconnect() from ci_pullup()
Applying: usb: ci_udc: fix freeing of ep0 req
Applying: usb: ci_udc: fix probe error cleanup
Applying: usb: ci_udc: clean up all allocations in unregister
Calling tftp the first time after a reset runs fine,
I thought the issue you reported was that the *first* time you run the
tftp command, it has issues such as timeouts? Did I misunderstand, or
did that issue somehow go away?
That's right! This was the state before applying a series of patches
after allow multiple buffer allocs per ep. Now, the first run of tftp
runs without any errors.
[snip]
Yes, that is certainly expected to solve issues with *multiple*
invocations of tftp or similar commands and ethernet over ci_udc. The
first hunk in that patch fixes something I probably introduced during
one of my ci_udc patches (probably the one that you originally replied
to usb: ci_udc: allow multiple buffer allocs per ep), but the second
hunk fixes a problem that I /think/ has always been there. Did multiple
invocations of tftp using ci_udc as the network device ever work for
you before, without random crashes or memory leaks?
Yes, it did. If I can remember right it stopped working after a series
of patches from 2014-04-24. But I am not sure.
But there is still a problem:
I have to wait some seconds before I can run a second time tftp. This is
the output from U-Boot:
= run update_rootfs
Updating rootfs ...
using ci_udc, OUT ep- IN ep- STATUS ep-
high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet
USB network up!
Using usb_ether device
[snip]
= run update_rootfs
Updating rootfs ...
using ci_udc, OUT ep- IN ep- STATUS ep-
high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet
ERROR: The remote end did not respond in time.
at drivers/usb/gadget/ether.c:2388/usb_eth_init()
Wait some seconds ...
= run update_rootfs
Updating rootfs ...
using ci_udc, OUT ep- IN ep- STATUS ep-
high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet
USB network up!
Using usb_ether device
[snip]
Hmm. That's odd. I didn't notice that, but I'll try retesting sometime.
What exactly does $update_rootfs contain? It might be useful to know
some details of your network topology (e.g. is the TFTP server on the
machine that the USB cable is plugged into or further away, and are the
machine and network lightly loaded) and rough sizes of the files you're
downloading.
This is what update_rootfs is doing:
update_rootfs=echo Updating rootfs ...; \
if tftp ${rootfs_file}; then \
mtdparts default; \
nand erase.part rootfs; \
ubi part rootfs; \
ubi create rootfs; \
ubi write ${loadaddr} rootfs ${filesize}; \
fi; \
\0 \
Filesize of rootfs.ubifs is about 13 MB.
The tftp server (tftp-hpa 5.2-4) is running on my notebook (running Arch
Linux), where the device is plugged via USB cable. Ethernet is not used,
but wireless network, which is used normal I would say.
___
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Re: [U-Boot] [PATCH] usb: ci_udc: fix interaction with CONFIG_USB_ETH_CDC
On 06/27/2014 11:56 PM, Stephen Warren wrote: On 06/27/2014 03:52 PM, Jörg Krause wrote: I have tested a little bit more. It does NOT help waiting some seconds before running tftp again. Sometimes it just works running tfpd immediately after a previous tfpd. Sometimes waiting even a minute ends up in the described error. Odd, very odd, sorry :-) OK, that makes a little more sense. Intermittent issues are fine, but intermittent issues affected by time delays are odd! Does the *first* invocation of tftp after the board is powered on always work perfectly? Yes, always! The next runs of tftp sometimes works perfectly, sometimes I have timeouts, but it runs to end, and sometimes it did not even start, throwing the described error. But there are no crashes while running tfpd anymore :-) FYI: I applied a series of patches from Heiko Schocher: [PATCH v5 0/5] mtd, ubi, ubifs: resync with Linux-3.14 on top of the patches for ci_udc. Now the USB Ethernet driver is completely broken. It does not even run a first time. On 06/27/2014 11:37 PM, Jörg Krause wrote: [snip] ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 0/5] mtd, ubi, ubifs: resync with Linux-3.14
I applied this series of patches on top of a patch from Stephen Warren
from 2014-06-23: [PATCH] usb: ci_udc: fix interaction with
CONFIG_USB_ETH_CDC.
Now my USB Ethernet driver does not work anymore. I am using tfpd for
downloading files over USB Ethernet Gadget from my notebook to an
Freescale i.MX28 board.
This is the error message:
= run update_rootfs
Updating rootfs ...
using ci_udc, OUT ep- IN ep- STATUS ep-
high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet
ERROR: The remote end did not respond in time.
at drivers/usb/gadget/ether.c:2383/usb_eth_init()
Best regards
Jörg Krause
On 06/24/2014 10:09 AM, Heiko Schocher wrote:
resync ubi subsystem with linux:
commit 455c6fdbd219161bd09b1165f11699d6d73de11c
Author: Linus Torvalds torva...@linux-foundation.org
Date: Sun Mar 30 20:40:15 2014 -0700
Linux 3.14
A nice side effect of this, is we introduce UBI Fastmap support
to U-Boot.
To produce this patch I did two steps:
- simple copy following files from linux to u-boot
drivers/mtd/mtdconcat.c
drivers/mtd/mtdcore.c
drivers/mtd/mtdpart.c
drivers/mtd/ubi/attach.c
drivers/mtd/ubi/build.c
drivers/mtd/ubi/debug.c
drivers/mtd/ubi/debug.h
drivers/mtd/ubi/eba.c
drivers/mtd/ubi/fastmap.c
drivers/mtd/ubi/io.c
drivers/mtd/ubi/kapi.c
drivers/mtd/ubi/misc.c
drivers/mtd/ubi/ubi-media.h
drivers/mtd/ubi/ubi.h
drivers/mtd/ubi/upd.c
drivers/mtd/ubi/vmt.c
drivers/mtd/ubi/vtbl.c
drivers/mtd/ubi/wl.c
fs/ubifs/budget.c
fs/ubifs/debug.c
fs/ubifs/debug.h
fs/ubifs/io.c
fs/ubifs/key.h
fs/ubifs/log.c
fs/ubifs/lprops.c
fs/ubifs/lpt.c
fs/ubifs/lpt_commit.c
fs/ubifs/master.c
fs/ubifs/misc.h
fs/ubifs/orphan.c
fs/ubifs/recovery.c
fs/ubifs/replay.c
fs/ubifs/sb.c
fs/ubifs/scan.c
fs/ubifs/super.c
fs/ubifs/tnc.c
fs/ubifs/tnc_misc.c
fs/ubifs/ubifs-media.h
fs/ubifs/ubifs.h
include/linux/mtd/bbm.h
include/linux/mtd/flashchip.h
include/linux/mtd/mtd.h
include/linux/mtd/nand.h
include/linux/mtd/partitions.h
include/linux/mtd/ubi.h
include/uapi/mtd/mtd-abi.h - include/linux/mtd
include/uapi/mtd/ubi-user.h - include/linux/mtd
- make the code again compile clean and working - commit this
adapt the Linux code to compile and work with U-Boot.
Then squash this two patches to this patch, to not break
bisectability. To make further sync with linux easier, the
above two patches can be found in:
http://git.denx.de/?p=u-boot/u-boot-testing.git;a=shortlog;h=refs/heads/update-mtd%2Bubi-linux-v3.14
Please do not use this branch for testing this patchserie!
summary of changes for U-Boot adaptions:
- replace UBI_LINUX in current UBI code from U-Boot with
__UBOOT__ as this define is used in other places in U-Boot
where code from other projects is used.
- UBI Fastmap is now availiable in U-Boot
activate it with CONFIG_MTD_UBI_FASTMAP
- onenand changes only compile tested.
- Following Code in drivers/mtd/nand/nand_base.c nand_do_write_ops()
adapted for U-Boot:
+#ifndef __UBOOT__
/* Reject writes, which are not page aligned */
if (NOTALIGNED(to) || NOTALIGNED(ops-len)) {
+else
+ /* Reject writes, which are not page aligned */
+ if (NOTALIGNED(to)) {
+endif
as the original linux code leads in not working use of the env
var filesize. For example a nand write 8000 8 ${filesize}
would not work with it ...
- add CONFIG_MTD_NAND_VERIFY_WRITE from U-Boot code
- Documented the config defines in README
- kmalloc now uses memalign for allocating memory
Tested it on am33xx, imx6 and mpc83xx boards. MAKEALL for arm and powerpc
and mips compiles clean.
Tested UBI fastmap on a board with 512 MiB nand flash. Attach time
from old U-Boot was 2 seconds, reduced with UBI fastmap to 0.2 seconds.
Please test this patch!
- changes for v2:
- add lib/linux_compat.c as Joerg Krause detected
- changes for v3:
rebase with current U-Boot commit
61e76f53708cf082ef9061a140b57df3513b8ba1
- changes for v4:
- rebase with commit d8a97f934c64a7ba6f11da5e4cc7f3be57fcb82d
- remove compile error for mips, as Tom Rini suggested
check MAKEALL mips compiles clean
- fix blackfin and microblaze compile
add fix for blackfin from Trom Rini also add his Signed-off-by
- changes for v5:
- extract linux/compat.h changes
Cc: Marek Vasut ma...@denx.de
Cc: Sergey Lapin sla...@ossfans.org
Cc: Scott Wood scottw...@freescale.com
Cc: Wolfgang Denk w...@denx.de
Cc: Joerg Krause jkra...@posteo.de
Heiko Schocher (5):
lib, rbtree: resync with Linux-3.14
lib, list_sort: add list_sort from linux 3.14
linux include: add ERR_CAST
lib, linux: move linux specific defines to linux/compat.h
mtd, ubi, ubifs: resync with Linux-3.14
README | 61 +
board/prodrive/alpr/nand.c |4 +
board/socrates/nand.c |6 +
Re: [U-Boot] [PATCH] usb: ci_udc: fix interaction with CONFIG_USB_ETH_CDC
On 06/27/2014 05:16 PM, Jörg Krause wrote:
On 06/27/2014 11:55 PM, Stephen Warren wrote:
On 06/27/2014 03:37 PM, Jörg Krause wrote:
I added the last series of patches beginning from 2014-06-10 for testing
purposes. The patches from 2014-05-29 were already applied.
First series of patches:
Applying: usb: ci_udc: call udc_disconnect() from ci_pullup()
Applying: usb: ci_udc: fix freeing of ep0 req
Applying: usb: ci_udc: fix probe error cleanup
Applying: usb: ci_udc: clean up all allocations in unregister
Calling tftp the first time after a reset runs fine,
I thought the issue you reported was that the *first* time you run the
tftp command, it has issues such as timeouts? Did I misunderstand, or
did that issue somehow go away?
That's right! This was the state before applying a series of patches
after allow multiple buffer allocs per ep. Now, the first run of tftp
runs without any errors.
Just to make sure I understand, here's what you saw:
1) tftp works fine to start with. No timeouts even on repeated invocation.
2) You applied allow multiple buffer allocs per ep
3) Now, you see tftp timeouts.
4) You applied a series of patches *after* allow multiple buffer allocs
per ep
5) Now, the first tftp command works fine, but repeated invocations fail
(intermittently).
And in (4) above the patch you applied that solved the problem was
Applying: usb: ci_udc: fix interaction with CONFIG_USB_ETH_CDC?
But there is still a problem:
I have to wait some seconds before I can run a second time tftp. This is
the output from U-Boot:
= run update_rootfs
Updating rootfs ...
using ci_udc, OUT ep- IN ep- STATUS ep-
high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet
USB network up!
Using usb_ether device
[snip]
= run update_rootfs
Updating rootfs ...
using ci_udc, OUT ep- IN ep- STATUS ep-
high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet
ERROR: The remote end did not respond in time.
at drivers/usb/gadget/ether.c:2388/usb_eth_init()
Wait some seconds ...
= run update_rootfs
Updating rootfs ...
using ci_udc, OUT ep- IN ep- STATUS ep-
high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet
USB network up!
Using usb_ether device
[snip]
Hmm. That's odd. I didn't notice that, but I'll try retesting sometime.
What exactly does $update_rootfs contain? It might be useful to know
some details of your network topology (e.g. is the TFTP server on the
machine that the USB cable is plugged into or further away, and are the
machine and network lightly loaded) and rough sizes of the files you're
downloading.
This is what update_rootfs is doing:
update_rootfs=echo Updating rootfs ...; \
if tftp ${rootfs_file}; then \
mtdparts default; \
nand erase.part rootfs; \
ubi part rootfs; \
ubi create rootfs; \
ubi write ${loadaddr} rootfs ${filesize}; \
I wonder if there's some kind of memory corruption caused by the
mtdparts, nand, or ubi commands? I'm especially curious about this,
since your other email mentioned that some mtd/ubi patches cause
complete networking failures.
If you *just* run tftp ${rootfs_file} over and over, does that work?
If so, perhaps try running more and more of the commands from
$update_rootfs above until you find the one that causes problems.
fi; \
\0 \
Filesize of rootfs.ubifs is about 13 MB.
The tftp server (tftp-hpa 5.2-4) is running on my notebook (running Arch
Linux), where the device is plugged via USB cable. Ethernet is not used,
but wireless network, which is used normal I would say.
OK, that's basically the same setup I used for testing, network/USB-wise.
Unfortunately, I don't have and NAND or ubifs to test with.
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Re: [U-Boot] [PATCH] usb: ci_udc: fix interaction with CONFIG_USB_ETH_CDC
On 06/28/2014 01:37 AM, Stephen Warren wrote: On 06/27/2014 05:16 PM, Jörg Krause wrote: On 06/27/2014 11:55 PM, Stephen Warren wrote: On 06/27/2014 03:37 PM, Jörg Krause wrote: I added the last series of patches beginning from 2014-06-10 for testing purposes. The patches from 2014-05-29 were already applied. First series of patches: Applying: usb: ci_udc: call udc_disconnect() from ci_pullup() Applying: usb: ci_udc: fix freeing of ep0 req Applying: usb: ci_udc: fix probe error cleanup Applying: usb: ci_udc: clean up all allocations in unregister Calling tftp the first time after a reset runs fine, I thought the issue you reported was that the *first* time you run the tftp command, it has issues such as timeouts? Did I misunderstand, or did that issue somehow go away? That's right! This was the state before applying a series of patches after allow multiple buffer allocs per ep. Now, the first run of tftp runs without any errors. Just to make sure I understand, here's what you saw: 1) tftp works fine to start with. No timeouts even on repeated invocation. True. 2) You applied allow multiple buffer allocs per ep I did a pull from the u-boot-imx branch. I am not sure which date it stop working. 3) Now, you see tftp timeouts. At the beginning I had random timeouts even running update_rootfs the first time after a reset. 4) You applied a series of patches *after* allow multiple buffer allocs per ep Yes. I applied these patches: [U-Boot,1/4] usb: ci_udc: detect queued requests on ep0 [U-Boot,2/4] usb: ci_udc: use a single descriptor for ep0 [U-Boot,3/4] usb: ci_udc: pre-allocate ep0 req [U-Boot,4/4] usb: ci_udc: complete ep0 direction handling But the error still existed. I found out that setting #define CONFIG_SYS_CACHELINE_SIZE 32 in my config file helped. This is a quotation from my mail from 06/12/2014: I checked this and I found that ARCH_DMA_MINALIGN is set to 64, which is not true for Freescale i.MX28. This processor has an ARM926EJ-S, which has an cache line size of 32. In arch/arm/include/asm/cache.h the macro ARCH_DMA_MINALIGN is defined as followed: #ifdef CONFIG_SYS_CACHELINE_SIZE #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE #else #define ARCH_DMA_MINALIGN64 #endif And in /arch/arm/cpu/arm926ejs/cache.c as followed: #ifndef CONFIG_SYS_CACHELINE_SIZE #define CONFIG_SYS_CACHELINE_SIZE32 #endif arch/arm/include/asm/cache.h does not see the definition of CONFIG_SYS_CACHELINE_SIZE in /arch/arm/cpu/arm926ejs/cache.c, so it's a bad place to put it in there. 5) Now, the first tftp command works fine, but repeated invocations fail (intermittently). Yes. The first tftp command almost always works fine. Sometimes I have a timeout in between, but it runs to the end. But the timeouts are really rare. And in (4) above the patch you applied that solved the problem was Applying: usb: ci_udc: fix interaction with CONFIG_USB_ETH_CDC? This is also a quotation from my previous mail: I defined CONFIG_SYS_CACHELINE_SIZE to 32 in my config header file and it works under the following circumstances: I have to disable the macro CONFIG_USB_GADGET_DUALSPEED. But, and this is strange, it works only the first time of a tftp download after a reset of the board. If I try to use tftp a second time, I get the same timeout error as before. So, in short: = reset = run update_rootfs [...] done = reset = run update_rootfs [...] done works and = reset = run update_rootfs [...] done = run update_rootfs [...] timeout sending packets to usb ethernet results in a timeout. Strange. Lastly, I changed CONFIG_SYS_CACHELINE_SIZE to 16 and this works for me in normal mode an in dual speed mode. So it worked, but there was already the error with running ftpd a second time. I am not so sure about the setting of the CONFIG_SYS_CACHELINE_SIZE to 16, because I did not used it anymore after some test runs. But there is still a problem: I have to wait some seconds before I can run a second time tftp. This is the output from U-Boot: = run update_rootfs Updating rootfs ... using ci_udc, OUT ep- IN ep- STATUS ep- high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet USB network up! Using usb_ether device [snip] = run update_rootfs Updating rootfs ... using ci_udc, OUT ep- IN ep- STATUS ep- high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet ERROR: The remote end did not respond in time. at drivers/usb/gadget/ether.c:2388/usb_eth_init() Wait some seconds ... = run update_rootfs Updating rootfs ... using ci_udc, OUT ep- IN ep- STATUS ep- high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet USB network up! Using usb_ether device [snip] Hmm. That's odd. I didn't notice that, but I'll try retesting sometime. What exactly does $update_rootfs contain? It might be
Re: [U-Boot] [PATCH] usb: ci_udc: fix interaction with CONFIG_USB_ETH_CDC
On 06/28/2014 01:37 AM, Stephen Warren wrote:
On 06/27/2014 05:16 PM, Jörg Krause wrote:
On 06/27/2014 11:55 PM, Stephen Warren wrote:
On 06/27/2014 03:37 PM, Jörg Krause wrote:
I added the last series of patches beginning from 2014-06-10 for testing
purposes. The patches from 2014-05-29 were already applied.
First series of patches:
Applying: usb: ci_udc: call udc_disconnect() from ci_pullup()
Applying: usb: ci_udc: fix freeing of ep0 req
Applying: usb: ci_udc: fix probe error cleanup
Applying: usb: ci_udc: clean up all allocations in unregister
Calling tftp the first time after a reset runs fine,
I thought the issue you reported was that the *first* time you run the
tftp command, it has issues such as timeouts? Did I misunderstand, or
did that issue somehow go away?
That's right! This was the state before applying a series of patches
after allow multiple buffer allocs per ep. Now, the first run of tftp
runs without any errors.
Just to make sure I understand, here's what you saw:
1) tftp works fine to start with. No timeouts even on repeated invocation.
I went back in time and now I can be more precise. Everything worked
fine until commit usb: ci_udc: allow multiple buffer allocs per ep which
introduces timeouts in almost all tftp file downloads. Even the first
run of tfpt can end in a timeout.
2) You applied allow multiple buffer allocs per ep
Setting #define CONFIG_SYS_CACHELINE_SIZE 32 to my config file helped
here. But still timeouts. First run almost always runs fine, only
sometimes timeouts while receiving a packet, but always running to the
end. Running tftp after this a second time and more fails with a ERROR:
The remote end did not respond in time. at
drivers/usb/gadget/ether.c:2388/usb_eth_init(), but sometimes it works.
Setting CONFIG_SYS_CACHELINE_SIZE 32 does not make it better (as I
previously wrote it).
Removing CONFIG_USB_GADGET_DUALSPEED helps a little bit, but I am
getting also errors after the second or third run.
3) Now, you see tftp timeouts.
4) You applied a series of patches *after* allow multiple buffer allocs
per ep
Applying: usb: ci_udc: parse QTD before over-writing it
Applying: usb: ci_udc: detect queued requests on ep0
Applying: usb: ci_udc: use a single descriptor for ep0
Applying: usb: ci_udc: pre-allocate ep0 req
Applying: usb: ci_udc: complete ep0 direction handling
Applying: usb: ci_udc: call udc_disconnect() from ci_pullup()
Applying: usb: ci_udc: fix freeing of ep0 req
Applying: usb: ci_udc: fix probe error cleanup
Applying: usb: ci_udc: clean up all allocations in unregister
Applying: usb: ci_udc: terminate ep0 INs with a zlp when required
Applying: usb: ci_udc: fix interaction with CONFIG_USB_ETH_CDC
Applying: usb: ci_udc: fix typo in debug message
5) Now, the first tftp command works fine, but repeated invocations fail
(intermittently).
Now tftp runs fine the first time (and sometimes more often) after a
reboot, but after some tftp runs I am getting the ERROR: The remote end
did not respond in time. at
drivers/usb/gadget/ether.c:2388/usb_eth_init(), as mentioned above.
And in (4) above the patch you applied that solved the problem was
Applying: usb: ci_udc: fix interaction with CONFIG_USB_ETH_CDC?
But there is still a problem:
I have to wait some seconds before I can run a second time tftp. This is
the output from U-Boot:
= run update_rootfs
Updating rootfs ...
using ci_udc, OUT ep- IN ep- STATUS ep-
high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet
USB network up!
Using usb_ether device
[snip]
= run update_rootfs
Updating rootfs ...
using ci_udc, OUT ep- IN ep- STATUS ep-
high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet
ERROR: The remote end did not respond in time.
at drivers/usb/gadget/ether.c:2388/usb_eth_init()
Wait some seconds ...
= run update_rootfs
Updating rootfs ...
using ci_udc, OUT ep- IN ep- STATUS ep-
high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet
USB network up!
Using usb_ether device
[snip]
Hmm. That's odd. I didn't notice that, but I'll try retesting sometime.
What exactly does $update_rootfs contain? It might be useful to know
some details of your network topology (e.g. is the TFTP server on the
machine that the USB cable is plugged into or further away, and are the
machine and network lightly loaded) and rough sizes of the files you're
downloading.
This is what update_rootfs is doing:
update_rootfs=echo Updating rootfs ...; \
if tftp ${rootfs_file}; then \
mtdparts default; \
nand erase.part rootfs; \
ubi part rootfs; \
ubi create rootfs; \
ubi write ${loadaddr} rootfs ${filesize}; \
I wonder if there's some kind of memory corruption caused by the
mtdparts, nand, or ubi commands? I'm especially curious about this,
since your other email mentioned that some
Re: [U-Boot] [PATCH v1 22/25] tools/kwboot: Sync with latest barebox version to support Armada XP
On Fri, 2014-06-27 at 21:06 +0200, Luka Perkov wrote:
Hi Stefan,
It's great to see you working on adding support for Marvell's new SoCs :)
Since now kwboot is going to support more SoCs except kirkwood it makes
sense to rename it to mvboot. I've sent this patch long ago, dunno if it
still applies:
http://patchwork.ozlabs.org/patch/219741/
Also, I'd like to test this series on some boards I have - do you have
patches on some git tree that can be pulled easily?
In case Marvell gets bought out: wouldn't it make more sense to rename
to mrvlboot and point a curl script at the nasdaq quotes to validate the
build?
Related, I don't think Marvell guarantees to not either yank or
completely overhaul their SoC boot code entirely next September.
I'm sorry for kwboot if it violates your aesthetic senses. Those as of
2014. Indeed, naming programs by product is often a weak choice, but
there wasn't a more robust one available. But: there still isn't.
Program paths don't get renamed at will. That's because once it's
deployed it's not arbitrary anymore, and some real value in doing so
better compensates for the overall pain.
Here's one fix: one could write a yet better one with yet a better name,
convince everyone to switch, and just obsolete the existing one.
An easier, sometimes funnier, alternative is to learn to enjoy the
historical trivia surrounding all those seemingly stupid names.
Yeah, an 'apt-get git' used to install GNU interactive tools, then at
some point it suddenly didn't. But NIS support still runs as ypbind for
all the good reasons, too.
Cheers,
Daniel
Luka
On Fri, Jun 27, 2014 at 11:55:08AM +0200, Stefan Roese wrote:
The barebox version of the kwboot tool has evolved a bit. To support
Armada XP and Dove. Additionally a few minor fixes have been applied.
So lets sync with the latest barebox version.
Please note that the main difference between both versions now is, that
the U-Boot version still supports the -p option, to dynamically patch
an image for UART boot mode. I didn't test it now though.
Signed-off-by: Stefan Roese s...@denx.de
---
tools/kwboot.c | 97
+-
1 file changed, 83 insertions(+), 14 deletions(-)
diff --git a/tools/kwboot.c b/tools/kwboot.c
index e773f01..c47970e 100644
--- a/tools/kwboot.c
+++ b/tools/kwboot.c
@@ -1,5 +1,6 @@
/*
- * Boot a Marvell Kirkwood SoC, with Xmodem over UART0.
+ * Boot a Marvell SoC, with Xmodem over UART0.
+ * supports Kirkwood, Dove, Armada 370, Armada XP
*
* (c) 2012 Daniel Stodden daniel.stod...@gmail.com
*
@@ -37,8 +38,12 @@ static unsigned char kwboot_msg_boot[] = {
0xBB, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77
};
-#define KWBOOT_MSG_REQ_DELAY 10 /* ms */
-#define KWBOOT_MSG_RSP_TIMEO 50 /* ms */
+static unsigned char kwboot_msg_debug[] = {
+ 0xDD, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77
+};
+
+#define KWBOOT_MSG_REQ_DELAY 1000 /* ms */
+#define KWBOOT_MSG_RSP_TIMEO 1000 /* ms */
/*
* Xmodem Transfers
@@ -184,6 +189,9 @@ kwboot_tty_send(int fd, const void *buf, size_t len)
int rc;
ssize_t n;
+ if (!buf)
+ return 0;
+
rc = -1;
do {
@@ -268,7 +276,10 @@ kwboot_bootmsg(int tty, void *msg)
int rc;
char c;
- kwboot_printv(Sending boot message. Please reboot the target...);
+ if (msg == NULL)
+ kwboot_printv(Please reboot the target into UART boot
mode...);
+ else
+ kwboot_printv(Sending boot message. Please reboot the
target...);
do {
rc = tcflush(tty, TCIOFLUSH);
@@ -293,6 +304,37 @@ kwboot_bootmsg(int tty, void *msg)
}
static int
+kwboot_debugmsg(int tty, void *msg)
+{
+ int rc;
+
+ kwboot_printv(Sending debug message. Please reboot the target...);
+
+ do {
+ char buf[16];
+
+ rc = tcflush(tty, TCIOFLUSH);
+ if (rc)
+ break;
+
+ rc = kwboot_tty_send(tty, msg, 8);
+ if (rc) {
+ usleep(KWBOOT_MSG_REQ_DELAY * 1000);
+ continue;
+ }
+
+ rc = kwboot_tty_recv(tty, buf, 16, KWBOOT_MSG_RSP_TIMEO);
+
+ kwboot_spinner();
+
+ } while (rc);
+
+ kwboot_printv(\n);
+
+ return rc;
+}
+
+static int
kwboot_xm_makeblock(struct kwboot_block *block, const void *data,
size_t size, int pnum)
{
@@ -300,6 +342,7 @@ kwboot_xm_makeblock(struct kwboot_block *block, const
void *data,
size_t n;
int i;
+ block-soh = SOH;
block-pnum = pnum;
block-_pnum = ~block-pnum;
@@ -326,9 +369,15 @@ kwboot_xm_sendblock(int fd, struct kwboot_block *block)
if (rc)
break;
- rc = kwboot_tty_recv(fd, c, 1,
Re: [U-Boot] [RFC] kbuild.h: workaround for llvm IAS
Hi Jeroen, On Tue, 24 Jun 2014 21:36:06 +0200 Jeroen Hofstee jer...@myspectrum.nl wrote: KBuild (ab)uses the asm statement to write to a file and llvm integrated as chokes about these invalid asm statements. Workaround it by making it look like valid asm code. Signed-off-by: Jeroen Hofstee jer...@myspectrum.nl I think Linux has the same problem. Are you willing to this patch to linux-kbuild ML? Or fixing U-Boot only? I don't mind in general, but it is just noise for them (cc-ing them to create some). For u-boot (ARM) you actually get a valid binary with this patch after clang support has landed, for linux you just get other errors as far as I tried (native only), patch below. However in linux there seem more spots relying on the format, e.g. arch/ia64/kvm/Makefile arch/ia64/kernel/Makefile arch/um/Makefile So if anything, I think this should be made a general rules first in the makefiles. It seems stupid to potentially break something while it gains nothing. So yes, u-boot only afaic, or does that make your syncing more difficult? I don't think syncing would be difficult. BTW, do you know how they resolve this build error in other projects, for example, in llvmlinux ? http://llvm.linuxfoundation.org/index.php/Main_Page Linux folks merged Clang support into the top Makefile, but not into ./Kbuild. I don't know why. Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] powerpc/t4240qds: fix offset of serdes when checking its' reference clock
From: Shaohui Xie shaohui@freescale.com
T4240 has 4 serdes, each serdes has 4k memory space, two PLLs.
We use PLL1CR0 to check the serdes reference clock.
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
arch/powerpc/include/asm/immap_85xx.h | 6 ++
board/freescale/t4qds/t4240qds.c | 10 ++
2 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/include/asm/immap_85xx.h
b/arch/powerpc/include/asm/immap_85xx.h
index 8258ab3..dfb370e 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2905,6 +2905,8 @@ struct ccsr_sfp_regs {
#endif
#define CONFIG_SYS_FSL_CORENET_SERDES_OFFSET 0xEA000
#define CONFIG_SYS_FSL_CORENET_SERDES2_OFFSET 0xEB000
+#define CONFIG_SYS_FSL_CORENET_SERDES3_OFFSET 0xEC000
+#define CONFIG_SYS_FSL_CORENET_SERDES4_OFFSET 0xED000
#define CONFIG_SYS_FSL_CPC_OFFSET 0x1
#define CONFIG_SYS_FSL_SCFG_OFFSET 0xFC000
#define CONFIG_SYS_MPC85xx_DMA1_OFFSET 0x10
@@ -3090,6 +3092,10 @@ struct ccsr_sfp_regs {
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES_OFFSET)
#define CONFIG_SYS_FSL_CORENET_SERDES2_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES2_OFFSET)
+#define CONFIG_SYS_FSL_CORENET_SERDES3_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES3_OFFSET)
+#define CONFIG_SYS_FSL_CORENET_SERDES4_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES4_OFFSET)
#define CONFIG_SYS_MPC85xx_USB1_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB1_OFFSET)
#define CONFIG_SYS_MPC85xx_USB2_ADDR \
diff --git a/board/freescale/t4qds/t4240qds.c b/board/freescale/t4qds/t4240qds.c
index fe1bc7f..cbe62c1 100644
--- a/board/freescale/t4qds/t4240qds.c
+++ b/board/freescale/t4qds/t4240qds.c
@@ -638,9 +638,10 @@ unsigned long get_board_ddr_clk(void)
int misc_init_r(void)
{
u8 sw;
- serdes_corenet_t *srds_regs =
- (void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;
+ void *srds_base = (void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;
+ serdes_corenet_t *srds_regs;
u32 actual[MAX_SERDES];
+ u32 pllcr0, expected;
unsigned int i;
sw = QIXIS_READ(brdcfg[2]);
@@ -663,8 +664,9 @@ int misc_init_r(void)
}
for (i = 0; i MAX_SERDES; i++) {
- u32 pllcr0 = srds_regs-bank[i].pllcr0;
- u32 expected = pllcr0 SRDS_PLLCR0_RFCK_SEL_MASK;
+ srds_regs = srds_base + i * 0x1000;
+ pllcr0 = srds_regs-bank[0].pllcr0;
+ expected = pllcr0 SRDS_PLLCR0_RFCK_SEL_MASK;
if (expected != actual[i]) {
printf(Warning: SERDES%u expects reference clock
%sMHz, but actual is %sMHz\n,
i + 1, serdes_clock_to_string(expected),
--
1.8.0
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Re: [U-Boot] [PATCH v3 00/10] sunxi: Bug fixes, sun4i and sun5i support and network improvements
On 26.06.2014 09:38, Ian Campbell wrote: (re-adding Hans whose CC I seem to have dropped somehow, sorry) On Wed, 2014-06-25 at 20:57 +0100, Ian Campbell wrote: Hi Albert, Any comments on these sunxi series from Hans and myself? I wonder if Hans and I should be applying for a u-boot-sunxi.git custodian tree[0]? Yes, I'm all for it. This would definitely help to speed up the process and reduce the load on other custodians. Tom, Albert, what do you think? Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH 0/3] Implement fastboot flash for eMMC
Hi Rob,
On Mon, Jun 23, 2014 at 1:37 PM, Steve Rae s...@broadcom.com wrote:
Rob Sebastian
I would appreciate your comments on this issue; I suspect that you
had some ideas regarding the implementation of the fastboot flash
and erase commands
I agree with Lukasz's and Marek's comments unless there are good
reasons not to use it which can't be fixed. Curiously, USB mass
storage does not use the DFU backend, but I don't know why.
USB mass storage is from its very beginning tied with eMMC/SD card.
DFU/thor are a different in a way, that they allow storing data to
other media like raw memory, eMMC, NAND, etc. The dfu backend tries to
handle writing to many media and also file systems.
Perhaps
there are incompatibilities or converting it is on the todo list. Are
your performance concerns measurable or it's just the fact you are
adding another layer?
I'd really like to see the eMMC backend be a generic block device
backend. There's no good reason for it to be eMMC/SD specific.
Don't you also need the ability to partition a disk with fastboot?
Rob
Thanks in advance, Steve
On 14-06-23 05:58 AM, Lukasz Majewski wrote:
Hi Steve,
On 14-06-19 11:32 PM, Marek Vasut wrote:
On Friday, June 20, 2014 at 08:18:42 AM, Lukasz Majewski wrote:
Hi Steve,
This series implements the fastboot flash command for eMMC
devices. It supports both raw and sparse images.
NOTES:
- the support for the fastboot flash command is enabled with
CONFIG_FASTBOOT_FLASH
- the support for eMMC is enabled with
CONFIG_FASTBOOT_FLASH_MMC_DEV
- (future) the support for NAND would be enabled with
CONFIG_FASTBOOT_FLASH_NAND(???)
- thus the proposal is to place the code in common/fb_mmc.c and
(future) common/fb_nand.c(???), however, this may not be the
appropriate location
Would you consider another approach for providing flashing
backend for fastboot?
I'd like to propose reusing of the dfu flashing code for this
purpose. Such approach has been used successfully with USB
thor downloading function.
Since the fastboot is using gadget infrastructure (thanks to
the effort of Rob Herring) I think that it would be feasible to
reuse the same approach as thor does. In this way the low
level code would be kept in one place and we could refine and
test it more thoroughly.
I'm all for this approach as well if possible.
Best regards,
Marek Vasut
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I have briefly investigated this suggestion
And have 'hacked' some code as follows:
--- common/fb_mmc.c_000 2014-06-20 14:13:43.271158073 -0700
+++ common/fb_mmc.c_001 2014-06-20 14:17:48.688072764 -0700
while (remaining_chunks) {
switch
(le16_to_cpu(c_header-chunk_type)) { case CHUNK_TYPE_RAW:
+#if 0
blkcnt =
(le32_to_cpu(c_header-chunk_sz)
* blk_sz) / info.blksz;
buffer =
(void *)c_header +
le16_to_cpu(s_header-chunk_hdr_sz);
blks =
mmc_dev-block_write(mmc_dev-dev, blk, blkcnt, buffer);
if (blks != blkcnt) {
printf(Write failed
%lu\n, blks); strcpy(response,
FAILmmc write
failure); return;
}
bytes_written += blkcnt *
info.blksz; +#else
+ buffer =
+ (void *)c_header +
+
le16_to_cpu(s_header-chunk_hdr_sz); +
+ len =
le32_to_cpu(c_header-chunk_sz) * blk_sz;
+ ret_dfu =
dfu_write_medium_mmc(dfu, offset,
+
buffer, len);
+ if (ret_dfu) {
+ printf(Write failed
%lu\n, len);
+ strcpy(response,
+ FAILmmc write
failure);
+ return;
+ }
+
+
+ bytes_written += len;
+#endif
break;
case CHUNK_TYPE_FILL:
case CHUNK_TYPE_DONT_CARE:
case CHUNK_TYPE_CRC32:
/* do nothing */
break;
default:
/* error */
printf(Unknown chunk type\n);
strcpy(response,
