Hi Hans,
On Wed, Dec 31, 2014 at 7:22 PM, Hans de Goede wrote:
> Hi,
>
>
> On 30-12-14 13:17, Siarhei Siamashka wrote:
>>
>> On Tue, 30 Dec 2014 11:26:51 +0100
>> Hans de Goede wrote:
>>
>>> Hi,
>>>
>>> On 30-12-14 11:18, Siarhei Siamashka wrote:
On Thu, 25 Dec 2014 11:59:55 +0100
Hi Masahiro,
On 11 December 2014 at 10:37, Masahiro YAMADA wrote:
> Hi Simon,
>
>
>
>>
>> diff --git a/Kconfig b/Kconfig
>> index 153ee2b..d4ca152 100644
>> --- a/Kconfig
>> +++ b/Kconfig
>> @@ -158,3 +158,5 @@ source "drivers/Kconfig"
>> source "fs/Kconfig"
>>
>> source "lib/Kconfig"
>> +
>> +
On 31 December 2014 at 01:22, Bin Meng wrote:
> Hi Simon,
>
> On Wed, Dec 31, 2014 at 7:02 AM, Simon Glass wrote:
>> Hi Bin,
>>
>> On 30 December 2014 at 01:02, Bin Meng wrote:
>>> Remove the troublesome union hob_pointers so that some annoying casts
>>> are no longer needed in those hob access
Import DTS for Arria V development kit and enable support
for DT. The DT is imported from Linux 3.19-rc1 as of commit
97bf6af1f928216fd6c5a66e8a57bfa95a659672 .
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Pavel Machek
Cc: Stefan Roese
Cc: Vince Bridgers
---
arch/arm/dt
Import DTS for Cyclone V development kit and enable support
for DT. The DT is imported from Linux 3.19-rc1 as of commit
97bf6af1f928216fd6c5a66e8a57bfa95a659672 .
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Pavel Machek
Cc: Stefan Roese
Cc: Vince Bridgers
---
arch/arm/
Zap this unused empty function, no point in having it.
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Pavel Machek
Cc: Stefan Roese
Cc: Vince Bridgers
---
board/altera/socfpga/socfpga.c | 8
include/configs/socfpga_common.h | 1 -
2 files changed, 9 deletions(-
This optional DT property is called 'num-cs', so repair the misnomers.
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Pavel Machek
Cc: Stefan Roese
Cc: Vince Bridgers
---
arch/arm/dts/socfpga.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/a
Linux now also contains SPI driver, yet the name is 'snps,dw-apb-ssi'.
Fix the naming before we have to support both names.
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Pavel Machek
Cc: Stefan Roese
Cc: Vince Bridgers
---
arch/arm/dts/socfpga.dtsi| 4 ++--
drivers/s
Since all boards now have a DT, instead of hard-coding the board
name into the U-Boot binary, read the board name from DT "model"
property.
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Pavel Machek
Cc: Stefan Roese
Cc: Vince Bridgers
---
board/altera/socfpga/socfpga.c
Drop the _cyclone5 suffix from socfpga_cyclone5.c since this file
will contain Arria 5 support as well.
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Pavel Machek
Cc: Stefan Roese
Cc: Vince Bridgers
---
board/altera/socfpga/Makefile | 2 +-
board
Replace multiple spaces with a single tab.
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Pavel Machek
Cc: Stefan Roese
Cc: Vince Bridgers
---
board/altera/socfpga/iocsr_config.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/board/altera/socf
Add support for the Altera Arria V development kit.
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Pavel Machek
Cc: Stefan Roese
Cc: Vince Bridgers
---
arch/arm/Kconfig | 5 +
board/altera/socfpga/Kconfig | 16 +
board/altera/socfpga/iocsr_c
Sync SoCFPGA Cyclone V development kit pinmux configuration with
Rocketboard U-Boot v2013.01.01-114-g9381569 (ACDS14.1_REL_GSRD_PR).
NOTE: This change is useless until we get proper SPL support, at
which point this will likely need further rework.
Signed-off-by: Marek Vasut
Cc: Chin Liang
This series brings in a couple of minor fixes (mostly coding
style and sync with rocketboards u-boot) and improvements
(USB UMS and DFU support for Cyclone V SoC DK). There are
also fixes for DT properties in this series to make those
compatible with Linux.
This series also adds Arria V SoC DK sup
Sync SoCFPGA Cyclone V development kit pinmux configuration with
Rocketboard U-Boot v2013.01.01-114-g9381569 (ACDS14.1_REL_GSRD_PR).
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Pavel Machek
Cc: Stefan Roese
Cc: Vince Bridgers
---
board/altera/socfpga/pinmux_config.c |
Add support for USB host mode and USB device mode for the
Cyclone V development kit and enable support for UMS (to
export SD card as USB mass storage). The UMS is activated
via 'ums 0 mmc 0' command, the system must be connected to
a host PC via HPS USB port and SD card must be installed
for this t
On Wednesday, November 26, 2014 at 01:44:23 PM, Hans de Goede wrote:
> Hi,
Hello Hans,
> Currently we've this magic in include/config_distro_bootcmd.h to avoid
> scanning the usb bus multiple times.
>
> And it does not work when also using an usb keyboard because then the
> preboot command has a
Looks like there're still two dangling patches, so let's make Rene happy
and apply them please.
Thanks!
The following changes since commit 125738e819a3b9d15210794b3dcef9f4d9bcf866:
Prepare v2015.01-rc4 (2014-12-29 21:22:38 -0500)
are available in the git repository at:
git://git.denx.de/u-
Hi Ajoy,
On 30 December 2014 at 22:28, Ajoy Das wrote:
[snip]
>>> On Tue, Dec 30, 2014 at 4:17 AM, Simon Glass wrote:
Hi Ajoy,
> On Mon, Dec 29, 2014 at 9:28 PM, Simon Glass wrote:
>
>> Hi Ajoy,
>>
>>
>> > On Mon, Dec 29, 2014 at 7:36 PM, Simon Glas
On 31 December 2014 at 11:20, Simon Glass wrote:
> On 31 December 2014 at 01:05, Bin Meng wrote:
>> The Topcliff PCH has 4 UART devices integrated (Device 10, Funciton
>> 1/2/3/4). Add the corresponding device nodes in the crownbay.dts per
>> Open Firmware PCI bus bindings.
>>
>> Also a comment b
On 31 December 2014 at 01:05, Bin Meng wrote:
> Use ePAPR defined properties for x86-uart: clock-frequency and
> current-speed. Assign the value of clock-frequency in device tree
> to plat->clock of x86-uart instead of using hardcoded number.
>
> Signed-off-by: Bin Meng
> Acked-by: Simon Glass
>
On 31 December 2014 at 01:05, Bin Meng wrote:
> There are many pci uart devices which are ns16550 compatible. We can
> describe them in the board dts file and use it as the U-Boot serial
> console as specified in the chosen node 'stdout-path' property.
>
> Those pci uart devices can have their reg
On 31 December 2014 at 11:17, Simon Glass wrote:
> On 31 December 2014 at 01:05, Bin Meng wrote:
>> This commit adds several APIs to decode PCI device node according to
>> the Open Firmware PCI bus bindings, including:
>> - fdtdec_get_pci_addr() for encoded pci address
>> - fdtdec_get_pci_vendev(
On 31 December 2014 at 01:05, Bin Meng wrote:
> The Topcliff PCH has 4 UART devices integrated (Device 10, Funciton
> 1/2/3/4). Add the corresponding device nodes in the crownbay.dts per
> Open Firmware PCI bus bindings.
>
> Also a comment block is added for the 'stdout-path' property in the
> cho
On 31 December 2014 at 01:05, Bin Meng wrote:
> This commit adds several APIs to decode PCI device node according to
> the Open Firmware PCI bus bindings, including:
> - fdtdec_get_pci_addr() for encoded pci address
> - fdtdec_get_pci_vendev() for vendor id and device id
> - fdtdec_get_pci_bdf() f
On 12/31/14 15:00, Nikita Kiryanov wrote:
> Convert cm-t35 to generic board.
>
> Cc: Igor Grinberg
> Cc: Tom Rini
> Signed-off-by: Nikita Kiryanov
Acked-by: Igor Grinberg
> ---
> include/configs/cm_t35.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/configs/cm_t35.h b/in
Convert cm-t35 to generic board.
Cc: Igor Grinberg
Cc: Tom Rini
Signed-off-by: Nikita Kiryanov
---
include/configs/cm_t35.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h
index ccd9b88..9767512 100644
--- a/include/configs/cm_t35.h
+++ b
From: Jan Kiszka
This extends the PSCI support for the A20 to a dual v0.2 and v0.1
interface. Recent OSes will prefer v0.2, olders will still find the
original interface, just at v0.2 service IDs.
In addition to the existing services, v0.2 requires us to implement both
system off and reset. At l
From: Jan Kiszka
"adr rX, text_end" only works if the label is close. Adding further code
to the other functions will prevent this. So move the containing
function close to label. No functional change.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/sunxi/psci.S | 80 -
This adds CPU offlining and PSCI v0.2 support. Changes since v2:
- add more comments to psci_fiq_enter (patch 1)
- rebase over u-boot-sunxi/next
See patches for further details.
Jan
Jan Kiszka (4):
sun7i: Add support for taking CPUs offline via PSCI
sun7i: Add PSCI v0.2 support
sun7i: Mo
From: Jan Kiszka
It's mandatory according to the spec, and Linux uses it for checking if
an offlined CPU is already dead. Without this implemented, we get some
warnings on the kernel console at least.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/sunxi/psci.S | 33 ++
From: Jan Kiszka
Based on the original version by Marc Zyngier. It adds a psci_cpu_off
implementation for the A20 SoC. The mechanism works by first preparing
the calling CPU to go offline (disable and flush cache, disable SMP),
then requesting CPU 0 to pull the plug. The request is sent as FIQ on
Hi Simon,
while test-building 2015.01-rc4 I encountered following strange
behaviour of buildman:
---8<---
andreas@andreas-pc % ./tools/buildman/buildman -b buildtest -o /tmp/bar
-v avr32
boards.cfg is up to date. Nothing to do.
Building 1 commit for 10 boards (6 threads, 1 job per thread)
Cloning
Hi Simon,
On 12/23/2014 09:04 PM, Simon Glass wrote:
The global_data pointer (gd) has already been set before board_init_f()
is called. We should not assign it again. We should also not use gdata since
it is going away.
Signed-off-by: Simon Glass
---
Tested-by: Nikita Kiryanov
Acked-by: Nik
The A23 (sun8i) only has lcd output support, so allow building the video code
without HDMI support for use with the A23.
Also the A23 has the same reset bits (and necessity to enable the DRC block)
as the sun6i, so enable those bits for sun8i too.
Note building without HDMI support is useful for
Hi,
On 29-12-14 14:50, Ian Campbell wrote:
On Wed, 2014-12-24 at 20:06 +0100, Hans de Goede wrote:
You've got three p's in suppport in the subject.
Some SoCs, specifically the A13 (sun5i variant) and the A23 (sun8i) only have
lcd output support.
Signed-off-by: Hans de Goede
---
board/sunx
Add lcd output support, see the new Kconfig entries and doc/README.video for
how to enable / configure this.
Signed-off-by: Hans de Goede
---
Changes in v2:
-Do not request backlight gpio twices
-Fix some spelling errors in comments
-Fix some no longer accurate comments
---
arch/arm/include/asm/
Hi,
Anthoine Bourgeois wrote:
> Signed-off-by: Anthoine Bourgeois
> ---
>
> include/configs/devkit8000.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
> index 930b08e..77e2f58 100644
> --- a/include/configs/devkit8000.h
> +
Hi,
On 29-12-14 14:43, Ian Campbell wrote:
On Wed, 2014-12-24 at 20:06 +0100, Hans de Goede wrote:
+static void sunxi_lcdc_panel_enable(void)
+{
+ int pin;
+
+ /*
+* Start with backlight disabled to avoid the screen flashing to
+* white while the lcd inits.
+
On 2014-12-31 12:30, Ian Campbell wrote:
> On Tue, 2014-12-30 at 18:14 +0100, Jan Kiszka wrote:
>
> I had a couple of comments on v1 a few days ago (a bit late, sorry)
> which I think you may have missed? AFIACT they still stand on this
> version.
>
>> This adds CPU offlining and PSCI v0.2 suppor
On 2014-12-29 15:08, Ian Campbell wrote:
> On Mon, 2014-12-15 at 12:37 +0100, Jan Kiszka wrote:
>> +movwr8, #(GICC_BASE & 0x)
>> +movtr8, #(GICC_BASE >> 16)
>> +ldr r9, [r8, #GICC_IAR]
>> +movwr10, #0x3ff
>> +movtr10, #0
>> +cmp r9, r10
>> +be
On 2014-12-29 15:12, Ian Campbell wrote:
> On Mon, 2014-12-15 at 12:37 +0100, Jan Kiszka wrote:
>> This extends the PSCI support for the A20 to a dual v0.2 and v0.1
>> interface. Recent OSes will prefer v0.2, olders will still find the
>> original interface, just at v0.2 service IDs.
>>
>> In addit
Hi,
On 31-12-14 11:42, Ian Campbell wrote:
On Wed, 2014-12-31 at 11:38 +0100, Hans de Goede wrote:
Add support for the new Bananapro A20 development board from lemaker.org.
This board features 1G RAM, 2 USB A receptacles, 1 micro USB receptacle for
OTG, 1 micro USB receptacle for power, HDMI, s
On Tue, 2014-12-30 at 18:14 +0100, Jan Kiszka wrote:
I had a couple of comments on v1 a few days ago (a bit late, sorry)
which I think you may have missed? AFIACT they still stand on this
version.
> This adds CPU offlining and PSCI v0.2 support. Changes since v1:
> - add AFFINITY_INFO support (m
Hi,
On 31-12-14 11:42, Ian Campbell wrote:
On Wed, 2014-12-31 at 11:38 +0100, Hans de Goede wrote:
Add support for the new Bananapro A20 development board from lemaker.org.
This board features 1G RAM, 2 USB A receptacles, 1 micro USB receptacle for
OTG, 1 micro USB receptacle for power, HDMI, s
Hi,
On 30-12-14 13:17, Siarhei Siamashka wrote:
On Tue, 30 Dec 2014 11:26:51 +0100
Hans de Goede wrote:
Hi,
On 30-12-14 11:18, Siarhei Siamashka wrote:
On Thu, 25 Dec 2014 11:59:55 +0100
Hans de Goede wrote:
Ah yes, I used the slightly different timings from the olimex 7" lcd
panel for o
Hi,
On 30-12-14 12:25, Siarhei Siamashka wrote:
On Tue, 30 Dec 2014 11:36:23 +0100
Hans de Goede wrote:
Hi,
On 30-12-14 11:26, Hans de Goede wrote:
Hi,
On 30-12-14 11:18, Siarhei Siamashka wrote:
BTW, I have done a preliminary automatic conversion for all FEX
files from sunxi-boards,
On Wed, 2014-12-31 at 11:38 +0100, Hans de Goede wrote:
> Add support for the new Bananapro A20 development board from lemaker.org.
> This board features 1G RAM, 2 USB A receptacles, 1 micro USB receptacle for
> OTG, 1 micro USB receptacle for power, HDMI, sata, Gbit ethernet, ir receiver,
> 3.5 mm
Add support for the new Bananapro A20 development board from lemaker.org.
This board features 1G RAM, 2 USB A receptacles, 1 micro USB receptacle for
OTG, 1 micro USB receptacle for power, HDMI, sata, Gbit ethernet, ir receiver,
3.5 mm jack for a/v out, on board microphone, 40 gpio pins and sdio wi
On 12/31/2014 5:35 PM, Jagan Teki wrote:
On 31 December 2014 at 08:31, Peng Fan wrote:
This patch set is to support qspi for mx6sxsabresd board.
To mx6sxsabresd Revb board, 32M flash is used, but in header file,
CONFIG_SPI_FLASH_BAR is not defined, and we still use SZ_16M. The LUT
initializa
On 31 December 2014 at 08:31, Peng Fan wrote:
> This patch set is to support qspi for mx6sxsabresd board.
>
> To mx6sxsabresd Revb board, 32M flash is used, but in header file,
> CONFIG_SPI_FLASH_BAR is not defined, and we still use SZ_16M. The LUT
> initialization qspi_set_lut function uses 32BIT
On 31 December 2014 at 08:56, Peng Fan wrote:
> Hi Jagan,
>
>
> On 12/30/2014 8:38 PM, Jagan Teki wrote:
>>
>> On 30 December 2014 at 08:44, Peng Fan wrote:
>>>
>>> Add spi nor boot support for mx6slevk board.
>>>
>>> Signed-off-by: Peng Fan
>>> ---
>>> board/freescale/mx6slevk/MAINTAINERS |
Each time U-Boot boots on Intel Crown Bay board, the displayed hard
drive information is wrong. It could be either wrong capacity or just
a 'Capacity: not available' message. After enabling the debug switch,
we can see the scsi inquiry command did not execute successfully.
However, doing a 'scsi sc
Hi Simon,
On Wed, Dec 31, 2014 at 7:02 AM, Simon Glass wrote:
> Hi Bin,
>
> On 30 December 2014 at 01:02, Bin Meng wrote:
>> Remove the troublesome union hob_pointers so that some annoying casts
>> are no longer needed in those hob access routines. This also improves
>> the readability.
>>
>> Si
The Topcliff PCH has 4 UART devices integrated (Device 10, Funciton
1/2/3/4). Add the corresponding device nodes in the crownbay.dts per
Open Firmware PCI bus bindings.
Also a comment block is added for the 'stdout-path' property in the
chosen node, mentioning that by default the legacy superio se
Use ePAPR defined properties for x86-uart: clock-frequency and
current-speed. Assign the value of clock-frequency in device tree
to plat->clock of x86-uart instead of using hardcoded number.
Signed-off-by: Bin Meng
Acked-by: Simon Glass
---
Changes in v4: None
Changes in v3: None
Changes in v2
There are many pci uart devices which are ns16550 compatible. We can
describe them in the board dts file and use it as the U-Boot serial
console as specified in the chosen node 'stdout-path' property.
Those pci uart devices can have their register be memory-mapped, or
i/o-mapped. The driver will t
This series add support to the ns16550 compatible pci devices.
Newer x86 Platform Controller Hub chipset (like Topcliff, BayTrail)
starts to integrate ns16550 compatible pci uart devices. In order to
use them, we have to scan the pci bus and allocate memory/io address
in the early phase. A gd->hos
This commit adds several APIs to decode PCI device node according to
the Open Firmware PCI bus bindings, including:
- fdtdec_get_pci_addr() for encoded pci address
- fdtdec_get_pci_vendev() for vendor id and device id
- fdtdec_get_pci_bdf() for pci device bdf triplet
- fdtdec_get_pci_bar32() for pc
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