On Tue, Jun 02, 2020 at 09:23:13AM +0800, Bin Meng wrote:
> Hi Tom,
>
> This PR includes the following x86 changes for v2020.07:
>
> - Corrected some FSP-M/FSP-S settings for Chromebook Coral
> - ICH SPI driver and mrccache fixes for obtaining the SPI memory map
> - Fixed various warnings
On Tue, Jun 02, 2020 at 02:05:39PM +0200, Rasmus Villemoes wrote:
> On 02/06/2020 13.04, Marek Vasut wrote:
> > On 6/2/20 8:42 AM, Rasmus Villemoes wrote:
> >> On 29/05/2020 19.54, Marek Vasut wrote:
> >>> +config ENV_APPEND
> >>> + bool "Always append the environment with new data"
> >>> +
Hi Jagan,
do you mean to sync over the whole sun8i-v3s.dtsi or just the emac node? Linux
does not have an emac node for the v3s in its dts.
What could be done would be to sync the sun8i-v3s.dtsi and add the emac node
from sunxi-h3-h5.dtsi (where I already have taken the main part of the emac
Hi Rick,
On Tue, Jun 2, 2020 at 5:13 PM Rick Chen wrote:
>
> Hi Bin
>
> Bin Meng 於 2020年6月1日 週一 下午5:06寫道：
> >
> > Hi Rick,
> >
> > On Mon, Jun 1, 2020 at 4:14 PM Rick Chen wrote:
> > >
> > > Hi Bin
> > >
> > > > From: Bin Meng [mailto:bmeng...@gmail.com]
> > > > Sent: Wednesday, May 27, 2020
On Mon, Jun 01, 2020 at 01:20:25PM +0300, razvan.beche...@gmail.com wrote:
>
> The Intel Edison OTA process requires a conversion of data size
> from bytes to number of blocks. The following functions are used:
>
> # function ota_conv_sizes
> # Convert a bytes size to a block
On Mon, Jun 01, 2020 at 01:20:26PM +0300, razvan.beche...@gmail.com wrote:
> From: Razvan Becheriu
>
> Add part block sub-command which returns block size.
>
> e.g.:
> part block mmc $mmcdev system_a system_a_index
>
> Signed-off-by: Razvan Becheriu
> ---
> cmd/part.c | 14
On Tue, Jun 02, 2020 at 11:08:19AM -0700, razvan becheriu wrote:
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA256
>
> setexpr can compute the divide/multiply part, but we still need to get the
> partition block size somehow.
>
> I know that this is 0x200 by default, but we can not hardcode
On Tue, Jun 02, 2020 at 11:36:48AM -0700, razvan becheriu wrote:
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA256
>
> here is the implementation of the functions:
>
> # function ota_conv_sizes
> # Convert a bytes size to a block size
> # input bytesize : size in bytes to convert
> # input
Hi Rick,
On Fri, May 29, 2020 at 11:34 AM Pragnesh Patel
wrote:
>
> This series add support for SPL to FU540. U-Boot SPL can boot from
> L2 LIM (0x0800_) and jump to OpenSBI(FW_DYNAMIC firmware) and
> U-Boot proper from MMC devices.
>
> This series is also available here [1] for testing
>
I need access to registers other than just the timekeeping ones of the
pcf2127, so I wanted to implement ->read8 and ->write8. But for
testing these it appeared there was no convenient way to invoke those
from the shell, so I also ended up adding such a command.
Also, it seemed more natural to
Some users may want to read multiple consecutive 8-bit
registers. Instead of each caller having to implement the loop,
provide a dm_rtc_read() helper. Also, allow a driver to provide a
->read method, which can be more efficient than reading one register
at a time.
Reviewed-by: Simon Glass
Similar to how the dm_rtc_{read,write} functions fall back to using
the {read,write}8 methods, do the opposite in the rtc_{read,write}8
functions.
This way, each driver only needs to provide either ->read8 or ->read
to make both rtc_read8() and dm_rtc_read() work - without this, a
driver that
On Tue, Jun 02, 2020 at 06:59:21PM +0530, Jagan Teki wrote:
> On Tue, Jun 2, 2020 at 6:47 PM Zhiqiang Hou wrote:
> >
> > From: Lukasz Majewski
> >
> > This change allows more fine tuning of driver model based SPI support in
> > SPL and TPL. It is now possible to explicitly enable/disable the
Similar to dm_rtc_read(), introduce a helper that allows the caller to
write multiple consecutive 8-bit registers with one call. If the
driver provides the ->write method, use that, otherwise loop using
->write8.
Reviewed-by: Simon Glass
Signed-off-by: Rasmus Villemoes
---
Reviewed-by: Simon Glass
Signed-off-by: Rasmus Villemoes
---
drivers/rtc/pcf2127.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/rtc/pcf2127.c b/drivers/rtc/pcf2127.c
index eea72ad522..88ff8c52c3 100644
--- a/drivers/rtc/pcf2127.c
+++ b/drivers/rtc/pcf2127.c
@@ -43,6 +43,12
The current set method is broken; a simple test case is to first set
the date to something in April, then change the date to 31st May:
=> date 040412122020.34
Date: 2020-04-04 (Saturday)Time: 12:12:34
=> date 053112122020.34
Date: 2020-05-01 (Friday)Time: 12:12:34
or via the amending of
This simply consists of renaming the existing pcf2127_read_reg()
helper to follow the naming of the other
methods (i.e. pcf2127_rtc_) and changing the type of its
"len" parameter.
Reviewed-by: Simon Glass
Signed-off-by: Rasmus Villemoes
---
drivers/rtc/pcf2127.c | 6 +++---
1 file changed, 3
It's more natural that any write that happens to touch the reset
register should cause a reset, rather than just a write that starts at
that offset.
Reviewed-by: Simon Glass
Signed-off-by: Rasmus Villemoes
---
drivers/rtc/i2c_rtc_emul.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
Mostly as an aid for debugging RTC drivers, provide a command that can
be used to read/write arbitrary registers (assuming the driver
provides the read/write methods or their single-register-at-a-time
variants).
Signed-off-by: Rasmus Villemoes
---
cmd/Kconfig | 6 ++
cmd/Makefile | 1 +
-BEGIN PGP SIGNED MESSAGE-
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hm...
It seems that the changes never reached upstream:
git://github.com/01org/edison-u-boot.git branch edison-v2014.04
this branch was implementing 'part info' sub-command which was useful to
retrieve partition info.
the new repo:
On Mon, Jun 1, 2020 at 11:51 PM Rick Chen wrote:
>
> Hi Bin
>
> Bin Meng 於 2020年6月2日 週二 下午2:33寫道：
> >
> > Hi Rick,
> >
> > On Tue, Jun 2, 2020 at 2:16 PM Rick Chen wrote:
> > >
> > > Hi Bin
> > >
> > > Bin Meng 於 2020年6月2日 週二 下午2:13寫道：
> > > >
> > > > Hi Rick,
> > > >
> > > > On Tue, Jun 2,
On Thu, May 28, 2020 at 1:47 AM Bin Meng wrote:
>
> From: Bin Meng
>
> The FDT blob might not have sufficient space to hold a copy of
> reserved memory node. Expand it before the copy.
>
> Reported-by: Rick Chen
> Signed-off-by: Bin Meng
> ---
>
> arch/riscv/lib/fdt_fixup.c | 6 ++
> 1
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here is the implementation of the functions:
# function ota_conv_sizes
# Convert a bytes size to a block size
# input bytesize : size in bytes to convert
# input blksize : size of a block in bytes
# output num_blk : converted size in blocks
Hi Tom,
Please pull this PR.
Summary:
- H6 emac support
- USB PHY H6 logic alignment
Travis-CI:
https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
The following changes since commit d09b832cd8ccb7e37e2b188394df5a73d7074c3b:
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sh
On Wed, Jun 03, 2020 at 12:10:30AM +0530, Jagan Teki wrote:
> On Tue, Jun 2, 2020 at 11:57 PM Tom Rini wrote:
> >
> > On Tue, Jun 02, 2020 at 06:59:21PM +0530, Jagan Teki wrote:
> > > On Tue, Jun 2, 2020 at 6:47 PM Zhiqiang Hou wrote:
> > > >
> > > > From: Lukasz Majewski
> > > >
> > > > This
Hi Tom,
Please pull this PR.
Summay:
- Toshiba spinand (Yoshio)
- SPI/SPI Flash cleanup (Jagan)
- Remove SH SPI (Jagan)
Travis-CI:
https://travis-ci.org/github/openedev/u-boot-amarula/builds/693428912
The following changes since commit ab80137cc436e977ef91a154372ae5aeae3f4fb0:
Merge
On 6/2/20 7:36 PM, Tom Rini wrote:
[...]
>> One will append the environment, the other will override it (if you have
>> multiple envs enabled).
>
> So it sounds like it wouldn't be valid to have this option differ
> between SPL and main U-Boot?
Consider the case where
Define a few aux registers and check that they can be read/written
individually. Also check that one can access the time-keeping
registers directly and get the expected results.
Reviewed-by: Simon Glass
Signed-off-by: Rasmus Villemoes
---
arch/sandbox/include/asm/rtc.h | 5
test/dm/rtc.c
Add tests of the "list", "read" and "write" subcommands of the rtc
shell command.
Reviewed-by: Simon Glass
Signed-off-by: Rasmus Villemoes
---
test/dm/rtc.c | 58 +++
1 file changed, 58 insertions(+)
diff --git a/test/dm/rtc.c b/test/dm/rtc.c
On Mon, Jun 1, 2020 at 2:09 AM Bin Meng wrote:
>
> Hi Rick,
>
> On Mon, Jun 1, 2020 at 5:08 PM Rick Chen wrote:
> >
> > Hi Bin
> >
> > > > From: Bin Meng [mailto:bmeng...@gmail.com]
> > > > Sent: Wednesday, May 27, 2020 5:05 PM
> > > > To: Rick Jian-Zhi Chen(陳建志); U-Boot Mailing List
> > > > Cc:
On 20/05/2020 00.01, Rasmus Villemoes wrote:
> I need access to registers other than just the timekeeping ones of the
> pcf2127, so I wanted to implement ->read8 and ->write8. But for
> testing these it appeared there was no convenient way to invoke those
> from the shell, so I also ended up
On Tue, Jun 2, 2020 at 11:57 PM Tom Rini wrote:
>
> On Tue, Jun 02, 2020 at 06:59:21PM +0530, Jagan Teki wrote:
> > On Tue, Jun 2, 2020 at 6:47 PM Zhiqiang Hou wrote:
> > >
> > > From: Lukasz Majewski
> > >
> > > This change allows more fine tuning of driver model based SPI support in
> > > SPL
On Wed, Jun 3, 2020 at 12:31 AM Tom Rini wrote:
>
> On Wed, Jun 03, 2020 at 12:10:30AM +0530, Jagan Teki wrote:
> > On Tue, Jun 2, 2020 at 11:57 PM Tom Rini wrote:
> > >
> > > On Tue, Jun 02, 2020 at 06:59:21PM +0530, Jagan Teki wrote:
> > > > On Tue, Jun 2, 2020 at 6:47 PM Zhiqiang Hou
> > >
On Tue, Jun 02, 2020 at 06:06:17PM +0200, Marek Vasut wrote:
> On 6/2/20 6:00 PM, Tom Rini wrote:
> > On Tue, Jun 02, 2020 at 05:55:25PM +0200, Marek Vasut wrote:
> >> On 6/2/20 4:38 PM, Tom Rini wrote:
> >>> On Tue, Jun 02, 2020 at 02:47:12PM +0200, Marek Vasut wrote:
> On 6/2/20 2:44 PM,
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256
setexpr can compute the divide/multiply part, but we still need to get the
partition block size somehow.
I know that this is 0x200 by default, but we can not hardcode that in the
scripts. we should read that from the partition info.
On 2020-06-02
On Mon, Jun 1, 2020 at 11:51 PM Rick Chen wrote:
>
> Hi Bin
>
> Bin Meng 於 2020年6月2日 週二 下午2:33寫道：
> >
> > Hi Rick,
> >
> > On Tue, Jun 2, 2020 at 2:16 PM Rick Chen wrote:
> > >
> > > Hi Bin
> > >
> > > Bin Meng 於 2020年6月2日 週二 下午2:13寫道：
> > > >
> > > > Hi Rick,
> > > >
> > > > On Tue, Jun 2,
On Tue, Jun 2, 2020 at 7:10 PM Zhiqiang Hou wrote:
>
> From: Chuanhua Han
>
> Modify the Freescale ESPI driver to support the driver model.
> Also resolved the following problems:
>
> = WARNING ==
> This board does not use CONFIG_DM_SPI. Please update
>
Hi Rasmus,
On Tue, 2 Jun 2020 at 08:36, Rasmus Villemoes
wrote:
>
> On 02/06/2020 15.22, Simon Glass wrote:
> > Hi Rasmus,
> >
> > On Tue, 2 Jun 2020 at 03:13, Rasmus Villemoes
> > wrote:
> >>
> >> On 31/05/2020 16.07, Simon Glass wrote:
> >>> Hi Rasmus,
> >>>
> >>> On Tue, 19 May 2020 at
Hi Rasmus,
On Tue, 2 Jun 2020 at 12:40, Rasmus Villemoes
wrote:
>
> On 20/05/2020 00.01, Rasmus Villemoes wrote:
> > I need access to registers other than just the timekeeping ones of the
> > pcf2127, so I wanted to implement ->read8 and ->write8. But for
> > testing these it appeared there was
On 02/06/2020 21.29, Simon Glass wrote:
> Hi Rasmus,
>
> On Tue, 2 Jun 2020 at 12:40, Rasmus Villemoes
> wrote:
>>
>> Urgh. The name rtc_read() is already used for a local helper by a number
>> of rtc drivers (also rtc_write, for somewhat fewer drivers). So I can
>> still call the methods ->read
Am 2020-06-02 22:00, schrieb Heinrich Schuchardt:
On 6/1/20 9:53 PM, Michael Walle wrote:
On ARM64, a 64kb region is reserved for the runtime services code.
Unfortunately, this code overlaps with the spin table code, which also
needs to be reserved. Thus now that the code is relocatable,
First, improve the compatibility on newer Era CAAMs. These introduced new
version registers. Secondly, add RNG support for the CAAM. This way we get
random number generator support for EFI for free and KASLR will work with
ARM64 kernels booted with bootefi.
Michael Walle (4):
crypto/fsl: make
Since Era 10, the version registers changed. Add the version registers
and use them on newer modules.
Signed-off-by: Michael Walle
---
drivers/crypto/fsl/jr.c | 12 --
include/fsl_sec.h | 51 +++--
2 files changed, 54 insertions(+), 9
Align the status line with all the other output in U-Boot.
Before the change:
DDR3.9 GiB (DDR3, 32-bit, CL=11, ECC on)
SEC0: RNG instantiated
WDT: Started with servicing (60s timeout)
After the change:
DDR3.9 GiB (DDR3, 32-bit, CL=11, ECC on)
SEC0: RNG instantiated
WDT: Started with
Register the random number generator with the rng subsystem in u-boot.
This way it can be used by EFI as well as for the 'rng' command.
Signed-off-by: Michael Walle
---
drivers/crypto/fsl/Kconfig | 11 +
drivers/crypto/fsl/Makefile | 1 +
drivers/crypto/fsl/jobdesc.c | 9
We need the era in other modules, too. For example, to get the RNG
version.
Signed-off-by: Michael Walle
---
drivers/crypto/fsl/sec.c | 2 +-
include/fsl_sec.h| 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/fsl/sec.c b/drivers/crypto/fsl/sec.c
index
This is defined only when __lp64__ is defined. That means that ulong is
64 bits long. Therefore we don't need to use a separate u64 type on those
architectures.
Fix up the code to take advantage of that, removing the preprocessor
conditions.
Also include the header file that defines
This is defined only when __lp64__ is defined. That means that ulong is
64 bits long. Therefore we don't need to use a separate u64 type on those
architectures.
Fix up the code to take advantage of that, removing the preprocessor
conditions.
Signed-off-by: Simon Glass
---
cmd/mem.c | 117
It is a bit painful to have #ifdefs in the middle of the help for each
command. Add a macro to avoid this.
Signed-off-by: Simon Glass
---
cmd/mem.c | 68 ++-
1 file changed, 17 insertions(+), 51 deletions(-)
diff --git a/cmd/mem.c
This is defined only when __lp64__ is defined. That means that ulong is
64 bits long. Therefore we don't need to use a separate u64 type on those
architectures.
Fix up the code to take advantage of that, removing the preprocessor
conditions.
Also include the missing header file that defines
It is useful to be able to find hex values and strings in a memory range.
Add a command to support this.
cmd: Fix 'md' and add a memory-search command
At present 'md.q' is broken. This series provides a fix for this. It also
implements a new memory-search command called 'ms'. It allows searching
On Tue, Jun 02, 2020 at 09:06:42PM +0200, Marek Vasut wrote:
> On 6/2/20 7:36 PM, Tom Rini wrote:
> [...]
> >> One will append the environment, the other will override it (if you
> >> have
> >> multiple envs enabled).
> >
> > So it sounds like it wouldn't be valid to have this
This option marks any U-Boot variable which does not have explicit 'w'
writeable flag set as read-only. This way the environment can be locked
down and only variables explicitly configured to be writeable can ever
be changed by either 'env import', 'env set' or loading user environment
from
Add configuration option which prevents the environment hash table to be
ever cleared and reloaded with different content. This is useful in case
the first environment loaded into the hash table contains e.g. sensitive
content which must not be dropped or reloaded.
Signed-off-by: Marek Vasut
---
Add .load callback for the 'nowhere' environment driver. This is useful
for when the 'nowhere' driver is used in combination with other drivers
and should be used to load the default environment.
Signed-off-by: Marek Vasut
---
env/nowhere.c | 7 +++
1 file changed, 7 insertions(+)
diff
In case the env storage driver marks environment as ENV_INVALID, we must
reset the $ret return value to -ENOENT to let the env init code reset the
environment to the default one a bit further down.
Signed-off-by: Marek Vasut
---
env/env.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
Add another internal environment flag which indicates that the operation
is resetting the environment to the default one. This allows the env code
to discern between import of external environment and reset to default.
Signed-off-by: Marek Vasut
---
env/common.c | 3 ++-
include/search.h |
If the ENV_ACCESS_IGNORE_FORCE is set, inform user that the variable
cannot be force-set if such attempt happens.
Signed-off-by: Marek Vasut
---
env/flags.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/env/flags.c b/env/flags.c
index b88fe7ba9c..f7a53775c4 100644
---
Hi Atish
Atish Patra 於 2020年6月3日 週三 上午2:22寫道：
>
> On Mon, Jun 1, 2020 at 11:51 PM Rick Chen wrote:
> >
> > Hi Bin
> >
> > Bin Meng 於 2020年6月2日 週二 下午2:33寫道：
> > >
> > > Hi Rick,
> > >
> > > On Tue, Jun 2, 2020 at 2:16 PM Rick Chen wrote:
> > > >
> > > > Hi Bin
> > > >
> > > > Bin Meng 於
Hi Atish
Atish Patra 於 2020年6月3日 週三 上午2:32寫道：
>
> On Mon, Jun 1, 2020 at 2:09 AM Bin Meng wrote:
> >
> > Hi Rick,
> >
> > On Mon, Jun 1, 2020 at 5:08 PM Rick Chen wrote:
> > >
> > > Hi Bin
> > >
> > > > > From: Bin Meng [mailto:bmeng...@gmail.com]
> > > > > Sent: Wednesday, May 27, 2020 5:05
Reviewed by: Eric Nelson
On 5/26/20 12:06 PM, Tom Rini wrote:
The config header for this platform uses '#undef' in a number of cases.
All of the MMC related ones were already handled correctly in the
defconfig file. In the case of CONFIG_CMD_FUSE, the command was being
built and enabled via
On 02/06/2020 20:55, Tom Rini wrote:
Hi,
> On Tue, Jun 02, 2020 at 09:45:25PM +0200, Heinrich Schuchardt wrote:
>> On 6/2/20 5:51 PM, Tom Rini wrote:
>>> On Sun, May 31, 2020 at 10:43:00AM +, Heinrich Schuchardt wrote:
>>>
Booting pine64-lts_defconfig with either of CONFIG_RSA=y or
Hi Tom,
> On Jun 2, 2020, at 6:02 AM, Tom Rini wrote:
>
> On Mon, Jun 01, 2020 at 07:44:25PM -0700, Alex Nemirovsky wrote:
>
>> From: Aaron Tseng
>>
>> Add Cortina Access Ethernet device driver for CA SoCs.
>> This driver supports both legacy and DM_ETH network models.
>>
>>
> On Jun 2, 2020, at 12:20 AM, Miquel Raynal wrote:
>
> Hi Alex,
>
> Alex Nemirovsky wrote on Mon, 1
> Jun 2020 14:26:49 -0700:
>
>> From: Jason Li
>>
>> Supports all CA SoCs which support a parallel nand controller.
>> It should be noted that some CA Soc also support an
On 6/3/20 1:32 AM, Tom Rini wrote:
> On Tue, Jun 02, 2020 at 09:06:42PM +0200, Marek Vasut wrote:
>> On 6/2/20 7:36 PM, Tom Rini wrote:
>> [...]
One will append the environment, the other will override it (if you
have
multiple envs enabled).
>>>
>>> So it sounds
On Wed, Jun 03, 2020 at 12:18:18AM +, Alex Nemirovsky wrote:
> Hi Tom,
>
> > On Jun 2, 2020, at 6:02 AM, Tom Rini wrote:
> >
> > On Mon, Jun 01, 2020 at 07:44:25PM -0700, Alex Nemirovsky wrote:
> >
> >> From: Aaron Tseng
> >>
> >> Add Cortina Access Ethernet device driver for CA
Define this macro always so we don't need the preprocessor to check it.
Convert the users to #if instead of #ifdef.
Note that '#if MEM_SUPPORT_64BIT_DATA' does not give an error if the
macro is not define. It just assumes zero.
Signed-off-by: Simon Glass
---
cmd/mem.c | 54
On Tue, Jun 02, 2020 at 09:45:56PM +0200, Heinrich Schuchardt wrote:
> Since commit 208bdaf2ae5f ("vexpress/aemv8a: drop
> CONFIG_ARMV8_SWITCH_TO_EL1") no board uses CONFIG_ARMV8_SWITCH_TO_EL1. So
> we should remove this setting from whitelist.txt. If anybody should ever
> need it again, he
Convert omap5 uevm board to device model.
Signed-off-by: Tero Kristo
---
arch/arm/dts/omap5-u-boot.dtsi | 42 ++
board/ti/omap5_uevm/evm.c | 78 +-
configs/omap5_uevm_defconfig | 9
3 files changed, 61 insertions(+), 68 deletions(-)
On 6/1/20 9:53 PM, Michael Walle wrote:
> On ARM64, a 64kb region is reserved for the runtime services code.
> Unfortunately, this code overlaps with the spin table code, which also
> needs to be reserved. Thus now that the code is relocatable, allocate a
> new page from EFI, copy the spin table
Hi Rasmus,
On Tue, 2 Jun 2020 at 13:44, Rasmus Villemoes
wrote:
>
> On 02/06/2020 21.29, Simon Glass wrote:
> > Hi Rasmus,
> >
> > On Tue, 2 Jun 2020 at 12:40, Rasmus Villemoes
> > wrote:
> >>
> >> Urgh. The name rtc_read() is already used for a local helper by a number
> >> of rtc drivers
The symbol "CONFIG_ARM_DCC" is used to control building
drivers/serial/arm_dcc.c. Provide a simple Kconfig entry for this.
Cc: Luca Ceresoli
Cc: Michal Simek
Cc: Tom McLeod
Cc: Mike Looijmans
Signed-off-by: Tom Rini
---
Note that this is a pre-req for
On 6/2/20 5:51 PM, Tom Rini wrote:
> On Sun, May 31, 2020 at 10:43:00AM +, Heinrich Schuchardt wrote:
>
>> Booting pine64-lts_defconfig with either of CONFIG_RSA=y or CONFIG_LOG=y
>> fails if CONFIG_INIT_SP_RELATIVE is not set.
>>
>> Signed-off-by: Heinrich Schuchardt
>> ---
>>
Since commit 208bdaf2ae5f ("vexpress/aemv8a: drop
CONFIG_ARMV8_SWITCH_TO_EL1") no board uses CONFIG_ARMV8_SWITCH_TO_EL1. So
we should remove this setting from whitelist.txt. If anybody should ever
need it again, he should add a Kconfig option.
Signed-off-by: Heinrich Schuchardt
---
Hi,
Following the omap4 panda conversion series, this converts the
omap5-uevm board to device model. Some semi nasty hacks were needed in
the omap5-u-boot.dtsi files as this is common to both dra7xx and omap5,
due to overloading of dra7xx architecture on top of omap5. Fixing that
requires some
On Tue, Jun 02, 2020 at 09:45:25PM +0200, Heinrich Schuchardt wrote:
> On 6/2/20 5:51 PM, Tom Rini wrote:
> > On Sun, May 31, 2020 at 10:43:00AM +, Heinrich Schuchardt wrote:
> >
> >> Booting pine64-lts_defconfig with either of CONFIG_RSA=y or CONFIG_LOG=y
> >> fails if CONFIG_INIT_SP_RELATIVE
Hi Tom and Jagan,
Thanks a lot for your comments!
> -Original Message-
> From: Tom Rini
> Sent: 2020年6月3日 3:02
> To: Jagan Teki ; Z.q. Hou
>
> Cc: U-Boot-Denx ; Lokesh Vutla
> ; Andrew F Davis ; Heiko Schocher
> ; Simon Glass ; Feng Li
> ; Alison Wang ; Sumit Garg
> ; Eugen Hristev ;
>
Hello
I would like to introduce a change in the FIT host tools, and thus I'm looking
for advice and opinion.
The change would only take place on the host FIT reading tools, namely
fit_info, fit_check, and their libraries.
The main idea here is, I think this tool is quite handy and complete
Hi Miquel/Tom,
>> Hi Alex,
>>
>> Alex Nemirovsky wrote on Mon, 1
>> Jun 2020 14:26:49 -0700:
>>
>> > From: Jason Li
>> >
>> > Supports all CA SoCs which support a parallel nand controller.
>> > It should be noted that some CA Soc also support an separate
>> > SPI serial NAND
Hello Rasmu,
Am 02.06.2020 um 21:14 schrieb Rasmus Villemoes:
The current set method is broken; a simple test case is to first set
the date to something in April, then change the date to 31st May:
=> date 040412122020.34
Date: 2020-04-04 (Saturday)Time: 12:12:34
=> date 053112122020.34
Hi Stefan,
Few minor comments,
On Thu, May 14, 2020 at 12:53 PM Stefan Roese wrote:
>
> From: Suneel Garapati
>
> Add support for I2C controllers found on Octeon II/III and Octeon TX
> TX2 SoC platforms.
>
> Signed-off-by: Aaron Williams
> Signed-off-by: Suneel Garapati
> Signed-off-by:
Hi Rayagonda,
v1 is superseeded. Please review the latest version, v2:
https://patchwork.ozlabs.org/project/uboot/patch/20200526121307.2735-1...@denx.de/
Thanks,
Stefan
On 03.06.20 07:15, Rayagonda Kokatanur wrote:
Hi Stefan,
Few minor comments,
On Thu, May 14, 2020 at 12:53 PM Stefan
On Wed, Jun 3, 2020 at 10:50 AM Stefan Roese wrote:
>
> Hi Rayagonda,
>
> v1 is superseeded. Please review the latest version, v2:
>
> https://patchwork.ozlabs.org/project/uboot/patch/20200526121307.2735-1...@denx.de/
Thank you, I missed that v2.
Anyway please ignore my comments, all of them are
On 03.06.20 07:37, Rayagonda Kokatanur wrote:
On Wed, Jun 3, 2020 at 10:50 AM Stefan Roese wrote:
Hi Rayagonda,
v1 is superseeded. Please review the latest version, v2:
https://patchwork.ozlabs.org/project/uboot/patch/20200526121307.2735-1...@denx.de/
Thank you, I missed that v2.
Anyway
On Tue, May 26, 2020 at 5:43 PM Stefan Roese wrote:
>
> From: Suneel Garapati
>
> Add support for I2C controllers found on Octeon II/III and Octeon TX
> TX2 SoC platforms.
>
> Signed-off-by: Aaron Williams
> Signed-off-by: Suneel Garapati
> Signed-off-by: Stefan Roese
> Cc: Heiko Schocher
>
On 03.06.20 03:26, Simon Glass wrote:
Define this macro always so we don't need the preprocessor to check it.
Convert the users to #if instead of #ifdef.
Note that '#if MEM_SUPPORT_64BIT_DATA' does not give an error if the
macro is not define. It just assumes zero.
Signed-off-by: Simon Glass
Heinrich,
On Sun, May 31, 2020 at 10:52:16PM +0200, Heinrich Schuchardt wrote:
> For passing the optional data of the load option to the loaded imaged
> protocol we need its size.
>
> efi_deserialize_load_option() is changed to return the size of the optional
> data.
>
> As a by-product we get
Ramon Fried-4 wrote
> + if (strcmp((char *)pkt + i, "windowsize") == 0) {
> For servers that doesnt support windowsize option the above check could
> result in accessing memory outside of valid range. Please check if (i+11)
> < len before comparing the strings.
>
>
> +
> +
Hi Jagan
> From: Jagan Teki [mailto:ja...@amarulasolutions.com]
> Sent: Wednesday, June 03, 2020 2:57 AM
> To: Rick Jian-Zhi Chen(陳建志)
> Cc: U-Boot-Denx; Atish Patra; Palmer Dabbelt; Bin Meng; Paul Walmsley; Anup
> Patel; Sagar Kadam; Pragnesh Patel
> Subject: Re: [PATCH v13 00/19] RISC-V SiFive
Hello Rasmus,
Am 02.06.2020 um 21:13 schrieb Rasmus Villemoes:
Similar to dm_rtc_read(), introduce a helper that allows the caller to
write multiple consecutive 8-bit registers with one call. If the
driver provides the ->write method, use that, otherwise loop using
->write8.
Reviewed-by: Simon
Hello Rasmus,
Am 02.06.2020 um 21:13 schrieb Rasmus Villemoes:
Some users may want to read multiple consecutive 8-bit
registers. Instead of each caller having to implement the loop,
provide a dm_rtc_read() helper. Also, allow a driver to provide a
->read method, which can be more efficient than
Hello Rasmus,
Am 02.06.2020 um 21:14 schrieb Rasmus Villemoes:
Define a few aux registers and check that they can be read/written
individually. Also check that one can access the time-keeping
registers directly and get the expected results.
Reviewed-by: Simon Glass
Signed-off-by: Rasmus
Hello Rasmus,
Am 02.06.2020 um 21:13 schrieb Rasmus Villemoes:
Mostly as an aid for debugging RTC drivers, provide a command that can
be used to read/write arbitrary registers (assuming the driver
provides the read/write methods or their single-register-at-a-time
variants).
Signed-off-by:
Hello Rasmus,
Am 02.06.2020 um 21:14 schrieb Rasmus Villemoes:
It's more natural that any write that happens to touch the reset
register should cause a reset, rather than just a write that starts at
that offset.
Reviewed-by: Simon Glass
Signed-off-by: Rasmus Villemoes
---
Abbie/Aaron,
please remove legacy mode code so that we only support DM mode per Tom’s
request.
Thanks
-AN
> On Jun 2, 2020, at 5:38 PM, Tom Rini wrote:
>
> On Wed, Jun 03, 2020 at 12:18:18AM +, Alex Nemirovsky wrote:
>> Hi Tom,
>>
>>> On Jun 2, 2020, at 6:02 AM, Tom Rini wrote:
>>>
>>>
Hi Jagan,
Thanks a lot for your comments!
> -Original Message-
> From: Jagan Teki
> Sent: 2020年6月3日 3:29
> To: Z.q. Hou
> Cc: U-Boot-Denx ; Priyanka Jain
> ; Shengzhou Liu ; Simon
> Glass ; Biwen Li ; Bin Meng
> ; Jiafei Pan ; Chuanhua Han
> ; Xiaowei Bao
> Subject: Re: [PATCHv2
Hi Bin
Bin Meng 於 2020年6月2日 週二 下午5:39寫道：
>
> Hi Rick,
>
> On Tue, Jun 2, 2020 at 5:13 PM Rick Chen wrote:
> >
> > Hi Bin
> >
> > Bin Meng 於 2020年6月1日 週一 下午5:06寫道：
> > >
> > > Hi Rick,
> > >
> > > On Mon, Jun 1, 2020 at 4:14 PM Rick Chen wrote:
> > > >
> > > > Hi Bin
> > > >
> > > > > From:
Hello Stefan,
Am 26.05.2020 um 14:13 schrieb Stefan Roese:
From: Suneel Garapati
Add support for I2C controllers found on Octeon II/III and Octeon TX
TX2 SoC platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Suneel Garapati
Signed-off-by: Stefan Roese
Cc: Heiko Schocher
Cc: Simon
Hello Rasmus,
Am 02.06.2020 um 21:13 schrieb Rasmus Villemoes:
Similar to how the dm_rtc_{read,write} functions fall back to using
the {read,write}8 methods, do the opposite in the rtc_{read,write}8
functions.
This way, each driver only needs to provide either ->read8 or ->read
to make both
Hello Rasmus,
Am 02.06.2020 um 21:13 schrieb Rasmus Villemoes:
This simply consists of renaming the existing pcf2127_read_reg()
helper to follow the naming of the other
methods (i.e. pcf2127_rtc_) and changing the type of its
"len" parameter.
Reviewed-by: Simon Glass
Signed-off-by: Rasmus
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