On 1/4/22 14:23, Patrick Delaunay wrote:
Tidy up the warnings reported by checkpatch.pl to prepare next patches
Signed-off-by: Patrick Delaunay
Reviewed-by: Simon Glass
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
cmd/flash.c | 239 +---
On 1/4/22 14:23, Patrick Delaunay wrote:
Replace CONFIG_SYS_MAX_FLASH_BANKS by CFI_FLASH_BANKS to prepare
Kconfig migration and avoid to redefine CONFIG_SYS_MAX_FLASH_BANKS
in cfi_flash.h.
After this patch CONFIG_SYS_MAX_FLASH_BANKS should be never used in
the cfi code: use CFI_MAX_FLASH_BANKS
út 30. 11. 2021 v 13:57 odesílatel Michal Simek
napsal:
>
> From: Sandeep Gundlupet Raju
>
> Add new macro for PMC I2C power domain.
>
> Signed-off-by: Sandeep Gundlupet Raju
> Signed-off-by: Michal Simek
> ---
>
> include/dt-bindings/power/xlnx-versal-power.h | 3 ++-
> 1 file changed, 2
On 1/4/22 14:23, Patrick Delaunay wrote:
Prepare migration to Kconfig.
CONFIG_SYS_MAX_FLASH_BANKS_DETECT becomes boolean and
CONFIG_SYS_MAX_FLASH_BANKS define the MAX size, also used
for detection when CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
(CFI_MAX_FLASH_BANKS = CONFIG_SYS_MAX_FLASH_BANKS).
On 1/4/22 14:24, Patrick Delaunay wrote:
This converts the following to Kconfig:
CONFIG_AT91_EFLASH
Signed-off-by: Patrick Delaunay
Reviewed-by: Simon Glass
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
arch/arm/mach-at91/Kconfig | 8
configs/ethernut5_defconfig | 2
On 12/29/21 17:04, Mark Kettenis wrote:
From: François Ozog
Date: Wed, 29 Dec 2021 14:39:36 +0100
HI Simon
On Wed, 29 Dec 2021 at 14:36, Simon Glass wrote:
Hi François,
On Tue, 28 Dec 2021 at 03:15, François Ozog
wrote:
Le mar. 28 déc. 2021 à 09:32, Simon Glass a écrit :
Hi
On 1/4/22 15:57, Marek Behún wrote:
From: Marek Behún
Before commit 4c289425752f ("mv_ddr: a38x: add support for ddr async
mode"), Asynchornous Mode was only used when the CPU Subsystem Clock
Options[4:0] field in the SAR1 register was set to value 0x13: CPU at
2 GHz and DDR at 933 MHz.
Then
On 1/4/22 16:14, Marek Behún wrote:
From: Marek Behún
I got an
: host mxlb.ispgateway.de[80.67.18.126] said:
554 Sorry, no mailbox here by that name. (in reply to RCPT TO command)
when sending e-mail to dirk.eib...@gdsys.cc.
Drop Dirk Eibach from MAINTAINERS of board/gdsys/a38x and
On 1/4/22 11:52, Simon Glass wrote:
Hi Heinrich,
On Thu, 30 Dec 2021 at 22:41, Heinrich Schuchardt wrote:
On 12/29/21 19:57, Simon Glass wrote:
At present this code is inline in the app and stub. But they do the same
thing. The difference is that the stub does it immediately and the app
On Wed, 5 Jan 2022 11:10:51 +1300
Chris Packham wrote:
> Hi Marek,
>
> On Wed, Jan 5, 2022 at 9:28 AM Marek Behún wrote:
> >
> > From: Marek Behún
> >
> > Hello,
> >
> > continuing my last discussion with Chris [1] about this, could you
> > please test this change? (For Chris, mainly on your
st 24. 11. 2021 v 12:16 odesílatel Michal Simek
napsal:
>
> From: T Karthik Reddy
>
> The system fails to boot without any environment location, so return
> ENVL_NOWHERE when there's nowhere to store the environment instead
> of ENVL_UNKNOWN.
>
> The same change was also done by commit
Hello Tim,
> -Original Message-
> From: U-Boot On Behalf Of Tim Harvey
> Sent: Tuesday, January 4, 2022 11:48 PM
> To: u-boot ; Stefano Babic ; Fabio
> Estevam
>
> Cc: Schrempf Frieder ; Adam Ford
> ; Marcel Ziswiler ; Jagan Teki
>
> Subject: mkimage_fit_atf.sh: not found
>
> Stefano
po 6. 12. 2021 v 16:25 odesílatel Michal Simek napsal:
>
> Perform reset before core initialization.
> Standard flow which close to 99% users are using getting all IPs out of
> reset that there is no need to reset IP again. This is because of all low
> level initialization is done in previous
po 6. 12. 2021 v 14:53 odesílatel Michal Simek napsal:
>
> Xilinx DTS files are using two way how to describe ethernet phy.
>
> The first (already supported) has phy as subnode of gem node.
> eth {
> phy-handle = <>;
> phy0: ethernet-phy@21 {
> ...
> };
>
st 15. 12. 2021 v 11:00 odesílatel Michal Simek
napsal:
>
> SGMII configuration depends on proper GT setting that's why when node has
> phys property call PSGTR driver to configure it properly.
>
> Signed-off-by: Michal Simek
> ---
>
> Changes in v3:
> - Separate phy init from phy power on (IP
Hi Eugen,
On 04/01/22 9:50 pm, Eugen Hristev wrote:
> CONFIG_PHANDLE_CHECK_SEQ is outside of the menu 'Library routines'
> thus it's invisible in menuconfig and cannot be selected.
> Fix this by moving the 'endmenu' after the PHANDLE_CHECK_SEQ definition
>
> Fixes: c589132a1d ("fdt: Use phandle
On Wed, 05 Jan 2022 19:36:29 +0800
Icenowy Zheng wrote:
Hi Jesse,
> 在 2022-01-04星期二的 19:34 -0500，Jesse Taube写道：
> > This patch set aims to add suport for the SUNIV and F1C100s.
> > Suport has been in linux for a while now, but not in u-boot.
> >
> > This patchset contains:
> > - CPU specific
čt 18. 11. 2021 v 13:05 odesílatel Michal Simek
napsal:
>
> From: Ashok Reddy Soma
>
> Timeout for checking mdio phy idle status is 20seconds. In case of errors
> this timeout will be too much. Reduce it to 100ms.
>
> Signed-off-by: Ashok Reddy Soma
> Signed-off-by: Michal Simek
> ---
>
>
On 1/5/22 07:14, Andre Przywara wrote:
On Wed, 05 Jan 2022 19:36:29 +0800
Icenowy Zheng wrote:
Hi Jesse,
在 2022-01-04星期二的 19:34 -0500，Jesse Taube写道：
This patch set aims to add suport for the SUNIV and F1C100s.
Suport has been in linux for a while now, but not in u-boot.
This patchset
Register 0x43c in its low 24 bits contains PCI class code.
Update code to set all 24 bits of PCI class code and not only upper 16 bits
of PCI class code.
Use standard U-Boot macro (PCI_CLASS_BRIDGE_PCI << 8) for constructing all
24-bits of PCI class for PCI bridge Normal decode.
Signed-off-by:
Hi,
> Add compatible and data platform struct for sama7g5 SoC.
>
> Signed-off-by: Eugen Hristev
> ---
> drivers/i2c/at91_i2c.c | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/i2c/at91_i2c.c b/drivers/i2c/at91_i2c.c
> index 6b4c0e4804..400a3786ca 100644
> ---
Hi Tom,
On 11/10/2021 20:59, Tom Rini wrote:
On Thu, Sep 30, 2021 at 06:21:08PM +0200, Amjad Ouled-Ameur wrote:
From: Keerthy
Add all the ipu early boot related nodes
Signed-off-by: Keerthy
Signed-off-by: Amjad Ouled-Ameur
---
(no changes since v1)
MAINTAINERS
Am 2022-01-05 11:37, schrieb eugen.hris...@microchip.com:
On 1/5/22 12:04 PM, Michael Walle wrote:
Hi,
Add compatible and data platform struct for sama7g5 SoC.
Signed-off-by: Eugen Hristev
---
drivers/i2c/at91_i2c.c | 6 ++
1 file changed, 6 insertions(+)
diff --git
在 2022-01-04星期二的 19:34 -0500，Jesse Taube写道：
> This patch set aims to add suport for the SUNIV and F1C100s.
> Suport has been in linux for a while now, but not in u-boot.
>
> This patchset contains:
> - CPU specific initialization code
> - SUNIV dram driver
> - SUNIV clock driver adaption
> -
While converting to binman for an imx8mq board, it has been found that
building in the u-boot CI fails. This is because an imx8mq requires an
external binary (signed_hdmi_imx8m.bin). If this file cannot be found
mkimage fails.
To be able to build this board in the u-boot CI a binman option
Since commit f7ac30b042d, the pin muxing for mmc was removed from the
board file to be managed by DM_MMC which requires PINCTRL to work. It
made the change for sabrelite but nitrogen configs were forgotten.
Signed-off-by: Gary Bisson
---
configs/nitrogen6dl2g_defconfig | 2 ++
Hi Johan,
On Tue, 4 Jan 2022 at 19:15, Johan Jonker wrote:
>
> The Rockchip rk3066 SoC has 3 dw-apb-timer nodes.
> U-boot is compiled with OF_PLATDATA TPL/SPL options,
> so add OF_PLATDATA support for the dw-apb-timer.
> Also change driver name to be able to compile with
> U-boot scripts. No
Hi Simon,
Am Mi., 5. Jan. 2022 um 15:05 Uhr schrieb Simon Glass :
>
> Hi Heiko,
>
> On Tue, 4 Jan 2022 at 07:22, Heiko Thiery wrote:
> >
> > Hi Simon,
> >
> >
> > Am So., 2. Jan. 2022 um 18:15 Uhr schrieb Simon Glass :
> > >
> > > Hi Heiko,
> > >
> > > On Thu, 2 Dec 2021 at 19:53, Simon Glass
On 12/25/21 20:50, Pierre Bourdon wrote:
Recent changes caused fields in the image main header to be modified
after the header checksum had already been computed. Move the checksum
computation to once again be the last operation performed on the header.
Fixes: 2b0980c24027 ("tools: kwbimage:
Currently the pxa3xx driver does not set the udevice in the mtd_info
struct and this prevents the mtd from parsing the partitions via DTS
like for SPI-NOR.
So simply set the mtd->dev to the driver udevice.
Signed-off-by: Robert Marko
---
drivers/mtd/nand/raw/pxa3xx_nand.c | 1 +
1 file
On Tue, Jan 04, 2022 at 07:54:38PM -0300, Fabio Estevam wrote:
> HI Tim,
>
> On Tue, Jan 4, 2022 at 7:48 PM Tim Harvey wrote:
> >
> > Stefano and Fabio,
> >
> > I'm seeing the imx8mm_venice_defconfig target failing to build on
> > master due to mkimage_fit_atf.sh not found:
> >
Hi Gary,
On Wed, Jan 5, 2022 at 10:18 AM Gary Bisson
wrote:
>
> Since commit f7ac30b042d, the pin muxing for mmc was removed from the
> board file to be managed by DM_MMC which requires PINCTRL to work. It
> made the change for sabrelite but nitrogen configs were forgotten.
>
> Signed-off-by:
Hi Heiko,
On Tue, 4 Jan 2022 at 07:22, Heiko Thiery wrote:
>
> Hi Simon,
>
>
> Am So., 2. Jan. 2022 um 18:15 Uhr schrieb Simon Glass :
> >
> > Hi Heiko,
> >
> > On Thu, 2 Dec 2021 at 19:53, Simon Glass wrote:
> > >
> > > Hi Heiko,
> > >
> > > On Mon, 29 Nov 2021 at 02:48, Heiko Thiery wrote:
>
On Tue, 4 Jan 2022 at 18:08, Bin Meng wrote:
>
> When using QEMU to have a quick test of booting U-Boot S-mode payload
> directly without the needs of preparing the SPI flash or SD card images
> for SiFive Unleashed board, as per the instructions [1], it currently
> does not boot any more.
>
>
On Tue, 4 Jan 2022 at 09:20, Eugen Hristev wrote:
>
> CONFIG_PHANDLE_CHECK_SEQ is outside of the menu 'Library routines'
> thus it's invisible in menuconfig and cannot be selected.
> Fix this by moving the 'endmenu' after the PHANDLE_CHECK_SEQ definition
>
> Fixes: c589132a1d ("fdt: Use phandle
Hi Heiko,
On Wed, 5 Jan 2022 at 05:58, Heiko Thiery wrote:
>
> While converting to binman for an imx8mq board, it has been found that
> building in the u-boot CI fails. This is because an imx8mq requires an
> external binary (signed_hdmi_imx8m.bin). If this file cannot be found
> mkimage fails.
Hi Heiko,
On Wed, 5 Jan 2022 at 09:06, Simon Glass wrote:
>
> Hi Heiko,
>
> On Wed, 5 Jan 2022 at 05:58, Heiko Thiery wrote:
> >
> > While converting to binman for an imx8mq board, it has been found that
> > building in the u-boot CI fails. This is because an imx8mq requires an
> > external
)) {}:
arm-linux-gnueabihf-objdump -d drivers/timer/dw-apb-timer.o >
../dw-apb-timer-20220105-v1.asm
:
0: 2000movsr0, #0
2: 4770bx lr
arm-linux-gnueabihf-objdump -d spl/drivers/timer/dw-apb-timer.o >
../dw-apb-timer-20220105-spl-v1.asm
arm
On Wed, Jan 5, 2022 at 1:50 AM Pali Rohár wrote:
>
> Register 0x43c in its low 24 bits contains PCI class code.
>
> Update code to set all 24 bits of PCI class code and not only upper 16 bits
> of PCI class code.
>
> Use standard U-Boot macro (PCI_CLASS_BRIDGE_PCI << 8) for constructing all
>
On 1/5/22 16:30, Stefan Roese wrote:
On 12/25/21 20:50, Pierre Bourdon wrote:
Recent changes caused fields in the image main header to be modified
after the header checksum had already been computed. Move the checksum
computation to once again be the last operation performed on the header.
On 1/5/22 16:01, Robert Marko wrote:
Currently the pxa3xx driver does not set the udevice in the mtd_info
struct and this prevents the mtd from parsing the partitions via DTS
like for SPI-NOR.
So simply set the mtd->dev to the driver udevice.
Signed-off-by: Robert Marko
Reviewed-by: Stefan
Hi All,
On 05/01/22 13:54, Jesse Taube wrote:
On 1/5/22 07:14, Andre Przywara wrote:
On Wed, 05 Jan 2022 19:36:29 +0800
Icenowy Zheng wrote:
Hi Jesse,
在 2022-01-04星期二的 19:34 -0500，Jesse Taube写道：
This patch set aims to add suport for the SUNIV and F1C100s.
Suport has been in linux for a
Hi Tom,
please pull this last minute kwbimage related fix:
- kwbimage: Fix checksum calculation for v1 images (Pierre)
Here the Azure build, without any issues:
On Wed, Jan 5, 2022 at 3:34 AM ZHIZHIKIN Andrey
wrote:
>
> Hello Tim,
>
> > -Original Message-
> > From: U-Boot On Behalf Of Tim Harvey
> > Sent: Tuesday, January 4, 2022 11:48 PM
> > To: u-boot ; Stefano Babic ; Fabio
> > Estevam
> >
> > Cc: Schrempf Frieder ; Adam Ford
> > ; Marcel
On 1/4/22 14:24, Patrick Delaunay wrote:
Use moveconfig.py script to convert define CONFIG_SYS_MAX_FLASH_BANKS
and CONFIG_SYS_MAX_FLASH_BANKS_DETECT to Kconfig and move these entries
to defconfigs.
Signed-off-by: Patrick Delaunay
Reviewed-by: Simon Glass
Reviewed-by: Stefan Roese
Thanks,
On Tue, Jan 04, 2022 at 06:03:17PM +0800, Potin Lai wrote:
> Initial introduction of Bletchley equipped with
> Aspeed 2600 BMC SoC.
>
> Signed-off-by: Potin Lai
>
> ---
>
> Change since v1:
> - Disable mdio0, mdio1, mdio2
> - Remove mac0, mac1, mac3 (keep disabled)
> - Enable mac2, and set to
Hi Jianan,
On Wed, Aug 25, 2021 at 06:40:42PM -0400, Tom Rini wrote:
> On Mon, Aug 23, 2021 at 08:36:43PM +0800, Huang Jianan wrote:
>
> > From: Huang Jianan
> >
> > Add erofs filesystem support.
> >
> > The code is adapted from erofs-utils in order to reduce maintenance
> > burden and keep
On Sun, Nov 28, 2021 at 05:02:23PM +0530, Amit Singh Tomar wrote:
> From: Amit Singh Tomar
>
> This patch adds node for mmc/sd controller found on Action Semi OWL
> S700 SoC.
>
> Since, upstream Linux binding has not been merged for S700 MMC/SD
> controller, Changes are put in u-boot specific
On Tue, Nov 23, 2021 at 10:08:47PM +0300, Andrei Kartashev wrote:
> Add option to initialize LEDs in board_init stage for aspeed-based
> boards.
>
> Signed-off-by: Andrei Kartashev
> ---
> board/aspeed/evb_ast2500/evb_ast2500.c | 8
> board/aspeed/evb_ast2600/evb_ast2600.c | 8
On Wed, Jan 05, 2022 at 06:27:38PM +0100, Stefan Roese wrote:
> Hi Tom,
>
> please pull this last minute kwbimage related fix:
>
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
On 1/1/22 22:41, Sean Anderson wrote:
Hi Marek,
Hi,
Please CC clock maintainers for future patches.
btw. I'm surprised the commit 92f1e9a4b31c0bf0f4f61ab823a6a88657323646
has zero reviews/acks from clock maintainers.
On 1/1/22 1:51 PM, Marek Vasut wrote:
This reverts commit
On Wed, Jan 05, 2022 at 08:35:19PM +0100, Marek Vasut wrote:
> On 1/1/22 22:41, Sean Anderson wrote:
> > Hi Marek,
>
> Hi,
>
> > Please CC clock maintainers for future patches.
>
> btw. I'm surprised the commit 92f1e9a4b31c0bf0f4f61ab823a6a88657323646 has
> zero reviews/acks from clock
On 1/5/22 20:37, Tom Rini wrote:
On Wed, Jan 05, 2022 at 08:35:19PM +0100, Marek Vasut wrote:
On 1/1/22 22:41, Sean Anderson wrote:
Hi Marek,
Hi,
Please CC clock maintainers for future patches.
btw. I'm surprised the commit 92f1e9a4b31c0bf0f4f61ab823a6a88657323646 has
zero reviews/acks
On 1/5/22 2:37 PM, Tom Rini wrote:
On Wed, Jan 05, 2022 at 08:35:19PM +0100, Marek Vasut wrote:
On 1/1/22 22:41, Sean Anderson wrote:
Hi Marek,
Hi,
Please CC clock maintainers for future patches.
btw. I'm surprised the commit 92f1e9a4b31c0bf0f4f61ab823a6a88657323646 has
zero reviews/acks
===
> Patch version 1 with if (IS_ENABLED(OF_REAL)) {}:
>
> arm-linux-gnueabihf-objdump -d drivers/timer/dw-apb-timer.o >
> ../dw-apb-timer-20220105-v1.asm
>
>
> :
>0: 2000movsr0, #0
>2: 4770bx lr
>
> arm-linux-
On Wed, Jan 05, 2022 at 08:56:50PM +0100, Marek Vasut wrote:
> On 1/5/22 20:37, Tom Rini wrote:
> > On Wed, Jan 05, 2022 at 08:35:19PM +0100, Marek Vasut wrote:
> > > On 1/1/22 22:41, Sean Anderson wrote:
> > > > Hi Marek,
> > >
> > > Hi,
> > >
> > > > Please CC clock maintainers for future
On Wed, 2022-01-05 at 17:04 -0500, Tom Rini wrote:
> On Wed, Jan 05, 2022 at 10:51:23PM +0100, Marcel Ziswiler wrote:
> > Hi Tim et al.
> >
> > On Wed, 2022-01-05 at 11:08 -0800, Tim Harvey wrote:
> > > On Wed, Jan 5, 2022 at 3:34 AM ZHIZHIKIN Andrey
> > > wrote:
> > > >
> > > > Hello Tim,
> >
Some older x530 boards have layout issues that cause problems for DDR.
These are usually seen as training failures but can also cause problems
after training has completed. Add an option to enable ECC leaving the
default as N which will work with both old and new boards.
Signed-off-by: Chris
On Mon, Jan 03, 2022 at 12:15:12PM -0300, Fabio Estevam wrote:
> By default the Model information from DT is printed:
>
> CPU: Freescale i.MX6SX rev1.2 996 MHz (running at 792 MHz)
> CPU: Extended Commercial temperature grade (-20C to 105C) at 63C
> Reset cause: POR
> Model: UDOO Neo Basic
>
On Wed, Dec 29, 2021 at 05:04:17PM +0100, Mark Kettenis wrote:
> > From: François Ozog
> > Date: Wed, 29 Dec 2021 14:39:36 +0100
> >
> > HI Simon
> >
> > On Wed, 29 Dec 2021 at 14:36, Simon Glass wrote:
> >
> > > Hi François,
> > >
> > > On Tue, 28 Dec 2021 at 03:15, François Ozog
> > >
Hi Marek,
On Sat, Jan 1, 2022 at 3:51 PM Marek Vasut wrote:
>
> This reverts commit 92f1e9a4b31c0bf0f4f61ab823a6a88657323646.
> The aforementioned patch causes massive breakage on all platforms which
> have 'assigned-clock' DT property in their DT which references any clock
> that are not
On Wed, Jan 05, 2022 at 11:07:03PM +0100, Marcel Ziswiler wrote:
> On Wed, 2022-01-05 at 17:04 -0500, Tom Rini wrote:
> > On Wed, Jan 05, 2022 at 10:51:23PM +0100, Marcel Ziswiler wrote:
> > > Hi Tim et al.
> > >
> > > On Wed, 2022-01-05 at 11:08 -0800, Tim Harvey wrote:
> > > > On Wed, Jan 5,
On Thu, Jan 6, 2022 at 11:51 AM Chris Packham wrote:
>
> On Wed, Jan 5, 2022 at 10:10 PM Marek Behún wrote:
> >
> > On Wed, 5 Jan 2022 11:10:51 +1300
> > Chris Packham wrote:
> >
> > > Hi Marek,
> > >
> > > On Wed, Jan 5, 2022 at 9:28 AM Marek Behún wrote:
> > > >
> > > > From: Marek Behún
>
On Wed, Jan 05, 2022 at 05:52:23PM -0300, Fabio Estevam wrote:
> Hi Tommaso,
>
> On Wed, Jan 5, 2022 at 5:47 PM Tommaso Merciai wrote:
>
> > Hi Fabio,
> > Thanks, I test your patch on basic and extended model. Below some logs
> > seems all work properly. I hope I helped the cause :)
>
> Yes,
On Wed, Jan 05, 2022 at 10:51:23PM +0100, Marcel Ziswiler wrote:
> Hi Tim et al.
>
> On Wed, 2022-01-05 at 11:08 -0800, Tim Harvey wrote:
> > On Wed, Jan 5, 2022 at 3:34 AM ZHIZHIKIN Andrey
> > wrote:
> > >
> > > Hello Tim,
> > >
> > > > -Original Message-
> > > > From: U-Boot On
Hi Tommaso,
On Wed, Jan 5, 2022 at 5:47 PM Tommaso Merciai wrote:
> Hi Fabio,
> Thanks, I test your patch on basic and extended model. Below some logs
> seems all work properly. I hope I helped the cause :)
Yes, thanks a lot!
> - BASIC log:
>
On Wed, Jan 5, 2022 at 10:10 PM Marek Behún wrote:
>
> On Wed, 5 Jan 2022 11:10:51 +1300
> Chris Packham wrote:
>
> > Hi Marek,
> >
> > On Wed, Jan 5, 2022 at 9:28 AM Marek Behún wrote:
> > >
> > > From: Marek Behún
> > >
> > > Hello,
> > >
> > > continuing my last discussion with Chris [1]
Hi Miquel
>
> Hi Jaime,
>
> You made a typo on Jagan's address, you might need to resend.
Yes your are right, I have re-send the cover letter to Jagan.
>
> The title does not look correct, maybe you miss a word after Octal. And
> is it something Macronix specific? I believe this is generic and
Hi Tudor
>
> Hi,
>
> On 12/29/21 7:56 AM, JaimeLiao wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> > content is safe
> >
> > Follow patch "f6adec1af4b2f5d3012480c6cdce7743b74a6156" for adding
> > Macronix flash in Octal DTR mode.
> >
> > Enable Octal DTR
MPP55 is used as a reset connected to the L3 switch chip. This doesn't
matter for u-boot as it doesn't use the L3 switch but it is useful to
be able to toggle the switch in/out of reset for the OS.
Signed-off-by: Chris Packham
---
board/alliedtelesis/x530/x530.c | 2 +-
1 file changed, 1
Hi Tim et al.
On Wed, 2022-01-05 at 11:08 -0800, Tim Harvey wrote:
> On Wed, Jan 5, 2022 at 3:34 AM ZHIZHIKIN Andrey
> wrote:
> >
> > Hello Tim,
> >
> > > -Original Message-
> > > From: U-Boot On Behalf Of Tim Harvey
> > > Sent: Tuesday, January 4, 2022 11:48 PM
> > > To: u-boot ;
Hi Michael,
> -Original Message-
> From: Michael Walle
> Sent: Thursday, December 23, 2021 3:05 PM
> To: Sahil Malhotra (OSS)
> Cc: ZHIZHIKIN Andrey ; Clément Faure
> ; Gaurav Jain ; Pankaj Gupta
> ; Priyanka Jain ; u-
> b...@lists.denx.de; Varun Sethi ; Ye Li
> Subject: Re: [EXT] Re:
On Sun, Jan 02, 2022 at 10:19:21AM +0100, Heinrich Schuchardt wrote:
> On 12/10/21 07:49, AKASHI Takahiro wrote:
> > When we create an efi_disk device with an UEFI application using driver
> > binding protocol, the 'efi_driver' framework tries to create
> > a corresponding block
Hi Tom,
On Wed, Jan 5, 2022 at 9:08 AM Bin Meng wrote:
>
> When using QEMU to have a quick test of booting U-Boot S-mode payload
> directly without the needs of preparing the SPI flash or SD card images
> for SiFive Unleashed board, as per the instructions [1], it currently
> does not boot any
Hi Sahil,
Am 2022-01-06 07:09, schrieb Sahil Malhotra (OSS):
I don't know I follow. u-boot and linux should have the same device
tree;
regardless if that device is used or not. So applying the overlay just
for linux isn't
enough here.
Ok, I don't think that as of now, in all platforms uboot
you try it yourself?
> Please advise what options we have.
>
> Kind regards,
>
> Johan Jonker
>
> ==
> Patch version 1 with if (IS_ENABLED(OF_REAL)) {}:
>
> arm-linux-gnueabihf-objdump -
On Sun, Jan 02, 2022 at 10:18:18AM +0100, Heinrich Schuchardt wrote:
> On 12/10/21 07:49, AKASHI Takahiro wrote:
> > Add efi_disk_probe() function.
> > This function creates an efi_disk object for a raw disk device (UCLASS_BLK)
> > and additional objects for related partitions (UCLASS_PARTITION).
Hi,
On Wed, 5 Jan 2022 at 13:57, Tom Rini wrote:
>
> On Wed, Jan 05, 2022 at 08:56:50PM +0100, Marek Vasut wrote:
> > On 1/5/22 20:37, Tom Rini wrote:
> > > On Wed, Jan 05, 2022 at 08:35:19PM +0100, Marek Vasut wrote:
> > > > On 1/1/22 22:41, Sean Anderson wrote:
> > > > > Hi Marek,
> > > >
> >
Hi Sahil,
(and happy new year ;-)
On Thu, 6 Jan 2022 at 07:09, Sahil Malhotra (OSS) <
sahil.malho...@oss.nxp.com> wrote:
> Hi Michael,
>
> > -Original Message-
> > From: Michael Walle
> > Sent: Thursday, December 23, 2021 3:05 PM
> > To: Sahil Malhotra (OSS)
> > Cc: ZHIZHIKIN Andrey ;
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