Hi Benoît,
On Thu, 11 Apr 2013 21:35:34 +0200, Benoît Thébaudeau
benoit.thebaud...@advansee.com wrote:
From: Fabio Estevam fabio.este...@freescale.com
Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT option so that other NAND controller
drivers could use it when a 16-bit NAND is deployed.
-Original Message-
From: Albert ARIBAUD [mailto:albert.u.b...@aribaud.net]
Sent: 11 April 2013 14:41
To: Holger Brunck
Cc: Tom Rini; u-boot@lists.denx.de; Prafulla Wadaskar;
Falauto, Gerlando
Subject: Re: [STATUS] v2013.04-rc2 released
Hi Holger,
On Thu, 11 Apr 2013 10:34:09
Hi Albert,
On Thu, 11 Apr 2013 20:13:16 +0200, Albert ARIBAUD
albert.u.b...@aribaud.net wrote:
Hi Tom,
On Thu, 11 Apr 2013 11:04:44 -0700, Tom Warren
twarren.nvi...@gmail.com wrote:
Albert,
On Thu, Apr 11, 2013 at 11:01 AM, Albert ARIBAUD
albert.u.b...@aribaud.netwrote:
Hi Joe,
On 12.04.2013 00:26, Tom Rini wrote:
On Mon, Apr 08, 2013 at 03:32:45PM -0500, Joe Hershberger wrote:
NAND is not good at handling absolute addresses to sectors for storing
particular data. The current implementation of the NAND env support
works around this in several ways such as
Hi Prafulla,
On Thu, 11 Apr 2013 23:12:19 -0700, Prafulla Wadaskar
prafu...@marvell.com wrote:
-Original Message-
From: Albert ARIBAUD [mailto:albert.u.b...@aribaud.net]
Sent: 11 April 2013 14:41
To: Holger Brunck
Cc: Tom Rini; u-boot@lists.denx.de; Prafulla Wadaskar;
-Original Message-
From: Albert ARIBAUD [mailto:albert.u.b...@aribaud.net]
Sent: 12 April 2013 11:57
To: Prafulla Wadaskar
Cc: Holger Brunck; Tom Rini; u-boot@lists.denx.de;
Falauto, Gerlando
Subject: Re: [STATUS] v2013.04-rc2 released
Hi Prafulla,
On Thu, 11 Apr 2013
Dear Stefan Roese,
They never return anything also than 0, so lets change the function
to void instead.
Signed-off-by: Stefan Roese s...@denx.de
Add my:
Reviewed-by: Marek Vasut ma...@denx.de
Best regards,
Marek Vasut
___
U-Boot mailing list
Dear Mike Dunn,
Make lcd_init() a weak pointer so that boards can overload it if necessary.
The palmtreo680 board needs to wiggle some gpios and configure the pwm
controller in order to get the lcd and its backlight working.
Signed-off-by: Mike Dunn miked...@newsguy.com
Reviewed-by: Marek
Dear Mike Dunn,
This adds the definitions required to support the LCD device on the Palm
Treo 680.
Signed-off-by: Mike Dunn miked...@newsguy.com
Reviewed-by: Marek Vasut ma...@denx.de
Best regards,
Marek Vasut
___
U-Boot mailing list
Dear Mike Dunn,
On the pxa270, if the udc device is not disabled before jumping to linux,
the device fails to initialize in linux because it was left in a running
state, and the linux driver assumes that it is in a disabled state.
Signed-off-by: Mike Dunn miked...@newsguy.com
I hope this
Dear Mike Dunn,
A quick overview of u-boot implementation on the treo 680...
The treo 680 has a Diskonchip G4 nand flash chip. This device has a 2k
region that maps to the system bus at the reset vector in a NOR-like
fashion so that it can be used as the boot device. The phone is shipped
Dear Mike Dunn,
This patch adds the bitrev library from the linux kernel. This is a simple
algorithm that uses an 8 bit look-up table to reverse the bits in data
types of 8, 16, or 32 bit widths. The docg4 nand flash driver uses it.
[port from linux kernel 2.6.20 commit
Dear Mike Dunn,
This patch adds a driver for the diskonchip G4 nand flash device. It is
based on the driver from the linux kernel.
This also includes a separate SPL driver. A separate SPL driver is used
because the device operates in a different mode (reliable mode) when
loading a boot
Dear Mike Dunn,
If CONFIG_USB_DEV_PULLUP_GPIO is defined, a link error occurs because the
set_GPIO_mode() helper function is not implemented. This function doesn't
do much except make the code a little more readable, so I just manually
coded its equivalent and removed the prototype from the
Hi Prafulla,
On Thu, 11 Apr 2013 23:38:06 -0700, Prafulla Wadaskar
prafu...@marvell.com wrote:
-Original Message-
From: Albert ARIBAUD [mailto:albert.u.b...@aribaud.net]
Sent: 12 April 2013 11:57
To: Prafulla Wadaskar
Cc: Holger Brunck; Tom Rini; u-boot@lists.denx.de;
This series contains the support for vybrid CPU and vf600 tower board.
The Vybrid devices are a family of Freescale's latest Dual Single
Core offering with ARM Cortex A5 and CM4 based processors for
Advanced Connected Radio, Entry Infotainment, and Cluster as well
as high end industrial and
This patch adds Freescale vybrid vf600 tower board support.
Signed-off-by: TsiChung Liew tsicl...@gmail.com
Signed-off-by: Jason Jin jason@freescale.com
Signed-off-by: Alison Wang b18...@freescale.com
---
board/freescale/vybrid/Makefile| 40 +++
board/freescale/vybrid/vybrid.c
This patch adds eSDHC driver support for vybrid platform.
Signed-off-by: TsiChung Liew tsicl...@gmail.com
Signed-off-by: Jason Jin jason@freescale.com
Signed-off-by: Alison Wang b18...@freescale.com
---
drivers/mmc/fsl_esdhc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
This patch adds uart driver support for vybrid platform.
Signed-off-by: TsiChung Liew tsicl...@gmail.com
Signed-off-by: Jason Jin jason@freescale.com
Signed-off-by: Alison Wang b18...@freescale.com
---
drivers/serial/Makefile| 1 +
drivers/serial/serial.c| 2 +
This patch adds ethernet driver support for vybrid platform.
Signed-off-by: TsiChung Liew tsicl...@gmail.com
Signed-off-by: Jason Jin jason@freescale.com
Signed-off-by: Alison Wang b18...@freescale.com
---
arch/arm/include/asm/fec.h| 302 ++
Hi all,
2013/1/26 Matthias Brugger matthias@gmail.com
2012/12/11 Matthias Brugger matthias@gmail.com:
This patch tackles the time out problem which leads to break the
boot process, when loading file over nfs. The patch does two things.
First of all, we just ignore messages that
Hi Albert,
On Thu, 11 Apr 2013 18:30:58 +0200, Albert ARIBAUD
albert.u.b...@aribaud.net wrote:
Hi Albert,
On Thu, 11 Apr 2013 17:25:34 +0200, Albert ARIBAUD
albert.u.b...@aribaud.net wrote:
Hello,
Older toolchain and PPC incompatibilities appeared in the last two
additions to ToT
To avoid sign extension problem, use explicit casting to cast
the SDRAM size to type phys_size_t, or else, if the SDRAM size
is 2G(0x8000), it will be extended to 0x8000
when phys_size_t is type 'unsigned long long'.
Signed-off-by: Mingkai Hu mingkai...@freescale.com
---
Based on
To avoid sign extension problem, use explicit casting to cast
the SDRAM size to type phys_size_t, or else, if the SDRAM size
is 2G(0x8000), it will be extended to 0x8000
when phys_size_t is type 'unsigned long long'.
Signed-off-by: Mingkai Hu mingkai...@freescale.com
---
Based on
Dear Tom, Stfan, Aaron,
In message 20130405162807.GH32357@bill-the-cat you wrote:
please pull the updated cfi-flash repository with the build warning fix:
...
aaron.willi...@caviumnetworks.com (1):
mtd: cfi_flash: Fix CFI flash driver for 8-bit bus support
Hereby I ask to revert
Hi Wolfgang,
On 12.04.2013 11:35, Wolfgang Denk wrote:
In message 20130405162807.GH32357@bill-the-cat you wrote:
please pull the updated cfi-flash repository with the build warning fix:
...
aaron.willi...@caviumnetworks.com (1):
mtd: cfi_flash: Fix CFI flash driver for 8-bit bus
Please ignore this patch because there's a typo in title powpc.
Thanks,
Mingkai
-Original Message-
From: Hu Mingkai-B21284
Sent: Friday, April 12, 2013 3:53 PM
To: u-boot@lists.denx.de
Cc: Fleming Andy-AFLEMING; sun york-R58495; Hu Mingkai-B21284
Subject: [PATCH] powpc/mpc85xx: explicit
We have a dual Ethernet board (based on the BeagelBone) but with both Ethernet
ports connected.
I'm wanting to use eth1 (rather than eth0), so in my board.c file, I changed:-
static struct cpsw_slave_data cpsw_slaves[] = {
{
.slave_reg_ofs = 0x208,
On Mon, Apr 8, 2013 at 4:05 PM, Vivek Gautam gautam.vi...@samsung.com wrote:
Based on 'u-boot-usb' master branch.
This patch-series includes majorly some clean-up, few fixes and
then some basic super-speed usb infrastructure addition, to help
put support for XHCI in near future.
Changes
We have a dual Ethernet board (based on the BeagelBone) but with both Ethernet
ports connected.
I'm wanting to use eth1 (rather than eth0), so in my board.c file, I changed:-
static struct cpsw_slave_data cpsw_slaves[] = {
{
.slave_reg_ofs = 0x208,
Based on 'u-boot-usb' master branch.
This patch-series includes majorly some clean-up, few fixes and
then some basic super-speed usb infrastructure addition, to help
put support for XHCI in near future.
Changes from v2:
- Added a patch usb: common: Weed out USB_**_PRINTFs from usb framework
Some cleanup in usb framework, nothing much on feature side.
Signed-off-by: Vikas C Sajjan vikas.saj...@samsung.com
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
Changes from v2:
- none
common/usb.c | 21 +
common/usb_storage.c | 30
USB_PRINTF, USB_HUB_PRINTF, USB_STOR_PRINTF, USB_KBD_PRINTF
are nothing but conditional debug prints, depending on DEBUG.
So better remove them and use debug() simply.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
This patch added in V3(current-version) of this patch-series.
XHCI ports are powered on after a H/W reset, however
EHCI ports are not. So disabling and re-enabling power
on all ports invariably.
Signed-off-by: Amar amarendra...@samsung.com
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
Changes from v2:
- Replaced USB_HUB_PRINTFs to debug()
Fetch the device class into usb device's dwcriptors,
so that the host controller's driver can use this info
to differentiate between HUB and DEVICE.
Signed-off-by: Amar amarendra...@samsung.com
---
Changes from v2:
- none
common/usb.c |5 +
1 files changed, 5 insertions(+), 0
Patch b6d7852c increases timeout for enumeration, taking
worst case to be 10 sec.
get_timer() api returns timestamp in milliseconds, which is
what we are checking in the do-while() loop in usb_hub_configure()
(get_timer(start) CONFIG_SYS_HZ * 10).
This should give us a required check for 10
This adds usb framework support for super-speed usb, which will
further facilitate to add stack support for xHCI.
Signed-off-by: Vikas C Sajjan vikas.saj...@samsung.com
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
Changes from v2:
- Replacing if-else with switch-case in portspeed()
As per XHCI specifications USB 3.0 protocol ports attempt
to advance to 'Enabled' state; however USB 2.0 protocol ports
require software reset to advance them to 'Enabled' state.
Thereby, inferring that software need to reset USB 2.0 protocol
ports invariably (as per EHCI spec or xHCI spec).
We can use a common global macro for calculating minimum of
3 numbers. Put the same in 'common header' and let 'ehci'
use it.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
This patch added in V3(current-version) of this patch-series.
drivers/usb/host/ehci-hcd.c | 10 --
Hi guys,
I have grepped the u-boot and didn't found any reference how to define
phy addresses for second ethernet device.
Is there any standard CONFIG option for that?
CONFIG_PHY_ADDR1 or so?
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP - KeyID:
w: www.monstr.eu p: +42-0-721842854
On Fri, Apr 12, 2013 at 3:53 AM, Alison Wang b18...@freescale.com wrote:
+static char *get_reset_cause(void)
+{
+ char *resetcause[32] = {POR,
+ Cortex A5 WDOG Timer Reset,
+ 0,
You mix strings and an integer zero here.
On 04/10/2013 03:13 PM, Amarendra Reddy wrote:
Hi Jaehoon,
Please find my responses below.
Thanks Regards
Amarendra Reddy
On 9 April 2013 16:23, Jaehoon Chung jh80.ch...@samsung.com wrote:
On 04/03/2013 11:08 PM, Amar wrote:
This patch adds FDT support for DWMMC, by reading the
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 04/12/2013 02:19 AM, Stefan Roese wrote:
Hi Joe,
On 12.04.2013 00:26, Tom Rini wrote:
On Mon, Apr 08, 2013 at 03:32:45PM -0500, Joe Hershberger wrote:
NAND is not good at handling absolute addresses to sectors for
storing particular data.
Hi Alison,
On Fri, Apr 12, 2013 at 3:53 AM, Alison Wang b18...@freescale.com wrote:
This patch adds Freescale vybrid vf600 tower board support.
Signed-off-by: TsiChung Liew tsicl...@gmail.com
Signed-off-by: Jason Jin jason@freescale.com
Signed-off-by: Alison Wang b18...@freescale.com
On Fri, Apr 12, 2013 at 3:53 AM, Alison Wang b18...@freescale.com wrote:
This patch adds uart driver support for vybrid platform.
Signed-off-by: TsiChung Liew tsicl...@gmail.com
Signed-off-by: Jason Jin jason@freescale.com
Signed-off-by: Alison Wang b18...@freescale.com
---
On Fri, Apr 12, 2013 at 3:53 AM, Alison Wang b18...@freescale.com wrote:
This patch adds ethernet driver support for vybrid platform.
Signed-off-by: TsiChung Liew tsicl...@gmail.com
Signed-off-by: Jason Jin jason@freescale.com
Signed-off-by: Alison Wang b18...@freescale.com
---
CONFIG_SPL_MAX_SIZE and CONFIG_SPL_BSS_MAX_SIZE did not have constant
semantics across all of U-boot. This patch series aims at fixing this by
splitting the maximum size into separate image (code + data + rodata +
linker list) size on the one hand, and BSS size on the other hand.
Changes in v3:
-
On 04/11/2013 12:19 PM, Marek Vasut wrote:
Dear Mike Dunn,
This patch adds the bitrev library from the linux kernel. This is a simple
algorithm that uses an 8 bit look-up table to reverse the bits in data
types of 8, 16, or 32 bit widths. The docg4 nand flash driver uses it.
[port from
CONFIG_SPL_MAX_SIZE wrongly included BSS size.
Split 12K max size between 10K image (text,rodata,data)
and 2K BSS based on sizes reported for current build:
textdata bss
9073 840 500
Signed-off-by: Albert ARIBAUD albert.u.b...@aribaud.net
---
Changes in v3: None
Changes in
CONFIG_SPL_MAX_SIZE wrongly included BSS size.
Split 32K max size between 24K image (text,rodata,data)
and 8K BSS based on sizes reported for current build:
textdata bss
156761316 108
Signed-off-by: Albert ARIBAUD albert.u.b...@aribaud.net
---
Changes in v3: None
Changes in
CONFIG_SPL_MAX_SIZE wrongly included BSS size.
Split 14K max size between 10K image (text,rodata,data)
and 4K BSS based on sizes reported for current build:
textdata bss
4136 904 0
Signed-off-by: Albert ARIBAUD albert.u.b...@aribaud.net
---
Changes in v3: None
Changes in
Remove SPL-related ASSERT() in arch/arm/cpu/u-boot.lds
as this file is never used for SPL builds.
Rewrite the ASSERT() in arch/arm/cpu/u-boot-spl.lds
to separately test image (text,data,rodata...) size,
BSS size, and full footprint each against its own max,
and make Tegra boards check full
This serie introduce the support of the TI816X EVM board.
It applies on top of Matt Porter patches introducing the support of the
TI814X EVM board (Add TI814x EVM Support).
The serie fits into the existing AM33XX SoC support and reuse some definitions
from the TI814X.
Based on the implementation
Rename some CONFIG_TI814X to a more generic CONFIG_81XX
Signed-off-by: Antoine Tenart aten...@adeneo-embedded.com
---
Makefile|2 +-
arch/arm/cpu/armv7/Makefile |2 +-
arch/arm/cpu/armv7/omap-common/Makefile |2 +-
Signed-off-by: Antoine Tenart aten...@adeneo-embedded.com
---
arch/arm/include/asm/arch-am33xx/clock.h |4 +
arch/arm/include/asm/arch-am33xx/clocks_ti816x.h | 136
arch/arm/include/asm/arch-am33xx/cpu.h |4 +
arch/arm/include/asm/arch-am33xx/cpu_ti816x.h
Signed-off-by: Antoine Tenart aten...@adeneo-embedded.com
---
MAINTAINERS|4 +
arch/arm/include/asm/arch-am33xx/spl.h |9 +
board/ti/ti816x/Makefile | 48 ++
board/ti/ti816x/evm.c | 866
Am 08.04.2013 21:17, schrieb Jason Cooper:
Jan,
On Mon, Apr 08, 2013 at 11:14:25AM +0200, JPT wrote:
during my dealing with the bricked kirkwood board I wrote an app
which automates the process of booting from UART.
It's rather stable now, except right now it doesn't work any more.
Never was
On Fri, Apr 12, 2013 at 01:55:39PM +0200, Albert ARIBAUD wrote:
CONFIG_SPL_MAX_SIZE and CONFIG_SPL_BSS_MAX_SIZE did not have constant
semantics across all of U-boot. This patch series aims at fixing this by
splitting the maximum size into separate image (code + data + rodata +
linker list)
Hi Everyone,
Sinced a few days I noticed some problems writing the uimage to a FAT
partition on my SD-card. At first I was afraid of some (physical)
SD-card problems, but it appears to be related to he size of the uImage.
With some further testing (and adding some debug printing), I could
easily
On 04/11/2013 12:20 PM, Marek Vasut wrote:
Dear Mike Dunn,
A quick overview of u-boot implementation on the treo 680...
The treo 680 has a Diskonchip G4 nand flash chip. This device has a 2k
region that maps to the system bus at the reset vector in a NOR-like
fashion so that it can be
Hi Stefan,
On Fri, Apr 12, 2013 at 6:30 AM, Tom Rini tr...@ti.com wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 04/12/2013 02:19 AM, Stefan Roese wrote:
Hi Joe,
On 12.04.2013 00:26, Tom Rini wrote:
On Mon, Apr 08, 2013 at 03:32:45PM -0500, Joe Hershberger wrote:
NAND is not
On 04/11/2013 02:00 PM, Scott Wood wrote:
On 04/10/2013 07:45:27 PM, Mike Dunn wrote:
This patch adds a driver for the diskonchip G4 nand flash device. It is
based
on the driver from the linux kernel.
This also includes a separate SPL driver. A separate SPL driver is used
because
the
Hi Matthias and Enric,
On Fri, Apr 12, 2013 at 3:08 AM, Enric Balletbo Serra
eballe...@gmail.com wrote:
Hi all,
2013/1/26 Matthias Brugger matthias@gmail.com
2012/12/11 Matthias Brugger matthias@gmail.com:
This patch tackles the time out problem which leads to break the
boot
On Thu, Apr 11, 2013 at 12:51:03PM -0700, Suriyan Ramasami wrote:
Sounds good to me.
I shall attempt a generic version and call it cmd_bootscan.c in the common
directory.
A good first pass. Please keep board/ait/cam_enc_4xx/cam_enc_4xx.c in
mind as that has a similar set of things going
Hi Albert,
Please pull
The following changes since commit c97b6df1ae92679d67f94c1cfef51323782a506d:
Albert ARIBAUD (1):
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
are available in the git repository at:
u-boot-marvell.git master branch.
Gerlando Falauto (1):
Hi Ruud,
Ruud Commandeur wrote:
Once the size of the set_cluster call equals 0, the mmc command is
incomplete and times out. In the earlier reported problem, a patch is
mentioned, but not available for dowload here. Also in the latest
versions of the git repository I could not find a patch
Hi Joe,
Thanks for answer.
2013/4/12 Joe Hershberger joe.hershber...@gmail.com
Hi Matthias and Enric,
On Fri, Apr 12, 2013 at 3:08 AM, Enric Balletbo Serra
eballe...@gmail.com wrote:
Hi all,
2013/1/26 Matthias Brugger matthias@gmail.com
2012/12/11 Matthias Brugger
Hi Joe,
On 12.04.2013 14:52, Joe Hershberger wrote:
Sorry that wasn't clearer. In the last two patches you can see where
I have to add a few changes to the fw_setenv to make it function
properly on the GLUEBI mtd devices.
I guess I didn't add much to the READMEs about it. I'll try to
On Fri, Apr 12, 2013 at 11:43:33AM +0200, Stefan Roese wrote:
Hi Wolfgang,
On 12.04.2013 11:35, Wolfgang Denk wrote:
In message 20130405162807.GH32357@bill-the-cat you wrote:
please pull the updated cfi-flash repository with the build warning fix:
...
Hi Mats,
Thanks a lot, this seems to solve my problem. Nothing more actualy than adding
a if(size) around the code block of set_sector( ). I could have thought of
that myself, but was not sure if anything else should be done in this case...
Regards,
Ruud
-Oorspronkelijk bericht-
Hi Prafulla,
On Fri, 12 Apr 2013 06:54:51 -0700, Prafulla Wadaskar
prafu...@marvell.com wrote:
Hi Albert,
Please pull
The following changes since commit c97b6df1ae92679d67f94c1cfef51323782a506d:
Albert ARIBAUD (1):
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
are
On Fri, Apr 12, 2013 at 05:06:35PM +0200, Ruud Commandeur wrote:
Hi Mats,
Thanks a lot, this seems to solve my problem. Nothing more actualy than
adding a if(size) around the code block of set_sector( ). I could have
thought of that myself, but was not sure if anything else should be done
CONFIG_SPL_MAX_SIZE and CONFIG_SPL_BSS_MAX_SIZE did not have constant
semantics across all of U-boot. This patch series aims at fixing this by
splitting the maximum size into separate image (code + data + rodata +
linker list) size on the one hand, and BSS size on the other hand.
Changes in v4:
-
Remove SPL-related ASSERT() in arch/arm/cpu/u-boot.lds
as this file is never used for SPL builds.
Rewrite the ASSERT() in arch/arm/cpu/u-boot-spl.lds
to separately test image (text,data,rodata...) size,
BSS size, and full footprint each against its own max,
and make Tegra boards check full
This target wants to check full SPL size, BSS included.
Remove CONFIG_SPL_MAX_SIZE definition and instead define
CONFIG_SPL_MAX_FOOTPRINT.
Signed-off-by: Albert ARIBAUD albert.u.b...@aribaud.net
---
Changes in v4:
- converted to CONFIG_SPL_MAX_FOOTPRINT
- limited SPL size to exactly 6 2K pages
This target wants to check full SPL size, BSS included.
Remove CONFIG_SPL_MAX_SIZE definition and instead define
CONFIG_SPL_MAX_FOOTPRINT.
Signed-off-by: Albert ARIBAUD albert.u.b...@aribaud.net
---
Changes in v4:
- converted to CONFIG_SPL_MAX_FOOTPRINT
Changes in v3: None
Changes in v2:
- fixed
This target wants to check full SPL size, BSS included.
Remove CONFIG_SPL_MAX_SIZE definition and instead define
CONFIG_SPL_MAX_FOOTPRINT.
Signed-off-by: Albert ARIBAUD albert.u.b...@aribaud.net
---
Changes in v4:
- converted to CONFIG_SPL_MAX_FOOTPRINT
Changes in v3: None
Changes in v2:
- fixed
Hi Tom,
Sorry if I mislead you, but my code change is quite the same as was
posted by Damien. I would be more than happy to send what you ask for,
but I don't think this will add much. And I will have to study a bit
then how to do this
Regards,
Ruud
-Oorspronkelijk bericht-
Van:
On Fri, Apr 12, 2013 at 05:14:30PM +0200, Albert ARIBAUD wrote:
+ CONFIG_SPL_MAX_FOOTPRINT
+ Maximum size in memory allocated to the SPL, BSS included.
+ When defined, the linker checks that the actual memory
+ used by SPL from _start to
On Fri, Apr 12, 2013 at 05:23:35PM +0200, Ruud Commandeur wrote:
Hi Tom,
Sorry if I mislead you, but my code change is quite the same as was
posted by Damien. I would be more than happy to send what you ask for,
but I don't think this will add much. And I will have to study a bit
then how
On Fri, Apr 12, 2013 at 7:10 AM, TENART Antoine aten...@adeneo-embedded.com
wrote:
Signed-off-by: Antoine Tenart aten...@adeneo-embedded.com
---
arch/arm/include/asm/arch-am33xx/clock.h |4 +
arch/arm/include/asm/arch-am33xx/clocks_ti816x.h | 136
On 04/11/2013 11:12:24 PM, Prabhakar Kushwaha wrote:
On 04/12/2013 01:13 AM, Scott Wood wrote:
On 04/11/2013 02:25:22 AM, Prabhakar Kushwaha wrote:
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 437ee6e..a6ef276 100644
--- a/include/configs/P1010RDB.h
+++
[snip]
these seem more SOC specific than board specific. Would likely be
replicated per board, I'd suggest to move out of board specific file.
[snip]
this function is generic to the SOC, move out of board specific file and
call with appropriate values or defines
-plus the other ones-
Well
On Fri, Apr 12, 2013 at 11:56:57AM +0100, Mark Jackson wrote:
We have a dual Ethernet board (based on the BeagelBone) but with both
Ethernet ports connected.
I'm wanting to use eth1 (rather than eth0), so in my board.c file, I changed:-
static struct cpsw_slave_data cpsw_slaves[] = {
+/*
+ * Values supported 400,531,675,796
+ *
+ * On TI8168 rev C, use 400 or 531 MHz !
Why? Is it specific to the EVM or is it general for all rev. C parts.
A pointer to an errata would be good
I don't know if there is an errata, but I couldn't get U-Boot working
with
Hi Tom,
On Fri, 12 Apr 2013 11:30:32 -0400, Tom Rini tr...@ti.com wrote:
On Fri, Apr 12, 2013 at 05:14:30PM +0200, Albert ARIBAUD wrote:
+ CONFIG_SPL_MAX_FOOTPRINT
+ Maximum size in memory allocated to the SPL, BSS included.
+ When defined, the linker
On 04/11/2013 02:19:37 PM, Marek Vasut wrote:
Dear Mike Dunn,
This patch adds a driver for the diskonchip G4 nand flash device.
It is
based on the driver from the linux kernel.
This also includes a separate SPL driver. A separate SPL driver is
used
because the device operates in a
Hi Albert,
On Thu, 11 Apr 2013 17:43:21 +0200, Albert ARIBAUD
albert.u.b...@aribaud.net wrote:
Commit 3ebd1cbc introduced compiler-generated __bss_start
and __bss_end__ and commit c23561e7 rewrote all __bss_end__
as __bss_end. Their merge caused silent and harmless but
potentially
On 12.04.2013 16:37, Tom Rini wrote:
Hereby I ask to revert the mtd: cfi_flash: Fix CFI flash driver for
8-bit bus support patch,. i. e. Commit 239cb9d.
It breaks the CFI driver on a board here. The board has two banks of
AMD NOR flash, mapped at F800. and FC00., resp. With current
Hi Tom!
Here the pull request with the revert of the patch that causes
problems with some non-8bit flash chips. I also reverted another
small (compilation warning) patch. Otherwise the 8-bit support
patch could not be reverted (as you noticed). So please pull
for this release:
The following
Dear Mike Dunn,
On 04/11/2013 12:20 PM, Marek Vasut wrote:
Dear Mike Dunn,
A quick overview of u-boot implementation on the treo 680...
The treo 680 has a Diskonchip G4 nand flash chip. This device has a 2k
region that maps to the system bus at the reset vector in a NOR-like
Dear Scott Wood,
[...]
[snip]
+#ifdef DEBUG_DOCG4
+#define dbg(format, arg...) printf(DEBUG: format, ##arg)
+#else
+#define dbg(format, arg...) do {} while (0)
+#endif
There already is a debugging facility in include/common.h too. And it does the
same thing too. MTDDEBUG might
Dear Mike Dunn,
On 04/11/2013 12:19 PM, Marek Vasut wrote:
Dear Mike Dunn,
This patch adds the bitrev library from the linux kernel. This is a
simple algorithm that uses an 8 bit look-up table to reverse the bits
in data types of 8, 16, or 32 bit widths. The docg4 nand flash driver
On 04/12/2013 12:27:09 PM, Marek Vasut wrote:
Dear Scott Wood,
[...]
[snip]
+#ifdef DEBUG_DOCG4
+#define dbg(format, arg...) printf(DEBUG: format, ##arg)
+#else
+#define dbg(format, arg...) do {} while (0)
+#endif
There already is a debugging facility in include/common.h too. And
On Fri, Apr 12, 2013 at 7:10 AM, TENART Antoine aten...@adeneo-embedded.com
wrote:
Signed-off-by: Antoine Tenart aten...@adeneo-embedded.com
---
MAINTAINERS|4 +
arch/arm/include/asm/arch-am33xx/spl.h |9 +
board/ti/ti816x/Makefile | 48
On Fri, Apr 12, 2013 at 07:13:28PM +0200, Stefan Roese wrote:
Hi Tom!
Here the pull request with the revert of the patch that causes
problems with some non-8bit flash chips. I also reverted another
small (compilation warning) patch. Otherwise the 8-bit support
patch could not be reverted
On Wed, Apr 10, 2013 at 07:05:02PM +0200, Marek Vasut wrote:
The following changes since commit 645b271a6039e79b368f027a5624dc0820441733:
patman: Add Series-process-log tag to sort/uniq change logs (2013-04-08
15:21:22 -0700)
are available in the git repository at:
The previous timings were done on the internal-only A1 board which has
different DDR part than all later revs. The timings need a slight
adjustment to be correct in all cases with later revs.
Signed-off-by: Tom Rini tr...@ti.com
---
arch/arm/include/asm/arch-am33xx/ddr_defs.h | 14
This adds the definitions required to support the LCD device on the Palm Treo
680.
Signed-off-by: Mike Dunn miked...@newsguy.com
---
Changelog:
v3: no change
v2: no change
drivers/video/pxa_lcd.c | 32
1 files changed, 32 insertions(+), 0 deletions(-)
diff
This patchset adds support for the Palm Treo 680 smartphone. I had to make some
minor tweaks to u-boot to get things working. Most of these changes are small,
and most only touch the pxa arch.
Thanks for looking.
Changelog:
v3:
- changed commit message for patch that adds bitrev library to
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