Re: [U-Boot] [PATCH 07/20] dm: rtc: Rename to_tm() to rtc_to_tm() and add error code
Hello Simon,
Am 20.04.2015 20:37, schrieb Simon Glass:
Rename this function so that it is clear that it is provided by the RTC.
Also return an error when it cannot function as expected. This is unlikely
to occur since it works for dates since 1752 and many RTCs do not support
such old dates. Still it is better to be accurate.
Signed-off-by: Simon Glass s...@chromium.org
---
common/image.c | 2 +-
drivers/rtc/at91sam9_rtt.c | 2 +-
drivers/rtc/bfin_rtc.c | 2 +-
drivers/rtc/date.c | 8 ++--
drivers/rtc/ds1374.c | 2 +-
drivers/rtc/ftrtc010.c | 2 +-
drivers/rtc/imxdi.c| 2 +-
drivers/rtc/mc13xxx-rtc.c | 2 +-
drivers/rtc/mcfrtc.c | 2 +-
drivers/rtc/mpc8xx.c | 2 +-
drivers/rtc/mx27rtc.c | 2 +-
drivers/rtc/mxsrtc.c | 2 +-
drivers/rtc/pl031.c| 2 +-
include/rtc.h | 15 ++-
net/sntp.c | 2 +-
post/drivers/rtc.c | 6 +++---
16 files changed, 36 insertions(+), 19 deletions(-)
Thanks!
Acked-by: Heiko Schocher h...@denx.de
bye,
Heiko
diff --git a/common/image.c b/common/image.c
index abc0d89..fdec496 100644
--- a/common/image.c
+++ b/common/image.c
@@ -533,7 +533,7 @@ void genimg_print_time(time_t timestamp)
#ifndef USE_HOSTCC
struct rtc_time tm;
- to_tm(timestamp, tm);
+ rtc_to_tm(timestamp, tm);
printf(%4d-%02d-%02d %2d:%02d:%02d UTC\n,
tm.tm_year, tm.tm_mon, tm.tm_mday,
tm.tm_hour, tm.tm_min, tm.tm_sec);
diff --git a/drivers/rtc/at91sam9_rtt.c b/drivers/rtc/at91sam9_rtt.c
index 714dd2a..d3cdee0 100644
--- a/drivers/rtc/at91sam9_rtt.c
+++ b/drivers/rtc/at91sam9_rtt.c
@@ -44,7 +44,7 @@ int rtc_get (struct rtc_time *tmp)
} while (tim!=tim2);
off = readl(gpbr-reg[AT91_GPBR_INDEX_TIMEOFF]);
/* off==0 means time is invalid, but we ignore that */
- to_tm (tim+off, tmp);
+ rtc_to_tm(tim+off, tmp);
return 0;
}
diff --git a/drivers/rtc/bfin_rtc.c b/drivers/rtc/bfin_rtc.c
index 4cf2d83..6cb1eba 100644
--- a/drivers/rtc/bfin_rtc.c
+++ b/drivers/rtc/bfin_rtc.c
@@ -114,7 +114,7 @@ int rtc_get(struct rtc_time *tmp)
/* Calculate the total number of seconds since epoch */
time_in_sec = (tm_sec) + MIN_TO_SECS(tm_min) + HRS_TO_SECS(tm_hr) +
DAYS_TO_SECS(tm_day);
- to_tm(time_in_sec, tmp);
+ rtc_to_tm(time_in_sec, tmp);
return 0;
}
diff --git a/drivers/rtc/date.c b/drivers/rtc/date.c
index 2000565..79beb94 100644
--- a/drivers/rtc/date.c
+++ b/drivers/rtc/date.c
@@ -71,7 +71,7 @@ int rtc_calc_weekday(struct rtc_time *tm)
return 0;
}
-void to_tm(int tim, struct rtc_time * tm)
+int rtc_to_tm(int tim, struct rtc_time *tm)
{
register inti;
register long hms, day;
@@ -103,10 +103,14 @@ void to_tm(int tim, struct rtc_time * tm)
/* Days are what is left over (+1) from all that. */
tm-tm_mday = day + 1;
+ /* Zero unused fields */
+ tm-tm_yday = 0;
+ tm-tm_isdst = 0;
+
/*
* Determine the day of week
*/
- rtc_calc_weekday(tm);
+ return rtc_calc_weekday(tm);
}
/* Converts Gregorian date to seconds since 1970-01-01 00:00:00.
diff --git a/drivers/rtc/ds1374.c b/drivers/rtc/ds1374.c
index 427b1eb..04793b5 100644
--- a/drivers/rtc/ds1374.c
+++ b/drivers/rtc/ds1374.c
@@ -118,7 +118,7 @@ int rtc_get (struct rtc_time *tm){
DEBUGR (Get RTC s since 1.1.1970: %ld\n, time1);
- to_tm(time1, tm); /* To Gregorian Date */
+ rtc_to_tm(time1, tm); /* To Gregorian Date */
if (rtc_read(RTC_SR_ADDR) RTC_SR_BIT_OSF) {
printf (### Warning: RTC oscillator has stopped\n);
diff --git a/drivers/rtc/ftrtc010.c b/drivers/rtc/ftrtc010.c
index 713dad2..3c5d955 100644
--- a/drivers/rtc/ftrtc010.c
+++ b/drivers/rtc/ftrtc010.c
@@ -86,7 +86,7 @@ int rtc_get(struct rtc_time *tmp)
now = ftrtc010_time() + readl(rtc-record);
#endif
- to_tm(now, tmp);
+ rtc_to_tm(now, tmp);
return 0;
}
diff --git a/drivers/rtc/imxdi.c b/drivers/rtc/imxdi.c
index 0d7d736..e89034d 100644
--- a/drivers/rtc/imxdi.c
+++ b/drivers/rtc/imxdi.c
@@ -192,7 +192,7 @@ int rtc_get(struct rtc_time *tmp)
}
now = __raw_readl(data.regs-dtcmr);
- to_tm(now, tmp);
+ rtc_to_tm(now, tmp);
err:
return rc;
diff --git a/drivers/rtc/mc13xxx-rtc.c b/drivers/rtc/mc13xxx-rtc.c
index 528247a..30c4e66 100644
--- a/drivers/rtc/mc13xxx-rtc.c
+++ b/drivers/rtc/mc13xxx-rtc.c
@@ -36,7 +36,7 @@ int rtc_get(struct rtc_time *rtc)
tim = day1 * 86400 + time;
- to_tm(tim, rtc);
+ rtc_to_tm(tim, rtc);
rtc-tm_yday = 0;
rtc-tm_isdst = 0;
diff --git a/drivers/rtc/mcfrtc.c b/drivers/rtc/mcfrtc.c
index 8961ca4..e02e297 100644
--- a/drivers/rtc/mcfrtc.c
+++ b/drivers/rtc/mcfrtc.c
@@ -38,7 +38,7 @@ int rtc_get(struct rtc_time *tmp)
Re: [U-Boot] [PATCH v2 2/3] ARM: zynq: use separate configuration for ZC702 and ZC706
On Fri, 2015-04-17 at 10:38AM +0900, Masahiro Yamada wrote:
Hi Sören,
2015-04-15 1:03 GMT+09:00 Sören Brinkmann soren.brinkm...@xilinx.com:
On Tue, 2015-04-14 at 04:50PM +0900, Masahiro Yamada wrote:
Separate CONFIG_TARGET_ZYNQ_{ZC702,ZC706} which is necessary
for the next commit. Adjust doc/README.zynq too.
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
---
Changes in v2: None
arch/arm/cpu/armv7/zynq/Kconfig| 9 ++---
configs/{zynq_zc70x_defconfig = zynq_zc702_defconfig} | 2 +-
configs/zynq_zc706_defconfig | 11 +++
doc/README.zynq| 15
---
4 files changed, 22 insertions(+), 15 deletions(-)
rename configs/{zynq_zc70x_defconfig = zynq_zc702_defconfig} (88%)
create mode 100644 configs/zynq_zc706_defconfig
diff --git a/arch/arm/cpu/armv7/zynq/Kconfig
b/arch/arm/cpu/armv7/zynq/Kconfig
index 3a52535..ab4768a 100644
--- a/arch/arm/cpu/armv7/zynq/Kconfig
+++ b/arch/arm/cpu/armv7/zynq/Kconfig
@@ -9,8 +9,11 @@ config TARGET_ZYNQ_ZED
config TARGET_ZYNQ_MICROZED
bool Zynq MicroZed
-config TARGET_ZYNQ_ZC70X
- bool Zynq ZC702/ZC706 Board
+config TARGET_ZYNQ_ZC702
+ bool Zynq ZC702 Board
+
+config TARGET_ZYNQ_ZC706
+ bool Zynq ZC706 Board
Is there a good way to make this more friendly towards a user who is
familiar with the current flow? By simply removing it, we'll get plenty
of support requests asking what happened. Also, it would void all the
documentation we have in wikis etc. A more soft migration path would be
better.
Currently, the difference between ZC702 and ZC706 is just their device trees.
So, we can use $(DEVICE_TREE) for distinguishing one from the other. Like
this.
8---
DEVICE_TREE ?= $(CONFIG_DEFAULT_DEVICE_TREE:%=%)
hw-platform-$(CONFIG_TARGET_ZYNQ_ZED) := zed_hw_platform
hw-platform-$(CONFIG_TARGET_ZYNQ_MICROZED) := MicroZed_hw_platform
hw-platform-$(CONFIG_TARGET_ZYNQ_ZC70X) := $(if $(filter
zynq-zc702 $(DEVICE_TREE)), ZC702_hw_platform, ZC706_hw_platform)
8---
Another option is to reject this series and stick to the current work-flow.
It is up to you and Michal, of course.
The path to ps7_init_gpl.[ch] will change, anyway.
If it is troublesome, I do not persist on this series.
I personally think the patches are going into the right direction. But
I'd highly prefer having a clean migration path for all people that
build a zynq_zc70x config. Something similar we did with the
ps7_init_gpl files perhaps? Just something that gives us time to
migrate users and documentation to the new flow without breaking them
all.
Sören
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Question regarding MLO size
Hi all, I am using a Gumstix Overo (omap3), running the u-boot v2015.04 and have the following issue: I have made a few modifications to the misc_init_r() routine in the board/overo/overo.c file; the resulting MLO file is 61,220 bytes and the console hangs at reading u-boot.img during the boot process. In the absence of those changes to the misc_init_r() the MLO size is 61,212 bytes and the u-boot is loaded without any issues. misc_init_r() is not even called from any SPL related code, so I am not sure why changes to this routine is causing MLO size to change. I verified this by doing the following: I put a few debug statements in misc_init_r() and rebuilt both u-boot.img and MLO. First, I replaced only the new MLO in my target and the debug statement did not appear while it appeared when I replaced the u-boot.img in the target. If anybody has an idea what is going on, it would be very helpful. Thanks! FYI: The change I am trying to make in misc_init_r() : @@ -295,6 +295,7 @@ int misc_init_r(void) expansion_config.fab_revision); MUX_GUMSTIX(); setenv(defaultdisplay, lcd35); + setenv(expansionname, palo35); break; case GUMSTIX_PALO43: printf(Recognized Palo43 expansion board (rev %d %s)\n, -Arun ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] x86: galileo: Define mac addresses for the on-chip ethernet ports
Hi Bin Meng, On Tue, Apr 21, 2015 at 8:54 AM, Simon Glass s...@chromium.org wrote: Hi Bin, On 20 April 2015 at 23:05, Bin Meng bmeng...@gmail.com wrote: Not like other x86 chipset, there is no EEPROM for the ethernet controller on the Intel Quark SoC to retreive the mac address after power up. With pre-defined mac addresses, U-Boot boots up and will not show Error: dwmac.90006000 address not set message. Signed-off-by: Bin Meng bmeng...@gmail.com --- include/configs/galileo.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/galileo.h b/include/configs/galileo.h index d4d0eb3..961d087 100644 --- a/include/configs/galileo.h +++ b/include/configs/galileo.h @@ -62,6 +62,8 @@ #define CONFIG_DESIGNWARE_ETH #define CONFIG_DW_ALTDESCRIPTOR #define CONFIG_PHYLIB +#define CONFIG_ETHADDR 00:02:b3:00:00:00 +#define CONFIG_ETH1ADDR00:02:b3:00:00:01 I recall this coming up before with another board - we are not supposed to set a default MAC address since it may create inexplicable conflicts on the network if an org two boards on the same network one day. Can you just set an environment variable? Simon is correct here. You should simply set it in your environment on your board. Another option that we tend to frown on, but is allowed, is to call net_random_ethaddr() from your board init. -Joe ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [U-Boot PATCH 4/8] spi: Zap oc_tiny_spi driver
Zap oc_tiny_spi driver since the boards used this driver
is no longer been active.
Signed-off-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com
Cc: Thomas Chou tho...@wytron.com.tw
---
drivers/spi/Makefile | 1 -
drivers/spi/oc_tiny_spi.c | 245 --
2 files changed, 246 deletions(-)
delete mode 100644 drivers/spi/oc_tiny_spi.c
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 1e3611d..507c315 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -35,7 +35,6 @@ obj-$(CONFIG_MPC52XX_SPI) += mpc52xx_spi.o
obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
obj-$(CONFIG_MXC_SPI) += mxc_spi.o
obj-$(CONFIG_MXS_SPI) += mxs_spi.o
-obj-$(CONFIG_OC_TINY_SPI) += oc_tiny_spi.o
obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o
obj-$(CONFIG_SANDBOX_SPI) += sandbox_spi.o
obj-$(CONFIG_SH_SPI) += sh_spi.o
diff --git a/drivers/spi/oc_tiny_spi.c b/drivers/spi/oc_tiny_spi.c
deleted file mode 100644
index 4de5d00..000
--- a/drivers/spi/oc_tiny_spi.c
+++ /dev/null
@@ -1,245 +0,0 @@
-/*
- * Opencore tiny_spi driver
- *
- * http://opencores.org/project,tiny_spi
- *
- * based on bfin_spi.c
- * Copyright (c) 2005-2008 Analog Devices Inc.
- * Copyright (C) 2010 Thomas Chou tho...@wytron.com.tw
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include common.h
-#include asm/io.h
-#include malloc.h
-#include spi.h
-#include asm/gpio.h
-
-#define TINY_SPI_STATUS_TXE 0x1
-#define TINY_SPI_STATUS_TXR 0x2
-
-struct tiny_spi_regs {
- unsigned rxdata;/* Rx data reg */
- unsigned txdata;/* Tx data reg */
- unsigned status;/* Status reg */
- unsigned control; /* Control reg */
- unsigned baud; /* Baud reg */
-};
-
-struct tiny_spi_host {
- uint base;
- uint freq;
- uint baudwidth;
-};
-static const struct tiny_spi_host tiny_spi_host_list[] =
- CONFIG_SYS_TINY_SPI_LIST;
-
-struct tiny_spi_slave {
- struct spi_slave slave;
- const struct tiny_spi_host *host;
- uint mode;
- uint baud;
- uint flg;
-};
-#define to_tiny_spi_slave(s) container_of(s, struct tiny_spi_slave, slave)
-
-int spi_cs_is_valid(unsigned int bus, unsigned int cs)
-{
- return bus ARRAY_SIZE(tiny_spi_host_list) gpio_is_valid(cs);
-}
-
-void spi_cs_activate(struct spi_slave *slave)
-{
- struct tiny_spi_slave *tiny_spi = to_tiny_spi_slave(slave);
- unsigned int cs = slave-cs;
-
- gpio_set_value(cs, tiny_spi-flg);
- debug(%s: SPI_CS_GPIO:%x\n, __func__, gpio_get_value(cs));
-}
-
-void spi_cs_deactivate(struct spi_slave *slave)
-{
- struct tiny_spi_slave *tiny_spi = to_tiny_spi_slave(slave);
- unsigned int cs = slave-cs;
-
- gpio_set_value(cs, !tiny_spi-flg);
- debug(%s: SPI_CS_GPIO:%x\n, __func__, gpio_get_value(cs));
-}
-
-void spi_set_speed(struct spi_slave *slave, uint hz)
-{
- struct tiny_spi_slave *tiny_spi = to_tiny_spi_slave(slave);
- const struct tiny_spi_host *host = tiny_spi-host;
-
- tiny_spi-baud = min(DIV_ROUND_UP(host-freq, hz * 2),
-(1 host-baudwidth)) - 1;
- debug(%s: speed %u actual %u\n, __func__, hz,
- host-freq / ((tiny_spi-baud + 1) * 2));
-}
-
-void spi_init(void)
-{
-}
-
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
- unsigned int hz, unsigned int mode)
-{
- struct tiny_spi_slave *tiny_spi;
-
- if (!spi_cs_is_valid(bus, cs) || gpio_request(cs, tiny_spi))
- return NULL;
-
- tiny_spi = spi_alloc_slave(struct tiny_spi_slave, bus, cs);
- if (!tiny_spi)
- return NULL;
-
- tiny_spi-host = tiny_spi_host_list[bus];
- tiny_spi-mode = mode (SPI_CPOL | SPI_CPHA);
- tiny_spi-flg = mode SPI_CS_HIGH ? 1 : 0;
- spi_set_speed(tiny_spi-slave, hz);
-
- debug(%s: bus:%i cs:%i base:%lx\n, __func__,
- bus, cs, tiny_spi-host-base);
- return tiny_spi-slave;
-}
-
-void spi_free_slave(struct spi_slave *slave)
-{
- struct tiny_spi_slave *tiny_spi = to_tiny_spi_slave(slave);
-
- gpio_free(slave-cs);
- free(tiny_spi);
-}
-
-int spi_claim_bus(struct spi_slave *slave)
-{
- struct tiny_spi_slave *tiny_spi = to_tiny_spi_slave(slave);
- struct tiny_spi_regs *regs = (void *)tiny_spi-host-base;
-
- debug(%s: bus:%i cs:%i\n, __func__, slave-bus, slave-cs);
- gpio_direction_output(slave-cs, !tiny_spi-flg);
- writel(tiny_spi-mode, regs-control);
- writel(tiny_spi-baud, regs-baud);
- return 0;
-}
-
-void spi_release_bus(struct spi_slave *slave)
-{
- debug(%s: bus:%i cs:%i\n, __func__, slave-bus, slave-cs);
-}
-
-#ifndef CONFIG_TINY_SPI_IDLE_VAL
-# define CONFIG_TINY_SPI_IDLE_VAL 0xff
-#endif
-
-int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
-void *din, unsigned long flags)
-{
- struct tiny_spi_slave *tiny_spi =
[U-Boot] [U-Boot PATCH 6/8] spi: xilinx_spi: Driver clean-up
- Zap unneeded macros
- Re-arrange the code
- Removed __attribute__((weak))
- Replace __func__ macro with func names to save macro transition.
- Re-arranged comment lines.
- Arrange driver code in more readable format[1]
[1] http://lists.denx.de/pipermail/u-boot/2013-August/160473.html
Signed-off-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com
Cc: Michal Simek michal.si...@xilinx.com
---
drivers/spi/xilinx_spi.c | 164 ---
1 file changed, 57 insertions(+), 107 deletions(-)
diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c
index 8073edc..650e494 100644
--- a/drivers/spi/xilinx_spi.c
+++ b/drivers/spi/xilinx_spi.c
@@ -1,79 +1,31 @@
/*
* Xilinx SPI driver
*
- * supports 8 bit SPI transfers only, with or w/o FIFO
+ * Supports 8 bit SPI transfers only, with or w/o FIFO
*
- * based on bfin_spi.c, by way of altera_spi.c
- * Copyright (c) 2005-2008 Analog Devices Inc.
- * Copyright (c) 2010 Thomas Chou tho...@wytron.com.tw
- * Copyright (c) 2010 Graeme Smecher graeme.smec...@mail.mcgill.ca
+ * Based on bfin_spi.c, by way of altera_spi.c
* Copyright (c) 2012 Stephan Linz l...@li-pro.net
+ * Copyright (c) 2010 Graeme Smecher graeme.smec...@mail.mcgill.ca
+ * Copyright (c) 2010 Thomas Chou tho...@wytron.com.tw
+ * Copyright (c) 2005-2008 Analog Devices Inc.
*
* SPDX-License-Identifier:GPL-2.0+
- *
- * [0]: http://www.xilinx.com/support/documentation
- *
- * [S]:[0]/ip_documentation/xps_spi.pdf
- * [0]/ip_documentation/axi_spi_ds742.pdf
*/
+
#include config.h
#include common.h
#include malloc.h
#include spi.h
/*
- * Xilinx SPI Register Definition
+ * [0]: http://www.xilinx.com/support/documentation
*
+ * Xilinx SPI Register Definitions
* [1]:[0]/ip_documentation/xps_spi.pdf
* page 8, Register Descriptions
* [2]:[0]/ip_documentation/axi_spi_ds742.pdf
* page 7, Register Overview Table
*/
-struct xilinx_spi_reg {
- u32 __space0__[7];
- u32 dgier; /* Device Global Interrupt Enable Register (DGIER) */
- u32 ipisr; /* IP Interrupt Status Register (IPISR) */
- u32 __space1__;
- u32 ipier; /* IP Interrupt Enable Register (IPIER) */
- u32 __space2__[5];
- u32 srr;/* Softare Reset Register (SRR) */
- u32 __space3__[7];
- u32 spicr; /* SPI Control Register (SPICR) */
- u32 spisr; /* SPI Status Register (SPISR) */
- u32 spidtr; /* SPI Data Transmit Register (SPIDTR) */
- u32 spidrr; /* SPI Data Receive Register (SPIDRR) */
- u32 spissr; /* SPI Slave Select Register (SPISSR) */
- u32 spitfor;/* SPI Transmit FIFO Occupancy Register (SPITFOR) */
- u32 spirfor;/* SPI Receive FIFO Occupancy Register (SPIRFOR) */
-};
-
-/* Device Global Interrupt Enable Register (dgier), [1] p15, [2] p15 */
-#define DGIER_GIE (1 31)
-
-/* IP Interrupt Status Register (ipisr), [1] p15, [2] p15 */
-#define IPISR_DRR_NOT_EMPTY(1 8)
-#define IPISR_SLAVE_SELECT (1 7)
-#define IPISR_TXF_HALF_EMPTY (1 6)
-#define IPISR_DRR_OVERRUN (1 5)
-#define IPISR_DRR_FULL (1 4)
-#define IPISR_DTR_UNDERRUN (1 3)
-#define IPISR_DTR_EMPTY(1 2)
-#define IPISR_SLAVE_MODF (1 1)
-#define IPISR_MODF (1 0)
-
-/* IP Interrupt Enable Register (ipier), [1] p17, [2] p18 */
-#define IPIER_DRR_NOT_EMPTY(1 8)
-#define IPIER_SLAVE_SELECT (1 7)
-#define IPIER_TXF_HALF_EMPTY (1 6)
-#define IPIER_DRR_OVERRUN (1 5)
-#define IPIER_DRR_FULL (1 4)
-#define IPIER_DTR_UNDERRUN (1 3)
-#define IPIER_DTR_EMPTY(1 2)
-#define IPIER_SLAVE_MODF (1 1)
-#define IPIER_MODF (1 0)
-
-/* Softare Reset Register (srr), [1] p9, [2] p8 */
-#define SRR_RESET_CODE 0x000A
/* SPI Control Register (spicr), [1] p9, [2] p8 */
#define SPICR_LSB_FIRST(1 9)
@@ -110,17 +62,42 @@ struct xilinx_spi_reg {
#define SPISSR_ACT(cs) ~SPISSR_MASK(cs)
#define SPISSR_OFF ~0UL
-/* SPI Transmit FIFO Occupancy Register (spitfor), [1] p13, [2] p14 */
-#define SPITFOR_OCYVAL_POS 0
-#define SPITFOR_OCYVAL_MASK(0xf SPITFOR_OCYVAL_POS)
-
-/* SPI Receive FIFO Occupancy Register (spirfor), [1] p14, [2] p14 */
-#define SPIRFOR_OCYVAL_POS 0
-#define SPIRFOR_OCYVAL_MASK(0xf SPIRFOR_OCYVAL_POS)
-
/* SPI Software Reset Register (ssr) */
#define SPISSR_RESET_VALUE 0x0a
+#define XILSPI_MAX_XFER_BITS 8
+#define XILSPI_SPICR_DFLT_ON (SPICR_MANUAL_SS | SPICR_MASTER_MODE | \
+ SPICR_SPE)
+#define XILSPI_SPICR_DFLT_OFF (SPICR_MASTER_INHIBIT | SPICR_MANUAL_SS)
+
+#ifndef CONFIG_XILINX_SPI_IDLE_VAL
+#define CONFIG_XILINX_SPI_IDLE_VAL 0xff
+#endif
+
+#ifndef CONFIG_SYS_XILINX_SPI_LIST
+#define CONFIG_SYS_XILINX_SPI_LIST { CONFIG_SYS_SPI_BASE }
+#endif
+
+/* xilinx spi register set */
+struct
[U-Boot] [U-Boot PATCH 3/8] spi: Zap ftssp010_spi driver
Zap ftssp010_spi driver since the boards used this driver
is no longer been active.
Signed-off-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com
Cc: Kuo-Jung Su dant...@faraday-tech.com
Cc: Axel Lin axel@ingics.com
---
drivers/spi/Makefile | 1 -
drivers/spi/ftssp010_spi.c | 498 -
2 files changed, 499 deletions(-)
delete mode 100644 drivers/spi/ftssp010_spi.c
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 93065b7..1e3611d 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -28,7 +28,6 @@ obj-$(CONFIG_CF_QSPI) += cf_qspi.o
obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o
obj-$(CONFIG_DESIGNWARE_SPI) += designware_spi.o
obj-$(CONFIG_EXYNOS_SPI) += exynos_spi.o
-obj-$(CONFIG_FTSSP010_SPI) += ftssp010_spi.o
obj-$(CONFIG_ICH_SPI) += ich.o
obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
obj-$(CONFIG_LPC32XX_SSP) += lpc32xx_ssp.o
diff --git a/drivers/spi/ftssp010_spi.c b/drivers/spi/ftssp010_spi.c
deleted file mode 100644
index c7d6480..000
--- a/drivers/spi/ftssp010_spi.c
+++ /dev/null
@@ -1,498 +0,0 @@
-/*
- * (C) Copyright 2013
- * Faraday Technology Corporation. http://www.faraday-tech.com/tw/
- * Kuo-Jung Su dant...@gmail.com
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include common.h
-#include linux/compat.h
-#include asm/io.h
-#include malloc.h
-#include spi.h
-
-#ifndef CONFIG_FTSSP010_BASE_LIST
-#define CONFIG_FTSSP010_BASE_LIST { CONFIG_FTSSP010_BASE }
-#endif
-
-#ifndef CONFIG_FTSSP010_GPIO_BASE
-#define CONFIG_FTSSP010_GPIO_BASE 0
-#endif
-
-#ifndef CONFIG_FTSSP010_GPIO_LIST
-#define CONFIG_FTSSP010_GPIO_LIST { CONFIG_FTSSP010_GPIO_BASE }
-#endif
-
-#ifndef CONFIG_FTSSP010_CLOCK
-#define CONFIG_FTSSP010_CLOCK clk_get_rate(SSP);
-#endif
-
-#ifndef CONFIG_FTSSP010_TIMEOUT
-#define CONFIG_FTSSP010_TIMEOUT 100
-#endif
-
-/* FTSSP010 chip registers */
-struct ftssp010_regs {
- uint32_t cr[3];/* control register */
- uint32_t sr; /* status register */
- uint32_t icr; /* interrupt control register */
- uint32_t isr; /* interrupt status register */
- uint32_t dr; /* data register */
- uint32_t rsvd[17];
- uint32_t revr; /* revision register */
- uint32_t fear; /* feature register */
-};
-
-/* Control Register 0 */
-#define CR0_FFMT_MASK (7 12)
-#define CR0_FFMT_SSP(0 12)
-#define CR0_FFMT_SPI(1 12)
-#define CR0_FFMT_MICROWIRE (2 12)
-#define CR0_FFMT_I2S(3 12)
-#define CR0_FFMT_AC97 (4 12)
-#define CR0_FLASH (1 11)
-#define CR0_FSDIST(x) (((x) 0x03) 8)
-#define CR0_LOOP(1 7) /* loopback mode */
-#define CR0_LSB (1 6) /* LSB */
-#define CR0_FSPO(1 5) /* fs atcive low (I2S only) */
-#define CR0_FSJUSTIFY (1 4)
-#define CR0_OPM_SLAVE (0 2)
-#define CR0_OPM_MASTER (3 2)
-#define CR0_OPM_I2S_MSST(3 2) /* master stereo mode */
-#define CR0_OPM_I2S_MSMO(2 2) /* master mono mode */
-#define CR0_OPM_I2S_SLST(1 2) /* slave stereo mode */
-#define CR0_OPM_I2S_SLMO(0 2) /* slave mono mode */
-#define CR0_SCLKPO (1 1) /* clock polarity */
-#define CR0_SCLKPH (1 0) /* clock phase */
-
-/* Control Register 1 */
-#define CR1_PDL(x) (((x) 0xff) 24) /* padding length */
-#define CR1_SDL(x) x) - 1) 0x1f) 16) /* data length */
-#define CR1_DIV(x) (((x) - 1) 0x) /* clock divider */
-
-/* Control Register 2 */
-#define CR2_CS(x)(((x) 3) 10) /* CS/FS select */
-#define CR2_FS (1 9) /* CS/FS signal level */
-#define CR2_TXEN (1 8) /* tx enable */
-#define CR2_RXEN (1 7) /* rx enable */
-#define CR2_RESET(1 6) /* chip reset */
-#define CR2_TXFC (1 3) /* tx fifo Clear */
-#define CR2_RXFC (1 2) /* rx fifo Clear */
-#define CR2_TXDOE(1 1) /* tx data output enable */
-#define CR2_EN (1 0) /* chip enable */
-
-/* Status Register */
-#define SR_RFF (1 0) /* rx fifo full */
-#define SR_TFNF (1 1) /* tx fifo not full */
-#define SR_BUSY (1 2) /* chip busy */
-#define SR_RFVE(reg) (((reg) 4) 0x1f) /* rx fifo valid entries */
-#define SR_TFVE(reg) (((reg) 12) 0x1f) /* tx fifo valid entries */
-
-/* Feature Register */
-#define FEAR_BITS(reg) reg) 0) 0xff) + 1) /* data width */
-#define FEAR_RFSZ(reg) reg) 8) 0xff) + 1) /* rx fifo size */
-#define FEAR_TFSZ(reg) reg) 16) 0xff) + 1) /* tx fifo size */
-#define FEAR_AC97(1 24)
-#define FEAR_I2S (1 25)
-#define FEAR_SPI_MWR (1 26)
-#define FEAR_SSP (1 27)
-#define FEAR_SPDIF (1 28)
-
-/* FTGPIO010 chip registers */
-struct ftgpio010_regs {
- uint32_t out; /* 0x00: Data Output */
- uint32_t in; /* 0x04: Data Input */
- uint32_t dir; /* 0x08: Direction */
- uint32_t bypass; /* 0x0c: Bypass */
- uint32_t set; /* 0x10: Data Set */
- uint32_t clr;
[U-Boot] [U-Boot PATCH 2/8] spi: Zap andes_spi driver
Zap andes_spi driver since the boards used this driver
is no longer been active.
Signed-off-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com
Cc: Macpaul Lin macp...@andestech.com
---
drivers/spi/Makefile| 1 -
drivers/spi/andes_spi.c | 284
drivers/spi/andes_spi.h | 115
3 files changed, 400 deletions(-)
delete mode 100644 drivers/spi/andes_spi.c
delete mode 100644 drivers/spi/andes_spi.h
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index e288692..93065b7 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -17,7 +17,6 @@ endif
obj-$(CONFIG_EP93XX_SPI) += ep93xx_spi.o
obj-$(CONFIG_ALTERA_SPI) += altera_spi.o
-obj-$(CONFIG_ANDES_SPI) += andes_spi.o
obj-$(CONFIG_ARMADA100_SPI) += armada100_spi.o
obj-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o
obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o
diff --git a/drivers/spi/andes_spi.c b/drivers/spi/andes_spi.c
deleted file mode 100644
index 82aed75..000
--- a/drivers/spi/andes_spi.c
+++ /dev/null
@@ -1,284 +0,0 @@
-/*
- * Driver of Andes SPI Controller
- *
- * (C) Copyright 2011 Andes Technology
- * Macpaul Lin macp...@andestech.com
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include common.h
-#include malloc.h
-#include spi.h
-
-#include asm/io.h
-#include andes_spi.h
-
-void spi_init(void)
-{
- /* do nothing */
-}
-
-static void andes_spi_spit_en(struct andes_spi_slave *ds)
-{
- unsigned int dcr = readl(ds-regs-dcr);
-
- debug(%s: dcr: %x, write value: %x\n,
- __func__, dcr, (dcr | ANDES_SPI_DCR_SPIT));
-
- writel((dcr | ANDES_SPI_DCR_SPIT), ds-regs-dcr);
-}
-
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
- unsigned int max_hz, unsigned int mode)
-{
- struct andes_spi_slave *ds;
-
- if (!spi_cs_is_valid(bus, cs))
- return NULL;
-
- ds = spi_alloc_slave(struct andes_spi_slave, bus, cs);
- if (!ds)
- return NULL;
-
- ds-regs = (struct andes_spi_regs *)CONFIG_SYS_SPI_BASE;
-
- /*
-* The hardware of andes_spi will set its frequency according
-* to APB/AHB bus clock. Hence the hardware doesn't allow changing of
-* requency and so the user requested speed is always ignored.
-*/
- ds-freq = max_hz;
-
- return ds-slave;
-}
-
-void spi_free_slave(struct spi_slave *slave)
-{
- struct andes_spi_slave *ds = to_andes_spi(slave);
-
- free(ds);
-}
-
-int spi_claim_bus(struct spi_slave *slave)
-{
- struct andes_spi_slave *ds = to_andes_spi(slave);
- unsigned int apb;
- unsigned int baud;
-
- /* Enable the SPI hardware */
- writel(ANDES_SPI_CR_SPIRST, ds-regs-cr);
- udelay(1000);
-
- /* setup format */
- baud = ((CONFIG_SYS_CLK_FREQ / CONFIG_SYS_SPI_CLK / 2) - 1) 0xFF;
-
- /*
-* SPI_CLK = AHB bus clock / ((BAUD + 1)*2)
-* BAUD = AHB bus clock / SPI_CLK / 2) - 1
-*/
- apb = (readl(ds-regs-apb) 0xff00) | baud;
- writel(apb, ds-regs-apb);
-
- /* no interrupts */
- writel(0, ds-regs-ie);
-
- return 0;
-}
-
-void spi_release_bus(struct spi_slave *slave)
-{
- struct andes_spi_slave *ds = to_andes_spi(slave);
-
- /* Disable the SPI hardware */
- writel(ANDES_SPI_CR_SPIRST, ds-regs-cr);
-}
-
-static int andes_spi_read(struct spi_slave *slave, unsigned int len,
- u8 *rxp, unsigned long flags)
-{
- struct andes_spi_slave *ds = to_andes_spi(slave);
- unsigned int i, left;
- unsigned int data;
-
- debug(%s: slave: %x, len: %d, rxp: %x, flags: %d\n,
- __func__, slave, len, rxp, flags);
-
- debug(%s: data: , __func__);
- while (len 0) {
- left = min(len, 4);
- data = readl(ds-regs-data);
-
- debug( );
- for (i = 0; i left; i++) {
- debug(%02x , data 0xff);
- *rxp++ = data;
- data = 8;
- len--;
- }
- }
- debug(\n);
-
- return 0;
-}
-
-static int andes_spi_write(struct spi_slave *slave, unsigned int wlen,
- unsigned int rlen, const u8 *txp, unsigned long flags)
-{
- struct andes_spi_slave *ds = to_andes_spi(slave);
- unsigned int data;
- unsigned int i, left;
- unsigned int spit_enabled = 0;
-
- debug(%s: slave: %x, wlen: %d, rlen: %d, txp: %x, flags: %x\n,
- __func__, slave, wlen, rlen, txp, flags);
-
- /* The value of wlen and rlen wrote to register must minus 1 */
- if (rlen == 0) /* write only */
- writel(ANDES_SPI_DCR_MODE_WO | ANDES_SPI_DCR_WCNT(wlen-1) |
- ANDES_SPI_DCR_RCNT(0), ds-regs-dcr);
- else
[U-Boot] [PATCH v2 3/6] ARMv7M: add STM32F1 support
Add ARMv7M STM32F1 support including clocks, timer, gpio, and flash.
Signed-off-by: Matt Porter mpor...@konsulko.com
---
arch/arm/cpu/armv7m/Makefile | 1 +
arch/arm/cpu/armv7m/stm32f1/Makefile | 13 ++
arch/arm/cpu/armv7m/stm32f1/clock.c | 195 ++
arch/arm/cpu/armv7m/stm32f1/flash.c | 179 +++
arch/arm/cpu/armv7m/stm32f1/soc.c | 35 ++
arch/arm/cpu/armv7m/stm32f1/timer.c | 120 ++
arch/arm/include/asm/arch-stm32f1/gpio.h | 117 ++
arch/arm/include/asm/arch-stm32f1/stm32.h | 115 ++
include/flash.h | 1 +
9 files changed, 776 insertions(+)
create mode 100644 arch/arm/cpu/armv7m/stm32f1/Makefile
create mode 100644 arch/arm/cpu/armv7m/stm32f1/clock.c
create mode 100644 arch/arm/cpu/armv7m/stm32f1/flash.c
create mode 100644 arch/arm/cpu/armv7m/stm32f1/soc.c
create mode 100644 arch/arm/cpu/armv7m/stm32f1/timer.c
create mode 100644 arch/arm/include/asm/arch-stm32f1/gpio.h
create mode 100644 arch/arm/include/asm/arch-stm32f1/stm32.h
diff --git a/arch/arm/cpu/armv7m/Makefile b/arch/arm/cpu/armv7m/Makefile
index b662e03..93a1956 100644
--- a/arch/arm/cpu/armv7m/Makefile
+++ b/arch/arm/cpu/armv7m/Makefile
@@ -8,4 +8,5 @@
extra-y := start.o
obj-y += cpu.o
+obj-$(CONFIG_STM32F1) += stm32f1/
obj-$(CONFIG_STM32F4) += stm32f4/
diff --git a/arch/arm/cpu/armv7m/stm32f1/Makefile
b/arch/arm/cpu/armv7m/stm32f1/Makefile
new file mode 100644
index 000..7b43761
--- /dev/null
+++ b/arch/arm/cpu/armv7m/stm32f1/Makefile
@@ -0,0 +1,13 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# (C) Copyright 2015
+# Kamil Lulko, re...@wp.pl
+#
+# Copyright 2015 Konsulko Group, Matt Porter mpor...@konsulko.com
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += soc.o clock.o timer.o flash.o
diff --git a/arch/arm/cpu/armv7m/stm32f1/clock.c
b/arch/arm/cpu/armv7m/stm32f1/clock.c
new file mode 100644
index 000..b921eff
--- /dev/null
+++ b/arch/arm/cpu/armv7m/stm32f1/clock.c
@@ -0,0 +1,195 @@
+/*
+ * (C) Copyright 2015
+ * Kamil Lulko, re...@wp.pl
+ *
+ * Copyright 2015 Konsulko Group, Matt Porter mpor...@konsulko.com
+ *
+ * (C) Copyright 2014
+ * STMicroelectronics
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/stm32.h
+
+#define RCC_CR_HSION (1 0)
+#define RCC_CR_HSEON (1 16)
+#define RCC_CR_HSERDY (1 17)
+#define RCC_CR_HSEBYP (1 18)
+#define RCC_CR_CSSON (1 19)
+#define RCC_CR_PLLON (1 24)
+#define RCC_CR_PLLRDY (1 25)
+
+#define RCC_CFGR_PLLMUL_MASK 0x3C
+#define RCC_CFGR_PLLMUL_SHIFT 18
+#define RCC_CFGR_PLLSRC_HSE(1 16)
+
+#define RCC_CFGR_AHB_PSC_MASK 0xF0
+#define RCC_CFGR_APB1_PSC_MASK 0x700
+#define RCC_CFGR_APB2_PSC_MASK 0x3800
+#define RCC_CFGR_SW0 (1 0)
+#define RCC_CFGR_SW1 (1 1)
+#define RCC_CFGR_SW_MASK 0x3
+#define RCC_CFGR_SW_HSI0
+#define RCC_CFGR_SW_HSERCC_CFGR_SW0
+#define RCC_CFGR_SW_PLLRCC_CFGR_SW1
+#define RCC_CFGR_SWS0 (1 2)
+#define RCC_CFGR_SWS1 (1 3)
+#define RCC_CFGR_SWS_MASK 0xC
+#define RCC_CFGR_SWS_HSI 0
+#define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
+#define RCC_CFGR_SWS_PLL RCC_CFGR_SWS1
+#define RCC_CFGR_HPRE_SHIFT4
+#define RCC_CFGR_PPRE1_SHIFT 8
+#define RCC_CFGR_PPRE2_SHIFT 11
+
+#define RCC_APB1ENR_PWREN (1 28)
+
+#define PWR_CR_VOS0(1 14)
+#define PWR_CR_VOS1(1 15)
+#define PWR_CR_VOS_MASK0xC000
+#define PWR_CR_VOS_SCALE_MODE_1(PWR_CR_VOS0 | PWR_CR_VOS1)
+#define PWR_CR_VOS_SCALE_MODE_2(PWR_CR_VOS1)
+#define PWR_CR_VOS_SCALE_MODE_3(PWR_CR_VOS0)
+
+#define FLASH_ACR_WS(n)n
+#define FLASH_ACR_PRFTEN (1 8)
+#define FLASH_ACR_ICEN (1 9)
+#define FLASH_ACR_DCEN (1 10)
+
+struct psc {
+ u8 ahb_psc;
+ u8 apb1_psc;
+ u8 apb2_psc;
+};
+
+#define AHB_PSC_1 0
+#define AHB_PSC_2 0x8
+#define AHB_PSC_4 0x9
+#define AHB_PSC_8 0xA
+#define AHB_PSC_16 0xB
+#define AHB_PSC_64 0xC
+#define AHB_PSC_1280xD
+#define AHB_PSC_2560xE
+#define AHB_PSC_5120xF
+
+#define APB_PSC_1 0
+#define APB_PSC_2 0x4
+#define APB_PSC_4 0x5
+#define APB_PSC_8 0x6
+#define APB_PSC_16 0x7
+
+#if !defined(CONFIG_STM32_HSE_HZ)
+#error CONFIG_STM32_HSE_HZ not defined!
+#else
+#if (CONFIG_STM32_HSE_HZ == 800)
+#define RCC_CFGR_PLLMUL_CFG0x7
+struct psc psc_hse = {
+ .ahb_psc = AHB_PSC_1,
+ .apb1_psc = APB_PSC_2,
+ .apb2_psc = APB_PSC_1
+};
+#else
+#error No PLL/Prescaler configuration for
[U-Boot] [PATCH v2 4/6] gpio: stm32: add stm32f1 support
Add support for the STM32F1 family to the STM32 gpio driver.
Signed-off-by: Matt Porter mpor...@konsulko.com
---
Since v1:
- Explicitly check for F4/F1 family and error if not
set to a supported STM32 family.
drivers/gpio/stm32_gpio.c | 109 +-
1 file changed, 108 insertions(+), 1 deletion(-)
diff --git a/drivers/gpio/stm32_gpio.c b/drivers/gpio/stm32_gpio.c
index d3497e9..f426727 100644
--- a/drivers/gpio/stm32_gpio.c
+++ b/drivers/gpio/stm32_gpio.c
@@ -5,6 +5,8 @@
* (C) Copyright 2015
* Kamil Lulko, re...@wp.pl
*
+ * Copyright 2015 Konsulko Group, Matt Porter mpor...@konsulko.com
+ *
* SPDX-License-Identifier:GPL-2.0+
*/
@@ -16,6 +18,7 @@
DECLARE_GLOBAL_DATA_PTR;
+#if defined(CONFIG_STM32F4)
#define STM32_GPIOA_BASE (STM32_AHB1PERIPH_BASE + 0x)
#define STM32_GPIOB_BASE (STM32_AHB1PERIPH_BASE + 0x0400)
#define STM32_GPIOC_BASE (STM32_AHB1PERIPH_BASE + 0x0800)
@@ -90,6 +93,92 @@ int stm32_gpio_config(const struct stm32_gpio_dsc *dsc,
out:
return rv;
}
+#elif defined(CONFIG_STM32F1)
+#define STM32_GPIOA_BASE (STM32_APB2PERIPH_BASE + 0x0800)
+#define STM32_GPIOB_BASE (STM32_APB2PERIPH_BASE + 0x0C00)
+#define STM32_GPIOC_BASE (STM32_APB2PERIPH_BASE + 0x1000)
+#define STM32_GPIOD_BASE (STM32_APB2PERIPH_BASE + 0x1400)
+#define STM32_GPIOE_BASE (STM32_APB2PERIPH_BASE + 0x1800)
+#define STM32_GPIOF_BASE (STM32_APB2PERIPH_BASE + 0x1C00)
+#define STM32_GPIOG_BASE (STM32_APB2PERIPH_BASE + 0x2000)
+
+static const unsigned long io_base[] = {
+ STM32_GPIOA_BASE, STM32_GPIOB_BASE, STM32_GPIOC_BASE,
+ STM32_GPIOD_BASE, STM32_GPIOE_BASE, STM32_GPIOF_BASE,
+ STM32_GPIOG_BASE
+};
+
+#define STM32_GPIO_CR_MODE_MASK0x3
+#define STM32_GPIO_CR_MODE_SHIFT(p)(p * 4)
+#define STM32_GPIO_CR_CNF_MASK 0x3
+#define STM32_GPIO_CR_CNF_SHIFT(p) (p * 4 + 2)
+
+struct stm32_gpio_regs {
+ u32 crl;/* GPIO port configuration low */
+ u32 crh;/* GPIO port configuration high */
+ u32 idr;/* GPIO port input data */
+ u32 odr;/* GPIO port output data */
+ u32 bsrr; /* GPIO port bit set/reset */
+ u32 brr;/* GPIO port bit reset */
+ u32 lckr; /* GPIO port configuration lock */
+};
+
+#define CHECK_DSC(x) (!x || x-port 6 || x-pin 15)
+#define CHECK_CTL(x) (!x || x-mode 3 || x-icnf 3 || x-ocnf 3 || \
+x-pupd 1)
+
+int stm32_gpio_config(const struct stm32_gpio_dsc *dsc,
+ const struct stm32_gpio_ctl *ctl)
+{
+ struct stm32_gpio_regs *gpio_regs;
+ u32 *cr;
+ int p, crp;
+ int rv;
+
+ if (CHECK_DSC(dsc)) {
+ rv = -EINVAL;
+ goto out;
+ }
+ if (CHECK_CTL(ctl)) {
+ rv = -EINVAL;
+ goto out;
+ }
+
+ p = dsc-pin;
+
+ gpio_regs = (struct stm32_gpio_regs *)io_base[dsc-port];
+
+ /* Enable clock for GPIO port */
+ setbits_le32(STM32_RCC-apb2enr, 0x04 dsc-port);
+
+ if (p 8) {
+ cr = gpio_regs-crl;
+ crp = p;
+ } else {
+ cr = gpio_regs-crh;
+ crp = p - 8;
+ }
+
+ clrbits_le32(cr, 0x3 STM32_GPIO_CR_MODE_SHIFT(crp));
+ setbits_le32(cr, ctl-mode STM32_GPIO_CR_MODE_SHIFT(crp));
+
+ clrbits_le32(cr, 0x3 STM32_GPIO_CR_CNF_SHIFT(crp));
+ /* Inputs set the optional pull up / pull down */
+ if (ctl-mode == STM32_GPIO_MODE_IN) {
+ setbits_le32(cr, ctl-icnf STM32_GPIO_CR_CNF_SHIFT(crp));
+ clrbits_le32(gpio_regs-odr, 0x1 p);
+ setbits_le32(gpio_regs-odr, ctl-pupd p);
+ } else {
+ setbits_le32(cr, ctl-ocnf STM32_GPIO_CR_CNF_SHIFT(crp));
+ }
+
+ rv = 0;
+out:
+ return rv;
+}
+#else
+#error STM32 family not supported
+#endif
int stm32_gpout_set(const struct stm32_gpio_dsc *dsc, int state)
{
@@ -148,10 +237,20 @@ int gpio_direction_input(unsigned gpio)
dsc.port = stm32_gpio_to_port(gpio);
dsc.pin = stm32_gpio_to_pin(gpio);
+#if defined(CONFIG_STM32F4)
ctl.af = STM32_GPIO_AF0;
ctl.mode = STM32_GPIO_MODE_IN;
+ ctl.otype = STM32_GPIO_OTYPE_PP;
ctl.pupd = STM32_GPIO_PUPD_NO;
ctl.speed = STM32_GPIO_SPEED_50M;
+#elif defined(CONFIG_STM32F1)
+ ctl.mode = STM32_GPIO_MODE_IN;
+ ctl.icnf = STM32_GPIO_ICNF_IN_FLT;
+ ctl.ocnf = STM32_GPIO_OCNF_GP_PP; /* ignored for input */
+ ctl.pupd = STM32_GPIO_PUPD_UP; /* ignored for floating */
+#else
+#error STM32 family not supported
+#endif
return stm32_gpio_config(dsc, ctl);
}
@@ -164,11 +263,19 @@ int gpio_direction_output(unsigned gpio, int value)
dsc.port = stm32_gpio_to_port(gpio);
dsc.pin = stm32_gpio_to_pin(gpio);
+#if defined(CONFIG_STM32F4)
[U-Boot] [PATCH v2 0/6] Add ARMv7M STM32F1 and STM3210E-EVAL board support
This series adds support for the STM32F1 SoC family and the STM3210E-EVAL board on top of the STM32F4 SoC family support [1]. Since this board has no DRAM the first patch fixes the build when CONFIG_NR_DRAM_BANKS is not set. A patch is also required to force the processor to stay in Thumb mode when 'go'ing to an application. As the STM32F1 differs greatly from STM32F4 in flash and clock layout, there's a separate subdirectory for the STM32F1 family. The gpio and serial drivers are shared as these peripherals are mostly similar with only the pinmux bits being significantly different in the gpio driver. The STM3210E-EVAL board is supported with 1MiB Flash and 96KiB of SRAM on the STM32F103ZGT6, USART1 for console, and four user LEDs. [1] http://lists.denx.de/pipermail/u-boot/2015-March/206640.html Matt Porter (6): image: fix build when CONFIG_NR_DRAM_BANKS is disabled on ARM common/cmd_boot: keep ARM v7M in thumb mode during do_go_exec() ARMv7M: add STM32F1 support gpio: stm32: add stm32f1 support serial: stm32: add stm32f1 support board: add stm3210e-eval board support arch/arm/Kconfig | 5 + arch/arm/cpu/armv7m/Makefile | 1 + arch/arm/cpu/armv7m/stm32f1/Makefile | 13 ++ arch/arm/cpu/armv7m/stm32f1/clock.c | 195 ++ arch/arm/cpu/armv7m/stm32f1/flash.c | 179 +++ arch/arm/cpu/armv7m/stm32f1/soc.c | 35 ++ arch/arm/cpu/armv7m/stm32f1/timer.c | 120 ++ arch/arm/include/asm/arch-stm32f1/gpio.h | 117 ++ arch/arm/include/asm/arch-stm32f1/stm32.h | 115 ++ board/st/stm3210e-eval/Kconfig| 19 +++ board/st/stm3210e-eval/MAINTAINERS| 5 + board/st/stm3210e-eval/Makefile | 13 ++ board/st/stm3210e-eval/stm3210e-eval.c| 85 + common/cmd_boot.c | 4 + common/image.c| 2 +- configs/stm3210e-eval_defconfig | 3 + drivers/gpio/stm32_gpio.c | 109 - drivers/serial/serial_stm32.c | 9 ++ include/configs/stm3210e-eval.h | 117 ++ include/flash.h | 1 + 20 files changed, 1145 insertions(+), 2 deletions(-) create mode 100644 arch/arm/cpu/armv7m/stm32f1/Makefile create mode 100644 arch/arm/cpu/armv7m/stm32f1/clock.c create mode 100644 arch/arm/cpu/armv7m/stm32f1/flash.c create mode 100644 arch/arm/cpu/armv7m/stm32f1/soc.c create mode 100644 arch/arm/cpu/armv7m/stm32f1/timer.c create mode 100644 arch/arm/include/asm/arch-stm32f1/gpio.h create mode 100644 arch/arm/include/asm/arch-stm32f1/stm32.h create mode 100644 board/st/stm3210e-eval/Kconfig create mode 100644 board/st/stm3210e-eval/MAINTAINERS create mode 100644 board/st/stm3210e-eval/Makefile create mode 100644 board/st/stm3210e-eval/stm3210e-eval.c create mode 100644 configs/stm3210e-eval_defconfig create mode 100644 include/configs/stm3210e-eval.h -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 5/6] serial: stm32: add stm32f1 support
Add support for the STM32F1 famly to the STM32 serial driver. Signed-off-by: Matt Porter mpor...@konsulko.com --- Since v1: - Explicitly check for F4/F1 family and error if not set to a supported STM32 family. drivers/serial/serial_stm32.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c index 3c80096..9b19b68 100644 --- a/drivers/serial/serial_stm32.c +++ b/drivers/serial/serial_stm32.c @@ -2,6 +2,8 @@ * (C) Copyright 2015 * Kamil Lulko, re...@wp.pl * + * Copyright 2015 Konsulko Group, Matt Porter mpor...@konsulko.com + * * SPDX-License-Identifier:GPL-2.0+ */ @@ -10,8 +12,15 @@ #include serial.h #include asm/arch/stm32.h +#if defined(CONFIG_STM32F4) #define STM32_USART1_BASE (STM32_APB2PERIPH_BASE + 0x1000) #define RCC_APB2ENR_USART1EN (1 4) +#elif defined(CONFIG_STM32F1) +#define STM32_USART1_BASE (STM32_APB2PERIPH_BASE + 0x3800) +#define RCC_APB2ENR_USART1EN (1 14) +#else +#error STM32 family not supported +#endif #define USART_BASE STM32_USART1_BASE #define RCC_USART_ENABLE RCC_APB2ENR_USART1EN -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 6/6] board: add stm3210e-eval board support
Add support for the STM32F1-based stm3210e-eval boards
from ST. UART, Flash, GPIO, and LEDs are supported.
Signed-off-by: Matt Porter mpor...@konsulko.com
---
arch/arm/Kconfig | 5 ++
board/st/stm3210e-eval/Kconfig | 19 ++
board/st/stm3210e-eval/MAINTAINERS | 5 ++
board/st/stm3210e-eval/Makefile| 13
board/st/stm3210e-eval/stm3210e-eval.c | 85
configs/stm3210e-eval_defconfig| 3 +
include/configs/stm3210e-eval.h| 117 +
7 files changed, 247 insertions(+)
create mode 100644 board/st/stm3210e-eval/Kconfig
create mode 100644 board/st/stm3210e-eval/MAINTAINERS
create mode 100644 board/st/stm3210e-eval/Makefile
create mode 100644 board/st/stm3210e-eval/stm3210e-eval.c
create mode 100644 configs/stm3210e-eval_defconfig
create mode 100644 include/configs/stm3210e-eval.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 4eb047c..bcf4e46 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -731,6 +731,10 @@ config ARCH_UNIPHIER
select SPL
select OF_CONTROL
+config TARGET_STM3210E_EVAL
+ bool Support STM3210E-EVAL board
+ select CPU_V7M
+
config TARGET_STM32F429_DISCOVERY
bool Support STM32F429 Discovery
select CPU_V7M
@@ -872,6 +876,7 @@ source board/spear/spear600/Kconfig
source board/spear/x600/Kconfig
source board/st-ericsson/snowball/Kconfig
source board/st-ericsson/u8500/Kconfig
+source board/st/stm3210e-eval/Kconfig
source board/st/stm32f429-discovery/Kconfig
source board/st/stv0991/Kconfig
source board/sunxi/Kconfig
diff --git a/board/st/stm3210e-eval/Kconfig b/board/st/stm3210e-eval/Kconfig
new file mode 100644
index 000..49bc770
--- /dev/null
+++ b/board/st/stm3210e-eval/Kconfig
@@ -0,0 +1,19 @@
+if TARGET_STM3210E_EVAL
+
+config SYS_BOARD
+ string
+ default stm3210e-eval
+
+config SYS_VENDOR
+ string
+ default st
+
+config SYS_SOC
+ string
+ default stm32f1
+
+config SYS_CONFIG_NAME
+ string
+ default stm3210e-eval
+
+endif
diff --git a/board/st/stm3210e-eval/MAINTAINERS
b/board/st/stm3210e-eval/MAINTAINERS
new file mode 100644
index 000..0f9f31b
--- /dev/null
+++ b/board/st/stm3210e-eval/MAINTAINERS
@@ -0,0 +1,5 @@
+M: Matt Porter mpor...@konsulko.com
+S: Maintained
+F: board/st/stm3210e-eval/
+F: include/configs/stm3210e-eval.h
+F: configs/stm3210e-eval_defconfig
diff --git a/board/st/stm3210e-eval/Makefile b/board/st/stm3210e-eval/Makefile
new file mode 100644
index 000..b018e08
--- /dev/null
+++ b/board/st/stm3210e-eval/Makefile
@@ -0,0 +1,13 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# (C) Copyright 2015
+# Kamil Lulko, re...@wp.pl
+#
+# Copyright 2015 Konsulko Group, Matt Porter mpor...@konsulko.com
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := stm3210e-eval.o
diff --git a/board/st/stm3210e-eval/stm3210e-eval.c
b/board/st/stm3210e-eval/stm3210e-eval.c
new file mode 100644
index 000..a801983
--- /dev/null
+++ b/board/st/stm3210e-eval/stm3210e-eval.c
@@ -0,0 +1,85 @@
+/*
+ * (C) Copyright 2011, 2012, 2013
+ * Yuri Tikhonov, Emcraft Systems, y...@emcraft.com
+ * Alexander Potashev, Emcraft Systems, aspotas...@emcraft.com
+ * Vladimir Khusainov, Emcraft Systems, v...@emcraft.com
+ * Pavel Boldin, Emcraft Systems, pabol...@emcraft.com
+ *
+ * (C) Copyright 2015
+ * Kamil Lulko, re...@wp.pl
+ *
+ * Copyright 2015 Konsulko Group, Matt Porter mpor...@konsulko.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/armv7m.h
+#include asm/arch/stm32.h
+#include asm/arch/gpio.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+const struct stm32_gpio_ctl gpio_ctl_usart[] = {
+ /* TX */
+ {
+ .mode = STM32_GPIO_MODE_OUT_50M,
+ .ocnf = STM32_GPIO_OCNF_AF_PP,
+ },
+ /* RX */
+ {
+ .mode = STM32_GPIO_MODE_IN,
+ .icnf = STM32_GPIO_ICNF_IN_FLT,
+ }
+};
+
+static const struct stm32_gpio_dsc usart1_gpio[] = {
+ {STM32_GPIO_PORT_A, STM32_GPIO_PIN_9}, /* TX */
+ {STM32_GPIO_PORT_A, STM32_GPIO_PIN_10}, /* RX */
+};
+
+int uart2_setup_gpio(void)
+{
+ int i;
+ int rv = 0;
+
+ for (i = 0; i ARRAY_SIZE(usart1_gpio); i++) {
+ rv = stm32_gpio_config(usart1_gpio[i], gpio_ctl_usart[i]);
+ if (rv)
+ goto out;
+ }
+
+out:
+ return rv;
+}
+
+int dram_init(void)
+{
+ gd-ram_size = CONFIG_SYS_RAM_SIZE;
+
+ return 0;
+}
+
+u32 get_board_rev(void)
+{
+ return 0;
+}
+
+int board_early_init_f(void)
+{
+ int res;
+
+ res = uart2_setup_gpio();
+ if (res)
+ return res;
+
+ return 0;
+}
+
+int board_init(void)
+{
+ gd-bd-bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+ return 0;
+}
diff --git
[U-Boot] [PATCH v2 1/6] image: fix build when CONFIG_NR_DRAM_BANKS is disabled on ARM
common/image.c currently implicitly depends on CONFIG_NR_DRAM_BANKS when CONFIG_ARM is enabled. Make this requirement explicit. Signed-off-by: Matt Porter mpor...@konsulko.com --- common/image.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/image.c b/common/image.c index 162b682..73c24f5 100644 --- a/common/image.c +++ b/common/image.c @@ -461,7 +461,7 @@ phys_size_t getenv_bootm_size(void) tmp = 0; -#if defined(CONFIG_ARM) +#if defined(CONFIG_ARM) defined(CONFIG_NR_DRAM_BANKS) return gd-bd-bi_dram[0].size - tmp; #else return gd-bd-bi_memsize - tmp; -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 2/6] common/cmd_boot: keep ARM v7M in thumb mode during do_go_exec()
On ARM v7M, the processor will return to ARM mode when executing a blx instruction with bit 0 of the address == 0. Always set it to 1 to stay in thumb mode. Signed-off-by: Matt Porter mpor...@konsulko.com --- common/cmd_boot.c | 4 1 file changed, 4 insertions(+) diff --git a/common/cmd_boot.c b/common/cmd_boot.c index 8f2e070..20ce652 100644 --- a/common/cmd_boot.c +++ b/common/cmd_boot.c @@ -38,6 +38,10 @@ static int do_go(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) * pass address parameter as argv[0] (aka command name), * and all remaining args */ +#ifdef CONFIG_CPU_V7M + /* For ARM V7M, set bit zero to stay in Thumb mode */ + addr++; +#endif rc = do_go_exec ((void *)addr, argc - 1, argv + 1); if (rc != 0) rcode = 1; -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v7 17/17] jetson-tk1: Add PSCI configuration options and reserve secure code
On 2015-04-21 19:58, Ian Campbell wrote: On Tue, 2015-04-21 at 07:18 +0200, Jan Kiszka wrote: From: Ian Campbell i...@hellion.org.uk The secure world code is relocated to the MB just below the top of 4G, we reserve it in the FDT (by setting CONFIG_ARMV7_SECURE_RESERVE_SIZE) but it is not protected in h/w. See next patch. Next patch, but this is the last one? Was it reordered earlier in the series or is it not yet included here? Yes, I reordered because this one activates the feature. Tom, in case you apply, please just drop that reference. Jan Signed-off-by: Ian Campbell i...@hellion.org.uk Signed-off-by: Jan Kiszka jan.kis...@siemens.com Reviewed-by: Tom Rini tr...@konsulko.com Reviewed-by: Thierry Reding tred...@nvidia.com Tested-by: Thierry Reding tred...@nvidia.com Tested-by: Ian Campbell i...@hellion.org.uk --- arch/arm/mach-tegra/tegra124/Kconfig | 2 ++ include/configs/jetson-tk1.h | 5 + 2 files changed, 7 insertions(+) diff --git a/arch/arm/mach-tegra/tegra124/Kconfig b/arch/arm/mach-tegra/tegra124/Kconfig index 88f627c..5114299 100644 --- a/arch/arm/mach-tegra/tegra124/Kconfig +++ b/arch/arm/mach-tegra/tegra124/Kconfig @@ -5,6 +5,8 @@ choice config TARGET_JETSON_TK1 bool NVIDIA Tegra124 Jetson TK1 board +select CPU_V7_HAS_NONSEC if !SPL_BUILD +select CPU_V7_HAS_VIRT if !SPL_BUILD config TARGET_NYAN_BIG bool Google/NVIDIA Nyan-big Chrombook diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index 8c016b7..aeafbd5 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -79,4 +79,9 @@ #include tegra-common-usb-gadget.h #include tegra-common-post.h +#define CONFIG_ARMV7_PSCI 1 +/* Reserve top 1M for secure RAM */ +#define CONFIG_ARMV7_SECURE_BASE0xfff0 +#define CONFIG_ARMV7_SECURE_RESERVE_SIZE0x0010 + #endif /* __CONFIG_H */ -- Siemens AG, Corporate Technology, CT RTC ITP SES-DE Corporate Competence Center Embedded Linux ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/6] common/cmd_boot: keep ARM v7M in thumb mode during do_go_exec()
On Tue, Apr 21, 2015 at 01:05:24PM -0500, Felipe Balbi wrote: On Tue, Apr 21, 2015 at 02:01:31PM -0400, Matt Porter wrote: On Tue, Apr 21, 2015 at 12:47:24PM -0500, Felipe Balbi wrote: On Tue, Apr 21, 2015 at 01:36:54PM -0400, Matt Porter wrote: On ARM v7M, the processor will return to ARM mode when executing a blx instruction with bit 0 of the address == 0. Always set it but that's what the 'x' is for, right ? eXchange the CPU mode. Yes. to 1 to stay in thumb mode. Signed-off-by: Matt Porter mpor...@konsulko.com --- common/cmd_boot.c | 4 1 file changed, 4 insertions(+) diff --git a/common/cmd_boot.c b/common/cmd_boot.c index 8f2e070..20ce652 100644 --- a/common/cmd_boot.c +++ b/common/cmd_boot.c @@ -38,6 +38,10 @@ static int do_go(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) * pass address parameter as argv[0] (aka command name), * and all remaining args */ +#ifdef CONFIG_CPU_V7M + /* For ARM V7M, set bit zero to stay in Thumb mode */ + addr++; +#endif what if we were in ARM state when we reached this point ? You're now telling CPU to always switch to Thumb. Is this really what we want ? We have no ARM state on this core so that's not possible. From ARM's instruction manual: The BX and BLX instructions can change the processor state from ARM to Thumb, or from Thumb to ARM. BLX label always changes the state. BX Rm and BLX Rm derive the target state from bit[0] of Rm: if bit[0] of Rm is 0, the processor changes to, or remains in, ARM state if bit[0] of Rm is 1, the processor changes to, or remains in, Thumb state. Correct. The last statement is why this patch exists. There is no ARM mode on M3, we immediately fault. Having bit[0]=0 for BX/BLX is not permitted on V7M...something not covered in the generic description of these instructions. it just seems weird that bit0 wouldn't just be assume 1 by the core itself. I suppose as a consequence we can't use blx label with v7m either ? :-s It also seems weird to me that it wouldn't just be ignored on anything armv7-m. Yes, blx label would be very bad which is why it is not supported on ARMv7-m :) And to clarify for those listening at home... From The ARMv7-M Instruction Set Appendix A4.1.1: Thumb interworking is held as bit [0] of an interworking address. Interworking addresses are used in the following instructions: • BX or BLX • an LDR or LDM that loads the PC. ARMv7-M only supports the Thumb instruction execution state, therefore the value of address bit [0] must be 1 in interworking instructions, otherwise a fault occurs. All instructions ignore bit [0] and write bits [31:1]:’0’ when updating the PC. Also: A7.7.19 BLX (register) Branch with Link and Exchange calls a subroutine at an address and instruction set specified by a register. ARMv7-M only supports the Thumb instruction set. An attempt to change the instruction execution state causes the processor to take an exception on the instruction at the target address. -Matt signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/6] common/cmd_boot: keep ARM v7M in thumb mode during do_go_exec()
On Tue, Apr 21, 2015 at 12:47:24PM -0500, Felipe Balbi wrote: On Tue, Apr 21, 2015 at 01:36:54PM -0400, Matt Porter wrote: On ARM v7M, the processor will return to ARM mode when executing a blx instruction with bit 0 of the address == 0. Always set it but that's what the 'x' is for, right ? eXchange the CPU mode. to 1 to stay in thumb mode. Signed-off-by: Matt Porter mpor...@konsulko.com --- common/cmd_boot.c | 4 1 file changed, 4 insertions(+) diff --git a/common/cmd_boot.c b/common/cmd_boot.c index 8f2e070..20ce652 100644 --- a/common/cmd_boot.c +++ b/common/cmd_boot.c @@ -38,6 +38,10 @@ static int do_go(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) * pass address parameter as argv[0] (aka command name), * and all remaining args */ +#ifdef CONFIG_CPU_V7M + /* For ARM V7M, set bit zero to stay in Thumb mode */ + addr++; +#endif what if we were in ARM state when we reached this point ? You're now telling CPU to always switch to Thumb. Is this really what we want ? From ARM's instruction manual: The BX and BLX instructions can change the processor state from ARM to Thumb, or from Thumb to ARM. BLX label always changes the state. BX Rm and BLX Rm derive the target state from bit[0] of Rm: if bit[0] of Rm is 0, the processor changes to, or remains in, ARM state if bit[0] of Rm is 1, the processor changes to, or remains in, Thumb state. oh wait, this is cortex-m, it's supposed to be thumb2 only, why do we even need that bit ? -- balbi signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] spl: descend into lib/ for all the SPL boards
On 04/20/2015 08:37 PM, Masahiro Yamada wrote: Currently, CONFIG_SPL_LIBGENERIC_SUPPORT must be defined to build under lib/ directory for SPL. This directory contains very basic functions such as memcpy, memset in lib/string.c, so it should be very useful for all the boards. Because SPL always enables compiler's garbage collection, this change should not give impact on its memory footprint. Let's allow SPL to descend into lib/ all the time. As a result, CONFIG_SPL_LIBGENERIC_SUPPORT is no longer necessary. If this macro is not needed, do you want to remove it from README? Four files must be adjusted to avoid multiple definition error. - arch/powerpc/cpu/mpc85xx/spl_minimal.c udelay() is not a weak function. __udelay() is overridable. - arch/powerpc/lib/time.c MPC85xx has its own udelay for CONFIG_SPL_INIT_MINIAL. Enclose the definition with ifdefs. - board/armadeus/apf27/apf27.c - board/vpac270/onenand.c Do not duplicate hang() Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- Tested on multiple mpc85xx boards. Most are OK but I see issues with B4860QDS and T4240QDS NAND boot. Probably not caused by this patch. I will ask board maintainers to follow up. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [U-Boot PATCH] linux/bitops.h: Add BIT macro
Updated in spi relevent files.
Signed-off-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com
---
drivers/mtd/spi/sandbox.c | 4 +--
drivers/mtd/spi/sf_internal.h | 10 +++
drivers/spi/altera_spi.c | 26 -
drivers/spi/atmel_spi.h| 52 +-
drivers/spi/bfin_spi6xx.c | 8 +++---
drivers/spi/cadence_qspi_apb.c | 28 +-
drivers/spi/davinci_spi.c | 2 --
drivers/spi/designware_spi.c | 14 -
drivers/spi/exynos_spi.c | 4 +--
drivers/spi/fsl_dspi.c | 2 +-
drivers/spi/fsl_espi.c | 20 ++---
drivers/spi/fsl_qspi.c | 4 +--
drivers/spi/ich.c | 4 +--
drivers/spi/mpc8xxx_spi.c | 2 +-
drivers/spi/omap3_spi.h| 48 +++
drivers/spi/sh_qspi.c | 16 +--
drivers/spi/tegra114_spi.c | 64 +-
drivers/spi/tegra20_sflash.c | 50 -
drivers/spi/tegra20_slink.c| 56 ++--
drivers/spi/ti_qspi.c | 10 +++
drivers/spi/xilinx_spi.c | 32 ++---
drivers/spi/zynq_spi.c | 16 +--
include/linux/bitops.h | 1 +
include/spi.h | 22 +++
24 files changed, 247 insertions(+), 248 deletions(-)
diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c
index d576d31..54baa42 100644
--- a/drivers/mtd/spi/sandbox.c
+++ b/drivers/mtd/spi/sandbox.c
@@ -53,8 +53,8 @@ static const char *sandbox_sf_state_name(enum
sandbox_sf_state state)
}
/* Bits for the status register */
-#define STAT_WIP (1 0)
-#define STAT_WEL (1 1)
+#define STAT_WIP BIT(0)
+#define STAT_WEL BIT(1)
/* Assume all SPI flashes have 3 byte addresses since they do atm */
#define SF_ADDR_LEN3
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 58007de..d273d30 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -92,13 +92,13 @@ enum {
#endif
/* Common status */
-#define STATUS_WIP (1 0)
-#define STATUS_QEB_WINSPAN (1 1)
-#define STATUS_QEB_MXIC(1 6)
-#define STATUS_PEC (1 7)
+#define STATUS_WIP BIT(0)
+#define STATUS_QEB_WINSPAN BIT(1)
+#define STATUS_QEB_MXICBIT(6)
+#define STATUS_PEC BIT(7)
#ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
-#define STATUS_SRWD(1 7) /* SR write protect */
+#define STATUS_SRWDBIT(7) /* SR write protect */
#endif
/* Flash timeout values */
diff --git a/drivers/spi/altera_spi.c b/drivers/spi/altera_spi.c
index a4d03d9..2302117 100644
--- a/drivers/spi/altera_spi.c
+++ b/drivers/spi/altera_spi.c
@@ -29,19 +29,19 @@ struct altera_spi_regs {
u32 slave_sel;
};
-#define ALTERA_SPI_STATUS_ROE_MSK (1 3)
-#define ALTERA_SPI_STATUS_TOE_MSK (1 4)
-#define ALTERA_SPI_STATUS_TMT_MSK (1 5)
-#define ALTERA_SPI_STATUS_TRDY_MSK (1 6)
-#define ALTERA_SPI_STATUS_RRDY_MSK (1 7)
-#define ALTERA_SPI_STATUS_E_MSK(1 8)
-
-#define ALTERA_SPI_CONTROL_IROE_MSK(1 3)
-#define ALTERA_SPI_CONTROL_ITOE_MSK(1 4)
-#define ALTERA_SPI_CONTROL_ITRDY_MSK (1 6)
-#define ALTERA_SPI_CONTROL_IRRDY_MSK (1 7)
-#define ALTERA_SPI_CONTROL_IE_MSK (1 8)
-#define ALTERA_SPI_CONTROL_SSO_MSK (1 10)
+#define ALTERA_SPI_STATUS_ROE_MSK BIT(3)
+#define ALTERA_SPI_STATUS_TOE_MSK BIT(4)
+#define ALTERA_SPI_STATUS_TMT_MSK BIT(5)
+#define ALTERA_SPI_STATUS_TRDY_MSK BIT(6)
+#define ALTERA_SPI_STATUS_RRDY_MSK BIT(7)
+#define ALTERA_SPI_STATUS_E_MSKBIT(8)
+
+#define ALTERA_SPI_CONTROL_IROE_MSKBIT(3)
+#define ALTERA_SPI_CONTROL_ITOE_MSKBIT(4)
+#define ALTERA_SPI_CONTROL_ITRDY_MSK BIT(6)
+#define ALTERA_SPI_CONTROL_IRRDY_MSK BIT(7)
+#define ALTERA_SPI_CONTROL_IE_MSK BIT(8)
+#define ALTERA_SPI_CONTROL_SSO_MSK BIT(10)
static ulong altera_spi_base_list[] = CONFIG_SYS_ALTERA_SPI_LIST;
diff --git a/drivers/spi/atmel_spi.h b/drivers/spi/atmel_spi.h
index 1538a23..5b892d2 100644
--- a/drivers/spi/atmel_spi.h
+++ b/drivers/spi/atmel_spi.h
@@ -15,19 +15,19 @@
#define ATMEL_SPI_VERSION 0x00fc
/* Bits in CR */
-#define ATMEL_SPI_CR_SPIEN (1 0)
-#define ATMEL_SPI_CR_SPIDIS(1 1)
-#define ATMEL_SPI_CR_SWRST (1 7)
-#define ATMEL_SPI_CR_LASTXFER (1 24)
+#define ATMEL_SPI_CR_SPIEN BIT(0)
+#define ATMEL_SPI_CR_SPIDISBIT(1)
+#define ATMEL_SPI_CR_SWRST BIT(7)
+#define ATMEL_SPI_CR_LASTXFER BIT(24)
/* Bits in MR */
-#define ATMEL_SPI_MR_MSTR (1 0)
-#define ATMEL_SPI_MR_PS(1 1)
-#define ATMEL_SPI_MR_PCSDEC
Re: [U-Boot] [PATCH v2 2/6] common/cmd_boot: keep ARM v7M in thumb mode during do_go_exec()
On Tue, Apr 21, 2015 at 01:36:54PM -0400, Matt Porter wrote: On ARM v7M, the processor will return to ARM mode when executing a blx instruction with bit 0 of the address == 0. Always set it but that's what the 'x' is for, right ? eXchange the CPU mode. to 1 to stay in thumb mode. Signed-off-by: Matt Porter mpor...@konsulko.com --- common/cmd_boot.c | 4 1 file changed, 4 insertions(+) diff --git a/common/cmd_boot.c b/common/cmd_boot.c index 8f2e070..20ce652 100644 --- a/common/cmd_boot.c +++ b/common/cmd_boot.c @@ -38,6 +38,10 @@ static int do_go(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) * pass address parameter as argv[0] (aka command name), * and all remaining args */ +#ifdef CONFIG_CPU_V7M + /* For ARM V7M, set bit zero to stay in Thumb mode */ + addr++; +#endif what if we were in ARM state when we reached this point ? You're now telling CPU to always switch to Thumb. Is this really what we want ? From ARM's instruction manual: The BX and BLX instructions can change the processor state from ARM to Thumb, or from Thumb to ARM. BLX label always changes the state. BX Rm and BLX Rm derive the target state from bit[0] of Rm: if bit[0] of Rm is 0, the processor changes to, or remains in, ARM state if bit[0] of Rm is 1, the processor changes to, or remains in, Thumb state. -- balbi signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/6] common/cmd_boot: keep ARM v7M in thumb mode during do_go_exec()
On Tue, Apr 21, 2015 at 12:47:24PM -0500, Felipe Balbi wrote: On Tue, Apr 21, 2015 at 01:36:54PM -0400, Matt Porter wrote: On ARM v7M, the processor will return to ARM mode when executing a blx instruction with bit 0 of the address == 0. Always set it but that's what the 'x' is for, right ? eXchange the CPU mode. Yes. to 1 to stay in thumb mode. Signed-off-by: Matt Porter mpor...@konsulko.com --- common/cmd_boot.c | 4 1 file changed, 4 insertions(+) diff --git a/common/cmd_boot.c b/common/cmd_boot.c index 8f2e070..20ce652 100644 --- a/common/cmd_boot.c +++ b/common/cmd_boot.c @@ -38,6 +38,10 @@ static int do_go(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) * pass address parameter as argv[0] (aka command name), * and all remaining args */ +#ifdef CONFIG_CPU_V7M + /* For ARM V7M, set bit zero to stay in Thumb mode */ + addr++; +#endif what if we were in ARM state when we reached this point ? You're now telling CPU to always switch to Thumb. Is this really what we want ? We have no ARM state on this core so that's not possible. From ARM's instruction manual: The BX and BLX instructions can change the processor state from ARM to Thumb, or from Thumb to ARM. BLX label always changes the state. BX Rm and BLX Rm derive the target state from bit[0] of Rm: if bit[0] of Rm is 0, the processor changes to, or remains in, ARM state if bit[0] of Rm is 1, the processor changes to, or remains in, Thumb state. Correct. The last statement is why this patch exists. There is no ARM mode on M3, we immediately fault. Having bit[0]=0 for BX/BLX is not permitted on V7M...something not covered in the generic description of these instructions. Incidentally, I forgot to update this with Kamil's comment that it should be implemented as |1 and will address that now. -Matt signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/6] common/cmd_boot: keep ARM v7M in thumb mode during do_go_exec()
On Tue, Apr 21, 2015 at 12:57:09PM -0500, Felipe Balbi wrote: On Tue, Apr 21, 2015 at 12:54:26PM -0500, Felipe Balbi wrote: On Tue, Apr 21, 2015 at 12:47:24PM -0500, Felipe Balbi wrote: On Tue, Apr 21, 2015 at 01:36:54PM -0400, Matt Porter wrote: On ARM v7M, the processor will return to ARM mode when executing a blx instruction with bit 0 of the address == 0. Always set it but that's what the 'x' is for, right ? eXchange the CPU mode. to 1 to stay in thumb mode. Signed-off-by: Matt Porter mpor...@konsulko.com --- common/cmd_boot.c | 4 1 file changed, 4 insertions(+) diff --git a/common/cmd_boot.c b/common/cmd_boot.c index 8f2e070..20ce652 100644 --- a/common/cmd_boot.c +++ b/common/cmd_boot.c @@ -38,6 +38,10 @@ static int do_go(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) * pass address parameter as argv[0] (aka command name), * and all remaining args */ +#ifdef CONFIG_CPU_V7M + /* For ARM V7M, set bit zero to stay in Thumb mode */ + addr++; +#endif what if we were in ARM state when we reached this point ? You're now telling CPU to always switch to Thumb. Is this really what we want ? From ARM's instruction manual: The BX and BLX instructions can change the processor state from ARM to Thumb, or from Thumb to ARM. BLX label always changes the state. BX Rm and BLX Rm derive the target state from bit[0] of Rm: if bit[0] of Rm is 0, the processor changes to, or remains in, ARM state if bit[0] of Rm is 1, the processor changes to, or remains in, Thumb state. oh wait, this is cortex-m, it's supposed to be thumb2 only, why do we even need that bit ? seems like it must be set for cortex-m, but then shouldn't this be done by GCC ? Are we, perhaps, using wrong GCC arguments when building for cortex-m ? From make V=1: ... -march=armv7-m -mthumb ... $ arm-none-eabi-gcc -v ... gcc version 4.8.3 20140913 (release) (4.8.3-11ubuntu1+11) -Matt signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [U-Boot PATCH 8/8] spi: davinci_spi: Driver cleanup
Arrange driver code in more readable format[1] for easy accessing
and readable.
[1] http://lists.denx.de/pipermail/u-boot/2013-August/160473.html
Signed-off-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com
Cc: Rex Chang rch...@ti.com
Cc: Murali Karicheri m-kariche...@ti.com
---
drivers/spi/davinci_spi.c | 343 +++---
1 file changed, 173 insertions(+), 170 deletions(-)
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index e0ecf99..0a036cc 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -8,39 +8,13 @@
*
* SPDX-License-Identifier:GPL-2.0+
*/
+
#include common.h
#include spi.h
#include malloc.h
#include asm/io.h
#include asm/arch/hardware.h
-struct davinci_spi_regs {
- dv_reg gcr0; /* 0x00 */
- dv_reg gcr1; /* 0x04 */
- dv_reg int0; /* 0x08 */
- dv_reg lvl;/* 0x0c */
- dv_reg flg;/* 0x10 */
- dv_reg pc0;/* 0x14 */
- dv_reg pc1;/* 0x18 */
- dv_reg pc2;/* 0x1c */
- dv_reg pc3;/* 0x20 */
- dv_reg pc4;/* 0x24 */
- dv_reg pc5;/* 0x28 */
- dv_reg rsvd[3];
- dv_reg dat0; /* 0x38 */
- dv_reg dat1; /* 0x3c */
- dv_reg buf;/* 0x40 */
- dv_reg emu;/* 0x44 */
- dv_reg delay; /* 0x48 */
- dv_reg def;/* 0x4c */
- dv_reg fmt0; /* 0x50 */
- dv_reg fmt1; /* 0x54 */
- dv_reg fmt2; /* 0x58 */
- dv_reg fmt3; /* 0x5c */
- dv_reg intvec0;/* 0x60 */
- dv_reg intvec1;/* 0x64 */
-};
-
#define BIT(x) (1 (x))
/* SPIGCR0 */
@@ -112,6 +86,35 @@ struct davinci_spi_regs {
#define SPI2_BASE CONFIG_SYS_SPI2_BASE
#endif
+/* davinci spi register set */
+struct davinci_spi_regs {
+ dv_reg gcr0; /* 0x00 */
+ dv_reg gcr1; /* 0x04 */
+ dv_reg int0; /* 0x08 */
+ dv_reg lvl;/* 0x0c */
+ dv_reg flg;/* 0x10 */
+ dv_reg pc0;/* 0x14 */
+ dv_reg pc1;/* 0x18 */
+ dv_reg pc2;/* 0x1c */
+ dv_reg pc3;/* 0x20 */
+ dv_reg pc4;/* 0x24 */
+ dv_reg pc5;/* 0x28 */
+ dv_reg rsvd[3];
+ dv_reg dat0; /* 0x38 */
+ dv_reg dat1; /* 0x3c */
+ dv_reg buf;/* 0x40 */
+ dv_reg emu;/* 0x44 */
+ dv_reg delay; /* 0x48 */
+ dv_reg def;/* 0x4c */
+ dv_reg fmt0; /* 0x50 */
+ dv_reg fmt1; /* 0x54 */
+ dv_reg fmt2; /* 0x58 */
+ dv_reg fmt3; /* 0x5c */
+ dv_reg intvec0;/* 0x60 */
+ dv_reg intvec1;/* 0x64 */
+};
+
+/* davinci spi slave */
struct davinci_spi_slave {
struct spi_slave slave;
struct davinci_spi_regs *regs;
@@ -123,111 +126,6 @@ static inline struct davinci_spi_slave
*to_davinci_spi(struct spi_slave *slave)
return container_of(slave, struct davinci_spi_slave, slave);
}
-void spi_init()
-{
- /* do nothing */
-}
-
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
- unsigned int max_hz, unsigned int mode)
-{
- struct davinci_spi_slave*ds;
-
- if (!spi_cs_is_valid(bus, cs))
- return NULL;
-
- ds = spi_alloc_slave(struct davinci_spi_slave, bus, cs);
- if (!ds)
- return NULL;
-
- switch (bus) {
- case SPI0_BUS:
- ds-regs = (struct davinci_spi_regs *)SPI0_BASE;
- break;
-#ifdef CONFIG_SYS_SPI1
- case SPI1_BUS:
- ds-regs = (struct davinci_spi_regs *)SPI1_BASE;
- break;
-#endif
-#ifdef CONFIG_SYS_SPI2
- case SPI2_BUS:
- ds-regs = (struct davinci_spi_regs *)SPI2_BASE;
- break;
-#endif
- default: /* Invalid bus number */
- return NULL;
- }
-
- ds-freq = max_hz;
-
- return ds-slave;
-}
-
-void spi_free_slave(struct spi_slave *slave)
-{
- struct davinci_spi_slave *ds = to_davinci_spi(slave);
-
- free(ds);
-}
-
-int spi_claim_bus(struct spi_slave *slave)
-{
- struct davinci_spi_slave *ds = to_davinci_spi(slave);
- unsigned int scalar;
-
- /* Enable the SPI hardware */
- writel(SPIGCR0_SPIRST_MASK, ds-regs-gcr0);
- udelay(1000);
- writel(SPIGCR0_SPIENA_MASK, ds-regs-gcr0);
-
- /* Set master mode, powered up and not activated */
- writel(SPIGCR1_MASTER_MASK | SPIGCR1_CLKMOD_MASK, ds-regs-gcr1);
-
- /* CS, CLK, SIMO and SOMI are functional pins */
- writel(((1 slave-cs) |
[U-Boot] [U-Boot PATCH 5/8] spi: xilinx_spi: Move header code to driver
Move the header code into driver for more readable and
easy to access it.
Signed-off-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com
Cc: Michal Simek michal.si...@xilinx.com
---
drivers/spi/xilinx_spi.c | 113 +-
drivers/spi/xilinx_spi.h | 138 ---
2 files changed, 112 insertions(+), 139 deletions(-)
delete mode 100644 drivers/spi/xilinx_spi.h
diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c
index 56d99d1..8073edc 100644
--- a/drivers/spi/xilinx_spi.c
+++ b/drivers/spi/xilinx_spi.c
@@ -21,7 +21,118 @@
#include malloc.h
#include spi.h
-#include xilinx_spi.h
+/*
+ * Xilinx SPI Register Definition
+ *
+ * [1]:[0]/ip_documentation/xps_spi.pdf
+ * page 8, Register Descriptions
+ * [2]:[0]/ip_documentation/axi_spi_ds742.pdf
+ * page 7, Register Overview Table
+ */
+struct xilinx_spi_reg {
+ u32 __space0__[7];
+ u32 dgier; /* Device Global Interrupt Enable Register (DGIER) */
+ u32 ipisr; /* IP Interrupt Status Register (IPISR) */
+ u32 __space1__;
+ u32 ipier; /* IP Interrupt Enable Register (IPIER) */
+ u32 __space2__[5];
+ u32 srr;/* Softare Reset Register (SRR) */
+ u32 __space3__[7];
+ u32 spicr; /* SPI Control Register (SPICR) */
+ u32 spisr; /* SPI Status Register (SPISR) */
+ u32 spidtr; /* SPI Data Transmit Register (SPIDTR) */
+ u32 spidrr; /* SPI Data Receive Register (SPIDRR) */
+ u32 spissr; /* SPI Slave Select Register (SPISSR) */
+ u32 spitfor;/* SPI Transmit FIFO Occupancy Register (SPITFOR) */
+ u32 spirfor;/* SPI Receive FIFO Occupancy Register (SPIRFOR) */
+};
+
+/* Device Global Interrupt Enable Register (dgier), [1] p15, [2] p15 */
+#define DGIER_GIE (1 31)
+
+/* IP Interrupt Status Register (ipisr), [1] p15, [2] p15 */
+#define IPISR_DRR_NOT_EMPTY(1 8)
+#define IPISR_SLAVE_SELECT (1 7)
+#define IPISR_TXF_HALF_EMPTY (1 6)
+#define IPISR_DRR_OVERRUN (1 5)
+#define IPISR_DRR_FULL (1 4)
+#define IPISR_DTR_UNDERRUN (1 3)
+#define IPISR_DTR_EMPTY(1 2)
+#define IPISR_SLAVE_MODF (1 1)
+#define IPISR_MODF (1 0)
+
+/* IP Interrupt Enable Register (ipier), [1] p17, [2] p18 */
+#define IPIER_DRR_NOT_EMPTY(1 8)
+#define IPIER_SLAVE_SELECT (1 7)
+#define IPIER_TXF_HALF_EMPTY (1 6)
+#define IPIER_DRR_OVERRUN (1 5)
+#define IPIER_DRR_FULL (1 4)
+#define IPIER_DTR_UNDERRUN (1 3)
+#define IPIER_DTR_EMPTY(1 2)
+#define IPIER_SLAVE_MODF (1 1)
+#define IPIER_MODF (1 0)
+
+/* Softare Reset Register (srr), [1] p9, [2] p8 */
+#define SRR_RESET_CODE 0x000A
+
+/* SPI Control Register (spicr), [1] p9, [2] p8 */
+#define SPICR_LSB_FIRST(1 9)
+#define SPICR_MASTER_INHIBIT (1 8)
+#define SPICR_MANUAL_SS(1 7)
+#define SPICR_RXFIFO_RESEST(1 6)
+#define SPICR_TXFIFO_RESEST(1 5)
+#define SPICR_CPHA (1 4)
+#define SPICR_CPOL (1 3)
+#define SPICR_MASTER_MODE (1 2)
+#define SPICR_SPE (1 1)
+#define SPICR_LOOP (1 0)
+
+/* SPI Status Register (spisr), [1] p11, [2] p10 */
+#define SPISR_SLAVE_MODE_SELECT(1 5)
+#define SPISR_MODF (1 4)
+#define SPISR_TX_FULL (1 3)
+#define SPISR_TX_EMPTY (1 2)
+#define SPISR_RX_FULL (1 1)
+#define SPISR_RX_EMPTY (1 0)
+
+/* SPI Data Transmit Register (spidtr), [1] p12, [2] p12 */
+#define SPIDTR_8BIT_MASK (0xff 0)
+#define SPIDTR_16BIT_MASK (0x 0)
+#define SPIDTR_32BIT_MASK (0x 0)
+
+/* SPI Data Receive Register (spidrr), [1] p12, [2] p12 */
+#define SPIDRR_8BIT_MASK (0xff 0)
+#define SPIDRR_16BIT_MASK (0x 0)
+#define SPIDRR_32BIT_MASK (0x 0)
+
+/* SPI Slave Select Register (spissr), [1] p13, [2] p13 */
+#define SPISSR_MASK(cs)(1 (cs))
+#define SPISSR_ACT(cs) ~SPISSR_MASK(cs)
+#define SPISSR_OFF ~0UL
+
+/* SPI Transmit FIFO Occupancy Register (spitfor), [1] p13, [2] p14 */
+#define SPITFOR_OCYVAL_POS 0
+#define SPITFOR_OCYVAL_MASK(0xf SPITFOR_OCYVAL_POS)
+
+/* SPI Receive FIFO Occupancy Register (spirfor), [1] p14, [2] p14 */
+#define SPIRFOR_OCYVAL_POS 0
+#define SPIRFOR_OCYVAL_MASK(0xf SPIRFOR_OCYVAL_POS)
+
+/* SPI Software Reset Register (ssr) */
+#define SPISSR_RESET_VALUE 0x0a
+
+struct xilinx_spi_slave {
+ struct spi_slave slave;
+ struct xilinx_spi_reg *regs;
+ unsigned int freq;
+ unsigned int mode;
+};
+
+static inline struct xilinx_spi_slave *to_xilinx_spi_slave(
+ struct spi_slave *slave)
+{
+ return container_of(slave, struct xilinx_spi_slave, slave);
+}
#ifndef CONFIG_SYS_XILINX_SPI_LIST
[U-Boot] [U-Boot PATCH 7/8] spi: davinci_spi: Move header code to driver
Move the header code into driver for more readable and
easy to access it.
Signed-off-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com
Cc: Rex Chang rch...@ti.com
Cc: Murali Karicheri m-kariche...@ti.com
---
drivers/spi/davinci_spi.c | 110 -
drivers/spi/davinci_spi.h | 121 --
2 files changed, 109 insertions(+), 122 deletions(-)
delete mode 100644 drivers/spi/davinci_spi.h
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index bf18362..e0ecf99 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -13,7 +13,115 @@
#include malloc.h
#include asm/io.h
#include asm/arch/hardware.h
-#include davinci_spi.h
+
+struct davinci_spi_regs {
+ dv_reg gcr0; /* 0x00 */
+ dv_reg gcr1; /* 0x04 */
+ dv_reg int0; /* 0x08 */
+ dv_reg lvl;/* 0x0c */
+ dv_reg flg;/* 0x10 */
+ dv_reg pc0;/* 0x14 */
+ dv_reg pc1;/* 0x18 */
+ dv_reg pc2;/* 0x1c */
+ dv_reg pc3;/* 0x20 */
+ dv_reg pc4;/* 0x24 */
+ dv_reg pc5;/* 0x28 */
+ dv_reg rsvd[3];
+ dv_reg dat0; /* 0x38 */
+ dv_reg dat1; /* 0x3c */
+ dv_reg buf;/* 0x40 */
+ dv_reg emu;/* 0x44 */
+ dv_reg delay; /* 0x48 */
+ dv_reg def;/* 0x4c */
+ dv_reg fmt0; /* 0x50 */
+ dv_reg fmt1; /* 0x54 */
+ dv_reg fmt2; /* 0x58 */
+ dv_reg fmt3; /* 0x5c */
+ dv_reg intvec0;/* 0x60 */
+ dv_reg intvec1;/* 0x64 */
+};
+
+#define BIT(x) (1 (x))
+
+/* SPIGCR0 */
+#define SPIGCR0_SPIENA_MASK0x1
+#define SPIGCR0_SPIRST_MASK0x0
+
+/* SPIGCR0 */
+#define SPIGCR1_CLKMOD_MASKBIT(1)
+#define SPIGCR1_MASTER_MASKBIT(0)
+#define SPIGCR1_SPIENA_MASKBIT(24)
+
+/* SPIPC0 */
+#define SPIPC0_DIFUN_MASK BIT(11) /* SIMO */
+#define SPIPC0_DOFUN_MASK BIT(10) /* SOMI */
+#define SPIPC0_CLKFUN_MASK BIT(9) /* CLK */
+#define SPIPC0_EN0FUN_MASK BIT(0)
+
+/* SPIFMT0 */
+#define SPIFMT_SHIFTDIR_SHIFT 20
+#define SPIFMT_POLARITY_SHIFT 17
+#define SPIFMT_PHASE_SHIFT 16
+#define SPIFMT_PRESCALE_SHIFT 8
+
+/* SPIDAT1 */
+#define SPIDAT1_CSHOLD_SHIFT 28
+#define SPIDAT1_CSNR_SHIFT 16
+
+/* SPIDELAY */
+#define SPI_C2TDELAY_SHIFT 24
+#define SPI_T2CDELAY_SHIFT 16
+
+/* SPIBUF */
+#define SPIBUF_RXEMPTY_MASKBIT(31)
+#define SPIBUF_TXFULL_MASK BIT(29)
+
+/* SPIDEF */
+#define SPIDEF_CSDEF0_MASK BIT(0)
+
+#define SPI0_BUS 0
+#define SPI0_BASE CONFIG_SYS_SPI_BASE
+/*
+ * Define default SPI0_NUM_CS as 1 for existing platforms that uses this
+ * driver. Platform can configure number of CS using CONFIG_SYS_SPI0_NUM_CS
+ * if more than one CS is supported and by defining CONFIG_SYS_SPI0.
+ */
+#ifndef CONFIG_SYS_SPI0
+#define SPI0_NUM_CS1
+#else
+#define SPI0_NUM_CSCONFIG_SYS_SPI0_NUM_CS
+#endif
+
+/*
+ * define CONFIG_SYS_SPI1 when platform has spi-1 device (bus #1) and
+ * CONFIG_SYS_SPI1_NUM_CS defines number of CS on this bus
+ */
+#ifdef CONFIG_SYS_SPI1
+#define SPI1_BUS 1
+#define SPI1_NUM_CSCONFIG_SYS_SPI1_NUM_CS
+#define SPI1_BASE CONFIG_SYS_SPI1_BASE
+#endif
+
+/*
+ * define CONFIG_SYS_SPI2 when platform has spi-2 device (bus #2) and
+ * CONFIG_SYS_SPI2_NUM_CS defines number of CS on this bus
+ */
+#ifdef CONFIG_SYS_SPI2
+#define SPI2_BUS 2
+#define SPI2_NUM_CSCONFIG_SYS_SPI2_NUM_CS
+#define SPI2_BASE CONFIG_SYS_SPI2_BASE
+#endif
+
+struct davinci_spi_slave {
+ struct spi_slave slave;
+ struct davinci_spi_regs *regs;
+ unsigned int freq;
+};
+
+static inline struct davinci_spi_slave *to_davinci_spi(struct spi_slave *slave)
+{
+ return container_of(slave, struct davinci_spi_slave, slave);
+}
void spi_init()
{
diff --git a/drivers/spi/davinci_spi.h b/drivers/spi/davinci_spi.h
deleted file mode 100644
index d4612d3..000
--- a/drivers/spi/davinci_spi.h
+++ /dev/null
@@ -1,121 +0,0 @@
-/*
- * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
- *
- * Register definitions for the DaVinci SPI Controller
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#ifndef _DAVINCI_SPI_H_
-#define _DAVINCI_SPI_H_
-
-struct davinci_spi_regs {
- dv_reg gcr0; /* 0x00 */
- dv_reg gcr1; /* 0x04 */
- dv_reg int0; /* 0x08 */
- dv_reg lvl;/* 0x0c */
- dv_reg flg;/* 0x10 */
- dv_reg pc0;/* 0x14 */
- dv_reg pc1;/* 0x18 */
- dv_reg pc2;/* 0x1c */
- dv_reg pc3;/* 0x20
[U-Boot] [U-Boot PATCH 0/8] spi: Driver cleanup series
Driver cleanup series list - Minor code cleanups - tab space, comments etc - Zapping unneeded drivers - Moving header code into driver .c files for easy accessing - Arranged the driver code format to [1] for more readable [1] http://lists.denx.de/pipermail/u-boot/2013-August/160473.html thanks! -- Jagan. Jagannadha Sutradharudu Teki (8): sf: Adjust tab space's spi: Zap andes_spi driver spi: Zap ftssp010_spi driver spi: Zap oc_tiny_spi driver spi: xilinx_spi: Move header code to driver spi: xilinx_spi: Driver clean-up spi: davinci_spi: Move header code to driver spi: davinci_spi: Driver cleanup drivers/mtd/spi/sf_internal.h | 20 +- drivers/spi/Makefile | 3 - drivers/spi/andes_spi.c | 284 drivers/spi/andes_spi.h | 115 -- drivers/spi/davinci_spi.c | 369 --- drivers/spi/davinci_spi.h | 121 -- drivers/spi/ftssp010_spi.c| 498 -- drivers/spi/oc_tiny_spi.c | 245 - drivers/spi/xilinx_spi.c | 153 + drivers/spi/xilinx_spi.h | 138 include/spi.h | 12 +- include/spi_flash.h | 8 +- 12 files changed, 367 insertions(+), 1599 deletions(-) delete mode 100644 drivers/spi/andes_spi.c delete mode 100644 drivers/spi/andes_spi.h delete mode 100644 drivers/spi/davinci_spi.h delete mode 100644 drivers/spi/ftssp010_spi.c delete mode 100644 drivers/spi/oc_tiny_spi.c delete mode 100644 drivers/spi/xilinx_spi.h -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [U-Boot PATCH 1/8] sf: Adjust tab space's
Tab space's got adjusted on relevent files.
Signed-off-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com
---
drivers/mtd/spi/sf_internal.h | 20 ++--
include/spi.h | 12 ++--
include/spi_flash.h | 8
3 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 785f7a9..58007de 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -31,9 +31,9 @@ enum spi_read_cmds {
};
/* Normal - Extended - Full command set */
-#define RD_NORM(ARRAY_SLOW | ARRAY_FAST)
-#define RD_EXTN(RD_NORM | DUAL_OUTPUT_FAST | DUAL_IO_FAST)
-#define RD_FULL(RD_EXTN | QUAD_OUTPUT_FAST | QUAD_IO_FAST)
+#define RD_NORM(ARRAY_SLOW | ARRAY_FAST)
+#define RD_EXTN(RD_NORM | DUAL_OUTPUT_FAST | DUAL_IO_FAST)
+#define RD_FULL(RD_EXTN | QUAD_OUTPUT_FAST | QUAD_IO_FAST)
/* sf param flags */
enum {
@@ -67,12 +67,12 @@ enum {
#define CMD_WRITE_STATUS 0x01
#define CMD_PAGE_PROGRAM 0x02
#define CMD_WRITE_DISABLE 0x04
-#define CMD_READ_STATUS0x05
+#define CMD_READ_STATUS0x05
#define CMD_QUAD_PAGE_PROGRAM 0x32
#define CMD_READ_STATUS1 0x35
#define CMD_WRITE_ENABLE 0x06
-#define CMD_READ_CONFIG0x35
-#define CMD_FLAG_STATUS0x70
+#define CMD_READ_CONFIG0x35
+#define CMD_FLAG_STATUS0x70
/* Read commands */
#define CMD_READ_ARRAY_SLOW0x03
@@ -94,7 +94,7 @@ enum {
/* Common status */
#define STATUS_WIP (1 0)
#define STATUS_QEB_WINSPAN (1 1)
-#define STATUS_QEB_MXIC(1 6)
+#define STATUS_QEB_MXIC(1 6)
#define STATUS_PEC (1 7)
#ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
@@ -103,13 +103,13 @@ enum {
/* Flash timeout values */
#define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
-#define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ)
+#define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ)
#define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ)
/* SST specific */
#ifdef CONFIG_SPI_FLASH_SST
# define CMD_SST_BP0x02/* Byte Program */
-# define CMD_SST_AAI_WP0xAD/* Auto Address Incr Word Program */
+# define CMD_SST_AAI_WP0xAD/* Auto Address Incr Word
Program */
int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
const void *buf);
@@ -124,7 +124,7 @@ int sst_write_bp(struct spi_flash *flash, u32 offset,
size_t len,
* @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
* @ext_jedec: Device ext_jedec ID
* @sector_size: Sector size of this device
- * @nr_sectors:No.of sectors on this device
+ * @nr_sectors:No.of sectors on this device
* @e_rd_cmd: Enum list for read commands
* @flags: Important param, for flash specific behaviour
*/
diff --git a/include/spi.h b/include/spi.h
index 7829063..44abe68 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -30,7 +30,7 @@
#define SPI_XFER_MMAP 0x08/* Memory Mapped start */
#define SPI_XFER_MMAP_END 0x10/* Memory Mapped End */
#define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END)
-#define SPI_XFER_U_PAGE(1 5)
+#define SPI_XFER_U_PAGE (1 5)
/* SPI TX operation modes */
#define SPI_OPM_TX_QPP (1 0)
@@ -43,18 +43,18 @@
#define SPI_OPM_RX_DIO (1 3)
#define SPI_OPM_RX_QOF (1 4)
#define SPI_OPM_RX_QIOF(1 5)
-#define SPI_OPM_RX_EXTN(SPI_OPM_RX_AS | SPI_OPM_RX_AF |
SPI_OPM_RX_DOUT | \
- SPI_OPM_RX_DIO | SPI_OPM_RX_QOF | \
- SPI_OPM_RX_QIOF)
+#define SPI_OPM_RX_EXTN(SPI_OPM_RX_AS | SPI_OPM_RX_AF | \
+ SPI_OPM_RX_DOUT | SPI_OPM_RX_DIO | \
+ SPI_OPM_RX_QOF | SPI_OPM_RX_QIOF)
/* SPI bus connection options - see enum spi_dual_flash */
#define SPI_CONN_DUAL_SHARED (1 0)
-#define SPI_CONN_DUAL_SEPARATED(1 1)
+#define SPI_CONN_DUAL_SEPARATED (1 1)
/* Header byte that marks the start of the message */
#define SPI_PREAMBLE_END_BYTE 0xec
-#define SPI_DEFAULT_WORDLEN 8
+#define SPI_DEFAULT_WORDLEN 8
#ifdef CONFIG_DM_SPI
/* TODO(s...@chromium.org): Remove this and use max_hz from struct spi_slave */
diff --git a/include/spi_flash.h b/include/spi_flash.h
index 4791b94..481b4dd 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -38,12 +38,12 @@ struct spi_slave;
*
* @spi: SPI slave
* @name: Name of SPI flash
- * @dual_flash:Indicates dual flash
[U-Boot] [PATCH 3/3] test: dm: eth: Skip timeouts on ping tests
Indicate to the emulated sandbox Ethernet driver when we expect a timeout and tell it to leap forward. Signed-off-by: Joe Hershberger joe.hershber...@ni.com --- test/dm/eth.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/test/dm/eth.c b/test/dm/eth.c index 4891f3a..196eba8 100644 --- a/test/dm/eth.c +++ b/test/dm/eth.c @@ -135,6 +135,7 @@ static int dm_test_net_retry(struct dm_test_state *dms) sandbox_eth_disable_response(1, true); setenv(ethact, eth@10004000); setenv(netretry, yes); + sandbox_eth_skip_timeout(); ut_assertok(net_loop(PING)); ut_asserteq_str(eth@10002000, getenv(ethact)); @@ -144,6 +145,7 @@ static int dm_test_net_retry(struct dm_test_state *dms) */ setenv(ethact, eth@10004000); setenv(netretry, no); + sandbox_eth_skip_timeout(); ut_asserteq(-ETIMEDOUT, net_loop(PING)); ut_asserteq_str(eth@10004000, getenv(ethact)); -- 1.7.11.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/3] sandbox: eth: Add a function to skip ping timeouts
When called, the next call to receive will trigger a 10-second leap
forward in time to avoid waiting for time to pass when tests are
evaluating timeout behavior.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
arch/sandbox/include/asm/eth.h | 2 ++
drivers/net/sandbox.c | 17 +
2 files changed, 19 insertions(+)
diff --git a/arch/sandbox/include/asm/eth.h b/arch/sandbox/include/asm/eth.h
index 4b79ede..88804fb 100644
--- a/arch/sandbox/include/asm/eth.h
+++ b/arch/sandbox/include/asm/eth.h
@@ -12,4 +12,6 @@
void sandbox_eth_disable_response(int index, bool disable);
+void sandbox_eth_skip_timeout(void);
+
#endif /* __ETH_H */
diff --git a/drivers/net/sandbox.c b/drivers/net/sandbox.c
index e239ff4..4e083d3 100644
--- a/drivers/net/sandbox.c
+++ b/drivers/net/sandbox.c
@@ -11,6 +11,7 @@
#include dm.h
#include malloc.h
#include net.h
+#include asm/test.h
DECLARE_GLOBAL_DATA_PTR;
@@ -30,6 +31,7 @@ struct eth_sandbox_priv {
};
static bool disabled[8] = {false};
+static bool skip_timeout;
/*
* sandbox_eth_disable_response()
@@ -42,6 +44,16 @@ void sandbox_eth_disable_response(int index, bool disable)
disabled[index] = disable;
}
+/*
+ * sandbox_eth_skip_timeout()
+ *
+ * When the first packet read is attempted, fast-forward time
+ */
+void sandbox_eth_skip_timeout(void)
+{
+ skip_timeout = true;
+}
+
static int sb_eth_start(struct udevice *dev)
{
struct eth_sandbox_priv *priv = dev_get_priv(dev);
@@ -144,6 +156,11 @@ static int sb_eth_recv(struct udevice *dev, uchar
**packetp)
{
struct eth_sandbox_priv *priv = dev_get_priv(dev);
+ if (skip_timeout) {
+ sandbox_timer_add_offset(1UL);
+ skip_timeout = false;
+ }
+
if (priv-recv_packet_length) {
int lcl_recv_packet_length = priv-recv_packet_length;
--
1.7.11.5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/3] test: Speed up test timeouts by advancing time
Add support for advancing time in sandbox and make use of the new API to speed up the existing dm/eth tests that wait for timeouts. This series is based on u-boot-dm/test-working Joe Hershberger (3): sandbox: Add test function to advance time sandbox: eth: Add a function to skip ping timeouts test: dm: eth: Skip timeouts on ping tests arch/sandbox/cpu/cpu.c | 5 - arch/sandbox/include/asm/eth.h | 2 ++ arch/sandbox/include/asm/test.h | 8 board/sandbox/sandbox.c | 11 ++- drivers/net/sandbox.c | 17 + test/dm/eth.c | 2 ++ 6 files changed, 39 insertions(+), 6 deletions(-) -- 1.7.11.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/3] sandbox: Add test function to advance time
Add a function that maintains an offset to include in the system timer
values returned from the lib/time.c APIs.
This will allow timeouts to be skipped instantly in tests
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
arch/sandbox/cpu/cpu.c | 5 -
arch/sandbox/include/asm/test.h | 8
board/sandbox/sandbox.c | 11 ++-
3 files changed, 18 insertions(+), 6 deletions(-)
diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c
index 007ae86..6c3f4b4 100644
--- a/arch/sandbox/cpu/cpu.c
+++ b/arch/sandbox/cpu/cpu.c
@@ -44,11 +44,6 @@ void __udelay(unsigned long usec)
os_usleep(usec);
}
-unsigned long __attribute__((no_instrument_function)) timer_get_us(void)
-{
- return os_get_nsec() / 1000;
-}
-
int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
{
if (flag (BOOTM_STATE_OS_GO | BOOTM_STATE_OS_FAKE_GO)) {
diff --git a/arch/sandbox/include/asm/test.h b/arch/sandbox/include/asm/test.h
index 8e490e9..296589c 100644
--- a/arch/sandbox/include/asm/test.h
+++ b/arch/sandbox/include/asm/test.h
@@ -28,4 +28,12 @@ void sandbox_i2c_eeprom_set_test_mode(struct udevice *dev,
void sandbox_i2c_eeprom_set_offset_len(struct udevice *dev, int offset_len);
+/*
+ * sandbox_timer_add_offset()
+ *
+ * Allow tests to add to the time reported through lib/time.c functions
+ * offset: number of milliseconds to advance the system time
+ */
+void sandbox_timer_add_offset(unsigned long offset);
+
#endif
diff --git a/board/sandbox/sandbox.c b/board/sandbox/sandbox.c
index 2227f1c..80eaa63 100644
--- a/board/sandbox/sandbox.c
+++ b/board/sandbox/sandbox.c
@@ -7,6 +7,7 @@
#include cros_ec.h
#include dm.h
#include os.h
+#include asm/test.h
#include asm/u-boot-sandbox.h
/*
@@ -25,9 +26,17 @@ void flush_cache(unsigned long start, unsigned long size)
{
}
+/* system timer offset in ms */
+static unsigned long sandbox_timer_offset;
+
+void sandbox_timer_add_offset(unsigned long offset)
+{
+ sandbox_timer_offset += offset;
+}
+
unsigned long timer_read_counter(void)
{
- return os_get_nsec() / 1000;
+ return os_get_nsec() / 1000 + sandbox_timer_offset * 1000;
}
int dram_init(void)
--
1.7.11.5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/6] common/cmd_boot: keep ARM v7M in thumb mode during do_go_exec()
On Tue, Apr 21, 2015 at 01:05:24PM -0500, Felipe Balbi wrote: On Tue, Apr 21, 2015 at 02:01:31PM -0400, Matt Porter wrote: On Tue, Apr 21, 2015 at 12:47:24PM -0500, Felipe Balbi wrote: On Tue, Apr 21, 2015 at 01:36:54PM -0400, Matt Porter wrote: On ARM v7M, the processor will return to ARM mode when executing a blx instruction with bit 0 of the address == 0. Always set it but that's what the 'x' is for, right ? eXchange the CPU mode. Yes. to 1 to stay in thumb mode. Signed-off-by: Matt Porter mpor...@konsulko.com --- common/cmd_boot.c | 4 1 file changed, 4 insertions(+) diff --git a/common/cmd_boot.c b/common/cmd_boot.c index 8f2e070..20ce652 100644 --- a/common/cmd_boot.c +++ b/common/cmd_boot.c @@ -38,6 +38,10 @@ static int do_go(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) * pass address parameter as argv[0] (aka command name), * and all remaining args */ +#ifdef CONFIG_CPU_V7M + /* For ARM V7M, set bit zero to stay in Thumb mode */ + addr++; +#endif what if we were in ARM state when we reached this point ? You're now telling CPU to always switch to Thumb. Is this really what we want ? We have no ARM state on this core so that's not possible. From ARM's instruction manual: The BX and BLX instructions can change the processor state from ARM to Thumb, or from Thumb to ARM. BLX label always changes the state. BX Rm and BLX Rm derive the target state from bit[0] of Rm: if bit[0] of Rm is 0, the processor changes to, or remains in, ARM state if bit[0] of Rm is 1, the processor changes to, or remains in, Thumb state. Correct. The last statement is why this patch exists. There is no ARM mode on M3, we immediately fault. Having bit[0]=0 for BX/BLX is not permitted on V7M...something not covered in the generic description of these instructions. it just seems weird that bit0 wouldn't just be assume 1 by the core itself. I suppose as a consequence we can't use blx label with v7m either ? :-s At issue is that the code really reads like this (expanding the functions a little bit: printf (## Starting application at 0x%08lX ...\n, addr); rc = (void *)addr(argc - 1, argv + 1); So the compiler translates this as do what I say and generates a branch to whatever addr is. If people really feel strongly about it being too wierd to do addr |= 1 in the common code, do_go_exec is a weak function and we can put something into arch/arm/lib/ (new file) that provides a do_go_exec for Cortex-M and that ensures that we have the right bit set for the branch instruction that will be generated. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v7 17/17] jetson-tk1: Add PSCI configuration options and reserve secure code
On Tue, 2015-04-21 at 07:18 +0200, Jan Kiszka wrote: From: Ian Campbell i...@hellion.org.uk The secure world code is relocated to the MB just below the top of 4G, we reserve it in the FDT (by setting CONFIG_ARMV7_SECURE_RESERVE_SIZE) but it is not protected in h/w. See next patch. Next patch, but this is the last one? Was it reordered earlier in the series or is it not yet included here? Signed-off-by: Ian Campbell i...@hellion.org.uk Signed-off-by: Jan Kiszka jan.kis...@siemens.com Reviewed-by: Tom Rini tr...@konsulko.com Reviewed-by: Thierry Reding tred...@nvidia.com Tested-by: Thierry Reding tred...@nvidia.com Tested-by: Ian Campbell i...@hellion.org.uk --- arch/arm/mach-tegra/tegra124/Kconfig | 2 ++ include/configs/jetson-tk1.h | 5 + 2 files changed, 7 insertions(+) diff --git a/arch/arm/mach-tegra/tegra124/Kconfig b/arch/arm/mach-tegra/tegra124/Kconfig index 88f627c..5114299 100644 --- a/arch/arm/mach-tegra/tegra124/Kconfig +++ b/arch/arm/mach-tegra/tegra124/Kconfig @@ -5,6 +5,8 @@ choice config TARGET_JETSON_TK1 bool NVIDIA Tegra124 Jetson TK1 board + select CPU_V7_HAS_NONSEC if !SPL_BUILD + select CPU_V7_HAS_VIRT if !SPL_BUILD config TARGET_NYAN_BIG bool Google/NVIDIA Nyan-big Chrombook diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index 8c016b7..aeafbd5 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -79,4 +79,9 @@ #include tegra-common-usb-gadget.h #include tegra-common-post.h +#define CONFIG_ARMV7_PSCI1 +/* Reserve top 1M for secure RAM */ +#define CONFIG_ARMV7_SECURE_BASE 0xfff0 +#define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x0010 + #endif /* __CONFIG_H */ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/6] common/cmd_boot: keep ARM v7M in thumb mode during do_go_exec()
On Tue, Apr 21, 2015 at 12:54:26PM -0500, Felipe Balbi wrote: On Tue, Apr 21, 2015 at 12:47:24PM -0500, Felipe Balbi wrote: On Tue, Apr 21, 2015 at 01:36:54PM -0400, Matt Porter wrote: On ARM v7M, the processor will return to ARM mode when executing a blx instruction with bit 0 of the address == 0. Always set it but that's what the 'x' is for, right ? eXchange the CPU mode. to 1 to stay in thumb mode. Signed-off-by: Matt Porter mpor...@konsulko.com --- common/cmd_boot.c | 4 1 file changed, 4 insertions(+) diff --git a/common/cmd_boot.c b/common/cmd_boot.c index 8f2e070..20ce652 100644 --- a/common/cmd_boot.c +++ b/common/cmd_boot.c @@ -38,6 +38,10 @@ static int do_go(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) * pass address parameter as argv[0] (aka command name), * and all remaining args */ +#ifdef CONFIG_CPU_V7M + /* For ARM V7M, set bit zero to stay in Thumb mode */ + addr++; +#endif what if we were in ARM state when we reached this point ? You're now telling CPU to always switch to Thumb. Is this really what we want ? From ARM's instruction manual: The BX and BLX instructions can change the processor state from ARM to Thumb, or from Thumb to ARM. BLX label always changes the state. BX Rm and BLX Rm derive the target state from bit[0] of Rm: if bit[0] of Rm is 0, the processor changes to, or remains in, ARM state if bit[0] of Rm is 1, the processor changes to, or remains in, Thumb state. oh wait, this is cortex-m, it's supposed to be thumb2 only, why do we even need that bit ? seems like it must be set for cortex-m, but then shouldn't this be done by GCC ? Are we, perhaps, using wrong GCC arguments when building for cortex-m ? -- balbi signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/6] ARM: socfpga: refactoring, move files to arch/arm/mach-socfpga
On Tuesday, April 21, 2015 at 01:38:17 PM, Masahiro Yamada wrote: Changes in v2: - Rebase on the top of u-boot-socfpga/master (commit b284d268a) Masahiro Yamada (6): ARM: socfpga: do not add board directory to header search path ARM: socfpga: remove redundant config.mk ARM: socfpga: move board select into mach-socfpga/Kconfig ARM: socfpga: move SoC sources to mach-socfpga ARM: socfpga: move SoC headers to mach-socfpga/include/mach ARM: socfpga: abolish CONFIG_SOCFPGA All applied, thank you very much! Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Question regarding MLO size
On Tue, Apr 21, 2015 at 11:56:05AM -0700, Arun Bharadwaj wrote: Hi all, I am using a Gumstix Overo (omap3), running the u-boot v2015.04 and have the following issue: I have made a few modifications to the misc_init_r() routine in the board/overo/overo.c file; the resulting MLO file is 61,220 bytes and the console hangs at reading u-boot.img during the boot process. In the absence of those changes to the misc_init_r() the MLO size is 61,212 bytes and the u-boot is loaded without any issues. misc_init_r() is not even called from any SPL related code, so I am not sure why changes to this routine is causing MLO size to change. I verified this by doing the following: I put a few debug statements in misc_init_r() and rebuilt both u-boot.img and MLO. First, I replaced only the new MLO in my target and the debug statement did not appear while it appeared when I replaced the u-boot.img in the target. If anybody has an idea what is going on, it would be very helpful. Thanks! You're running into https://gcc.gnu.org/bugzilla/show_bug.cgi?id=54303 which is that even if the function is being garbage collected the strings are not. Sadly it may make sense to move some SPL-only functions out into a file that is only built/linked for SPL due to this bug. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/6] common/cmd_boot: keep ARM v7M in thumb mode during do_go_exec()
On Tue, Apr 21, 2015 at 02:01:31PM -0400, Matt Porter wrote: On Tue, Apr 21, 2015 at 12:47:24PM -0500, Felipe Balbi wrote: On Tue, Apr 21, 2015 at 01:36:54PM -0400, Matt Porter wrote: On ARM v7M, the processor will return to ARM mode when executing a blx instruction with bit 0 of the address == 0. Always set it but that's what the 'x' is for, right ? eXchange the CPU mode. Yes. to 1 to stay in thumb mode. Signed-off-by: Matt Porter mpor...@konsulko.com --- common/cmd_boot.c | 4 1 file changed, 4 insertions(+) diff --git a/common/cmd_boot.c b/common/cmd_boot.c index 8f2e070..20ce652 100644 --- a/common/cmd_boot.c +++ b/common/cmd_boot.c @@ -38,6 +38,10 @@ static int do_go(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) * pass address parameter as argv[0] (aka command name), * and all remaining args */ +#ifdef CONFIG_CPU_V7M + /* For ARM V7M, set bit zero to stay in Thumb mode */ + addr++; +#endif what if we were in ARM state when we reached this point ? You're now telling CPU to always switch to Thumb. Is this really what we want ? We have no ARM state on this core so that's not possible. From ARM's instruction manual: The BX and BLX instructions can change the processor state from ARM to Thumb, or from Thumb to ARM. BLX label always changes the state. BX Rm and BLX Rm derive the target state from bit[0] of Rm: if bit[0] of Rm is 0, the processor changes to, or remains in, ARM state if bit[0] of Rm is 1, the processor changes to, or remains in, Thumb state. Correct. The last statement is why this patch exists. There is no ARM mode on M3, we immediately fault. Having bit[0]=0 for BX/BLX is not permitted on V7M...something not covered in the generic description of these instructions. it just seems weird that bit0 wouldn't just be assume 1 by the core itself. I suppose as a consequence we can't use blx label with v7m either ? :-s cheers -- balbi signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 9/9] sandbox: add config_distro_defaults and config_distro_bootcmd
Hey Joe, On Mon, 2015-04-20 at 23:31 -0500, Joe Hershberger wrote: Hi Sjoerd, On Mon, Apr 13, 2015 at 3:54 PM, Sjoerd Simons sjoerd.sim...@collabora.co.uk wrote: Make the sandbox setup more generic/examplary by including config_distro_defaults.h and config_distro_bootcmd.h. Among other things this makes it easy to test whether images will boot though with the standard distro bootcmds by running e.g: u-boot -c 'host bind 0 myimage.img ; boot' By default there are 2 target host devices to emulate device with multiple storage devices (e.g. internal (host 0) and external (host 1) and verify that the prioritization and fallbacks do work correctly. Signed-off-by: Sjoerd Simons sjoerd.sim...@collabora.co.uk Reviewed by: Simon Glass s...@chromium.org Acked-by: Simon Glass s...@chromium.org For me this has broken the build of the env target. I get this following error: In file included from /home/joe/u-boot/tools/env/fw_env.c:117: /usr/include/search.h:173: error: expected } before BOOT_TARGET_DEVICES_references_HOST_without_CONFIG_SANDBOX make[2]: *** [tools/env/fw_env.o] Error 1 make[1]: *** [env] Error 2 make: *** [sub-make] Error 2 I haven't looked closely at the header you've added. Any quick thoughts about what's going on? Hrm, the problem seems to be that when running make env CONFIG_SANDBOX isn't defined, so you get the error triggered above. Essentially that error is trying to tell you - You're trying to build a config which will cause your boot environment to have commands not supported by this build.. I haven't dug out what exactly causes this difference in definitions but it does make me wonder whether we should trigger on something more conventional like CONFIG_CMD_HOST (similar to e.g. CONFIG_CMD_MMC) rather then CONFIG_SANDBOX -- Sjoerd Simons sjoerd.sim...@collabora.co.uk Collabora Ltd. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] spi flash: fix trivial problems
Fix typos and too big #ifdef.
Signed-off-by: Pavel Machek pa...@denx.de
diff --git a/include/spi_flash.h b/include/spi_flash.h
index 5913b39..5e94e41 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -62,11 +62,9 @@ struct spi_slave;
* return 0 - Success, 1 - Failure
*/
struct spi_flash {
-#ifdef CONFIG_DM_SPI_FLASH
struct spi_slave *spi;
+#ifdef CONFIG_DM_SPI_FLASH
struct udevice *dev;
-#else
- struct spi_slave *spi;
#endif
const char *name;
u8 dual_flash;
@@ -91,13 +89,13 @@ struct spi_flash {
#ifndef CONFIG_DM_SPI_FLASH
/*
* These are not strictly needed for driver model, but keep them here
-* whilt the transition is in progress.
+* while the transition is in progress.
*
* Normally each driver would provide its own operations, but for
* SPI flash most chips use the same algorithms. One approach is
* to create a 'common' SPI flash device which knows how to talk
* to most devices, and then allow other drivers to be used instead
-* if requird, perhaps with a way of scanning through the list to
+* if required, perhaps with a way of scanning through the list to
* find the driver that matches the device.
*/
int (*read)(struct spi_flash *flash, u32 offset, size_t len, void *buf);
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures)
http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] spi flash: fix trivial problems
On Tuesday, April 21, 2015 at 10:37:45 AM, Pavel Machek wrote: Fix typos and too big #ifdef. Signed-off-by: Pavel Machek pa...@denx.de Reviewed-by: Marek Vasut ma...@denx.de Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [patch] socfpga: move configuration options to config file
2015-04-21 6:32 GMT+09:00 Marek Vasut ma...@denx.de: On Monday, April 20, 2015 at 10:27:02 PM, Pavel Machek wrote: On Mon 2015-04-20 21:23:23, Marek Vasut wrote: On Monday, April 20, 2015 at 02:30:48 PM, Pavel Machek wrote: Setting configuration options in header file leads to incosistency between .config user sees, and .config he has. What is worse, a lot of compile warnings is presented for any such config option user sets in .config. Can you please elaborate on such warnings ? Lets remove CONFIG_CMD_RUN from .config, then select it: run (CMD_RUN) [N/y/?] (NEW) y Now you warning for most C files: CC arch/arm/lib/asm-offsets.s In file included from include/configs/socfpga_cyclone5.h:16:0, from include/config.h:5, from include/common.h:18, from arch/arm/lib/asm-offsets.c:15: include/config_cmd_default.h:38:0: warning: CONFIG_CMD_RUN redefined [enabled by default] #define CONFIG_CMD_RUN /* run command in env variable */ ^ In file included from ././include/linux/kconfig.h:4:0, from command-line:0: include/generated/autoconf.h:35:0: note: this is That meant CONFIG_CMD_RUN is defined by default, yes? In which case, this patch would just paper over some bug (?) instead of fixing the root cause ? The correct fix would probably be to zap those macros, which are defined by default from the socfpga_cyclone5.h file, no ? We usually define boolean macros without values, like #define CONFIG_CMD_ASKENV #define CONFIG_CMD_BOOTZ #define CONFIG_CMD_CACHE On the other hand, Kconfig define boolean macros as 1 (see include/generated/autoconf.h) That is why the compiler spits tons of warnings. -- Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] spi and block bits
On 17 April 2015 at 12:45, Michael Walle mich...@walle.cc wrote: Am 2015-04-16 20:32, schrieb Jagan Teki: On 9 February 2015 at 04:57, Michael Walle mich...@walle.cc wrote: Hi there, I stumbled across a situation where the SPI flash on my board was write protected and i could not unlock it in the bootloader. This is especially unfortunate because the recovery mechanism relies on the bootloader to be able to erase the environment. Which flash vendor it is? seems like there is a hardware write protected mechanism in ST MICRON flashes. it is a st micron. (see include/configs/lsxl.h) Please refer that, may be this looks similar to that W#/Vpp CONFIG_SYS_SPI_ST_ENABLE_WP_PIN But it isn't related to that. My point was, if linux enables the lock bits, there is no way you can write to the flash in the bootloader anymore. Because it is not possible to clear these bits in u-boot. If you have a macronix or an ST flash the block protection bits are cleared on probe. see sf_probe.c: /* Flash powers up read-only, so clear BP# bits */ #if defined(CONFIG_SPI_FLASH_ATMEL) || \ defined(CONFIG_SPI_FLASH_MACRONIX) || \ defined(CONFIG_SPI_FLASH_SST) spi_flash_cmd_write_status(flash, 0); #endif So are you saying clearing BP# bits should also required for Micron as you need to access it on bootloader? Although as the comment says, it is because these chips power up in read-only state by default. In my case, linux would set these bits. To be more precise, the fw_setenv will leave the flash write protected and i cannot modify the environment in the bootloader anymore. I couldn't understand your point can you elaborate, if clearing BP# required for Micron how could it accessed in Linux? thanks! -- Jagan. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 3/5] ARM: integrator: split board select into AP/CP select and CM select
Select integrator boards by the combination of platform select (AP/CP) and core module select (CM720T, CM920T, ...). This allows us to remove CONFIG_SYS_EXTRA_OPTIONS and make Kconfig much cleaner. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Cc: Linus Walleij linus.wall...@linaro.org --- Changes in v2: None arch/arm/mach-integrator/Kconfig| 57 +++-- configs/integratorap_cm720t_defconfig | 4 +-- configs/integratorap_cm920t_defconfig | 4 +-- configs/integratorap_cm926ejs_defconfig | 4 +-- configs/integratorap_cm946es_defconfig | 4 +-- configs/integratorcp_cm1136_defconfig | 4 +-- configs/integratorcp_cm920t_defconfig | 4 +-- configs/integratorcp_cm926ejs_defconfig | 4 +-- configs/integratorcp_cm946es_defconfig | 4 +-- 9 files changed, 41 insertions(+), 48 deletions(-) diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig index 4406399..6794660 100644 --- a/arch/arm/mach-integrator/Kconfig +++ b/arch/arm/mach-integrator/Kconfig @@ -2,40 +2,39 @@ menu Integrator Options depends on ARCH_INTEGRATOR choice - prompt ARM Ltd. Integrator board select + prompt Integrator platform select -config TARGET_INTEGRATORAP_CM720T - bool Support integratorap_cm720t - select CPU_ARM720T +config ARCH_INTEGRATOR_AP + bool Support Integrator/AP platform -config TARGET_INTEGRATORAP_CM920T - bool Support integratorap_cm920t - select CPU_ARM920T +config ARCH_INTEGRATOR_CP + bool Support Integrator/CP platform -config TARGET_INTEGRATORCP_CM920T - bool Support integratorcp_cm920t - select CPU_ARM920T +endchoice -config TARGET_INTEGRATORAP_CM926EJS - bool Support integratorap_cm926ejs - select CPU_ARM926EJS +choice + prompt Integrator core module select -config TARGET_INTEGRATORCP_CM926EJS - bool Support integratorcp_cm926ejs - select CPU_ARM926EJS +config CM720T + bool Core Module for ARM720T + select CPU_ARM720T -config TARGET_INTEGRATORCP_CM1136 - bool Support integratorcp_cm1136 - select CPU_ARM1136 +config CM920T + bool Core Module for ARM920T + select CPU_ARM920T -config TARGET_INTEGRATORAP_CM946ES - bool Support integratorap_cm946es - select CPU_ARM946ES +config CM926EJ_S + bool Core Module for ARM926EJ-STM + select CPU_ARM926EJS -config TARGET_INTEGRATORCP_CM946ES - bool Support integratorcp_cm946es +config CM946ES + bool Core Module for ARM946E-STM select CPU_ARM946ES +config CM1136 + bool Core Module for ARM1136JF-STM + select CPU_ARM1136 + endchoice config SYS_BOARD @@ -45,13 +44,7 @@ config SYS_VENDOR default armltd config SYS_CONFIG_NAME - default integratorap if TARGET_INTEGRATORAP_CM720T || \ - TARGET_INTEGRATORAP_CM920T || \ - TARGET_INTEGRATORAP_CM926EJS || \ - TARGET_INTEGRATORAP_CM946ES - default integratorcp if TARGET_INTEGRATORCP_CM920T || \ - TARGET_INTEGRATORCP_CM926EJS || \ - TARGET_INTEGRATORCP_CM946ES || \ - TARGET_INTEGRATORCP_CM1136 + default integratorap if ARCH_INTEGRATOR_AP + default integratorcp if ARCH_INTEGRATOR_CP endmenu diff --git a/configs/integratorap_cm720t_defconfig b/configs/integratorap_cm720t_defconfig index 5c15d57..fc0dc67 100644 --- a/configs/integratorap_cm720t_defconfig +++ b/configs/integratorap_cm720t_defconfig @@ -1,4 +1,4 @@ -CONFIG_SYS_EXTRA_OPTIONS=CM720T CONFIG_ARM=y CONFIG_ARCH_INTEGRATOR=y -CONFIG_TARGET_INTEGRATORAP_CM720T=y +CONFIG_ARCH_INTEGRATOR_AP=y +CONFIG_CM720T=y diff --git a/configs/integratorap_cm920t_defconfig b/configs/integratorap_cm920t_defconfig index d2a9a71..eb6afb9 100644 --- a/configs/integratorap_cm920t_defconfig +++ b/configs/integratorap_cm920t_defconfig @@ -1,4 +1,4 @@ -CONFIG_SYS_EXTRA_OPTIONS=CM920T CONFIG_ARM=y CONFIG_ARCH_INTEGRATOR=y -CONFIG_TARGET_INTEGRATORAP_CM920T=y +CONFIG_ARCH_INTEGRATOR_AP=y +CONFIG_CM920T=y diff --git a/configs/integratorap_cm926ejs_defconfig b/configs/integratorap_cm926ejs_defconfig index af4cfa5..8667fcb 100644 --- a/configs/integratorap_cm926ejs_defconfig +++ b/configs/integratorap_cm926ejs_defconfig @@ -1,4 +1,4 @@ -CONFIG_SYS_EXTRA_OPTIONS=CM926EJ_S CONFIG_ARM=y CONFIG_ARCH_INTEGRATOR=y -CONFIG_TARGET_INTEGRATORAP_CM926EJS=y +CONFIG_ARCH_INTEGRATOR_AP=y +CONFIG_CM926EJ_S=y diff --git a/configs/integratorap_cm946es_defconfig b/configs/integratorap_cm946es_defconfig index ee07206..1e8c157 100644 --- a/configs/integratorap_cm946es_defconfig +++ b/configs/integratorap_cm946es_defconfig @@ -1,4 +1,4 @@ -CONFIG_SYS_EXTRA_OPTIONS=CM946ES CONFIG_ARM=y CONFIG_ARCH_INTEGRATOR=y -CONFIG_TARGET_INTEGRATORAP_CM946ES=y +CONFIG_ARCH_INTEGRATOR_AP=y +CONFIG_CM946ES=y diff --git
[U-Boot] [PATCH v2 0/5] ARM: integrator: Kconfig Clean up
Masahiro Yamada (5): ARM: ARM720t: remove empty asm/arch/hardware.h ARM: integrator: move board select into mach-integrator/Kconfig ARM: integrator: split board select into AP/CP select and CM select ARM: integrator: abolish CONFIG_INTEGRATOR ARM: integrator: move CONFIG_ARCH_CINTEGRATOR to Kconfig arch/arm/Kconfig | 38 ++ arch/arm/cpu/arm720t/start.S | 1 - arch/arm/cpu/arm946es/cpu.c | 4 +- arch/arm/include/asm/arch-arm720t/hardware.h | 17 - arch/arm/include/asm/arch-tegra114/hardware.h | 22 -- arch/arm/include/asm/arch-tegra124/hardware.h | 16 arch/arm/include/asm/arch-tegra20/hardware.h | 13 arch/arm/include/asm/arch-tegra30/hardware.h | 22 -- arch/arm/mach-integrator/Kconfig | 54 ++ board/armltd/integrator/Kconfig | 103 -- configs/integratorap_cm720t_defconfig | 5 +- configs/integratorap_cm920t_defconfig | 5 +- configs/integratorap_cm926ejs_defconfig | 5 +- configs/integratorap_cm946es_defconfig| 5 +- configs/integratorcp_cm1136_defconfig | 5 +- configs/integratorcp_cm920t_defconfig | 5 +- configs/integratorcp_cm926ejs_defconfig | 5 +- configs/integratorcp_cm946es_defconfig| 5 +- include/configs/integrator-common.h | 2 - include/configs/integratorap.h| 1 - include/configs/integratorcp.h| 1 - 21 files changed, 85 insertions(+), 249 deletions(-) delete mode 100644 arch/arm/include/asm/arch-arm720t/hardware.h delete mode 100644 arch/arm/include/asm/arch-tegra114/hardware.h delete mode 100644 arch/arm/include/asm/arch-tegra124/hardware.h delete mode 100644 arch/arm/include/asm/arch-tegra20/hardware.h delete mode 100644 arch/arm/include/asm/arch-tegra30/hardware.h create mode 100644 arch/arm/mach-integrator/Kconfig delete mode 100644 board/armltd/integrator/Kconfig -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/5] ARM: ARM720t: remove empty asm/arch/hardware.h
arch/arm/cpu/arm720t/start.S includes asm/arch/hardware.h, but the hardware.h headers of ARM720T boards are all empty. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Cc: Linus Walleij linus.wall...@linaro.org Cc: Stephen Warren swar...@nvidia.com Cc: Tom Warren twar...@nvidia.com --- Changes in v2: None arch/arm/cpu/arm720t/start.S | 1 - arch/arm/include/asm/arch-arm720t/hardware.h | 17 - arch/arm/include/asm/arch-tegra114/hardware.h | 22 -- arch/arm/include/asm/arch-tegra124/hardware.h | 16 arch/arm/include/asm/arch-tegra20/hardware.h | 13 - arch/arm/include/asm/arch-tegra30/hardware.h | 22 -- 6 files changed, 91 deletions(-) delete mode 100644 arch/arm/include/asm/arch-arm720t/hardware.h delete mode 100644 arch/arm/include/asm/arch-tegra114/hardware.h delete mode 100644 arch/arm/include/asm/arch-tegra124/hardware.h delete mode 100644 arch/arm/include/asm/arch-tegra20/hardware.h delete mode 100644 arch/arm/include/asm/arch-tegra30/hardware.h diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index ec8e88d..0bb3441 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -9,7 +9,6 @@ #include asm-offsets.h #include config.h -#include asm/hardware.h /* * diff --git a/arch/arm/include/asm/arch-arm720t/hardware.h b/arch/arm/include/asm/arch-arm720t/hardware.h deleted file mode 100644 index 8ca42d9..000 --- a/arch/arm/include/asm/arch-arm720t/hardware.h +++ /dev/null @@ -1,17 +0,0 @@ -#ifndef __ARM7_HW_H -#define __ARM7_HW_H - -/* - * Copyright (c) 2004 Cucy Systems (http://www.cucy.com) - * Curt Brune c...@cucy.com - * - * SPDX-License-Identifier:GPL-2.0+ - */ - -#if defined(CONFIG_INTEGRATOR) defined(CONFIG_ARCH_INTEGRATOR) -/* include IntegratorCP/CM720T specific hardware file if there was one */ -#else -#error No hardware file defined for this configuration -#endif - -#endif /* __ARM7_HW_H */ diff --git a/arch/arm/include/asm/arch-tegra114/hardware.h b/arch/arm/include/asm/arch-tegra114/hardware.h deleted file mode 100644 index c21fbb6..000 --- a/arch/arm/include/asm/arch-tegra114/hardware.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see http://www.gnu.org/licenses/. - */ - -#ifndef _TEGRA114_HARDWARE_H_ -#define _TEGRA114_HARDWARE_H_ - -/* include tegra specific hardware definitions */ - -#endif /* _TEGRA114_HARDWARE_H_ */ diff --git a/arch/arm/include/asm/arch-tegra124/hardware.h b/arch/arm/include/asm/arch-tegra124/hardware.h deleted file mode 100644 index 114fce8..000 --- a/arch/arm/include/asm/arch-tegra124/hardware.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * (C) Copyright 2013 - * NVIDIA Corporation www.nvidia.com - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _TEGRA124_HARDWARE_H_ -#define _TEGRA124_HARDWARE_H_ - -/* - * Include Tegra-specific hardware definitions - * Nothing needed currently for Tegra124 - */ - -#endif /* _TEGRA124_HARDWARE_H_ */ diff --git a/arch/arm/include/asm/arch-tegra20/hardware.h b/arch/arm/include/asm/arch-tegra20/hardware.h deleted file mode 100644 index a295894..000 --- a/arch/arm/include/asm/arch-tegra20/hardware.h +++ /dev/null @@ -1,13 +0,0 @@ -/* -* (C) Copyright 2010-2011 -* NVIDIA Corporation www.nvidia.com -* - * SPDX-License-Identifier:GPL-2.0+ -*/ - -#ifndef __TEGRA2_HW_H -#define __TEGRA2_HW_H - -/* include tegra specific hardware definitions */ - -#endif /* __TEGRA2_HW_H */ diff --git a/arch/arm/include/asm/arch-tegra30/hardware.h b/arch/arm/include/asm/arch-tegra30/hardware.h deleted file mode 100644 index b1a5aa9..000 --- a/arch/arm/include/asm/arch-tegra30/hardware.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *
[U-Boot] [PATCH v2 5/5] ARM: integrator: move CONFIG_ARCH_CINTEGRATOR to Kconfig
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Cc: Linus Walleij linus.wall...@linaro.org --- Changes in v2: - Move this macro, not delete arch/arm/mach-integrator/Kconfig | 4 include/configs/integratorcp.h | 1 - 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig index 6794660..8ffc544 100644 --- a/arch/arm/mach-integrator/Kconfig +++ b/arch/arm/mach-integrator/Kconfig @@ -9,9 +9,13 @@ config ARCH_INTEGRATOR_AP config ARCH_INTEGRATOR_CP bool Support Integrator/CP platform + select ARCH_CINTEGRATOR endchoice +config ARCH_CINTEGRATOR + bool + choice prompt Integrator core module select diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h index 7c1ef24..7518b60 100644 --- a/include/configs/integratorcp.h +++ b/include/configs/integratorcp.h @@ -18,7 +18,6 @@ #include integrator-common.h /* Integrator CP-specific configuration */ -#define CONFIG_ARCH_CINTEGRATOR #define CONFIG_SYS_HZ_CLOCK100 /* Timer 1 is clocked at 1Mhz */ /* -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3 v2] arm: ls102xa: Enable Driver Model SPI for ls1021aqds
On 21 April 2015 at 16:55, Haikun Wang haikun.w...@freescale.com wrote: Enable Driver Model SPI for ls1021aqds board. DSPI and QSPI is enabled only when boot from QSPI. DSPI and QSPI are compatible under Driver Model SPI. Signed-off-by: Haikun Wang haikun.w...@freescale.com --- Reviewed-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com Changes in v2: - Move all changes inside of CONFIG_QSPI_BOOT Changes in v1: None include/configs/ls1021aqds.h | 17 +++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 5de416d..c0e4bda 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -408,16 +408,29 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION -/* QSPI */ +/* SPI */ #ifdef CONFIG_QSPI_BOOT +/* QSPI */ #define CONFIG_FSL_QSPI #define QSPI0_AMBA_BASE0x4000 #define FSL_QSPI_FLASH_SIZE(1 24) #define FSL_QSPI_FLASH_NUM 2 +#define CONFIG_SPI_FLASH_SPANSION +/* DSPI */ +#define CONFIG_FSL_DSPI +#define CONFIG_SPI_FLASH_ATMEL + +/* DM SPI */ +#if defined(CONFIG_FSL_DSPI) || defined(CONFIG_FSL_QSPI) +#define CONFIG_OF_CONTROL +#define CONFIG_OF_SEPARATE +#define CONFIG_DM +#define CONFIG_DM_SPI #define CONFIG_CMD_SF +#define CONFIG_DM_SPI_FLASH #define CONFIG_SPI_FLASH -#define CONFIG_SPI_FLASH_SPANSION +#endif #endif /* -- 2.1.0.27.g96db324 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot thanks! -- Jagan. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3 v2] arm: ls102xa: Enable Driver Model SPI for ls1021atwr
On 21 April 2015 at 16:56, Haikun Wang haikun.w...@freescale.com wrote: Enable Driver Model SPI for ls1021atwr board. DSPI and QSPI only be enabled when boot from QSPI. DSPI and QSPI are compatible under Driver Model SPI. Signed-off-by: Haikun Wang haikun.w...@freescale.com --- Reviewed-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com Changes in v2: - Move all changes inside of CONFIG_QSPI_BOOT Changes in v1: None include/configs/ls1021atwr.h | 14 -- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index a13876b..1dd6336 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -228,16 +228,26 @@ #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION -/* QSPI */ +/* SPI */ #ifdef CONFIG_QSPI_BOOT +/* QSPI */ #define CONFIG_FSL_QSPI #define QSPI0_AMBA_BASE0x4000 #define FSL_QSPI_FLASH_SIZE(1 24) #define FSL_QSPI_FLASH_NUM 2 +#define CONFIG_SPI_FLASH_STMICRO + +/* DM SPI */ +#if defined(CONFIG_FSL_DSPI) || defined(CONFIG_FSL_QSPI) +#define CONFIG_OF_CONTROL +#define CONFIG_OF_SEPARATE +#define CONFIG_DM +#define CONFIG_DM_SPI #define CONFIG_CMD_SF +#define CONFIG_DM_SPI_FLASH #define CONFIG_SPI_FLASH -#define CONFIG_SPI_FLASH_STMICRO +#endif #endif /* -- 2.1.0.27.g96db324 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot thanks! -- Jagan. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/9] sf: Update SST flash params
Hi Bin,
On 20 April 2015 at 15:02, Bin Meng bmeng...@gmail.com wrote:
Hi Jagan,
On Fri, Apr 17, 2015 at 4:48 PM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Bin,
On 17 April 2015 at 07:14, Bin Meng bmeng...@gmail.com wrote:
Hi Jagan,
On Fri, Apr 17, 2015 at 2:09 AM, Jagan Teki jagannadh.t...@gmail.com
wrote:
Hi Bin,
I think you have a different interpretation of sector size here-
/* The size listed here is what works with SPINOR_OP_SE, which isn't
* necessarily called a sector by the vendor.
*/
Say for example SST25VF040B has 8 sectors of which each sector size is
64 * 1024 out of this we can use 4K sector erase or 32K sector erase or
64K sector erase through flags.
Linux does follow the same-
/* SST -- large erase sizes are overlays, sectors are 4K */
{ sst25vf040b, INFO(0xbf258d, 0, 64 * 1024, 8, SECT_4K |
SST_WRITE) },
{ sst25vf080b, INFO(0xbf258e, 0, 64 * 1024, 16, SECT_4K |
SST_WRITE) },
{ sst25vf016b, INFO(0xbf2541, 0, 64 * 1024, 32, SECT_4K |
SST_WRITE) },
{ sst25vf032b, INFO(0xbf254a, 0, 64 * 1024, 64, SECT_4K |
SST_WRITE) },
Please check it.
Yes, I know this pretty well. And I want to change this behavior, as
my cover letter says.
Currently the 'sf erase' command operates on a 64KB granularity, while
the actual erase command is 4KB granularity, which is inconsistent and
causes confusion.
It never related to 'sf erase' instead based on the 'params-flags'
sf_probe will decide which erase_cmd with erase_size will use.
No, it is related. See cmd_sf.c:
I'm not getting your point- how could it erase use 64K sector size
instead of 4K.
Suppose the sector size is 4K
flash-sector_size = 0x1000
1. erase 4K len flash (it's total erase length)
# sf erase 0x0 0x1000
len_arg = simple_strtoul(arg, ep, 16);
gives - 0x1000
*len becomes 0x1000
2. erase 4K+1 len flash
# sf erase 0x0 +0x1001
len_arg = simple_strtoul(arg, ep, 16);
gives - 0x1001
*len becomes 0x2000
All the way when it goes to sf_ops.c erase will take by means of
erase_size which is assigned in sf_probe.c based on flags like 4K
32K or 64K.
static int sf_parse_len_arg(char *arg, ulong *len)
{
char *ep;
char round_up_len; /* indicates if the +length form used */
ulong len_arg;
round_up_len = 0;
if (*arg == '+') {
round_up_len = 1;
++arg;
}
len_arg = simple_strtoul(arg, ep, 16);
if (ep == arg || *ep != '\0')
return -1;
if (round_up_len flash-sector_size 0)
*len = ROUND(len_arg, flash-sector_size);
else
*len = len_arg;
return 1;
}
So even you are passing 4KB in the flash params, the 'sf erase'
command WILL erase 64KB.
/* Compute erase sector and command */
if (params-flags SECT_4K) {
flash-erase_cmd = CMD_ERASE_4K;
flash-erase_size = 4096 flash-shift;
} else if (params-flags SECT_32K) {
flash-erase_cmd = CMD_ERASE_32K;
flash-erase_size = 32768 flash-shift;
} else {
flash-erase_cmd = CMD_ERASE_64K;
flash-erase_size = flash-sector_size;
}
And to be honest, these flashes were tested with lowest ie 4KB so even if
they
do support 64KB, we mentioned on 4KB on 'params-flags' as we tested
well with that
and it works consistently.
thanks!
--
Jagan.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] ti: am335x/am437x/omap5 devices: Unify network environment variables
Across several devices network environment variables are duplicated.
Move these variables to a common include file which insures the environment
variables are reused and insures devices across product lines share the same
values.
Signed-off-by: Franklin S Cooper Jr fcoo...@ti.com
---
include/configs/am335x_evm.h | 17 +
include/configs/am43xx_evm.h | 1 +
include/configs/ti_armv7_common.h | 25 +
include/configs/ti_omap5_common.h | 13 +
4 files changed, 28 insertions(+), 28 deletions(-)
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index a87059c..8da3325 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -83,10 +83,6 @@
mmcdev=0\0 \
mmcroot=/dev/mmcblk0p2 ro\0 \
mmcrootfstype=ext4 rootwait\0 \
- rootpath=/export/rootfs\0 \
- nfsopts=nolock\0 \
- static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname} \
- ::off\0 \
ramroot=/dev/ram0 rw\0 \
ramrootfstype=ext2\0 \
mmcargs=setenv bootargs console=${console} \
@@ -102,11 +98,6 @@
${optargs} \
root=${spiroot} \
rootfstype=${spirootfstype}\0 \
- netargs=setenv bootargs console=${console} \
- ${optargs} \
- root=/dev/nfs \
- nfsroot=${serverip}:${rootpath},${nfsopts} rw \
- ip=dhcp\0 \
bootenv=uEnv.txt\0 \
loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0 \
bootscript=echo Running bootscript from mmc${mmcdev} ...; \
@@ -159,13 +150,6 @@
sf probe ${spibusno}:0; \
sf read ${loadaddr} ${spisrcaddr} ${spiimgsize}; \
bootz ${loadaddr}\0 \
- netboot=echo Booting from network ...; \
- setenv autoload no; \
- dhcp; \
- tftp ${loadaddr} ${bootfile}; \
- tftp ${fdtaddr} ${fdtfile}; \
- run netargs; \
- bootz ${loadaddr} - ${fdtaddr}\0 \
ramboot=echo Booting from ramdisk ...; \
run ramargs; \
bootz ${loadaddr} ${rdaddr} ${fdtaddr}\0 \
@@ -181,6 +165,7 @@
if test $fdtfile = undefined; then \
echo WARNING: Could not determine device tree to use;
fi; \0 \
NANDARGS \
+ NETARGS \
DFUARGS
#endif
diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h
index 6eb31e2..331fdac 100644
--- a/include/configs/am43xx_evm.h
+++ b/include/configs/am43xx_evm.h
@@ -295,6 +295,7 @@
setenv fdtfile am437x-idk-evm.dtb; fi; \
if test $fdtfile = undefined; then \
echo WARNING: Could not determine device tree; fi; \0
\
+ NETARGS \
DFUARGS \
#define CONFIG_BOOTCOMMAND \
diff --git a/include/configs/ti_armv7_common.h
b/include/configs/ti_armv7_common.h
index 110a4f8..f882942 100644
--- a/include/configs/ti_armv7_common.h
+++ b/include/configs/ti_armv7_common.h
@@ -279,4 +279,29 @@
#endif
#endif /* !CONFIG_NOR_BOOT */
+/* Generic Environment Variables */
+
+#ifdef CONFIG_CMD_NET
+#define NETARGS \
+ static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname} \
+ ::off\0 \
+ nfsopts=nolock\0 \
+ rootpath=/export/rootfs\0 \
+ netloadimage=tftp ${loadaddr} ${bootfile}\0 \
+ netloadfdt=tftp ${fdtaddr} ${fdtfile}\0 \
+ netargs=setenv bootargs console=${console} \
+ ${optargs} \
+ root=/dev/nfs \
+ nfsroot=${serverip}:${rootpath},${nfsopts} rw \
+ ip=dhcp\0 \
+ netboot=echo Booting from network ...; \
+ setenv autoload no; \
+ dhcp; \
+ run netloadimage; \
+ run netloadfdt; \
+ run netargs; \
+ bootz ${loadaddr} - ${fdtaddr}\0
+
+#endif
+
#endif /* __CONFIG_TI_ARMV7_COMMON_H__ */
diff --git a/include/configs/ti_omap5_common.h
b/include/configs/ti_omap5_common.h
index 7957a73..791eade 100644
--- a/include/configs/ti_omap5_common.h
+++ b/include/configs/ti_omap5_common.h
@@ -92,11 +92,6 @@
vram=${vram} \
root=${mmcroot} \
rootfstype=${mmcrootfstype}\0 \
- netargs=setenv bootargs console=${console} \
- ${optargs} \
- root=/dev/nfs \
- nfsroot=${serverip}:${rootpath},${nfsopts} rw \
- ip=dhcp\0 \
loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0 \
bootscript=echo Running bootscript from mmc${mmcdev} ...; \
source ${loadaddr}\0 \
@@ -123,13 +118,6 @@
bootz ${loadaddr} - ${fdtaddr}; \
fi; \
fi;\0 \
- netboot=echo Booting from network ...; \
-
Re: [U-Boot] [PATCH 5/5] ARM: integrator: remove CONFIG_ARCH_CINTEGRATOR
2015-04-21 21:06 GMT+09:00 Linus Walleij linus.wall...@linaro.org: On Tue, Apr 21, 2015 at 5:12 AM, Masahiro Yamada yamada.masah...@socionext.com wrote: This macro is not referenced at all. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Cc: Linus Walleij linus.wall...@linaro.org NACK sorry what happened here? I do not know either. I was crazy... $ git grep CONFIG_ARCH_CINTEGRATOR board/armltd/integrator/integrator.c:#ifdef CONFIG_ARCH_CINTEGRATOR board/armltd/integrator/integrator.c:#ifdef CONFIG_ARCH_CINTEGRATOR board/armltd/integrator/timer.c:#ifdef CONFIG_ARCH_CINTEGRATOR board/armltd/integrator/timer.c:#ifdef CONFIG_ARCH_CINTEGRATOR I also need this #define for a CONFIG_DM patch where I have to select whether PL010 or PL011 is used in the board file. I have just posted v2. Sorry. -- Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 2/5] ARM: integrator: move board select into mach-integrator/Kconfig
The board/SoC select menu in arch/arm/Kconfig is still cluttered. Add ARCH_INTEGRATOR into arch/arm/Kconfig and move the board select under arch/arm/mach-integrator. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Cc: Linus Walleij linus.wall...@linaro.org --- Changes in v2: None arch/arm/Kconfig| 38 ++-- arch/arm/mach-integrator/Kconfig| 57 ++ board/armltd/integrator/Kconfig | 103 configs/integratorap_cm720t_defconfig | 1 + configs/integratorap_cm920t_defconfig | 1 + configs/integratorap_cm926ejs_defconfig | 1 + configs/integratorap_cm946es_defconfig | 1 + configs/integratorcp_cm1136_defconfig | 1 + configs/integratorcp_cm920t_defconfig | 1 + configs/integratorcp_cm926ejs_defconfig | 1 + configs/integratorcp_cm946es_defconfig | 1 + include/configs/integratorap.h | 1 - 12 files changed, 70 insertions(+), 137 deletions(-) create mode 100644 arch/arm/mach-integrator/Kconfig delete mode 100644 board/armltd/integrator/Kconfig diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ac7a11b..8046d3e 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -61,18 +61,6 @@ config SEMIHOSTING choice prompt Target select -config TARGET_INTEGRATORAP_CM720T - bool Support integratorap_cm720t - select CPU_ARM720T - -config TARGET_INTEGRATORAP_CM920T - bool Support integratorap_cm920t - select CPU_ARM920T - -config TARGET_INTEGRATORCP_CM920T - bool Support integratorcp_cm920t - select CPU_ARM920T - config ARCH_AT91 bool Atmel AT91 @@ -92,14 +80,6 @@ config TARGET_SMDK2410 bool Support smdk2410 select CPU_ARM920T -config TARGET_INTEGRATORAP_CM926EJS - bool Support integratorap_cm926ejs - select CPU_ARM926EJS - -config TARGET_INTEGRATORCP_CM926EJS - bool Support integratorcp_cm926ejs - select CPU_ARM926EJS - config TARGET_ASPENITE bool Support aspenite select CPU_ARM926EJS @@ -247,10 +227,6 @@ config ARCH_VERSATILE bool ARM Ltd. Versatile family select CPU_ARM926EJS -config TARGET_INTEGRATORCP_CM1136 - bool Support integratorcp_cm1136 - select CPU_ARM1136 - config TARGET_IMX31_PHYCORE bool Support imx31_phycore select CPU_ARM1136 @@ -299,14 +275,6 @@ config ARCH_BCM283X select DM_SERIAL select DM_GPIO -config TARGET_INTEGRATORAP_CM946ES - bool Support integratorap_cm946es - select CPU_ARM946ES - -config TARGET_INTEGRATORCP_CM946ES - bool Support integratorcp_cm946es - select CPU_ARM946ES - config TARGET_VEXPRESS_CA15_TC2 bool Support vexpress_ca15_tc2 select CPU_V7 @@ -461,6 +429,9 @@ config ARCH_HIGHBANK bool Calxeda Highbank select CPU_V7 +config ARCH_INTEGRATOR + bool ARM Ltd. Integrator family + config ARCH_KEYSTONE bool TI Keystone select CPU_V7 @@ -789,6 +760,8 @@ source arch/arm/cpu/armv7/exynos/Kconfig source arch/arm/mach-highbank/Kconfig +source arch/arm/mach-integrator/Kconfig + source arch/arm/mach-keystone/Kconfig source arch/arm/mach-kirkwood/Kconfig @@ -835,7 +808,6 @@ source board/Marvell/aspenite/Kconfig source board/Marvell/db-mv784mp-gp/Kconfig source board/Marvell/gplugd/Kconfig source board/armadeus/apf27/Kconfig -source board/armltd/integrator/Kconfig source board/armltd/vexpress/Kconfig source board/armltd/vexpress64/Kconfig source board/bachmann/ot1200/Kconfig diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig new file mode 100644 index 000..4406399 --- /dev/null +++ b/arch/arm/mach-integrator/Kconfig @@ -0,0 +1,57 @@ +menu Integrator Options + depends on ARCH_INTEGRATOR + +choice + prompt ARM Ltd. Integrator board select + +config TARGET_INTEGRATORAP_CM720T + bool Support integratorap_cm720t + select CPU_ARM720T + +config TARGET_INTEGRATORAP_CM920T + bool Support integratorap_cm920t + select CPU_ARM920T + +config TARGET_INTEGRATORCP_CM920T + bool Support integratorcp_cm920t + select CPU_ARM920T + +config TARGET_INTEGRATORAP_CM926EJS + bool Support integratorap_cm926ejs + select CPU_ARM926EJS + +config TARGET_INTEGRATORCP_CM926EJS + bool Support integratorcp_cm926ejs + select CPU_ARM926EJS + +config TARGET_INTEGRATORCP_CM1136 + bool Support integratorcp_cm1136 + select CPU_ARM1136 + +config TARGET_INTEGRATORAP_CM946ES + bool Support integratorap_cm946es + select CPU_ARM946ES + +config TARGET_INTEGRATORCP_CM946ES + bool Support integratorcp_cm946es + select CPU_ARM946ES + +endchoice + +config SYS_BOARD + default integrator + +config SYS_VENDOR + default armltd + +config SYS_CONFIG_NAME + default integratorap if TARGET_INTEGRATORAP_CM720T || \ + TARGET_INTEGRATORAP_CM920T ||
[U-Boot] [PATCH v2 4/5] ARM: integrator: abolish CONFIG_INTEGRATOR
Switch to CONFIG_ARCH_INTEGRATOR defined by Kconfig.
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
Cc: Linus Walleij linus.wall...@linaro.org
---
Changes in v2: None
arch/arm/cpu/arm946es/cpu.c | 4 ++--
include/configs/integrator-common.h | 2 --
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/arm946es/cpu.c b/arch/arm/cpu/arm946es/cpu.c
index e20e5a8..5d864b9 100644
--- a/arch/arm/cpu/arm946es/cpu.c
+++ b/arch/arm/cpu/arm946es/cpu.c
@@ -53,7 +53,7 @@ static void cache_flush (void)
asm (mcr p15, 0, %0, c7, c6, 0: :r (i));
}
-#ifndef CONFIG_INTEGRATOR
+#ifndef CONFIG_ARCH_INTEGRATOR
__attribute__((noreturn)) void reset_cpu(ulong addr __attribute__((unused)))
{
@@ -63,4 +63,4 @@ __attribute__((noreturn)) void reset_cpu(ulong addr
__attribute__((unused)))
;
}
-#endif /* #ifdef CONFIG_INTEGRATOR */
+#endif /* #ifdef CONFIG_ARCH_INTEGRATOR */
diff --git a/include/configs/integrator-common.h
b/include/configs/integrator-common.h
index 4362925..12c7382 100644
--- a/include/configs/integrator-common.h
+++ b/include/configs/integrator-common.h
@@ -7,8 +7,6 @@
* SPDX-License-Identifier:GPL-2.0+
*/
-#define CONFIG_INTEGRATOR
-
#define CONFIG_SYS_TEXT_BASE 0x0100
#define CONFIG_SYS_MEMTEST_START 0x10
#define CONFIG_SYS_MEMTEST_END 0x1000
--
1.9.1
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] serial: pl01x: fix PL010 regression
commit aed2fbef5e9a0ab5a7cd01e742039a962f0b24ef
dm: serial: Tidy up the pl01x driver
caused a regression on (real hardware) PL010 by omitting
to update the line control register when switching baudrate.
Fix this by inlining the missing write to the baud control
register.
Also renaming the set_line_control() function to
pl011_set_line_control() since this function is clearly
PL011-specific, and it won't suffice to call that to
set up line control.
Tested on the Integrator/AP hardware.
Cc: Simon Glass s...@chromium.org
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
drivers/serial/serial_pl01x.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index 75eb6bd729e1..2124161734c0 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -95,7 +95,7 @@ static int pl01x_generic_serial_init(struct pl01x_regs *regs,
return 0;
}
-static int set_line_control(struct pl01x_regs *regs)
+static int pl011_set_line_control(struct pl01x_regs *regs)
{
unsigned int lcr;
/*
@@ -129,6 +129,9 @@ static int pl01x_generic_setbrg(struct pl01x_regs *regs,
enum pl01x_type type,
case TYPE_PL010: {
unsigned int divisor;
+ /* disable everything */
+ writel(0, regs-pl010_cr);
+
switch (baudrate) {
case 9600:
divisor = UART_PL010_BAUD_9600;
@@ -152,6 +155,12 @@ static int pl01x_generic_setbrg(struct pl01x_regs *regs,
enum pl01x_type type,
writel((divisor 0xf00) 8, regs-pl010_lcrm);
writel(divisor 0xff, regs-pl010_lcrl);
+ /*
+* Set line control for the PL010 to be 8 bits, 1 stop bit,
+* no parity, fifo enabled
+*/
+ writel(UART_PL010_LCRH_WLEN_8 | UART_PL010_LCRH_FEN,
+ regs-pl010_lcrh);
/* Finally, enable the UART */
writel(UART_PL010_CR_UARTEN, regs-pl010_cr);
break;
@@ -178,7 +187,7 @@ static int pl01x_generic_setbrg(struct pl01x_regs *regs,
enum pl01x_type type,
writel(divider, regs-pl011_ibrd);
writel(fraction, regs-pl011_fbrd);
- set_line_control(regs);
+ pl011_set_line_control(regs);
/* Finally, enable the UART */
writel(UART_PL011_CR_UARTEN | UART_PL011_CR_TXE |
UART_PL011_CR_RXE | UART_PL011_CR_RTS, regs-pl011_cr);
--
1.9.3
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 77/80] dm: usb: Add tests for the USB uclass
Hi Joe,
On 20 April 2015 at 23:24, Joe Hershberger joe.hershber...@gmail.com wrote:
Hi Simon,
On Wed, Mar 25, 2015 at 1:23 PM, Simon Glass s...@chromium.org wrote:
This adds a simple test for probing and a functional test using the flash
stick emulator, which tests a large chunk of the USB stack.
Signed-off-by: Simon Glass s...@chromium.org
I'm seeing a seg fault when running the dm tests and bisected it to this
patch.
I'm not sure why it's related, but it appears to seg fault on a GPIO test...
U-Boot 2015.04-00280-ge00cb22-dirty (Apr 21 2015 - 00:02:01)
DRAM: 128 MiB
Using default environment
In:serial
Out: lcd
Err: lcd
Net: eth0: eth@10002000, eth5: eth@10003000, eth1: eth@10004000
Running 53 driver model tests
Test: dm_test_autobind
Test: dm_test_autoprobe
Test: dm_test_bus_child_post_bind
Test: dm_test_bus_child_post_bind_uclass
Test: dm_test_bus_child_pre_probe_uclass
Test: dm_test_bus_children
Device 'c-test@0': seq 0 is in use by 'd-test'
Device 'c-test@1': seq 1 is in use by 'f-test'
Test: dm_test_bus_children_funcs
Test: dm_test_bus_children_iterators
Test: dm_test_bus_parent_data
Test: dm_test_bus_parent_data_uclass
Test: dm_test_bus_parent_ops
Test: dm_test_bus_parent_platdata
Test: dm_test_bus_parent_platdata_uclass
Test: dm_test_children
Test: dm_test_device_get_uclass_id
Test: dm_test_eth
Using eth@10002000 device
Using eth@10003000 device
Using eth@10004000 device
Test: dm_test_eth_alias
Using eth@10002000 device
Using eth@10004000 device
Using eth@10002000 device
Using eth@10003000 device
Test: dm_test_eth_prime
Using eth@10003000 device
Using eth@10002000 device
Test: dm_test_eth_rotate
Error: eth@10004000 address not set.
Error: eth@10004000 address not set.
Using eth@10002000 device
Error: eth@10004000 address not set.
Error: eth@10004000 address not set.
Using eth@10004000 device
Test: dm_test_fdt
Test: dm_test_fdt_offset
Test: dm_test_fdt_pre_reloc
Test: dm_test_fdt_uclass_seq
Test: dm_test_gpio
extra-gpios: get_value: error: gpio b5 not reserved
Test: dm_test_gpio_anon
Test: dm_test_gpio_copy
Test: dm_test_gpio_leak
extra-gpios: get_value: error: gpio b5 not reserved
Program received signal SIGSEGV, Segmentation fault.
0x09ec in ?? ()
(gdb) bt
#0 0x09ec in ?? ()
#1 0x0806a0aa in uclass_destroy (uc=0xb5abd228) at
/home/joe/u-boot/drivers/core/uclass.c:109
#2 0x080a29e1 in dm_leak_check_end (dms=0x8106870) at
/home/joe/u-boot/test/dm/core.c:89
#3 0x080a46a6 in dm_test_gpio_leak (dms=0x8106870) at
/home/joe/u-boot/test/dm/gpio.c:173
#4 0x080a0ed2 in dm_test_main (test_name=0x0) at
/home/joe/u-boot/test/dm/test-main.c:103
#5 0x0809e9fb in do_dm (cmdtp=0x80c0250, flag=0, argc=135022648,
argv=0xb5abbd40) at /home/joe/u-boot/test/dm/cmd_dm.c:150
#6 0x08065d6b in cmd_process (flag=0, argc=2, argv=0xb5abbd40,
repeatable=0x80c5fc4, ticks=0x0) at
/home/joe/u-boot/common/command.c:493
#7 0x0804d6fb in run_list_real (pi=0xb5abbc88) at
/home/joe/u-boot/common/cli_hush.c:1656
#8 0x0804dce4 in parse_stream_outer (inp=0xb0e8, flag=2) at
/home/joe/u-boot/common/cli_hush.c:2003
#9 0x0804df1d in parse_string_outer (s=0xb513 dm test, flag=2)
at /home/joe/u-boot/common/cli_hush.c:3248
#10 0x0804a855 in sandbox_main_loop_init () at
/home/joe/u-boot/arch/sandbox/cpu/start.c:85
#11 0x0804e65b in run_main_loop () at /home/joe/u-boot/common/board_r.c:682
#12 0x0808f082 in initcall_run_list (init_sequence=0x80c1f68) at
/home/joe/u-boot/lib/initcall.c:27
#13 0x0804e798 in board_init_r (new_gd=0xb5ab9f14, dest_addr=0) at
/home/joe/u-boot/common/board_r.c:916
#14 0x0804a810 in main (argc=Cannot access memory at address 0x0
) at /home/joe/u-boot/arch/sandbox/cpu/start.c:276
(gdb) f 1
#1 0x0806a0aa in uclass_destroy (uc=0xb5abd228) at
/home/joe/u-boot/drivers/core/uclass.c:109
109 ret = device_unbind(dev);
(gdb) l -
99 int uclass_destroy(struct uclass *uc)
100 {
101 struct uclass_driver *uc_drv;
102 struct udevice *dev, *tmp;
103 int ret;
104
105 list_for_each_entry_safe(dev, tmp, uc-dev_head,
uclass_node) {
106 ret = device_remove(dev);
107 if (ret)
108 return ret;
(gdb) l
109 ret = device_unbind(dev);
110 if (ret)
111 return ret;
112 }
113
114 uc_drv = uc-uc_drv;
115 if (uc_drv-destroy)
116 uc_drv-destroy(uc);
117 list_del(uc-sibling_node);
118 if (uc_drv-priv_auto_alloc_size)
(gdb)
Thoughts?
Yes it is broken. I sent a series to fix this recent ('dm: core: Fix
up test failures') starting with this patch:
http://patchwork.ozlabs.org/patch/462556/
If you are able to test it that would be good.
Regards,
Simon
Re: [U-Boot] [patch] socfpga: move configuration options to config file
On Monday, April 20, 2015 at 11:54:34 PM, Pavel Machek wrote: On Mon 2015-04-20 23:32:33, Marek Vasut wrote: On Monday, April 20, 2015 at 10:27:02 PM, Pavel Machek wrote: On Mon 2015-04-20 21:23:23, Marek Vasut wrote: On Monday, April 20, 2015 at 02:30:48 PM, Pavel Machek wrote: Setting configuration options in header file leads to incosistency between .config user sees, and .config he has. What is worse, a lot of compile warnings is presented for any such config option user sets in .config. Can you please elaborate on such warnings ? Lets remove CONFIG_CMD_RUN from .config, then select it: run (CMD_RUN) [N/y/?] (NEW) y Now you warning for most C files: CC arch/arm/lib/asm-offsets.s In file included from include/configs/socfpga_cyclone5.h:16:0, from include/config.h:5, from include/common.h:18, from arch/arm/lib/asm-offsets.c:15: include/config_cmd_default.h:38:0: warning: CONFIG_CMD_RUN redefined [enabled by default] #define CONFIG_CMD_RUN /* run command in env variable */ ^ In file included from ././include/linux/kconfig.h:4:0, from command-line:0: include/generated/autoconf.h:35:0: note: this is That meant CONFIG_CMD_RUN is defined by default, yes? In which case, this patch would just paper over some bug (?) instead of fixing the root cause ? The correct fix would probably be to zap those macros, which are defined by default from the socfpga_cyclone5.h file, no ? CONFIG_CMD_RUN is defined in socfpga_cyclone5.h, but it is set to N by .config. Take a look. If you set it to Y, you'll get the ugly warnings. Try that. I also looked into include/config_cmd_default.h , where the CONFIG_CMD_RUN is defined. It should therefore be safe to remove CONFIG_CMD_RUN from socfpga_cyclone5.h . Apply the patch. See that .config now corresponds to real configuration and warnings are gone. Pavel Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [patch] socfpga: move configuration options to config file
2015-04-20 21:30 GMT+09:00 Pavel Machek pa...@denx.de: Setting configuration options in header file leads to incosistency between .config user sees, and .config he has. What is worse, a lot of compile warnings is presented for any such config option user sets in .config. Signed-off-by: Pavel Machek pa...@denx.de diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index 0ebfbfc..762b937 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -6,3 +6,19 @@ CONFIG_DEFAULT_DEVICE_TREE=socfpga_cyclone5_socdk CONFIG_DM=y CONFIG_DM_SPI=y CONFIG_DM_SPI_FLASH=y +CONFIG_CMD_ASKENV=y +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_DFU=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_GREPENV=y +CONFIG_CMD_MII=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PING=y +CONFIG_CMD_SETEXPR=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y You need to add these to common/Kconfig as well as to your defconfig. Otherwise, they do not appear in the .config file. There exist CMD_RUN, CMD_PING, CMD_USB in common/Kconfig, but most of the others are missing. -- Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/4] ARM: zynq: move sources to mach-zynq
Hi Masahiro, On 04/21/2015 06:07 AM, Masahiro Yamada wrote: Hi Michal, 2015-03-16 16:43 GMT+09:00 Masahiro Yamada yamada.masah...@socionext.com: Masahiro Yamada (4): ARM: zynq: pass -mfpu=neon only to lowlevel_init.S ARM: zynq: move SoC sources to mach-zynq ARM: zynq: move SoC headers to mach-zynq/include/mach ARM: zynq: rename CONFIG_ZYNQ to CONFIG_ARCH_ZYNQ Is this series applicable? I completely missed this series - sorry for that. All patches are fine and I have applied them. Thanks, Michal ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] arm: ls102xa: Adjust the load address of U-Boot for NOR boot
The original load address of U-Boot is 0x67f8. The address space of NOR flash is 0x6000 to 0x67ff. It will cause the size of u-boot couldn't be larger than 512K. As more features are supported in u-boot, the size of u-boot is larger than 512K. To fix this issue, the load address of U-Boot for NOR boot is adjusted to 0x6010. In RCW, the PBI command needs to change as follows: .pbi -write 0xee0200, 0x67f8 +write 0xee0200, 0x6010 .end Signed-off-by: Alison Wang alison.w...@freescale.com --- include/configs/ls1021aqds.h | 2 +- include/configs/ls1021atwr.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 5de416d..e0cebf1 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -124,7 +124,7 @@ unsigned long get_board_ddr_clk(void); #endif #ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0x67f8 +#define CONFIG_SYS_TEXT_BASE 0x6010 #endif #define CONFIG_NR_DRAM_BANKS 1 diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index a13876b..89891ac 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -73,7 +73,7 @@ #endif #ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0x67f8 +#define CONFIG_SYS_TEXT_BASE 0x6010 #endif #define CONFIG_NR_DRAM_BANKS 1 -- 2.1.0.27.g96db324 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Ethernet problem on A20 Lime2
Hey, I've run into a problem with ethernet on the A20 Lime2: sunxi# setenv autoload no sunxi# dhcp Speed: 1000, full duplex BOOTP broadcast 1 DHCP client bound to address 192.168.0.185 (13 ms) sunxi# tftp test/u-boot-sunxi-with-spl.bin Speed: 1000, full duplex Using dwmac.1c5 device TFTP from server 192.168.0.3; our IP address is 192.168.0.185 Filename 'test/u-boot-sunxi-with-spl.bin'. Load address: 0x4200 Loading: # # 23.4 KiB/s done Bytes transferred = 377028 (5c0c4 hex) sunxi# crc32 $fileaddr $filesize CRC32 for 4200 ... 4205c0c3 == afa0edfb $ rhash -C /tftpboot/test/u-boot-sunxi-with-spl.bin ; Generated by RHash v1.2.8 on 2015-04-21 at 10:01.53 ; Written by Aleksey (Akademgorodok) - http://rhash.sourceforge.net/ ; ; 377028 09:52.08 2015-04-21 /tftpboot/test/u-boot-sunxi-with-spl.bin /tftpboot/test/u-boot-sunxi-with-spl.bin A16F5564 So a non-crc32 match. If I load that same file off of SD card: sunxi# mmc read 4300 10 400 MMC read: dev # 0, block # 16, count 1024 ... 1024 blocks read: OK sunxi# cmp 4200 4300 $filesize word at 0x42001544 (0x605a0200) != word at 0x43001544 (0x605a0201) Total of 1361 word(s) were the same I haven't had a chance to bisect this but it might have been around for a little while. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] serial: pl01x: fix PL010 regression
On Tue, Apr 21, 2015 at 03:10:06PM +0200, Linus Walleij wrote: commit aed2fbef5e9a0ab5a7cd01e742039a962f0b24ef dm: serial: Tidy up the pl01x driver caused a regression on (real hardware) PL010 by omitting to update the line control register when switching baudrate. Fix this by inlining the missing write to the baud control register. Also renaming the set_line_control() function to pl011_set_line_control() since this function is clearly PL011-specific, and it won't suffice to call that to set up line control. Tested on the Integrator/AP hardware. Cc: Simon Glass s...@chromium.org Signed-off-by: Linus Walleij linus.wall...@linaro.org Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-net.git master
On Mon, Apr 20, 2015 at 06:08:44PM -0500, Joe Hershberger wrote: The following changes since commit 1733259d25015c28c47990ec11af99b3f62f811c: Merge branch 'master' of git://git.denx.de/u-boot-video (2015-04-20 09:13:52 -0400) are available in the git repository at: git://git.denx.de/u-boot-net.git master for you to fetch changes up to 523bb66f5a8e2cee22535e509c4e762bbc774406: net: pch_gbe: Fix pch_gbe device name (2015-04-20 17:57:13 -0500) Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/6] ARM: socfpga: refactoring, move files to arch/arm/mach-socfpga
On Tuesday, April 21, 2015 at 01:40:32 PM, Masahiro Yamada wrote: Hi Marek, Hi! 2015-04-21 19:56 GMT+09:00 Marek Vasut ma...@denx.de: On Tuesday, April 21, 2015 at 04:09:52 AM, Masahiro Yamada wrote: Masahiro Yamada (6): ARM: socfpga: do not add board directory to header search path ARM: socfpga: remove redundant config.mk ARM: socfpga: move board select into mach-socfpga/Kconfig ARM: socfpga: move SoC sources to mach-socfpga ARM: socfpga: move SoC headers to mach-socfpga/include/mach ARM: socfpga: abolish CONFIG_SOCFPGA Hi! Can you please rebase the set on top of u-boot-socfpga/master ? There are still some patches in there which collide with your set :( Sure. I have posted v2. ありがとう! ;-) Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Ethernet problem on A20 Lime2
On Tue, Apr 21, 2015 at 04:11:34PM +0200, Hans de Goede wrote: Hi Tom, On 21-04-15 16:03, Tom Rini wrote: Hey, I've run into a problem with ethernet on the A20 Lime2: sunxi# setenv autoload no sunxi# dhcp Speed: 1000, full duplex BOOTP broadcast 1 DHCP client bound to address 192.168.0.185 (13 ms) sunxi# tftp test/u-boot-sunxi-with-spl.bin Speed: 1000, full duplex Using dwmac.1c5 device TFTP from server 192.168.0.3; our IP address is 192.168.0.185 Filename 'test/u-boot-sunxi-with-spl.bin'. Load address: 0x4200 Loading: # # 23.4 KiB/s done Bytes transferred = 377028 (5c0c4 hex) sunxi# crc32 $fileaddr $filesize CRC32 for 4200 ... 4205c0c3 == afa0edfb $ rhash -C /tftpboot/test/u-boot-sunxi-with-spl.bin ; Generated by RHash v1.2.8 on 2015-04-21 at 10:01.53 ; Written by Aleksey (Akademgorodok) - http://rhash.sourceforge.net/ ; ; 377028 09:52.08 2015-04-21 /tftpboot/test/u-boot-sunxi-with-spl.bin /tftpboot/test/u-boot-sunxi-with-spl.bin A16F5564 So a non-crc32 match. If I load that same file off of SD card: sunxi# mmc read 4300 10 400 MMC read: dev # 0, block # 16, count 1024 ... 1024 blocks read: OK sunxi# cmp 4200 4300 $filesize word at 0x42001544 (0x605a0200) != word at 0x43001544 (0x605a0201) Total of 1361 word(s) were the same I haven't had a chance to bisect this but it might have been around for a little while. Chances are this has never worked 100% reliable, on most boards some tweaking of the GMAC clk delays is necessary. Try setting CONFIG_GMAC_TX_DELAY=1 In the defconfig for your board, that helps with similar issues on the Cubietruck (which also has gbit ethernet) Valid values are 0 - 3. 1 2 and 3 all failed :( -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] integrator: stop zeroing the gd flags
This assignment conflicts with code that add flags with gd-flags |= FOO prior to the execution of this function. Seems like a historical artifact and creates bugs with early alloc(). Cc: Masahiro Yamada yamada.masah...@socionext.com Signed-off-by: Linus Walleij linus.wall...@linaro.org --- board/armltd/integrator/integrator.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/board/armltd/integrator/integrator.c b/board/armltd/integrator/integrator.c index f0fe0fd3aabe..e94ac850c751 100644 --- a/board/armltd/integrator/integrator.c +++ b/board/armltd/integrator/integrator.c @@ -54,8 +54,6 @@ int board_init (void) /* adress of boot parameters */ gd-bd-bi_boot_params = 0x0100; - gd-flags = 0; - #ifdef CONFIG_CM_REMAP extern void cm_remap(void); cm_remap(); /* remaps writeable memory to 0x */ -- 1.9.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] integrator: switch to DM serial port
This switches the Integrator boards over to using the device model
for its serial ports.
Cc: Masahiro Yamada yamada.masah...@socionext.com
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
board/armltd/integrator/integrator.c | 18 ++
include/configs/integrator-common.h | 8
include/configs/integratorap.h | 11 ---
include/configs/integratorcp.h | 9 -
4 files changed, 26 insertions(+), 20 deletions(-)
diff --git a/board/armltd/integrator/integrator.c
b/board/armltd/integrator/integrator.c
index e94ac850c751..cbe706170d0f 100644
--- a/board/armltd/integrator/integrator.c
+++ b/board/armltd/integrator/integrator.c
@@ -20,11 +20,29 @@
#include common.h
#include netdev.h
#include asm/io.h
+#include dm/platdata.h
+#include dm/platform_data/serial_pl01x.h
#include arm-ebi.h
#include integrator-sc.h
DECLARE_GLOBAL_DATA_PTR;
+static const struct pl01x_serial_platdata serial_platdata = {
+ .base = 0x1600,
+#ifdef CONFIG_ARCH_CINTEGRATOR
+ .type = TYPE_PL011,
+ .clock = 14745600,
+#else
+ .type = TYPE_PL010,
+ .clock = 0, /* Not used for PL010 */
+#endif
+};
+
+U_BOOT_DEVICE(integrator_serials) = {
+ .name = serial_pl01x,
+ .platdata = serial_platdata,
+};
+
void peripheral_power_enable (void);
#if defined(CONFIG_SHOW_BOOT_PROGRESS)
diff --git a/include/configs/integrator-common.h
b/include/configs/integrator-common.h
index 4362925ae1e1..13ee580c91bd 100644
--- a/include/configs/integrator-common.h
+++ b/include/configs/integrator-common.h
@@ -21,6 +21,14 @@
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZECONFIG_SYS_CBSIZE /* Boot Argument
Buffer Size*/
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) /* Size of
malloc() pool */
+#define CONFIG_SYS_MALLOC_F_LEN0x2000
+
+/* Serial port PL010/PL011 through the device model */
+#define CONFIG_DM
+#define CONFIG_DM_SERIAL
+#define CONFIG_PL01X_SERIAL
+#define CONFIG_BAUDRATE38400
+#define CONFIG_CONS_INDEX 0
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h
index e168c8c9ba57..567fd361bd69 100644
--- a/include/configs/integratorap.h
+++ b/include/configs/integratorap.h
@@ -22,17 +22,6 @@
#define CONFIG_SYS_HZ_CLOCK2400/* Timer 1 is clocked
at 24Mhz */
/*
- * PL010 Configuration
- */
-#define CONFIG_PL010_SERIAL
-#define CONFIG_CONS_INDEX 0
-#define CONFIG_BAUDRATE38400
-#define CONFIG_PL01x_PORTS { (void *) (CONFIG_SYS_SERIAL0), (void *)
(CONFIG_SYS_SERIAL1) }
-#define CONFIG_SYS_SERIAL0 0x1600
-#define CONFIG_SYS_SERIAL1 0x1700
-
-
-/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h
index 7c1ef2483ea2..7727b4e08eef 100644
--- a/include/configs/integratorcp.h
+++ b/include/configs/integratorcp.h
@@ -29,15 +29,6 @@
#define CONFIG_SMC9_BASE0xC800
#undef CONFIG_SMC9_EXT_PHY
-/* PL011 configuration */
-#define CONFIG_PL011_SERIAL
-#define CONFIG_PL011_CLOCK 14745600
-#define CONFIG_PL01x_PORTS { (void *)CONFIG_SYS_SERIAL0, (void
*)CONFIG_SYS_SERIAL1 }
-#define CONFIG_CONS_INDEX 0
-#define CONFIG_BAUDRATE38400
-#define CONFIG_SYS_SERIAL0 0x1600
-#define CONFIG_SYS_SERIAL1 0x1700
-
/*
* Command line configuration.
*/
--
1.9.3
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Ethernet problem on A20 Lime2
Hi Tom, On 21-04-15 16:03, Tom Rini wrote: Hey, I've run into a problem with ethernet on the A20 Lime2: sunxi# setenv autoload no sunxi# dhcp Speed: 1000, full duplex BOOTP broadcast 1 DHCP client bound to address 192.168.0.185 (13 ms) sunxi# tftp test/u-boot-sunxi-with-spl.bin Speed: 1000, full duplex Using dwmac.1c5 device TFTP from server 192.168.0.3; our IP address is 192.168.0.185 Filename 'test/u-boot-sunxi-with-spl.bin'. Load address: 0x4200 Loading: # # 23.4 KiB/s done Bytes transferred = 377028 (5c0c4 hex) sunxi# crc32 $fileaddr $filesize CRC32 for 4200 ... 4205c0c3 == afa0edfb $ rhash -C /tftpboot/test/u-boot-sunxi-with-spl.bin ; Generated by RHash v1.2.8 on 2015-04-21 at 10:01.53 ; Written by Aleksey (Akademgorodok) - http://rhash.sourceforge.net/ ; ; 377028 09:52.08 2015-04-21 /tftpboot/test/u-boot-sunxi-with-spl.bin /tftpboot/test/u-boot-sunxi-with-spl.bin A16F5564 So a non-crc32 match. If I load that same file off of SD card: sunxi# mmc read 4300 10 400 MMC read: dev # 0, block # 16, count 1024 ... 1024 blocks read: OK sunxi# cmp 4200 4300 $filesize word at 0x42001544 (0x605a0200) != word at 0x43001544 (0x605a0201) Total of 1361 word(s) were the same I haven't had a chance to bisect this but it might have been around for a little while. Chances are this has never worked 100% reliable, on most boards some tweaking of the GMAC clk delays is necessary. Try setting CONFIG_GMAC_TX_DELAY=1 In the defconfig for your board, that helps with similar issues on the Cubietruck (which also has gbit ethernet) Valid values are 0 - 3. Regards, Hans ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] spl: spl_mmc: Clearer structure in spl_mmc_load_image and cosmetics
On Sun, Apr 19, 2015 at 09:30:08PM +0200, Paul Kocialkowski wrote: This refactors spl_mmc_load_image to use a switch/case structure and easier to understand spl_start_uboot checks. It also drops fallbacks on boot devices that were not selected in the first place. I don't like the dropping fallback on boot devices part and this is going to break existing setups. What some people do is on platforms where the ROM doesn't grok FAT they still have u-boot.img on FAT and just keep SPL written to the raw device. Then booting from both raw or RAW+FAT works. Lines that go beyond 80 chars are also reduced by reducing the number of tabs. Debug and error strings are refctored to match a common style. I like the strings having a common style. Please make sure that checkpatch is happy about how you re-indent the code too, thanks. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] x86: Install a default e820 table in the __weak install_e820_map()
Hi Bin,
On 20 April 2015 at 22:21, Bin Meng bmeng...@gmail.com wrote:
Create a default e820 table with 3 entries which is enough to boot
a Linux kernel.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
arch/x86/lib/zimage.c | 29 ++---
1 file changed, 22 insertions(+), 7 deletions(-)
diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c
index 566b048..c3f8a73 100644
--- a/arch/x86/lib/zimage.c
+++ b/arch/x86/lib/zimage.c
@@ -25,6 +25,8 @@
#endif
#include linux/compiler.h
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Memory lay-out:
*
@@ -40,16 +42,29 @@
#define COMMAND_LINE_SIZE 2048
-unsigned generic_install_e820_map(unsigned max_entries,
- struct e820entry *entries)
+/*
+ * Install a default e820 table with 3 entries as follows:
+ *
+ * 0x00-0x0a Useable RAM
+ * 0x0a-0x10 Reserved for ISA
+ * 0x10-gd-ram_size Useable RAM
+ */
+__weak unsigned install_e820_map(unsigned max_entries,
+struct e820entry *entries)
{
- return 0;
+ entries[0].addr = 0;
+ entries[0].size = ISA_START_ADDRESS;
+ entries[0].type = E820_RAM;
+ entries[1].addr = ISA_START_ADDRESS;
+ entries[1].size = ISA_END_ADDRESS - ISA_START_ADDRESS;
+ entries[1].type = E820_RESERVED;
+ entries[2].addr = ISA_END_ADDRESS;
+ entries[2].size = gd-ram_size - ISA_END_ADDRESS;
+ entries[2].type = E820_RAM;
+
+ return 3;
}
-unsigned install_e820_map(unsigned max_entries,
- struct e820entry *entries)
- __attribute__((weak, alias(generic_install_e820_map)));
-
static void build_command_line(char *command_line, int auto_boot)
{
char *env_command_line;
--
1.8.2.1
Why is this code sitting in zimage.c? Should it be used with bootm also?
Regards,
Simon
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] x86: Clean up arch/x86/include/asm/e820.h
On 20 April 2015 at 22:21, Bin Meng bmeng...@gmail.com wrote: There are lots of unused codes defined in e820.h, clean it up. Signed-off-by: Bin Meng bmeng...@gmail.com --- arch/x86/include/asm/e820.h | 133 +--- 1 file changed, 2 insertions(+), 131 deletions(-) Acked-by: Simon Glass s...@chromium.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] x86: galileo: Define mac addresses for the on-chip ethernet ports
Hi Bin, On 20 April 2015 at 23:05, Bin Meng bmeng...@gmail.com wrote: Not like other x86 chipset, there is no EEPROM for the ethernet controller on the Intel Quark SoC to retreive the mac address after power up. With pre-defined mac addresses, U-Boot boots up and will not show Error: dwmac.90006000 address not set message. Signed-off-by: Bin Meng bmeng...@gmail.com --- include/configs/galileo.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/galileo.h b/include/configs/galileo.h index d4d0eb3..961d087 100644 --- a/include/configs/galileo.h +++ b/include/configs/galileo.h @@ -62,6 +62,8 @@ #define CONFIG_DESIGNWARE_ETH #define CONFIG_DW_ALTDESCRIPTOR #define CONFIG_PHYLIB +#define CONFIG_ETHADDR 00:02:b3:00:00:00 +#define CONFIG_ETH1ADDR00:02:b3:00:00:01 I recall this coming up before with another board - we are not supposed to set a default MAC address since it may create inexplicable conflicts on the network if an org two boards on the same network one day. Can you just set an environment variable? /* Environment configuration */ #define CONFIG_ENV_SECT_SIZE 0x1000 -- 1.8.2.1 Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] kconfig: remove duplicated CMD_DNS option
On Sun, Apr 19, 2015 at 02:58:43PM +0300, Andrey Skvortsov wrote: two CMD_DNS options were added by commit 60296a835cb17 (commands: add more command entries in Kconfig) Signed-off-by: Andrey Skvortsov andrej.skvort...@gmail.com Acked-by: Masahiro Yamada yamada.masah...@socionext.com Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 5/5] ARM: integrator: remove CONFIG_ARCH_CINTEGRATOR
On Tue, Apr 21, 2015 at 5:12 AM, Masahiro Yamada yamada.masah...@socionext.com wrote: This macro is not referenced at all. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Cc: Linus Walleij linus.wall...@linaro.org NACK sorry what happened here? $ git grep CONFIG_ARCH_CINTEGRATOR board/armltd/integrator/integrator.c:#ifdef CONFIG_ARCH_CINTEGRATOR board/armltd/integrator/integrator.c:#ifdef CONFIG_ARCH_CINTEGRATOR board/armltd/integrator/timer.c:#ifdef CONFIG_ARCH_CINTEGRATOR board/armltd/integrator/timer.c:#ifdef CONFIG_ARCH_CINTEGRATOR I also need this #define for a CONFIG_DM patch where I have to select whether PL010 or PL011 is used in the board file. Yours, Linus Walleij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/5] dm: usb: Add more debugging in ehci-hcd.c
On Saturday, April 18, 2015 at 07:33:46 PM, Simon Glass wrote: Add some debugging to detect init failure. Signed-off-by: Simon Glass s...@chromium.org Reviewed-by: Marek Vasut ma...@denx.de Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] spi flash: fix trivial problems
On 21 April 2015 at 14:15, Marek Vasut ma...@denx.de wrote: On Tuesday, April 21, 2015 at 10:37:45 AM, Pavel Machek wrote: Fix typos and too big #ifdef. Signed-off-by: Pavel Machek pa...@denx.de Reviewed-by: Marek Vasut ma...@denx.de Applied to u-boot-spi/master thanks! -- Jagan. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/6] ARM: socfpga: do not add board directory to header search path
The compiler option -Iboard/$(VENDOR)/$(BOARD) just exists here for iocsr_config.c to be able to include iocsr_config.h. Use ... instead of ... to include a header in the same directory. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- Changes in v2: None arch/arm/cpu/armv7/socfpga/config.mk | 3 --- board/altera/socfpga/iocsr_config.c | 2 +- 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/arch/arm/cpu/armv7/socfpga/config.mk b/arch/arm/cpu/armv7/socfpga/config.mk index 2a99c72..3d18491 100644 --- a/arch/arm/cpu/armv7/socfpga/config.mk +++ b/arch/arm/cpu/armv7/socfpga/config.mk @@ -6,6 +6,3 @@ ifndef CONFIG_SPL_BUILD ALL-y += u-boot.img endif - -# Added for handoff support -PLATFORM_RELFLAGS += -Iboard/$(VENDOR)/$(BOARD) diff --git a/board/altera/socfpga/iocsr_config.c b/board/altera/socfpga/iocsr_config.c index c79aa6d..3b202b5 100644 --- a/board/altera/socfpga/iocsr_config.c +++ b/board/altera/socfpga/iocsr_config.c @@ -6,7 +6,7 @@ /* This file is generated by Preloader Generator */ -#include iocsr_config.h +#include iocsr_config.h #ifdef CONFIG_TARGET_SOCFPGA_CYCLONE5 const unsigned long iocsr_scan_chain0_table[(( -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/4] dm: serial: Tidy up the pl01x driver
On Tue, Apr 21, 2015 at 1:56 PM, Linus Walleij linus.wall...@linaro.org wrote: On Tue, Sep 23, 2014 at 1:30 AM, Simon Glass s...@chromium.org wrote: Adjust the driver so that leaf functions take a pointer to the serial port register base. Put all the global configuration in the init function, and use the same settings from then on. This makes it much easier to move to driver model without duplicating the code, since with driver model we use platform data rather than global settings. The driver is compiled with either the CONFIG_PL010_SERIAL or CONFIG_PL011_SERIAL option and this determines the uart type. With driver model this needs to come in from platform data, so create a new CONFIG_PL01X_SERIAL config which brings in the driver, and adjust the driver to support both peripheral variants. Signed-off-by: Simon Glass s...@chromium.org Unfortunately this patch regresses PL010 (Integrator/AP), and I suspect it has never been tested on real-world PL010 hardware? I'm hunting around to figure out what is causing it, any hints welcome. FYI: U-Boot does come up, but trying to switch baudrate from the default 38400 to 115200 with set baudrate 115200 hangs, it's as if the change never hits the hardware so the routine looking for a CR after the baudrate switch just waits. If I switch the terminal back to 38400 and hit enter it goes through and works again, and U-Boot thinks it has successfully switched to 115200, while it hasn't, really. Kind of frustrating since I upload kernels over the serial port :P Yours, Linus Walleij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/5] dm: usb: Add a terminator to the string destructor list
Hi Simon, On Sun, Apr 19, 2015 at 8:20 AM, Simon Glass s...@chromium.org wrote: The terminator is missing. Add it for completeness. Signed-off-by: Simon Glass s...@chromium.org Reviewed-by: Joe Hershberger joe.hershber...@ni.com Tested-by: Joe Hershberger joe.hershber...@ni.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 19/20] dm: test: dts: Sort the aliases in the test device tree file
Hi Simon, On Mon, Apr 20, 2015 at 1:37 PM, Simon Glass s...@chromium.org wrote: Sort these aliases to avoid confusion as to what is present. Signed-off-by: Simon Glass s...@chromium.org --- Reviewed-by: Joe Hershberger joe.hershber...@ni.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/5] dm: Update the README to reflect the current test output
Hi Simon, On Sun, Apr 19, 2015 at 8:21 AM, Simon Glass s...@chromium.org wrote: There are a lot more tests now. To avoid confusion add the updated test output to the driver model README. Signed-off-by: Simon Glass s...@chromium.org --- Reviewed-by: Joe Hershberger joe.hershber...@ni.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 5/5] dm: test: Don't clear global_data in dm_test_uclass_before_ready()
Hi Simon, On Sun, Apr 19, 2015 at 8:21 AM, Simon Glass s...@chromium.org wrote: We must not clear global_data even in tests, since the ram_buffer (which is used by malloc()) will also be lost, and subsequent tests will fail. Zero only the global_data fields that are required for the test to function. Signed-off-by: Simon Glass s...@chromium.org For me, this fixed: Test: dm_test_usb_base /home/joe/u-boot/test/dm/test-main.c:27, dm_test_init(): 0 == dm_init(): Expected 0, got -12 /home/joe/u-boot/test/dm/test-main.c:93, dm_test_main(): 0 == dm_test_init(dms): Expected 0, got -1 Reviewed-by: Joe Hershberger joe.hershber...@ni.com Tested-by: Joe Hershberger joe.hershber...@ni.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 77/80] dm: usb: Add tests for the USB uclass
Hi Simon,
On Tue, Apr 21, 2015 at 8:14 AM, Simon Glass s...@chromium.org wrote:
Hi Joe,
On 20 April 2015 at 23:24, Joe Hershberger joe.hershber...@gmail.com wrote:
Hi Simon,
On Wed, Mar 25, 2015 at 1:23 PM, Simon Glass s...@chromium.org wrote:
This adds a simple test for probing and a functional test using the flash
stick emulator, which tests a large chunk of the USB stack.
Signed-off-by: Simon Glass s...@chromium.org
I'm seeing a seg fault when running the dm tests and bisected it to this
patch.
I'm not sure why it's related, but it appears to seg fault on a GPIO test...
--snip--
Thoughts?
Yes it is broken. I sent a series to fix this recent ('dm: core: Fix
up test failures') starting with this patch:
http://patchwork.ozlabs.org/patch/462556/
If you are able to test it that would be good.
I tested the series, but I still have a USB test failure...
Test: dm_test_usb_flash
USB-1: scanning bus 1 for devices... 2 USB Device(s) found
/home/joe/u-boot/test/dm/usb.c:45, dm_test_usb_flash(): 2 ==
dev_desc-block_read(dev_desc-dev, 0, 2, cmp): Expected 2, got 0
Have you seen that one?
Thanks,
-Joe
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/5] dm: core: Handle recursive unbinding of uclass devices
Hi Simon, On Sun, Apr 19, 2015 at 8:20 AM, Simon Glass s...@chromium.org wrote: Since a device can have children in the same uclass as itself, we need to handle unbinding carefully: we must allow that unbinding a device in a uclass may cause another device in the same uclass to be unbound. Adjust the code to cope. Signed-off-by: Simon Glass s...@chromium.org This fixed the seg fault I was seeing. Thanks! Reviewed-by: Joe Hershberger joe.hershber...@ni.com Tested-by: Joe Hershberger joe.hershber...@ni.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v7 00/17] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix
On 04/20/2015 11:18 PM, Jan Kiszka wrote: Changes in v7: - rebased over master - fixed issue that prevented secure boot with all cores = replace ap_pm_init with psci_board_init hook - enable CONFIG_ARMV7_BOOT_SEC_DEFAULT for tegra to avoid problems with default config of current Linux - add cleanup patch for CONFIG_ARMV7_NONSEC/VIRT/PSCI Note that I've removed reviewed and tested tags from modified patches. The series, Tested-by: Stephen Warren swar...@nvidia.com I tested: * With $bootm_boot_mode both unset, and set to sec, my old kernel (which doesn't work in NS mode) still works. * With $bootm_boot_mode set to nonsec, my old kernel boots in HYP mode with virtualization extensions available, but of course hangs since the kernel isn't fixed to work in NS mode. So, this series is both backwards compatible and seems to enable virtualization as desired. I very briefly glanced through the code and didn't see anything that I'd want to say no too, but didn't really read it closely enough to say I've reviewed/ack'd it; I assume TomW/Thierry would give it a more thorough look. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Question regarding MLO size
On Tue, Apr 21, 2015 at 01:12:37PM -0700, Ash Charles wrote: On Tue, Apr 21, 2015 at 12:23 PM, Tom Rini tr...@konsulko.com wrote: Sadly it may make sense to move some SPL-only functions out into a file that is only built/linked for SPL due to this bug. Ah---that is a funky bug. Is it reasonable to wrap the offending lines in a #ifndef CONFIG_SPL_BUILD u-boot code with strings that bloat SPL #endif // CONFIG_SPL_BUILD ? Would this restrict it to be included only in u-boot (where the code is needed) rather than getting unnecessarily pulled into SPL? That starts getting pretty messy looking which is why I was thinking of following the mx6 model of having boardname.c and boardname_spl.c or just board.c and spl.c -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 10/11] net: Use env callbacks for net variables
Instead of checking for changes to the env each time we enter the
net_loop, use the env callbacks to update the values of the variables.
Don't update the variables when the source was programmatic, since the
variables were the source of the new value.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
include/env_callback.h | 22 ++-
net/net.c | 105 +
2 files changed, 110 insertions(+), 17 deletions(-)
diff --git a/include/env_callback.h b/include/env_callback.h
index 3de1093..91f3cc0 100644
--- a/include/env_callback.h
+++ b/include/env_callback.h
@@ -37,6 +37,26 @@
#define ENV_DOT_ESCAPE
#endif
+#ifdef CONFIG_CMD_DNS
+#define DNS_CALLBACK dnsip:dnsip,
+#else
+#define DNS_CALLBACK
+#endif
+
+#ifdef CONFIG_NET
+#define NET_CALLBACKS \
+ bootfile:bootfile, \
+ ipaddr:ipaddr, \
+ gatewayip:gatewayip, \
+ netmask:netmask, \
+ serverip:serverip, \
+ nvlan:nvlan, \
+ vlan:vlan, \
+ DNS_CALLBACK
+#else
+#define NET_CALLBACKS
+#endif
+
/*
* This list of callback bindings is static, but may be overridden by defining
* a new association in the .callbacks environment variable.
@@ -44,7 +64,7 @@
#define ENV_CALLBACK_LIST_STATIC ENV_DOT_ESCAPE ENV_CALLBACK_VAR :callbacks,
\
ENV_DOT_ESCAPE ENV_FLAGS_VAR :flags, \
baudrate:baudrate, \
- bootfile:bootfile, \
+ NET_CALLBACKS \
loadaddr:loadaddr, \
SILENT_CALLBACK \
SPLASHIMAGE_CALLBACK \
diff --git a/net/net.c b/net/net.c
index a365df0..57111ad 100644
--- a/net/net.c
+++ b/net/net.c
@@ -208,6 +208,9 @@ int __maybe_unused net_busy_flag;
static int on_bootfile(const char *name, const char *value, enum env_op op,
int flags)
{
+ if ((flags H_ORIGIN_FLAGS) == H_PROGRAMMATIC)
+ return 0;
+
switch (op) {
case env_op_create:
case env_op_overwrite:
@@ -222,6 +225,92 @@ static int on_bootfile(const char *name, const char
*value, enum env_op op,
}
U_BOOT_ENV_CALLBACK(bootfile, on_bootfile);
+static int on_ipaddr(const char *name, const char *value, enum env_op op,
+ int flags)
+{
+ if ((flags H_ORIGIN_FLAGS) == H_PROGRAMMATIC)
+ return 0;
+
+ net_ip = string_to_ip(value);
+
+ return 0;
+}
+U_BOOT_ENV_CALLBACK(ipaddr, on_ipaddr);
+
+static int on_gatewayip(const char *name, const char *value, enum env_op op,
+ int flags)
+{
+ if ((flags H_ORIGIN_FLAGS) == H_PROGRAMMATIC)
+ return 0;
+
+ net_gateway = string_to_ip(value);
+
+ return 0;
+}
+U_BOOT_ENV_CALLBACK(gatewayip, on_gatewayip);
+
+static int on_netmask(const char *name, const char *value, enum env_op op,
+ int flags)
+{
+ if ((flags H_ORIGIN_FLAGS) == H_PROGRAMMATIC)
+ return 0;
+
+ net_netmask = string_to_ip(value);
+
+ return 0;
+}
+U_BOOT_ENV_CALLBACK(netmask, on_netmask);
+
+static int on_serverip(const char *name, const char *value, enum env_op op,
+ int flags)
+{
+ if ((flags H_ORIGIN_FLAGS) == H_PROGRAMMATIC)
+ return 0;
+
+ net_server_ip = string_to_ip(value);
+
+ return 0;
+}
+U_BOOT_ENV_CALLBACK(serverip, on_serverip);
+
+static int on_nvlan(const char *name, const char *value, enum env_op op,
+ int flags)
+{
+ if ((flags H_ORIGIN_FLAGS) == H_PROGRAMMATIC)
+ return 0;
+
+ net_native_vlan = string_to_vlan(value);
+
+ return 0;
+}
+U_BOOT_ENV_CALLBACK(nvlan, on_nvlan);
+
+static int on_vlan(const char *name, const char *value, enum env_op op,
+ int flags)
+{
+ if ((flags H_ORIGIN_FLAGS) == H_PROGRAMMATIC)
+ return 0;
+
+ net_our_vlan = string_to_vlan(value);
+
+ return 0;
+}
+U_BOOT_ENV_CALLBACK(vlan, on_vlan);
+
+#if defined(CONFIG_CMD_DNS)
+static int on_dnsip(const char *name, const char *value, enum env_op op,
+ int flags)
+{
+ if ((flags H_ORIGIN_FLAGS) == H_PROGRAMMATIC)
+ return 0;
+
+ net_dns_server = string_to_ip(value);
+
+ return 0;
+}
+U_BOOT_ENV_CALLBACK(dnsip, on_dnsip);
+#endif
+
/*
* Check if autoload is enabled. If so, use either NFS or TFTP to download
* the boot file.
@@ -252,22 +341,6 @@ void net_auto_load(void)
static void net_init_loop(void)
{
- static int env_changed_id;
- int env_id = get_env_id();
-
- /* update only when the environment has changed */
- if (env_changed_id != env_id) {
- net_ip = getenv_ip(ipaddr);
- net_gateway = getenv_ip(gatewayip);
- net_netmask = getenv_ip(netmask);
- net_server_ip = getenv_ip(serverip);
- net_native_vlan = getenv_vlan(nvlan);
- net_our_vlan = getenv_vlan(vlan);
-#if defined(CONFIG_CMD_DNS)
- net_dns_server = getenv_ip(dnsip);
-#endif
- env_changed_id = env_id;
- }
if (eth_get_dev())
[U-Boot] [PATCH 04/11] env: Fix return values in env_attr_lookup()
This function returned numbers for error codes. Change them to error
codes.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
common/env_attr.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/common/env_attr.c b/common/env_attr.c
index 64baca5..e791f44 100644
--- a/common/env_attr.c
+++ b/common/env_attr.c
@@ -148,10 +148,10 @@ int env_attr_lookup(const char *attr_list, const char
*name, char *attributes)
if (!attributes)
/* bad parameter */
- return -1;
+ return -EINVAL;
if (!attr_list)
/* list not found */
- return 1;
+ return -EINVAL;
entry = reverse_strstr(attr_list, name, NULL);
while (entry != NULL) {
@@ -209,5 +209,5 @@ int env_attr_lookup(const char *attr_list, const char
*name, char *attributes)
}
/* not found in list */
- return 2;
+ return -ENOENT;
}
--
1.7.11.5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 09/11] net: Apply default format rules to all ethaddr
Use a regular expression to apply the default formatting flags for all
ethaddr env vars.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
include/env_flags.h | 11 ---
test/dm/eth.c | 1 +
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/include/env_flags.h b/include/env_flags.h
index 3ef6311..fc6d0d8 100644
--- a/include/env_flags.h
+++ b/include/env_flags.h
@@ -38,13 +38,18 @@ enum env_flags_varaccess {
#endif
#ifdef CONFIG_CMD_NET
+#ifdef CONFIG_REGEX
+#define ETHADDR_WILDCARD \\d?
+#else
+#define ETHADDR_WILDCARD
+#endif
#ifdef CONFIG_ENV_OVERWRITE
-#define ETHADDR_FLAGS ethaddr:ma,
+#define ETHADDR_FLAGS eth ETHADDR_WILDCARD addr:ma,
#else
#ifdef CONFIG_OVERWRITE_ETHADDR_ONCE
-#define ETHADDR_FLAGS ethaddr:mc,
+#define ETHADDR_FLAGS eth ETHADDR_WILDCARD addr:mc,
#else
-#define ETHADDR_FLAGS ethaddr:mo,
+#define ETHADDR_FLAGS eth ETHADDR_WILDCARD addr:mo,
#endif
#endif
#else
diff --git a/test/dm/eth.c b/test/dm/eth.c
index 4891f3a..9b714a1 100644
--- a/test/dm/eth.c
+++ b/test/dm/eth.c
@@ -89,6 +89,7 @@ static int dm_test_eth_rotate(struct dm_test_state *dms)
/* Invalidate eth1's MAC address */
net_ping_ip = string_to_ip(1.1.2.2);
strcpy(ethaddr, getenv(eth1addr));
+ setenv(.flags, eth1addr);
setenv(eth1addr, NULL);
/* Make sure that the default is to rotate to the next interface */
--
1.7.11.5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 05/11] env: Simplify the reverse_strstr() interface
The logic to find the whole matching name was split needlessly between
the reverse_strstr function and its caller. Fully contain it to make the
interface for calling it more consistent.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
common/env_attr.c | 79 +--
1 file changed, 41 insertions(+), 38 deletions(-)
diff --git a/common/env_attr.c b/common/env_attr.c
index e791f44..d266142 100644
--- a/common/env_attr.c
+++ b/common/env_attr.c
@@ -109,33 +109,55 @@ int env_attr_walk(const char *attr_list,
}
/*
- * Search for the last matching string in another string with the option to
- * start looking at a certain point (i.e. ignore anything beyond that point).
+ * Search for the last exactly matching name in an attribute list
*/
-static char *reverse_strstr(const char *searched, const char *search_for,
- const char *searched_start)
+static int reverse_name_search(const char *searched, const char *search_for,
+ const char **result)
{
- char *result = NULL;
+ int result_size = 0;
+ const char *cur_searched = searched;
+
+ if (result)
+ *result = NULL;
if (*search_for == '\0')
return (char *)searched;
for (;;) {
- char *match = strstr(searched, search_for);
-
- /*
-* Stop looking if no new match is found or looking past the
-* searched_start pointer
-*/
- if (match == NULL || (searched_start != NULL
- match + strlen(search_for) searched_start))
+ const char *match = strstr(cur_searched, search_for);
+ const char *prevch;
+ const char *nextch;
+
+ /* Stop looking if no new match is found */
+ if (match == NULL)
break;
- result = match;
- searched = match + 1;
+ prevch = match - 1;
+ nextch = match + strlen(search_for);
+
+ /* Skip spaces */
+ while (*prevch == ' ')
+ prevch--;
+ while (*nextch == ' ')
+ nextch++;
+
+ /* Start looking past the current match so last is found */
+ cur_searched = match + 1;
+
+ /* Check for an exact match */
+ if (match != searched
+ *prevch != ENV_ATTR_LIST_DELIM)
+ continue;
+ if (*nextch != ENV_ATTR_SEP
+ *nextch != ENV_ATTR_LIST_DELIM
+ *nextch != '\0')
+ continue;
+
+ *result = match;
+ result_size = strlen(search_for);
}
- return result;
+ return result_size;
}
/*
@@ -145,6 +167,7 @@ static char *reverse_strstr(const char *searched, const
char *search_for,
int env_attr_lookup(const char *attr_list, const char *name, char *attributes)
{
const char *entry = NULL;
+ int entry_len;
if (!attributes)
/* bad parameter */
@@ -153,32 +176,12 @@ int env_attr_lookup(const char *attr_list, const char
*name, char *attributes)
/* list not found */
return -EINVAL;
- entry = reverse_strstr(attr_list, name, NULL);
- while (entry != NULL) {
- const char *prevch = entry - 1;
- const char *nextch = entry + strlen(name);
-
- /* Skip spaces */
- while (*prevch == ' ')
- prevch--;
- while (*nextch == ' ')
- nextch++;
-
- /* check for an exact match */
- if ((entry == attr_list ||
-*prevch == ENV_ATTR_LIST_DELIM)
- (*nextch == ENV_ATTR_SEP ||
-*nextch == ENV_ATTR_LIST_DELIM ||
-*nextch == '\0'))
- break;
-
- entry = reverse_strstr(attr_list, name, entry);
- }
+ entry_len = reverse_name_search(attr_list, name, entry);
if (entry != NULL) {
int len;
/* skip the name */
- entry += strlen(name);
+ entry += entry_len;
/* skip spaces */
while (*entry == ' ')
entry++;
--
1.7.11.5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 03/11] sandbox: Enable regex support
Enable regex support on sandbox. Signed-off-by: Joe Hershberger joe.hershber...@ni.com --- configs/sandbox_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index 5de7fbe..340f5eb 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -26,3 +26,4 @@ CONFIG_TPM_TIS_SANDBOX=y CONFIG_SOUND=y CONFIG_CMD_SOUND=y CONFIG_SOUND_SANDBOX=y +CONFIG_REGEX=y -- 1.7.11.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 11/11] net: Add default flags for common net env vars
Check that the common network stack's env vars conform to the proper
format for IP addresses.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
include/env_flags.h | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/include/env_flags.h b/include/env_flags.h
index fc6d0d8..2d2de88 100644
--- a/include/env_flags.h
+++ b/include/env_flags.h
@@ -52,8 +52,17 @@ enum env_flags_varaccess {
#define ETHADDR_FLAGS eth ETHADDR_WILDCARD addr:mo,
#endif
#endif
+#define NET_FLAGS \
+ ipaddr:i, \
+ gatewayip:i, \
+ netmask:i, \
+ serverip:i, \
+ nvlan:i, \
+ vlan:i, \
+ dnsip:i,
#else
-#define ETHADDR_FLAGS
+#define ETHADDR_FLAGS
+#define NET_FLAGS
#endif
#ifndef CONFIG_ENV_OVERWRITE
@@ -64,6 +73,7 @@ enum env_flags_varaccess {
#define ENV_FLAGS_LIST_STATIC \
ETHADDR_FLAGS \
+ NET_FLAGS \
SERIAL_FLAGS \
CONFIG_ENV_FLAGS_LIST_STATIC
--
1.7.11.5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 08/11] env: Distinguish finer between source of env change
We already could tell the difference in the callback between an import
and other which we called interactive. Now add further distinction
between interactive (i.e. running env set / env edit / env ask / etc.
from the U-Boot command line) and programmatic (i.e. when u-boot source
calls any variant of setenv() ).
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
common/cmd_nvedit.c | 26 +++---
include/search.h| 2 ++
2 files changed, 21 insertions(+), 7 deletions(-)
diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c
index 6ca5a2e..f4c2523 100644
--- a/common/cmd_nvedit.c
+++ b/common/cmd_nvedit.c
@@ -208,12 +208,11 @@ DONE:
* Set a new environment variable,
* or replace or delete an existing one.
*/
-static int _do_env_set(int flag, int argc, char * const argv[])
+static int _do_env_set(int flag, int argc, char * const argv[], int env_flag)
{
int i, len;
char *name, *value, *s;
ENTRY e, *ep;
- int env_flag = H_INTERACTIVE;
debug(Initial value for argc=%d\n, argc);
while (argc 1 **(argv + 1) == '-') {
@@ -291,9 +290,9 @@ int setenv(const char *varname, const char *varvalue)
return 1;
if (varvalue == NULL || varvalue[0] == '\0')
- return _do_env_set(0, 2, (char * const *)argv);
+ return _do_env_set(0, 2, (char * const *)argv, H_PROGRAMMATIC);
else
- return _do_env_set(0, 3, (char * const *)argv);
+ return _do_env_set(0, 3, (char * const *)argv, H_PROGRAMMATIC);
}
/**
@@ -347,7 +346,7 @@ static int do_env_set(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
if (argc 2)
return CMD_RET_USAGE;
- return _do_env_set(flag, argc, argv);
+ return _do_env_set(flag, argc, argv, H_INTERACTIVE);
}
/*
@@ -422,7 +421,7 @@ int do_env_ask(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
}
/* Continue calling setenv code */
- return _do_env_set(flag, len, local_args);
+ return _do_env_set(flag, len, local_args, H_INTERACTIVE);
}
#endif
@@ -588,6 +587,10 @@ static int do_env_edit(cmd_tbl_t *cmdtp, int flag, int
argc,
if (argc 2)
return CMD_RET_USAGE;
+ /* before import into hashtable */
+ if (!(gd-flags GD_FLG_ENV_READY))
+ return 1;
+
/* Set read buffer to initial value or empty sting */
init_val = getenv(argv[1]);
if (init_val)
@@ -598,7 +601,16 @@ static int do_env_edit(cmd_tbl_t *cmdtp, int flag, int
argc,
if (cli_readline_into_buffer(edit: , buffer, 0) 0)
return 1;
- return setenv(argv[1], buffer);
+ if (buffer[0] == '\0') {
+ const char * const _argv[3] = { setenv, argv[1], NULL };
+
+ return _do_env_set(0, 2, (char * const *)_argv, H_INTERACTIVE);
+ } else {
+ const char * const _argv[4] = { setenv, argv[1], buffer,
+ NULL };
+
+ return _do_env_set(0, 3, (char * const *)_argv, H_INTERACTIVE);
+ }
}
#endif /* CONFIG_CMD_EDITENV */
#endif /* CONFIG_SPL_BUILD */
diff --git a/include/search.h b/include/search.h
index 9701efb..343dbc3 100644
--- a/include/search.h
+++ b/include/search.h
@@ -120,5 +120,7 @@ extern int hwalk_r(struct hsearch_data *__htab, int
(*callback)(ENTRY *));
#define H_MATCH_SUBSTR (1 7) /* search for substring matches */
#define H_MATCH_REGEX (1 8) /* search for regular expression matches*/
#define H_MATCH_METHOD (H_MATCH_IDENT | H_MATCH_SUBSTR | H_MATCH_REGEX)
+#define H_PROGRAMMATIC (1 9) /* indicate that an import is from setenv() */
+#define H_ORIGIN_FLAGS (H_INTERACTIVE | H_PROGRAMMATIC)
#endif /* search.h */
--
1.7.11.5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 07/11] env: Add regex support to env_attrs
Allow the features that use env_attrs to specify regexs for the name
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
common/env_attr.c | 85 ++
include/env_callback.h | 10 --
2 files changed, 93 insertions(+), 2 deletions(-)
diff --git a/common/env_attr.c b/common/env_attr.c
index f0bf504..46f702c 100644
--- a/common/env_attr.c
+++ b/common/env_attr.c
@@ -11,6 +11,7 @@
#include linux/linux_string.h
#else
#include common.h
+#include slre.h
#endif
#include env_attr.h
@@ -109,6 +110,89 @@ int env_attr_walk(const char *attr_list,
return 0;
}
+#if defined(CONFIG_REGEX)
+struct regex_callback_priv {
+ const char *searched_for;
+ char *regex;
+ char *attributes;
+};
+
+static int regex_callback(const char *name, const char *attributes, void *priv)
+{
+ int retval = 0;
+ struct regex_callback_priv *cbp = (struct regex_callback_priv *)priv;
+ struct slre slre;
+ char regex[strlen(name) + 3];
+
+ /* Require the whole string to be described by the regex */
+ sprintf(regex, ^%s$, name);
+ if (slre_compile(slre, regex)) {
+ struct cap caps[slre.num_caps + 2];
+
+ if (slre_match(slre, cbp-searched_for,
+ strlen(cbp-searched_for), caps)) {
+ free(cbp-regex);
+ cbp-regex = malloc(strlen(regex) + 1);
+ if (cbp-regex) {
+ strcpy(cbp-regex, regex);
+ } else {
+ retval = -ENOMEM;
+ goto done;
+ }
+
+ free(cbp-attributes);
+ cbp-attributes = malloc(strlen(attributes) + 1);
+ if (cbp-attributes) {
+ strcpy(cbp-attributes, attributes);
+ } else {
+ retval = -ENOMEM;
+ free(cbp-regex);
+ cbp-regex = NULL;
+ goto done;
+ }
+ }
+ } else {
+ printf(Error compiling regex: %s\n, slre.err_str);
+ retval = EINVAL;
+ }
+done:
+ return retval;
+}
+
+/*
+ * Retrieve the attributes string associated with a single name in the list
+ * There is no protection on attributes being too small for the value
+ */
+int env_attr_lookup(const char *attr_list, const char *name, char *attributes)
+{
+ if (!attributes)
+ /* bad parameter */
+ return -EINVAL;
+ if (!attr_list)
+ /* list not found */
+ return -EINVAL;
+
+ struct regex_callback_priv priv;
+ int retval;
+
+ priv.searched_for = name;
+ priv.regex = NULL;
+ priv.attributes = NULL;
+ retval = env_attr_walk(attr_list, regex_callback, priv);
+ if (retval)
+ return retval; /* error */
+
+ if (priv.regex) {
+ strcpy(attributes, priv.attributes);
+ free(priv.attributes);
+ free(priv.regex);
+ /* success */
+ return 0;
+ }
+ return -ENOENT; /* not found in list */
+}
+#else
+
/*
* Search for the last exactly matching name in an attribute list
*/
@@ -219,3 +303,4 @@ int env_attr_lookup(const char *attr_list, const char
*name, char *attributes)
/* not found in list */
return -ENOENT;
}
+#endif
diff --git a/include/env_callback.h b/include/env_callback.h
index ab4e115..3de1093 100644
--- a/include/env_callback.h
+++ b/include/env_callback.h
@@ -31,12 +31,18 @@
#define SPLASHIMAGE_CALLBACK
#endif
+#ifdef CONFIG_REGEX
+#define ENV_DOT_ESCAPE \\
+#else
+#define ENV_DOT_ESCAPE
+#endif
+
/*
* This list of callback bindings is static, but may be overridden by defining
* a new association in the .callbacks environment variable.
*/
-#define ENV_CALLBACK_LIST_STATIC ENV_CALLBACK_VAR :callbacks, \
- ENV_FLAGS_VAR :flags, \
+#define ENV_CALLBACK_LIST_STATIC ENV_DOT_ESCAPE ENV_CALLBACK_VAR :callbacks,
\
+ ENV_DOT_ESCAPE ENV_FLAGS_VAR :flags, \
baudrate:baudrate, \
bootfile:bootfile, \
loadaddr:loadaddr, \
--
1.7.11.5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 06/11] env: Allow env_attr_walk to pass a priv * to callback
In some cases it can be helpful to have context in the callback about
the calling situation. This is needed for following patches.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
common/cmd_nvedit.c | 10 ++
common/env_attr.c | 15 ++-
common/env_callback.c | 6 +++---
common/env_flags.c| 6 +++---
include/env_attr.h| 10 +-
5 files changed, 27 insertions(+), 20 deletions(-)
diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c
index be792ae..6ca5a2e 100644
--- a/common/cmd_nvedit.c
+++ b/common/cmd_nvedit.c
@@ -427,7 +427,8 @@ int do_env_ask(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
#endif
#if defined(CONFIG_CMD_ENV_CALLBACK)
-static int print_static_binding(const char *var_name, const char
*callback_name)
+static int print_static_binding(const char *var_name, const char
*callback_name,
+ void *priv)
{
printf(\t%-20s %-20s\n, var_name, callback_name);
@@ -489,7 +490,7 @@ int do_env_callback(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
puts(Static callback bindings:\n);
printf(\t%-20s %-20s\n, Variable Name, Callback Name);
printf(\t%-20s %-20s\n, -, -);
- env_attr_walk(ENV_CALLBACK_LIST_STATIC, print_static_binding);
+ env_attr_walk(ENV_CALLBACK_LIST_STATIC, print_static_binding, NULL);
puts(\n);
/* walk through each variable and print the callback if it has one */
@@ -502,7 +503,8 @@ int do_env_callback(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
#endif
#if defined(CONFIG_CMD_ENV_FLAGS)
-static int print_static_flags(const char *var_name, const char *flags)
+static int print_static_flags(const char *var_name, const char *flags,
+ void *priv)
{
enum env_flags_vartype type = env_flags_parse_vartype(flags);
enum env_flags_varaccess access = env_flags_parse_varaccess(flags);
@@ -559,7 +561,7 @@ int do_env_flags(cmd_tbl_t *cmdtp, int flag, int argc, char
* const argv[])
Variable Access);
printf(\t%-20s %-20s %-20s\n, -, -,
---);
- env_attr_walk(ENV_FLAGS_LIST_STATIC, print_static_flags);
+ env_attr_walk(ENV_FLAGS_LIST_STATIC, print_static_flags, NULL);
puts(\n);
/* walk through each variable and print the flags if non-default */
diff --git a/common/env_attr.c b/common/env_attr.c
index d266142..f0bf504 100644
--- a/common/env_attr.c
+++ b/common/env_attr.c
@@ -26,7 +26,8 @@
* list = entry[,list]
*/
int env_attr_walk(const char *attr_list,
- int (*callback)(const char *name, const char *attributes))
+ int (*callback)(const char *name, const char *attributes, void *priv),
+ void *priv)
{
const char *entry, *entry_end;
char *name, *attributes;
@@ -93,7 +94,7 @@ int env_attr_walk(const char *attr_list,
if (strlen(name) != 0) {
int retval = 0;
- retval = callback(name, attributes);
+ retval = callback(name, attributes, priv);
if (retval) {
free(entry_cpy);
return retval;
@@ -120,8 +121,11 @@ static int reverse_name_search(const char *searched, const
char *search_for,
if (result)
*result = NULL;
- if (*search_for == '\0')
- return (char *)searched;
+ if (*search_for == '\0') {
+ if (result)
+ *result = searched;
+ return strlen(searched);
+ }
for (;;) {
const char *match = strstr(cur_searched, search_for);
@@ -153,7 +157,8 @@ static int reverse_name_search(const char *searched, const
char *search_for,
*nextch != '\0')
continue;
- *result = match;
+ if (result)
+ *result = match;
result_size = strlen(search_for);
}
diff --git a/common/env_callback.c b/common/env_callback.c
index d03fa03..f4d3dbd 100644
--- a/common/env_callback.c
+++ b/common/env_callback.c
@@ -90,7 +90,7 @@ static int clear_callback(ENTRY *entry)
/*
* Call for each element in the list that associates variables to callbacks
*/
-static int set_callback(const char *name, const char *value)
+static int set_callback(const char *name, const char *value, void *priv)
{
ENTRY e, *ep;
struct env_clbk_tbl *clbkp;
@@ -126,9 +126,9 @@ static int on_callbacks(const char *name, const char
*value, enum env_op op,
hwalk_r(env_htab, clear_callback);
/* configure any static callback bindings */
- env_attr_walk(ENV_CALLBACK_LIST_STATIC, set_callback);
+ env_attr_walk(ENV_CALLBACK_LIST_STATIC, set_callback, NULL);
Re: [U-Boot] [PATCH v2 77/80] dm: usb: Add tests for the USB uclass
Hi Joe,
On 21 April 2015 at 14:10, Joe Hershberger joe.hershber...@gmail.com wrote:
Hi Simon,
On Tue, Apr 21, 2015 at 12:00 PM, Simon Glass s...@chromium.org wrote:
Hi Joe,
On 21 April 2015 at 10:57, Joe Hershberger joe.hershber...@gmail.com wrote:
Hi Simon,
On Tue, Apr 21, 2015 at 11:19 AM, Simon Glass s...@chromium.org wrote:
Hi Joe,
On 21 April 2015 at 10:05, Joe Hershberger joe.hershber...@gmail.com
wrote:
Hi Simon,
On Tue, Apr 21, 2015 at 8:14 AM, Simon Glass s...@chromium.org wrote:
Hi Joe,
On 20 April 2015 at 23:24, Joe Hershberger joe.hershber...@gmail.com
wrote:
Hi Simon,
On Wed, Mar 25, 2015 at 1:23 PM, Simon Glass s...@chromium.org wrote:
This adds a simple test for probing and a functional test using the
flash
stick emulator, which tests a large chunk of the USB stack.
Signed-off-by: Simon Glass s...@chromium.org
I'm seeing a seg fault when running the dm tests and bisected it to
this patch.
I'm not sure why it's related, but it appears to seg fault on a GPIO
test...
--snip--
Thoughts?
Yes it is broken. I sent a series to fix this recent ('dm: core: Fix
up test failures') starting with this patch:
http://patchwork.ozlabs.org/patch/462556/
If you are able to test it that would be good.
I tested the series, but I still have a USB test failure...
Test: dm_test_usb_flash
USB-1: scanning bus 1 for devices... 2 USB Device(s) found
/home/joe/u-boot/test/dm/usb.c:45, dm_test_usb_flash(): 2 ==
dev_desc-block_read(dev_desc-dev, 0, 2, cmp): Expected 2, got 0
Have you seen that one?
No I don't see that. It is saying that it was not able to read 2
512-byte blocks from the testflash.bin file. It should be created by
the test script. I just tried it again.
That makes sense... I wasn't creating that file. D'oh! Working for me now
too.
BTW I'd like to get a sandbox network device that works in a purely
emulated way (i.e. without any reference to real hardware). Then we
could use it for ping tests, etc. and they would run instantly. At
present the network tests are quite slow. What do you think?
The tests are all using fully emulated Ethernet... the issue is that
the ping test ensures that on timeout an error is returned. Even
though it is an emulated MAC, the timeout in the network stack is
still there.
I'll work on a patch that adds a way to change the ping timeout to
make this faster.
OK thanks for explaining this. Rather than changing the ping timeout,
can you look at changing the time? With sandbox it should be possible
to adjust the time so that timeouts appear to happen instantly. The
arch/sandbox/include/test.h file has some test functions used by
various parts of the stack.
I posted a series that handles the issue as you recommended and called
it test: Speed up test timeouts by advancing time.
I see it. This is great, thank you!
I now notice that the only test that takes any time is the USB Flash test.
Test: dm_test_usb_flash
USB-1: scanning bus 1 for devices... 2 USB Device(s) found
It takes about 3 seconds. Is that a timeout too?
Yes. I'll take a look at how you have advanced time - we should do
this for USB too.
Regards,
Simon
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 77/80] dm: usb: Add tests for the USB uclass
Hi Simon,
On Tue, Apr 21, 2015 at 12:00 PM, Simon Glass s...@chromium.org wrote:
Hi Joe,
On 21 April 2015 at 10:57, Joe Hershberger joe.hershber...@gmail.com wrote:
Hi Simon,
On Tue, Apr 21, 2015 at 11:19 AM, Simon Glass s...@chromium.org wrote:
Hi Joe,
On 21 April 2015 at 10:05, Joe Hershberger joe.hershber...@gmail.com
wrote:
Hi Simon,
On Tue, Apr 21, 2015 at 8:14 AM, Simon Glass s...@chromium.org wrote:
Hi Joe,
On 20 April 2015 at 23:24, Joe Hershberger joe.hershber...@gmail.com
wrote:
Hi Simon,
On Wed, Mar 25, 2015 at 1:23 PM, Simon Glass s...@chromium.org wrote:
This adds a simple test for probing and a functional test using the
flash
stick emulator, which tests a large chunk of the USB stack.
Signed-off-by: Simon Glass s...@chromium.org
I'm seeing a seg fault when running the dm tests and bisected it to
this patch.
I'm not sure why it's related, but it appears to seg fault on a GPIO
test...
--snip--
Thoughts?
Yes it is broken. I sent a series to fix this recent ('dm: core: Fix
up test failures') starting with this patch:
http://patchwork.ozlabs.org/patch/462556/
If you are able to test it that would be good.
I tested the series, but I still have a USB test failure...
Test: dm_test_usb_flash
USB-1: scanning bus 1 for devices... 2 USB Device(s) found
/home/joe/u-boot/test/dm/usb.c:45, dm_test_usb_flash(): 2 ==
dev_desc-block_read(dev_desc-dev, 0, 2, cmp): Expected 2, got 0
Have you seen that one?
No I don't see that. It is saying that it was not able to read 2
512-byte blocks from the testflash.bin file. It should be created by
the test script. I just tried it again.
That makes sense... I wasn't creating that file. D'oh! Working for me now
too.
BTW I'd like to get a sandbox network device that works in a purely
emulated way (i.e. without any reference to real hardware). Then we
could use it for ping tests, etc. and they would run instantly. At
present the network tests are quite slow. What do you think?
The tests are all using fully emulated Ethernet... the issue is that
the ping test ensures that on timeout an error is returned. Even
though it is an emulated MAC, the timeout in the network stack is
still there.
I'll work on a patch that adds a way to change the ping timeout to
make this faster.
OK thanks for explaining this. Rather than changing the ping timeout,
can you look at changing the time? With sandbox it should be possible
to adjust the time so that timeouts appear to happen instantly. The
arch/sandbox/include/test.h file has some test functions used by
various parts of the stack.
I posted a series that handles the issue as you recommended and called
it test: Speed up test timeouts by advancing time.
I now notice that the only test that takes any time is the USB Flash test.
Test: dm_test_usb_flash
USB-1: scanning bus 1 for devices... 2 USB Device(s) found
It takes about 3 seconds. Is that a timeout too?
Thanks,
-Joe
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/6] common/cmd_boot: keep ARM v7M in thumb mode during do_go_exec()
Hi, On Tue, Apr 21, 2015 at 03:07:48PM -0400, Tom Rini wrote: On Tue, Apr 21, 2015 at 01:05:24PM -0500, Felipe Balbi wrote: On Tue, Apr 21, 2015 at 02:01:31PM -0400, Matt Porter wrote: On Tue, Apr 21, 2015 at 12:47:24PM -0500, Felipe Balbi wrote: On Tue, Apr 21, 2015 at 01:36:54PM -0400, Matt Porter wrote: On ARM v7M, the processor will return to ARM mode when executing a blx instruction with bit 0 of the address == 0. Always set it but that's what the 'x' is for, right ? eXchange the CPU mode. Yes. to 1 to stay in thumb mode. Signed-off-by: Matt Porter mpor...@konsulko.com --- common/cmd_boot.c | 4 1 file changed, 4 insertions(+) diff --git a/common/cmd_boot.c b/common/cmd_boot.c index 8f2e070..20ce652 100644 --- a/common/cmd_boot.c +++ b/common/cmd_boot.c @@ -38,6 +38,10 @@ static int do_go(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) * pass address parameter as argv[0] (aka command name), * and all remaining args */ +#ifdef CONFIG_CPU_V7M + /* For ARM V7M, set bit zero to stay in Thumb mode */ + addr++; +#endif what if we were in ARM state when we reached this point ? You're now telling CPU to always switch to Thumb. Is this really what we want ? We have no ARM state on this core so that's not possible. From ARM's instruction manual: The BX and BLX instructions can change the processor state from ARM to Thumb, or from Thumb to ARM. BLX label always changes the state. BX Rm and BLX Rm derive the target state from bit[0] of Rm: if bit[0] of Rm is 0, the processor changes to, or remains in, ARM state if bit[0] of Rm is 1, the processor changes to, or remains in, Thumb state. Correct. The last statement is why this patch exists. There is no ARM mode on M3, we immediately fault. Having bit[0]=0 for BX/BLX is not permitted on V7M...something not covered in the generic description of these instructions. it just seems weird that bit0 wouldn't just be assume 1 by the core itself. I suppose as a consequence we can't use blx label with v7m either ? :-s At issue is that the code really reads like this (expanding the functions a little bit: printf (## Starting application at 0x%08lX ...\n, addr); rc = (void *)addr(argc - 1, argv + 1); So the compiler translates this as do what I say and generates a branch to whatever addr is. yeah, you're right. There's nothing the compiler can do. Well, it could refuse from using bx/blx instructions, would a 'bl' do the same thing in this particular case ? (yes, off-topic, sorry) If people really feel strongly about it being too wierd to do addr |= 1 in the common code, do_go_exec is a weak function and we can put something into arch/arm/lib/ (new file) that provides a do_go_exec for Cortex-M and that ensures that we have the right bit set for the branch instruction that will be generated. I think that's probably a lot clearer, yes. -- balbi signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Question regarding MLO size
On Tue, Apr 21, 2015 at 12:23 PM, Tom Rini tr...@konsulko.com wrote: Sadly it may make sense to move some SPL-only functions out into a file that is only built/linked for SPL due to this bug. Ah---that is a funky bug. Is it reasonable to wrap the offending lines in a #ifndef CONFIG_SPL_BUILD u-boot code with strings that bloat SPL #endif // CONFIG_SPL_BUILD ? Would this restrict it to be included only in u-boot (where the code is needed) rather than getting unnecessarily pulled into SPL? --Ash ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] integrator: switch to DM serial port
Hi Linus,
On 21 April 2015 at 07:36, Linus Walleij linus.wall...@linaro.org wrote:
This switches the Integrator boards over to using the device model
for its serial ports.
Cc: Masahiro Yamada yamada.masah...@socionext.com
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
board/armltd/integrator/integrator.c | 18 ++
include/configs/integrator-common.h | 8
include/configs/integratorap.h | 11 ---
include/configs/integratorcp.h | 9 -
4 files changed, 26 insertions(+), 20 deletions(-)
diff --git a/board/armltd/integrator/integrator.c
b/board/armltd/integrator/integrator.c
index e94ac850c751..cbe706170d0f 100644
--- a/board/armltd/integrator/integrator.c
+++ b/board/armltd/integrator/integrator.c
@@ -20,11 +20,29 @@
#include common.h
#include netdev.h
#include asm/io.h
+#include dm/platdata.h
+#include dm/platform_data/serial_pl01x.h
#include arm-ebi.h
#include integrator-sc.h
DECLARE_GLOBAL_DATA_PTR;
+static const struct pl01x_serial_platdata serial_platdata = {
+ .base = 0x1600,
+#ifdef CONFIG_ARCH_CINTEGRATOR
+ .type = TYPE_PL011,
+ .clock = 14745600,
+#else
+ .type = TYPE_PL010,
+ .clock = 0, /* Not used for PL010 */
+#endif
+};
+
+U_BOOT_DEVICE(integrator_serials) = {
+ .name = serial_pl01x,
+ .platdata = serial_platdata,
+};
+
void peripheral_power_enable (void);
#if defined(CONFIG_SHOW_BOOT_PROGRESS)
diff --git a/include/configs/integrator-common.h
b/include/configs/integrator-common.h
index 4362925ae1e1..13ee580c91bd 100644
--- a/include/configs/integrator-common.h
+++ b/include/configs/integrator-common.h
@@ -21,6 +21,14 @@
#define CONFIG_SYS_MAXARGS 16 /* max number of command args
*/
#define CONFIG_SYS_BARGSIZECONFIG_SYS_CBSIZE /* Boot Argument
Buffer Size*/
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) /* Size
of malloc() pool */
+#define CONFIG_SYS_MALLOC_F_LEN0x2000
This should be in your defconfig file, as it is defined in Kconfig now.
+
+/* Serial port PL010/PL011 through the device model */
+#define CONFIG_DM
+#define CONFIG_DM_SERIAL
And those two also.
+#define CONFIG_PL01X_SERIAL
+#define CONFIG_BAUDRATE38400
+#define CONFIG_CONS_INDEX 0
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h
index e168c8c9ba57..567fd361bd69 100644
--- a/include/configs/integratorap.h
+++ b/include/configs/integratorap.h
@@ -22,17 +22,6 @@
#define CONFIG_SYS_HZ_CLOCK2400/* Timer 1 is clocked
at 24Mhz */
/*
- * PL010 Configuration
- */
-#define CONFIG_PL010_SERIAL
-#define CONFIG_CONS_INDEX 0
-#define CONFIG_BAUDRATE38400
-#define CONFIG_PL01x_PORTS { (void *) (CONFIG_SYS_SERIAL0), (void *)
(CONFIG_SYS_SERIAL1) }
-#define CONFIG_SYS_SERIAL0 0x1600
-#define CONFIG_SYS_SERIAL1 0x1700
-
-
-/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h
index 7c1ef2483ea2..7727b4e08eef 100644
--- a/include/configs/integratorcp.h
+++ b/include/configs/integratorcp.h
@@ -29,15 +29,6 @@
#define CONFIG_SMC9_BASE0xC800
#undef CONFIG_SMC9_EXT_PHY
-/* PL011 configuration */
-#define CONFIG_PL011_SERIAL
-#define CONFIG_PL011_CLOCK 14745600
-#define CONFIG_PL01x_PORTS { (void *)CONFIG_SYS_SERIAL0, (void
*)CONFIG_SYS_SERIAL1 }
-#define CONFIG_CONS_INDEX 0
-#define CONFIG_BAUDRATE38400
-#define CONFIG_SYS_SERIAL0 0x1600
-#define CONFIG_SYS_SERIAL1 0x1700
-
/*
* Command line configuration.
*/
--
1.9.3
Regards,
Simon
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
