[U-Boot] [PATCH] lib: fdt: fix indent of #ifdef..#endif conditional
Match the depth of indentation between #ifdef and #endif
for better readability.
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
---
lib/fdtdec.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index a954051..48667ef 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1167,7 +1167,7 @@ int fdtdec_setup(void)
# else
/* FDT is at end of image */
gd-fdt_blob = (ulong *)_end;
-#endif
+# endif
# elif defined(CONFIG_OF_HOSTFILE)
if (sandbox_read_fdt_from_file()) {
puts(Failed to read control FDT\n);
--
1.9.1
___
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Re: [U-Boot] [PATCH resend V2 1/3] mtd: nand: mxs support oobsize bigger than 512
On Fri, Jul 31, 2015 at 09:36:45PM -0500, Scott Wood wrote: On Sat, 2015-08-01 at 09:15 +0800, Peng Fan wrote: On Fri, Jul 31, 2015 at 12:07:50PM -0500, Scott Wood wrote: On Tue, 2015-07-21 at 16:15 +0800, Peng Fan wrote: If ecc chunk data size is 512 and oobsize is bigger than 512, there is a chance that block_mark_bit_offset conflicts with bch ecc area. The following graph is modified from kernel gpmi-nand.c driver with each data block 512 bytes. We can see that Block Mark conflicts with ecc area from bch view. We can enlarge the ecc chunk size to avoid this problem to those oobsize which is larger than 512. Enlarge it by how much? What does the layout look like in that case? Enlarge it to 1024 bytes. Then say so in the changelog. You mean I need to add this in commit msg and send out a new patch version? Or you pick this one? In normal case the Block Mark bit should locates at the data part, but not at the ECC area. It seems like either would be bad... No. To read/write with ecc enabled, the block mark will be swapped with byte in metadata area. This is correct way for GPMI + BCH to perform nand reading/writing with ecc enabled. See following: 645 /* Read DMA completed, now do the mark swapping. */ 646 mxs_nand_swap_block_mark(mtd, nand_info-data_buf, nand_info-oob_buf); When GPMI + BCH used for DMA read, meta data will be stored to oob_buf. Then swap the data at Block Mark with data at oob_buf[0](actually metadata[0]). Before DMA write, Block Mark will be swapped with metadata[0]. Then DMA write. Then Block Mark should not conlicts with ECC area, but ok with DATA area. Anyway Block Mark should be aways points to bit at a data block. You can take the following as an example. | P| |-| | | | (Block Mark) | | P' | | | | |---| D | | O'| | |-| |-| V V V V V +---+---+-+---+-+---+ | M | data|E| data data |E| | +---+---+-+---+-+---+ ^ ^ | O| || | P| |-| | | |(Block Mark) | | P' | | | | |---| D | | O'| | |-| |-| V V V V V +---+--+-+--+-+--+-+--+-+ ---+ | M | data |E| data |E| data |E| data |E| | +---+--+-+--+-+--+-+--+-+ ---+ ^ ^ | O | |-- --| P : the page size for BCH module. E : The ECC strength. G : the length of Galois Field. N : The chunk count of per page. M : the metasize of per page. C : the ecc chunk size, aka the data above. P': the nand chip's page size. O : the nand chip's oob size. O': the free oob. D is in the diagram but not the key. G, N, and C are in the key but not the diagram. C is ecc chunk data size, same the data area. Here it is 512 bytes. N is chunk count. for exmaple page size is 2048 bytes, ecc chunk data size is 512 bytes, then N is 2048/512. G is the Galois Field, its value is 13 or 14. The should be got from reference mannual. D is in the digram , but not the key. I think it is enougth to show why this patch is done. I put the digram here to show that Block Mark may conflicts with ECC area, and this is wrong, we need to find a way to avoid this. And the way is to enlarge the ecc chunk data size from 512 to 1024 bytes. I did not put the
[U-Boot] [PATCH v2 14/15] of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL
As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are actually two boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig But they were enabled by mistake. Commit 47a785a9dd97 (dts: Disable device tree for SPL on all boards) missed to add CONFIG_SPL_DISABLE_OF_CONTROL on those two boards. They were silently enabled with OF_CONTROL on SPL without notifying their maintainers. After all, there exist no boards to support it in a justified process. Before being too late, delete all the defines in defconfig files and 'select's in Kconfig, and invert the logic. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- Changes in v2: - Rebase on commit cc35734358540a1 arch/arm/Kconfig | 3 --- arch/arm/cpu/armv7/exynos/Kconfig| 8 arch/arm/cpu/armv7/s5pc1xx/Kconfig | 2 -- arch/arm/mach-tegra/Kconfig | 1 - common/spl/spl.c | 2 +- configs/am335x_boneblack_vboot_defconfig | 1 - configs/arches_defconfig | 1 - configs/canyonlands_defconfig| 1 - configs/galileo_defconfig| 1 - configs/microblaze-generic_defconfig | 1 - configs/odroid_defconfig | 1 - configs/origen_defconfig | 1 - configs/s5pc210_universal_defconfig | 1 - configs/socfpga_socrates_defconfig | 1 - configs/trats2_defconfig | 1 - configs/trats_defconfig | 1 - dts/Kconfig | 6 +++--- include/config_uncmd_spl.h | 2 +- include/fdtdec.h | 2 +- lib/Makefile | 8 +++- scripts/Makefile.uncmd_spl | 2 +- 21 files changed, 14 insertions(+), 33 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9127ace..6a8d8ba 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -651,7 +651,6 @@ config ARCH_SUNXI select DM_USB select OF_CONTROL select OF_SEPARATE - select SPL_DISABLE_OF_CONTROL select USB select USB_STORAGE @@ -676,7 +675,6 @@ config ARCH_ZYNQ select CPU_V7 select SUPPORT_SPL select OF_CONTROL - select SPL_DISABLE_OF_CONTROL select DM select DM_SPI select DM_SPI_FLASH @@ -806,7 +804,6 @@ config ARCH_UNIPHIER select DM select DM_SERIAL select DM_I2C - select SPL_DISABLE_OF_CONTROL help Support for UniPhier SoC family developed by Socionext Inc. (formerly, System LSI Business Division of Panasonic Corporation) diff --git a/arch/arm/cpu/armv7/exynos/Kconfig b/arch/arm/cpu/armv7/exynos/Kconfig index 4a7d82f..09cde42 100644 --- a/arch/arm/cpu/armv7/exynos/Kconfig +++ b/arch/arm/cpu/armv7/exynos/Kconfig @@ -8,7 +8,6 @@ config TARGET_SMDKV310 select SUPPORT_SPL bool Exynos4210 SMDKV310 board select OF_CONTROL - select SPL_DISABLE_OF_CONTROL config TARGET_TRATS bool Exynos4210 Trats board @@ -29,7 +28,6 @@ config TARGET_ODROID config TARGET_ODROID_XU3 bool Exynos5422 Odroid board select OF_CONTROL - select SPL_DISABLE_OF_CONTROL config TARGET_ARNDALE bool Exynos5250 Arndale board @@ -37,37 +35,31 @@ config TARGET_ARNDALE select CPU_V7_HAS_VIRT select SUPPORT_SPL select OF_CONTROL - select SPL_DISABLE_OF_CONTROL config TARGET_SMDK5250 bool SMDK5250 board select SUPPORT_SPL select OF_CONTROL - select SPL_DISABLE_OF_CONTROL config TARGET_SNOW bool Snow board select SUPPORT_SPL select OF_CONTROL - select SPL_DISABLE_OF_CONTROL config TARGET_SMDK5420 bool SMDK5420 board select SUPPORT_SPL select OF_CONTROL - select SPL_DISABLE_OF_CONTROL config TARGET_PEACH_PI bool Peach Pi board select SUPPORT_SPL select OF_CONTROL - select SPL_DISABLE_OF_CONTROL config TARGET_PEACH_PIT bool Peach Pit board select SUPPORT_SPL select OF_CONTROL - select SPL_DISABLE_OF_CONTROL endchoice diff --git a/arch/arm/cpu/armv7/s5pc1xx/Kconfig b/arch/arm/cpu/armv7/s5pc1xx/Kconfig index 792ef59..04acdaa 100644 --- a/arch/arm/cpu/armv7/s5pc1xx/Kconfig +++ b/arch/arm/cpu/armv7/s5pc1xx/Kconfig @@ -7,12 +7,10 @@ choice config TARGET_S5P_GONI bool S5P Goni board select OF_CONTROL - select SPL_DISABLE_OF_CONTROL config TARGET_SMDKC100 bool Support smdkc100 board select OF_CONTROL - select SPL_DISABLE_OF_CONTROL endchoice diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index ba0b865..a5b7e0d 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -5,7 +5,6 @@ config
[U-Boot] [PATCH v2 15/15] of: clean up OF_CONTROL ifdef conditionals
We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing
devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear
away the ugly logic in include/fdtdec.h:
#ifdef CONFIG_OF_CONTROL
# if defined(CONFIG_SPL_BUILD) !defined(SPL_OF_CONTROL)
# define OF_CONTROL 0
# else
# define OF_CONTROL 1
# endif
#else
# define OF_CONTROL 0
#endif
Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to
CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for
SPL.
Also, we no longer have to cancel CONFIG_OF_CONTROL in
include/config_uncmd_spl.h and scripts/Makefile.spl.
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
---
Changes in v2: None
arch/arm/cpu/armv7/am33xx/board.c| 2 +-
arch/arm/cpu/armv7/exynos/pinmux.c | 2 +-
arch/arm/include/asm/arch-exynos/dwmmc.h | 2 --
arch/arm/include/asm/arch-exynos/mipi_dsim.h | 2 --
arch/arm/include/asm/arch-exynos/mmc.h | 2 --
arch/arm/mach-tegra/clock.c | 4 ++--
arch/arm/mach-tegra/tegra114/clock.c | 4 ++--
arch/arm/mach-tegra/tegra124/clock.c | 4 ++--
arch/arm/mach-tegra/tegra20/clock.c | 4 ++--
arch/arm/mach-tegra/tegra30/clock.c | 4 ++--
board/xilinx/microblaze-generic/microblaze-generic.c | 2 +-
board/xilinx/zynq/board.c| 2 +-
common/cli.c | 4 ++--
common/spl/spl.c | 3 +--
drivers/core/Makefile| 6 +++---
drivers/core/device.c| 4 ++--
drivers/core/lists.c | 2 +-
drivers/core/root.c | 6 +++---
drivers/gpio/mxc_gpio.c | 2 +-
drivers/gpio/vybrid_gpio.c | 2 +-
drivers/i2c/s3c24x0_i2c.c| 4 ++--
drivers/input/Makefile | 2 +-
drivers/input/tegra-kbc.c| 2 +-
drivers/mmc/exynos_dw_mmc.c | 2 +-
drivers/mmc/s5p_sdhci.c | 2 +-
drivers/mmc/tegra_mmc.c | 2 +-
drivers/mmc/zynq_sdhci.c | 2 +-
drivers/mtd/spi/sf_probe.c | 6 +++---
drivers/net/xilinx_emaclite.c| 2 +-
drivers/net/zynq_gem.c | 2 +-
drivers/power/exynos-tmu.c | 2 +-
drivers/power/pmic/pmic_max77686.c | 4 ++--
drivers/serial/ns16550.c | 2 +-
drivers/serial/serial-uclass.c | 4 ++--
drivers/serial/serial_omap.c | 2 +-
drivers/serial/serial_pl01x.c| 2 +-
drivers/serial/serial_tegra.c| 4 ++--
drivers/serial/serial_uniphier.c | 2 +-
drivers/serial/serial_zynq.c | 2 +-
drivers/sound/max98095.c | 2 +-
drivers/sound/wm8994.c | 2 +-
drivers/tpm/tpm_tis_i2c.c| 2 +-
drivers/video/exynos_dp.c| 4 ++--
drivers/video/exynos_dp_lowlevel.c | 2 +-
drivers/video/exynos_fb.c| 8
drivers/video/exynos_fimd.c | 4 ++--
drivers/video/exynos_mipi_dsi.c | 4 ++--
drivers/video/tegra.c| 2 +-
include/cli.h| 2 +-
include/config_uncmd_spl.h | 3 ---
include/configs/microblaze-generic.h | 3 ++-
include/configs/socfpga_common.h | 2 +-
include/dm/device.h | 4 ++--
include/fdtdec.h | 10 --
lib/Makefile | 11 ---
lib/fdtdec.c | 2 +-
scripts/Makefile.uncmd_spl | 3 ---
57 files changed, 79 insertions(+), 104 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/board.c
b/arch/arm/cpu/armv7/am33xx/board.c
index 67bef23..089b4d0 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -61,7 +61,7 @@ U_BOOT_DEVICES(am33xx_gpios) = {
#endif
};
-# ifndef CONFIG_OF_CONTROL
+# if !CONFIG_IS_ENABLED(OF_CONTROL)
/*
* TODO(s...@chromium.org): When we can move SPL serial to DM, we can remove
* the CONFIGs. At the same time, we should move this to the board files.
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
b/arch/arm/cpu/armv7/exynos/pinmux.c
index be43e22..130a844 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++
[U-Boot] [PATCH v2 00/15] Add macros to ease our life with independent CONFIGs between U-Boot and SPL
Refer to Simon's question, too: http://lists.denx.de/pipermail/u-boot/2015-July/219598.html Since U-boot introduced SPL (not since Kconfig), enabling features for U-boot and SPL independently is always a PITA. - decide if each feature should be supported for SPL or not - Add CONFIG_SPL_FRED_SUPPORT into Makefile.spl - Add #undef include/config_uncmd_spl.h to disable features we do not want to support on SPL - Add ifdef CONFIG_SPL_BUILD ... endif here and there to adjust things - Add #ifdef CONFIG_SPL_BUILD ... #endif here and there to fix things up Things are getting more and more crappy. When U-boot switched to Kconfig, first I introduced separate .config (.config, spl/.config, tpl/.config) to clean up them. But it turned out to be a pain. So, I believe the current single .config is much better. But I also admit we need something systematic to subdue our PITA. One possibility is to support spl-y in makefiles. (This idea is cribbed from barebox.) obj-$(CONFIG_FOO) += foo.o spl-$(CONFIG_SPL_FOO) += foo.o is cleaner than ifdef CONFIG_SPL_BUILD obj-$(CONFIG_SPL_FOO) += foo.o else obj-$(CONFIG_FOO) += foo.o endif It is a nice improvement in makefile side. But we still need to do something with C files. Another option is something like CONFIG_FOO=yyn (yes for U-boot, yes for SPL, no for TPL) To achieve this, I think a big operation is needed in Kconfig core. I cannot do that. (Of course, Patches are welcome if someone else can do that.) So, I was thinking of something different. My idea was inspired by IS_ENABLED() macro in include/linux/kconfig.h. Linux defines different macros for built-in and module, and it is possible to write #if IS_ENABLED(CONFIG_FOO) ... #endif instead of #if defined(CONFIG_FOO) || defined(CONFIG_FOO_MODULE) ... #endif So, I'd like to propose new macros to write code like #if CONFIG_IS_ENABLED(FOO) ... #endif instead of #if (!defined(CONFIG_SPL_BUILD) defined(CONFIG_FOO)) || \ (defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_FOO)) ... #endif I hope this series will make our life easier. The result of buildman: Summary of 16 commits for 1092 boards (8 threads, 1 job per thread) 01: Merge branch 'master' of git://git.denx.de/u-boot-tegra sh: + sh7753evb sh7785lcr_32bit sh7785lcr nios2: + nios2-generic arm: + openrd_base axm openrd_ultimate openrd_client zynq_zc70x taurus powerpc: + ebony taihu ocotea TQM834x taishan katmai alpr 02: kbuild: fixdep: optimize code slightly 03: kbuild: add a makefile macro useful with per-image config options 04: linux/kconfig.h: add CPP macros useful for per-image config options 05: spl: move SPL driver entries to driver/Makefile 06: dm: unify obj-$(CONFIG_DM) and obj-$(CONFIG_SPL_DM) entries 07: clk: rename CONFIG_SPL_CLK_SUPPORT to CONFIG_SPL_CLK 08: clk: unify obj-$(CONFIG_CLK) and obj-$(CONFIG_SPL_CLK) entries 09: ram: rename CONFIG_SPL_RAM_SUPPORT to CONFIG_SPL_RAM 10: ram: unify obj-$(CONFIG_RAM) and obj-$(CONFIG_SPL_RAM) entries 11: led: rename CONFIG_SPL_LED_SUPPORT to CONFIG_SPL_LED 12: led: unify obj-$(CONFIG_LED) and obj-$(CONFIG_SPL_LED) entries 13: dm: drop CONFIG_DM_DEVICE_REMOVE from uncmd list 14: fdtdec: fix OF_CONTROL switch 15: of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL 16: of: clean up OF_CONTROL ifdef conditionals Masahiro Yamada (15): kbuild: fixdep: optimize code slightly kbuild: add a makefile macro useful with per-image config options linux/kconfig.h: add CPP macros useful for per-image config options spl: move SPL driver entries to driver/Makefile dm: unify obj-$(CONFIG_DM) and obj-$(CONFIG_SPL_DM) entries clk: rename CONFIG_SPL_CLK_SUPPORT to CONFIG_SPL_CLK clk: unify obj-$(CONFIG_CLK) and obj-$(CONFIG_SPL_CLK) entries ram: rename CONFIG_SPL_RAM_SUPPORT to CONFIG_SPL_RAM ram: unify obj-$(CONFIG_RAM) and obj-$(CONFIG_SPL_RAM) entries led: rename CONFIG_SPL_LED_SUPPORT to CONFIG_SPL_LED led: unify obj-$(CONFIG_LED) and obj-$(CONFIG_SPL_LED) entries dm: drop CONFIG_DM_DEVICE_REMOVE from uncmd list fdtdec: fix OF_CONTROL switch of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL of: clean up OF_CONTROL ifdef conditionals arch/arm/Kconfig | 3 -- arch/arm/cpu/armv7/am33xx/board.c | 2 +- arch/arm/cpu/armv7/exynos/Kconfig | 8 arch/arm/cpu/armv7/exynos/pinmux.c | 2 +- arch/arm/cpu/armv7/s5pc1xx/Kconfig | 2 - arch/arm/include/asm/arch-exynos/dwmmc.h | 2 - arch/arm/include/asm/arch-exynos/mipi_dsim.h | 2 - arch/arm/include/asm/arch-exynos/mmc.h | 2 - arch/arm/mach-tegra/Kconfig| 1 - arch/arm/mach-tegra/clock.c| 4 +- arch/arm/mach-tegra/tegra114/clock.c | 4 +-
Re: [U-Boot] [PATCH 01/16] ARM: remove vpac270 board support
Hi Marek, On 28 July 2015 at 09:57, Marek Vasut ma...@denx.de wrote: On Tuesday, July 28, 2015 at 05:53:10 PM, Masahiro Yamada wrote: [...] $ git describe v2015.07-307-g2647394 $ make vpac270_ond_256_defconfig # # configuration written to .config # $ make -s CROSS_COMPILE=arm-unknown-linux-gnueabi- = WARNING == Please convert this board to generic board. Otherwise it will be removed by the end of 2014. See doc/README.generic-board for further information $ ls -l spl/u-boot-spl.bin -rwxrwxr-x 1 masahiro masahiro 2828 Jul 28 00:53 spl/u-boot-spl.bin It is over 2KB. So the hardware spilt already? Aww :-( I wonder, maybe converting this to TPL might be the correct solution ? Maybe, if you could split it into two images. I think I might need TPL and SPL: TPL: Load the SDRAM init code into CPU's SRAM from the OneNAND SPL: Load big U-Boot from OneNAND into the main SDRAM ... or maybe we should just sacrifice the machine in the name of progress and be done with it. I don't know when I might have time to fix it afterall. Well it sounds like it is already broken. It worries me that SPL has somehow got larger though - any reason for that? Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] arm: Correct comments in crt0.S for the recent SPL improvements
The current comments need a bit of tweaking since we now support stack
and global_data relocation in SPL. Also add a reference to the README.
For AArch64 this is not implemented, so leave a TODO for this.
Signed-off-by: Simon Glass s...@chromium.org
Reported-by: Tim Harvey thar...@gateworks.com
---
arch/arm/lib/crt0.S| 26 --
arch/arm/lib/crt0_64.S | 30 --
2 files changed, 36 insertions(+), 20 deletions(-)
diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index afd4f10..4c3a94a 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -25,7 +25,8 @@
*the GD ('global data') structure, both located in some readily
*available RAM (SRAM, locked cache...). In this context, VARIABLE
*global data, initialized or not (BSS), are UNAVAILABLE; only
- *CONSTANT initialized data are available.
+ *CONSTANT initialized data are available. GD should be zeroed
+ *before board_init_f() is called.
*
* 2. Call board_init_f(). This function prepares the hardware for
*execution from system RAM (DRAM, DDR...) As system RAM may not
@@ -34,24 +35,29 @@
*data include the relocation destination, the future stack, and
*the future GD location.
*
- * (the following applies only to non-SPL builds)
- *
* 3. Set up intermediate environment where the stack and GD are the
*ones allocated by board_init_f() in system RAM, but BSS and
*initialized non-const data are still not available.
*
- * 4. Call relocate_code(). This function relocates U-Boot from its
- *current location into the relocation destination computed by
- *board_init_f().
+ * 4a.For U-Boot proper (not SPL), call relocate_code(). This function
+ *relocates U-Boot from its current location into the relocation
+ *destination computed by board_init_f().
+ *
+ * 4b.For SPL, board_init_f() just returns (to crt0). There is no
+ *code relocation in SPL.
*
* 5. Set up final environment for calling board_init_r(). This
*environment has BSS (initialized to 0), initialized non-const
*data (initialized to their intended value), and stack in system
- *RAM. GD has retained values set by board_init_f(). Some CPUs
- *have some work left to do at this point regarding memory, so
- *call c_runtime_cpu_setup.
+ *RAM (for SPL moving the stack and GD into RAM is optional - see
+ *CONFIG_SPL_STACK_R). GD has retained values set by board_init_f().
+ *
+ * 6. For U-Boot proper (not SPL), some CPUs have some work left to do
+ *at this point regarding memory, so call c_runtime_cpu_setup.
+ *
+ * 7. Branch to board_init_r().
*
- * 6. Branch to board_init_r().
+ * For more information see 'Board Initialisation Flow in README.
*/
/*
diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index 98a906e..8b34e04 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -27,7 +27,8 @@
*the GD ('global data') structure, both located in some readily
*available RAM (SRAM, locked cache...). In this context, VARIABLE
*global data, initialized or not (BSS), are UNAVAILABLE; only
- *CONSTANT initialized data are available.
+ *CONSTANT initialized data are available. GD should be zeroed
+ *before board_init_f() is called.
*
* 2. Call board_init_f(). This function prepares the hardware for
*execution from system RAM (DRAM, DDR...) As system RAM may not
@@ -36,24 +37,31 @@
*data include the relocation destination, the future stack, and
*the future GD location.
*
- * (the following applies only to non-SPL builds)
- *
* 3. Set up intermediate environment where the stack and GD are the
*ones allocated by board_init_f() in system RAM, but BSS and
*initialized non-const data are still not available.
*
- * 4. Call relocate_code(). This function relocates U-Boot from its
- *current location into the relocation destination computed by
- *board_init_f().
+ * 4a.For U-Boot proper (not SPL), call relocate_code(). This function
+ *relocates U-Boot from its current location into the relocation
+ *destination computed by board_init_f().
+ *
+ * 4b.For SPL, board_init_f() just returns (to crt0). There is no
+ *code relocation in SPL.
*
* 5. Set up final environment for calling board_init_r(). This
*environment has BSS (initialized to 0), initialized non-const
*data (initialized to their intended value), and stack in system
- *RAM. GD has retained values set by board_init_f(). Some CPUs
- *have some work left to do at this point regarding memory, so
- *call c_runtime_cpu_setup.
+ *RAM (for SPL moving the stack and GD into RAM is optional - see
+ *CONFIG_SPL_STACK_R). GD has retained values set by board_init_f().
+ *
+ * TODO: For SPL, implement stack relocation on AArch64.
*
- * 6. Branch to board_init_r().
+ * 6. For U-Boot proper (not SPL), some CPUs have some work left to do
+ *at
Re: [U-Boot] [PATCH v2 15/15] of: clean up OF_CONTROL ifdef conditionals
On Sat, Aug 01, 2015 at 10:14:45PM +0900, Masahiro Yamada wrote: We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] drivers: hierarchize drivers Kconfig menu
Hi Masahiro, On Sun, Jul 26, 2015 at 1:46 AM, Masahiro Yamada yamada.masah...@socionext.com wrote: The menuconfig for drivers are getting more and more cluttered and unreadable because too many entries are displayed in a single flat menu. Use hierarchic menu for each category. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- drivers/core/Kconfig | 4 drivers/crypto/Kconfig | 4 drivers/demo/Kconfig | 4 drivers/gpio/Kconfig | 8 drivers/i2c/Kconfig| 8 drivers/led/Kconfig| 4 drivers/misc/Kconfig | 8 drivers/rtc/Kconfig| 8 drivers/serial/Kconfig | 8 drivers/sound/Kconfig | 4 drivers/usb/Kconfig| 8 drivers/video/Kconfig | 8 12 files changed, 76 insertions(+) diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig index e40372d..9cc888d 100644 --- a/drivers/core/Kconfig +++ b/drivers/core/Kconfig @@ -1,3 +1,5 @@ +menu Generic Driver Options + config DM bool Enable Driver Model help @@ -59,3 +61,5 @@ config DM_SEQ_ALIAS Most boards will have a '/aliases' node containing the path to numbered devices (e.g. serial0 = serial0). This feature can be disabled if it is not required, to save code space in SPL. + +endmenu diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig index bd26a2b..1ea116b 100644 --- a/drivers/crypto/Kconfig +++ b/drivers/crypto/Kconfig @@ -1 +1,5 @@ +menu Hardware crypto devices + source drivers/crypto/fsl/Kconfig + +endmenu diff --git a/drivers/demo/Kconfig b/drivers/demo/Kconfig index 7a8ce18..98bb633 100644 --- a/drivers/demo/Kconfig +++ b/drivers/demo/Kconfig @@ -1,3 +1,5 @@ +menu Demo for driver model + config DM_DEMO bool Enable demo uclass support depends on DM @@ -24,3 +26,5 @@ config DM_DEMO_SHAPE a shape when the 'demo hello' command is executed which targets this device. It can be used to help understand how driver model works. + +endmenu diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 0c43777..5934597 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -1,3 +1,9 @@ +# +# GPIO infrastructure and drivers +# + +menu GPIO Support + config DM_GPIO bool Enable Driver Model for GPIO drivers depends on DM @@ -42,3 +48,5 @@ config VYBRID_GPIO default n help Say yes here to support Vybrid vf610 GPIOs. + +endmenu diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 86fb36b..b8b2250 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -1,3 +1,9 @@ +# +# I2C subsystem configuration +# + +menu I2C support + config DM_I2C bool Enable Driver Model for I2C drivers depends on DM @@ -73,3 +79,5 @@ config SYS_I2C_UNIPHIER_F help Support for UniPhier FIFO-builtin I2C controller driver. This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs. + +endmenu diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig index de5feea..b21bc94 100644 --- a/drivers/led/Kconfig +++ b/drivers/led/Kconfig @@ -1,3 +1,5 @@ +menu LED Support + config LED bool Enable LED support depends on DM @@ -24,3 +26,5 @@ config LED_GPIO GPIOs may be on the SoC or some other device which provides GPIOs. The GPIO driver must used driver model. LEDs are configured using the device tree. + +endmenu diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 3b7f76a..f29a169 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -1,3 +1,9 @@ +# +# Multifunction miscellaneous devices +# + +menu Multifunction device drivers + config CMD_CROS_EC bool Enable crosec command depends on CROS_EC @@ -82,3 +88,5 @@ config RESET Each driver can provide a reset method which will be called to effect a reset. The uclass will try all available drivers when reset_walk() is called. + +endmenu diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index bd63621..b5d9048 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -1,3 +1,9 @@ +# +# RTC drivers configuration +# + +menu Real Time Clock + config DM_RTC bool Enable Driver Model for RTC drivers depends on DM @@ -6,3 +12,5 @@ config DM_RTC then provides the rtc_get()/rtc_set() interface, delegating to drivers to perform the actual functions. See rtc.h for a description of the API. + +endmenu diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 4829284..b87eb01 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -1,3 +1,9 @@ +# +# Serial device configuration +# + +menu Serial drivers + config DM_SERIAL bool Enable Driver Model for serial drivers depends on
Re: [U-Boot] [PATCH] dm: serial: Add a REQUIRE_SERIAL_CONSOLE option for boards with no serial port
Hi Hans,
On 25 July 2015 at 03:58, Hans de Goede hdego...@redhat.com wrote:
Currently the serial code assumes that there is always at least one serial
port (and panics / crashes due to null pointer dereferences when there is
none).
This makes it impossible to use u-boot on boards where there is no (debug)
serial port, because e.g. all uart pins are muxed to another function.
This commit adds a CONFIG_REQUIRE_SERIAL_CONSOLE Kconfig option, which
defaults to y (preserving existing behavior), which can be set to n on
such boards to make them work.
This commit only implements this for CONFIG_DM_SERIAL=y configs, as allowing
running without a serial port for CONFIG_DM_SERIAL=n configs is non trivial,
and is not necessary at this moment.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
drivers/serial/Kconfig | 11 +++
drivers/serial/serial-uclass.c | 20 +---
2 files changed, 28 insertions(+), 3 deletions(-)
Acked-by: Simon Glass s...@chromium.org
A few nits below.
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 4829284..89d01d5 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -1,3 +1,14 @@
+config REQUIRE_SERIAL_CONSOLE
+ bool Require a serial port for console
+ # Running without a serial console is not supported by the
+ # non dm serial code
non-dm
+ depends on DM_SERIAL
+ default y
+ help
+ Require a serial port for the console, and panic of none is found
s/of/if/
+ during serial port initialization (default y). Set this to n on
+ boards which have no debug serial port what so ever.
whatsoever
+
config DM_SERIAL
bool Enable Driver Model for serial drivers
depends on DM
diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index 815fec3..df0f183 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -78,7 +78,9 @@ static void serial_find_console_or_panic(void)
#undef INDEX
}
+#ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
panic_str(No serial driver found);
+#endif
}
/* Called prior to relocation */
@@ -140,28 +142,40 @@ static int _serial_tstc(struct udevice *dev)
void serial_putc(char ch)
{
- _serial_putc(gd-cur_serial_dev, ch);
+ if (gd-cur_serial_dev)
+ _serial_putc(gd-cur_serial_dev, ch);
}
void serial_puts(const char *str)
{
- _serial_puts(gd-cur_serial_dev, str);
+ if (gd-cur_serial_dev)
+ _serial_puts(gd-cur_serial_dev, str);
}
int serial_getc(void)
{
+ if (!gd-cur_serial_dev)
+ return 0;
+
return _serial_getc(gd-cur_serial_dev);
}
int serial_tstc(void)
{
+ if (!gd-cur_serial_dev)
+ return 0;
+
return _serial_tstc(gd-cur_serial_dev);
}
void serial_setbrg(void)
{
- struct dm_serial_ops *ops = serial_get_ops(gd-cur_serial_dev);
+ struct dm_serial_ops *ops;
+
+ if (!gd-cur_serial_dev)
+ return;
+ ops = serial_get_ops(gd-cur_serial_dev);
if (ops-setbrg)
ops-setbrg(gd-cur_serial_dev, gd-baudrate);
}
--
2.4.3
Regards,
Simon
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Re: [U-Boot] Pull request: u-boot-arm/master
On Fri, Jul 31, 2015 at 03:06:49AM +0200, Albert ARIBAUD wrote: Hello, The following changes since commit cc35734358540a1bbaf042fdf9f4cb2de17389ed: Merge branch 'master' of git://git.denx.de/u-boot-tegra (2015-07-29 18:58:39 -0400) are available in the git repository at: git://git.denx.de/u-boot-arm master for you to fetch changes up to dad17fd51027ad02ac8f02deed186d08109d61fd: armv8: caches: Added routine to set non cacheable region (2015-07-31 01:38:12 +0200) This is just so that the patch below enters mainline to unblock other patches. Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 01/15] kbuild: fixdep: optimize code slightly
On Sat, Aug 01, 2015 at 10:14:31PM +0900, Masahiro Yamada wrote: If the target string matches CONFIG_, move the pointer p forward. This saves several 7-chars adjustments. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-x86
On Fri, Jul 31, 2015 at 07:35:23AM -0600, Simon Glass wrote: Hi Tom, A fix for a nasty problem where patman runs twice! The following changes since commit cc35734358540a1bbaf042fdf9f4cb2de17389ed: Merge branch 'master' of git://git.denx.de/u-boot-tegra (2015-07-29 18:58:39 -0400) are available in the git repository at: git://git.denx.de/u-boot-x86.git for you to fetch changes up to 9649e152cbdd98d836912c45acd1f03fc70a21a5: patman: Don't run patman when it is imported as a module (2015-07-31 07:31:12 -0600) Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-mpc85xx master
On Fri, Jul 31, 2015 at 09:00:43AM -0700, York Sun wrote: Tom, The following changes since commit 26473945ad6667183296e7edee2a65edf31bb6f7: Merge branch 'master' of http://git.denx.de/u-boot-sunxi (2015-07-25 09:04:18 -0400) are available in the git repository at: git://git.denx.de/u-boot-mpc85xx.git master for you to fetch changes up to f2af1c37a09cdd28a78fde4ee4275aedf59be620: powerpc/T104xRDB: Remove vbank check redundant code (2015-07-31 08:56:11 -0700) Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 01/16] ARM: remove vpac270 board support
On Saturday, August 01, 2015 at 06:08:56 PM, Simon Glass wrote: Hi Marek, Hi! On 28 July 2015 at 09:57, Marek Vasut ma...@denx.de wrote: On Tuesday, July 28, 2015 at 05:53:10 PM, Masahiro Yamada wrote: [...] $ git describe v2015.07-307-g2647394 $ make vpac270_ond_256_defconfig # # configuration written to .config # $ make -s CROSS_COMPILE=arm-unknown-linux-gnueabi- = WARNING == Please convert this board to generic board. Otherwise it will be removed by the end of 2014. See doc/README.generic-board for further information $ ls -l spl/u-boot-spl.bin -rwxrwxr-x 1 masahiro masahiro 2828 Jul 28 00:53 spl/u-boot-spl.bin It is over 2KB. So the hardware spilt already? Aww :-( I wonder, maybe converting this to TPL might be the correct solution ? Maybe, if you could split it into two images. I think I might need TPL and SPL: TPL: Load the SDRAM init code into CPU's SRAM from the OneNAND SPL: Load big U-Boot from OneNAND into the main SDRAM ... or maybe we should just sacrifice the machine in the name of progress and be done with it. I don't know when I might have time to fix it afterall. Well it sounds like it is already broken. It worries me that SPL has somehow got larger though - any reason for that? I think the machine was always quite borderline and stuffing the SPL into it was always a bit hackish. The changes to the SPL probably just exposed this hackishness. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 04/15] spl: move SPL driver entries to driver/Makefile
Just preparing for upcoming cleaning. The board-specific linker script board/vpac270/u-boot-spl.lds has been touched to avoid build error. It does not change the size of spl/u-boot-spl.bin for this board, so it should be OK. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- Changes in v2: - Do not delete vpac270 board. Instead, change board/vpac270/u-boot-spl.lds board/vpac270/u-boot-spl.lds | 2 +- drivers/Makefile | 36 scripts/Makefile.spl | 30 +- 3 files changed, 38 insertions(+), 30 deletions(-) diff --git a/board/vpac270/u-boot-spl.lds b/board/vpac270/u-boot-spl.lds index a10ea71..954afb9 100644 --- a/board/vpac270/u-boot-spl.lds +++ b/board/vpac270/u-boot-spl.lds @@ -23,7 +23,7 @@ SECTIONS arch/arm/cpu/pxa/start.o(.text*) arch/arm/lib/built-in.o (.text*) board/vpac270/built-in.o(.text*) - drivers/mtd/onenand/built-in.o (.text*) + drivers/built-in.o (.text*) } diff --git a/drivers/Makefile b/drivers/Makefile index 5a35148..2515aab 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -1,3 +1,37 @@ +ifdef CONFIG_SPL_BUILD + +obj-$(CONFIG_SPL_CLK_SUPPORT) += clk/ +obj-$(CONFIG_SPL_DM) += core/ +obj-$(CONFIG_SPL_I2C_SUPPORT) += i2c/ +obj-$(CONFIG_SPL_GPIO_SUPPORT) += gpio/ +obj-$(CONFIG_SPL_MMC_SUPPORT) += mmc/ +obj-$(CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT) += ddr/fsl/ +obj-$(CONFIG_SYS_MVEBU_DDR_A38X) += ddr/marvell/a38x/ +obj-$(CONFIG_SYS_MVEBU_DDR_AXP) += ddr/marvell/axp/ +obj-$(CONFIG_SPL_SERIAL_SUPPORT) += serial/ +obj-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += mtd/spi/ +obj-$(CONFIG_SPL_SPI_SUPPORT) += spi/ +obj-$(CONFIG_SPL_LED_SUPPORT) += led/ +obj-$(CONFIG_SPL_POWER_SUPPORT) += power/ power/pmic/ +obj-$(CONFIG_SPL_POWER_SUPPORT) += power/regulator/ +obj-$(CONFIG_SPL_MTD_SUPPORT) += mtd/ +obj-$(CONFIG_SPL_NAND_SUPPORT) += mtd/nand/ +obj-$(CONFIG_SPL_DRIVERS_MISC_SUPPORT) += misc/ +obj-$(CONFIG_SPL_ONENAND_SUPPORT) += mtd/onenand/ +obj-$(CONFIG_SPL_DMA_SUPPORT) += dma/ +obj-$(CONFIG_SPL_ETH_SUPPORT) += net/ +obj-$(CONFIG_SPL_ETH_SUPPORT) += net/phy/ +obj-$(CONFIG_SPL_USBETH_SUPPORT) += net/phy/ +obj-$(CONFIG_SPL_RAM_SUPPORT) += ram/ +obj-$(CONFIG_SPL_MUSB_NEW_SUPPORT) += usb/musb-new/ +obj-$(CONFIG_SPL_USBETH_SUPPORT) += usb/gadget/ +obj-$(CONFIG_SPL_WATCHDOG_SUPPORT) += watchdog/ +obj-$(CONFIG_SPL_USB_HOST_SUPPORT) += usb/host/ +obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/ +obj-$(CONFIG_SPL_SATA_SUPPORT) += block/ + +else + obj-$(CONFIG_CLK) += clk/ obj-$(CONFIG_DM) += core/ obj-$(CONFIG_DM_DEMO) += demo/ @@ -27,3 +61,5 @@ obj-y += input/ # SOC specific infrastructure drivers. obj-y += soc/ obj-y += thermal/ + +endif diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl index b1047b5..28bc0d7 100644 --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl @@ -54,39 +54,11 @@ libs-$(HAVE_VENDOR_COMMON_LIB) += board/$(VENDOR)/common/ libs-$(CONFIG_SPL_FRAMEWORK) += common/spl/ libs-$(CONFIG_SPL_LIBCOMMON_SUPPORT) += common/ libs-$(CONFIG_SPL_LIBDISK_SUPPORT) += disk/ -libs-$(CONFIG_SPL_CLK_SUPPORT) += drivers/clk/ -libs-$(CONFIG_SPL_DM) += drivers/core/ -libs-$(CONFIG_SPL_I2C_SUPPORT) += drivers/i2c/ -libs-$(CONFIG_SPL_GPIO_SUPPORT) += drivers/gpio/ -libs-$(CONFIG_SPL_MMC_SUPPORT) += drivers/mmc/ -libs-$(CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT) += drivers/ddr/fsl/ -libs-$(CONFIG_SYS_MVEBU_DDR_A38X) += drivers/ddr/marvell/a38x/ -libs-$(CONFIG_SYS_MVEBU_DDR_AXP) += drivers/ddr/marvell/axp/ -libs-$(CONFIG_SPL_SERIAL_SUPPORT) += drivers/serial/ -libs-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += drivers/mtd/spi/ -libs-$(CONFIG_SPL_SPI_SUPPORT) += drivers/spi/ +libs-y += drivers/ libs-y += fs/ -libs-$(CONFIG_SPL_LED_SUPPORT) += drivers/led/ libs-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/ -libs-$(CONFIG_SPL_POWER_SUPPORT) += drivers/power/ drivers/power/pmic/ -libs-$(CONFIG_SPL_POWER_SUPPORT) += drivers/power/regulator/ -libs-$(CONFIG_SPL_MTD_SUPPORT) += drivers/mtd/ -libs-$(CONFIG_SPL_NAND_SUPPORT) += drivers/mtd/nand/ -libs-$(CONFIG_SPL_DRIVERS_MISC_SUPPORT) += drivers/misc/ -libs-$(CONFIG_SPL_ONENAND_SUPPORT) += drivers/mtd/onenand/ -libs-$(CONFIG_SPL_DMA_SUPPORT) += drivers/dma/ libs-$(CONFIG_SPL_POST_MEM_SUPPORT) += post/drivers/ libs-$(CONFIG_SPL_NET_SUPPORT) += net/ -libs-$(CONFIG_SPL_ETH_SUPPORT) += drivers/net/ -libs-$(CONFIG_SPL_ETH_SUPPORT) += drivers/net/phy/ -libs-$(CONFIG_SPL_USBETH_SUPPORT) += drivers/net/phy/ -libs-$(CONFIG_SPL_RAM_SUPPORT) += drivers/ram/ -libs-$(CONFIG_SPL_MUSB_NEW_SUPPORT) += drivers/usb/musb-new/ -libs-$(CONFIG_SPL_USBETH_SUPPORT) += drivers/usb/gadget/ -libs-$(CONFIG_SPL_WATCHDOG_SUPPORT) += drivers/watchdog/ -libs-$(CONFIG_SPL_USB_HOST_SUPPORT) += drivers/usb/host/ -libs-$(CONFIG_OMAP_USB_PHY) += drivers/usb/phy/ -libs-$(CONFIG_SPL_SATA_SUPPORT) += drivers/block/ head-y := $(addprefix
[U-Boot] [PATCH v2 10/15] led: rename CONFIG_SPL_LED_SUPPORT to CONFIG_SPL_LED
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- Changes in v2: None drivers/Makefile| 2 +- drivers/led/Kconfig | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/Makefile b/drivers/Makefile index 1baecb4..3188a51 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -13,7 +13,7 @@ obj-$(CONFIG_SYS_MVEBU_DDR_AXP) += ddr/marvell/axp/ obj-$(CONFIG_SPL_SERIAL_SUPPORT) += serial/ obj-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += mtd/spi/ obj-$(CONFIG_SPL_SPI_SUPPORT) += spi/ -obj-$(CONFIG_SPL_LED_SUPPORT) += led/ +obj-$(CONFIG_SPL_LED) += led/ obj-$(CONFIG_SPL_POWER_SUPPORT) += power/ power/pmic/ obj-$(CONFIG_SPL_POWER_SUPPORT) += power/regulator/ obj-$(CONFIG_SPL_MTD_SUPPORT) += mtd/ diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig index de5feea..781c410 100644 --- a/drivers/led/Kconfig +++ b/drivers/led/Kconfig @@ -7,7 +7,7 @@ config LED can provide access to board-specific LEDs. Use of the device tree for configuration is encouraged. -config SPL_LED_SUPPORT +config SPL_LED bool Enable LED support in SPL depends on LED help -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 09/15] ram: unify obj-$(CONFIG_RAM) and obj-$(CONFIG_SPL_RAM) entries
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- Changes in v2: None drivers/Makefile | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/Makefile b/drivers/Makefile index 22d316e..1baecb4 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -1,5 +1,6 @@ obj-$(CONFIG_$(SPL_)DM)+= core/ obj-$(CONFIG_$(SPL_)CLK) += clk/ +obj-$(CONFIG_$(SPL_)RAM) += ram/ ifdef CONFIG_SPL_BUILD @@ -23,7 +24,6 @@ obj-$(CONFIG_SPL_DMA_SUPPORT) += dma/ obj-$(CONFIG_SPL_ETH_SUPPORT) += net/ obj-$(CONFIG_SPL_ETH_SUPPORT) += net/phy/ obj-$(CONFIG_SPL_USBETH_SUPPORT) += net/phy/ -obj-$(CONFIG_SPL_RAM) += ram/ obj-$(CONFIG_SPL_MUSB_NEW_SUPPORT) += usb/musb-new/ obj-$(CONFIG_SPL_USBETH_SUPPORT) += usb/gadget/ obj-$(CONFIG_SPL_WATCHDOG_SUPPORT) += watchdog/ @@ -45,7 +45,6 @@ obj-$(CONFIG_LED) += led/ obj-y += misc/ obj-y += pcmcia/ obj-y += dfu/ -obj-$(CONFIG_RAM) += ram/ obj-y += rtc/ obj-y += sound/ obj-y += tpm/ -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 08/15] ram: rename CONFIG_SPL_RAM_SUPPORT to CONFIG_SPL_RAM
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- Changes in v2: None drivers/Makefile| 2 +- drivers/ram/Kconfig | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/Makefile b/drivers/Makefile index 8d4ac06..22d316e 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -23,7 +23,7 @@ obj-$(CONFIG_SPL_DMA_SUPPORT) += dma/ obj-$(CONFIG_SPL_ETH_SUPPORT) += net/ obj-$(CONFIG_SPL_ETH_SUPPORT) += net/phy/ obj-$(CONFIG_SPL_USBETH_SUPPORT) += net/phy/ -obj-$(CONFIG_SPL_RAM_SUPPORT) += ram/ +obj-$(CONFIG_SPL_RAM) += ram/ obj-$(CONFIG_SPL_MUSB_NEW_SUPPORT) += usb/musb-new/ obj-$(CONFIG_SPL_USBETH_SUPPORT) += usb/gadget/ obj-$(CONFIG_SPL_WATCHDOG_SUPPORT) += watchdog/ diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig index 642a2d8..ff09f22 100644 --- a/drivers/ram/Kconfig +++ b/drivers/ram/Kconfig @@ -8,7 +8,7 @@ config RAM the RAM size can either be statically defined or dynamically detected. -config SPL_RAM_SUPPORT +config SPL_RAM bool Enable RAM support in SPL depends on RAM help -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 06/15] clk: rename CONFIG_SPL_CLK_SUPPORT to CONFIG_SPL_CLK
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- Changes in v2: None drivers/Makefile| 2 +- drivers/clk/Kconfig | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/Makefile b/drivers/Makefile index dd57849..a1e24c1 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -2,7 +2,7 @@ obj-$(CONFIG_$(SPL_)DM) += core/ ifdef CONFIG_SPL_BUILD -obj-$(CONFIG_SPL_CLK_SUPPORT) += clk/ +obj-$(CONFIG_SPL_CLK) += clk/ obj-$(CONFIG_SPL_I2C_SUPPORT) += i2c/ obj-$(CONFIG_SPL_GPIO_SUPPORT) += gpio/ obj-$(CONFIG_SPL_MMC_SUPPORT) += mmc/ diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 07eb54c..890f22f 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -8,7 +8,7 @@ config CLK feed into other clocks in a tree structure, with multiplexers to choose the source for each clock. -config SPL_CLK_SUPPORT +config SPL_CLK bool Enable clock support in SPL depends on CLK help -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 07/15] clk: unify obj-$(CONFIG_CLK) and obj-$(CONFIG_SPL_CLK) entries
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- Changes in v2: None drivers/Makefile | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/Makefile b/drivers/Makefile index a1e24c1..8d4ac06 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -1,8 +1,8 @@ obj-$(CONFIG_$(SPL_)DM)+= core/ +obj-$(CONFIG_$(SPL_)CLK) += clk/ ifdef CONFIG_SPL_BUILD -obj-$(CONFIG_SPL_CLK) += clk/ obj-$(CONFIG_SPL_I2C_SUPPORT) += i2c/ obj-$(CONFIG_SPL_GPIO_SUPPORT) += gpio/ obj-$(CONFIG_SPL_MMC_SUPPORT) += mmc/ @@ -33,7 +33,6 @@ obj-$(CONFIG_SPL_SATA_SUPPORT) += block/ else -obj-$(CONFIG_CLK) += clk/ obj-$(CONFIG_DM_DEMO) += demo/ obj-$(CONFIG_BIOSEMU) += bios_emulator/ obj-y += block/ -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 12/15] dm: drop CONFIG_DM_DEVICE_REMOVE from uncmd list
We do not want to compile the DM remove code for SPL. Currently,
we undef it in include/config_uncmd_spl.h (for C files) and in
scripts/Makefile.uncmd_spl (for Makefiles). This is really ugly.
This commit demonstrates how we can deprecate those two files.
Use $(SPL_) for the entry in the Makfile and CONFIG_IS_ENABLED()
in C files.
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
---
Changes in v2: None
drivers/core/Makefile| 2 +-
drivers/core/device.c| 6 +++---
drivers/core/uclass.c| 4 ++--
include/config_uncmd_spl.h | 1 -
include/dm/device-internal.h | 10 +-
include/dm/uclass-internal.h | 4 ++--
scripts/Makefile.uncmd_spl | 2 --
7 files changed, 13 insertions(+), 16 deletions(-)
diff --git a/drivers/core/Makefile b/drivers/core/Makefile
index d3cd968..d7ffac0 100644
--- a/drivers/core/Makefile
+++ b/drivers/core/Makefile
@@ -9,7 +9,7 @@ obj-$(CONFIG_DEVRES) += devres.o
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_OF_CONTROL) += simple-bus.o
endif
-obj-$(CONFIG_DM_DEVICE_REMOVE) += device-remove.o
+obj-$(CONFIG_$(SPL_)DM_DEVICE_REMOVE) += device-remove.o
obj-$(CONFIG_DM) += dump.o
obj-$(CONFIG_OF_CONTROL) += regmap.o
obj-$(CONFIG_OF_CONTROL) += syscon-uclass.o
diff --git a/drivers/core/device.c b/drivers/core/device.c
index b479be7..47ec9c0 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -140,7 +140,7 @@ int device_bind(struct udevice *parent, const struct driver
*drv,
return 0;
fail_child_post_bind:
- if (IS_ENABLED(CONFIG_DM_DEVICE_REMOVE)) {
+ if (CONFIG_IS_ENABLED(DM_DEVICE_REMOVE)) {
if (drv-unbind drv-unbind(dev)) {
dm_warn(unbind() method failed on dev '%s' on error
path\n,
dev-name);
@@ -148,14 +148,14 @@ fail_child_post_bind:
}
fail_bind:
- if (IS_ENABLED(CONFIG_DM_DEVICE_REMOVE)) {
+ if (CONFIG_IS_ENABLED(DM_DEVICE_REMOVE)) {
if (uclass_unbind_device(dev)) {
dm_warn(Failed to unbind dev '%s' on error path\n,
dev-name);
}
}
fail_uclass_bind:
- if (IS_ENABLED(CONFIG_DM_DEVICE_REMOVE)) {
+ if (CONFIG_IS_ENABLED(DM_DEVICE_REMOVE)) {
list_del(dev-sibling_node);
if (dev-flags DM_FLAG_ALLOC_PARENT_PDATA) {
free(dev-parent_platdata);
diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index aba9880..adf13a7 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -391,7 +391,7 @@ err:
return ret;
}
-#ifdef CONFIG_DM_DEVICE_REMOVE
+#if CONFIG_IS_ENABLED(DM_DEVICE_REMOVE)
int uclass_unbind_device(struct udevice *dev)
{
struct uclass *uc;
@@ -471,7 +471,7 @@ int uclass_post_probe_device(struct udevice *dev)
return 0;
}
-#ifdef CONFIG_DM_DEVICE_REMOVE
+#if CONFIG_IS_ENABLED(DM_DEVICE_REMOVE)
int uclass_pre_remove_device(struct udevice *dev)
{
struct uclass_driver *uc_drv;
diff --git a/include/config_uncmd_spl.h b/include/config_uncmd_spl.h
index c191f56..86cc0c3 100644
--- a/include/config_uncmd_spl.h
+++ b/include/config_uncmd_spl.h
@@ -32,7 +32,6 @@
#endif
#undef CONFIG_DM_WARN
-#undef CONFIG_DM_DEVICE_REMOVE
#undef CONFIG_DM_SEQ_ALIAS
#undef CONFIG_DM_STDIO
diff --git a/include/dm/device-internal.h b/include/dm/device-internal.h
index 7da4216..83e7e34 100644
--- a/include/dm/device-internal.h
+++ b/include/dm/device-internal.h
@@ -87,7 +87,7 @@ int device_probe_child(struct udevice *dev, void
*parent_priv);
* @dev: Pointer to device to remove
* @return 0 if OK, -ve on error (an error here is normally a very bad thing)
*/
-#ifdef CONFIG_DM_DEVICE_REMOVE
+#if CONFIG_IS_ENABLED(DM_DEVICE_REMOVE)
int device_remove(struct udevice *dev);
#else
static inline int device_remove(struct udevice *dev) { return 0; }
@@ -101,7 +101,7 @@ static inline int device_remove(struct udevice *dev) {
return 0; }
* @dev: Pointer to device to unbind
* @return 0 if OK, -ve on error
*/
-#ifdef CONFIG_DM_DEVICE_REMOVE
+#if CONFIG_IS_ENABLED(DM_DEVICE_REMOVE)
int device_unbind(struct udevice *dev);
#else
static inline int device_unbind(struct udevice *dev) { return 0; }
@@ -112,7 +112,7 @@ static inline int device_unbind(struct udevice *dev) {
return 0; }
* @dev: The device whose children are to be removed
* @return 0 on success, -ve on error
*/
-#ifdef CONFIG_DM_DEVICE_REMOVE
+#if CONFIG_IS_ENABLED(DM_DEVICE_REMOVE)
int device_remove_children(struct udevice *dev);
#else
static inline int device_remove_children(struct udevice *dev) { return 0; }
@@ -127,13 +127,13 @@ static inline int device_remove_children(struct udevice
*dev) { return 0; }
* @dev: The device that is to be stripped of its children
* @return 0 on success, -ve on error
*/
-#ifdef CONFIG_DM_DEVICE_REMOVE
+#if CONFIG_IS_ENABLED(DM_DEVICE_REMOVE)
int
[U-Boot] [PATCH v2 13/15] fdtdec: fix OF_CONTROL switch
There is no case where defined(SPL_DISABLE_OF_CONTROL) is true.
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
---
Changes in v2: None
include/fdtdec.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 4b3f8d1..2681a64 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -48,7 +48,7 @@ struct fdt_memory {
#endif
#ifdef CONFIG_OF_CONTROL
-# if defined(CONFIG_SPL_BUILD) defined(SPL_DISABLE_OF_CONTROL)
+# if defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_DISABLE_OF_CONTROL)
# define OF_CONTROL 0
# else
# define OF_CONTROL 1
--
1.9.1
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[U-Boot] [PATCH v2 11/15] led: unify obj-$(CONFIG_LED) and obj-$(CONFIG_SPL_LED) entries
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- Changes in v2: None drivers/Makefile | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/Makefile b/drivers/Makefile index 3188a51..4901e16 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -1,5 +1,6 @@ obj-$(CONFIG_$(SPL_)DM)+= core/ obj-$(CONFIG_$(SPL_)CLK) += clk/ +obj-$(CONFIG_$(SPL_)LED) += led/ obj-$(CONFIG_$(SPL_)RAM) += ram/ ifdef CONFIG_SPL_BUILD @@ -13,7 +14,6 @@ obj-$(CONFIG_SYS_MVEBU_DDR_AXP) += ddr/marvell/axp/ obj-$(CONFIG_SPL_SERIAL_SUPPORT) += serial/ obj-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += mtd/spi/ obj-$(CONFIG_SPL_SPI_SUPPORT) += spi/ -obj-$(CONFIG_SPL_LED) += led/ obj-$(CONFIG_SPL_POWER_SUPPORT) += power/ power/pmic/ obj-$(CONFIG_SPL_POWER_SUPPORT) += power/regulator/ obj-$(CONFIG_SPL_MTD_SUPPORT) += mtd/ @@ -41,7 +41,6 @@ obj-$(CONFIG_CPU) += cpu/ obj-y += crypto/ obj-$(CONFIG_FPGA) += fpga/ obj-y += hwmon/ -obj-$(CONFIG_LED) += led/ obj-y += misc/ obj-y += pcmcia/ obj-y += dfu/ -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] drivers: hierarchize drivers Kconfig menu
Hi Masahiro, On Sat, Aug 1, 2015 at 9:27 PM, Masahiro Yamada yamada.masah...@socionext.com wrote: Hi Bin, Looks like I missed some items.. Anyway, they do not have many drivers below them, so menuconfig is not so messy. Do you want me send v2, or will you send a follow-up patch? I can send a follow-up patch. 2015-08-01 20:11 GMT+09:00 Bin Meng bmeng...@gmail.com: Hi Masahiro, On Sun, Jul 26, 2015 at 1:46 AM, Masahiro Yamada yamada.masah...@socionext.com wrote: The menuconfig for drivers are getting more and more cluttered and unreadable because too many entries are displayed in a single flat menu. Use hierarchic menu for each category. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- [snip] With this patch, there are still single entries under Device Drivers main menu like: [] Enable clock driver support [] Enable CPU drivers using Driver Model [] Enable Driver Model for Ethernet drivers [] Network device support [] Enable Chrome OS EC keyboard support [] Enable sandbox TPM driver [] Enable RAM drivers using Driver Model [] Driver support for thermal devices Can we make those into sub-menus as well? Regards, Bin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 09/15] ram: unify obj-$(CONFIG_RAM) and obj-$(CONFIG_SPL_RAM) entries
On Sat, Aug 01, 2015 at 10:14:39PM +0900, Masahiro Yamada wrote: Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 08/15] ram: rename CONFIG_SPL_RAM_SUPPORT to CONFIG_SPL_RAM
On Sat, Aug 01, 2015 at 10:14:38PM +0900, Masahiro Yamada wrote: Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 05/15] dm: unify obj-$(CONFIG_DM) and obj-$(CONFIG_SPL_DM) entries
On Sat, Aug 01, 2015 at 10:14:35PM +0900, Masahiro Yamada wrote: Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 02/15] kbuild: add a makefile macro useful with per-image config options
On Sat, Aug 01, 2015 at 10:14:32PM +0900, Masahiro Yamada wrote: Commit e02ee2548afe (kconfig: switch to single .config configuration) made the configuration itself pretty simple, instead, we lost the way to systematically enable/disable config options for each image independently. Our current strategy is, put entries into Makefile.spl for options we need separate enabling, or once enable the options globally in Kconfig and then undef them in Makefile.uncmd_spl if we do not want to compile the features for SPL at all. Things are getting really messy. Besides, ifdef CONFIG_SPL_BUILD are sprinkled everywhere in makefiles. This commit adds a variable to help describe makefile simpler. $(SPL_) evaluates to SPL_ during the SPL build, while to an empty string during building U-boot proper. So, you can write obj-$(CONFIG_$(SPL_)FOO) += foo.o instead of ifdef CONFIG_SPL_BUILD obj-$(CONFIG_SPL_FOO) += foo.o else obj-$(CONFIG_FOO) += foo.o endif If CONFIG_SPL_FOO does not exist in Kconfig, it is equivalent to ifndef CONFIG_SPL_BUILD obj-$(CONFIG_SPL_FOO) += foo.o endif This is the pattern we often see in our current makefiles. To take advantage of this macro, we should prefix SPL_ for the SPL version of the option when we need independent control between U-boot and SPL. With this naming scheme, I hope our makefiles will be much simplified. It means we want to rename existing config options as follows in the long run: CONFIG_SPL_SERIAL_SUPPORT - CONFIG_SPL_SERIAL CONFIG_SPL_I2C_SUPPORT- CONFIG_SPL_I2C CONFIG_SPL_GPIO_SUPPORT - CONFIG_SPL_GPIO CONFIG_SPL_SPI_SUPPORT- CONFIG_SPL_SPI CONFIG_SPL_DISABLE_OF_CONTROL - CONFIG_SPL_OF_CONTROL (inverting the logic) Then drivers/Makefile would be re-worked as follows: obj-$(CONFIG_$(SPL_)SERIAL) += serial/ obj-$(CONFIG_$(SPL_)I2C) += i2c/ obj-$(CONFIG_$(SPL_)GPIO)+= gpio/ obj-$(CONFIG_$(SPL_)SPI) += spi/ ... Eventually, SPL-specialized entries in Makefile.spl would go away. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 04/15] spl: move SPL driver entries to driver/Makefile
On Sat, Aug 01, 2015 at 10:14:34PM +0900, Masahiro Yamada wrote: Just preparing for upcoming cleaning. The board-specific linker script board/vpac270/u-boot-spl.lds has been touched to avoid build error. It does not change the size of spl/u-boot-spl.bin for this board, so it should be OK. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 10/15] led: rename CONFIG_SPL_LED_SUPPORT to CONFIG_SPL_LED
On Sat, Aug 01, 2015 at 10:14:40PM +0900, Masahiro Yamada wrote: Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 11/15] led: unify obj-$(CONFIG_LED) and obj-$(CONFIG_SPL_LED) entries
On Sat, Aug 01, 2015 at 10:14:41PM +0900, Masahiro Yamada wrote: Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 13/15] fdtdec: fix OF_CONTROL switch
On Sat, Aug 01, 2015 at 10:14:43PM +0900, Masahiro Yamada wrote: There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 12/15] dm: drop CONFIG_DM_DEVICE_REMOVE from uncmd list
On Sat, Aug 01, 2015 at 10:14:42PM +0900, Masahiro Yamada wrote: We do not want to compile the DM remove code for SPL. Currently, we undef it in include/config_uncmd_spl.h (for C files) and in scripts/Makefile.uncmd_spl (for Makefiles). This is really ugly. This commit demonstrates how we can deprecate those two files. Use $(SPL_) for the entry in the Makfile and CONFIG_IS_ENABLED() in C files. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 07/15] clk: unify obj-$(CONFIG_CLK) and obj-$(CONFIG_SPL_CLK) entries
On Sat, Aug 01, 2015 at 10:14:37PM +0900, Masahiro Yamada wrote: Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 06/15] clk: rename CONFIG_SPL_CLK_SUPPORT to CONFIG_SPL_CLK
On Sat, Aug 01, 2015 at 10:14:36PM +0900, Masahiro Yamada wrote: Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] drivers: hierarchize drivers Kconfig menu
Hi Bin, Looks like I missed some items.. Anyway, they do not have many drivers below them, so menuconfig is not so messy. Do you want me send v2, or will you send a follow-up patch? 2015-08-01 20:11 GMT+09:00 Bin Meng bmeng...@gmail.com: Hi Masahiro, On Sun, Jul 26, 2015 at 1:46 AM, Masahiro Yamada yamada.masah...@socionext.com wrote: The menuconfig for drivers are getting more and more cluttered and unreadable because too many entries are displayed in a single flat menu. Use hierarchic menu for each category. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- drivers/core/Kconfig | 4 drivers/crypto/Kconfig | 4 drivers/demo/Kconfig | 4 drivers/gpio/Kconfig | 8 drivers/i2c/Kconfig| 8 drivers/led/Kconfig| 4 drivers/misc/Kconfig | 8 drivers/rtc/Kconfig| 8 drivers/serial/Kconfig | 8 drivers/sound/Kconfig | 4 drivers/usb/Kconfig| 8 drivers/video/Kconfig | 8 12 files changed, 76 insertions(+) diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig index e40372d..9cc888d 100644 --- a/drivers/core/Kconfig +++ b/drivers/core/Kconfig @@ -1,3 +1,5 @@ +menu Generic Driver Options + config DM bool Enable Driver Model help @@ -59,3 +61,5 @@ config DM_SEQ_ALIAS Most boards will have a '/aliases' node containing the path to numbered devices (e.g. serial0 = serial0). This feature can be disabled if it is not required, to save code space in SPL. + +endmenu diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig index bd26a2b..1ea116b 100644 --- a/drivers/crypto/Kconfig +++ b/drivers/crypto/Kconfig @@ -1 +1,5 @@ +menu Hardware crypto devices + source drivers/crypto/fsl/Kconfig + +endmenu diff --git a/drivers/demo/Kconfig b/drivers/demo/Kconfig index 7a8ce18..98bb633 100644 --- a/drivers/demo/Kconfig +++ b/drivers/demo/Kconfig @@ -1,3 +1,5 @@ +menu Demo for driver model + config DM_DEMO bool Enable demo uclass support depends on DM @@ -24,3 +26,5 @@ config DM_DEMO_SHAPE a shape when the 'demo hello' command is executed which targets this device. It can be used to help understand how driver model works. + +endmenu diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 0c43777..5934597 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -1,3 +1,9 @@ +# +# GPIO infrastructure and drivers +# + +menu GPIO Support + config DM_GPIO bool Enable Driver Model for GPIO drivers depends on DM @@ -42,3 +48,5 @@ config VYBRID_GPIO default n help Say yes here to support Vybrid vf610 GPIOs. + +endmenu diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 86fb36b..b8b2250 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -1,3 +1,9 @@ +# +# I2C subsystem configuration +# + +menu I2C support + config DM_I2C bool Enable Driver Model for I2C drivers depends on DM @@ -73,3 +79,5 @@ config SYS_I2C_UNIPHIER_F help Support for UniPhier FIFO-builtin I2C controller driver. This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs. + +endmenu diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig index de5feea..b21bc94 100644 --- a/drivers/led/Kconfig +++ b/drivers/led/Kconfig @@ -1,3 +1,5 @@ +menu LED Support + config LED bool Enable LED support depends on DM @@ -24,3 +26,5 @@ config LED_GPIO GPIOs may be on the SoC or some other device which provides GPIOs. The GPIO driver must used driver model. LEDs are configured using the device tree. + +endmenu diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 3b7f76a..f29a169 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -1,3 +1,9 @@ +# +# Multifunction miscellaneous devices +# + +menu Multifunction device drivers + config CMD_CROS_EC bool Enable crosec command depends on CROS_EC @@ -82,3 +88,5 @@ config RESET Each driver can provide a reset method which will be called to effect a reset. The uclass will try all available drivers when reset_walk() is called. + +endmenu diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index bd63621..b5d9048 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -1,3 +1,9 @@ +# +# RTC drivers configuration +# + +menu Real Time Clock + config DM_RTC bool Enable Driver Model for RTC drivers depends on DM @@ -6,3 +12,5 @@ config DM_RTC then provides the rtc_get()/rtc_set() interface, delegating to drivers to perform the actual functions. See rtc.h for a description of the API. + +endmenu diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index
Re: [U-Boot] [PATCH v2 14/15] of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL
On Sat, Aug 01, 2015 at 10:14:44PM +0900, Masahiro Yamada wrote: As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are actually two boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig But they were enabled by mistake. Commit 47a785a9dd97 (dts: Disable device tree for SPL on all boards) missed to add CONFIG_SPL_DISABLE_OF_CONTROL on those two boards. They were silently enabled with OF_CONTROL on SPL without notifying their maintainers. After all, there exist no boards to support it in a justified process. Before being too late, delete all the defines in defconfig files and 'select's in Kconfig, and invert the logic. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] drivers: hierarchize drivers Kconfig menu
Le samedi 01 août 2015 à 17:18 +0200, Marek Vasut a écrit : On Saturday, August 01, 2015 at 11:08:10 AM, Paul Kocialkowski wrote: Hi, Le lundi 27 juillet 2015 à 14:33 +0200, Paul Kocialkowski a écrit : Le dimanche 26 juillet 2015 à 02:46 +0900, Masahiro Yamada a écrit : The menuconfig for drivers are getting more and more cluttered and unreadable because too many entries are displayed in a single flat menu. Use hierarchic menu for each category. That looks like a valuable addition to me! This patch was submitted a week ago and I need it for merging another series of mine, that was already accepted. Is there anything preventing this patch from being merged at this point? People not having just one patch on their plate and thus being busy ;-) Of course, I'm just sending this as a reminder, to get the discussion started on this patch. I know that everyone's busy around here and I fully understand that the process takes some time. Still, I believe a reminder once in a while (a week seems fair enough) is good thing, too! -- Paul Kocialkowski, Replicant developer Replicant is a fully free Android distribution running on several devices, a free software mobile operating system putting the emphasis on freedom and privacy/security. Website: http://www.replicant.us/ Blog: http://blog.replicant.us/ Wiki/tracker/forums: http://redmine.replicant.us/ signature.asc Description: This is a digitally signed message part ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH resend V2 1/3] mtd: nand: mxs support oobsize bigger than 512
On Saturday, August 01, 2015 at 08:32:07 PM, Scott Wood wrote: On Sat, 2015-08-01 at 17:18 +0200, Marek Vasut wrote: On Saturday, August 01, 2015 at 07:56:39 AM, Peng Fan wrote: On Fri, Jul 31, 2015 at 09:36:45PM -0500, Scott Wood wrote: On Sat, 2015-08-01 at 09:15 +0800, Peng Fan wrote: On Fri, Jul 31, 2015 at 12:07:50PM -0500, Scott Wood wrote: On Tue, 2015-07-21 at 16:15 +0800, Peng Fan wrote: If ecc chunk data size is 512 and oobsize is bigger than 512, there is a chance that block_mark_bit_offset conflicts with bch ecc area. The following graph is modified from kernel gpmi-nand.c driver with each data block 512 bytes. We can see that Block Mark conflicts with ecc area from bch view. We can enlarge the ecc chunk size to avoid this problem to those oobsize which is larger than 512. Enlarge it by how much? What does the layout look like in that case? Enlarge it to 1024 bytes. Then say so in the changelog. You mean I need to add this in commit msg and send out a new patch version? Or you pick this one? This discussion is becoming ridiculous, can we please get this bugfix applied ? If you don't like some minor details in the commit message, can you please fix them while applying ? Yes, I can edit the changelog while applying, but that doesn't mean I'm not going to complain about a difficult-to-understand changelog, and I still would like to understand what is actually going on here. Don't assume I'm familiar with this hardware or its unusual page layout. You can help by explaining things, or you can not help by throwing a fit... I can point you to MX28 datasheet [1] chapter 16.2.2 and onward if you want to educate yourself, it's all explained there, concisely and clearly. [1] http://free-electrons.com/~maxime/pub/datasheet/MCIMX28RM.pdf Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/3] sunxi: Do not add a stdout-path alias to dts on boards without a serial port
Do not add a bogus (pointing to a non existing serial port) stdout-path alias to dts on boards without a serial port. Signed-off-by: Hans de Goede hdego...@redhat.com --- include/configs/sunxi-common.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 71b2368..a2cbcf5 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -262,6 +262,7 @@ extern int soft_i2c_gpio_scl; #define CONFIG_CONS_INDEX 1 /* UART0 */ #endif +#ifdef CONFIG_REQUIRE_SERIAL_CONSOLE #if CONFIG_CONS_INDEX == 1 #ifdef CONFIG_MACH_SUN9I #define OF_STDOUT_PATH /soc/serial@0700:115200 @@ -277,6 +278,7 @@ extern int soft_i2c_gpio_scl; #else #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h. #endif +#endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */ /* GPIO */ #define CONFIG_SUNXI_GPIO -- 2.4.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/3] sunxi: usb-phy: Never power off the usb ports
USB devices are not really designed to get the power bounced off and on
at them. Esp. USB powered harddisks do not like this.
Currently we power off the USB ports both on a usb reset and when
booting the kernel, causing the usb-power to bounce off and then back
on again.
This patch removes the powering off calls, fixing the undesirable power
bouncing.
Note this requires some special handling for the OTG port:
1) We must skip the external vbus check if we've already enabled our own
vbus to avoid false positives
2) If on an usb reset we no longer detect that the id-pin is grounded, turn
off vbus as that means an external vbus may be present now
Signed-off-by: Hans de Goede hdego...@redhat.com
---
Changes in v2:
-Skip the vbus detect for the otg port if we've already turned the power on,
otherwise we get a false positive for having an external vbus and the otg
port is not usable after an usb reset
---
arch/arm/cpu/armv7/sunxi/usb_phy.c| 7 +++
arch/arm/include/asm/arch-sunxi/usb_phy.h | 1 +
drivers/usb/host/ehci-sunxi.c | 1 -
drivers/usb/host/ohci-sunxi.c | 1 -
drivers/usb/musb-new/sunxi.c | 28
5 files changed, 24 insertions(+), 14 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/usb_phy.c
b/arch/arm/cpu/armv7/sunxi/usb_phy.c
index 4d63a74..b7ca5d4 100644
--- a/arch/arm/cpu/armv7/sunxi/usb_phy.c
+++ b/arch/arm/cpu/armv7/sunxi/usb_phy.c
@@ -232,6 +232,13 @@ void sunxi_usb_phy_power_off(int index)
gpio_set_value(phy-gpio_vbus, 0);
}
+int sunxi_usb_phy_power_is_on(int index)
+{
+ struct sunxi_usb_phy *phy = sunxi_usb_phy[index];
+
+ return phy-power_on_count 0;
+}
+
int sunxi_usb_phy_vbus_detect(int index)
{
struct sunxi_usb_phy *phy = sunxi_usb_phy[index];
diff --git a/arch/arm/include/asm/arch-sunxi/usb_phy.h
b/arch/arm/include/asm/arch-sunxi/usb_phy.h
index cef6c98..6a14cad 100644
--- a/arch/arm/include/asm/arch-sunxi/usb_phy.h
+++ b/arch/arm/include/asm/arch-sunxi/usb_phy.h
@@ -16,6 +16,7 @@ void sunxi_usb_phy_init(int index);
void sunxi_usb_phy_exit(int index);
void sunxi_usb_phy_power_on(int index);
void sunxi_usb_phy_power_off(int index);
+int sunxi_usb_phy_power_is_on(int index);
int sunxi_usb_phy_vbus_detect(int index);
int sunxi_usb_phy_id_detect(int index);
void sunxi_usb_phy_enable_squelch_detect(int index, int enable);
diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c
index 34130f8..38d5f92 100644
--- a/drivers/usb/host/ehci-sunxi.c
+++ b/drivers/usb/host/ehci-sunxi.c
@@ -67,7 +67,6 @@ static int ehci_usb_remove(struct udevice *dev)
if (ret)
return ret;
- sunxi_usb_phy_power_off(priv-phy_index);
sunxi_usb_phy_exit(priv-phy_index);
#ifdef CONFIG_SUNXI_GEN_SUN6I
diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
index e33a8f7..6079272 100644
--- a/drivers/usb/host/ohci-sunxi.c
+++ b/drivers/usb/host/ohci-sunxi.c
@@ -69,7 +69,6 @@ static int ohci_usb_remove(struct udevice *dev)
if (ret)
return ret;
- sunxi_usb_phy_power_off(priv-phy_index);
sunxi_usb_phy_exit(priv-phy_index);
#ifdef CONFIG_SUNXI_GEN_SUN6I
diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c
index 16a264a..a146c08 100644
--- a/drivers/usb/musb-new/sunxi.c
+++ b/drivers/usb/musb-new/sunxi.c
@@ -196,8 +196,6 @@ static bool enabled = false;
static int sunxi_musb_enable(struct musb *musb)
{
- int ret;
-
pr_debug(%s():\n, __func__);
musb_ep_select(musb-mregs, 0);
@@ -210,17 +208,26 @@ static int sunxi_musb_enable(struct musb *musb)
musb_writeb(musb-mregs, USBC_REG_o_VEND0, 0);
if (is_host_enabled(musb)) {
- ret = sunxi_usb_phy_vbus_detect(0);
- if (ret == 1) {
- printf(A charger is plugged into the OTG: );
- return -ENODEV;
+ int id = sunxi_usb_phy_id_detect(0);
+
+ if (id == 1 sunxi_usb_phy_power_is_on(0))
+ sunxi_usb_phy_power_off(0);
+
+ if (!sunxi_usb_phy_power_is_on(0)) {
+ int vbus = sunxi_usb_phy_vbus_detect(0);
+ if (vbus == 1) {
+ printf(A charger is plugged into the OTG: );
+ return -ENODEV;
+ }
}
- ret = sunxi_usb_phy_id_detect(0);
- if (ret == 1) {
+
+ if (id == 1) {
printf(No host cable detected: );
return -ENODEV;
}
- sunxi_usb_phy_power_on(0); /* port power on */
+
+ if (!sunxi_usb_phy_power_is_on(0))
+ sunxi_usb_phy_power_on(0);
}
USBC_ForceVbusValidToHigh(musb-mregs);
@@ -236,9 +243,6 @@ static void sunxi_musb_disable(struct musb *musb)
[U-Boot] [PATCH 2/3] sunxi: Add CONFIG_USB0_ID_DET setting to 2 more tablets
Now that we have code to check the id-pin and detect usb-host adapters plugged into the otg port that way, enable it on the tablets which I own. Signed-off-by: Hans de Goede hdego...@redhat.com --- configs/Chuwi_V7_CW0825_defconfig | 1 + configs/UTOO_P66_defconfig| 1 + 2 files changed, 2 insertions(+) diff --git a/configs/Chuwi_V7_CW0825_defconfig b/configs/Chuwi_V7_CW0825_defconfig index 4011351..f44aede 100644 --- a/configs/Chuwi_V7_CW0825_defconfig +++ b/configs/Chuwi_V7_CW0825_defconfig @@ -5,6 +5,7 @@ CONFIG_DRAM_CLK=408 CONFIG_DRAM_EMR1=4 CONFIG_USB0_VBUS_PIN=PB9 CONFIG_USB0_VBUS_DET=PH5 +CONFIG_USB0_ID_DET=PH4 CONFIG_VIDEO_LCD_MODE=x:1024,y:768,depth:24,pclk_khz:51000,le:19,ri:300,up:6,lo:31,hs:1,vs:1,sync:3,vmode:0 CONFIG_VIDEO_LCD_POWER=PH8 CONFIG_VIDEO_LCD_BL_EN=PH7 diff --git a/configs/UTOO_P66_defconfig b/configs/UTOO_P66_defconfig index 0266299..169c2e8 100644 --- a/configs/UTOO_P66_defconfig +++ b/configs/UTOO_P66_defconfig @@ -7,6 +7,7 @@ CONFIG_MMC0_CD_PIN=PG0 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB0_VBUS_PIN=PB04 CONFIG_USB0_VBUS_DET=PG01 +CONFIG_USB0_ID_DET=PG2 CONFIG_AXP_GPIO=y CONFIG_VIDEO_LCD_MODE=x:480,y:800,depth:18,pclk_khz:25000,le:2,ri:93,up:2,lo:93,hs:1,vs:1,sync:3,vmode:0 CONFIG_VIDEO_LCD_DCLK_PHASE=0 -- 2.4.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH resend V2 1/3] mtd: nand: mxs support oobsize bigger than 512
On Sat, 2015-08-01 at 17:18 +0200, Marek Vasut wrote: On Saturday, August 01, 2015 at 07:56:39 AM, Peng Fan wrote: On Fri, Jul 31, 2015 at 09:36:45PM -0500, Scott Wood wrote: On Sat, 2015-08-01 at 09:15 +0800, Peng Fan wrote: On Fri, Jul 31, 2015 at 12:07:50PM -0500, Scott Wood wrote: On Tue, 2015-07-21 at 16:15 +0800, Peng Fan wrote: If ecc chunk data size is 512 and oobsize is bigger than 512, there is a chance that block_mark_bit_offset conflicts with bch ecc area. The following graph is modified from kernel gpmi-nand.c driver with each data block 512 bytes. We can see that Block Mark conflicts with ecc area from bch view. We can enlarge the ecc chunk size to avoid this problem to those oobsize which is larger than 512. Enlarge it by how much? What does the layout look like in that case? Enlarge it to 1024 bytes. Then say so in the changelog. You mean I need to add this in commit msg and send out a new patch version? Or you pick this one? This discussion is becoming ridiculous, can we please get this bugfix applied ? If you don't like some minor details in the commit message, can you please fix them while applying ? Yes, I can edit the changelog while applying, but that doesn't mean I'm not going to complain about a difficult-to-understand changelog, and I still would like to understand what is actually going on here. Don't assume I'm familiar with this hardware or its unusual page layout. You can help by explaining things, or you can not help by throwing a fit... -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] armv8: ls2085a: Update bootargs as per default target console
LS2085 targets supports following UART console LS2085AQDS UART0 LS2085ARDB UART1 LS2085ASim UART0 LS2085AEmu UART0 So update the bootargs as per the default console present at the target Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com --- include/configs/ls2085a_common.h | 4 ++-- include/configs/ls2085ardb.h | 6 ++ 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h index 7ee6001..5dd2b0a 100644 --- a/include/configs/ls2085a_common.h +++ b/include/configs/ls2085a_common.h @@ -262,8 +262,8 @@ unsigned long long get_qixis_addr(void); kernel_size=0x280\0 \ console=ttyAMA0,38400n8\0 -#define CONFIG_BOOTARGSconsole=ttyS1,115200 root=/dev/ram0 \ - earlycon=uart8250,mmio,0x21c0600,115200 \ +#define CONFIG_BOOTARGSconsole=ttyS0,115200 root=/dev/ram0 \ + earlycon=uart8250,mmio,0x21c0500,115200 \ ramdisk_size=0x200 default_hugepagesz=2m \ hugepagesz=2m hugepages=16 #define CONFIG_BOOTCOMMAND cp.b $kernel_start $kernel_load \ diff --git a/include/configs/ls2085ardb.h b/include/configs/ls2085ardb.h index 6a5528e..c1c1572 100644 --- a/include/configs/ls2085ardb.h +++ b/include/configs/ls2085ardb.h @@ -326,6 +326,12 @@ unsigned long get_board_sys_clk(void); kernel_load=0xa000\0 \ kernel_size=0x280\0 +#undef CONFIG_BOOTARGS +#define CONFIG_BOOTARGSconsole=ttyS1,115200 root=/dev/ram0 \ + earlycon=uart8250,mmio,0x21c0600,115200 \ + ramdisk_size=0x200 default_hugepagesz=2m \ +hugepagesz=2m hugepages=16 + /* MAC/PHY configuration */ #ifdef CONFIG_FSL_MC_ENET #define CONFIG_PHYLIB_10G -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH resend V2 1/3] mtd: nand: mxs support oobsize bigger than 512
On Sat, Aug 01, 2015 at 01:54:48PM -0500, Scott Wood wrote: On Sat, 2015-08-01 at 20:38 +0200, Marek Vasut wrote: On Saturday, August 01, 2015 at 08:32:07 PM, Scott Wood wrote: On Sat, 2015-08-01 at 17:18 +0200, Marek Vasut wrote: On Saturday, August 01, 2015 at 07:56:39 AM, Peng Fan wrote: On Fri, Jul 31, 2015 at 09:36:45PM -0500, Scott Wood wrote: On Sat, 2015-08-01 at 09:15 +0800, Peng Fan wrote: On Fri, Jul 31, 2015 at 12:07:50PM -0500, Scott Wood wrote: On Tue, 2015-07-21 at 16:15 +0800, Peng Fan wrote: If ecc chunk data size is 512 and oobsize is bigger than 512, there is a chance that block_mark_bit_offset conflicts with bch ecc area. The following graph is modified from kernel gpmi-nand.c driver with each data block 512 bytes. We can see that Block Mark conflicts with ecc area from bch view. We can enlarge the ecc chunk size to avoid this problem to those oobsize which is larger than 512. Enlarge it by how much? What does the layout look like in that case? Enlarge it to 1024 bytes. Then say so in the changelog. You mean I need to add this in commit msg and send out a new patch version? Or you pick this one? This discussion is becoming ridiculous, can we please get this bugfix applied ? If you don't like some minor details in the commit message, can you please fix them while applying ? Yes, I can edit the changelog while applying, but that doesn't mean I'm not going to complain about a difficult-to-understand changelog, and I still would like to understand what is actually going on here. Don't assume I'm familiar with this hardware or its unusual page layout. You can help by explaining things, or you can not help by throwing a fit... I can point you to MX28 datasheet [1] chapter 16.2.2 and onward if you want to educate yourself, it's all explained there, concisely and clearly. [1] http://free-electrons.com/~maxime/pub/datasheet/MCIMX28RM.pdf Thanks. That preempted a question I was just about to ask Peng, because it wasn't clear that the meta area was covered by ECC. In mxs_nand.c driver, we use Combined Metadata Block 0, unbalanced ECC coverage layout from chapter 16.2.2 of MX28 datasheet. Peng. -Scott -- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH resend V2 1/3] mtd: nand: mxs support oobsize bigger than 512
On Sat, 2015-08-01 at 20:38 +0200, Marek Vasut wrote: On Saturday, August 01, 2015 at 08:32:07 PM, Scott Wood wrote: On Sat, 2015-08-01 at 17:18 +0200, Marek Vasut wrote: On Saturday, August 01, 2015 at 07:56:39 AM, Peng Fan wrote: On Fri, Jul 31, 2015 at 09:36:45PM -0500, Scott Wood wrote: On Sat, 2015-08-01 at 09:15 +0800, Peng Fan wrote: On Fri, Jul 31, 2015 at 12:07:50PM -0500, Scott Wood wrote: On Tue, 2015-07-21 at 16:15 +0800, Peng Fan wrote: If ecc chunk data size is 512 and oobsize is bigger than 512, there is a chance that block_mark_bit_offset conflicts with bch ecc area. The following graph is modified from kernel gpmi-nand.c driver with each data block 512 bytes. We can see that Block Mark conflicts with ecc area from bch view. We can enlarge the ecc chunk size to avoid this problem to those oobsize which is larger than 512. Enlarge it by how much? What does the layout look like in that case? Enlarge it to 1024 bytes. Then say so in the changelog. You mean I need to add this in commit msg and send out a new patch version? Or you pick this one? This discussion is becoming ridiculous, can we please get this bugfix applied ? If you don't like some minor details in the commit message, can you please fix them while applying ? Yes, I can edit the changelog while applying, but that doesn't mean I'm not going to complain about a difficult-to-understand changelog, and I still would like to understand what is actually going on here. Don't assume I'm familiar with this hardware or its unusual page layout. You can help by explaining things, or you can not help by throwing a fit... I can point you to MX28 datasheet [1] chapter 16.2.2 and onward if you want to educate yourself, it's all explained there, concisely and clearly. [1] http://free-electrons.com/~maxime/pub/datasheet/MCIMX28RM.pdf Thanks. That preempted a question I was just about to ask Peng, because it wasn't clear that the meta area was covered by ECC. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC PATCH] Makefile: Add SOURCE_DATE_TZ
Along with SOURCE_DATE_EPOCH SOURCE_DATE_TZ can be used to recreate a
build with a specific date timestamp. This allows the verification of
source supplied with a pre-compiled binary.
If SOURCE_DATE_EPOCH is supplied SOURCE_DATE_TZ can be used to specify
what will appear in the output of the version command. If SOURCE_DATE_TZ
is not specified UTC will be used. SOURCE_DATE_TZ on it's own will not
have an affect.
Signed-off-by: Chris Packham judge.pack...@gmail.com
---
This is a quick proof of concept that allows some control of how the
timezone is displayed.
Makefile | 7 ---
README | 9 ++---
2 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/Makefile b/Makefile
index f75c730..5102a9c 100644
--- a/Makefile
+++ b/Makefile
@@ -1232,9 +1232,10 @@ endef
define filechk_timestamp.h
(if test -n $${SOURCE_DATE_EPOCH}; then \
SOURCE_DATE=@$${SOURCE_DATE_EPOCH}; \
- LC_ALL=C date -u -d $${SOURCE_DATE} +'#define U_BOOT_DATE %b
%d %C%y'; \
- LC_ALL=C date -u -d $${SOURCE_DATE} +'#define U_BOOT_TIME
%T'; \
- LC_ALL=C date -u -d $${SOURCE_DATE} +'#define U_BOOT_TZ
%z'; \
+ SOURCE_TZ=$${SOURCE_DATE_TZ:-UTC}; \
+ TZ=$${SOURCE_TZ} LC_ALL=C date -d $${SOURCE_DATE} +'#define
U_BOOT_DATE %b %d %C%y'; \
+ TZ=$${SOURCE_TZ} LC_ALL=C date -d $${SOURCE_DATE} +'#define
U_BOOT_TIME %T'; \
+ TZ=$${SOURCE_TZ} LC_ALL=C date -d $${SOURCE_DATE} +'#define
U_BOOT_TZ %z'; \
else \
LC_ALL=C date +'#define U_BOOT_DATE %b %d %C%y'; \
LC_ALL=C date +'#define U_BOOT_TIME %T'; \
diff --git a/README b/README
index 1bcb63c..d2e3e94 100644
--- a/README
+++ b/README
@@ -5087,11 +5087,14 @@ Reproducible builds
In order to achieve reproducible builds, timestamps used in the U-Boot build
process have to be set to a fixed value.
-This is done using the SOURCE_DATE_EPOCH environment variable.
-SOURCE_DATE_EPOCH is to be set on the build host's shell, not as a
configuration
-option for U-Boot or an environment variable in U-Boot.
+This is done using the SOURCE_DATE_EPOCH and SOURCE_DATE_TZ environment
+variables. These are to be set on the build host's shell, not as a
+configuration option for U-Boot or an environment variable in U-Boot.
SOURCE_DATE_EPOCH should be set to a number of seconds since the epoch, in UTC.
+SOURCE_DATE_TZ will default to UTC but can be set to another timezone and is
+used to determine how the date is displayed (tzselect(1) can be used to
+determine an appropriate value).
Building the Software:
==
--
2.5.0.rc0
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Re: [U-Boot] [PATCH v3 0/4] sunxi: nand: Basic NAND driver for SPL
Hi, On 23-07-15 14:33, Piotr Zierhoffer wrote: This is a basic driver for the sunxi NAND controller for Allwinner A20. It supports only SPL. The driver uses DMA for data transfers. It does not support writing. Thanks for your work on this. I've merged patches 1 - 3 in my sunxi-wip branch, and I'll include them in the next u-boot-sunxi pull-req. We do need to do some more work on this, to support more different sunxi SoCs, and to add some retry logic in case the default boot pages of the nand are bad, but that can both be done in follow-up commits. Regards, Hans Changes in v3: - moved pinmux and clock to board level - code cleanup with significant size reduction - renamed the driver file - renamed constants to match Kconfig convention - moved defines from .h to .c, and renamed them to be consistent with each other - removed more magic values - changed ecc_errors from static to local variable - other minor changes - added new options in Kconfig to support different chips - changed descriptions to comply with patman rules Changes in v2: - removed traces of non-SPL-specific code - moved the driver from boards/sunxi to drivers/mtd/nand - moved magic values to defines (whenever possible) - removed unnecesary late initialisation code - code style changes as suggested for the first patch set: - changed visibility of some symbols - renamed unclear variables - renamed header protector - changed types of pointer variables - other minor changes - removed traces of non-SPL specific code - renamed defines to be more relevant - moved Kconfig entry for the driver to drivers/mtd/nand - reworded Kconfig entry help Karol Gugala (1): sunxi: nand: Add pinmux and clock settings for NAND support Piotr Zierhoffer (3): sunxi: nand: Add basic sunxi NAND driver for SPL with DMA support sunxi: nand: Add board configuration options sunxi: nand: Add information to sunxi that it was run from NAND in SPL arch/arm/cpu/armv7/sunxi/board.c | 4 + arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 2 + arch/arm/include/asm/arch-sunxi/gpio.h| 1 + board/sunxi/board.c | 27 ++ drivers/mtd/nand/Kconfig | 40 +++ drivers/mtd/nand/Makefile | 1 + drivers/mtd/nand/sunxi_nand_spl.c | 353 ++ include/configs/sunxi-common.h| 10 + 8 files changed, 438 insertions(+) create mode 100644 drivers/mtd/nand/sunxi_nand_spl.c ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] Makefile: Use correct timezone for U_BOOT_TZ
When building with SOURCE_DATE_EPOCH the timezone is in UTC. When
building normally the timezone is taken from the build machine's locale
setting.
Signed-off-by: Chris Packham judge.pack...@gmail.com
Tested-by: Bin Meng bmeng...@gmail.com
Tested-by: Paul Kocialkowski cont...@paulk.fr
---
Changes in v2:
- Collect some tested-by tags
- Remove reference to f3f431a71272 in the commit message
- Drop Ccs that were erroneously added when submitting v1, remaining Ccs
are from the original mailing list thread
Makefile | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/Makefile b/Makefile
index 394ed09..f75c730 100644
--- a/Makefile
+++ b/Makefile
@@ -1230,10 +1230,16 @@ define filechk_version.h
endef
define filechk_timestamp.h
- (SOURCE_DATE=$${SOURCE_DATE_EPOCH:+@$$SOURCE_DATE_EPOCH}; \
- LC_ALL=C date -u -d $${SOURCE_DATE:-now} +'#define U_BOOT_DATE %b %d
%C%y'; \
- LC_ALL=C date -u -d $${SOURCE_DATE:-now} +'#define U_BOOT_TIME %T';
\
- LC_ALL=C date -u -d $${SOURCE_DATE:-now} +'#define U_BOOT_TZ %z' )
+ (if test -n $${SOURCE_DATE_EPOCH}; then \
+ SOURCE_DATE=@$${SOURCE_DATE_EPOCH}; \
+ LC_ALL=C date -u -d $${SOURCE_DATE} +'#define U_BOOT_DATE %b
%d %C%y'; \
+ LC_ALL=C date -u -d $${SOURCE_DATE} +'#define U_BOOT_TIME
%T'; \
+ LC_ALL=C date -u -d $${SOURCE_DATE} +'#define U_BOOT_TZ
%z'; \
+ else \
+ LC_ALL=C date +'#define U_BOOT_DATE %b %d %C%y'; \
+ LC_ALL=C date +'#define U_BOOT_TIME %T'; \
+ LC_ALL=C date +'#define U_BOOT_TZ %z'; \
+ fi)
endef
$(version_h): include/config/uboot.release FORCE
--
2.5.0.rc0
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Re: [U-Boot] [PATCH v3 0/4] sunxi: nand: Basic NAND driver for SPL
Hi Hans, On Sat, 1 Aug 2015 14:15:53 +0200 Hans de Goede hdego...@redhat.com wrote: Hi, On 23-07-15 14:33, Piotr Zierhoffer wrote: This is a basic driver for the sunxi NAND controller for Allwinner A20. It supports only SPL. The driver uses DMA for data transfers. It does not support writing. Thanks for your work on this. I've merged patches 1 - 3 in my sunxi-wip branch, and I'll include them in the next u-boot-sunxi pull-req. Shouldn't we at least wait for Scoot's approval? Best Regards, Boris -- Boris Brezillon, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 02/15] kbuild: add a makefile macro useful with per-image config options
Commit e02ee2548afe (kconfig: switch to single .config configuration) made the configuration itself pretty simple, instead, we lost the way to systematically enable/disable config options for each image independently. Our current strategy is, put entries into Makefile.spl for options we need separate enabling, or once enable the options globally in Kconfig and then undef them in Makefile.uncmd_spl if we do not want to compile the features for SPL at all. Things are getting really messy. Besides, ifdef CONFIG_SPL_BUILD are sprinkled everywhere in makefiles. This commit adds a variable to help describe makefile simpler. $(SPL_) evaluates to SPL_ during the SPL build, while to an empty string during building U-boot proper. So, you can write obj-$(CONFIG_$(SPL_)FOO) += foo.o instead of ifdef CONFIG_SPL_BUILD obj-$(CONFIG_SPL_FOO) += foo.o else obj-$(CONFIG_FOO) += foo.o endif If CONFIG_SPL_FOO does not exist in Kconfig, it is equivalent to ifndef CONFIG_SPL_BUILD obj-$(CONFIG_SPL_FOO) += foo.o endif This is the pattern we often see in our current makefiles. To take advantage of this macro, we should prefix SPL_ for the SPL version of the option when we need independent control between U-boot and SPL. With this naming scheme, I hope our makefiles will be much simplified. It means we want to rename existing config options as follows in the long run: CONFIG_SPL_SERIAL_SUPPORT - CONFIG_SPL_SERIAL CONFIG_SPL_I2C_SUPPORT- CONFIG_SPL_I2C CONFIG_SPL_GPIO_SUPPORT - CONFIG_SPL_GPIO CONFIG_SPL_SPI_SUPPORT- CONFIG_SPL_SPI CONFIG_SPL_DISABLE_OF_CONTROL - CONFIG_SPL_OF_CONTROL (inverting the logic) Then drivers/Makefile would be re-worked as follows: obj-$(CONFIG_$(SPL_)SERIAL) += serial/ obj-$(CONFIG_$(SPL_)I2C) += i2c/ obj-$(CONFIG_$(SPL_)GPIO)+= gpio/ obj-$(CONFIG_$(SPL_)SPI) += spi/ ... Eventually, SPL-specialized entries in Makefile.spl would go away. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- Changes in v2: None scripts/Kbuild.include | 6 ++ 1 file changed, 6 insertions(+) diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include index f02eb37..98e09ce 100644 --- a/scripts/Kbuild.include +++ b/scripts/Kbuild.include @@ -309,3 +309,9 @@ why = \ echo-why = $(call escsq, $(strip $(why))) endif + +ifdef CONFIG_SPL_BUILD +SPL_ := SPL_ +else +SPL_ := +endif -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 01/15] kbuild: fixdep: optimize code slightly
If the target string matches CONFIG_, move the pointer p
forward. This saves several 7-chars adjustments.
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
---
Changes in v2: None
scripts/basic/fixdep.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/scripts/basic/fixdep.c b/scripts/basic/fixdep.c
index b304068..46cc1b3 100644
--- a/scripts/basic/fixdep.c
+++ b/scripts/basic/fixdep.c
@@ -251,7 +251,8 @@ static void parse_config_file(const char *map, size_t len)
continue;
if (memcmp(p, CONFIG_, 7))
continue;
- for (q = p + 7; q map + len; q++) {
+ p += 7;
+ for (q = p; q map + len; q++) {
if (!(isalnum(*q) || *q == '_'))
goto found;
}
@@ -260,9 +261,9 @@ static void parse_config_file(const char *map, size_t len)
found:
if (!memcmp(q - 7, _MODULE, 7))
q -= 7;
- if( (q-p-7) 0 )
+ if (q - p 0)
continue;
- use_config(p+7, q-p-7);
+ use_config(p, q - p);
}
}
--
1.9.1
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[U-Boot] [PATCH v2 03/15] linux/kconfig.h: add CPP macros useful for per-image config options
The previous commit introduced a useful macro used in makefiles,
in order to reference to different variables (CONFIG_... or
CONFIG_SPL_...) depending on the build context.
Per-image config option control is a PITA in C sources, too.
Here are some macros useful in C/CPP expressions.
CONFIG_IS_ENABLED(FOO) can be used as a shorthand for
(!defined(CONFIG_SPL_BUILD) defined(CONFIG_FOO)) || \
(defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_FOO))
For example, it is useful to describe C code as follows,
#if CONFIG_IS_ENABLED(OF_CONTROL)
(device tree code)
#else
(board file code)
#endif
The ifdef conditional above is switched by CONFIG_OF_CONTROL during
the U-Boot proper building (CONFIG_SPL_BUILD is not defined), and by
CONFIG_SPL_OF_CONTROL during SPL building (CONFIG_SPL_BUILD is
defined).
The macro can be used in C context as well, so you can also write the
equivalent code as follows:
if (CONFIG_IS_ENABLED(OF_CONTROL)) {
(device tree code)
} else {
(board file code)
}
Another useful macro is CONFIG_VALUE().
CONFIG_VALUE(FOO) is expanded into CONFIG_FOO if CONFIG_SPL_BUILD is
undefined, and into CONFIG_SPL_FOO if CONFIG_SPL_BUILD is defined.
You can write as follows:
text_base = CONFIG_VALUE(TEXT_BASE);
instead of:
#ifdef CONFIG_SPL_BUILD
text_base = CONFIG_SPL_TEXT_BASE;
#else
text_base = CONFIG_TEXT_BASE;
#endif
This commit also adds slight hacking on fixdep so that it can
output a correct list of fixed dependencies.
If the fixdep finds CONFIG_IS_ENABLED(FOO) in a source file,
we want
$(wildcard include/config/foo.h)
in the U-boot proper building context, while we want
$(wildcard include/config/spl/foo.h)
in the SPL build context.
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
Reviewed-by: Tom Rini tr...@konsulko.com
---
Changes in v2: None
include/linux/kconfig.h | 48
scripts/basic/fixdep.c | 26 ++
2 files changed, 74 insertions(+)
diff --git a/include/linux/kconfig.h b/include/linux/kconfig.h
index be342b9..486fb94 100644
--- a/include/linux/kconfig.h
+++ b/include/linux/kconfig.h
@@ -43,4 +43,52 @@
*/
#define IS_MODULE(option) config_enabled(option##_MODULE)
+/*
+ * U-Boot add-on: Helper macros to reference to different macros
+ * (CONFIG_ or CONFIG_SPL_ prefixed), depending on the build context.
+ */
+#ifdef CONFIG_SPL_BUILD
+#define _IS_SPL 1
+#endif
+
+#define config_val(cfg) _config_val(_IS_SPL, cfg)
+#define _config_val(x, cfg) __config_val(x, cfg)
+#define __config_val(x, cfg) ___config_val(__ARG_PLACEHOLDER_##x, cfg)
+#define ___config_val(arg1_or_junk, cfg) \
+ config_val(arg1_or_junk CONFIG_SPL_##cfg, CONFIG_##cfg)
+#define config_val(__ignored, val, ...) val
+
+/*
+ * CONFIG_VAL(FOO) evaluates to the value of
+ * CONFIG_FOO if CONFIG_SPL_BUILD is undefined,
+ * CONFIG_SPL_FOO if CONFIG_SPL_BUILD is defined.
+ */
+#define CONFIG_VAL(option) config_val(option)
+
+/*
+ * CONFIG_IS_ENABLED(FOO) evaluates to
+ * 1 if CONFIG_SPL_BUILD is undefined and CONFIG_FOO is set to 'y' or 'm',
+ * 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_FOO is set to 'y' or 'm',
+ * 0 otherwise.
+ */
+#define CONFIG_IS_ENABLED(option) \
+ (config_enabled(CONFIG_VAL(option)) || \
+config_enabled(CONFIG_VAL(option##_MODULE)))
+
+/*
+ * CONFIG_IS_BUILTIN(FOO) evaluates to
+ * 1 if CONFIG_SPL_BUILD is undefined and CONFIG_FOO is set to 'y',
+ * 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_FOO is set to 'y',
+ * 0 otherwise.
+ */
+#define CONFIG_IS_BUILTIN(option) config_enabled(CONFIG_VAL(option))
+
+/*
+ * CONFIG_IS_MODULE(FOO) evaluates to
+ * 1 if CONFIG_SPL_BUILD is undefined and CONFIG_FOO is set to 'm',
+ * 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_FOO is set to 'm',
+ * 0 otherwise.
+ */
+#define CONFIG_IS_MODULE(option) config_enabled(CONFIG_VAL(option##_MODULE))
+
#endif /* __LINUX_KCONFIG_H */
diff --git a/scripts/basic/fixdep.c b/scripts/basic/fixdep.c
index 46cc1b3..20fed03 100644
--- a/scripts/basic/fixdep.c
+++ b/scripts/basic/fixdep.c
@@ -123,6 +123,7 @@
char *target;
char *depfile;
char *cmdline;
+int is_spl_build = 0; /* hack for U-boot */
static void usage(void)
{
@@ -239,6 +240,7 @@ static void parse_config_file(const char *map, size_t len)
/* start at +1, so that p can never be map */
const int *m = (const int *) map + 1;
const char *p, *q;
+ char tmp_buf[256] = SPL_; /* hack for U-Boot */
for (; m end; m++) {
if (*m == INT_CONF) { p = (char *) m ; goto conf; }
@@ -263,6 +265,26 @@ static void parse_config_file(const char *map, size_t len)
q -= 7;
if (q - p 0)
continue;
+
+ /* U-Boot also handles CONFIG_IS_{ENABLED/BUILTIN/MODULE} */
+ if ((q - p == 10 !memcmp(p, IS_ENABLED(, 11)) ||
+
[U-Boot] [PATCH v2 05/15] dm: unify obj-$(CONFIG_DM) and obj-$(CONFIG_SPL_DM) entries
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- Changes in v2: None drivers/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/Makefile b/drivers/Makefile index 2515aab..dd57849 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -1,7 +1,8 @@ +obj-$(CONFIG_$(SPL_)DM)+= core/ + ifdef CONFIG_SPL_BUILD obj-$(CONFIG_SPL_CLK_SUPPORT) += clk/ -obj-$(CONFIG_SPL_DM) += core/ obj-$(CONFIG_SPL_I2C_SUPPORT) += i2c/ obj-$(CONFIG_SPL_GPIO_SUPPORT) += gpio/ obj-$(CONFIG_SPL_MMC_SUPPORT) += mmc/ @@ -33,7 +34,6 @@ obj-$(CONFIG_SPL_SATA_SUPPORT) += block/ else obj-$(CONFIG_CLK) += clk/ -obj-$(CONFIG_DM) += core/ obj-$(CONFIG_DM_DEMO) += demo/ obj-$(CONFIG_BIOSEMU) += bios_emulator/ obj-y += block/ -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] drivers: hierarchize drivers Kconfig menu
On Saturday, August 01, 2015 at 11:08:10 AM, Paul Kocialkowski wrote: Hi, Le lundi 27 juillet 2015 à 14:33 +0200, Paul Kocialkowski a écrit : Le dimanche 26 juillet 2015 à 02:46 +0900, Masahiro Yamada a écrit : The menuconfig for drivers are getting more and more cluttered and unreadable because too many entries are displayed in a single flat menu. Use hierarchic menu for each category. That looks like a valuable addition to me! This patch was submitted a week ago and I need it for merging another series of mine, that was already accepted. Is there anything preventing this patch from being merged at this point? People not having just one patch on their plate and thus being busy ;-) Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH resend V2 1/3] mtd: nand: mxs support oobsize bigger than 512
On Saturday, August 01, 2015 at 07:56:39 AM, Peng Fan wrote: On Fri, Jul 31, 2015 at 09:36:45PM -0500, Scott Wood wrote: On Sat, 2015-08-01 at 09:15 +0800, Peng Fan wrote: On Fri, Jul 31, 2015 at 12:07:50PM -0500, Scott Wood wrote: On Tue, 2015-07-21 at 16:15 +0800, Peng Fan wrote: If ecc chunk data size is 512 and oobsize is bigger than 512, there is a chance that block_mark_bit_offset conflicts with bch ecc area. The following graph is modified from kernel gpmi-nand.c driver with each data block 512 bytes. We can see that Block Mark conflicts with ecc area from bch view. We can enlarge the ecc chunk size to avoid this problem to those oobsize which is larger than 512. Enlarge it by how much? What does the layout look like in that case? Enlarge it to 1024 bytes. Then say so in the changelog. You mean I need to add this in commit msg and send out a new patch version? Or you pick this one? This discussion is becoming ridiculous, can we please get this bugfix applied ? If you don't like some minor details in the commit message, can you please fix them while applying ? Thanks [...] Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 0/4] sunxi: nand: Basic NAND driver for SPL
On Sat, 2015-08-01 at 14:30 +0200, Boris Brezillon wrote: Hi Hans, On Sat, 1 Aug 2015 14:15:53 +0200 Hans de Goede hdego...@redhat.com wrote: Hi, On 23-07-15 14:33, Piotr Zierhoffer wrote: This is a basic driver for the sunxi NAND controller for Allwinner A20. It supports only SPL. The driver uses DMA for data transfers. It does not support writing. Thanks for your work on this. I've merged patches 1 - 3 in my sunxi-wip branch, and I'll include them in the next u-boot-sunxi pull-req. Shouldn't we at least wait for Scoot's approval? Or Scott's. :-) ACK, though I'd encourage quickly implementing multiple spl payload locations to work around the breakage of the bad block marker mechanism, as was discussed. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 24/28] ddr: altera: sdram: Clean up sdram_write_verify()
Clean the function up so that it's obvious what it is doing,
fix the formating strings in debug outputs, add kerneldoc.
Make the function return proper errno-compliant return values
and propagate this change throughout sdram.c
Signed-off-by: Marek Vasut ma...@denx.de
---
drivers/ddr/altera/sdram.c | 51 +++---
1 file changed, 26 insertions(+), 25 deletions(-)
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index 45ae690..fe2e753 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -231,28 +231,30 @@ static void sdram_dump_protection_config(void)
}
}
-/* Function to write to register and verify the write */
-static unsigned sdram_write_verify(unsigned int *addr, unsigned reg_value)
+/**
+ * sdram_write_verify() - write to register and verify the write.
+ * @addr: Register address
+ * @val: Value to be written and verified
+ *
+ * This function writes to a register, reads back the value and compares
+ * the result with the written value to check if the data match.
+ */
+static unsigned sdram_write_verify(const u32 *addr, const u32 val)
{
-#ifndef SDRAM_MMR_SKIP_VERIFY
- unsigned reg_value1;
-#endif
- debug( Write - Address );
- debug(0x%08x Data 0x%08x\n, (u32)addr, reg_value);
- /* Write to register */
- writel(reg_value, addr);
-#ifndef SDRAM_MMR_SKIP_VERIFY
+ u32 rval;
+
+ debug( Write - Address 0x%p Data 0x%08x\n, addr, val);
+ writel(val, addr);
+
debug( Read and verify...);
- /* Read back the wrote value */
- reg_value1 = readl(addr);
- /* Indicate failure if value not matched */
- if (reg_value1 != reg_value) {
- debug(FAIL - Address 0x%08x Expected 0x%08x Data 0x%08x\n,
- (u32)addr, reg_value, reg_value1);
- return 1;
+ rval = readl(addr);
+ if (rval != val) {
+ debug(FAIL - Address 0x%p Expected 0x%08x Data 0x%08x\n,
+ addr, val, rval);
+ return -EINVAL;
}
+
debug(correct!\n);
-#endif /* SDRAM_MMR_SKIP_VERIFY */
return 0;
}
@@ -412,11 +414,11 @@ static void sdr_load_regs(const struct
socfpga_sdram_config *cfg)
*/
int sdram_mmr_init_full(unsigned int sdr_phy_reg)
{
- unsigned long status = 0;
const struct socfpga_sdram_config *cfg = socfpga_get_sdram_config();
const unsigned int rows =
(cfg-dram_addrw SDR_CTRLGRP_DRAMADDRW_ROWBITS_MASK)
SDR_CTRLGRP_DRAMADDRW_ROWBITS_LSB;
+ int ret;
writel(rows, sysmgr_regs-iswgrp_handoff[4]);
@@ -427,11 +429,10 @@ int sdram_mmr_init_full(unsigned int sdr_phy_reg)
/* only enable if the FPGA is programmed */
if (fpgamgr_test_fpga_ready()) {
- if (sdram_write_verify(sdr_ctrl-fpgaport_rst,
- cfg-fpgaport_rst) == 1) {
- status = 1;
- return 1;
- }
+ ret = sdram_write_verify(sdr_ctrl-fpgaport_rst,
+cfg-fpgaport_rst);
+ if (ret)
+ return ret;
}
/* Restore the SDR PHY Register if valid */
@@ -448,7 +449,7 @@ int sdram_mmr_init_full(unsigned int sdr_phy_reg)
sdram_dump_protection_config();
- return status;
+ return 0;
}
/**
--
2.1.4
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[U-Boot] [PATCH 26/28] ddr: altera: sdram: Minor cleanup in sdram_set_rule()
Zap an obscure unneeded cast and clean other minor nits in this function.
Signed-off-by: Marek Vasut ma...@denx.de
---
drivers/ddr/altera/sdram.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index e16f116..da7f27f 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -117,8 +117,8 @@ static void sdram_set_rule(struct sdram_prot_rule *prule)
writel(ruleno, sdr_ctrl-prot_rule_rdwr);
/* Obtain the address bits */
- lo_addr_bits = (uint32_t)(((prule-sdram_start) 20ULL) 0xFFF);
- hi_addr_bits = (uint32_t)prule-sdram_end-1) 20ULL)) 0xFFF);
+ lo_addr_bits = prule-sdram_start 20ULL;
+ hi_addr_bits = (prule-sdram_end - 1) 20ULL;
debug(sdram set rule start %x, %lld\n, lo_addr_bits,
prule-sdram_start);
@@ -138,7 +138,7 @@ static void sdram_set_rule(struct sdram_prot_rule *prule)
sdr_ctrl-prot_rule_data);
/* write the rule */
- writel(ruleno | (1L 5), sdr_ctrl-prot_rule_rdwr);
+ writel(ruleno | (1 5), sdr_ctrl-prot_rule_rdwr);
/* Set rule number to 0 by default */
writel(0, sdr_ctrl-prot_rule_rdwr);
@@ -183,7 +183,7 @@ static void sdram_set_protection_config(uint64_t
sdram_start, uint64_t sdram_end
writel(0x0, sdr_ctrl-protport_default);
/* Clear all protection rules for warm boot case */
- memset(rule, 0, sizeof(struct sdram_prot_rule));
+ memset(rule, 0, sizeof(rule));
for (rules = 0; rules 20; rules++) {
rule.rule = rules;
--
2.1.4
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[U-Boot] [PATCH 28/28] ddr: altera: sdram: Make sdram_start and sdram_end into u32
Originally, both sdram_start and sdram_end were 64b values. The
sdram_start had no reason for being so, since our address space
is only 32b, so switching sdram_start to u32 is simple.
The sdram_end is a bit more complex, since it can actually be
set to (1 32) if someone really wanted to use an SoCFPGA with
4 GiB of DRAM and fixed the code around a little. But, the code
handling the protection rules internally decrements the sdram_end
variable anyway. Thus, instead of calling the code and passing in
the address of the SDRAM end, pass in the address already decremented
by one. This lets the sdram_end be 32b as well.
Signed-off-by: Marek Vasut ma...@denx.de
---
drivers/ddr/altera/sdram.c | 23 ---
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index 22cad88..1ed2883 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -15,8 +15,8 @@
DECLARE_GLOBAL_DATA_PTR;
struct sdram_prot_rule {
- u64 sdram_start;/* SDRAM start address */
- u64 sdram_end; /* SDRAM end address */
+ u32 sdram_start;/* SDRAM start address */
+ u32 sdram_end; /* SDRAM end address */
u32 rule; /* SDRAM protection rule number: 0-19 */
int valid; /* Rule valid or not? 1 - valid, 0 not*/
@@ -109,8 +109,8 @@ static int get_errata_rows(const struct
socfpga_sdram_config *cfg)
/* SDRAM protection rules vary from 0-19, a total of 20 rules. */
static void sdram_set_rule(struct sdram_prot_rule *prule)
{
- uint32_t lo_addr_bits;
- uint32_t hi_addr_bits;
+ u32 lo_addr_bits;
+ u32 hi_addr_bits;
int ruleno = prule-rule;
/* Select the rule */
@@ -118,11 +118,11 @@ static void sdram_set_rule(struct sdram_prot_rule *prule)
/* Obtain the address bits */
lo_addr_bits = prule-sdram_start 20ULL;
- hi_addr_bits = (prule-sdram_end - 1) 20ULL;
+ hi_addr_bits = prule-sdram_end 20ULL;
- debug(sdram set rule start %x, %lld\n, lo_addr_bits,
+ debug(sdram set rule start %x, %d\n, lo_addr_bits,
prule-sdram_start);
- debug(sdram set rule end %x, %lld\n, hi_addr_bits,
+ debug(sdram set rule end %x, %d\n, hi_addr_bits,
prule-sdram_end);
/* Set rule addresses */
@@ -174,7 +174,8 @@ static void sdram_get_rule(struct sdram_prot_rule *prule)
prule-result = (data 13) 0x1;
}
-static void sdram_set_protection_config(uint64_t sdram_start, uint64_t
sdram_end)
+static void
+sdram_set_protection_config(const u32 sdram_start, const u32 sdram_end)
{
struct sdram_prot_rule rule;
int rules;
@@ -219,8 +220,8 @@ static void sdram_dump_protection_config(void)
for (rules = 0; rules 20; rules++) {
sdram_get_rule(rule);
debug(Rule %d, rules ...\n, rules);
- debug(sdram start %llx\n, rule.sdram_start);
- debug(sdram end %llx\n, rule.sdram_end);
+ debug(sdram start %x\n, rule.sdram_start);
+ debug(sdram end %x\n, rule.sdram_end);
debug(low prot id %d, hi prot id %d\n,
rule.lo_prot_id,
rule.hi_prot_id);
@@ -457,7 +458,7 @@ int sdram_mmr_init_full(unsigned int sdr_phy_reg)
SDR_CTRLGRP_STATICCFG_APPLYCFG_MASK,
1 SDR_CTRLGRP_STATICCFG_APPLYCFG_LSB);
- sdram_set_protection_config(0, sdram_calculate_size());
+ sdram_set_protection_config(0, sdram_calculate_size() - 1);
sdram_dump_protection_config();
--
2.1.4
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[U-Boot] [PATCH 23/28] ddr: altera: sdram: Clean up sdram_calculate_size() part 2
Clean up coding style, mostly clean up comments, add kerneldoc.
Also, zap assignment of the cs variable, which is outright
dead code, so just remove it.
Signed-off-by: Marek Vasut ma...@denx.de
---
drivers/ddr/altera/sdram.c | 35 ---
1 file changed, 12 insertions(+), 23 deletions(-)
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index b540c78..45ae690 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -451,14 +451,11 @@ int sdram_mmr_init_full(unsigned int sdr_phy_reg)
return status;
}
-/*
- * To calculate SDRAM device size based on SDRAM controller parameters.
- * Size is specified in bytes.
+/**
+ * sdram_calculate_size() - Calculate SDRAM size
*
- * NOTE:
- * This function is compiled and linked into the preloader and
- * Uboot (there may be others). So if this function changes, the Preloader
- * and UBoot must be updated simultaneously.
+ * Calculate SDRAM device size based on SDRAM controller parameters.
+ * Size is specified in bytes.
*/
unsigned long sdram_calculate_size(void)
{
@@ -476,23 +473,17 @@ unsigned long sdram_calculate_size(void)
col = (temp SDR_CTRLGRP_DRAMADDRW_COLBITS_MASK)
SDR_CTRLGRP_DRAMADDRW_COLBITS_LSB;
- /* SDRAM Failure When Accessing Non-Existent Memory
+ /*
+* SDRAM Failure When Accessing Non-Existent Memory
* Use ROWBITS from Quartus/QSys to calculate SDRAM size
* since the FB specifies we modify ROWBITs to work around SDRAM
* controller issue.
-*
-* If the stored handoff value for rows is 0, it probably means
-* the preloader is older than UBoot. Use the
-* #define from the SOCEDS Tools per Crucible review
-* uboot-socfpga-204. Note that this is not a supported
-* configuration and is not tested. The customer
-* should be using preloader and uboot built from the
-* same tag.
*/
row = readl(sysmgr_regs-iswgrp_handoff[4]);
if (row == 0)
row = rowbits;
- /* If the stored handoff value for rows is greater than
+ /*
+* If the stored handoff value for rows is greater than
* the field width in the sdr.dramaddrw register then
* something is very wrong. Revert to using the the #define
* value handed off by the SOCEDS tool chain instead of
@@ -504,18 +495,16 @@ unsigned long sdram_calculate_size(void)
bank = (temp SDR_CTRLGRP_DRAMADDRW_BANKBITS_MASK)
SDR_CTRLGRP_DRAMADDRW_BANKBITS_LSB;
- /* SDRAM Failure When Accessing Non-Existent Memory
+ /*
+* SDRAM Failure When Accessing Non-Existent Memory
* Use CSBITs from Quartus/QSys to calculate SDRAM size
* since the FB specifies we modify CSBITs to work around SDRAM
* controller issue.
*/
- cs = (temp SDR_CTRLGRP_DRAMADDRW_CSBITS_MASK)
- SDR_CTRLGRP_DRAMADDRW_CSBITS_LSB;
- cs += 1;
-
cs = csbits;
width = readl(sdr_ctrl-dram_if_width);
+
/* ECC would not be calculated as its not addressible */
if (width == SDRAM_WIDTH_32BIT_WITH_ECC)
width = 32;
@@ -526,7 +515,7 @@ unsigned long sdram_calculate_size(void)
temp = 1 (row + bank + col);
temp = temp * cs * (width / 8);
- debug(sdram_calculate_memory returns %ld\n, temp);
+ debug(%s returns %ld\n, __func__, temp);
return temp;
}
--
2.1.4
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[U-Boot] [PATCH 16/28] ddr: altera: sdram: Clean up sdram_mmr_init_full() part 4
Merge sdr_set_*() functions which are just setting registers among
the sea of register setting in sdram_mmr_init_full(). There is no
need to keep them separate this way, there is nothing special about
them.
Signed-off-by: Marek Vasut ma...@denx.de
---
drivers/ddr/altera/sdram.c | 98 +-
1 file changed, 36 insertions(+), 62 deletions(-)
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index 595f2a4..199e8b8 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -501,24 +501,6 @@ static void set_sdr_ctrlcfg(struct socfpga_sdram_config
*cfg)
writel(ctrl_cfg, sdr_ctrl-ctrl_cfg);
}
-static void set_sdr_dram_timing(struct socfpga_sdram_config *cfg)
-{
- debug(Configuring DRAMTIMING1\n);
- writel(cfg-dram_timing1, sdr_ctrl-dram_timing1);
-
- debug(Configuring DRAMTIMING2\n);
- writel(cfg-dram_timing2, sdr_ctrl-dram_timing2);
-
- debug(Configuring DRAMTIMING3\n);
- writel(cfg-dram_timing3, sdr_ctrl-dram_timing3);
-
- debug(Configuring DRAMTIMING4\n);
- writel(cfg-dram_timing4, sdr_ctrl-dram_timing4);
-
- debug(Configuring LOWPWRTIMING\n);
- writel(cfg-lowpwr_timing, sdr_ctrl-lowpwr_timing);
-}
-
static void set_sdr_addr_rw(struct socfpga_sdram_config *cfg)
{
/*
@@ -536,44 +518,6 @@ static void set_sdr_addr_rw(struct socfpga_sdram_config
*cfg)
sdr_ctrl-dram_addrw);
}
-static void set_sdr_static_cfg(struct socfpga_sdram_config *cfg)
-{
- debug(Configuring STATICCFG\n);
- writel(cfg-static_cfg, sdr_ctrl-static_cfg);
-}
-
-static void set_sdr_fifo_cfg(struct socfpga_sdram_config *cfg)
-{
- debug(Configuring FIFOCFG\n);
- writel(cfg-fifo_cfg, sdr_ctrl-fifo_cfg);
-}
-
-static void set_sdr_mp_weight(struct socfpga_sdram_config *cfg)
-{
- debug(Configuring MPWEIGHT_MPWEIGHT_0\n);
- writel(cfg-mp_weight0, sdr_ctrl-mp_weight0);
- writel(cfg-mp_weight1, sdr_ctrl-mp_weight1);
- writel(cfg-mp_weight2, sdr_ctrl-mp_weight2);
- writel(cfg-mp_weight3, sdr_ctrl-mp_weight3);
-}
-
-static void set_sdr_mp_pacing(struct socfpga_sdram_config *cfg)
-{
- debug(Configuring MPPACING_MPPACING_0\n);
- writel(cfg-mp_pacing0, sdr_ctrl-mp_pacing0);
- writel(cfg-mp_pacing1, sdr_ctrl-mp_pacing1);
- writel(cfg-mp_pacing2, sdr_ctrl-mp_pacing2);
- writel(cfg-mp_pacing3, sdr_ctrl-mp_pacing3);
-}
-
-static void set_sdr_mp_threshold(struct socfpga_sdram_config *cfg)
-{
- debug(Configuring MPTHRESHOLDRST_MPTHRESHOLDRST_0\n);
- writel(cfg-mp_threshold0, sdr_ctrl-mp_threshold0);
- writel(cfg-mp_threshold1, sdr_ctrl-mp_threshold1);
- writel(cfg-mp_threshold2, sdr_ctrl-mp_threshold2);
-}
-
/* Function to initialize SDRAM MMR */
unsigned sdram_mmr_init_full(unsigned int sdr_phy_reg)
{
@@ -586,7 +530,22 @@ unsigned sdram_mmr_init_full(unsigned int sdr_phy_reg)
writel(rows, sysmgr_regs-iswgrp_handoff[4]);
set_sdr_ctrlcfg(cfg);
- set_sdr_dram_timing(cfg);
+
+ debug(Configuring DRAMTIMING1\n);
+ writel(cfg-dram_timing1, sdr_ctrl-dram_timing1);
+
+ debug(Configuring DRAMTIMING2\n);
+ writel(cfg-dram_timing2, sdr_ctrl-dram_timing2);
+
+ debug(Configuring DRAMTIMING3\n);
+ writel(cfg-dram_timing3, sdr_ctrl-dram_timing3);
+
+ debug(Configuring DRAMTIMING4\n);
+ writel(cfg-dram_timing4, sdr_ctrl-dram_timing4);
+
+ debug(Configuring LOWPWRTIMING\n);
+ writel(cfg-lowpwr_timing, sdr_ctrl-lowpwr_timing);
+
set_sdr_addr_rw(cfg);
debug(Configuring DRAMIFWIDTH\n);
@@ -601,7 +560,8 @@ unsigned sdram_mmr_init_full(unsigned int sdr_phy_reg)
debug(Configuring DRAMINTR\n);
writel(cfg-dram_intr, sdr_ctrl-dram_intr);
- set_sdr_static_cfg(cfg);
+ debug(Configuring STATICCFG\n);
+ writel(cfg-static_cfg, sdr_ctrl-static_cfg);
debug(Configuring CTRLWIDTH\n);
writel(cfg-ctrl_width, sdr_ctrl-ctrl_width);
@@ -609,14 +569,28 @@ unsigned sdram_mmr_init_full(unsigned int sdr_phy_reg)
debug(Configuring PORTCFG\n);
writel(cfg-port_cfg, sdr_ctrl-port_cfg);
- set_sdr_fifo_cfg(cfg);
+ debug(Configuring FIFOCFG\n);
+ writel(cfg-fifo_cfg, sdr_ctrl-fifo_cfg);
debug(Configuring MPPRIORITY\n);
writel(cfg-mp_priority, sdr_ctrl-mp_priority);
- set_sdr_mp_weight(cfg);
- set_sdr_mp_pacing(cfg);
- set_sdr_mp_threshold(cfg);
+ debug(Configuring MPWEIGHT_MPWEIGHT_0\n);
+ writel(cfg-mp_weight0, sdr_ctrl-mp_weight0);
+ writel(cfg-mp_weight1, sdr_ctrl-mp_weight1);
+ writel(cfg-mp_weight2, sdr_ctrl-mp_weight2);
+ writel(cfg-mp_weight3, sdr_ctrl-mp_weight3);
+
+ debug(Configuring MPPACING_MPPACING_0\n);
+ writel(cfg-mp_pacing0, sdr_ctrl-mp_pacing0);
+ writel(cfg-mp_pacing1, sdr_ctrl-mp_pacing1);
+ writel(cfg-mp_pacing2,
[U-Boot] [PATCH 21/28] ddr: altera: sdram: Introduce socfpga_sdram_get_config()
Introduce socfpga_sdram_get_config() function implement in a board file,
which returns the socfpga_sdram_config structure. This is the last step
in cleaning up the socfpga_mmr_init_full(), but not the last step which
allows removing the inclusion of sdram.h from drivers/ddr/altera/sdram.c
thus far.
Signed-off-by: Marek Vasut ma...@denx.de
---
arch/arm/mach-socfpga/include/mach/sdram.h | 42 ++
board/altera/socfpga/Makefile | 3 +-
board/altera/socfpga/wrap_sdram_config.c | 185
drivers/ddr/altera/sdram.c | 216 +
4 files changed, 234 insertions(+), 212 deletions(-)
create mode 100644 board/altera/socfpga/wrap_sdram_config.c
diff --git a/arch/arm/mach-socfpga/include/mach/sdram.h
b/arch/arm/mach-socfpga/include/mach/sdram.h
index 89240b8..0cebd50 100644
--- a/arch/arm/mach-socfpga/include/mach/sdram.h
+++ b/arch/arm/mach-socfpga/include/mach/sdram.h
@@ -73,6 +73,48 @@ struct socfpga_sdr_ctrl {
u32 phy_ctrl2;
};
+/* SDRAM configuration structure for the SPL. */
+struct socfpga_sdram_config {
+ u32 ctrl_cfg;
+ u32 dram_timing1;
+ u32 dram_timing2;
+ u32 dram_timing3;
+ u32 dram_timing4;
+ u32 lowpwr_timing;
+ u32 dram_odt;
+ u32 dram_addrw;
+ u32 dram_if_width;
+ u32 dram_dev_width;
+ u32 dram_intr;
+ u32 lowpwr_eq;
+ u32 static_cfg;
+ u32 ctrl_width;
+ u32 cport_width;
+ u32 cport_wmap;
+ u32 cport_rmap;
+ u32 rfifo_cmap;
+ u32 wfifo_cmap;
+ u32 cport_rdwr;
+ u32 port_cfg;
+ u32 fpgaport_rst;
+ u32 fifo_cfg;
+ u32 mp_priority;
+ u32 mp_weight0;
+ u32 mp_weight1;
+ u32 mp_weight2;
+ u32 mp_weight3;
+ u32 mp_pacing0;
+ u32 mp_pacing1;
+ u32 mp_pacing2;
+ u32 mp_pacing3;
+ u32 mp_threshold0;
+ u32 mp_threshold1;
+ u32 mp_threshold2;
+ u32 phy_ctrl0;
+};
+
+const struct socfpga_sdram_config *socfpga_get_sdram_config(void);
+
#define SDR_CTRLGRP_CTRLCFG_NODMPINS_LSB 23
#define SDR_CTRLGRP_CTRLCFG_NODMPINS_MASK 0x0080
#define SDR_CTRLGRP_CTRLCFG_DQSTRKEN_LSB 22
diff --git a/board/altera/socfpga/Makefile b/board/altera/socfpga/Makefile
index 640f629..5a15c71 100644
--- a/board/altera/socfpga/Makefile
+++ b/board/altera/socfpga/Makefile
@@ -7,4 +7,5 @@
#
obj-y := socfpga.o wrap_pll_config.o
-obj-$(CONFIG_SPL_BUILD) += wrap_iocsr_config.o wrap_pinmux_config.o
+obj-$(CONFIG_SPL_BUILD) += wrap_iocsr_config.o wrap_pinmux_config.o\
+ wrap_sdram_config.o
diff --git a/board/altera/socfpga/wrap_sdram_config.c
b/board/altera/socfpga/wrap_sdram_config.c
new file mode 100644
index 000..c70854e
--- /dev/null
+++ b/board/altera/socfpga/wrap_sdram_config.c
@@ -0,0 +1,185 @@
+/*
+ * Copyright (C) 2015 Marek Vasut ma...@denx.de
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include errno.h
+#include asm/arch/sdram.h
+/* QTS output file. */
+#include qts/sdram_config.h
+
+static const struct socfpga_sdram_config sdram_config = {
+ .ctrl_cfg =
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE
+ SDR_CTRLGRP_CTRLCFG_MEMTYPE_LSB)|
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL
+ SDR_CTRLGRP_CTRLCFG_MEMBL_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER
+ SDR_CTRLGRP_CTRLCFG_ADDRORDER_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN
+ SDR_CTRLGRP_CTRLCFG_ECCEN_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN
+ SDR_CTRLGRP_CTRLCFG_ECCCORREN_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN
+ SDR_CTRLGRP_CTRLCFG_REORDEREN_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT
+ SDR_CTRLGRP_CTRLCFG_STARVELIMIT_LSB)|
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN
+ SDR_CTRLGRP_CTRLCFG_DQSTRKEN_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS
+ SDR_CTRLGRP_CTRLCFG_NODMPINS_LSB),
+ .dram_timing1 =
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL
+ SDR_CTRLGRP_DRAMTIMING1_TCWL_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL
+ SDR_CTRLGRP_DRAMTIMING1_TAL_LSB)|
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL
+ SDR_CTRLGRP_DRAMTIMING1_TCL_LSB)|
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD
+
[U-Boot] [PATCH 20/28] ddr: altera: sdram: Clean up sdram_mmr_init_full() part 8
Fix the return value so that standard errno return values can be used.
Signed-off-by: Marek Vasut ma...@denx.de
---
arch/arm/mach-socfpga/include/mach/sdram.h | 2 +-
drivers/ddr/altera/sdram.c | 3 ++-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-socfpga/include/mach/sdram.h
b/arch/arm/mach-socfpga/include/mach/sdram.h
index d57257d..89240b8 100644
--- a/arch/arm/mach-socfpga/include/mach/sdram.h
+++ b/arch/arm/mach-socfpga/include/mach/sdram.h
@@ -9,7 +9,7 @@
#ifndef __ASSEMBLY__
unsigned long sdram_calculate_size(void);
-unsigned sdram_mmr_init_full(unsigned int sdr_phy_reg);
+int sdram_mmr_init_full(unsigned int sdr_phy_reg);
int sdram_calibration_full(void);
extern int sdram_calibration(void);
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index 295747b..68a9b60 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -4,6 +4,7 @@
* SPDX-License-Identifier:GPL-2.0+
*/
#include common.h
+#include errno.h
#include div64.h
#include watchdog.h
#include asm/arch/fpga_manager.h
@@ -621,7 +622,7 @@ static void sdr_load_regs(struct socfpga_sdram_config *cfg)
*
* Initialize the SDRAM MMR.
*/
-unsigned sdram_mmr_init_full(unsigned int sdr_phy_reg)
+int sdram_mmr_init_full(unsigned int sdr_phy_reg)
{
unsigned long status = 0;
struct socfpga_sdram_config *cfg = sdram_config;
--
2.1.4
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[U-Boot] [PATCH 17/28] ddr: altera: sdram: Clean up sdram_mmr_init_full() part 5
Rework remaining two register setting functions such that they only
return the final register value. Move the register setting into the
block of register I/O in sdram_mmr_init_full().
Signed-off-by: Marek Vasut ma...@denx.de
---
drivers/ddr/altera/sdram.c | 21 +++--
1 file changed, 11 insertions(+), 10 deletions(-)
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index 199e8b8..1d9324a 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -467,7 +467,7 @@ static unsigned sdram_write_verify(unsigned int *addr,
unsigned reg_value)
return 0;
}
-static void set_sdr_ctrlcfg(struct socfpga_sdram_config *cfg)
+static u32 sdr_get_ctrlcfg(struct socfpga_sdram_config *cfg)
{
const u32 csbits =
((cfg-dram_addrw SDR_CTRLGRP_DRAMADDRW_CSBITS_MASK)
@@ -478,8 +478,6 @@ static void set_sdr_ctrlcfg(struct socfpga_sdram_config
*cfg)
u32 ctrl_cfg = cfg-ctrl_cfg;
- debug(\nConfiguring CTRLCFG\n);
-
/*
* SDRAM Failure When Accessing Non-Existent Memory
* Set the addrorder field of the SDRAM control register
@@ -498,10 +496,10 @@ static void set_sdr_ctrlcfg(struct socfpga_sdram_config
*cfg)
ctrl_cfg = ~SDR_CTRLGRP_CTRLCFG_ADDRORDER_MASK;
ctrl_cfg |= addrorder SDR_CTRLGRP_CTRLCFG_ADDRORDER_LSB;
- writel(ctrl_cfg, sdr_ctrl-ctrl_cfg);
+ return ctrl_cfg;
}
-static void set_sdr_addr_rw(struct socfpga_sdram_config *cfg)
+static u32 sdr_get_addr_rw(struct socfpga_sdram_config *cfg)
{
/*
* SDRAM Failure When Accessing Non-Existent Memory
@@ -513,9 +511,7 @@ static void set_sdr_addr_rw(struct socfpga_sdram_config
*cfg)
const int rows = get_errata_rows(cfg);
u32 dram_addrw = cfg-dram_addrw ~SDR_CTRLGRP_DRAMADDRW_ROWBITS_MASK;
- debug(Configuring DRAMADDRW\n);
- writel(dram_addrw | (rows SDR_CTRLGRP_DRAMADDRW_ROWBITS_LSB),
- sdr_ctrl-dram_addrw);
+ return dram_addrw | (rows SDR_CTRLGRP_DRAMADDRW_ROWBITS_LSB);
}
/* Function to initialize SDRAM MMR */
@@ -527,9 +523,13 @@ unsigned sdram_mmr_init_full(unsigned int sdr_phy_reg)
(cfg-dram_addrw SDR_CTRLGRP_DRAMADDRW_ROWBITS_MASK)
SDR_CTRLGRP_DRAMADDRW_ROWBITS_LSB;
+ const u32 ctrl_cfg = sdr_get_ctrlcfg(cfg);
+ const u32 dram_addrw = sdr_get_addr_rw(cfg);
+
writel(rows, sysmgr_regs-iswgrp_handoff[4]);
- set_sdr_ctrlcfg(cfg);
+ debug(\nConfiguring CTRLCFG\n);
+ writel(ctrl_cfg, sdr_ctrl-ctrl_cfg);
debug(Configuring DRAMTIMING1\n);
writel(cfg-dram_timing1, sdr_ctrl-dram_timing1);
@@ -546,7 +546,8 @@ unsigned sdram_mmr_init_full(unsigned int sdr_phy_reg)
debug(Configuring LOWPWRTIMING\n);
writel(cfg-lowpwr_timing, sdr_ctrl-lowpwr_timing);
- set_sdr_addr_rw(cfg);
+ debug(Configuring DRAMADDRW\n);
+ writel(dram_addrw, sdr_ctrl-dram_addrw);
debug(Configuring DRAMIFWIDTH\n);
writel(cfg-dram_if_width, sdr_ctrl-dram_if_width);
--
2.1.4
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[U-Boot] [PATCH 08/28] ddr: altera: sdram: Clean up set_sdr_fifo_cfg()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.
Signed-off-by: Marek Vasut ma...@denx.de
---
drivers/ddr/altera/sdram.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index d8d04f4..8db8dde 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -405,14 +405,14 @@ static void set_sdr_static_cfg(void)
static void set_sdr_fifo_cfg(void)
{
- debug(Configuring FIFOCFG\n);
- clrsetbits_le32(sdr_ctrl-fifo_cfg, SDR_CTRLGRP_FIFOCFG_SYNCMODE_MASK,
- CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE
- SDR_CTRLGRP_FIFOCFG_SYNCMODE_LSB);
-
- clrsetbits_le32(sdr_ctrl-fifo_cfg, SDR_CTRLGRP_FIFOCFG_INCSYNC_MASK,
- CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC
+ const u32 fifo_cfg =
+ (CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE
+ SDR_CTRLGRP_FIFOCFG_SYNCMODE_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC
SDR_CTRLGRP_FIFOCFG_INCSYNC_LSB);
+
+ debug(Configuring FIFOCFG\n);
+ writel(fifo_cfg, sdr_ctrl-fifo_cfg);
}
static void set_sdr_mp_weight(void)
--
2.1.4
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[U-Boot] [PATCH 12/28] ddr: altera: sdram: Introduce socfpga_sdram_config() structure
Introduce this seemingly massive structure, which holds required values
of all the registers of the SDRAM controller. The idea here is to avoid
including the sdram.h header file, which is full of ad-hoc macros that
polute the global namespace. Once the cleanup of sdram.c would be complete
and all registers would be loaded from this new socfpga_sdram_config, a
board file will only pass this structure into the sdram.c . This will
hide all the horrors generated by QTS in the board directory.
Signed-off-by: Marek Vasut ma...@denx.de
---
drivers/ddr/altera/sdram.c | 341 -
1 file changed, 179 insertions(+), 162 deletions(-)
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index 58fe26e..c10e3fd 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -37,6 +37,146 @@ static struct socfpga_system_manager *sysmgr_regs =
static struct socfpga_sdr_ctrl *sdr_ctrl =
(struct socfpga_sdr_ctrl *)SDR_CTRLGRP_ADDRESS;
+static struct socfpga_sdram_config {
+ u32 ctrl_cfg;
+ u32 dram_timing1;
+ u32 dram_timing2;
+ u32 dram_timing3;
+ u32 dram_timing4;
+ u32 lowpwr_timing;
+ u32 dram_addrw;
+ u32 static_cfg;
+ u32 fifo_cfg;
+ u32 mp_weight0;
+ u32 mp_weight1;
+ u32 mp_weight2;
+ u32 mp_weight3;
+ u32 mp_pacing0;
+ u32 mp_pacing1;
+ u32 mp_pacing2;
+ u32 mp_pacing3;
+ u32 mp_threshold0;
+ u32 mp_threshold1;
+ u32 mp_threshold2;
+} sdram_config = {
+ .ctrl_cfg =
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE
+ SDR_CTRLGRP_CTRLCFG_MEMTYPE_LSB)|
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL
+ SDR_CTRLGRP_CTRLCFG_MEMBL_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN
+ SDR_CTRLGRP_CTRLCFG_ECCEN_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN
+ SDR_CTRLGRP_CTRLCFG_ECCCORREN_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN
+ SDR_CTRLGRP_CTRLCFG_REORDEREN_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT
+ SDR_CTRLGRP_CTRLCFG_STARVELIMIT_LSB)|
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN
+ SDR_CTRLGRP_CTRLCFG_DQSTRKEN_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS
+ SDR_CTRLGRP_CTRLCFG_NODMPINS_LSB),
+ .dram_timing1 =
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL
+ SDR_CTRLGRP_DRAMTIMING1_TCWL_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL
+ SDR_CTRLGRP_DRAMTIMING1_TAL_LSB)|
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL
+ SDR_CTRLGRP_DRAMTIMING1_TCL_LSB)|
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD
+ SDR_CTRLGRP_DRAMTIMING1_TRRD_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW
+ SDR_CTRLGRP_DRAMTIMING1_TFAW_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC
+ SDR_CTRLGRP_DRAMTIMING1_TRFC_LSB),
+ .dram_timing2 =
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI
+ SDR_CTRLGRP_DRAMTIMING2_TREFI_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD
+ SDR_CTRLGRP_DRAMTIMING2_TRCD_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP
+ SDR_CTRLGRP_DRAMTIMING2_TRP_LSB)|
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR
+ SDR_CTRLGRP_DRAMTIMING2_TWR_LSB)|
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR
+ SDR_CTRLGRP_DRAMTIMING2_TWTR_LSB),
+ .dram_timing3 =
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP
+ SDR_CTRLGRP_DRAMTIMING3_TRTP_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS
+ SDR_CTRLGRP_DRAMTIMING3_TRAS_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC
+ SDR_CTRLGRP_DRAMTIMING3_TRC_LSB)|
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD
+ SDR_CTRLGRP_DRAMTIMING3_TMRD_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD
+ SDR_CTRLGRP_DRAMTIMING3_TCCD_LSB),
+ .dram_timing4 =
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT
+
[U-Boot] [PATCH 09/28] ddr: altera: sdram: Clean up set_sdr_mp_weight()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.
Signed-off-by: Marek Vasut ma...@denx.de
---
drivers/ddr/altera/sdram.c | 37 -
1 file changed, 16 insertions(+), 21 deletions(-)
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index 8db8dde..f324805 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -417,31 +417,26 @@ static void set_sdr_fifo_cfg(void)
static void set_sdr_mp_weight(void)
{
- debug(Configuring MPWEIGHT_MPWEIGHT_0\n);
- clrsetbits_le32(sdr_ctrl-mp_weight0,
- SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_0_STATICWEIGHT_31_0_MASK,
- CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0
+ const u32 mp_weight0 =
+ (CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0
SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_0_STATICWEIGHT_31_0_LSB);
-
- clrsetbits_le32(sdr_ctrl-mp_weight1,
- SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_STATICWEIGHT_49_32_MASK,
- CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32
- SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_STATICWEIGHT_49_32_LSB);
-
- clrsetbits_le32(sdr_ctrl-mp_weight1,
- SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_SUMOFWEIGHTS_13_0_MASK,
- CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0
+ const u32 mp_weight1 =
+ (CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32
+ SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_STATICWEIGHT_49_32_LSB)
|
+ (CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0
SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_SUMOFWEIGHTS_13_0_LSB);
-
- clrsetbits_le32(sdr_ctrl-mp_weight2,
- SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_2_SUMOFWEIGHTS_45_14_MASK,
- CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14
+ const u32 mp_weight2 =
+ (CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14
SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_2_SUMOFWEIGHTS_45_14_LSB);
-
- clrsetbits_le32(sdr_ctrl-mp_weight3,
- SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_3_SUMOFWEIGHTS_63_46_MASK,
- CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46
+ const u32 mp_weight3 =
+ (CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46
SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_3_SUMOFWEIGHTS_63_46_LSB);
+
+ debug(Configuring MPWEIGHT_MPWEIGHT_0\n);
+ writel(mp_weight0, sdr_ctrl-mp_weight0);
+ writel(mp_weight1, sdr_ctrl-mp_weight1);
+ writel(mp_weight2, sdr_ctrl-mp_weight2);
+ writel(mp_weight3, sdr_ctrl-mp_weight3);
}
static void set_sdr_mp_pacing(void)
--
2.1.4
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[U-Boot] [PATCH 06/28] ddr: altera: sdram: Clean up set_sdr_addr_rw()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.
Signed-off-by: Marek Vasut ma...@denx.de
---
drivers/ddr/altera/sdram.c | 30 ++
1 file changed, 10 insertions(+), 20 deletions(-)
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index f4f3545..143f41b 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -371,34 +371,24 @@ static void set_sdr_dram_timing(void)
static void set_sdr_addr_rw(void)
{
- int rows;
-
- debug(Configuring DRAMADDRW\n);
- clrsetbits_le32(sdr_ctrl-dram_addrw,
SDR_CTRLGRP_DRAMADDRW_COLBITS_MASK,
- CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS
- SDR_CTRLGRP_DRAMADDRW_COLBITS_LSB);
/*
* SDRAM Failure When Accessing Non-Existent Memory
-* Update Preloader to artificially increase the number of rows so
-* that the memory thinks it has 4GB of RAM.
-*/
- rows = get_errata_rows();
-
- clrsetbits_le32(sdr_ctrl-dram_addrw,
SDR_CTRLGRP_DRAMADDRW_ROWBITS_MASK,
- rows SDR_CTRLGRP_DRAMADDRW_ROWBITS_LSB);
-
- clrsetbits_le32(sdr_ctrl-dram_addrw,
SDR_CTRLGRP_DRAMADDRW_BANKBITS_MASK,
- CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS
- SDR_CTRLGRP_DRAMADDRW_BANKBITS_LSB);
- /* SDRAM Failure When Accessing Non-Existent Memory
* Set SDR_CTRLGRP_DRAMADDRW_CSBITS_LSB to
* log2(number of chip select bits). Since there's only
* 1 or 2 chip selects, log2(1) = 0, and log2(2) = 1,
* which is the same as chip selects - 1.
*/
- clrsetbits_le32(sdr_ctrl-dram_addrw,
SDR_CTRLGRP_DRAMADDRW_CSBITS_MASK,
- (CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS - 1)
+ const int rows = get_errata_rows();
+ const u32 dram_addrw =
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS
+ SDR_CTRLGRP_DRAMADDRW_COLBITS_LSB) |
+ (rows SDR_CTRLGRP_DRAMADDRW_ROWBITS_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS
+ SDR_CTRLGRP_DRAMADDRW_BANKBITS_LSB) |
+ ((CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS - 1)
SDR_CTRLGRP_DRAMADDRW_CSBITS_LSB);
+ debug(Configuring DRAMADDRW\n);
+ writel(dram_addrw, sdr_ctrl-dram_addrw);
}
static void set_sdr_static_cfg(void)
--
2.1.4
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[U-Boot] [PATCH 15/28] ddr: altera: sdram: Clean up sdram_mmr_init_full() part 3
Pluck out the remaining CONFIG_HPS_SDR_CTRLCFG_ and put it into
the socfpga_sdram_config structure.
Signed-off-by: Marek Vasut ma...@denx.de
---
drivers/ddr/altera/sdram.c | 67 +++---
1 file changed, 39 insertions(+), 28 deletions(-)
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index 3ab552b..595f2a4 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -80,6 +80,8 @@ static struct socfpga_sdram_config {
SDR_CTRLGRP_CTRLCFG_MEMTYPE_LSB)|
(CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL
SDR_CTRLGRP_CTRLCFG_MEMBL_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER
+ SDR_CTRLGRP_CTRLCFG_ADDRORDER_LSB) |
(CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN
SDR_CTRLGRP_CTRLCFG_ECCEN_LSB) |
(CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN
@@ -145,6 +147,8 @@ static struct socfpga_sdram_config {
.dram_addrw =
(CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS
SDR_CTRLGRP_DRAMADDRW_COLBITS_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS
+ SDR_CTRLGRP_DRAMADDRW_ROWBITS_LSB) |
(CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS
SDR_CTRLGRP_DRAMADDRW_BANKBITS_LSB) |
((CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS - 1)
@@ -241,20 +245,29 @@ static struct socfpga_sdram_config {
/**
* get_errata_rows() - Up the number of DRAM rows to cover entire address space
+ * @cfg: SDRAM controller configuration data
*
* SDRAM Failure happens when accessing non-existent memory. Artificially
* increase the number of rows so that the memory controller thinks it has
* 4GB of RAM. This function returns such amount of rows.
*/
-static int get_errata_rows(void)
+static int get_errata_rows(struct socfpga_sdram_config *cfg)
{
/* Define constant for 4G memory - used for SDRAM errata workaround */
#define MEMSIZE_4G (4ULL * 1024ULL * 1024ULL * 1024ULL)
const unsigned long long memsize = MEMSIZE_4G;
- const unsigned int cs = CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS;
- const unsigned int rows = CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS;
- const unsigned int banks = CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS;
- const unsigned int cols = CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS;
+ const unsigned int cs =
+ ((cfg-dram_addrw SDR_CTRLGRP_DRAMADDRW_CSBITS_MASK)
+ SDR_CTRLGRP_DRAMADDRW_CSBITS_LSB) + 1;
+ const unsigned int rows =
+ (cfg-dram_addrw SDR_CTRLGRP_DRAMADDRW_ROWBITS_MASK)
+ SDR_CTRLGRP_DRAMADDRW_ROWBITS_LSB;
+ const unsigned int banks =
+ (cfg-dram_addrw SDR_CTRLGRP_DRAMADDRW_BANKBITS_MASK)
+ SDR_CTRLGRP_DRAMADDRW_BANKBITS_LSB;
+ const unsigned int cols =
+ (cfg-dram_addrw SDR_CTRLGRP_DRAMADDRW_COLBITS_MASK)
+ SDR_CTRLGRP_DRAMADDRW_COLBITS_LSB;
const unsigned int width = 8;
unsigned long long newrows;
@@ -456,7 +469,13 @@ static unsigned sdram_write_verify(unsigned int *addr,
unsigned reg_value)
static void set_sdr_ctrlcfg(struct socfpga_sdram_config *cfg)
{
- u32 addrorder;
+ const u32 csbits =
+ ((cfg-dram_addrw SDR_CTRLGRP_DRAMADDRW_CSBITS_MASK)
+ SDR_CTRLGRP_DRAMADDRW_CSBITS_LSB) + 1;
+ u32 addrorder =
+ (cfg-ctrl_cfg SDR_CTRLGRP_CTRLCFG_ADDRORDER_MASK)
+ SDR_CTRLGRP_CTRLCFG_ADDRORDER_LSB;
+
u32 ctrl_cfg = cfg-ctrl_cfg;
debug(\nConfiguring CTRLCFG\n);
@@ -466,22 +485,17 @@ static void set_sdr_ctrlcfg(struct socfpga_sdram_config
*cfg)
* Set the addrorder field of the SDRAM control register
* based on the CSBITs setting.
*/
- switch (CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS) {
- case 1:
- addrorder = 0; /* chip, row, bank, column */
- if (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER != 0)
+ if (csbits == 1) {
+ if (addrorder != 0)
debug(INFO: Changing address order to 0 (chip, row,
bank, column)\n);
- break;
- case 2:
- addrorder = 2; /* row, chip, bank, column */
- if (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER != 2)
+ addrorder = 0;
+ } else if (csbits == 2) {
+ if (addrorder != 2)
debug(INFO: Changing address order to 2 (row, chip,
bank, column)\n);
- break;
- default:
- addrorder = CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER;
- break;
+ addrorder = 2;
}
+
[U-Boot] [PATCH 18/28] ddr: altera: sdram: Clean up sdram_mmr_init_full() part 6
Pull out the block of register programming into a separate function.
Signed-off-by: Marek Vasut ma...@denx.de
---
drivers/ddr/altera/sdram.c | 31 +--
1 file changed, 21 insertions(+), 10 deletions(-)
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index 1d9324a..2377b45 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -514,20 +514,17 @@ static u32 sdr_get_addr_rw(struct socfpga_sdram_config
*cfg)
return dram_addrw | (rows SDR_CTRLGRP_DRAMADDRW_ROWBITS_LSB);
}
-/* Function to initialize SDRAM MMR */
-unsigned sdram_mmr_init_full(unsigned int sdr_phy_reg)
+/**
+ * sdr_load_regs() - Load SDRAM controller registers
+ * @cfg: SDRAM controller configuration data
+ *
+ * This function loads the register values into the SDRAM controller block.
+ */
+static void sdr_load_regs(struct socfpga_sdram_config *cfg)
{
- unsigned long status = 0;
- struct socfpga_sdram_config *cfg = sdram_config;
- const unsigned int rows =
- (cfg-dram_addrw SDR_CTRLGRP_DRAMADDRW_ROWBITS_MASK)
- SDR_CTRLGRP_DRAMADDRW_ROWBITS_LSB;
-
const u32 ctrl_cfg = sdr_get_ctrlcfg(cfg);
const u32 dram_addrw = sdr_get_addr_rw(cfg);
- writel(rows, sysmgr_regs-iswgrp_handoff[4]);
-
debug(\nConfiguring CTRLCFG\n);
writel(ctrl_cfg, sdr_ctrl-ctrl_cfg);
@@ -616,6 +613,20 @@ unsigned sdram_mmr_init_full(unsigned int sdr_phy_reg)
debug(Configuring DRAMODT\n);
writel(cfg-dram_odt, sdr_ctrl-dram_odt);
+}
+
+/* Function to initialize SDRAM MMR */
+unsigned sdram_mmr_init_full(unsigned int sdr_phy_reg)
+{
+ unsigned long status = 0;
+ struct socfpga_sdram_config *cfg = sdram_config;
+ const unsigned int rows =
+ (cfg-dram_addrw SDR_CTRLGRP_DRAMADDRW_ROWBITS_MASK)
+ SDR_CTRLGRP_DRAMADDRW_ROWBITS_LSB;
+
+ writel(rows, sysmgr_regs-iswgrp_handoff[4]);
+
+ sdr_load_regs(cfg);
/* saving this value to SYSMGR.ISWGRP.HANDOFF.FPGA2SDR */
writel(cfg-fpgaport_rst, sysmgr_regs-iswgrp_handoff[3]);
--
2.1.4
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[U-Boot] [PATCH 19/28] ddr: altera: sdram: Clean up sdram_mmr_init_full() part 7
Add kerneldoc.
Signed-off-by: Marek Vasut ma...@denx.de
---
drivers/ddr/altera/sdram.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index 2377b45..295747b 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -615,7 +615,12 @@ static void sdr_load_regs(struct socfpga_sdram_config *cfg)
writel(cfg-dram_odt, sdr_ctrl-dram_odt);
}
-/* Function to initialize SDRAM MMR */
+/**
+ * sdram_mmr_init_full() - Function to initialize SDRAM MMR
+ * @sdr_phy_reg: Value of the PHY control register 0
+ *
+ * Initialize the SDRAM MMR.
+ */
unsigned sdram_mmr_init_full(unsigned int sdr_phy_reg)
{
unsigned long status = 0;
--
2.1.4
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[U-Boot] [PATCH 13/28] ddr: altera: sdram: Clean up sdram_mmr_init_full() part 1
Zap all the ad-hoc readbacks from the registers and other useless
and broken debug output. This is really not useful and is only
confusing.
Signed-off-by: Marek Vasut ma...@denx.de
---
drivers/ddr/altera/sdram.c | 44
1 file changed, 44 deletions(-)
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index c10e3fd..395b40f 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -500,7 +500,6 @@ static void set_sdr_mp_threshold(struct
socfpga_sdram_config *cfg)
/* Function to initialize SDRAM MMR */
unsigned sdram_mmr_init_full(unsigned int sdr_phy_reg)
{
- unsigned long reg_value;
unsigned long status = 0;
struct socfpga_sdram_config *cfg = sdram_config;
@@ -574,73 +573,36 @@ defined(CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS)
SDR_CTRLGRP_CPORTWIDTH_CMDPORTWIDTH_MASK,
CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH
SDR_CTRLGRP_CPORTWIDTH_CMDPORTWIDTH_LSB);
- debug( Write - Address );
- debug(0x%08x Data 0x%08x\n,
- (unsigned)(sdr_ctrl-cport_width),
- (unsigned)reg_value);
- reg_value = readl(sdr_ctrl-cport_width);
- debug( Read value without verify 0x%08x\n, (unsigned)reg_value);
debug(Configuring CPORTWMAP\n);
clrsetbits_le32(sdr_ctrl-cport_wmap,
SDR_CTRLGRP_CPORTWMAP_CPORTWFIFOMAP_MASK,
CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP
SDR_CTRLGRP_CPORTWMAP_CPORTWFIFOMAP_LSB);
- debug( Write - Address );
- debug(0x%08x Data 0x%08x\n,
- (unsigned)(sdr_ctrl-cport_wmap),
- (unsigned)reg_value);
- reg_value = readl(sdr_ctrl-cport_wmap);
- debug( Read value without verify 0x%08x\n, (unsigned)reg_value);
debug(Configuring CPORTRMAP\n);
clrsetbits_le32(sdr_ctrl-cport_rmap,
SDR_CTRLGRP_CPORTRMAP_CPORTRFIFOMAP_MASK,
CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP
SDR_CTRLGRP_CPORTRMAP_CPORTRFIFOMAP_LSB);
- debug( Write - Address );
- debug(0x%08x Data 0x%08x\n,
- (unsigned)(sdr_ctrl-cport_rmap),
- (unsigned)reg_value);
- reg_value = readl(sdr_ctrl-cport_rmap);
- debug( Read value without verify 0x%08x\n, (unsigned)reg_value);
debug(Configuring RFIFOCMAP\n);
clrsetbits_le32(sdr_ctrl-rfifo_cmap,
SDR_CTRLGRP_RFIFOCMAP_RFIFOCPORTMAP_MASK,
CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP
SDR_CTRLGRP_RFIFOCMAP_RFIFOCPORTMAP_LSB);
- debug( Write - Address );
- debug(0x%08x Data 0x%08x\n,
- (unsigned)(sdr_ctrl-rfifo_cmap),
- (unsigned)reg_value);
- reg_value = readl(sdr_ctrl-rfifo_cmap);
- debug( Read value without verify 0x%08x\n, (unsigned)reg_value);
debug(Configuring WFIFOCMAP\n);
- reg_value = readl(sdr_ctrl-wfifo_cmap);
clrsetbits_le32(sdr_ctrl-wfifo_cmap,
SDR_CTRLGRP_WFIFOCMAP_WFIFOCPORTMAP_MASK,
CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP
SDR_CTRLGRP_WFIFOCMAP_WFIFOCPORTMAP_LSB);
- debug( Write - Address );
- debug(0x%08x Data 0x%08x\n,
- (unsigned)(sdr_ctrl-wfifo_cmap),
- (unsigned)reg_value);
- reg_value = readl(sdr_ctrl-wfifo_cmap);
- debug( Read value without verify 0x%08x\n, (unsigned)reg_value);
debug(Configuring CPORTRDWR\n);
clrsetbits_le32(sdr_ctrl-cport_rdwr,
SDR_CTRLGRP_CPORTRDWR_CPORTRDWR_MASK,
CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR
SDR_CTRLGRP_CPORTRDWR_CPORTRDWR_LSB);
- debug( Write - Address );
- debug(0x%08x Data 0x%08x\n,
- (unsigned)(sdr_ctrl-cport_rdwr),
- (unsigned)reg_value);
- reg_value = readl(sdr_ctrl-cport_rdwr);
- debug( Read value without verify 0x%08x\n, (unsigned)reg_value);
debug(Configuring DRAMODT\n);
clrsetbits_le32(sdr_ctrl-dram_odt,
@@ -674,12 +636,6 @@ defined(CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS)
debug(Configuring STATICCFG_\n);
clrsetbits_le32(sdr_ctrl-static_cfg,
SDR_CTRLGRP_STATICCFG_APPLYCFG_MASK,
1 SDR_CTRLGRP_STATICCFG_APPLYCFG_LSB);
- debug( Write - Address );
- debug(0x%08x Data 0x%08x\n,
- (unsigned)(sdr_ctrl-static_cfg),
- (unsigned)reg_value);
- reg_value = readl(sdr_ctrl-static_cfg);
- debug( Read value without verify 0x%08x\n, (unsigned)reg_value);
sdram_set_protection_config(0, sdram_calculate_size());
--
2.1.4
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[U-Boot] [PATCH 14/28] ddr: altera: sdram: Clean up sdram_mmr_init_full() part 2
Suck out all the CONFIG_HPS_SDR_CTRLCFG_* from sdram_mmr_init_full()
into the socfpga_sdram_config structure. There is still one ugly
macro left behind, but this will be taken care of in subsequent patch.
Signed-off-by: Marek Vasut ma...@denx.de
---
drivers/ddr/altera/sdram.c | 150 +
1 file changed, 83 insertions(+), 67 deletions(-)
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index 395b40f..3ab552b 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -44,9 +44,24 @@ static struct socfpga_sdram_config {
u32 dram_timing3;
u32 dram_timing4;
u32 lowpwr_timing;
+ u32 dram_odt;
u32 dram_addrw;
+ u32 dram_if_width;
+ u32 dram_dev_width;
+ u32 dram_intr;
+ u32 lowpwr_eq;
u32 static_cfg;
+ u32 ctrl_width;
+ u32 cport_width;
+ u32 cport_wmap;
+ u32 cport_rmap;
+ u32 rfifo_cmap;
+ u32 wfifo_cmap;
+ u32 cport_rdwr;
+ u32 port_cfg;
+ u32 fpgaport_rst;
u32 fifo_cfg;
+ u32 mp_priority;
u32 mp_weight0;
u32 mp_weight1;
u32 mp_weight2;
@@ -58,6 +73,7 @@ static struct socfpga_sdram_config {
u32 mp_threshold0;
u32 mp_threshold1;
u32 mp_threshold2;
+ u32 phy_ctrl0;
} sdram_config = {
.ctrl_cfg =
(CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE
@@ -121,6 +137,11 @@ static struct socfpga_sdram_config {
SDR_CTRLGRP_LOWPWRTIMING_AUTOPDCYCLES_LSB) |
(CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES
SDR_CTRLGRP_LOWPWRTIMING_CLKDISABLECYCLES_LSB),
+ .dram_odt =
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ
+ SDR_CTRLGRP_DRAMODT_READ_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE
+ SDR_CTRLGRP_DRAMODT_WRITE_LSB),
.dram_addrw =
(CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS
SDR_CTRLGRP_DRAMADDRW_COLBITS_LSB) |
@@ -128,16 +149,56 @@ static struct socfpga_sdram_config {
SDR_CTRLGRP_DRAMADDRW_BANKBITS_LSB) |
((CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS - 1)
SDR_CTRLGRP_DRAMADDRW_CSBITS_LSB),
+ .dram_if_width =
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH
+ SDR_CTRLGRP_DRAMIFWIDTH_IFWIDTH_LSB),
+ .dram_dev_width =
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH
+ SDR_CTRLGRP_DRAMDEVWIDTH_DEVWIDTH_LSB),
+ .dram_intr =
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN
+ SDR_CTRLGRP_DRAMINTR_INTREN_LSB),
+ .lowpwr_eq =
+ (CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK
+ SDR_CTRLGRP_LOWPWREQ_SELFRFSHMASK_LSB),
.static_cfg =
(CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL
SDR_CTRLGRP_STATICCFG_MEMBL_LSB)|
(CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA
SDR_CTRLGRP_STATICCFG_USEECCASDATA_LSB),
+ .ctrl_width =
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH
+ SDR_CTRLGRP_CTRLWIDTH_CTRLWIDTH_LSB),
+ .cport_width =
+ (CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH
+ SDR_CTRLGRP_CPORTWIDTH_CMDPORTWIDTH_LSB),
+ .cport_wmap =
+ (CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP
+ SDR_CTRLGRP_CPORTWMAP_CPORTWFIFOMAP_LSB),
+ .cport_rmap =
+ (CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP
+ SDR_CTRLGRP_CPORTRMAP_CPORTRFIFOMAP_LSB),
+ .rfifo_cmap =
+ (CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP
+ SDR_CTRLGRP_RFIFOCMAP_RFIFOCPORTMAP_LSB),
+ .wfifo_cmap =
+ (CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP
+ SDR_CTRLGRP_WFIFOCMAP_WFIFOCPORTMAP_LSB),
+ .cport_rdwr =
+ (CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR
+ SDR_CTRLGRP_CPORTRDWR_CPORTRDWR_LSB),
+ .port_cfg =
+ (CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN
+ SDR_CTRLGRP_PORTCFG_AUTOPCHEN_LSB),
+ .fpgaport_rst = CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST,
.fifo_cfg =
(CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE
SDR_CTRLGRP_FIFOCFG_SYNCMODE_LSB) |
(CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC
SDR_CTRLGRP_FIFOCFG_INCSYNC_LSB),
+ .mp_priority =
+ (CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY
+
[U-Boot] [PATCH 10/28] ddr: altera: sdram: Clean up set_sdr_mp_pacing()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.
Signed-off-by: Marek Vasut ma...@denx.de
---
drivers/ddr/altera/sdram.c | 37 -
1 file changed, 16 insertions(+), 21 deletions(-)
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index f324805..e41815b 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -441,31 +441,26 @@ static void set_sdr_mp_weight(void)
static void set_sdr_mp_pacing(void)
{
- debug(Configuring MPPACING_MPPACING_0\n);
- clrsetbits_le32(sdr_ctrl-mp_pacing0,
- SDR_CTRLGRP_MPPACING_MPPACING_0_THRESHOLD1_31_0_MASK,
- CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0
+ const u32 mp_pacing0 =
+ (CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0
SDR_CTRLGRP_MPPACING_MPPACING_0_THRESHOLD1_31_0_LSB);
-
- clrsetbits_le32(sdr_ctrl-mp_pacing1,
- SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD1_59_32_MASK,
- CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32
- SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD1_59_32_LSB);
-
- clrsetbits_le32(sdr_ctrl-mp_pacing1,
- SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD2_3_0_MASK,
- CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0
+ const u32 mp_pacing1 =
+ (CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32
+ SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD1_59_32_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0
SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD2_3_0_LSB);
-
- clrsetbits_le32(sdr_ctrl-mp_pacing2,
- SDR_CTRLGRP_MPPACING_MPPACING_2_THRESHOLD2_35_4_MASK,
- CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4
+ const u32 mp_pacing2 =
+ (CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4
SDR_CTRLGRP_MPPACING_MPPACING_2_THRESHOLD2_35_4_LSB);
-
- clrsetbits_le32(sdr_ctrl-mp_pacing3,
- SDR_CTRLGRP_MPPACING_MPPACING_3_THRESHOLD2_59_36_MASK,
- CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36
+ const u32 mp_pacing3 =
+ (CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36
SDR_CTRLGRP_MPPACING_MPPACING_3_THRESHOLD2_59_36_LSB);
+
+ debug(Configuring MPPACING_MPPACING_0\n);
+ writel(mp_pacing0, sdr_ctrl-mp_pacing0);
+ writel(mp_pacing1, sdr_ctrl-mp_pacing1);
+ writel(mp_pacing2, sdr_ctrl-mp_pacing2);
+ writel(mp_pacing3, sdr_ctrl-mp_pacing3);
}
static void set_sdr_mp_threshold(void)
--
2.1.4
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[U-Boot] [PATCH 27/28] ddr: altera: sdram: Minor cleanup in sdram_get_rule()
Fix the data types and zap unnecessary type change.
Signed-off-by: Marek Vasut ma...@denx.de
---
drivers/ddr/altera/sdram.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index da7f27f..22cad88 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -146,14 +146,14 @@ static void sdram_set_rule(struct sdram_prot_rule *prule)
static void sdram_get_rule(struct sdram_prot_rule *prule)
{
- uint32_t addr;
- uint32_t id;
- uint32_t data;
+ u32 addr;
+ u32 id;
+ u32 data;
int ruleno = prule-rule;
/* Read the rule */
writel(ruleno, sdr_ctrl-prot_rule_rdwr);
- writel(ruleno | (1L 6), sdr_ctrl-prot_rule_rdwr);
+ writel(ruleno | (1 6), sdr_ctrl-prot_rule_rdwr);
/* Get the addresses */
addr = readl(sdr_ctrl-prot_rule_addr);
--
2.1.4
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[U-Boot] [PATCH 22/28] ddr: altera: sdram: Clean up sdram_calculate_size() part 1
Pluck out all of the CONFIG_HPS_SDR_CTRLCFG_* macros. This change
makes sdram.c completely clear of these macros and allows removing
of the ugly include of sdram.h . The namespace is now a much nicer
place!
Signed-off-by: Marek Vasut ma...@denx.de
---
drivers/ddr/altera/sdram.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index 5267ddc..b540c78 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -12,12 +12,6 @@
#include asm/arch/system_manager.h
#include asm/io.h
-/*
- * FIXME: This path is temporary until the SDRAM driver gets
- *a proper thorough cleanup.
- */
-#include ../../../board/altera/socfpga/qts/sdram_config.h
-
DECLARE_GLOBAL_DATA_PTR;
struct sdram_prot_rule {
@@ -470,6 +464,13 @@ unsigned long sdram_calculate_size(void)
{
unsigned long temp;
unsigned long row, bank, col, cs, width;
+ const struct socfpga_sdram_config *cfg = socfpga_get_sdram_config();
+ const unsigned int csbits =
+ ((cfg-dram_addrw SDR_CTRLGRP_DRAMADDRW_CSBITS_MASK)
+ SDR_CTRLGRP_DRAMADDRW_CSBITS_LSB) + 1;
+ const unsigned int rowbits =
+ (cfg-dram_addrw SDR_CTRLGRP_DRAMADDRW_ROWBITS_MASK)
+ SDR_CTRLGRP_DRAMADDRW_ROWBITS_LSB;
temp = readl(sdr_ctrl-dram_addrw);
col = (temp SDR_CTRLGRP_DRAMADDRW_COLBITS_MASK)
@@ -490,7 +491,7 @@ unsigned long sdram_calculate_size(void)
*/
row = readl(sysmgr_regs-iswgrp_handoff[4]);
if (row == 0)
- row = CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS;
+ row = rowbits;
/* If the stored handoff value for rows is greater than
* the field width in the sdr.dramaddrw register then
* something is very wrong. Revert to using the the #define
@@ -498,7 +499,7 @@ unsigned long sdram_calculate_size(void)
* using a broken value.
*/
if (row 31)
- row = CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS;
+ row = rowbits;
bank = (temp SDR_CTRLGRP_DRAMADDRW_BANKBITS_MASK)
SDR_CTRLGRP_DRAMADDRW_BANKBITS_LSB;
@@ -512,7 +513,7 @@ unsigned long sdram_calculate_size(void)
SDR_CTRLGRP_DRAMADDRW_CSBITS_LSB;
cs += 1;
- cs = CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS;
+ cs = csbits;
width = readl(sdr_ctrl-dram_if_width);
/* ECC would not be calculated as its not addressible */
--
2.1.4
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[U-Boot] [PATCH 25/28] ddr: altera: sdram: Add missing kerneldoc
Add kerneldoc to functions which are missing it, but are already
cleaned up.
Signed-off-by: Marek Vasut ma...@denx.de
---
drivers/ddr/altera/sdram.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index fe2e753..e16f116 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -258,6 +258,12 @@ static unsigned sdram_write_verify(const u32 *addr, const
u32 val)
return 0;
}
+/**
+ * sdr_get_ctrlcfg() - Get the value of DRAM CTRLCFG register
+ * @cfg: SDRAM controller configuration data
+ *
+ * Return the value of DRAM CTRLCFG register.
+ */
static u32 sdr_get_ctrlcfg(const struct socfpga_sdram_config *cfg)
{
const u32 csbits =
@@ -290,6 +296,12 @@ static u32 sdr_get_ctrlcfg(const struct
socfpga_sdram_config *cfg)
return ctrl_cfg;
}
+/**
+ * sdr_get_addr_rw() - Get the value of DRAM ADDRW register
+ * @cfg: SDRAM controller configuration data
+ *
+ * Return the value of DRAM ADDRW register.
+ */
static u32 sdr_get_addr_rw(const struct socfpga_sdram_config *cfg)
{
/*
--
2.1.4
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[U-Boot] [PATCH 11/28] ddr: altera: sdram: Clean up set_sdr_mp_threshold()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.
Signed-off-by: Marek Vasut ma...@denx.de
---
drivers/ddr/altera/sdram.c | 24 +++-
1 file changed, 11 insertions(+), 13 deletions(-)
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index e41815b..58fe26e 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -465,23 +465,21 @@ static void set_sdr_mp_pacing(void)
static void set_sdr_mp_threshold(void)
{
- debug(Configuring MPTHRESHOLDRST_MPTHRESHOLDRST_0\n);
- clrsetbits_le32(sdr_ctrl-mp_threshold0,
-
SDR_CTRLGRP_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0_MASK,
-
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0
+ const u32 mp_threshold0 =
+
(CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0
SDR_CTRLGRP_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0_LSB);
-
- clrsetbits_le32(sdr_ctrl-mp_threshold1,
-
SDR_CTRLGRP_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32_MASK,
-
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32
+ const u32 mp_threshold1 =
+
(CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32
SDR_CTRLGRP_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32_LSB);
-
- clrsetbits_le32(sdr_ctrl-mp_threshold2,
-
SDR_CTRLGRP_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64_MASK,
-
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64
+ const u32 mp_threshold2 =
+
(CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64
SDR_CTRLGRP_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64_LSB);
-}
+ debug(Configuring MPTHRESHOLDRST_MPTHRESHOLDRST_0\n);
+ writel(mp_threshold0, sdr_ctrl-mp_threshold0);
+ writel(mp_threshold1, sdr_ctrl-mp_threshold1);
+ writel(mp_threshold2, sdr_ctrl-mp_threshold2);
+}
/* Function to initialize SDRAM MMR */
unsigned sdram_mmr_init_full(unsigned int sdr_phy_reg)
--
2.1.4
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[U-Boot] [PATCH 01/28] ddr: altera: sdram: Switch to generic_hweight32()
Use generic function instead of CPU-specific one. Signed-off-by: Marek Vasut ma...@denx.de --- drivers/ddr/altera/sdram.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c index 474df42..9e6acfe 100644 --- a/drivers/ddr/altera/sdram.c +++ b/drivers/ddr/altera/sdram.c @@ -64,7 +64,7 @@ static int compute_errata_rows(unsigned long long memsize, int cs, int width, * Need to see if result is ordinal power of 2 before * attempting log2 of result. */ - bits = hweight32(newrows); + bits = generic_hweight32(newrows); debug(rows workaround - bits %d\n, bits); -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 05/28] ddr: altera: sdram: Clean up set_sdr_dram_timing*()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.
Merge set_sdr_dram_timing{1,2,3,4,lowpwr}() into single function
set_sdr_dram_timing() , since there's no point in keeping all this
stuff separate anymore.
Signed-off-by: Marek Vasut ma...@denx.de
---
drivers/ddr/altera/sdram.c | 146 -
1 file changed, 53 insertions(+), 93 deletions(-)
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index 0bfd564..f4f3545 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -301,108 +301,72 @@ static void set_sdr_ctrlcfg(void)
writel(ctrl_cfg, sdr_ctrl-ctrl_cfg);
}
-static void set_sdr_dram_timing1(void)
+static void set_sdr_dram_timing(void)
{
- debug(Configuring DRAMTIMING1\n);
- clrsetbits_le32(sdr_ctrl-dram_timing1,
SDR_CTRLGRP_DRAMTIMING1_TCWL_MASK,
- CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL
- SDR_CTRLGRP_DRAMTIMING1_TCWL_LSB);
+ const u32 dram_timing1 =
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL
+ SDR_CTRLGRP_DRAMTIMING1_TCWL_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL
+ SDR_CTRLGRP_DRAMTIMING1_TAL_LSB)|
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL
+ SDR_CTRLGRP_DRAMTIMING1_TCL_LSB)|
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD
+ SDR_CTRLGRP_DRAMTIMING1_TRRD_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW
+ SDR_CTRLGRP_DRAMTIMING1_TFAW_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC
+ SDR_CTRLGRP_DRAMTIMING1_TRFC_LSB);
- clrsetbits_le32(sdr_ctrl-dram_timing1,
SDR_CTRLGRP_DRAMTIMING1_TAL_MASK,
- CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL
- SDR_CTRLGRP_DRAMTIMING1_TAL_LSB);
+ const u32 dram_timing2 =
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI
+ SDR_CTRLGRP_DRAMTIMING2_TREFI_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD
+ SDR_CTRLGRP_DRAMTIMING2_TRCD_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP
+ SDR_CTRLGRP_DRAMTIMING2_TRP_LSB)|
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR
+ SDR_CTRLGRP_DRAMTIMING2_TWR_LSB)|
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR
+ SDR_CTRLGRP_DRAMTIMING2_TWTR_LSB);
- clrsetbits_le32(sdr_ctrl-dram_timing1,
SDR_CTRLGRP_DRAMTIMING1_TCL_MASK,
- CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL
- SDR_CTRLGRP_DRAMTIMING1_TCL_LSB);
+ const u32 dram_timing3 =
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP
+ SDR_CTRLGRP_DRAMTIMING3_TRTP_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS
+ SDR_CTRLGRP_DRAMTIMING3_TRAS_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC
+ SDR_CTRLGRP_DRAMTIMING3_TRC_LSB)|
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD
+ SDR_CTRLGRP_DRAMTIMING3_TMRD_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD
+ SDR_CTRLGRP_DRAMTIMING3_TCCD_LSB);
- clrsetbits_le32(sdr_ctrl-dram_timing1,
SDR_CTRLGRP_DRAMTIMING1_TRRD_MASK,
- CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD
- SDR_CTRLGRP_DRAMTIMING1_TRRD_LSB);
+ const u32 dram_timing4 =
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT
+ SDR_CTRLGRP_DRAMTIMING4_SELFRFSHEXIT_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT
+ SDR_CTRLGRP_DRAMTIMING4_PWRDOWNEXIT_LSB);
- clrsetbits_le32(sdr_ctrl-dram_timing1,
SDR_CTRLGRP_DRAMTIMING1_TFAW_MASK,
- CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW
- SDR_CTRLGRP_DRAMTIMING1_TFAW_LSB);
+ const u32 lowpwr_timing =
+ (CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES
+ SDR_CTRLGRP_LOWPWRTIMING_AUTOPDCYCLES_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES
+ SDR_CTRLGRP_LOWPWRTIMING_CLKDISABLECYCLES_LSB);
- clrsetbits_le32(sdr_ctrl-dram_timing1,
SDR_CTRLGRP_DRAMTIMING1_TRFC_MASK,
- CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC
- SDR_CTRLGRP_DRAMTIMING1_TRFC_LSB);
-}
+ debug(Configuring DRAMTIMING1\n);
+ writel(dram_timing1, sdr_ctrl-dram_timing1);
-static void set_sdr_dram_timing2(void)
-{
debug(Configuring DRAMTIMING2\n);
-
[U-Boot] [PATCH 02/28] ddr: altera: sdram: Clean up compute_errata_rows() part 1
Clean up weird parenthesis and odd type casts from the function.
Fix comment style.
Signed-off-by: Marek Vasut ma...@denx.de
---
drivers/ddr/altera/sdram.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index 9e6acfe..c60820c 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -54,13 +54,14 @@ static int compute_errata_rows(unsigned long long memsize,
int cs, int width,
debug(workaround rows - banks %d\n, banks);
debug(workaround rows - cols %d\n, cols);
- newrows = lldiv(memsize, (cs * (width / 8)));
+ newrows = lldiv(memsize, cs * (width / 8));
debug(rows workaround - term1 %lld\n, newrows);
- newrows = lldiv(newrows, ((1 banks) * (1 cols)));
+ newrows = lldiv(newrows, (1 banks) * (1 cols));
debug(rows workaround - term2 %lld\n, newrows);
- /* Compute the hamming weight - same as number of bits set.
+ /*
+* Compute the hamming weight - same as number of bits set.
* Need to see if result is ordinal power of 2 before
* attempting log2 of result.
*/
@@ -78,13 +79,12 @@ static int compute_errata_rows(unsigned long long memsize,
int cs, int width,
return rows;
}
- inewrowslog2 = __ilog2((unsigned int)newrows);
+ inewrowslog2 = __ilog2(newrows);
- debug(rows workaround - ilog2 %d, %d\n, inewrowslog2,
- (int)newrows);
+ debug(rows workaround - ilog2 %d, %lld\n, inewrowslog2, newrows);
if (inewrowslog2 == -1) {
- printf(SDRAM workaround failed, newrows %d\n, (int)newrows);
+ printf(SDRAM workaround failed, newrows %lld\n, newrows);
return rows;
}
--
2.1.4
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[U-Boot] [PATCH 03/28] ddr: altera: sdram: Clean up compute_errata_rows() part 2
Remove all parameters of this function, since they are only constants
passed in from another function, so make them local. Also, rename the
function to get_errata_rows() as this is closer to what it does.
Signed-off-by: Marek Vasut ma...@denx.de
---
drivers/ddr/altera/sdram.c | 35 ---
1 file changed, 20 insertions(+), 15 deletions(-)
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index c60820c..ca68528 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -17,9 +17,6 @@
*/
#include ../../../board/altera/socfpga/qts/sdram_config.h
-/* define constant for 4G memory - used for SDRAM errata workaround */
-#define MEMSIZE_4G (4ULL * 1024ULL * 1024ULL * 1024ULL)
-
DECLARE_GLOBAL_DATA_PTR;
struct sdram_prot_rule {
@@ -40,12 +37,26 @@ static struct socfpga_system_manager *sysmgr_regs =
static struct socfpga_sdr_ctrl *sdr_ctrl =
(struct socfpga_sdr_ctrl *)SDR_CTRLGRP_ADDRESS;
-static int compute_errata_rows(unsigned long long memsize, int cs, int width,
- int rows, int banks, int cols)
+/**
+ * get_errata_rows() - Up the number of DRAM rows to cover entire address space
+ *
+ * SDRAM Failure happens when accessing non-existent memory. Artificially
+ * increase the number of rows so that the memory controller thinks it has
+ * 4GB of RAM. This function returns such amount of rows.
+ */
+static int get_errata_rows(void)
{
+ /* Define constant for 4G memory - used for SDRAM errata workaround */
+#define MEMSIZE_4G (4ULL * 1024ULL * 1024ULL * 1024ULL)
+ const unsigned long long memsize = MEMSIZE_4G;
+ const unsigned int cs = CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS;
+ const unsigned int rows = CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS;
+ const unsigned int banks = CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS;
+ const unsigned int cols = CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS;
+ const unsigned int width = 8;
+
unsigned long long newrows;
- int inewrowslog2;
- int bits;
+ int bits, inewrowslog2;
debug(workaround rows - memsize %lld\n, memsize);
debug(workaround rows - cs%d\n, cs);
@@ -410,12 +421,7 @@ static void set_sdr_dram_lowpwr_timing(void)
static void set_sdr_addr_rw(void)
{
- int cs = CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS;
- int width = 8;
- int rows = CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS;
- int banks = CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS;
- int cols = CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS;
- unsigned long long workaround_memsize = MEMSIZE_4G;
+ int rows;
debug(Configuring DRAMADDRW\n);
clrsetbits_le32(sdr_ctrl-dram_addrw,
SDR_CTRLGRP_DRAMADDRW_COLBITS_MASK,
@@ -426,8 +432,7 @@ static void set_sdr_addr_rw(void)
* Update Preloader to artificially increase the number of rows so
* that the memory thinks it has 4GB of RAM.
*/
- rows = compute_errata_rows(workaround_memsize, cs, width, rows, banks,
- cols);
+ rows = get_errata_rows();
clrsetbits_le32(sdr_ctrl-dram_addrw,
SDR_CTRLGRP_DRAMADDRW_ROWBITS_MASK,
rows SDR_CTRLGRP_DRAMADDRW_ROWBITS_LSB);
--
2.1.4
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[U-Boot] [PATCH 04/28] ddr: altera: sdram: Clean up set_sdr_ctrlcfg()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.
The big plan here is to remove all the CONFIG_HPS_SDR_ macros, hide
them in QTS compatibility layer in board implementation and pass only
a small structure into the driver.
Signed-off-by: Marek Vasut ma...@denx.de
---
drivers/ddr/altera/sdram.c | 62 ++
1 file changed, 24 insertions(+), 38 deletions(-)
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index ca68528..0bfd564 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -254,18 +254,29 @@ static unsigned sdram_write_verify(unsigned int *addr,
unsigned reg_value)
static void set_sdr_ctrlcfg(void)
{
- int addrorder;
+ u32 addrorder;
+ u32 ctrl_cfg =
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE
+ SDR_CTRLGRP_CTRLCFG_MEMTYPE_LSB)|
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL
+ SDR_CTRLGRP_CTRLCFG_MEMBL_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN
+ SDR_CTRLGRP_CTRLCFG_ECCEN_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN
+ SDR_CTRLGRP_CTRLCFG_ECCCORREN_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN
+ SDR_CTRLGRP_CTRLCFG_REORDEREN_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT
+ SDR_CTRLGRP_CTRLCFG_STARVELIMIT_LSB)|
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN
+ SDR_CTRLGRP_CTRLCFG_DQSTRKEN_LSB) |
+ (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS
+ SDR_CTRLGRP_CTRLCFG_NODMPINS_LSB);
debug(\nConfiguring CTRLCFG\n);
- clrsetbits_le32(sdr_ctrl-ctrl_cfg, SDR_CTRLGRP_CTRLCFG_MEMTYPE_MASK,
- CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE
- SDR_CTRLGRP_CTRLCFG_MEMTYPE_LSB);
- clrsetbits_le32(sdr_ctrl-ctrl_cfg, SDR_CTRLGRP_CTRLCFG_MEMBL_MASK,
- CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL
- SDR_CTRLGRP_CTRLCFG_MEMBL_LSB);
-
- /* SDRAM Failure When Accessing Non-Existent Memory
+ /*
+* SDRAM Failure When Accessing Non-Existent Memory
* Set the addrorder field of the SDRAM control register
* based on the CSBITs setting.
*/
@@ -273,46 +284,21 @@ static void set_sdr_ctrlcfg(void)
case 1:
addrorder = 0; /* chip, row, bank, column */
if (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER != 0)
- debug(INFO: Changing address order to 0 (chip, row, \
- bank, column)\n);
+ debug(INFO: Changing address order to 0 (chip, row,
bank, column)\n);
break;
case 2:
addrorder = 2; /* row, chip, bank, column */
if (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER != 2)
- debug(INFO: Changing address order to 2 (row, chip, \
- bank, column)\n);
+ debug(INFO: Changing address order to 2 (row, chip,
bank, column)\n);
break;
default:
addrorder = CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER;
break;
}
- clrsetbits_le32(sdr_ctrl-ctrl_cfg, SDR_CTRLGRP_CTRLCFG_ADDRORDER_MASK,
- addrorder SDR_CTRLGRP_CTRLCFG_ADDRORDER_LSB);
-
- clrsetbits_le32(sdr_ctrl-ctrl_cfg, SDR_CTRLGRP_CTRLCFG_ECCEN_MASK,
- CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN
- SDR_CTRLGRP_CTRLCFG_ECCEN_LSB);
+ ctrl_cfg |= addrorder SDR_CTRLGRP_CTRLCFG_ADDRORDER_LSB;
- clrsetbits_le32(sdr_ctrl-ctrl_cfg, SDR_CTRLGRP_CTRLCFG_ECCCORREN_MASK,
- CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN
- SDR_CTRLGRP_CTRLCFG_ECCCORREN_LSB);
-
- clrsetbits_le32(sdr_ctrl-ctrl_cfg, SDR_CTRLGRP_CTRLCFG_REORDEREN_MASK,
- CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN
- SDR_CTRLGRP_CTRLCFG_REORDEREN_LSB);
-
- clrsetbits_le32(sdr_ctrl-ctrl_cfg,
SDR_CTRLGRP_CTRLCFG_STARVELIMIT_MASK,
- CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT
- SDR_CTRLGRP_CTRLCFG_STARVELIMIT_LSB);
-
- clrsetbits_le32(sdr_ctrl-ctrl_cfg, SDR_CTRLGRP_CTRLCFG_DQSTRKEN_MASK,
- CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN
- SDR_CTRLGRP_CTRLCFG_DQSTRKEN_LSB);
-
- clrsetbits_le32(sdr_ctrl-ctrl_cfg, SDR_CTRLGRP_CTRLCFG_NODMPINS_MASK,
- CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS
- SDR_CTRLGRP_CTRLCFG_NODMPINS_LSB);
+ writel(ctrl_cfg, sdr_ctrl-ctrl_cfg);
}
static void
[U-Boot] [PATCH 00/28] socfpga: sdram.c cleanups
This entire series focuses solely on cleaning up the drivers/ddr/altera/sdram.c file. After this series, this one file is totally checkpatch clean and does not pull in any weird qts-generated macros ; all that is wrapped in the board file. This micro-series applies on top of my previous mega-series [1]. This series is available via git at [2]. [1] https://www.mail-archive.com/u-boot@lists.denx.de/msg178890.html [2] http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=shortlog;h=refs/heads/06-ddr-part2 Marek Vasut (28): ddr: altera: sdram: Switch to generic_hweight32() ddr: altera: sdram: Clean up compute_errata_rows() part 1 ddr: altera: sdram: Clean up compute_errata_rows() part 2 ddr: altera: sdram: Clean up set_sdr_ctrlcfg() ddr: altera: sdram: Clean up set_sdr_dram_timing*() ddr: altera: sdram: Clean up set_sdr_addr_rw() ddr: altera: sdram: Clean up set_sdr_static_cfg() ddr: altera: sdram: Clean up set_sdr_fifo_cfg() ddr: altera: sdram: Clean up set_sdr_mp_weight() ddr: altera: sdram: Clean up set_sdr_mp_pacing() ddr: altera: sdram: Clean up set_sdr_mp_threshold() ddr: altera: sdram: Introduce socfpga_sdram_config() structure ddr: altera: sdram: Clean up sdram_mmr_init_full() part 1 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 2 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 3 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 4 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 5 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 6 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 7 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 8 ddr: altera: sdram: Introduce socfpga_sdram_get_config() ddr: altera: sdram: Clean up sdram_calculate_size() part 1 ddr: altera: sdram: Clean up sdram_calculate_size() part 2 ddr: altera: sdram: Clean up sdram_write_verify() ddr: altera: sdram: Add missing kerneldoc ddr: altera: sdram: Minor cleanup in sdram_set_rule() ddr: altera: sdram: Minor cleanup in sdram_get_rule() ddr: altera: sdram: Make sdram_start and sdram_end into u32 arch/arm/mach-socfpga/include/mach/sdram.h | 44 +- board/altera/socfpga/Makefile | 3 +- board/altera/socfpga/wrap_sdram_config.c | 185 drivers/ddr/altera/sdram.c | 724 + 4 files changed, 451 insertions(+), 505 deletions(-) create mode 100644 board/altera/socfpga/wrap_sdram_config.c -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 07/28] ddr: altera: sdram: Clean up set_sdr_static_cfg()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.
Signed-off-by: Marek Vasut ma...@denx.de
---
drivers/ddr/altera/sdram.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index 143f41b..d8d04f4 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -393,15 +393,14 @@ static void set_sdr_addr_rw(void)
static void set_sdr_static_cfg(void)
{
- debug(Configuring STATICCFG\n);
- clrsetbits_le32(sdr_ctrl-static_cfg, SDR_CTRLGRP_STATICCFG_MEMBL_MASK,
- CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL
- SDR_CTRLGRP_STATICCFG_MEMBL_LSB);
-
- clrsetbits_le32(sdr_ctrl-static_cfg,
- SDR_CTRLGRP_STATICCFG_USEECCASDATA_MASK,
- CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA
+ const u32 static_cfg =
+ (CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL
+ SDR_CTRLGRP_STATICCFG_MEMBL_LSB)|
+ (CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA
SDR_CTRLGRP_STATICCFG_USEECCASDATA_LSB);
+
+ debug(Configuring STATICCFG\n);
+ writel(static_cfg, sdr_ctrl-static_cfg);
}
static void set_sdr_fifo_cfg(void)
--
2.1.4
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Re: [U-Boot] [RFC PATCH] Makefile: Add SOURCE_DATE_TZ
Le samedi 01 août 2015 à 22:32 +1200, Chris Packham a écrit :
Along with SOURCE_DATE_EPOCH SOURCE_DATE_TZ can be used to recreate a
build with a specific date timestamp. This allows the verification of
source supplied with a pre-compiled binary.
If SOURCE_DATE_EPOCH is supplied SOURCE_DATE_TZ can be used to specify
what will appear in the output of the version command. If SOURCE_DATE_TZ
is not specified UTC will be used. SOURCE_DATE_TZ on it's own will not
have an affect.
Well, I worked with the assumption that SOURCE_DATE_EPOCH would always
be provided in UTC, but I see no harm in providing SOURCE_DATE_TZ as
well, provided that it falls back to UTC when not set, as is the current
behaviour of tour patch.
Looks good to me!
Signed-off-by: Chris Packham judge.pack...@gmail.com
---
This is a quick proof of concept that allows some control of how the
timezone is displayed.
Makefile | 7 ---
README | 9 ++---
2 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/Makefile b/Makefile
index f75c730..5102a9c 100644
--- a/Makefile
+++ b/Makefile
@@ -1232,9 +1232,10 @@ endef
define filechk_timestamp.h
(if test -n $${SOURCE_DATE_EPOCH}; then \
SOURCE_DATE=@$${SOURCE_DATE_EPOCH}; \
- LC_ALL=C date -u -d $${SOURCE_DATE} +'#define U_BOOT_DATE %b
%d %C%y'; \
- LC_ALL=C date -u -d $${SOURCE_DATE} +'#define U_BOOT_TIME
%T'; \
- LC_ALL=C date -u -d $${SOURCE_DATE} +'#define U_BOOT_TZ
%z'; \
+ SOURCE_TZ=$${SOURCE_DATE_TZ:-UTC}; \
+ TZ=$${SOURCE_TZ} LC_ALL=C date -d $${SOURCE_DATE} +'#define
U_BOOT_DATE %b %d %C%y'; \
+ TZ=$${SOURCE_TZ} LC_ALL=C date -d $${SOURCE_DATE} +'#define
U_BOOT_TIME %T'; \
+ TZ=$${SOURCE_TZ} LC_ALL=C date -d $${SOURCE_DATE} +'#define
U_BOOT_TZ %z'; \
else \
LC_ALL=C date +'#define U_BOOT_DATE %b %d %C%y'; \
LC_ALL=C date +'#define U_BOOT_TIME %T'; \
diff --git a/README b/README
index 1bcb63c..d2e3e94 100644
--- a/README
+++ b/README
@@ -5087,11 +5087,14 @@ Reproducible builds
In order to achieve reproducible builds, timestamps used in the U-Boot build
process have to be set to a fixed value.
-This is done using the SOURCE_DATE_EPOCH environment variable.
-SOURCE_DATE_EPOCH is to be set on the build host's shell, not as a
configuration
-option for U-Boot or an environment variable in U-Boot.
+This is done using the SOURCE_DATE_EPOCH and SOURCE_DATE_TZ environment
+variables. These are to be set on the build host's shell, not as a
+configuration option for U-Boot or an environment variable in U-Boot.
SOURCE_DATE_EPOCH should be set to a number of seconds since the epoch, in
UTC.
+SOURCE_DATE_TZ will default to UTC but can be set to another timezone and is
+used to determine how the date is displayed (tzselect(1) can be used to
+determine an appropriate value).
Building the Software:
==
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Description: This is a digitally signed message part
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[U-Boot] [PATCH] ARM: drop optional from target select in favor of ARCH_VERSATILE
Since commit a26cd04920dc (arch: Make board selection choices optional), Kconfig could create such an insane .config file that no SoC/board is selected. This is now a real problem for Buildroot, for example. (http://lists.busybox.net/pipermail/buildroot/2015-July/135125.html) This commit drops the optional from the ARM target select menu in favor of Versatile family. Rationale: - Historically, Linux chose versatile_defconfig as the default of ARM defconfig. (arch/arm/Makefile of Linux describes: KBUILD_DEFCONFIG := versatile_defconfig) - It was published by ARM Ltd. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- arch/arm/Kconfig| 2 +- configs/versatileab_defconfig | 1 - configs/versatilepb_defconfig | 1 - configs/versatileqemu_defconfig | 1 - 4 files changed, 1 insertion(+), 4 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9127ace..5caa23e 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -64,7 +64,7 @@ config SEMIHOSTING choice prompt Target select - optional + default ARCH_VERSATILE config ARCH_AT91 bool Atmel AT91 diff --git a/configs/versatileab_defconfig b/configs/versatileab_defconfig index 765fe6e..3dc7d19 100644 --- a/configs/versatileab_defconfig +++ b/configs/versatileab_defconfig @@ -1,5 +1,4 @@ CONFIG_ARM=y -CONFIG_ARCH_VERSATILE=y CONFIG_SYS_EXTRA_OPTIONS=ARCH_VERSATILE_AB # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/versatilepb_defconfig b/configs/versatilepb_defconfig index 1973c38..9fe83b9 100644 --- a/configs/versatilepb_defconfig +++ b/configs/versatilepb_defconfig @@ -1,5 +1,4 @@ CONFIG_ARM=y -CONFIG_ARCH_VERSATILE=y CONFIG_SYS_EXTRA_OPTIONS=ARCH_VERSATILE_PB # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/versatileqemu_defconfig b/configs/versatileqemu_defconfig index ea9c5b9..9ddef4d 100644 --- a/configs/versatileqemu_defconfig +++ b/configs/versatileqemu_defconfig @@ -1,5 +1,4 @@ CONFIG_ARM=y -CONFIG_ARCH_VERSATILE=y CONFIG_SYS_EXTRA_OPTIONS=ARCH_VERSATILE_QEMU,ARCH_VERSATILE_PB # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] ARM: zynq: drop optional from board select in favor of Zedboard
One disadvantage of commit a26cd04920dc (arch: Make board selection choices optional) is that Kconfig could create such an insane .config file that no board is selected. Rip off the optional again in favor of Zedboard as the default target. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- arch/arm/mach-zynq/Kconfig | 2 +- configs/zynq_zed_defconfig | 1 - 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig index 1de5b07..6c98195 100644 --- a/arch/arm/mach-zynq/Kconfig +++ b/arch/arm/mach-zynq/Kconfig @@ -10,7 +10,7 @@ config ZYNQ_CUSTOM_INIT choice prompt Xilinx Zynq board select - optional + default TARGET_ZYNQ_ZED config TARGET_ZYNQ_ZED bool Zynq ZedBoard diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig index f3c63f9..6469d9e 100644 --- a/configs/zynq_zed_defconfig +++ b/configs/zynq_zed_defconfig @@ -1,6 +1,5 @@ CONFIG_ARM=y CONFIG_ARCH_ZYNQ=y -CONFIG_TARGET_ZYNQ_ZED=y CONFIG_DEFAULT_DEVICE_TREE=zynq-zed # CONFIG_SYS_MALLOC_F is not set CONFIG_SPL=y -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/2] arch: Make board selection choices optional
Hi Alexey, 2015-07-30 2:32 GMT+09:00 Alexey Brodkin alexey.brod...@synopsys.com: Hi Joe, Masahiro-san, On Wed, 2015-07-29 at 20:25 +0300, Alexey Brodkin wrote: Hi Joe, On Wed, 2015-05-13 at 10:11 +0900, Masahiro Yamada wrote: Hi Joe, 2015-05-13 7:12 GMT+09:00 Tom Rini tr...@konsulko.com: diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig index c044ad4..85fddd2 100644 --- a/arch/arc/Kconfig +++ b/arch/arc/Kconfig @@ -132,6 +132,7 @@ config ARC_CACHE_LINE_SHIFT choice prompt Target select + optional config TARGET_DUMMY bool Dummy target You do not need to add optional to the ARC board select because Alexey intentionally added TARGET_DUMMY to the top of the board select list. This is another solution to not lose any CONFIG_BOARD_ by savedefconfig although I personally prefer this idea very much. It looks like I'm not the only one suffering from that change. For UniPhier that issue was resolved by Masahiro with replacement of optional with explicit default option. And probably that's the way we'll need to go for all other affected Kconfigs. Still all proposals are more than welcome. Alexey, you are not alone. I am also opposed to optional in SoC/board select menu. Maybe, we should choose a reasonable default in each select menu? (or simply choose the first choice in the menu?) I posted two patches: http://patchwork.ozlabs.org/patch/502793/ http://patchwork.ozlabs.org/patch/502794/ I hope these two are not bad choice. -- Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 00/20] arm: rpi: Enable USB and Ethernet driver model Raspberry Pi
On 07/28/2015 07:55 AM, Tom Rini wrote: On Mon, Jul 27, 2015 at 09:10:32PM -0600, Stephen Warren wrote: On 07/24/2015 07:44 AM, Tom Rini wrote: On Thu, Jul 23, 2015 at 10:17:29PM -0600, Stephen Warren wrote: On 07/14/2015 09:44 AM, Simon Glass wrote: Hi Stephen, On 13 July 2015 at 22:52, Stephen Warren swar...@wwwdotorg.org wrote: On 07/11/2015 08:04 AM, Simon Glass wrote: Hi Stephen, On 10 July 2015 at 23:34, Stephen Warren swar...@wwwdotorg.org wrote: On 07/07/2015 08:53 PM, Simon Glass wrote: Raspberry Pi uses a DWC2 USB controller and a SMSC USB Ethernet adaptor. Neither of these currently support driver model. This series does the following: - Move Raspberry Pi to use device tree control (u-boot-dtb.bin instead of u-boot.bin) I'd strongly prefer not to do this. For one thing, it means we'd need different U-Boot builds for each of the different RPi models, and we currently don't need that (or perhaps we require users to create their own u-boot-dtb.bin by choosing the right DTB to append). If it Why does device tree change how things work now? The get_board_rev() function currently deals with this. It doesn't look like rpi_board_rev is used anywhere else. Without a DT, the code is free to make all the board-rev-specific decisions at run-time without external influence. With a DT, we either have to: a) Pick the DT for one particular board and use that everywhere, even if it's incorrect for the actual board in use. b) Build a different U-Boot + DTB image for each board-rev, and put the correct one on the SD card. Neither of those options seem like a good idea to me. How about: c) Leave the code as is, and not add a whole lot more device tree files. After all the kernel only has files for rpi and rpi_2. Why should we add one for each variant? If you don't want to do it, why do it? For the kernel I do expect to add a DT file for each variant. That makes sense since we expect a single kernel binary to run unmodified on all HW, parameterize the HW setup via the DTB, and have an infrastructure to pass the different DTs to the kernel easily. For U-Boot, I'd like to continue to have a single-binary that runs on all RPis (well, one for RPi 1, another for RPi 2). That's a very nice usage model for users. That's not possible if U-Boot pulls everything from DT and we have a different DT for each system (which only makes sense so that we don't lie in the DT, or fail to represent the differences between the models) since a single DT is embedded into the U-Boot binary; there's no infra-structure to passing 1 of n DTBs to U-Boot. So my question is, for what U-Boot needs, can we have 1 DT for RPi 1 (that's not lying about what the HW can do) and 1 DT for RPi 2? This is the kind of question I'm frankly strugling with right now on converting more of the TI boards to be DT based as well. This would be possible iff all the HW that U-Boot interacts with is identical on all relevant systems and we simply leave out all the other details that U-Boot doesn't care about (or any differences that exist can be probed via standard protocols such as USB). Exactly. Right now, I think that's possible on the RPi. That's good.. However, this limits U-Boot's ability to support all HW. If we wanted U-Boot to fully support all features of the HW, this limited DT wouldn't be sufficient. Examples of potential issues are: a) On RPis that contain the USB hub + Ethernet chip, there's a GPIO that feeds into that chip's enable pin. Right now, U-Boot relies on either the HW default being sufficient to turn that pin on, or perhaps the binary FW that runs before U-Boot does this. However, U-Boot really should set the GPIO itself so that it doesn't rely on HW state set up before it runs. It should also do this only on systems with the USB+LAN chip; we don't have the full schematics for all RPi boards so there's no guarantee the same GPIO doesn't do something else on some boards, especially in the future. b) I2S (digital audio) output is present on some boards. Someone might want U-Boot to play a startup sound, or make a warning beep under certain error conditions. It's not /that/ likely, but similar features have been implemented on other boards. The availability of I2S outputs varies from model to model. c) If we want to expose the GPIOs on the expansion header, the set of GPIOs that it's useful to expose varies between boards. We could probably think of other issues too. To handle all of these, we'd either have to have separate DTs for the different cases, or represent the differences in code. Having multiple DTs has the issues I mentioned previously. By the time we represent part of the HW structure in code, it's far simpler to just represent it all in that one place. C structs are (currently at least) better than DT for representing this information anyway; the C compiler does a lot
Re: [U-Boot] [PATCH 00/20] arm: rpi: Enable USB and Ethernet driver model Raspberry Pi
On 07/28/2015 09:44 AM, Simon Glass wrote: On 28 July 2015 at 07:55, Tom Rini tr...@konsulko.com wrote: ... Maybe examples like these are why we will need (and want) to keep platform data as a possibility in our DM work. There's value in keeping the DT that we use as minimal as possible (so that it can work as broadly as possible) and then do run-time fixups. The other option here might be something like device tree overlays or at least exposing the running DT (... more readily, I bet you could kludge it today) so that the existing cli infrasturcture can modify it). I really like the idea of keeping the DT minimal rather than slavishing adding a whole lot of detail for every board. If things can be probed then I think it is acceptable to probe them to avoid an explosion of DTs. We can do run-time fix ups even if they are currently not very efficient. The 'fdt' command can modify the running FDT I think, but it currently breaks everything since by then we have devices and have recorded the DT offsets. We could add a DT library to fix this, but for now fix-ups need to be done before relocation. There are two cases for probing: a) Standard buses that are probe-able in a standard way, like USB. It makes sense to probe these since the probing code is generic across a wide variety of systems and hence the code can be considered generic. b) Device-specific information sources (such as the RPi firmware etc.). Code for this isn't at all re-usable across systems. In the kernel, there's been some tendency to push for SW that runs before the kernel to probe these information sources and add the relevant information into the DT (or just include the information statically in DT source files), rather than including system-specific code in the kernel to do the probing. This keeps kernel code size down and avoids lots of non-generic code. Related, if the kernel knew it booted on nvidia,jetson-tk1, then that information is enough to tell the kernel the entire set of devices that are attached (aside from anything attached to the USB, PCIe, HDMI controllers). We could probe a board file from just the board name:-) DT schema/content is intended to be identical across all SW stacks so that it can be shared. There's a bit of friction here re: what a bootloader and OS kernel might want in DT vs. what they could/prefer-to probe themselves using device-specific code:-( ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] drivers: hierarchize drivers Kconfig menu
Hi, Le lundi 27 juillet 2015 à 14:33 +0200, Paul Kocialkowski a écrit : Le dimanche 26 juillet 2015 à 02:46 +0900, Masahiro Yamada a écrit : The menuconfig for drivers are getting more and more cluttered and unreadable because too many entries are displayed in a single flat menu. Use hierarchic menu for each category. That looks like a valuable addition to me! This patch was submitted a week ago and I need it for merging another series of mine, that was already accepted. Is there anything preventing this patch from being merged at this point? Thanks! I had started dealing with the USB side of this in a series currently under review. I'll drop the USB bits from my series and base the next version on top of this patch. Thanks! Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- drivers/core/Kconfig | 4 drivers/crypto/Kconfig | 4 drivers/demo/Kconfig | 4 drivers/gpio/Kconfig | 8 drivers/i2c/Kconfig| 8 drivers/led/Kconfig| 4 drivers/misc/Kconfig | 8 drivers/rtc/Kconfig| 8 drivers/serial/Kconfig | 8 drivers/sound/Kconfig | 4 drivers/usb/Kconfig| 8 drivers/video/Kconfig | 8 12 files changed, 76 insertions(+) diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig index e40372d..9cc888d 100644 --- a/drivers/core/Kconfig +++ b/drivers/core/Kconfig @@ -1,3 +1,5 @@ +menu Generic Driver Options + config DM bool Enable Driver Model help @@ -59,3 +61,5 @@ config DM_SEQ_ALIAS Most boards will have a '/aliases' node containing the path to numbered devices (e.g. serial0 = serial0). This feature can be disabled if it is not required, to save code space in SPL. + +endmenu diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig index bd26a2b..1ea116b 100644 --- a/drivers/crypto/Kconfig +++ b/drivers/crypto/Kconfig @@ -1 +1,5 @@ +menu Hardware crypto devices + source drivers/crypto/fsl/Kconfig + +endmenu diff --git a/drivers/demo/Kconfig b/drivers/demo/Kconfig index 7a8ce18..98bb633 100644 --- a/drivers/demo/Kconfig +++ b/drivers/demo/Kconfig @@ -1,3 +1,5 @@ +menu Demo for driver model + config DM_DEMO bool Enable demo uclass support depends on DM @@ -24,3 +26,5 @@ config DM_DEMO_SHAPE a shape when the 'demo hello' command is executed which targets this device. It can be used to help understand how driver model works. + +endmenu diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 0c43777..5934597 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -1,3 +1,9 @@ +# +# GPIO infrastructure and drivers +# + +menu GPIO Support + config DM_GPIO bool Enable Driver Model for GPIO drivers depends on DM @@ -42,3 +48,5 @@ config VYBRID_GPIO default n help Say yes here to support Vybrid vf610 GPIOs. + +endmenu diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 86fb36b..b8b2250 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -1,3 +1,9 @@ +# +# I2C subsystem configuration +# + +menu I2C support + config DM_I2C bool Enable Driver Model for I2C drivers depends on DM @@ -73,3 +79,5 @@ config SYS_I2C_UNIPHIER_F help Support for UniPhier FIFO-builtin I2C controller driver. This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs. + +endmenu diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig index de5feea..b21bc94 100644 --- a/drivers/led/Kconfig +++ b/drivers/led/Kconfig @@ -1,3 +1,5 @@ +menu LED Support + config LED bool Enable LED support depends on DM @@ -24,3 +26,5 @@ config LED_GPIO GPIOs may be on the SoC or some other device which provides GPIOs. The GPIO driver must used driver model. LEDs are configured using the device tree. + +endmenu diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 3b7f76a..f29a169 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -1,3 +1,9 @@ +# +# Multifunction miscellaneous devices +# + +menu Multifunction device drivers + config CMD_CROS_EC bool Enable crosec command depends on CROS_EC @@ -82,3 +88,5 @@ config RESET Each driver can provide a reset method which will be called to effect a reset. The uclass will try all available drivers when reset_walk() is called. + +endmenu diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index bd63621..b5d9048 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -1,3 +1,9 @@ +# +# RTC drivers configuration +# + +menu Real Time Clock + config DM_RTC bool Enable Driver Model for RTC drivers depends on DM @@ -6,3 +12,5 @@ config DM_RTC then
Re: [U-Boot] [PATCH] patman: Don't run patman when it is imported as a module
On Sat, Aug 1, 2015 at 12:06 AM, Simon Glass s...@chromium.org wrote: Hi Chris, On 30 July 2015 at 23:34, Chris Packham judge.pack...@gmail.com wrote: Hi Simon, On Fri, Jul 31, 2015 at 7:47 AM, Simon Glass s...@chromium.org wrote: Commit 488d19c (patman: add distutils based installer) has the side effect of making patman run twice with each invocation. Fix this by checking for 'main program' invocation in patman.py. This is good practice in any case. Signed-off-by: Simon Glass s...@chromium.org --- Reviewed-by: Chris Packham judge.pack...@gmail.com I did (kind of) think about that at the time when I had to handle the in-tree vs out-of-tree usage. One solution would have been to move most of the code to a module (patch-manager say) and have the patman script import that. The same would work for anything else that wanted to bring in bits of patman (buildman perhaps?). Ah OK. We could do this, but what is the benefit? Buildman currently imports the particular modules it needs and doesn't use the top-level tool. That may play into the de-coupling of u-boot and patman. Some of these common bits could be yet another re-usable component that both patman and buildman use. But then you'd have to come up with a name for such a component which we all know is a NP-hard problem :). I haven't really looked at buildman and only have a vague understanding of what it does. Do you think it too would be useful outside of u-boot? [snip] Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Makefile: Use correct timezone for U_BOOT_TZ
(note I had some patman config that erroneously included extra people
on the original Cc list, I've now dropped them)
On Sat, Aug 1, 2015 at 5:05 AM, Paul Kocialkowski cont...@paulk.fr wrote:
Le vendredi 31 juillet 2015 à 22:04 +1200, Chris Packham a écrit :
When building with SOURCE_DATE_EPOCH the timezone is in UTC. When
building normally the timezone is taken from the build machine's locale
setting.
Thanks a lot for introducing this, I thought it might disturb a few
people.
Fixes: f3f431a71272 (Reproducible U-Boot build support, using
SOURCE_DATE_EPOCH)
It is incorrect to say that your patch fixes my commit, because my
commit didn't introduce anything unexpected or faulty.
If anything, it was merged before people gave their opinion about
whether UTC should be default. I was also going to introduce a patch
like yours later. For the record, UTC is default for Coreboot's
timestamps.
Thus, please remove that line.
Done. v2 on it's way.
The other mailing list thread also talked about the possibility of
having SOURCE_DATE_TZOFFSET I'll look at a proof of concept for that.
Otherwise, this is:
Tested-By: Paul Kocialkowski cont...@paulk.fr
Signed-off-by: Chris Packham judge.pack...@gmail.com
---
Hopefully this will suit everyone. I've done a quick sanity test with
sandbox and the date shown in the version output looks to be what I
expect with/without SOURCE_DATE_EPOCH.
Makefile | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/Makefile b/Makefile
index 394ed09..f75c730 100644
--- a/Makefile
+++ b/Makefile
@@ -1230,10 +1230,16 @@ define filechk_version.h
endef
define filechk_timestamp.h
- (SOURCE_DATE=$${SOURCE_DATE_EPOCH:+@$$SOURCE_DATE_EPOCH}; \
- LC_ALL=C date -u -d $${SOURCE_DATE:-now} +'#define U_BOOT_DATE %b
%d %C%y'; \
- LC_ALL=C date -u -d $${SOURCE_DATE:-now} +'#define U_BOOT_TIME
%T'; \
- LC_ALL=C date -u -d $${SOURCE_DATE:-now} +'#define U_BOOT_TZ %z' )
+ (if test -n $${SOURCE_DATE_EPOCH}; then \
+ SOURCE_DATE=@$${SOURCE_DATE_EPOCH}; \
+ LC_ALL=C date -u -d $${SOURCE_DATE} +'#define U_BOOT_DATE
%b %d %C%y'; \
+ LC_ALL=C date -u -d $${SOURCE_DATE} +'#define U_BOOT_TIME
%T'; \
+ LC_ALL=C date -u -d $${SOURCE_DATE} +'#define U_BOOT_TZ
%z'; \
+ else \
+ LC_ALL=C date +'#define U_BOOT_DATE %b %d %C%y'; \
+ LC_ALL=C date +'#define U_BOOT_TIME %T'; \
+ LC_ALL=C date +'#define U_BOOT_TZ %z'; \
+ fi)
endef
$(version_h): include/config/uboot.release FORCE
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