Re: [U-Boot] Makefile: Fix linking with modern binutils

[Joel Stanley]

On Tue, Dec 13, 2016 at 10:51 PM, Tom Rini  wrote:
> On Tue, Dec 13, 2016 at 03:31:24PM +1030, Joel Stanley wrote:
>> Hello Tom,
>>
>> On Sat, Dec 10, 2016 at 12:53 AM, Tom Rini  wrote:
>> >> -LDFLAGS_u-boot += $(LDFLAGS_FINAL)
>> >> +# Avoid Not enough room for program headers on binutils 2.28 onwards.
>> >> +# Flag was introduced in 2.26
>> >> +LDFLAGS_u-boot += $(LDFLAGS_FINAL) \
>> >> + $(call ld-ifversion, -ge, 2260, --no-dynamic-linker)
>> >
>> > This breaks on things like:
>> > $ arm-none-eabi-ld --version
>> > GNU ld (GNU Tools for ARM Embedded Processors) 2.24.0.20150921
>>
>> The flag will only be added when the version is >= 2.26. Which part of
>> that version string will break the test?
>
> The whole of the string breaks the test.  It comes out to 2037492100, is
> greater than is true, and tries to pass the flag which isn't know about
> in that version and fails.  Note that we're slightly behind the Linux
> kernel version of the ld-version script, but dropping that one in (which
> does have a bugfix) gives 22400 for the version.  Perhaps it would
> give 22600 or similar instead for what you've got and we need to
> update ld-version.sh in order to use this patch as-is?

Thanks for pointing that out. I don't have an old enough binutils
around to test that case.

You're correct; it does give 22600 with the version of
ld-version.sh in the kernel tree. I recommend updating the u-boot copy
of the scripts to avoid this mistake in the future.

I will instead send a patch that tests for ld-option as Måns suggested.

Cheers,

Joel
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[U-Boot] [PATCH v2] Makefile: Fix linking with modern binutils

[Joel Stanley]

Since Binutils 1a9ccd70f9a7[1] u-boot will not link targets that set
CONFIG_SYS_TEXT_BASE=0 with the following error:

  LD  u-boot
arm-linux-gnueabi-ld.bfd: u-boot: Not enough room for program headers, try
 linking with -N
arm-linux-gnueabi-ld.bfd: final link failed: Bad value

The issue can reproduced the bad binutils and the rock2_defconfig target.

This issue was also encountered by the powerpc kernel[2], with the fix
being to pass --no-dynamic-linker for linkers newer than 2.26 when this
flag was introduced. The option tells ld that the PIE or shared lib does
not need loaded program headers.

Ubuntu Zesty's Binutils 2.27.51.20161202 hits this error.

[1] 
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commit;h=1a9ccd70f9a7
[2] 
https://git.kernel.org/cgit/linux/kernel/git/powerpc/linux.git/commit/?h=next=ff45000fcb56b5b0f1a14a865d3541746d838a0a

Signed-off-by: Joel Stanley 
---
v2:
 - use ld-option to test for the flag instead of the version, as suggested by 
Måns
 - update commit message with clarification from Alan

 Makefile | 4 
 1 file changed, 4 insertions(+)

diff --git a/Makefile b/Makefile
index dfed58bec661..c98a8361654a 100644
--- a/Makefile
+++ b/Makefile
@@ -793,6 +793,10 @@ ALL-y += $(CONFIG_BUILD_TARGET:"%"=%)
 endif
 
 LDFLAGS_u-boot += $(LDFLAGS_FINAL)
+
+# Avoid 'Not enough room for program headers' error on binutils 2.28 onwards.
+LDFLAGS_u-boot += $(call ld-option, --no-dynamic-linker)
+
 ifneq ($(CONFIG_SYS_TEXT_BASE),)
 LDFLAGS_u-boot += -Ttext $(CONFIG_SYS_TEXT_BASE)
 endif
-- 
2.11.0

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Re: [U-Boot] [PATCH] armv8: fsl-lsch2: enable snoopable usb read and write

[Stuart Yoder]

> -Original Message-
> From: Changming Huang [mailto:jerry.hu...@nxp.com]
> Sent: Thursday, December 15, 2016 1:45 AM
> To: york sun ; u-boot@lists.denx.de; Stuart Yoder 
> 
> Cc: Jerry Huang 
> Subject: [PATCH] armv8: fsl-lsch2: enable snoopable usb read and write
> 
> By default the USB IP on the ls1012a/ls1043a/ls1046a SoCs does not
> generat coherent/snoopable transactions. Here enable it in the
> SCFG_SNPCNFGCR register.
> In addition, the dma-coherent property must be set in USB DTS nodes.
> 
> Signed-off-by: Changming Huang 
> ---
>  arch/arm/cpu/armv8/fsl-layerscape/soc.c|   13 -
>  .../include/asm/arch-fsl-layerscape/immap_lsch2.h  |6 ++
>  2 files changed, 18 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
> b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> index 2f54625..74eb8a1 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> @@ -340,6 +340,7 @@ void fsl_lsch2_early_init_f(void)
>  {
>   struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
>   struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
> + u32 snp_usb;
> 
>  #ifdef CONFIG_LAYERSCAPE_NS_ACCESS
>   enable_layerscape_ns_access();
> @@ -352,11 +353,21 @@ void fsl_lsch2_early_init_f(void)
>  #if defined(CONFIG_FSL_QSPI) && !defined(CONFIG_QSPI_BOOT)
>   out_be32(>qspi_cfg, SCFG_QSPI_CLKSEL);
>  #endif
> +
> + snp_usb = SCFG_SNPCNFGCR_USB1RDSNP | SCFG_SNPCNFGCR_USB1WRSNP;
> +#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
> + snp_usb |= SCFG_SNPCNFGCR_USB2WRSNP |
> + SCFG_SNPCNFGCR_USB2RDSNP |
> + SCFG_SNPCNFGCR_USB3WRSNP |
> + SCFG_SNPCNFGCR_USB3RDSNP;
> +#endif
> +
>   /* Make SEC reads and writes snoopable */

Fix the above comment...it is not only about SEC anymore.

Stuart
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Re: [U-Boot] [PATCH 2/2] spl: move RAM boot support in separate file

[Stefan Roese]

On 16.12.2016 03:00, Stefan Agner wrote:

From: Stefan Agner 

Add a new top-level config option so support booting an image stored
in RAM. This allows to move the RAM boot support into a sparate file
and having a single condition to compile that file.

Signed-off-by: Stefan Agner 
---
The series has been build tested using buildman.

Building current source for 1230 boards (8 threads, 1 job per thread)
 10190  211 /1230   0:00:03  : P1022DS_NAND

--
Stefan

 common/spl/Kconfig  | 11 --
 common/spl/Makefile |  1 +
 common/spl/spl.c| 58 -
 3 files changed, 10 insertions(+), 60 deletions(-)


Looks like you forgot to add the newly created file.

Thanks,
Stefan


diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 8f779e6..802779b 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -449,9 +449,16 @@ config SPL_POWER_SUPPORT
  in drivers/power, drivers/power/pmic and drivers/power/regulator
  as part of an SPL build.

+config SPL_RAM_SUPPORT
+   bool "Support booting from RAM"
+   depends on SPL
+   help
+ Enable booting of an image in RAM. The image can be preloaded or
+ it can be loaded by SPL directly into RAM (e.g. using USB).
+
 config SPL_RAM_DEVICE
bool "Support booting from preloaded image in RAM"
-   depends on SPL
+   depends on SPL_RAM_SUPPORT
help
  Enable booting of an image already loaded in RAM. The image has to
  be already in memory when SPL takes over, e.g. loaded by the boot
@@ -557,7 +564,7 @@ choice

 config SPL_DFU_RAM
bool "RAM device"
-   depends on SPL_DFU_SUPPORT
+   depends on SPL_DFU_SUPPORT && SPL_RAM_SUPPORT
help
 select RAM/DDR memory device for loading binary images
 (u-boot/kernel) to the selected device partition using
diff --git a/common/spl/Makefile b/common/spl/Makefile
index ed02635..1933cbd 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -26,4 +26,5 @@ obj-$(CONFIG_SPL_EXT_SUPPORT) += spl_ext.o
 obj-$(CONFIG_SPL_SATA_SUPPORT) += spl_sata.o
 obj-$(CONFIG_SPL_DFU_SUPPORT) += spl_dfu.o
 obj-$(CONFIG_SPL_SPI_LOAD) += spl_spi.o
+obj-$(CONFIG_SPL_RAM_SUPPORT) += spl_ram.o
 endif
diff --git a/common/spl/spl.c b/common/spl/spl.c
index f7df834..2f3b6a4 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -170,64 +170,6 @@ __weak void __noreturn jump_to_image_no_args(struct 
spl_image_info *spl_image)
image_entry();
 }

-#ifndef CONFIG_SPL_LOAD_FIT_ADDRESS
-# define CONFIG_SPL_LOAD_FIT_ADDRESS   0
-#endif
-
-#if defined(CONFIG_SPL_RAM_DEVICE) || defined(CONFIG_SPL_DFU_SUPPORT)
-static ulong spl_ram_load_read(struct spl_load_info *load, ulong sector,
-  ulong count, void *buf)
-{
-   debug("%s: sector %lx, count %lx, buf %lx\n",
- __func__, sector, count, (ulong)buf);
-   memcpy(buf, (void *)(CONFIG_SPL_LOAD_FIT_ADDRESS + sector), count);
-   return count;
-}
-
-static int spl_ram_load_image(struct spl_image_info *spl_image,
- struct spl_boot_device *bootdev)
-{
-   struct image_header *header;
-
-   header = (struct image_header *)CONFIG_SPL_LOAD_FIT_ADDRESS;
-
-#if defined(CONFIG_SPL_DFU_SUPPORT)
-   if (bootdev->boot_device == BOOT_DEVICE_DFU)
-   spl_dfu_cmd(0, "dfu_alt_info_ram", "ram", "0");
-#endif
-
-   if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
-   image_get_magic(header) == FDT_MAGIC) {
-   struct spl_load_info load;
-
-   debug("Found FIT\n");
-   load.bl_len = 1;
-   load.read = spl_ram_load_read;
-   spl_load_simple_fit(spl_image, , 0, header);
-   } else {
-   debug("Legacy image\n");
-   /*
-* Get the header.  It will point to an address defined by
-* handoff which will tell where the image located inside
-* the flash. For now, it will temporary fixed to address
-* pointed by U-Boot.
-*/
-   header = (struct image_header *)
-   (CONFIG_SYS_TEXT_BASE - sizeof(struct image_header));
-
-   spl_parse_image_header(spl_image, header);
-   }
-
-   return 0;
-}
-#if defined(CONFIG_SPL_RAM_DEVICE)
-SPL_LOAD_IMAGE_METHOD("RAM", 0, BOOT_DEVICE_RAM, spl_ram_load_image);
-#endif
-#if defined(CONFIG_SPL_DFU_SUPPORT)
-SPL_LOAD_IMAGE_METHOD("USB DFU", 0, BOOT_DEVICE_DFU, spl_ram_load_image);
-#endif
-#endif
-
 int spl_init(void)
 {
int ret;



Viele Grüße,
Stefan

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[U-Boot] [PATCH v2] armv8: fsl-lsch2: enable snoopable usb read and write

[Changming Huang]

By default the USB IP on the ls1012a/ls1043a/ls1046a SoCs does not
generat coherent/snoopable transactions. Here enable it in the
SCFG_SNPCNFGCR register.
In addition, the dma-coherent property must be set in USB DTS nodes.

Signed-off-by: Changming Huang 
---
Changes in v2:
  - fix one comment that is not only for SEC

 arch/arm/cpu/armv8/fsl-layerscape/soc.c|   15 +--
 .../include/asm/arch-fsl-layerscape/immap_lsch2.h  |6 ++
 2 files changed, 19 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 2f54625..c1dbe53 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -340,6 +340,7 @@ void fsl_lsch2_early_init_f(void)
 {
struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
+   u32 snp_usb;
 
 #ifdef CONFIG_LAYERSCAPE_NS_ACCESS
enable_layerscape_ns_access();
@@ -352,11 +353,21 @@ void fsl_lsch2_early_init_f(void)
 #if defined(CONFIG_FSL_QSPI) && !defined(CONFIG_QSPI_BOOT)
out_be32(>qspi_cfg, SCFG_QSPI_CLKSEL);
 #endif
-   /* Make SEC reads and writes snoopable */
+
+   snp_usb = SCFG_SNPCNFGCR_USB1RDSNP | SCFG_SNPCNFGCR_USB1WRSNP;
+#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
+   snp_usb |= SCFG_SNPCNFGCR_USB2WRSNP |
+   SCFG_SNPCNFGCR_USB2RDSNP |
+   SCFG_SNPCNFGCR_USB3WRSNP |
+   SCFG_SNPCNFGCR_USB3RDSNP;
+#endif
+
+   /* Enable some IP's reads and writes snoopable */
setbits_be32(>snpcnfgcr, SCFG_SNPCNFGCR_SECRDSNP |
 SCFG_SNPCNFGCR_SECWRSNP |
 SCFG_SNPCNFGCR_SATARDSNP |
-SCFG_SNPCNFGCR_SATAWRSNP);
+SCFG_SNPCNFGCR_SATAWRSNP |
+snp_usb);
 
/*
 * Enable snoop requests and DVM message requests for
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h 
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index b3cfd89..b82db03 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -340,6 +340,12 @@ struct ccsr_gur {
 #define SCFG_SNPCNFGCR_SECWRSNP0x4000
 #define SCFG_SNPCNFGCR_SATARDSNP   0x0080
 #define SCFG_SNPCNFGCR_SATAWRSNP   0x0040
+#define SCFG_SNPCNFGCR_USB1RDSNP   0x0020
+#define SCFG_SNPCNFGCR_USB1WRSNP   0x0010
+#define SCFG_SNPCNFGCR_USB2WRSNP   0x0001
+#define SCFG_SNPCNFGCR_USB2RDSNP   0x8000
+#define SCFG_SNPCNFGCR_USB3WRSNP   0x4000
+#define SCFG_SNPCNFGCR_USB3RDSNP   0x2000
 
 /* Supplemental Configuration Unit */
 struct ccsr_scfg {
-- 
1.7.9.5

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[U-Boot] [PATCH 2/2] spl: move RAM boot support in separate file

[Stefan Agner]

From: Stefan Agner 

Add a new top-level config option so support booting an image stored
in RAM. This allows to move the RAM boot support into a sparate file
and having a single condition to compile that file.

Signed-off-by: Stefan Agner 
---
The series has been build tested using buildman.

Building current source for 1230 boards (8 threads, 1 job per thread)
 10190  211 /1230   0:00:03  : P1022DS_NAND

--
Stefan

 common/spl/Kconfig  | 11 --
 common/spl/Makefile |  1 +
 common/spl/spl.c| 58 -
 3 files changed, 10 insertions(+), 60 deletions(-)

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 8f779e6..802779b 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -449,9 +449,16 @@ config SPL_POWER_SUPPORT
  in drivers/power, drivers/power/pmic and drivers/power/regulator
  as part of an SPL build.
 
+config SPL_RAM_SUPPORT
+   bool "Support booting from RAM"
+   depends on SPL
+   help
+ Enable booting of an image in RAM. The image can be preloaded or
+ it can be loaded by SPL directly into RAM (e.g. using USB).
+
 config SPL_RAM_DEVICE
bool "Support booting from preloaded image in RAM"
-   depends on SPL
+   depends on SPL_RAM_SUPPORT
help
  Enable booting of an image already loaded in RAM. The image has to
  be already in memory when SPL takes over, e.g. loaded by the boot
@@ -557,7 +564,7 @@ choice
 
 config SPL_DFU_RAM
bool "RAM device"
-   depends on SPL_DFU_SUPPORT
+   depends on SPL_DFU_SUPPORT && SPL_RAM_SUPPORT
help
 select RAM/DDR memory device for loading binary images
 (u-boot/kernel) to the selected device partition using
diff --git a/common/spl/Makefile b/common/spl/Makefile
index ed02635..1933cbd 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -26,4 +26,5 @@ obj-$(CONFIG_SPL_EXT_SUPPORT) += spl_ext.o
 obj-$(CONFIG_SPL_SATA_SUPPORT) += spl_sata.o
 obj-$(CONFIG_SPL_DFU_SUPPORT) += spl_dfu.o
 obj-$(CONFIG_SPL_SPI_LOAD) += spl_spi.o
+obj-$(CONFIG_SPL_RAM_SUPPORT) += spl_ram.o
 endif
diff --git a/common/spl/spl.c b/common/spl/spl.c
index f7df834..2f3b6a4 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -170,64 +170,6 @@ __weak void __noreturn jump_to_image_no_args(struct 
spl_image_info *spl_image)
image_entry();
 }
 
-#ifndef CONFIG_SPL_LOAD_FIT_ADDRESS
-# define CONFIG_SPL_LOAD_FIT_ADDRESS   0
-#endif
-
-#if defined(CONFIG_SPL_RAM_DEVICE) || defined(CONFIG_SPL_DFU_SUPPORT)
-static ulong spl_ram_load_read(struct spl_load_info *load, ulong sector,
-  ulong count, void *buf)
-{
-   debug("%s: sector %lx, count %lx, buf %lx\n",
- __func__, sector, count, (ulong)buf);
-   memcpy(buf, (void *)(CONFIG_SPL_LOAD_FIT_ADDRESS + sector), count);
-   return count;
-}
-
-static int spl_ram_load_image(struct spl_image_info *spl_image,
- struct spl_boot_device *bootdev)
-{
-   struct image_header *header;
-
-   header = (struct image_header *)CONFIG_SPL_LOAD_FIT_ADDRESS;
-
-#if defined(CONFIG_SPL_DFU_SUPPORT)
-   if (bootdev->boot_device == BOOT_DEVICE_DFU)
-   spl_dfu_cmd(0, "dfu_alt_info_ram", "ram", "0");
-#endif
-
-   if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
-   image_get_magic(header) == FDT_MAGIC) {
-   struct spl_load_info load;
-
-   debug("Found FIT\n");
-   load.bl_len = 1;
-   load.read = spl_ram_load_read;
-   spl_load_simple_fit(spl_image, , 0, header);
-   } else {
-   debug("Legacy image\n");
-   /*
-* Get the header.  It will point to an address defined by
-* handoff which will tell where the image located inside
-* the flash. For now, it will temporary fixed to address
-* pointed by U-Boot.
-*/
-   header = (struct image_header *)
-   (CONFIG_SYS_TEXT_BASE - sizeof(struct image_header));
-
-   spl_parse_image_header(spl_image, header);
-   }
-
-   return 0;
-}
-#if defined(CONFIG_SPL_RAM_DEVICE)
-SPL_LOAD_IMAGE_METHOD("RAM", 0, BOOT_DEVICE_RAM, spl_ram_load_image);
-#endif
-#if defined(CONFIG_SPL_DFU_SUPPORT)
-SPL_LOAD_IMAGE_METHOD("USB DFU", 0, BOOT_DEVICE_DFU, spl_ram_load_image);
-#endif
-#endif
-
 int spl_init(void)
 {
int ret;
-- 
2.10.2

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[U-Boot] [PATCH 1/2] Convert CONFIG_SPL_RAM_DEVICE to defconfig

[Stefan Agner]

From: Stefan Agner 

This converts the following to Kconfig:
  CONFIG_SPL_RAM_DEVICE

Signed-off-by: Stefan Agner 
---

 common/spl/Kconfig | 8 
 configs/apalis_t30_defconfig   | 1 +
 configs/beaver_defconfig   | 1 +
 configs/cardhu_defconfig   | 1 +
 configs/cei-tk1-som_defconfig  | 1 +
 configs/colibri_t20_defconfig  | 1 +
 configs/colibri_t30_defconfig  | 1 +
 configs/dalmore_defconfig  | 1 +
 configs/harmony_defconfig  | 1 +
 configs/jetson-tk1_defconfig   | 1 +
 configs/medcom-wide_defconfig  | 1 +
 configs/nyan-big_defconfig | 1 +
 configs/paz00_defconfig| 1 +
 configs/plutux_defconfig   | 1 +
 configs/seaboard_defconfig | 1 +
 configs/socfpga_arria5_defconfig   | 1 +
 configs/socfpga_cyclone5_defconfig | 1 +
 configs/socfpga_de0_nano_soc_defconfig | 1 +
 configs/socfpga_de1_soc_defconfig  | 1 +
 configs/socfpga_is1_defconfig  | 1 +
 configs/socfpga_mcvevk_defconfig   | 1 +
 configs/socfpga_sockit_defconfig   | 1 +
 configs/socfpga_socrates_defconfig | 1 +
 configs/socfpga_sr1500_defconfig   | 1 +
 configs/socfpga_vining_fpga_defconfig  | 1 +
 configs/tec-ng_defconfig   | 1 +
 configs/tec_defconfig  | 1 +
 configs/topic_miami_defconfig  | 1 +
 configs/topic_miamiplus_defconfig  | 1 +
 configs/trimslice_defconfig| 1 +
 configs/venice2_defconfig  | 1 +
 configs/ventana_defconfig  | 1 +
 configs/whistler_defconfig | 1 +
 configs/zynq_microzed_defconfig| 1 +
 configs/zynq_picozed_defconfig | 1 +
 configs/zynq_zc702_defconfig   | 1 +
 configs/zynq_zc706_defconfig   | 1 +
 configs/zynq_zc770_xm010_defconfig | 1 +
 configs/zynq_zc770_xm011_defconfig | 1 +
 configs/zynq_zc770_xm012_defconfig | 1 +
 configs/zynq_zc770_xm013_defconfig | 1 +
 configs/zynq_zed_defconfig | 1 +
 configs/zynq_zybo_defconfig| 1 +
 include/configs/microblaze-generic.h   | 1 -
 include/configs/socfpga_common.h   | 1 -
 include/configs/tegra-common.h | 1 -
 include/configs/xilinx_zynqmp.h| 1 -
 include/configs/zynq-common.h  | 1 -
 48 files changed, 50 insertions(+), 5 deletions(-)

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index cba51f5..8f779e6 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -449,6 +449,14 @@ config SPL_POWER_SUPPORT
  in drivers/power, drivers/power/pmic and drivers/power/regulator
  as part of an SPL build.
 
+config SPL_RAM_DEVICE
+   bool "Support booting from preloaded image in RAM"
+   depends on SPL
+   help
+ Enable booting of an image already loaded in RAM. The image has to
+ be already in memory when SPL takes over, e.g. loaded by the boot
+ ROM.
+
 config SPL_SATA_SUPPORT
bool "Support loading from SATA"
depends on SPL
diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig
index 691148c..68ada32 100644
--- a/configs/apalis_t30_defconfig
+++ b/configs/apalis_t30_defconfig
@@ -7,6 +7,7 @@ CONFIG_OF_SYSTEM_SETUP=y
 CONFIG_CONSOLE_MUX=y
 CONFIG_SYS_STDIO_DEREGISTER=y
 # CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_SPL_RAM_DEVICE=y
 CONFIG_SYS_PROMPT="Apalis T30 # "
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig
index 5cb73c0..7af382d 100644
--- a/configs/beaver_defconfig
+++ b/configs/beaver_defconfig
@@ -6,6 +6,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra30-beaver"
 CONFIG_OF_SYSTEM_SETUP=y
 CONFIG_CONSOLE_MUX=y
 CONFIG_SYS_STDIO_DEREGISTER=y
+CONFIG_SPL_RAM_DEVICE=y
 CONFIG_SYS_PROMPT="Tegra30 (Beaver) # "
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
diff --git a/configs/cardhu_defconfig b/configs/cardhu_defconfig
index 0214758..9673387 100644
--- a/configs/cardhu_defconfig
+++ b/configs/cardhu_defconfig
@@ -6,6 +6,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra30-cardhu"
 CONFIG_OF_SYSTEM_SETUP=y
 CONFIG_CONSOLE_MUX=y
 CONFIG_SYS_STDIO_DEREGISTER=y
+CONFIG_SPL_RAM_DEVICE=y
 CONFIG_SYS_PROMPT="Tegra30 (Cardhu) # "
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig
index 909b367..f901296 100644
--- a/configs/cei-tk1-som_defconfig
+++ b/configs/cei-tk1-som_defconfig
@@ -6,6 +6,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra124-cei-tk1-som"
 CONFIG_OF_SYSTEM_SETUP=y
 CONFIG_CONSOLE_MUX=y
 CONFIG_SYS_STDIO_DEREGISTER=y
+CONFIG_SPL_RAM_DEVICE=y
 CONFIG_SYS_PROMPT="Tegra124 (TK1-SOM) # "
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig
index a543246..7806799 100644
--- a/configs/colibri_t20_defconfig
+++ 

[U-Boot] [PATCH 2/2] cmd: fdt: Print error message when fdt application fails

[Stefan Agner]

From: Stefan Agner 

There are lots of reason why a FDT application might fail, the
error code might give an indication. Let the error code translate
in a error string so users can try to understand what went wrong.

Signed-off-by: Stefan Agner 
---
Currently I get this when I apply a device tree overlay to a device
tree without symbols:

  Colibri iMX7 # fdt apply ${loadaddr}
  Colibri iMX7 # fdt print
  libfdt fdt_path_offset() returned FDT_ERR_BADMAGIC
  Colibri iMX7 #

With this change, the situation is a bit more indicative:

  Colibri iMX7 # fdt apply ${loadaddr}
  fdt_overlay_apply(): FDT_ERR_NOTFOUND
  Colibri iMX7 # fdt print
  libfdt fdt_path_offset() returned FDT_ERR_BADMAGIC
  Colibri iMX7 #

 cmd/fdt.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/cmd/fdt.c b/cmd/fdt.c
index 8bd345a..6883e75 100644
--- a/cmd/fdt.c
+++ b/cmd/fdt.c
@@ -642,6 +642,7 @@ static int do_fdt(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
else if (strncmp(argv[1], "ap", 2) == 0) {
unsigned long addr;
struct fdt_header *blob;
+   int ret;
 
if (argc != 3)
return CMD_RET_USAGE;
@@ -654,8 +655,11 @@ static int do_fdt(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
if (!fdt_valid())
return CMD_RET_FAILURE;
 
-   if (fdt_overlay_apply(working_fdt, blob))
+   ret = fdt_overlay_apply(working_fdt, blob);
+   if (ret) {
+   printf("fdt_overlay_apply(): %s\n", fdt_strerror(ret));
return CMD_RET_FAILURE;
+   }
}
 #endif
/* resize the fdt */
-- 
2.10.2

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[U-Boot] [PATCH 1/2] libfdt: overlay: Fix missing symbols condition

[Stefan Agner]

From: Stefan Agner 

When there is no symbols section in the device tree,
overlay_fixup_phandles should return FDT_ERR_NOTFOUND instead of
FDT_ERR_BADOFFSET.

Signed-off-by: Stefan Agner 
---

 lib/libfdt/fdt_overlay.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/libfdt/fdt_overlay.c b/lib/libfdt/fdt_overlay.c
index bb41404..4a9ba40 100644
--- a/lib/libfdt/fdt_overlay.c
+++ b/lib/libfdt/fdt_overlay.c
@@ -495,9 +495,9 @@ static int overlay_fixup_phandles(void *fdt, void *fdto)
if ((fixups_off < 0 && (fixups_off != -FDT_ERR_NOTFOUND)))
return fixups_off;
 
-   /* And base DTs without symbols */
+   /* But if we need to fixup phandles, symbols are required */
symbols_off = fdt_path_offset(fdt, "/__symbols__");
-   if ((symbols_off < 0 && (symbols_off != -FDT_ERR_NOTFOUND)))
+   if (symbols_off < 0)
return symbols_off;
 
fdt_for_each_property_offset(property, fdto, fixups_off) {
-- 
2.10.2

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[U-Boot] [PATCH] udoo_neo: Use 'fdtfile' variable name

[Fabio Estevam]

From: Fabio Estevam 

'fdtfile' is the preferred name for the variable that contains the
device tree blob according to the README file.

It also makes it consistent with other i.MX boards that use config_distro,
so change it accordingly.

Signed-off-by: Fabio Estevam 
---
 include/configs/udoo_neo.h | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h
index 81e0481..e5057be 100644
--- a/include/configs/udoo_neo.h
+++ b/include/configs/udoo_neo.h
@@ -36,7 +36,7 @@
"console=ttymxc0,115200\0" \
"fdt_high=0x\0" \
"initrd_high=0x\0" \
-   "fdt_file=undefined\0" \
+   "fdtfile=undefined\0" \
"fdt_addr=0x8300\0" \
"ip_dyn=yes\0" \
"mmcdev=0\0" \
@@ -44,14 +44,14 @@
"mmcautodetect=no\0" \
"findfdt="\
"if test $board_name = BASIC; then " \
-   "setenv fdt_file imx6sx-udoo-neo-basic.dtb; fi; " \
+   "setenv fdtfile imx6sx-udoo-neo-basic.dtb; fi; " \
"if test $board_name = BASICKS; then " \
-   "setenv fdt_file imx6sx-udoo-neo-basic.dtb; fi; " \
+   "setenv fdtfile imx6sx-udoo-neo-basic.dtb; fi; " \
"if test $board_name = FULL; then " \
-   "setenv fdt_file imx6sx-udoo-neo-full.dtb; fi; " \
+   "setenv fdtfile imx6sx-udoo-neo-full.dtb; fi; " \
"if test $board_name = EXTENDED; then " \
-   "setenv fdt_file imx6sx-udoo-neo-extended.dtb; fi; " \
-   "if test $fdt_file = UNDEFINED; then " \
+   "setenv fdtfile imx6sx-udoo-neo-extended.dtb; fi; " \
+   "if test $fdtfile = UNDEFINED; then " \
"echo WARNING: Could not determine dtb to use; fi; \0" \
"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
"pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
-- 
2.7.4

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[U-Boot] [PATCH] cmd/Kconfig: Fix typo in CMD_MEMORY help text

[Fabio Estevam]

From: Fabio Estevam 

Fix "Memory" and "initialize" typos in the CMD_MEMORY help text.

Signed-off-by: Fabio Estevam 
---
 cmd/Kconfig | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index bffa713..91bd3fb 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -309,7 +309,7 @@ config CMD_MEMORY
bool "md, mm, nm, mw, cp, cmp, base, loop"
default y
help
- Memeory commands.
+ Memory commands.
md - memory display
mm - memory modify (auto-incrementing address)
nm - memory modify (constant address)
@@ -317,7 +317,7 @@ config CMD_MEMORY
cp - memory copy
cmp - memory compare
base - print or set address offset
-   loop - initinite loop on address range
+   loop - initialize loop on address range
 
 config CMD_CRC32
bool "crc32"
-- 
2.7.4

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[U-Boot] [PATCH v3] Kconfig: Move USE_ARCH_MEMCPY/MEMSET to Kconfig

[Fabio Estevam]

From: Fabio Estevam 

Move USE_ARCH_MEMCPY/MEMSET options to Kconfig.

Make it "default y" for the ARMv7 architecture and make it
depend on !ARM64 && !SPL.

Signed-off-by: Fabio Estevam 
---
Changes since v2:
- Move it to arch/arm/Kconfig
- Change default and depends logic

 arch/arm/Kconfig   | 18 ++
 include/configs/armadillo-800eva.h |  2 --
 include/configs/blanche.h  |  3 ---
 include/configs/colibri_imx7.h |  2 --
 include/configs/colibri_vf.h   |  2 --
 include/configs/exynos-common.h|  3 ---
 include/configs/pcm052.h   |  1 -
 include/configs/tegra-common.h |  6 --
 include/configs/uniphier.h |  5 -
 include/configs/vf610twr.h |  1 -
 10 files changed, 18 insertions(+), 25 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 714dd8b..b15f13f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -126,6 +126,24 @@ config ENABLE_ARM_SOC_BOOT0_HOOK
  ARM_SOC_BOOT0_HOOK which contains the required assembler
  preprocessor code.
 
+config USE_ARCH_MEMCPY
+   bool "Use an assembly optimized implementation of memcpy"
+   default y if CPU_V7
+   depends on !ARM64 && !SPL
+   help
+ Enable the generation of an optimized version of memcpy.
+ Such implementation may be faster under some conditions
+ but may increase the binary size.
+
+config USE_ARCH_MEMSET
+   bool "Use an assembly optimized implementation of memset"
+   default y if CPU_V7
+   depends on !ARM64 && !SPL
+   help
+ Enable the generation of an optimized version of memset.
+ Such implementation may be faster under some conditions
+ but may increase the binary size.
+
 config ARCH_OMAP2
bool
select CPU_V7
diff --git a/include/configs/armadillo-800eva.h 
b/include/configs/armadillo-800eva.h
index 2d24253..3775a49 100644
--- a/include/configs/armadillo-800eva.h
+++ b/include/configs/armadillo-800eva.h
@@ -28,8 +28,6 @@
 
 #define CONFIG_ARCH_CPU_INIT
 #define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_USE_ARCH_MEMSET
-#define CONFIG_USE_ARCH_MEMCPY
 #define CONFIG_TMU_TIMER
 #define CONFIG_SYS_DCACHE_OFF
 
diff --git a/include/configs/blanche.h b/include/configs/blanche.h
index f094bbe..0deb350 100755
--- a/include/configs/blanche.h
+++ b/include/configs/blanche.h
@@ -16,9 +16,6 @@
 
 #include "rcar-gen2-common.h"
 
-#define CONFIG_USE_ARCH_MEMSET
-#define CONFIG_USE_ARCH_MEMCPY
-
 /* STACK */
 #define CONFIG_SYS_INIT_SP_ADDR0xE817FFFC
 #define STACK_AREA_SIZE0xC000
diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h
index 5ce0a34..bc3b53b 100644
--- a/include/configs/colibri_imx7.h
+++ b/include/configs/colibri_imx7.h
@@ -15,8 +15,6 @@
 #include "mx7_common.h"
 
 #define CONFIG_SYS_THUMB_BUILD
-#define CONFIG_USE_ARCH_MEMCPY
-#define CONFIG_USE_ARCH_MEMSET
 
 /*#define CONFIG_DBG_MONITOR*/
 #define PHYS_SDRAM_SIZESZ_512M
diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h
index d58145e..47dea62 100644
--- a/include/configs/colibri_vf.h
+++ b/include/configs/colibri_vf.h
@@ -16,8 +16,6 @@
 
 #define CONFIG_VF610
 #define CONFIG_SYS_THUMB_BUILD
-#define CONFIG_USE_ARCH_MEMCPY
-#define CONFIG_USE_ARCH_MEMSET
 #define CONFIG_SYS_FSL_CLK
 
 #define CONFIG_ARCH_MISC_INIT
diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h
index 3b61a41..566f246 100644
--- a/include/configs/exynos-common.h
+++ b/include/configs/exynos-common.h
@@ -20,9 +20,6 @@
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_BOARD_EARLY_INIT_F
 
-#define CONFIG_USE_ARCH_MEMCPY
-#define CONFIG_USE_ARCH_MEMSET
-
 /* Keep L2 Cache Disabled */
 
 /* input clock of PLL: 24MHz input clock */
diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h
index eb1944a..e70c3f0 100644
--- a/include/configs/pcm052.h
+++ b/include/configs/pcm052.h
@@ -35,7 +35,6 @@
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_USE_ARCH_MEMCPY
 #define CONFIG_SYS_MAX_NAND_DEVICE 1
 #define CONFIG_SYS_NAND_BASE   NFC_BASE_ADDR
 
diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h
index 63b711b..23a0e78 100644
--- a/include/configs/tegra-common.h
+++ b/include/configs/tegra-common.h
@@ -76,12 +76,6 @@
 #define CONFIG_SYS_MEMTEST_START   (NV_PA_SDRC_CS0 + 0x60)
 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10)
 
-#ifndef CONFIG_ARM64
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_USE_ARCH_MEMCPY
-#endif
-#endif
-
 /*---
  * Physical Memory Map
  */
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index f9c9f82..74f1373 100644
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -63,11 +63,6 @@
 /* serial console 

[U-Boot] [PATCH v2] fat: fatwrite: fix the command for FAT12

[Philipp Skadorov]

The u-boot command fatwrite empties FAT clusters from the beginning
till the end of the file.
Specifically for FAT12 it fails to detect the end of the file and goes
beyond the file bounds thus corrupting the file system.

Additionally, FAT entry chaining-up into a file is not implemented
for FAT12.

The users normally workaround this by re-formatting the partition as
FAT16/FAT32, like here:
https://github.com/FEDEVEL/openrex-uboot-v2015.10/issues/1

The patch fixes the bounds of a file and FAT12 entries chaining into
a file, including EOF markup.

Signed-off-by: Philipp Skadorov 
---
 fs/fat/fat_write.c | 61 +++---
 1 file changed, 53 insertions(+), 8 deletions(-)

diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c
index 40a3860..aab0b0e 100644
--- a/fs/fat/fat_write.c
+++ b/fs/fat/fat_write.c
@@ -467,11 +467,12 @@ get_long_file_name(fsdata *mydata, int curclust, __u8 
*cluster,
 }
 
 /*
- * Set the entry at index 'entry' in a FAT (16/32) table.
+ * Set the entry at index 'entry' in a FAT (12/16/32) table.
  */
 static int set_fatent_value(fsdata *mydata, __u32 entry, __u32 entry_value)
 {
-   __u32 bufnum, offset;
+   __u32 bufnum, offset, off16;
+   __u16 val1, val2;
 
switch (mydata->fatsize) {
case 32:
@@ -482,6 +483,10 @@ static int set_fatent_value(fsdata *mydata, __u32 entry, 
__u32 entry_value)
bufnum = entry / FAT16BUFSIZE;
offset = entry - bufnum * FAT16BUFSIZE;
break;
+   case 12:
+   bufnum = entry / FAT12BUFSIZE;
+   offset = entry - bufnum * FAT12BUFSIZE;
+   break;
default:
/* Unsupported FAT size */
return -1;
@@ -521,6 +526,45 @@ static int set_fatent_value(fsdata *mydata, __u32 entry, 
__u32 entry_value)
case 16:
((__u16 *) mydata->fatbuf)[offset] = cpu_to_le16(entry_value);
break;
+   case 12:
+   off16 = (offset * 3) / 4;
+
+   switch (offset & 0x3) {
+   case 0:
+   val1 = cpu_to_le16(entry_value) & 0xfff;
+   ((__u16 *)mydata->fatbuf)[off16] &= ~0xfff;
+   ((__u16 *)mydata->fatbuf)[off16] |= val1;
+   break;
+   case 1:
+   val1 = cpu_to_le16(entry_value) & 0xf;
+   val2 = (cpu_to_le16(entry_value) >> 4) & 0xff;
+
+   ((__u16 *)mydata->fatbuf)[off16] &= ~0xf000;
+   ((__u16 *)mydata->fatbuf)[off16] |= (val1 << 12);
+
+   ((__u16 *)mydata->fatbuf)[off16 + 1] &= ~0xff;
+   ((__u16 *)mydata->fatbuf)[off16 + 1] |= val2;
+   break;
+   case 2:
+   val1 = cpu_to_le16(entry_value) & 0xff;
+   val2 = (cpu_to_le16(entry_value) >> 8) & 0xf;
+
+   ((__u16 *)mydata->fatbuf)[off16] &= ~0xff00;
+   ((__u16 *)mydata->fatbuf)[off16] |= (val1 << 8);
+
+   ((__u16 *)mydata->fatbuf)[off16 + 1] &= ~0xf;
+   ((__u16 *)mydata->fatbuf)[off16 + 1] |= val2;
+   break;
+   case 3:
+   val1 = cpu_to_le16(entry_value) & 0xfff;
+   ((__u16 *)mydata->fatbuf)[off16] &= ~0xfff0;
+   ((__u16 *)mydata->fatbuf)[off16] |= (val1 << 4);
+   break;
+   default:
+   break;
+   }
+
+   break;
default:
return -1;
}
@@ -529,7 +573,7 @@ static int set_fatent_value(fsdata *mydata, __u32 entry, 
__u32 entry_value)
 }
 
 /*
- * Determine the next free cluster after 'entry' in a FAT (16/32) table
+ * Determine the next free cluster after 'entry' in a FAT (12/16/32) table
  * and link it to 'entry'. EOC marker is not set on returned entry.
  */
 static __u32 determine_fatent(fsdata *mydata, __u32 entry)
@@ -651,6 +695,8 @@ static void flush_dir_table(fsdata *mydata, dir_entry 
**dentptr)
set_fatent_value(mydata, dir_newclust, 0xff8);
else if (mydata->fatsize == 16)
set_fatent_value(mydata, dir_newclust, 0xfff8);
+   else if (mydata->fatsize == 12)
+   set_fatent_value(mydata, dir_newclust, 0xff8);
 
dir_curclust = dir_newclust;
 
@@ -670,16 +716,13 @@ static int clear_fatent(fsdata *mydata, __u32 entry)
 {
__u32 fat_val;
 
-   while (1) {
+   while (!CHECK_CLUST(entry, mydata->fatsize)) {
fat_val = get_fatent_value(mydata, entry);
if (fat_val != 0)
set_fatent_value(mydata, entry, 0);
else
break;
 
-   if (fat_val == 0xfff || fat_val == 0x)
-   

Re: [U-Boot] Build failure in spi repo

[Stephen Warren]

On 12/15/2016 10:48 AM, Jagan Teki wrote:

On Thu, Dec 15, 2016 at 6:24 PM, Stephen Warren  wrote:

Jagan, the latest content in u-boot-spi.git master branch fails to build for
sandbox with:


In file included from drivers/mtd/spi/spi_flash.c:12:0:
drivers/mtd/spi/spi_flash.c: In function ‘set_quad_mode’:
drivers/mtd/spi/spi_flash.c:906:49: error: ‘idcode0’ undeclared (first use
in this function)
   debug("SF: QEB is volatile for %02x flash\n", idcode0);
 ^
include/common.h:123:26: note: in definition of macro ‘debug_cond’
printf(pr_fmt(fmt), ##args); \
  ^
drivers/mtd/spi/spi_flash.c:906:3: note: in expansion of macro ‘debug’
   debug("SF: QEB is volatile for %02x flash\n", idcode0);
   ^
drivers/mtd/spi/spi_flash.c:906:49: note: each undeclared identifier is
reported only once for each function it appears in
   debug("SF: QEB is volatile for %02x flash\n", idcode0);
 ^
include/common.h:123:26: note: in definition of macro ‘debug_cond’
printf(pr_fmt(fmt), ##args); \
  ^
drivers/mtd/spi/spi_flash.c:906:3: note: in expansion of macro ‘debug’
   debug("SF: QEB is volatile for %02x flash\n", idcode0);
   ^
make[2]: *** [drivers/mtd/spi/spi_flash.o] Error 1
make[2]: *** Waiting for unfinished jobs



The build seems to work with the previous commit though.


Please try now.


Looks like it's back to normal now, thanks.

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[U-Boot] [PATCH v2 3/4] Kconfig: Move USE_ARCH_MEMCPY/MEMSET to Kconfig

[Fabio Estevam]

Move USE_ARCH_MEMCPY/MEMSET options to Kconfig.

Make it "default y" for the ARM architecture.

Unset these options for uniphier and tegra to preserve the original
behavior.

Signed-off-by: Fabio Estevam 
---
Changes since v1:
- Newly introduced

 Kconfig  | 16 
 configs/apalis_t30_defconfig |  2 ++
 configs/beaver_defconfig |  2 ++
 configs/cardhu_defconfig |  2 ++
 configs/cei-tk1-som_defconfig|  2 ++
 configs/colibri_t20_defconfig|  2 ++
 configs/colibri_t30_defconfig|  2 ++
 configs/dalmore_defconfig|  2 ++
 configs/e2220-1170_defconfig |  2 ++
 configs/harmony_defconfig|  2 ++
 configs/jetson-tk1_defconfig |  2 ++
 configs/medcom-wide_defconfig|  2 ++
 configs/nyan-big_defconfig   |  2 ++
 configs/p2371-_defconfig |  2 ++
 configs/p2371-2180_defconfig |  2 ++
 configs/p2571_defconfig  |  2 ++
 configs/p2771--000_defconfig |  2 ++
 configs/p2771--500_defconfig |  2 ++
 configs/paz00_defconfig  |  2 ++
 configs/plutux_defconfig |  2 ++
 configs/seaboard_defconfig   |  2 ++
 configs/tec-ng_defconfig |  2 ++
 configs/tec_defconfig|  2 ++
 configs/trimslice_defconfig  |  2 ++
 configs/uniphier_ld11_defconfig  |  2 ++
 configs/uniphier_ld20_defconfig  |  2 ++
 configs/uniphier_ld4_sld8_defconfig  |  2 ++
 configs/uniphier_pro4_defconfig  |  2 ++
 configs/uniphier_pxs2_ld6b_defconfig |  2 ++
 configs/uniphier_sld3_defconfig  |  2 ++
 configs/venice2_defconfig|  2 ++
 configs/ventana_defconfig|  2 ++
 configs/whistler_defconfig   |  2 ++
 include/configs/armadillo-800eva.h   |  2 --
 include/configs/blanche.h|  3 ---
 include/configs/colibri_imx7.h   |  2 --
 include/configs/colibri_vf.h |  2 --
 include/configs/exynos-common.h  |  3 ---
 include/configs/pcm052.h |  1 -
 include/configs/tegra-common.h   |  6 --
 include/configs/uniphier.h   |  5 -
 include/configs/vf610twr.h   |  1 -
 42 files changed, 80 insertions(+), 25 deletions(-)

diff --git a/Kconfig b/Kconfig
index a44ac91..f3ede0d 100644
--- a/Kconfig
+++ b/Kconfig
@@ -92,6 +92,22 @@ config SYS_MALLOC_F_LEN
  particular needs this to operate, so that it can allocate the
  initial serial device and any others that are needed.
 
+config USE_ARCH_MEMCPY
+   bool "Use an assembly optimized implementation of memcpy"
+   default y if ARM
+   help
+ Enable the generation of an optimized version of memcpy
+ if available. Such implementation may be faster under some
+ conditions but may increase the binary size.
+
+config USE_ARCH_MEMSET
+   bool "Use an assembly optimized implementation of memset"
+   default y if ARM
+   help
+ Enable the generation of an optimized version of memset
+ if available. Such implementation may be faster under some
+ conditions but may increase the binary size.
+
 menuconfig EXPERT
bool "Configure standard U-Boot features (expert users)"
default y
diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig
index 691148c..9acfb68 100644
--- a/configs/apalis_t30_defconfig
+++ b/configs/apalis_t30_defconfig
@@ -3,6 +3,8 @@ CONFIG_TEGRA=y
 CONFIG_TEGRA30=y
 CONFIG_TARGET_APALIS_T30=y
 CONFIG_DEFAULT_DEVICE_TREE="tegra30-apalis"
+# CONFIG_USE_ARCH_MEMCPY is not set
+# CONFIG_USE_ARCH_MEMSET is not set
 CONFIG_OF_SYSTEM_SETUP=y
 CONFIG_CONSOLE_MUX=y
 CONFIG_SYS_STDIO_DEREGISTER=y
diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig
index 5cb73c0..5bc988e 100644
--- a/configs/beaver_defconfig
+++ b/configs/beaver_defconfig
@@ -3,6 +3,8 @@ CONFIG_TEGRA=y
 CONFIG_TEGRA30=y
 CONFIG_TARGET_BEAVER=y
 CONFIG_DEFAULT_DEVICE_TREE="tegra30-beaver"
+# CONFIG_USE_ARCH_MEMCPY is not set
+# CONFIG_USE_ARCH_MEMSET is not set
 CONFIG_OF_SYSTEM_SETUP=y
 CONFIG_CONSOLE_MUX=y
 CONFIG_SYS_STDIO_DEREGISTER=y
diff --git a/configs/cardhu_defconfig b/configs/cardhu_defconfig
index 0214758..05f14ab 100644
--- a/configs/cardhu_defconfig
+++ b/configs/cardhu_defconfig
@@ -3,6 +3,8 @@ CONFIG_TEGRA=y
 CONFIG_TEGRA30=y
 CONFIG_TARGET_CARDHU=y
 CONFIG_DEFAULT_DEVICE_TREE="tegra30-cardhu"
+# CONFIG_USE_ARCH_MEMCPY is not set
+# CONFIG_USE_ARCH_MEMSET is not set
 CONFIG_OF_SYSTEM_SETUP=y
 CONFIG_CONSOLE_MUX=y
 CONFIG_SYS_STDIO_DEREGISTER=y
diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig
index 909b367..ddb640b 100644
--- a/configs/cei-tk1-som_defconfig
+++ b/configs/cei-tk1-som_defconfig
@@ -3,6 +3,8 @@ CONFIG_TEGRA=y
 CONFIG_TEGRA124=y
 CONFIG_TARGET_CEI_TK1_SOM=y
 CONFIG_DEFAULT_DEVICE_TREE="tegra124-cei-tk1-som"
+# CONFIG_USE_ARCH_MEMCPY is not set
+# CONFIG_USE_ARCH_MEMSET is not set
 

Re: [U-Boot] Pull request v2: u-boot-spi/master

[Jagan Teki]

On Thu, Dec 15, 2016 at 6:50 PM, Tom Rini  wrote:
> On Thu, Dec 15, 2016 at 05:05:05PM +0100, Jagan Teki wrote:
>
>> Hi Tom,
>>
>> Please pull this PR.
>>
>> Changes for v2:
>> - Skip "spi: Zap mpc52xx_spi.c and config" patch due to dependencies.
>>
>> thanks!
>> Jagan.
>>
>> The following changes since commit 53e8ca22538c2cec691fe74098684a359302688c:
>>
>>   MAINTAINERS: DFU: Change e-mail address for DFU maintainer (2016-12-12 
>> 13:03:15 -0500)
>>
>> are available in the git repository at:
>>
>>   git://git.denx.de/u-boot-spi.git master
>
> Sandbox fails to build, and I'm not sure what else yet.  Please put your
> PR through a round with travis-ci before submitting v3, thanks!  And for
> the record, it will build any branch so you can put things into WIP-...
> or TEST-... or whatever you wish.  I personally use WIP-... for my
> tests.

I don't think Sandbox will fail, since none of these related to this
anyway I will re-ran the build and send.

thanks!
-- 
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
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Re: [U-Boot] [PATCH v2 3/4] Kconfig: Move USE_ARCH_MEMCPY/MEMSET to Kconfig

[Tom Rini]

On Thu, Dec 15, 2016 at 04:00:12PM -0200, Fabio Estevam wrote:

> Move USE_ARCH_MEMCPY/MEMSET options to Kconfig.
> 
> Make it "default y" for the ARM architecture.
> 
> Unset these options for uniphier and tegra to preserve the original
> behavior.
> 
> Signed-off-by: Fabio Estevam 

So, thanks for starting on this.  But it needs to go into
arch/arm/Kconfig.  And I meant, it should be default y if CPU_V7, and
depend on !ARM64 (because we don't have asm versions of these functions,
we could borrow them from the kernel, and someone should I suspect).
The key here is that on some older ARM cores we will exceed the SPL size
limit with these functions enabled.  Make sense?  Thanks!

-- 
Tom


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[U-Boot] [PATCH v2 4/4] cmd: mem: Use memcpy for 'cp' command

[Fabio Estevam]

Simplify the 'cp' command implementation by using the memcpy() function,
which brings the additional benefit of performance gain for those who have
CONFIG_USE_ARCH_MEMCPY selected.

Tested on a mx6qsabreauto board where a 5x gain in performance is seen
when reading 10MB from the parallel NOR memory.

Signed-off-by: Fabio Estevam 
---
Changes since v1:
- Always use memcpy()

 cmd/mem.c | 28 ++--
 1 file changed, 2 insertions(+), 26 deletions(-)

diff --git a/cmd/mem.c b/cmd/mem.c
index a690957..ff6a770 100644
--- a/cmd/mem.c
+++ b/cmd/mem.c
@@ -372,10 +372,8 @@ static int do_mem_cmp(cmd_tbl_t *cmdtp, int flag, int 
argc, char * const argv[])
 
 static int do_mem_cp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-   ulong   addr, dest, count, bytes;
+   ulong   addr, dest, count;
int size;
-   const void *src;
-   void *buf;
 
if (argc != 4)
return CMD_RET_USAGE;
@@ -465,29 +463,7 @@ static int do_mem_cp(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
}
 #endif
 
-   bytes = size * count;
-   buf = map_sysmem(dest, bytes);
-   src = map_sysmem(addr, bytes);
-   while (count-- > 0) {
-   if (size == 4)
-   *((u32 *)buf) = *((u32  *)src);
-#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
-   else if (size == 8)
-   *((u64 *)buf) = *((u64 *)src);
-#endif
-   else if (size == 2)
-   *((u16 *)buf) = *((u16 *)src);
-   else
-   *((u8 *)buf) = *((u8 *)src);
-   src += size;
-   buf += size;
-
-   /* reset watchdog from time to time */
-   if ((count % (64 << 10)) == 0)
-   WATCHDOG_RESET();
-   }
-   unmap_sysmem(buf);
-   unmap_sysmem(src);
+   memcpy((void *)dest, (void *)addr, count * size);
 
return 0;
 }
-- 
2.7.4

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[U-Boot] [PATCH v2 2/4] mx6qsabreauto: Pass the correct parallel NOR width

[Fabio Estevam]

On mx6qsabreauto the parallel NOR width is 16 bits, so pass configure
CONFIG_SYS_FLASH_CFI_WIDTH correctly so that the CFI driver does not
use 8 bits by default.

Signed-off-by: Fabio Estevam 
---
Changes since v1:
- None

 include/configs/mx6qsabreauto.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h
index f849f34..7d68633 100644
--- a/include/configs/mx6qsabreauto.h
+++ b/include/configs/mx6qsabreauto.h
@@ -38,6 +38,7 @@
 #define CONFIG_FLASH_CFI_DRIVER /* Use drivers/cfi_flash.c */
 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* Use buffered writes*/
 #define CONFIG_SYS_FLASH_EMPTY_INFO
+#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
 
 #define CONFIG_SYS_FSL_USDHC_NUM   2
 #if defined(CONFIG_ENV_IS_IN_MMC)
-- 
2.7.4

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[U-Boot] [PATCH v2 1/4] mx6qsabreauto: Configure the WEIM controller like the kernel

[Fabio Estevam]

Do the same WEIM initialization as done in the Linux kernel
according to arch/arm/boot/dts/imx6qdl-sabreauto.dtsi from kernel 4.9.

Signed-off-by: Fabio Estevam 
---
Changes since v1:
- None

 board/freescale/mx6qsabreauto/mx6qsabreauto.c | 16 
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c 
b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
index 5fca4d1..13a9b5a 100644
--- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
+++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
@@ -221,12 +221,20 @@ static void eimnor_cs_setup(void)
 {
struct weim *weim_regs = (struct weim *)WEIM_BASE_ADDR;
 
-   writel(0x00020181, _regs->cs0gcr1);
+   /*
+* Configure weim like the linux kernel.
+* From arch/arm/boot/dts/imx6qdl-sabreauto.dtsi:
+*
+* fsl,weim-cs-timing = <0x00620081 0x0001 0x1c022000
+*   0xc000 0x1404a38e 0x>;
+*/
+
+   writel(0x00620081, _regs->cs0gcr1);
writel(0x0001, _regs->cs0gcr2);
-   writel(0x0a02, _regs->cs0rcr1);
+   writel(0x1c022000, _regs->cs0rcr1);
writel(0xc000, _regs->cs0rcr2);
-   writel(0x0804a240, _regs->cs0wcr1);
-   writel(0x0120, _regs->wcr);
+   writel(0x1404a38e, _regs->cs0wcr1);
+   writel(0x, _regs->wcr);
 
set_chipselect_size(CS0_128);
 }
-- 
2.7.4

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Re: [U-Boot] Pull request v2: u-boot-spi/master

[Tom Rini]

On Thu, Dec 15, 2016 at 05:05:05PM +0100, Jagan Teki wrote:

> Hi Tom,
> 
> Please pull this PR.
> 
> Changes for v2:
> - Skip "spi: Zap mpc52xx_spi.c and config" patch due to dependencies.
> 
> thanks!
> Jagan.
> 
> The following changes since commit 53e8ca22538c2cec691fe74098684a359302688c:
> 
>   MAINTAINERS: DFU: Change e-mail address for DFU maintainer (2016-12-12 
> 13:03:15 -0500)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-spi.git master

Sandbox fails to build, and I'm not sure what else yet.  Please put your
PR through a round with travis-ci before submitting v3, thanks!  And for
the record, it will build any branch so you can put things into WIP-...
or TEST-... or whatever you wish.  I personally use WIP-... for my
tests.

-- 
Tom


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Re: [U-Boot] Build failure in spi repo

[Jagan Teki]

On Thu, Dec 15, 2016 at 6:24 PM, Stephen Warren  wrote:
> Jagan, the latest content in u-boot-spi.git master branch fails to build for
> sandbox with:
>
>> In file included from drivers/mtd/spi/spi_flash.c:12:0:
>> drivers/mtd/spi/spi_flash.c: In function ‘set_quad_mode’:
>> drivers/mtd/spi/spi_flash.c:906:49: error: ‘idcode0’ undeclared (first use
>> in this function)
>>debug("SF: QEB is volatile for %02x flash\n", idcode0);
>>  ^
>> include/common.h:123:26: note: in definition of macro ‘debug_cond’
>> printf(pr_fmt(fmt), ##args); \
>>   ^
>> drivers/mtd/spi/spi_flash.c:906:3: note: in expansion of macro ‘debug’
>>debug("SF: QEB is volatile for %02x flash\n", idcode0);
>>^
>> drivers/mtd/spi/spi_flash.c:906:49: note: each undeclared identifier is
>> reported only once for each function it appears in
>>debug("SF: QEB is volatile for %02x flash\n", idcode0);
>>  ^
>> include/common.h:123:26: note: in definition of macro ‘debug_cond’
>> printf(pr_fmt(fmt), ##args); \
>>   ^
>> drivers/mtd/spi/spi_flash.c:906:3: note: in expansion of macro ‘debug’
>>debug("SF: QEB is volatile for %02x flash\n", idcode0);
>>^
>> make[2]: *** [drivers/mtd/spi/spi_flash.o] Error 1
>> make[2]: *** Waiting for unfinished jobs
>
>
> The build seems to work with the previous commit though.

Please try now.

thanks!
-- 
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
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[U-Boot] [PATCH v2] Revert "sf: Fix quad bit set for micron devices"

[Jagan Teki]

From: Cyrille Pitchen 

This reverts commit c56ae7519f141523ba1248b22b5b5169b21772fe.

Once the 'Quad Enable' bit is cleared in their Enhanced Volatile
Configuration Register (EVCR), Micron memories expect ALL commands to use
the SPI 4-4-4 protocol. Commands using SPI 1-y-z protocols are no longer
accepted.

Within the reverted commit, the write_evcr() function is implemented using
the spi_flash_write_common(), which is a shortcut for the
[ spi_flash_cmd_write_enable(), spi_flash_cmd_write(),
spi_flash_cmd_wait_ready() ] sequence.

Since the internal state of the Micron memory has been changed when the
spi_flash_cmd_write() function completes, the later call of the
spi_flash_cmd_wait_ready() function fails.

Indeed the SPI controller driver is not aware of the SPI protocol switch.

Further patches will fix the support of Micron QSPI memories.

Signed-off-by: Cyrille Pitchen 
[Rebase on master, use JEDEC_MFR(info) in place of idcode0]
Signed-off-by: Jagan Teki 
---
Changes for v2:
- Rebase and JEDEC_MFR(info) in place of idcode0

 drivers/mtd/spi/sf_internal.h |  3 ---
 drivers/mtd/spi/spi_flash.c   | 62 ++-
 2 files changed, 2 insertions(+), 63 deletions(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 2463686..839cdbe 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -49,7 +49,6 @@ enum spi_nor_option_flags {
 #define CMD_WRITE_DISABLE  0x04
 #define CMD_WRITE_ENABLE   0x06
 #define CMD_QUAD_PAGE_PROGRAM  0x32
-#define CMD_WRITE_EVCR 0x61
 
 /* Read commands */
 #define CMD_READ_ARRAY_SLOW0x03
@@ -63,7 +62,6 @@ enum spi_nor_option_flags {
 #define CMD_READ_STATUS1   0x35
 #define CMD_READ_CONFIG0x35
 #define CMD_FLAG_STATUS0x70
-#define CMD_READ_EVCR  0x65
 
 /* Bank addr access commands */
 #ifdef CONFIG_SPI_FLASH_BAR
@@ -78,7 +76,6 @@ enum spi_nor_option_flags {
 #define STATUS_QEB_WINSPAN BIT(1)
 #define STATUS_QEB_MXICBIT(6)
 #define STATUS_PEC BIT(7)
-#define STATUS_QEB_MICRON  BIT(7)
 #define SR_BP0 BIT(2)  /* Block protect 0 */
 #define SR_BP1 BIT(3)  /* Block protect 1 */
 #define SR_BP2 BIT(4)  /* Block protect 2 */
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index b902540..2e378dc 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -112,37 +112,6 @@ static int write_cr(struct spi_flash *flash, u8 wc)
 }
 #endif
 
-#ifdef CONFIG_SPI_FLASH_STMICRO
-static int read_evcr(struct spi_flash *flash, u8 *evcr)
-{
-   int ret;
-   const u8 cmd = CMD_READ_EVCR;
-
-   ret = spi_flash_read_common(flash, , 1, evcr, 1);
-   if (ret < 0) {
-   debug("SF: error reading EVCR\n");
-   return ret;
-   }
-
-   return 0;
-}
-
-static int write_evcr(struct spi_flash *flash, u8 evcr)
-{
-   u8 cmd;
-   int ret;
-
-   cmd = CMD_WRITE_EVCR;
-   ret = spi_flash_write_common(flash, , 1, , 1);
-   if (ret < 0) {
-   debug("SF: error while writing EVCR register\n");
-   return ret;
-   }
-
-   return 0;
-}
-#endif
-
 #ifdef CONFIG_SPI_FLASH_BAR
 static int write_bar(struct spi_flash *flash, u32 offset)
 {
@@ -894,34 +863,6 @@ static int spansion_quad_enable(struct spi_flash *flash)
 }
 #endif
 
-#ifdef CONFIG_SPI_FLASH_STMICRO
-static int micron_quad_enable(struct spi_flash *flash)
-{
-   u8 qeb_status;
-   int ret;
-
-   ret = read_evcr(flash, _status);
-   if (ret < 0)
-   return ret;
-
-   if (!(qeb_status & STATUS_QEB_MICRON))
-   return 0;
-
-   ret = write_evcr(flash, qeb_status & ~STATUS_QEB_MICRON);
-   if (ret < 0)
-   return ret;
-
-   /* read EVCR and check it */
-   ret = read_evcr(flash, _status);
-   if (!(ret >= 0 && !(qeb_status & STATUS_QEB_MICRON))) {
-   printf("SF: Micron EVCR Quad bit not clear\n");
-   return -EINVAL;
-   }
-
-   return ret;
-}
-#endif
-
 static const struct spi_flash_info *spi_flash_read_id(struct spi_flash *flash)
 {
int tmp;
@@ -962,7 +903,8 @@ static int set_quad_mode(struct spi_flash *flash,
 #endif
 #ifdef CONFIG_SPI_FLASH_STMICRO
case SPI_FLASH_CFI_MFR_STMICRO:
-   return micron_quad_enable(flash);
+   debug("SF: QEB is volatile for %02x flash\n", JEDEC_MFR(info));
+   return 0;
 #endif
default:
printf("SF: Need set QEB func for %02x flash\n",
-- 
1.9.1

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Re: [U-Boot] [PATCH] zynq: spi: Honour the activation / deactivation delay

[Michal Simek]

On 15.12.2016 17:57, Moritz Fischer wrote:
> Michal,
> 
> On Wed, Dec 14, 2016 at 11:23 PM, Michal Simek  
> wrote:
>> On 14.12.2016 20:13, Moritz Fischer wrote:
>>> Whoops,
>>>
>>> On Thu, Dec 8, 2016 at 12:11 PM, Moritz Fischer
>>>  wrote:
 This is not currently implemented. Add support for this so that the
 Chrome OS EC can be used reliably.

 Signed-off-by: Moritz Fischer 
 Cc: Jagan Teki 
 Cc: Simon Glass 
 Cc: u-boot@lists.denx.de
>>> Cc: Michal Simek 
>>
>> Jagan is the guy who should apply this.
> 
> Ok. Can you re-delegate in patchwork? Not entirely sure how workflow
> in u-boot is :)

It is up to every custodian. I personally don't use it.
I have delegated it to Jagan.

> 
>> Anyway are you running chrome OS on Zynq or ZynqMP?
> 
> The EC (Embedded Controller) is a MCU running firmware hooked up over SPI.
> I do have a board with a Zynq and a Chromium EC and it only works with
> this patch.

Any link to this module? It sounds like a fun.

Thanks,
Michal

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Re: [U-Boot] [PATCH 1/2] armv8: Enable CPUECTLR.SMPEN for coherency

[Tom Rini]

On Thu, Dec 15, 2016 at 05:22:38PM +, york sun wrote:
> On 12/15/2016 09:17 AM, Tom Rini wrote:
> > On Thu, Dec 15, 2016 at 04:55:44PM +, york sun wrote:
> >>
> >> Would it be a good idea to detect the core and apply this setting at run
> >> time, instead of using Kconfig option? Check the macro
> >> branch_if_a53_core, branch_if_a57_core for example.
> >>
> >
> > I think we need to look back at the discussion from the last time we
> > made a change around here, and make sure to fully understand what
> > platforms do and do not need / want to touch that.  See
> > d73718f3236c520a92efa401084c658e6cc067f3 and then
> > 3a592a1349ac3961b0f4f2db0a8d9f128225d897.
> >
> 
> Tom,
> 
> Thanks for the reminder. Yes we need to understand which platform really 
> needs this change. The author suggested using Kconfig option. It can 
> surely avoid applying this change blindly.

Yes.  I think this series as-is will be safe in that it's only being
enabled on NXP platforms that have (I will assume) all been tested with
the change.  But even for this series I want to make sure it's clear
when/why it would be needed and the Kconfig help should reflect that
information.  Thanks!

-- 
Tom


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[U-Boot] Build failure in spi repo

[Stephen Warren]

Jagan, the latest content in u-boot-spi.git master branch fails to build 
for sandbox with:



In file included from drivers/mtd/spi/spi_flash.c:12:0:
drivers/mtd/spi/spi_flash.c: In function ‘set_quad_mode’:
drivers/mtd/spi/spi_flash.c:906:49: error: ‘idcode0’ undeclared (first use in 
this function)
   debug("SF: QEB is volatile for %02x flash\n", idcode0);
 ^
include/common.h:123:26: note: in definition of macro ‘debug_cond’
printf(pr_fmt(fmt), ##args); \
  ^
drivers/mtd/spi/spi_flash.c:906:3: note: in expansion of macro ‘debug’
   debug("SF: QEB is volatile for %02x flash\n", idcode0);
   ^
drivers/mtd/spi/spi_flash.c:906:49: note: each undeclared identifier is 
reported only once for each function it appears in
   debug("SF: QEB is volatile for %02x flash\n", idcode0);
 ^
include/common.h:123:26: note: in definition of macro ‘debug_cond’
printf(pr_fmt(fmt), ##args); \
  ^
drivers/mtd/spi/spi_flash.c:906:3: note: in expansion of macro ‘debug’
   debug("SF: QEB is volatile for %02x flash\n", idcode0);
   ^
make[2]: *** [drivers/mtd/spi/spi_flash.o] Error 1
make[2]: *** Waiting for unfinished jobs


The build seems to work with the previous commit though.
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Re: [U-Boot] [PATCH 1/2] armv8: Enable CPUECTLR.SMPEN for coherency

[york sun]

On 12/15/2016 09:17 AM, Tom Rini wrote:
> On Thu, Dec 15, 2016 at 04:55:44PM +, york sun wrote:
>>
>> Would it be a good idea to detect the core and apply this setting at run
>> time, instead of using Kconfig option? Check the macro
>> branch_if_a53_core, branch_if_a57_core for example.
>>
>
> I think we need to look back at the discussion from the last time we
> made a change around here, and make sure to fully understand what
> platforms do and do not need / want to touch that.  See
> d73718f3236c520a92efa401084c658e6cc067f3 and then
> 3a592a1349ac3961b0f4f2db0a8d9f128225d897.
>

Tom,

Thanks for the reminder. Yes we need to understand which platform really 
needs this change. The author suggested using Kconfig option. It can 
surely avoid applying this change blindly.

York
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Re: [U-Boot] [PATCH 1/2] armv8: Enable CPUECTLR.SMPEN for coherency

[Tom Rini]

On Thu, Dec 15, 2016 at 04:55:44PM +, york sun wrote:
> On 12/14/2016 10:22 PM, Zhiqiang Hou wrote:
> > From: Mingkai Hu 
> >
> > For A53, data coherency is enabled only when the CPUECTLR.SMPEN bit is
> > set. The SMPEN bit should be set before enabling the data cache.
> > If not enabled, the cache is not coherent with other cores and
> > data corruption could occur.
> >
> > For A57/A72, SMPEN bit enables the processor to receive instruction
> > cache and TLB maintenance operations broadcast from other processors
> > in the cluster. This bit should be set before enabling the caches and
> > MMU, or performing any cache and TLB maintenance operations.
> >
> > Signed-off-by: Mingkai Hu 
> > Signed-off-by: Gong Qianyu 
> > Signed-off-by: Mateusz Kulikowski 
> > Signed-off-by: Hou Zhiqiang 
> > ---
> >  arch/arm/cpu/armv8/Kconfig | 12 
> >  arch/arm/cpu/armv8/start.S | 11 +++
> >  2 files changed, 23 insertions(+)
> >
> > diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig
> > index 965a8d1..ce749f2 100644
> > --- a/arch/arm/cpu/armv8/Kconfig
> > +++ b/arch/arm/cpu/armv8/Kconfig
> > @@ -3,6 +3,18 @@ if ARM64
> >  config ARMV8_MULTIENTRY
> >  bool "Enable multiple CPUs to enter into U-Boot"
> >
> > +config ARMV8_SET_SMPEN
> > +bool "Enable data coherency with other cores in cluster"
> > +help
> > +  Cortex A53/57/72 cores require CPUECTLR_EL1.SMPEN set even
> > +  for single core systems. Unfortunately write access to this
> > +  register may be controlled by EL3/EL2 firmware. To be more
> > +  precise, by default (if there is EL2/EL3 firmware running)
> > +  this register is RO for NS EL1.
> > +  This switch can be used to avoid writing to CPUECTLR_EL1,
> > +  it can be safely enabled when El2/EL3 initialized SMPEN bit
> > +  or when CPU implementation doesn't include that register.
> > +
> >  config ARMV8_SPIN_TABLE
> > bool "Support spin-table enable method"
> > depends on ARMV8_MULTIENTRY && OF_LIBFDT
> > diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
> > index 4f5f6d8..5308702 100644
> > --- a/arch/arm/cpu/armv8/start.S
> > +++ b/arch/arm/cpu/armv8/start.S
> > @@ -86,6 +86,17 @@ save_boot_params_ret:
> > msr cpacr_el1, x0   /* Enable FP/SIMD */
> >  0:
> >
> > +   /*
> > +* Enalbe SMPEN bit for coherency.
> > +* This register is not architectural but at the moment
> > +* this bit should be set for A53/A57/A72.
> > +*/
> > +#ifdef CONFIG_ARMV8_SET_SMPEN
> > +   mrs x0, S3_1_c15_c2_1   /* cpuactlr_el1 */
> > +   orr x0, x0, #0x40
> > +   msr S3_1_c15_c2_1, x0
> > +#endif
> > +
> > /* Apply ARM core specific erratas */
> > bl  apply_core_errata
> >
> 
> Would it be a good idea to detect the core and apply this setting at run 
> time, instead of using Kconfig option? Check the macro 
> branch_if_a53_core, branch_if_a57_core for example.
> 

I think we need to look back at the discussion from the last time we
made a change around here, and make sure to fully understand what
platforms do and do not need / want to touch that.  See
d73718f3236c520a92efa401084c658e6cc067f3 and then
3a592a1349ac3961b0f4f2db0a8d9f128225d897.

-- 
Tom


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Re: [U-Boot] [PATCH] zynq: spi: Honour the activation / deactivation delay

[Moritz Fischer]

Michal,

On Wed, Dec 14, 2016 at 11:23 PM, Michal Simek  wrote:
> On 14.12.2016 20:13, Moritz Fischer wrote:
>> Whoops,
>>
>> On Thu, Dec 8, 2016 at 12:11 PM, Moritz Fischer
>>  wrote:
>>> This is not currently implemented. Add support for this so that the
>>> Chrome OS EC can be used reliably.
>>>
>>> Signed-off-by: Moritz Fischer 
>>> Cc: Jagan Teki 
>>> Cc: Simon Glass 
>>> Cc: u-boot@lists.denx.de
>> Cc: Michal Simek 
>
> Jagan is the guy who should apply this.

Ok. Can you re-delegate in patchwork? Not entirely sure how workflow
in u-boot is :)

> Anyway are you running chrome OS on Zynq or ZynqMP?

The EC (Embedded Controller) is a MCU running firmware hooked up over SPI.
I do have a board with a Zynq and a Chromium EC and it only works with
this patch.

Thanks,

Moritz
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[U-Boot] [PATCH 3/3] mx6: Select CONFIG_USE_ARCH_MEMCPY

[Fabio Estevam]

The CONFIG_USE_ARCH_MEMCPY option builds an assembly optimized version
of memcpy, so select it to gain performance.

Signed-off-by: Fabio Estevam 
---
 include/configs/mx6_common.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
index d28654b..d54578a 100644
--- a/include/configs/mx6_common.h
+++ b/include/configs/mx6_common.h
@@ -18,6 +18,8 @@
 #define CONFIG_SYS_PL310_BASE  L2_PL310_BASE
 #endif
 
+#define CONFIG_USE_ARCH_MEMCPY
+
 #define CONFIG_MP
 #endif
 #define CONFIG_BOARD_POSTCLK_INIT
-- 
2.7.4

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[U-Boot] [PATCH 1/3] mx6qsabreauto: Configure the WEIM controller like the kernel

[Fabio Estevam]

Do the same WEIM initialization as done in the Linux kernel
according to arch/arm/boot/dts/imx6qdl-sabreauto.dtsi from kernel 4.9.

Signed-off-by: Fabio Estevam 
---
 board/freescale/mx6qsabreauto/mx6qsabreauto.c | 16 
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c 
b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
index 5fca4d1..13a9b5a 100644
--- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
+++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
@@ -221,12 +221,20 @@ static void eimnor_cs_setup(void)
 {
struct weim *weim_regs = (struct weim *)WEIM_BASE_ADDR;
 
-   writel(0x00020181, _regs->cs0gcr1);
+   /*
+* Configure weim like the linux kernel.
+* From arch/arm/boot/dts/imx6qdl-sabreauto.dtsi:
+*
+* fsl,weim-cs-timing = <0x00620081 0x0001 0x1c022000
+*   0xc000 0x1404a38e 0x>;
+*/
+
+   writel(0x00620081, _regs->cs0gcr1);
writel(0x0001, _regs->cs0gcr2);
-   writel(0x0a02, _regs->cs0rcr1);
+   writel(0x1c022000, _regs->cs0rcr1);
writel(0xc000, _regs->cs0rcr2);
-   writel(0x0804a240, _regs->cs0wcr1);
-   writel(0x0120, _regs->wcr);
+   writel(0x1404a38e, _regs->cs0wcr1);
+   writel(0x, _regs->wcr);
 
set_chipselect_size(CS0_128);
 }
-- 
2.7.4

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Re: [U-Boot] Problem with qspi when using micron devices

[Jagan Teki]

On Thu, Dec 15, 2016 at 11:45 AM, Phil Edworthy
 wrote:
> Hi Jagan,
>
> On 07 December 2016 08:03, Phil Edworthy wrote:
>> Hi Jagan,
>>
>> When using Micron devices, SPI flash with quad mode does not work since
>> commit
>> c56ae7519f141523ba1248b22b5b5169b21772fe "sf: Fix quad bit set for micron
>> devices".
>>
>> This has been pointed out before, details about why the patch does work are
>> here:
>> http://lists.denx.de/pipermail/u-boot/2016-March/248566.html
>>
>> I know you are working on spi-nor, but it really would be good to revert the
>> patch.
>
> Is there any reason why you cannot revert 
> c56ae7519f141523ba1248b22b5b5169b21772fe?
> From what I see, this patch has caused a few problems already:
> http://lists.denx.de/pipermail/u-boot/2016-March/248566.html
> http://lists.denx.de/pipermail/u-boot/2016-July/261005.html
> http://lists.denx.de/pipermail/u-boot/2016-November/271634.html

Applied to u-boot-spi/master

thanks!
-- 
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
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Re: [U-Boot] [PATCH 1/2] armv8: Enable CPUECTLR.SMPEN for coherency

[york sun]

On 12/14/2016 10:22 PM, Zhiqiang Hou wrote:
> From: Mingkai Hu 
>
> For A53, data coherency is enabled only when the CPUECTLR.SMPEN bit is
> set. The SMPEN bit should be set before enabling the data cache.
> If not enabled, the cache is not coherent with other cores and
> data corruption could occur.
>
> For A57/A72, SMPEN bit enables the processor to receive instruction
> cache and TLB maintenance operations broadcast from other processors
> in the cluster. This bit should be set before enabling the caches and
> MMU, or performing any cache and TLB maintenance operations.
>
> Signed-off-by: Mingkai Hu 
> Signed-off-by: Gong Qianyu 
> Signed-off-by: Mateusz Kulikowski 
> Signed-off-by: Hou Zhiqiang 
> ---
>  arch/arm/cpu/armv8/Kconfig | 12 
>  arch/arm/cpu/armv8/start.S | 11 +++
>  2 files changed, 23 insertions(+)
>
> diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig
> index 965a8d1..ce749f2 100644
> --- a/arch/arm/cpu/armv8/Kconfig
> +++ b/arch/arm/cpu/armv8/Kconfig
> @@ -3,6 +3,18 @@ if ARM64
>  config ARMV8_MULTIENTRY
>  bool "Enable multiple CPUs to enter into U-Boot"
>
> +config ARMV8_SET_SMPEN
> +bool "Enable data coherency with other cores in cluster"
> +help
> +  Cortex A53/57/72 cores require CPUECTLR_EL1.SMPEN set even
> +  for single core systems. Unfortunately write access to this
> +  register may be controlled by EL3/EL2 firmware. To be more
> +  precise, by default (if there is EL2/EL3 firmware running)
> +  this register is RO for NS EL1.
> +  This switch can be used to avoid writing to CPUECTLR_EL1,
> +  it can be safely enabled when El2/EL3 initialized SMPEN bit
> +  or when CPU implementation doesn't include that register.
> +
>  config ARMV8_SPIN_TABLE
>   bool "Support spin-table enable method"
>   depends on ARMV8_MULTIENTRY && OF_LIBFDT
> diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
> index 4f5f6d8..5308702 100644
> --- a/arch/arm/cpu/armv8/start.S
> +++ b/arch/arm/cpu/armv8/start.S
> @@ -86,6 +86,17 @@ save_boot_params_ret:
>   msr cpacr_el1, x0   /* Enable FP/SIMD */
>  0:
>
> + /*
> +  * Enalbe SMPEN bit for coherency.
> +  * This register is not architectural but at the moment
> +  * this bit should be set for A53/A57/A72.
> +  */
> +#ifdef CONFIG_ARMV8_SET_SMPEN
> + mrs x0, S3_1_c15_c2_1   /* cpuactlr_el1 */
> + orr x0, x0, #0x40
> + msr S3_1_c15_c2_1, x0
> +#endif
> +
>   /* Apply ARM core specific erratas */
>   bl  apply_core_errata
>

Would it be a good idea to detect the core and apply this setting at run 
time, instead of using Kconfig option? Check the macro 
branch_if_a53_core, branch_if_a57_core for example.

York
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Re: [U-Boot] Environment storage format stability

[Kristian Amlie]

On 15/12/16 17:21, Wolfgang Denk wrote:
> Dear Kristian,
> 
> In message <7f7560f1-5b05-1f0c-8bf0-fd0458f9d...@mender.io> you wrote:
>> I have a question about the format of the environment when stored on
>> persistent storage: Is this format considered stable?
> 
> Yes, it is.  It has never been changed since it has been invented in
> the first days of this project, when it was still sailing under the
> name PPCboot, and there are no plans or discussions to change it,
> either.
> 
>> The reason I'm asking is whether it is a reasonable assumption that
>> upgraded user space tools (fw_setenv and fw_printenv) will agree on the
>> format with an older boot loader. The user space tools may be upgraded
>> as part of a rootfs update, but the boot loader typically will not.
> 
> As of now, you can still read the environment of a 16 year old PPCBoot
> :-)

Perfect, thanks! :-)

-- 
Kristian
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[U-Boot] [PATCH] spi: Zap mpc52xx_spi.c, config and related code

[Jagan Teki]

armada100_spi.c, related config options and related codes
are zapping becuase of "no DM conversion".

Cc: Werner Pfister 
Signed-off-by: Jagan Teki 
Reviewed-by: Tom Rini 
---
Changes for v2:
- Remove cmd_mtc and related code. 

 board/intercontrol/digsy_mtc/Makefile|   2 +-
 board/intercontrol/digsy_mtc/cmd_mtc.c   | 369 ---
 board/intercontrol/digsy_mtc/cmd_mtc.h   |  45 
 board/intercontrol/digsy_mtc/digsy_mtc.c |   9 -
 configs/digsy_mtc_RAMBOOT_defconfig  |   1 -
 configs/digsy_mtc_defconfig  |   1 -
 configs/digsy_mtc_rev5_RAMBOOT_defconfig |   1 -
 configs/digsy_mtc_rev5_defconfig |   1 -
 drivers/spi/Makefile |   1 -
 drivers/spi/mpc52xx_spi.c|  90 
 include/configs/digsy_mtc.h  |   6 -
 scripts/config_whitelist.txt |   1 -
 12 files changed, 1 insertion(+), 526 deletions(-)
 delete mode 100644 board/intercontrol/digsy_mtc/cmd_mtc.c
 delete mode 100644 board/intercontrol/digsy_mtc/cmd_mtc.h
 delete mode 100644 drivers/spi/mpc52xx_spi.c

diff --git a/board/intercontrol/digsy_mtc/Makefile 
b/board/intercontrol/digsy_mtc/Makefile
index fd0c2f9..4d13ead 100644
--- a/board/intercontrol/digsy_mtc/Makefile
+++ b/board/intercontrol/digsy_mtc/Makefile
@@ -4,5 +4,5 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
-obj-y  := digsy_mtc.o cmd_mtc.o
+obj-y  := digsy_mtc.o
 obj-$(CONFIG_VIDEO) += cmd_disp.o
diff --git a/board/intercontrol/digsy_mtc/cmd_mtc.c 
b/board/intercontrol/digsy_mtc/cmd_mtc.c
deleted file mode 100644
index f17ec55..000
--- a/board/intercontrol/digsy_mtc/cmd_mtc.c
+++ /dev/null
@@ -1,369 +0,0 @@
-/*
- * (C) Copyright 2009
- * Werner Pfister 
- *
- * (C) Copyright 2009 Semihalf, Grzegorz Bernacki
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include 
-#include 
-#include 
-#include "spi.h"
-#include "cmd_mtc.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static uchar user_out;
-
-static const char *led_names[] = {
-   "diag",
-   "can1",
-   "can2",
-   "can3",
-   "can4",
-   "usbpwr",
-   "usbbusy",
-   "user1",
-   "user2",
-   ""
-};
-
-static int msp430_xfer(const void *dout, void *din)
-{
-   int err;
-
-   err = spi_xfer(NULL, MTC_TRANSFER_SIZE, dout, din,
-  SPI_XFER_BEGIN | SPI_XFER_END);
-
-   /* The MSP chip needs time to ready itself for the next command */
-   udelay(1000);
-
-   return err;
-}
-
-static void mtc_calculate_checksum(tx_msp_cmd *packet)
-{
-   int i;
-   uchar *buff;
-
-   buff = (uchar *) packet;
-
-   for (i = 0; i < 6; i++)
-   packet->cks += buff[i];
-}
-
-static int do_mtc_led(cmd_tbl_t *cmdtp, int flag, int argc, char * const 
argv[])
-{
-   tx_msp_cmd pcmd;
-   rx_msp_cmd prx;
-   int err;
-   int i;
-
-   if (argc < 2)
-   return cmd_usage(cmdtp);
-
-   memset(, 0, sizeof(pcmd));
-   memset(, 0, sizeof(prx));
-
-   pcmd.cmd = CMD_SET_LED;
-
-   pcmd.cmd_val0 = 0xff;
-   for (i = 0; strlen(led_names[i]) != 0; i++) {
-   if (strncmp(argv[1], led_names[i], strlen(led_names[i])) == 0) {
-   pcmd.cmd_val0 = i;
-   break;
-   }
-   }
-
-   if (pcmd.cmd_val0 == 0xff) {
-   printf("Usage:\n%s\n", cmdtp->help);
-   return -1;
-   }
-
-   if (argc >= 3) {
-   if (strncmp(argv[2], "red", 3) == 0)
-   pcmd.cmd_val1 = 1;
-   else if (strncmp(argv[2], "green", 5) == 0)
-   pcmd.cmd_val1 = 2;
-   else if (strncmp(argv[2], "orange", 6) == 0)
-   pcmd.cmd_val1 = 3;
-   else
-   pcmd.cmd_val1 = 0;
-   }
-
-   if (argc >= 4)
-   pcmd.cmd_val2 = simple_strtol(argv[3], NULL, 10);
-   else
-   pcmd.cmd_val2 = 0;
-
-   pcmd.user_out = user_out;
-
-   mtc_calculate_checksum();
-   err = msp430_xfer(, );
-
-   return err;
-}
-
-static int do_mtc_key(cmd_tbl_t *cmdtp, int flag, int argc, char * const 
argv[])
-{
-   tx_msp_cmd pcmd;
-   rx_msp_cmd prx;
-   int err;
-
-   memset(, 0, sizeof(pcmd));
-   memset(, 0, sizeof(prx));
-
-   pcmd.cmd = CMD_GET_VIM;
-   pcmd.user_out = user_out;
-
-   mtc_calculate_checksum();
-   err = msp430_xfer(, );
-
-   if (!err) {
-   /* function returns '0' if key is pressed */
-   err = (prx.input & 0x80) ? 0 : 1;
-   }
-
-   return err;
-}
-
-static int do_mtc_digout(cmd_tbl_t *cmdtp, int flag, int argc, char * const 
argv[])
-{
-   tx_msp_cmd pcmd;
-   rx_msp_cmd prx;
-   int err;
-   uchar channel_mask = 0;
-
-   if (argc < 3)
-   return cmd_usage(cmdtp);
-
-   if 

Re: [U-Boot] Environment storage format stability

[Wolfgang Denk]

Dear Kristian,

In message <7f7560f1-5b05-1f0c-8bf0-fd0458f9d...@mender.io> you wrote:
> I have a question about the format of the environment when stored on
> persistent storage: Is this format considered stable?

Yes, it is.  It has never been changed since it has been invented in
the first days of this project, when it was still sailing under the
name PPCboot, and there are no plans or discussions to change it,
either.

> The reason I'm asking is whether it is a reasonable assumption that
> upgraded user space tools (fw_setenv and fw_printenv) will agree on the
> format with an older boot loader. The user space tools may be upgraded
> as part of a rootfs update, but the boot loader typically will not.

As of now, you can still read the environment of a 16 year old PPCBoot
:-)

Best regards,

Wolfgang Denk

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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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[U-Boot] [RFC PATCH] pcf2127: add watchdog support

[Sean Nyekjaer]

Signed-off-by: Sean Nyekjaer 
---
- I have just noticed that the RTC driver for this device have been merged,
  should the watchdog part be included in the rtc driver or standalone?
- The hw_watchdog_reset is called far too often the device here is on i2c,
  with what i have done the reset is written every 1s
- What should be the default delay? I have chosen 20?

 drivers/watchdog/Kconfig   | 11 +++
 drivers/watchdog/Makefile  |  1 +
 drivers/watchdog/pcf2127_wdt.c | 69 ++
 include/pcf2127_wdt.h  |  3 ++
 4 files changed, 84 insertions(+)
 create mode 100644 drivers/watchdog/pcf2127_wdt.c
 create mode 100644 include/pcf2127_wdt.h

diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index e69de29bb2..957f2f3a87 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -0,0 +1,11 @@
+#
+# Watchdog drivers configuration
+#
+
+menu "Watchdog"
+
+config PCF2127_WATCHDOG
+   depends on DM_I2C
+   bool "Enable pcf2127 i2c watchdog"
+
+endmenu
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index a007ae8234..3c573de016 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -15,3 +15,4 @@ obj-$(CONFIG_XILINX_TB_WATCHDOG) += xilinx_tb_wdt.o
 obj-$(CONFIG_BFIN_WATCHDOG)  += bfin_wdt.o
 obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
 obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o
+obj-$(CONFIG_PCF2127_WATCHDOG) += pcf2127_wdt.o
diff --git a/drivers/watchdog/pcf2127_wdt.c b/drivers/watchdog/pcf2127_wdt.c
new file mode 100644
index 00..f9276e3ea5
--- /dev/null
+++ b/drivers/watchdog/pcf2127_wdt.c
@@ -0,0 +1,69 @@
+#include 
+#include 
+#include 
+#include 
+
+#define PCF2127_REG_WDT_CTRL   0x10
+#define PCF2127_REG_WDT_TIM0x11
+
+#define PCF2127_WDT_MODE(wdt_mode) (wdt_mode << 6)
+#define PCF2127_WDT_DISABLED   0b00/* watchdog timer disabled */
+#define PCF2127_WDT_ENABLED_RST0b11/* watchdog timer enabled,
+  rst activated when timeout */
+
+#define PCF2127_WDT_TIMER_SRC(src) (src)
+#define PCF2127_WDT_4096HZ 0b00
+#define PCF2127_WDT_64HZ   0b01
+#define PCF2127_WDT_1HZ0b10
+#define PCF2127_WDT_16mHZ  0b11
+
+#define DCNT   4194304
+
+static uchar timeout = 20;
+static bool wdt_active = false;
+static uint32_t cnt = DCNT-1; /* minus one to ensure the reset is called in 
SPL */
+
+int pcf2127_reg_read(const uchar reg, uchar *val)
+{
+   return i2c_read(PCF2127_I2C_ADDR, reg, 1, val, 1);
+}
+
+int pcf2127_reg_write(const uchar reg, uchar val)
+{
+   return i2c_write(PCF2127_I2C_ADDR, reg, 1, , 1);
+}
+
+static int pcf2127_wdt_setup(uchar mode, uchar tim_src)
+{
+   pcf2127_reg_write(PCF2127_REG_WDT_CTRL,
+   PCF2127_WDT_MODE(mode) | PCF2127_WDT_TIMER_SRC(tim_src));
+   return 0;
+}
+
+static int pcf2127_wdt_settimeout(uchar t_out)
+{
+   timeout = (uchar)t_out;
+   pcf2127_reg_write(PCF2127_REG_WDT_TIM, timeout);
+   return 0;
+}
+
+void pcf2127_wdt_enable(void)
+{
+   wdt_active = true;
+}
+
+void hw_watchdog_reset(void)
+{
+   if(wdt_active == true) {
+   if (cnt++ % DCNT == 0)
+   pcf2127_wdt_settimeout(20);
+   }
+}
+
+void hw_watchdog_init(void)
+{
+   if(wdt_active == true) {
+   pcf2127_wdt_setup(PCF2127_WDT_ENABLED_RST, PCF2127_WDT_1HZ);
+   pcf2127_wdt_settimeout(20);
+   }
+}
diff --git a/include/pcf2127_wdt.h b/include/pcf2127_wdt.h
new file mode 100644
index 00..3f293b2348
--- /dev/null
+++ b/include/pcf2127_wdt.h
@@ -0,0 +1,3 @@
+#define PCF2127_I2C_ADDR 0x51
+
+void pcf2127_wdt_enable(void);
-- 
2.11.0

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[U-Boot] Environment storage format stability

[Kristian Amlie]

I have a question about the format of the environment when stored on
persistent storage: Is this format considered stable?

The reason I'm asking is whether it is a reasonable assumption that
upgraded user space tools (fw_setenv and fw_printenv) will agree on the
format with an older boot loader. The user space tools may be upgraded
as part of a rootfs update, but the boot loader typically will not.

-- 
Kristian
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[U-Boot] "Error reading cluster"

[Hai, Mr. Dinh Tuan]

Hi,

I am using a switch (Dell S4810-ON), which comes with U-Boot preinstalled.
When I tried to install a new OS for the switch, I always get the message
as below:

Partition Map for MMC device 0  --   Partition Type: DOS

PartStart SectorNum Sectors UUIDType
  1 16  31280   c3096657-01 83
  2 31296   125056  c3096657-02 83
  3 156352  15883584c3096657-03 83
reading switchlight-loader
Error reading cluster
** Unable to read file switchlight-loader **
WARNING: adjusting available memory to 3000
## Booting kernel from Legacy Image at 1000 ...
   Image Name:
   Image Type:   PowerPC Linux Multi-File Image (gzip compressed)
   Data Size:6784030 Bytes = 6.5 MiB
   Load Address: 
   Entry Point:  
   Contents:
  Image 0: 3375086 Bytes = 3.2 MiB
  Image 1: 3400856 Bytes = 3.2 MiB
  Image 2: 8070 Bytes = 7.9 KiB
   Verifying Checksum ... Bad Data CRC
ERROR: can't get kernel image!

Since I'm totally new with U-Boot, could anyone give me a clue about this
problem?

Thank you very much!

Regards,
Hai
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[U-Boot] [BUG report] imx6: CACHE Misaligned operation

[Francesco Dolcini]

Dear all,
I am trying current U-Boot master on solidrun microsom i.MX6 and I get a CACHE
error when accessing SD device:

U-Boot SPL 2017.01-rc1-00066-ge5209e3-dirty (Dec 14 2016 - 10:55:06)
Trying to boot from MMC1** First descriptor is NOT a primary desc on 0:1 **


U-Boot 2017.01-rc1-00066-ge5209e3-dirty (Dec 14 2016 - 10:55:06 +0100)

CPU:   Freescale i.MX6Q rev1.5 996 MHz (running at 792 MHz)
CPU:   Extended Commercial temperature grade (-20C to 105C) at 57C
Reset cause: POR
Board: MX6 Cubox-i
DRAM:  2 GiB
MMC:   FSL_SDHC: 0
CACHE: Misaligned operation at range [8ffbaf6c, 8ffbb76c]
CACHE: Misaligned operation at range [8ffbaf6c, 8ffbb76c]
ERROR: v7_outer_cache_inval_range - start address is not aligned - 0x8ffbaf6c
ERROR: v7_outer_cache_inval_range - stop address is not aligned - 0x8ffbb76c
CACHE: Misaligned operation at range [8ffbaf6c, 8ffbb76c]
CACHE: Misaligned operation at range [8ffbaf6c, 8ffbb76c]
ERROR: v7_outer_cache_inval_range - start address is not aligned - 0x8ffbaf6c
ERROR: v7_outer_cache_inval_range - stop address is not aligned - 0x8ffbb76c
** First descriptor is NOT a primary desc on 0:1 **
*** Warning - bad CRC, using default environment

No panel detected: default to HDMI
Display: HDMI (1024x768)
In:serial
Out:   serial
Err:   serial
Net:   FEC
Error: FEC address not set.

Hit any key to stop autoboot:  0 
=> version

U-Boot 2017.01-rc1-00066-ge5209e3-dirty (Dec 14 2016 - 10:55:06 +0100)
arm-linux-gnueabihf-gcc (Linaro GCC 5.3-2016.05) 5.3.1 20160412
GNU ld (Linaro_Binutils-2016.05) 2.25.0 Linaro 2016_02

U-Boot version is 53e8ca22538c2cec691fe74098684a359302688c with 
54e4fcfa3c749a789192e83740a53234182f4ca3 reverted.

I have tried building also with gcc 4.8 without any improvement.
I have not verified if SD is working correctly.
I am using mx6cuboxi_defconfig without any modification.

U-Boot v2016.03 is not showing the problem.

For the sake of completeness the board is a solidrun SOM i4Pro Rev-1.5 on a
HummingBoard2 Edge Rev-1.2

Thanks,
Francesco

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Re: [U-Boot] [linux-sunxi] Re: [RFC PATCH 0/3] sunxi: video: Add support for HDMI output on H3

[Chen-Yu Tsai]

On Wed, Dec 14, 2016 at 5:16 AM, Icenowy Zheng  wrote:
>
>
> 14.12.2016, 04:29, "Simon Glass" :
>> Hi,
>>
>> On 12 December 2016 at 19:36, Jernej Skrabec  wrote:
>>>  This patch series add support for HDMI output. Support for other,
>>>  newer, SoCs, which also uses DE2 and same or similar HDMI controller
>>>  and PHY can be easily added later (A83T/A64/H5/R40). Current driver
>>>  can also be easily extended with TV out support, just like video
>>>  driver for older Allwinner SoCs.
>>>
>>>  While driver works, I would like to get few opinions first.
>>>  - From what I understand, drivers which supports DT are preferred.
>>>Would it be better to rewrite this driver to support device tree?
>>
>> Yes I think so, and in fact it should use driver model also.
>>
>> The rockchip driver provides a reasonable example of how to split the
>> driver up as you suggest below. The VIDEO driver provides the
>> top-level video interface, DISPLAY drivers provide display output for
>> the video, and you have PANEL as well for receiving the display
>> output. VIDCONSOLE works automatically to display text.
>>
>> I actually took a bit of a look at this a few weeks ago so am happy to
>> help with review or discussions.
>
> Yes, I think go to Driver Model is also valuable, as Allwinner's display parts
> are really in reusable components.
>
> In addition, Driver Model provides the possibility to use EFI GOP, which can
> be a more standardized replacement of SimpleFB, especially for OSes other
> than Linux. (For example, Windows, if we can really get it running ;-) )

We're going to use EFI now? Doesn't EFI mean we have to leave another bit
of firmware in memory running under the OS? What about PSCI and ATF on
ARMv8?

ChenYu

>
>>
>>>  - TCON code is currently exactly the same as in driver for older
>>>SoCs. Should I split it out into shared module? Also TV out code
>>>seems to be similar, but I didn't manage to confirm that it works
>>>as-is on H3.
>>>  - A80 SoC is mix of older display engine and newer HDMI controller,
>>>so it doesn't really work with either of sunxi video drivers. Two
>>>solutions I see here are either combine both driver into one massive
>>>display driver or, much better, split everything by components
>>>(TCON/DE/DE2/HDMI/TV) and instantiate compatible ones. I guess this
>>>is not much different than adding support for DT in drivers. Note
>>>that I don't have any A80 board, I'm just thinking ahead.
>>>
>>>  Best regards,
>>>  Jernej Skrabec
>>>
>>>  Jernej Skrabec (3):
>>>sunxi: Add clocks for DE2/HDMI/TCON
>>>sunxi: video: Add video driver for H3 SoC
>>>sunxi: Enable H3 video driver in defconfigs
>>>
>>>   arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 43 +
>>>   arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 8 +
>>>   arch/arm/include/asm/arch-sunxi/display2.h | 377 +
>>>   arch/arm/mach-sunxi/clock_sun6i.c | 28 +
>>>   board/sunxi/Kconfig | 4 +-
>>>   configs/orangepi_2_defconfig | 1 +
>>>   configs/orangepi_lite_defconfig | 1 +
>>>   configs/orangepi_one_defconfig | 1 +
>>>   configs/orangepi_pc_defconfig | 1 +
>>>   configs/orangepi_pc_plus_defconfig | 1 +
>>>   configs/orangepi_plus2e_defconfig | 1 +
>>>   configs/orangepi_plus_defconfig | 1 +
>>>   drivers/video/Makefile | 1 +
>>>   drivers/video/sunxi_display2.c | 1037 +
>>>   include/configs/sunxi-common.h | 17 +-
>>>   scripts/config_whitelist.txt | 1 +
>>>   16 files changed, 1516 insertions(+), 7 deletions(-)
>>>   create mode 100644 arch/arm/include/asm/arch-sunxi/display2.h
>>>   create mode 100644 drivers/video/sunxi_display2.c
>>>
>>>  --
>>>  2.10.2
>>
>> Regards,
>> Simon
>>
>> --
>> You received this message because you are subscribed to the Google Groups 
>> "linux-sunxi" group.
>> To unsubscribe from this group and stop receiving emails from it, send an 
>> email to linux-sunxi+unsubscr...@googlegroups.com.
>> For more options, visit https://groups.google.com/d/optout.
>
> --
> You received this message because you are subscribed to the Google Groups 
> "linux-sunxi" group.
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[U-Boot] Altera Cyclone5 - U-Boot SPL looping

[Léo Serre]

Hi all!

I'm using U-Boot 2016.09.01 through Buildroot to make my De0-Nano-SoC 
(powered by Altera Cyclone5 SoCFPGA) working.


I have signed correctly the SPL and it boot but in loop, looking like it 
fails to find U-Boot (which is placed on the same partition as the SPL 
but 256K after the start point).


   U-Boot SPL 2016.09.01 (Dec 14 2016 - 12:59:24)
   drivers/ddr/altera/sequencer.c: Preparing to start memory calibration
   drivers/ddr/altera/sequencer.c: CALIBRATION PASSED
   drivers/ddr/altera/sequencer.c: Calibration complete
   Trying to boot from MMC1

   U-Boot SPL 2016.09.01 (Dec 14 2016 - 12:59:24)
   drivers/ddr/altera/sequencer.c: Preparing to start memory calibration
   drivers/ddr/altera/sequencer.c: CALIBRATION PASSED
   drivers/ddr/altera/sequencer.c: Calibration complete
   Trying to boot from MMC1

   ...

I've found no help in the user manual about the SPL, so I'm looking to 
the way to confirm that the SPL looks for the U-Boot to be at the 
address 256K, and maybe some help about that newbie case ;-)


Thanks !

Léo
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[U-Boot] Question re vendor check in drivers/pci/pci.c

[Gregory Fong]

Hello all,

In pci_hose_scan_bus(), there is this check:

if (vendor == 0x || vendor == 0x)
continue;

The test against the special invalid vendor value of 0x is
definitely correct.  But is it necessarily wrong for a vendor ID to be
0?  Of course it's not used in the PCI vendor ID database, but AFAIK
it's not an illegal value.  I'm not 100% confident in that knowledge,
so hopefully someone more knowledgeable about PCI can speak up :-).
Would be happy to submit a patch if so.

Thanks and regards,
Gregory
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[U-Boot] Pull request v2: u-boot-spi/master

[Jagan Teki]

Hi Tom,

Please pull this PR.

Changes for v2:
- Skip "spi: Zap mpc52xx_spi.c and config" patch due to dependencies.

thanks!
Jagan.

The following changes since commit 53e8ca22538c2cec691fe74098684a359302688c:

  MAINTAINERS: DFU: Change e-mail address for DFU maintainer (2016-12-12 
13:03:15 -0500)

are available in the git repository at:

  git://git.denx.de/u-boot-spi.git master

for you to fetch changes up to db9225ba2686d6b7e249d00e1803bd07f71d6070:

  sf: Do not force the DT memory map size to exactly match the device 
(2016-12-15 16:57:28 +0100)


Fabien Parent (1):
  mtd: spi: don't return -1 when scan succeed

Phil Edworthy (10):
  spi: cadence_qspi: Fix clearing of pol/pha bits
  spi: cadence_qspi: Fix baud rate calculation
  spi: cadence_qspi: Better debug information on the SPI clock rate
  spi: cadence_qspi: Use #define for bits instead of bit shifts
  spi: cadence_qspi: Clean up the #define names
  spi: cadence_qspi: Use spi mode at the point it is needed
  spi: cadence_qspi: Remove returns from end of void functions
  spi: cadence_qspi: Fix CS timings
  spi: cadence_qspi: Move DT prop code to match layout
  sf: Do not force the DT memory map size to exactly match the device

Simon Glass (1):
  spi: Add error checking for invalid bus widths

Vignesh R (1):
  ARM: dts: am437x-idk: Fix QSPI compatible string

 arch/arm/dts/am437x-idk-evm.dts |   2 +-
 drivers/mtd/spi/spi_flash.c |   6 +-
 drivers/spi/cadence_qspi.c  |   6 +-
 drivers/spi/cadence_qspi.h  |   3 +-
 drivers/spi/cadence_qspi_apb.c  | 185 ++--
 drivers/spi/spi-uclass.c|   4 +-
 6 files changed, 93 insertions(+), 113 deletions(-)
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[U-Boot] [PATCH] tools: mxsimage: Fix build with OpenSSL 1.1.x

[Marek Vasut]

The EVP_MD_CTX and EVP_CIPHER_CTX are made opaque since 1.1.x , so instead
of embedding them directly into struct sb_image_ctx and initializing them
using EVP_*_CTX_init(), we use pointers and allocate the crypto contexts
using EVP_*_CTX_new().

Signed-off-by: Marek Vasut 
Cc: Tom Rini 
---
 tools/mxsimage.c | 74 ++--
 1 file changed, 40 insertions(+), 34 deletions(-)

diff --git a/tools/mxsimage.c b/tools/mxsimage.c
index 98fc644..6764f9b 100644
--- a/tools/mxsimage.c
+++ b/tools/mxsimage.c
@@ -144,8 +144,8 @@ struct sb_image_ctx {
struct sb_dcd_ctx   *dcd_head;
struct sb_dcd_ctx   *dcd_tail;
 
-   EVP_CIPHER_CTX  cipher_ctx;
-   EVP_MD_CTX  md_ctx;
+   EVP_CIPHER_CTX  *cipher_ctx;
+   EVP_MD_CTX  *md_ctx;
uint8_t digest[32];
struct sb_key_dictionary_keysb_dict_key;
 
@@ -173,24 +173,26 @@ struct sb_image_ctx {
  */
 static int sb_aes_init(struct sb_image_ctx *ictx, uint8_t *iv, int enc)
 {
-   EVP_CIPHER_CTX *ctx = >cipher_ctx;
+   EVP_CIPHER_CTX *ctx;
int ret;
 
/* If there is no init vector, init vector is all zeroes. */
if (!iv)
iv = ictx->image_key;
 
-   EVP_CIPHER_CTX_init(ctx);
+   ctx = EVP_CIPHER_CTX_new();
ret = EVP_CipherInit(ctx, EVP_aes_128_cbc(), ictx->image_key, iv, enc);
-   if (ret == 1)
+   if (ret == 1) {
EVP_CIPHER_CTX_set_padding(ctx, 0);
+   ictx->cipher_ctx = ctx;
+   }
return ret;
 }
 
 static int sb_aes_crypt(struct sb_image_ctx *ictx, uint8_t *in_data,
uint8_t *out_data, int in_len)
 {
-   EVP_CIPHER_CTX *ctx = >cipher_ctx;
+   EVP_CIPHER_CTX *ctx = ictx->cipher_ctx;
int ret, outlen;
uint8_t *outbuf;
 
@@ -215,13 +217,13 @@ err:
 
 static int sb_aes_deinit(EVP_CIPHER_CTX *ctx)
 {
-   return EVP_CIPHER_CTX_cleanup(ctx);
+   return EVP_CIPHER_CTX_reset(ctx);
 }
 
 static int sb_aes_reinit(struct sb_image_ctx *ictx, int enc)
 {
int ret;
-   EVP_CIPHER_CTX *ctx = >cipher_ctx;
+   EVP_CIPHER_CTX *ctx = ictx->cipher_ctx;
struct sb_boot_image_header *sb_header = >payload;
uint8_t *iv = sb_header->iv;
 
@@ -276,7 +278,7 @@ static int sb_get_time(time_t time, struct tm *tm)
 
 static void sb_encrypt_sb_header(struct sb_image_ctx *ictx)
 {
-   EVP_MD_CTX *md_ctx = >md_ctx;
+   EVP_MD_CTX *md_ctx = ictx->md_ctx;
struct sb_boot_image_header *sb_header = >payload;
uint8_t *sb_header_ptr = (uint8_t *)sb_header;
 
@@ -287,7 +289,7 @@ static void sb_encrypt_sb_header(struct sb_image_ctx *ictx)
 
 static void sb_encrypt_sb_sections_header(struct sb_image_ctx *ictx)
 {
-   EVP_MD_CTX *md_ctx = >md_ctx;
+   EVP_MD_CTX *md_ctx = ictx->md_ctx;
struct sb_section_ctx *sctx = ictx->sect_head;
struct sb_sections_header *shdr;
uint8_t *sb_sections_header_ptr;
@@ -307,7 +309,7 @@ static void sb_encrypt_sb_sections_header(struct 
sb_image_ctx *ictx)
 
 static void sb_encrypt_key_dictionary_key(struct sb_image_ctx *ictx)
 {
-   EVP_MD_CTX *md_ctx = >md_ctx;
+   EVP_MD_CTX *md_ctx = ictx->md_ctx;
 
sb_aes_crypt(ictx, ictx->image_key, ictx->sb_dict_key.key,
 sizeof(ictx->sb_dict_key.key));
@@ -316,7 +318,7 @@ static void sb_encrypt_key_dictionary_key(struct 
sb_image_ctx *ictx)
 
 static void sb_decrypt_key_dictionary_key(struct sb_image_ctx *ictx)
 {
-   EVP_MD_CTX *md_ctx = >md_ctx;
+   EVP_MD_CTX *md_ctx = ictx->md_ctx;
 
EVP_DigestUpdate(md_ctx, >sb_dict_key, sizeof(ictx->sb_dict_key));
sb_aes_crypt(ictx, ictx->sb_dict_key.key, ictx->image_key,
@@ -326,7 +328,7 @@ static void sb_decrypt_key_dictionary_key(struct 
sb_image_ctx *ictx)
 static void sb_encrypt_tag(struct sb_image_ctx *ictx,
struct sb_cmd_ctx *cctx)
 {
-   EVP_MD_CTX *md_ctx = >md_ctx;
+   EVP_MD_CTX *md_ctx = ictx->md_ctx;
struct sb_command *cmd = >payload;
 
sb_aes_crypt(ictx, (uint8_t *)cmd,
@@ -337,8 +339,8 @@ static void sb_encrypt_tag(struct sb_image_ctx *ictx,
 static int sb_encrypt_image(struct sb_image_ctx *ictx)
 {
/* Start image-wide crypto. */
-   EVP_MD_CTX_init(>md_ctx);
-   EVP_DigestInit(>md_ctx, EVP_sha1());
+   ictx->md_ctx = EVP_MD_CTX_new();
+   EVP_DigestInit(ictx->md_ctx, EVP_sha1());
 
/*
 * SB image header.
@@ -379,7 +381,7 @@ static int sb_encrypt_image(struct sb_image_ctx *ictx)
} else if (ccmd->header.tag == ROM_LOAD_CMD) {
sb_aes_crypt(ictx, cctx->data, cctx->data,
 cctx->length);
-   EVP_DigestUpdate(>md_ctx, cctx->data,
+ 

[U-Boot] [PATCH] ARM: mxs: Remove unused variable warning

[Marek Vasut]

Shuffle the macros around a little to remove the following warning
when building for i.MX28:

arch/arm/cpu/arm926ejs/mxs/spl_boot.c:44:26: warning: ‘iomux_boot’ defined but 
not used [-Wunused-const-variable=]
 static const iomux_cfg_t iomux_boot[] = {
  ^~

Signed-off-by: Marek Vasut 
Cc: Tom Rini 
Cc: Stefano Babic 
---
 arch/arm/cpu/arm926ejs/mxs/spl_boot.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c 
b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
index eb8669b..d9d1d73 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
@@ -40,17 +40,17 @@ void early_delay(int delay)
;
 }
 
+#if defined(CONFIG_MX23)
 #defineMUX_CONFIG_BOOTMODE_PAD (MXS_PAD_3V3 | MXS_PAD_4MA | 
MXS_PAD_NOPULL)
 static const iomux_cfg_t iomux_boot[] = {
-#if defined(CONFIG_MX23)
MX23_PAD_LCD_D00__GPIO_1_0 | MUX_CONFIG_BOOTMODE_PAD,
MX23_PAD_LCD_D01__GPIO_1_1 | MUX_CONFIG_BOOTMODE_PAD,
MX23_PAD_LCD_D02__GPIO_1_2 | MUX_CONFIG_BOOTMODE_PAD,
MX23_PAD_LCD_D03__GPIO_1_3 | MUX_CONFIG_BOOTMODE_PAD,
MX23_PAD_LCD_D04__GPIO_1_4 | MUX_CONFIG_BOOTMODE_PAD,
MX23_PAD_LCD_D05__GPIO_1_5 | MUX_CONFIG_BOOTMODE_PAD,
-#endif
 };
+#endif
 
 static uint8_t mxs_get_bootmode_index(void)
 {
-- 
2.10.2

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Re: [U-Boot] Many unused variable warnings

[Marek Vasut]

On 12/15/2016 04:55 AM, Masahiro Yamada wrote:
> Hi.
> 
> The recent GCC versions catch unused variables.
> 
> This makes build testing noisy.
> 
> Of course, we could use old GCC when running Buildman,
> but it would be nicer to eliminate the root causes.
> 
> I got the following when I recently ran Buildman with arm/aarch64 GCC 6.1.
> 
> 
> drivers/usb/gadget/dwc2_udc_otg.c was fixed lately,
> but there are still many warnings to be fixed.
> 
> Board maintainers, please check your own boards.

YES, SIR !

> Or, somebody who volunteers to fix them?  Thanks!

mxs should be fixed and dwc2 usb was fixed by you , thanks :)

> w+../arch/arm/cpu/arm926ejs/mxs/spl_boot.c:44:26: warning:
> 'iomux_boot' defined but not used [-Wunused-const-variable=]
> w+../common/cli_readline.c:20:21: warning: 'tab_seq' defined but not
> used [-Wunused-const-variable=]
> w+../common/cli_readline.c:19:19: warning: 'erase_seq' defined but not
> used [-Wunused-const-variable=]
> w+../drivers/usb/gadget/dwc2_udc_otg.c:72:19: warning: 'driver_desc'
> defined but not used [-Wunused-const-variable=]
> w+../arch/arm/mach-omap2/omap4/hw_data.c:136:3: warning:
> 'abe_dpll_params_sysclk_196608khz' defined but not used
> [-Wunused-const-variable=]
> w+../drivers/clk/rockchip/clk_rk3288.c:135:29: warning:
> 'cpll_init_cfg' defined but not used [-Wunused-const-variable=]
> w+../drivers/clk/rockchip/clk_rk3288.c:134:29: warning:
> 'gpll_init_cfg' defined but not used [-Wunused-const-variable=]
> w+../drivers/ddr/fsl/options.c:226:33: warning: 'dual_0S' defined but
> not used [-Wunused-const-variable=]
> w+../drivers/ddr/fsl/options.c:213:33: warning: 'dual_S0' defined but
> not used [-Wunused-const-variable=]
> w+../drivers/ddr/fsl/options.c:196:33: warning: 'dual_0D' defined but
> not used [-Wunused-const-variable=]
> w+../drivers/ddr/fsl/options.c:179:33: warning: 'dual_D0' defined but
> not used [-Wunused-const-variable=]
> w+../drivers/ddr/fsl/options.c:162:33: warning: 'dual_SS' defined but
> not used [-Wunused-const-variable=]
> w+../drivers/ddr/fsl/options.c:140:33: warning: 'dual_SD' defined but
> not used [-Wunused-const-variable=]
> w+../drivers/ddr/fsl/options.c:119:33: warning: 'dual_DS' defined but
> not used [-Wunused-const-variable=]
> w+../drivers/ddr/fsl/options.c:92:33: warning: 'dual_DD' defined but
> not used [-Wunused-const-variable=]
> w+../drivers/usb/gadget/ether.c:501:17: warning: 'mdlm_detail_desc'
> defined but not used [-Wunused-const-variable=]
> w+../drivers/ddr/fsl/options.c:80:33: warning: 'single_S' defined but
> not used [-Wunused-const-variable=]
> w+../drivers/ddr/fsl/options.c:63:33: warning: 'single_D' defined but
> not used [-Wunused-const-variable=]
> w+../drivers/ddr/fsl/options.c:36:33: warning: 'single_Q' defined but
> not used [-Wunused-const-variable=]
> w+../board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c:228:29:
> warning: 'usdhc1_pads' defined but not used [-Wunused-const-variable=]
> w+../drivers/net/eepro100.c:210:19: warning: 'i82557_config_cmd'
> defined but not used [-Wunused-const-variable=]
> w+../drivers/ddr/fsl/options.c:456:33: warning: 'dual_0S' defined but
> not used [-Wunused-const-variable=]
> w+../drivers/ddr/fsl/options.c:443:33: warning: 'dual_S0' defined but
> not used [-Wunused-const-variable=]
> w+../drivers/ddr/fsl/options.c:426:33: warning: 'dual_0D' defined but
> not used [-Wunused-const-variable=]
> w+../drivers/ddr/fsl/options.c:409:33: warning: 'dual_D0' defined but
> not used [-Wunused-const-variable=]
> w+../drivers/ddr/fsl/options.c:392:33: warning: 'dual_SS' defined but
> not used [-Wunused-const-variable=]
> w+../drivers/ddr/fsl/options.c:370:33: warning: 'dual_SD' defined but
> not used [-Wunused-const-variable=]
> w+../drivers/ddr/fsl/options.c:349:33: warning: 'dual_DS' defined but
> not used [-Wunused-const-variable=]
> w+../drivers/ddr/fsl/options.c:322:33: warning: 'dual_DD' defined but
> not used [-Wunused-const-variable=]
> w+../arch/arm/mach-omap2/omap5/hw_data.c:204:33: warning:
> 'abe_dpll_params_32k_196608khz' defined but not used
> [-Wunused-const-variable=]
> w+../arch/arm/mach-omap2/omap5/hw_data.c:131:4: warning:
> 'core_dpll_params_2128mhz_ddr266_es2' defined but not used
> [-Wunused-const-variable=]
> w+../arch/arm/mach-omap2/omap5/hw_data.c:120:4: warning:
> 'core_dpll_params_2128mhz_ddr266' defined but not used
> [-Wunused-const-variable=]
> w+../arch/arm/mach-omap2/omap5/hw_data.c:65:33: warning:
> 'mpu_dpll_params_499mhz' defined but not used
> [-Wunused-const-variable=]
> w+../arch/arm/mach-omap2/omap5/hw_data.c:54:33: warning:
> 'mpu_dpll_params_400mhz' defined but not used
> [-Wunused-const-variable=]
> w+../arch/arm/mach-omap2/omap5/hw_data.c:32:33: warning:
> 'mpu_dpll_params_1_5ghz' defined but not used
> [-Wunused-const-variable=]
> w+../board/phytec/pcm058/pcm058.c:136:29: warning: 'gpios_pads'
> defined but not used [-Wunused-const-variable=]
> w+../board/phytec/pcm058/pcm058.c:171:29: warning: 'usdhc4_pads'
> defined but not used 

[U-Boot] [PATCH 2/3] mx6qsabreauto: Pass the correct parallel NOR width

[Fabio Estevam]

On mx6qsabreauto the parallel NOR width is 16 bits, so configure
CONFIG_SYS_FLASH_CFI_WIDTH correctly so that the CFI driver does not
use 8-bit withd by default.

Signed-off-by: Fabio Estevam 
---
 include/configs/mx6qsabreauto.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h
index f849f34..7d68633 100644
--- a/include/configs/mx6qsabreauto.h
+++ b/include/configs/mx6qsabreauto.h
@@ -38,6 +38,7 @@
 #define CONFIG_FLASH_CFI_DRIVER /* Use drivers/cfi_flash.c */
 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* Use buffered writes*/
 #define CONFIG_SYS_FLASH_EMPTY_INFO
+#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
 
 #define CONFIG_SYS_FSL_USDHC_NUM   2
 #if defined(CONFIG_ENV_IS_IN_MMC)
-- 
2.7.4

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[U-Boot] [RFC] cmd: mem: Allow 'cp' to use the optimized memcpy

[Fabio Estevam]

If CONFIG_USE_ARCH_MEMCPY is selected, let's use the assembly optimized
memcpy implementation for the 'cp' command.

Currently only Blackfin uses memcpy for the 'cp' command, so extend
this to the CONFIG_USE_ARCH_MEMCPY users.

Tested on a mx6qsabreauto board where a 5x gain in performance is seen
when reading 10MB from the parallel NOR memory.

Signed-off-by: Fabio Estevam 
---
Sending as RFC as I don't know if any extra checks would be required here,
so I appreciate any feedback.

 cmd/mem.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/cmd/mem.c b/cmd/mem.c
index a690957..c1d9a7c 100644
--- a/cmd/mem.c
+++ b/cmd/mem.c
@@ -465,6 +465,11 @@ static int do_mem_cp(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
}
 #endif
 
+#ifdef CONFIG_USE_ARCH_MEMCPY
+   memcpy((void *)dest, (void *)addr, count * size);
+   return 0;
+#endif
+
bytes = size * count;
buf = map_sysmem(dest, bytes);
src = map_sysmem(addr, bytes);
-- 
2.7.4

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Re: [U-Boot] [PATCH 3/3] mx6: Select CONFIG_USE_ARCH_MEMCPY

[Tom Rini]

On Thu, Dec 15, 2016 at 01:23:14PM -0200, Fabio Estevam wrote:

> The CONFIG_USE_ARCH_MEMCPY option builds an assembly optimized version
> of memcpy, so select it to gain performance.
> 
> Signed-off-by: Fabio Estevam 
> ---
>  include/configs/mx6_common.h | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
> index d28654b..d54578a 100644
> --- a/include/configs/mx6_common.h
> +++ b/include/configs/mx6_common.h
> @@ -18,6 +18,8 @@
>  #define CONFIG_SYS_PL310_BASEL2_PL310_BASE
>  #endif
>  
> +#define CONFIG_USE_ARCH_MEMCPY
> +
>  #define CONFIG_MP
>  #endif
>  #define CONFIG_BOARD_POSTCLK_INIT

Can you please migrate USE_ARCH_MEMCPY/MEMSET to Kconfig, and default y
them (not select) for ARMv7?  Thanks!

-- 
Tom


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Re: [U-Boot] [RFC] cmd: mem: Allow 'cp' to use the optimized memcpy

[Tom Rini]

On Thu, Dec 15, 2016 at 01:23:15PM -0200, Fabio Estevam wrote:

> If CONFIG_USE_ARCH_MEMCPY is selected, let's use the assembly optimized
> memcpy implementation for the 'cp' command.
> 
> Currently only Blackfin uses memcpy for the 'cp' command, so extend
> this to the CONFIG_USE_ARCH_MEMCPY users.
> 
> Tested on a mx6qsabreauto board where a 5x gain in performance is seen
> when reading 10MB from the parallel NOR memory.
> 
> Signed-off-by: Fabio Estevam 
> ---
> Sending as RFC as I don't know if any extra checks would be required here,
> so I appreciate any feedback.

We should re-work this to simply call memcpy() always, outside of the
case of dealing with flash/dataflash as that would simplify this code,
no?

-- 
Tom


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Re: [U-Boot] Many unused variable warnings

[Tom Rini]

On Thu, Dec 15, 2016 at 12:55:36PM +0900, Masahiro Yamada wrote:

> Hi.
> 
> The recent GCC versions catch unused variables.
> 
> This makes build testing noisy.
> 
> Of course, we could use old GCC when running Buildman,
> but it would be nicer to eliminate the root causes.
> 
> I got the following when I recently ran Buildman with arm/aarch64 GCC 6.1.

What's more worrying to me is that we need to adapt our RSA using code
for openssl 1.1 which is the default in debian/unstable, which is the
easiest way to get gcc 6.1 toolchains.  I might take a quick stab at
fixing some of the warnings, thanks for the reminder!

-- 
Tom


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[U-Boot] [PATCH 2/2] armv8: ls1012a: Add support of PPA

[Prabhakar Kushwaha]

The PPA implements PSCI which requires for power managment.

Added support of PPA for LS1012AQDS, LS1012ARDB and LS1012AFRDM.

Signed-off-by: Hou Zhiqiang 
Signed-off-by: Abhimanyu Saini 
Signed-off-by: Prabhakar Kushwaha 
---
 board/freescale/ls1012afrdm/ls1012afrdm.c |  6 ++
 board/freescale/ls1012aqds/ls1012aqds.c   |  7 +++
 board/freescale/ls1012ardb/ls1012ardb.c   |  6 ++
 include/configs/ls1012afrdm.h | 11 +++
 include/configs/ls1012aqds.h  | 11 +++
 include/configs/ls1012ardb.h  | 11 +++
 6 files changed, 52 insertions(+)

diff --git a/board/freescale/ls1012afrdm/ls1012afrdm.c 
b/board/freescale/ls1012afrdm/ls1012afrdm.c
index c2432c3..789cae2 100644
--- a/board/freescale/ls1012afrdm/ls1012afrdm.c
+++ b/board/freescale/ls1012afrdm/ls1012afrdm.c
@@ -9,6 +9,9 @@
 #include 
 #include 
 #include 
+#ifdef CONFIG_FSL_LS_PPA
+#include 
+#endif
 #include 
 #include 
 #include 
@@ -74,6 +77,9 @@ int board_init(void)
gd->env_addr = (ulong)_environment[0];
 #endif
 
+#ifdef CONFIG_FSL_LS_PPA
+   ppa_init();
+#endif
return 0;
 }
 
diff --git a/board/freescale/ls1012aqds/ls1012aqds.c 
b/board/freescale/ls1012aqds/ls1012aqds.c
index 1562edd..7283d15 100644
--- a/board/freescale/ls1012aqds/ls1012aqds.c
+++ b/board/freescale/ls1012aqds/ls1012aqds.c
@@ -10,6 +10,9 @@
 #include 
 #include 
 #include 
+#ifdef CONFIG_FSL_LS_PPA
+#include 
+#endif
 #include 
 #include 
 #include 
@@ -114,6 +117,10 @@ int board_init(void)
 #ifdef CONFIG_ENV_IS_NOWHERE
gd->env_addr = (ulong)_environment[0];
 #endif
+
+#ifdef CONFIG_FSL_LS_PPA
+   ppa_init();
+#endif
return 0;
 }
 
diff --git a/board/freescale/ls1012ardb/ls1012ardb.c 
b/board/freescale/ls1012ardb/ls1012ardb.c
index bc05fbe..fbd4bc4 100644
--- a/board/freescale/ls1012ardb/ls1012ardb.c
+++ b/board/freescale/ls1012ardb/ls1012ardb.c
@@ -9,6 +9,9 @@
 #include 
 #include 
 #include 
+#ifdef CONFIG_FSL_LS_PPA
+#include 
+#endif
 #include 
 #include 
 #include 
@@ -110,6 +113,9 @@ int board_init(void)
gd->env_addr = (ulong)_environment[0];
 #endif
 
+#ifdef CONFIG_FSL_LS_PPA
+   ppa_init();
+#endif
return 0;
 }
 
diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h
index f6f88e8..cf5d07c 100644
--- a/include/configs/ls1012afrdm.h
+++ b/include/configs/ls1012afrdm.h
@@ -9,6 +9,17 @@
 
 #include "ls1012a_common.h"
 
+#if defined(CONFIG_FSL_LS_PPA)
+#define CONFIG_ARMV8_PSCI
+#define CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
+#define SEC_FIRMWARE_ERET_ADDR_REVERT
+
+#define CONFIG_SYS_LS_PPA_FW_IN_XIP
+#ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP
+#defineCONFIG_SYS_LS_PPA_FW_ADDR   0x4050
+#endif
+#endif
+
 /* DDR */
 #define CONFIG_DIMM_SLOTS_PER_CTLR 1
 #define CONFIG_CHIP_SELECTS_PER_CTRL   1
diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h
index 0cc1791..8eeafa7 100644
--- a/include/configs/ls1012aqds.h
+++ b/include/configs/ls1012aqds.h
@@ -9,6 +9,17 @@
 
 #include "ls1012a_common.h"
 
+#if defined(CONFIG_FSL_LS_PPA)
+#define CONFIG_ARMV8_PSCI
+#define CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
+#define SEC_FIRMWARE_ERET_ADDR_REVERT
+
+#define CONFIG_SYS_LS_PPA_FW_IN_XIP
+#ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP
+#defineCONFIG_SYS_LS_PPA_FW_ADDR   0x4050
+#endif
+#endif
+
 /* DDR */
 #define CONFIG_DIMM_SLOTS_PER_CTLR 1
 #define CONFIG_CHIP_SELECTS_PER_CTRL   1
diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h
index 15410dd..04865ec 100644
--- a/include/configs/ls1012ardb.h
+++ b/include/configs/ls1012ardb.h
@@ -9,6 +9,17 @@
 
 #include "ls1012a_common.h"
 
+#if defined(CONFIG_FSL_LS_PPA)
+#define CONFIG_ARMV8_PSCI
+#define CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
+#define SEC_FIRMWARE_ERET_ADDR_REVERT
+
+#define CONFIG_SYS_LS_PPA_FW_IN_XIP
+#ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP
+#defineCONFIG_SYS_LS_PPA_FW_ADDR   0x4050
+#endif
+#endif
+
 /* DDR */
 #define CONFIG_DIMM_SLOTS_PER_CTLR 1
 #define CONFIG_CHIP_SELECTS_PER_CTRL   1
-- 
2.7.4


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Re: [U-Boot] [PATCH 0/3] Add generic FDT memory bank decoding and gd initialization

[Michal Simek]

On 15.12.2016 08:21, Michal Simek wrote:
> On 14.12.2016 16:00, Mike Looijmans wrote:
>>
>>> I am not marketing guy to say how often there are designs with only
>>> different DDR size like Mike's example but in fpga world you are not
>>> buying this chip to have only static part but you want to use fpga part
>>> and for that you need to use design tools. Because every design is
>>> unique you can generate device tree description directly from design
>>> tools which covers your target and this is what I believe people use.
>>
>> Well, I can't speak for everyone...
>>
>> Most people don't want to write (or even compile) a new bootloader for
>> each and every project. For our Miami SOMs, there are already more
>> full-custom carrier boards than evaluation boards. If we had to build a
>> bootloader for each such design, there'd be dozens of them.
>>
>> What we try to do is just use the generic bootloader to get the SOM up
>> and running, and then provide all the project hardware details in the
>> kernel's final devicetree. That includes changing pinmuxing and clocks
>> and stuff, which is easy to do.
> 
> That's nothing against what I have said. Having as much flexibility you
> need is great. We should support several method how to setup stuff and
> it is up to user if this method is suitable for you or not and doing
> these selection via Kconfig is the way we need to go.
> For all these autodetection algorithms you have to be sure that it is
> working fine on your platform based on testing.

Just a note for everybody. V2 patches contain compilation issue for
several boards. I have reported it back to Nathan to fix it.

Here is a log.
https://travis-ci.org/michalsimek-test/u-boot/jobs/184187944

Thanks,
Michal
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Re: [U-Boot] Rockchip RK3288 regulator device table problem

[Jaehoon Chung]

On 12/13/2016 01:57 AM, Rick Bronson wrote:
> Hi Simon,
> 
>>
>> On 9 December 2016 at 18:12, Rick Bronson  wrote:
>>> Hi All,
>>>
>>>   How do I enable a particular regulator upon boot?  I have two
>>> identically set LDO entries:
>>>
>>> vccio_en: LDO_REG1 {
>>> regulator-always-on;
>>> regulator-boot-on;
>>> regulator-min-microvolt = <330>;
>>> regulator-max-microvolt = <330>;
>>> regulator-name = "vccio_en";
>>> regulator-state-mem {
>>> regulator-on-in-suspend;
>>> regulator-suspend-microvolt =
> <330>;
>>> };
>>> };
>>>
>>> vcc33_mic: LDO_REG2 {
>>> regulator-always-on;
>>> regulator-boot-on;
>>> regulator-min-microvolt = <330>;
>>> regulator-max-microvolt = <330>;
>>> regulator-name = "vcc33_mic";
>>> regulator-state-mem {
>>> regulator-on-in-suspend;
>>> regulator-suspend-microvolt =
> <330>;
>>> };
>>> };
>>>
>>>   Yet one is enabled, the other disabled, any idea why?:
>>>
>>> => regulator status
>>> Name EnableduV mA Mode
>>> ...
>>> vccio_en enabled   330  - -
>>> vcc33_micdisabled  330  - -
>>>
>>>   And oddly, the uV values actually don't come from the DT but from
>>> the rk808_ldo table in drivers/power/regulator/rk808.c
>>
>> Do you think this is happening by PMIC settings (in the device) rather
>> than through U-Boot?
> 
>   Think I found the reason for this, it's this way because of the way
> BOOT0, BOOT1 are strapped on the RK808.
> 
>>
>>>
>>>   Any ideas?
>>>
>>> Thanks for any help.
>>>
>>
>> There is a function called regulators_enable_boot_on() which enables
>> all boot-on regulators that have a fixed voltage, but I don't think
>> that is called with rockchip.
>>
>> Now that I look at it, I cannot see why I put the voltage values in
>> the driver. They should come form DT.
> 
>   Do you think the right way to solve this is (from common/board_r.c):
> 
> __weak int power_init_board(void)
> {
>   regulators_enable_boot_on(false);
>   return 0;
> }
> 
>   Tried this but it seems to introduce a race condition because often, it
> hangs.

I think it's not solution..I don't know how Simon think about..
But if you need to put regulators_enable_boot_on()..then you put 
"power_init_board()" in board/rockchip/evb_rk3036(?).

In other words, make the power_init_board() for rockhip...not touch the "__weak 
int power_init_board()".?

Best Regards,
Jaehoon Chung

> 
>   Cheers,
> 
>   Rick
> 
> 
> 
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> 
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Re: [U-Boot] Problem with qspi when using micron devices

[Marek Vasut]

On 12/15/2016 11:45 AM, Phil Edworthy wrote:
> Hi Jagan,
> 
> On 07 December 2016 08:03, Phil Edworthy wrote:
>> Hi Jagan,
>>
>> When using Micron devices, SPI flash with quad mode does not work since
>> commit
>> c56ae7519f141523ba1248b22b5b5169b21772fe "sf: Fix quad bit set for micron
>> devices".
>>
>> This has been pointed out before, details about why the patch does work are
>> here:
>> http://lists.denx.de/pipermail/u-boot/2016-March/248566.html
>>
>> I know you are working on spi-nor, but it really would be good to revert the
>> patch.
> 
> Is there any reason why you cannot revert 
> c56ae7519f141523ba1248b22b5b5169b21772fe?
> From what I see, this patch has caused a few problems already:
> http://lists.denx.de/pipermail/u-boot/2016-March/248566.html
> http://lists.denx.de/pipermail/u-boot/2016-July/261005.html 
> http://lists.denx.de/pipermail/u-boot/2016-November/271634.html

I'm also for a revert.

-- 
Best regards,
Marek Vasut
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[U-Boot] [PATCHv2] power: change from meaningless value to error number

[Jaehoon Chung]

'-1' is absolutely meaningless value.
This patch changed from meaningless value to error number.

Signed-off-by: Jaehoon Chung 
---
Changelog on V2
- Fixes the missing error number in exynos-tmu.c

 drivers/power/axp152.c |  2 +-
 drivers/power/axp209.c |  2 +-
 drivers/power/battery/bat_trats2.c |  2 +-
 drivers/power/exynos-tmu.c |  8 
 drivers/power/fuel_gauge/fg_max17042.c |  4 ++--
 drivers/power/mfd/fg_max77693.c|  4 ++--
 drivers/power/mfd/pmic_max77693.c  |  8 
 drivers/power/palmas.c | 11 +++
 drivers/power/pmic/pmic_hi6553.c   |  4 ++--
 drivers/power/pmic/pmic_max77686.c | 18 +-
 drivers/power/pmic/pmic_max8997.c  |  8 
 drivers/power/power_core.c |  8 
 drivers/power/power_i2c.c  | 22 +++---
 drivers/power/power_spi.c  | 18 ++
 drivers/power/tps6586x.c   | 12 ++--
 15 files changed, 64 insertions(+), 67 deletions(-)

diff --git a/drivers/power/axp152.c b/drivers/power/axp152.c
index cd07275..c4b3fe5 100644
--- a/drivers/power/axp152.c
+++ b/drivers/power/axp152.c
@@ -75,7 +75,7 @@ int axp_init(void)
return rc;
 
if (ver != 0x05)
-   return -1;
+   return -EINVAL;
 
return 0;
 }
diff --git a/drivers/power/axp209.c b/drivers/power/axp209.c
index 731b75e..4b25ef2 100644
--- a/drivers/power/axp209.c
+++ b/drivers/power/axp209.c
@@ -158,7 +158,7 @@ int axp_init(void)
ver &= 0x0f;
 
if (ver != 0x1)
-   return -1;
+   return -EINVAL;
 
/* Mask all interrupts */
for (i = AXP209_IRQ_ENABLE1; i <= AXP209_IRQ_ENABLE5; i++) {
diff --git a/drivers/power/battery/bat_trats2.c 
b/drivers/power/battery/bat_trats2.c
index 57221ad..6329e02 100644
--- a/drivers/power/battery/bat_trats2.c
+++ b/drivers/power/battery/bat_trats2.c
@@ -18,7 +18,7 @@ static int power_battery_charge(struct pmic *bat)
struct power_battery *p_bat = bat->pbat;
 
if (bat->chrg->chrg_state(p_bat->chrg, PMIC_CHARGER_ENABLE, 450))
-   return -1;
+   return -EINVAL;
 
return 0;
 }
diff --git a/drivers/power/exynos-tmu.c b/drivers/power/exynos-tmu.c
index b9968c2..6a66267 100644
--- a/drivers/power/exynos-tmu.c
+++ b/drivers/power/exynos-tmu.c
@@ -190,7 +190,7 @@ static int get_tmu_fdt_values(struct tmu_info *info, const 
void *blob)
  COMPAT_SAMSUNG_EXYNOS_TMU);
if (node < 0) {
debug("EXYNOS_TMU: No node for tmu in device tree\n");
-   return -1;
+   return -ENODEV;
}
 
/*
@@ -202,7 +202,7 @@ static int get_tmu_fdt_values(struct tmu_info *info, const 
void *blob)
addr = fdtdec_get_addr(blob, node, "reg");
if (addr == FDT_ADDR_T_NONE) {
debug("%s: Missing tmu-base\n", __func__);
-   return -1;
+   return -ENODEV;
}
info->tmu_base = (struct exynos5_tmu_reg *)addr;
 
@@ -246,11 +246,11 @@ static int get_tmu_fdt_values(struct tmu_info *info, 
const void *blob)
 
if (error) {
debug("fail to get tmu node properties\n");
-   return -1;
+   return -EINVAL;
}
 #else
/* Non DT support may never be added. Just in case  */
-   return -1;
+   return -ENODEV;
 #endif
 
return 0;
diff --git a/drivers/power/fuel_gauge/fg_max17042.c 
b/drivers/power/fuel_gauge/fg_max17042.c
index 154ca6a..e433494 100644
--- a/drivers/power/fuel_gauge/fg_max17042.c
+++ b/drivers/power/fuel_gauge/fg_max17042.c
@@ -199,7 +199,7 @@ static int power_update_battery(struct pmic *p, struct pmic 
*bat)
 
if (pmic_probe(p)) {
puts("Can't find max17042 fuel gauge\n");
-   return -1;
+   return -ENODEV;
}
 
ret |= pmic_reg_read(p, MAX17042_VFSOC, );
@@ -224,7 +224,7 @@ static int power_check_battery(struct pmic *p, struct pmic 
*bat)
 
if (pmic_probe(p)) {
puts("Can't find max17042 fuel gauge\n");
-   return -1;
+   return -ENODEV;
}
 
ret |= pmic_reg_read(p, MAX17042_STATUS, );
diff --git a/drivers/power/mfd/fg_max77693.c b/drivers/power/mfd/fg_max77693.c
index 4519fed..df15508 100644
--- a/drivers/power/mfd/fg_max77693.c
+++ b/drivers/power/mfd/fg_max77693.c
@@ -52,7 +52,7 @@ static int power_update_battery(struct pmic *p, struct pmic 
*bat)
 
if (pmic_probe(p)) {
puts("Can't find max77693 fuel gauge\n");
-   return -1;
+   return -ENODEV;
}
 
ret = max77693_get_soc(>bat->state_of_chrg);
@@ -74,7 +74,7 @@ static int power_check_battery(struct pmic *p, struct pmic 
*bat)
 
if (pmic_probe(p)) {
puts("Can't find max77693 

[U-Boot] [PATCH] power: change from meaningless value to error number

[Jaehoon Chung]

'-1' is absolutely meaningless value.
This patch changed from meaningless value to error number.

Signed-off-by: Jaehoon Chung 
---
 drivers/power/axp152.c |  2 +-
 drivers/power/axp209.c |  2 +-
 drivers/power/battery/bat_trats2.c |  2 +-
 drivers/power/exynos-tmu.c |  8 
 drivers/power/fuel_gauge/fg_max17042.c |  4 ++--
 drivers/power/mfd/fg_max77693.c|  4 ++--
 drivers/power/mfd/pmic_max77693.c  |  8 
 drivers/power/palmas.c | 11 +++
 drivers/power/pmic/pmic_hi6553.c   |  4 ++--
 drivers/power/pmic/pmic_max77686.c | 18 +-
 drivers/power/pmic/pmic_max8997.c  |  8 
 drivers/power/power_core.c |  8 
 drivers/power/power_i2c.c  | 22 +++---
 drivers/power/power_spi.c  | 18 ++
 drivers/power/tps6586x.c   | 12 ++--
 15 files changed, 64 insertions(+), 67 deletions(-)

diff --git a/drivers/power/axp152.c b/drivers/power/axp152.c
index cd07275..c4b3fe5 100644
--- a/drivers/power/axp152.c
+++ b/drivers/power/axp152.c
@@ -75,7 +75,7 @@ int axp_init(void)
return rc;
 
if (ver != 0x05)
-   return -1;
+   return -EINVAL;
 
return 0;
 }
diff --git a/drivers/power/axp209.c b/drivers/power/axp209.c
index 731b75e..4b25ef2 100644
--- a/drivers/power/axp209.c
+++ b/drivers/power/axp209.c
@@ -158,7 +158,7 @@ int axp_init(void)
ver &= 0x0f;
 
if (ver != 0x1)
-   return -1;
+   return -EINVAL;
 
/* Mask all interrupts */
for (i = AXP209_IRQ_ENABLE1; i <= AXP209_IRQ_ENABLE5; i++) {
diff --git a/drivers/power/battery/bat_trats2.c 
b/drivers/power/battery/bat_trats2.c
index 57221ad..6329e02 100644
--- a/drivers/power/battery/bat_trats2.c
+++ b/drivers/power/battery/bat_trats2.c
@@ -18,7 +18,7 @@ static int power_battery_charge(struct pmic *bat)
struct power_battery *p_bat = bat->pbat;
 
if (bat->chrg->chrg_state(p_bat->chrg, PMIC_CHARGER_ENABLE, 450))
-   return -1;
+   return -EINVAL;
 
return 0;
 }
diff --git a/drivers/power/exynos-tmu.c b/drivers/power/exynos-tmu.c
index b9968c2..f9be148 100644
--- a/drivers/power/exynos-tmu.c
+++ b/drivers/power/exynos-tmu.c
@@ -190,7 +190,7 @@ static int get_tmu_fdt_values(struct tmu_info *info, const 
void *blob)
  COMPAT_SAMSUNG_EXYNOS_TMU);
if (node < 0) {
debug("EXYNOS_TMU: No node for tmu in device tree\n");
-   return -1;
+   return -;
}
 
/*
@@ -202,7 +202,7 @@ static int get_tmu_fdt_values(struct tmu_info *info, const 
void *blob)
addr = fdtdec_get_addr(blob, node, "reg");
if (addr == FDT_ADDR_T_NONE) {
debug("%s: Missing tmu-base\n", __func__);
-   return -1;
+   return -ENODEV;
}
info->tmu_base = (struct exynos5_tmu_reg *)addr;
 
@@ -246,11 +246,11 @@ static int get_tmu_fdt_values(struct tmu_info *info, 
const void *blob)
 
if (error) {
debug("fail to get tmu node properties\n");
-   return -1;
+   return -EINVAL;
}
 #else
/* Non DT support may never be added. Just in case  */
-   return -1;
+   return -ENODEV;
 #endif
 
return 0;
diff --git a/drivers/power/fuel_gauge/fg_max17042.c 
b/drivers/power/fuel_gauge/fg_max17042.c
index 154ca6a..e433494 100644
--- a/drivers/power/fuel_gauge/fg_max17042.c
+++ b/drivers/power/fuel_gauge/fg_max17042.c
@@ -199,7 +199,7 @@ static int power_update_battery(struct pmic *p, struct pmic 
*bat)
 
if (pmic_probe(p)) {
puts("Can't find max17042 fuel gauge\n");
-   return -1;
+   return -ENODEV;
}
 
ret |= pmic_reg_read(p, MAX17042_VFSOC, );
@@ -224,7 +224,7 @@ static int power_check_battery(struct pmic *p, struct pmic 
*bat)
 
if (pmic_probe(p)) {
puts("Can't find max17042 fuel gauge\n");
-   return -1;
+   return -ENODEV;
}
 
ret |= pmic_reg_read(p, MAX17042_STATUS, );
diff --git a/drivers/power/mfd/fg_max77693.c b/drivers/power/mfd/fg_max77693.c
index 4519fed..df15508 100644
--- a/drivers/power/mfd/fg_max77693.c
+++ b/drivers/power/mfd/fg_max77693.c
@@ -52,7 +52,7 @@ static int power_update_battery(struct pmic *p, struct pmic 
*bat)
 
if (pmic_probe(p)) {
puts("Can't find max77693 fuel gauge\n");
-   return -1;
+   return -ENODEV;
}
 
ret = max77693_get_soc(>bat->state_of_chrg);
@@ -74,7 +74,7 @@ static int power_check_battery(struct pmic *p, struct pmic 
*bat)
 
if (pmic_probe(p)) {
puts("Can't find max77693 fuel gauge\n");
-   return -1;
+   return 

Re: [U-Boot] Problem with qspi when using micron devices

[Phil Edworthy]

Hi Jagan,

On 07 December 2016 08:03, Phil Edworthy wrote:
> Hi Jagan,
> 
> When using Micron devices, SPI flash with quad mode does not work since
> commit
> c56ae7519f141523ba1248b22b5b5169b21772fe "sf: Fix quad bit set for micron
> devices".
> 
> This has been pointed out before, details about why the patch does work are
> here:
> http://lists.denx.de/pipermail/u-boot/2016-March/248566.html
> 
> I know you are working on spi-nor, but it really would be good to revert the
> patch.

Is there any reason why you cannot revert 
c56ae7519f141523ba1248b22b5b5169b21772fe?
>From what I see, this patch has caused a few problems already:
http://lists.denx.de/pipermail/u-boot/2016-March/248566.html
http://lists.denx.de/pipermail/u-boot/2016-July/261005.html 
http://lists.denx.de/pipermail/u-boot/2016-November/271634.html

Thanks
Phil
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[U-Boot] [PATCH] armv8: fsl-lsch2: enable snoopable usb read and write

[Changming Huang]

By default the USB IP on the ls1012a/ls1043a/ls1046a SoCs does not
generat coherent/snoopable transactions. Here enable it in the
SCFG_SNPCNFGCR register.
In addition, the dma-coherent property must be set in USB DTS nodes.

Signed-off-by: Changming Huang 
---
 arch/arm/cpu/armv8/fsl-layerscape/soc.c|   13 -
 .../include/asm/arch-fsl-layerscape/immap_lsch2.h  |6 ++
 2 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 2f54625..74eb8a1 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -340,6 +340,7 @@ void fsl_lsch2_early_init_f(void)
 {
struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
+   u32 snp_usb;
 
 #ifdef CONFIG_LAYERSCAPE_NS_ACCESS
enable_layerscape_ns_access();
@@ -352,11 +353,21 @@ void fsl_lsch2_early_init_f(void)
 #if defined(CONFIG_FSL_QSPI) && !defined(CONFIG_QSPI_BOOT)
out_be32(>qspi_cfg, SCFG_QSPI_CLKSEL);
 #endif
+
+   snp_usb = SCFG_SNPCNFGCR_USB1RDSNP | SCFG_SNPCNFGCR_USB1WRSNP;
+#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
+   snp_usb |= SCFG_SNPCNFGCR_USB2WRSNP |
+   SCFG_SNPCNFGCR_USB2RDSNP |
+   SCFG_SNPCNFGCR_USB3WRSNP |
+   SCFG_SNPCNFGCR_USB3RDSNP;
+#endif
+
/* Make SEC reads and writes snoopable */
setbits_be32(>snpcnfgcr, SCFG_SNPCNFGCR_SECRDSNP |
 SCFG_SNPCNFGCR_SECWRSNP |
 SCFG_SNPCNFGCR_SATARDSNP |
-SCFG_SNPCNFGCR_SATAWRSNP);
+SCFG_SNPCNFGCR_SATAWRSNP |
+snp_usb);
 
/*
 * Enable snoop requests and DVM message requests for
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h 
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index b3cfd89..b82db03 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -340,6 +340,12 @@ struct ccsr_gur {
 #define SCFG_SNPCNFGCR_SECWRSNP0x4000
 #define SCFG_SNPCNFGCR_SATARDSNP   0x0080
 #define SCFG_SNPCNFGCR_SATAWRSNP   0x0040
+#define SCFG_SNPCNFGCR_USB1RDSNP   0x0020
+#define SCFG_SNPCNFGCR_USB1WRSNP   0x0010
+#define SCFG_SNPCNFGCR_USB2WRSNP   0x0001
+#define SCFG_SNPCNFGCR_USB2RDSNP   0x8000
+#define SCFG_SNPCNFGCR_USB3WRSNP   0x4000
+#define SCFG_SNPCNFGCR_USB3RDSNP   0x2000
 
 /* Supplemental Configuration Unit */
 struct ccsr_scfg {
-- 
1.7.9.5

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[U-Boot] [PATCH 1/2] board: freescale: ls1012a: Enable secure DDR on LS1012A platforms

[Prabhakar Kushwaha]

PPA binary needs to be relocated on secure DDR, hence marking out
a portion of DDR as secure if CONFIG_SYS_MEM_RESERVE_SECURE flag
is set

Signed-off-by: Hou Zhiqiang 
Signed-off-by: Abhimanyu Saini 
Signed-off-by: Prabhakar Kushwaha 
---
 arch/arm/include/asm/arch-fsl-layerscape/config.h |  3 +++
 board/freescale/ls1012afrdm/ls1012afrdm.c | 29 ++
 board/freescale/ls1012aqds/ls1012aqds.c   | 30 +++
 board/freescale/ls1012ardb/ls1012ardb.c   | 29 ++
 include/configs/ls1012a_common.h  |  1 +
 5 files changed, 92 insertions(+)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h 
b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index c50894a..c8b9787 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -186,6 +186,9 @@
 
 #define GICD_BASE  0x01401000
 #define GICC_BASE  0x01402000
+#define CONFIG_SYS_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30)
+#define CONFIG_MAX_MEM_MAPPED  CONFIG_SYS_DDR_BLOCK1_SIZE
+
 #elif defined(CONFIG_ARCH_LS1046A)
 #define CONFIG_SYS_FMAN_V3
 #define CONFIG_SYS_NUM_FMAN1
diff --git a/board/freescale/ls1012afrdm/ls1012afrdm.c 
b/board/freescale/ls1012afrdm/ls1012afrdm.c
index b03bdb8..c2432c3 100644
--- a/board/freescale/ls1012afrdm/ls1012afrdm.c
+++ b/board/freescale/ls1012afrdm/ls1012afrdm.c
@@ -85,3 +85,32 @@ int ft_board_setup(void *blob, bd_t *bd)
 
return 0;
 }
+
+void dram_init_banksize(void)
+{
+   /*
+* gd->arch.secure_ram tracks the location of secure memory.
+* It was set as if the memory starts from 0.
+* The address needs to add the offset of its bank.
+*/
+   gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+   if (gd->ram_size > CONFIG_SYS_DDR_BLOCK1_SIZE) {
+   gd->bd->bi_dram[0].size = CONFIG_SYS_DDR_BLOCK1_SIZE;
+   gd->bd->bi_dram[1].start = CONFIG_SYS_DDR_BLOCK2_BASE;
+   gd->bd->bi_dram[1].size = gd->ram_size -
+   CONFIG_SYS_DDR_BLOCK1_SIZE;
+#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
+   gd->arch.secure_ram = gd->bd->bi_dram[1].start +
+   gd->arch.secure_ram -
+   CONFIG_SYS_DDR_BLOCK1_SIZE;
+   gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
+#endif
+   } else {
+   gd->bd->bi_dram[0].size = gd->ram_size;
+#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
+   gd->arch.secure_ram = gd->bd->bi_dram[0].start +
+   gd->arch.secure_ram;
+   gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
+#endif
+   }
+}
diff --git a/board/freescale/ls1012aqds/ls1012aqds.c 
b/board/freescale/ls1012aqds/ls1012aqds.c
index 94440b3..1562edd 100644
--- a/board/freescale/ls1012aqds/ls1012aqds.c
+++ b/board/freescale/ls1012aqds/ls1012aqds.c
@@ -21,6 +21,7 @@
 #include 
 #include 
 #include 
+#include "../../../arch/arm/include/asm/global_data.h"
 
 #include "../common/qixis.h"
 #include "ls1012aqds_qixis.h"
@@ -131,3 +132,32 @@ int ft_board_setup(void *blob, bd_t *bd)
return 0;
 }
 #endif
+
+void dram_init_banksize(void)
+{
+   /*
+* gd->arch.secure_ram tracks the location of secure memory.
+* It was set as if the memory starts from 0.
+* The address needs to add the offset of its bank.
+*/
+   gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+   if (gd->ram_size > CONFIG_SYS_DDR_BLOCK1_SIZE) {
+   gd->bd->bi_dram[0].size = CONFIG_SYS_DDR_BLOCK1_SIZE;
+   gd->bd->bi_dram[1].start = CONFIG_SYS_DDR_BLOCK2_BASE;
+   gd->bd->bi_dram[1].size = gd->ram_size -
+   CONFIG_SYS_DDR_BLOCK1_SIZE;
+#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
+   gd->arch.secure_ram = gd->bd->bi_dram[1].start +
+   gd->arch.secure_ram -
+   CONFIG_SYS_DDR_BLOCK1_SIZE;
+   gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
+#endif
+   } else {
+   gd->bd->bi_dram[0].size = gd->ram_size;
+#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
+   gd->arch.secure_ram = gd->bd->bi_dram[0].start +
+   gd->arch.secure_ram;
+   gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
+#endif
+   }
+}
diff --git a/board/freescale/ls1012ardb/ls1012ardb.c 
b/board/freescale/ls1012ardb/ls1012ardb.c
index 778434d..bc05fbe 100644
--- a/board/freescale/ls1012ardb/ls1012ardb.c
+++ b/board/freescale/ls1012ardb/ls1012ardb.c
@@ -121,3 +121,32 @@ int ft_board_setup(void *blob, bd_t *bd)
 
return 0;
 }
+
+void dram_init_banksize(void)
+{
+   /*
+* gd->secure_ram tracks the location of secure memory.
+* It was set as if the memory starts from 0.
+* 

[U-Boot] [PATCH] mmc: Extend dependencies for zynq sdhci

[Michal Simek]

There is hard dependency on BLK and DM_MMC which is also used by ATMEL
and ROCKCHIP.

Signed-off-by: Michal Simek 
---

 drivers/mmc/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 5e84a4149146..998391328970 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -83,7 +83,7 @@ config PIC32_SDHCI
 
 config ZYNQ_SDHCI
bool "Arasan SDHCI controller support"
-   depends on DM_MMC && OF_CONTROL
+   depends on DM_MMC && OF_CONTROL && BLK && DM_MMC_OPS
help
  Support for Arasan SDHCI host controller on Zynq/ZynqMP ARM SoCs 
platform
 
-- 
1.9.1

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Re: [U-Boot] [PATCH v2 0/6] cleanup and enhancements for Colibri VFxx

[Stefano Babic]

Hi Stefan,

On 14/12/2016 01:57, Stefan Agner wrote:
> On 2016-11-30 13:41, Stefan Agner wrote:
>> From: Stefan Agner 
>>
>> This patchset cleans up the board file, speeds up NAND slightly
>> and enhances the board support with device tree MTD partition
>> support.
>>
>> It also fixes a bug in the new Toradex config block code.
>>
>> Not sure through which tree that should go, especially since
>> patch 1 and 2 touches common code... Tom?
> 
> Anything holding us back merging this?

I take care of this.

Regards,
Stefano


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[U-Boot] [PATCH 1/3] power: pmic: add the max8998 controller for DM

[Jaehoon Chung]

Add the max8998 controller for Driver model.
Samsung S5P series are using max8998 pmic controller.
In future, it should be supported the regulator framework.

Signed-off-by: Jaehoon Chung 
---
 drivers/power/pmic/Kconfig   |  7 +
 drivers/power/pmic/Makefile  |  1 +
 drivers/power/pmic/max8998.c | 61 
 3 files changed, 69 insertions(+)
 create mode 100644 drivers/power/pmic/max8998.c

diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig
index ce204b3..5e244c8 100644
--- a/drivers/power/pmic/Kconfig
+++ b/drivers/power/pmic/Kconfig
@@ -54,6 +54,13 @@ config DM_PMIC_MAX77686
This config enables implementation of driver-model pmic uclass features
for PMIC MAX77686. The driver implements read/write operations.
 
+config DM_PMIC_MAX8998
+   bool "Enable Driver Model for PMIC MAX8998"
+   depends on DM_PMIC
+   ---help---
+   This config enables implementation of driver-model pmic uclass features
+   for PMIC MAX8998. The driver implements read/write operations.
+
 config PMIC_PM8916
bool "Enable Driver Model for Qualcomm PM8916 PMIC"
depends on DM_PMIC
diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile
index cd1c694..b4ac7d2 100644
--- a/drivers/power/pmic/Makefile
+++ b/drivers/power/pmic/Makefile
@@ -7,6 +7,7 @@
 
 obj-$(CONFIG_DM_PMIC) += pmic-uclass.o
 obj-$(CONFIG_DM_PMIC_MAX77686) += max77686.o
+obj-$(CONFIG_DM_PMIC_MAX8998) += max8998.o
 obj-$(CONFIG_DM_PMIC_PFUZE100) += pfuze100.o
 obj-$(CONFIG_PMIC_S2MPS11) += s2mps11.o
 obj-$(CONFIG_DM_PMIC_SANDBOX) += sandbox.o i2c_pmic_emul.o
diff --git a/drivers/power/pmic/max8998.c b/drivers/power/pmic/max8998.c
new file mode 100644
index 000..3baa8da
--- /dev/null
+++ b/drivers/power/pmic/max8998.c
@@ -0,0 +1,61 @@
+/*
+ *  Copyright (C) 2016 Samsung Electronics
+ *  Jaehoon Chung 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int max8998_reg_count(struct udevice *dev)
+{
+   return PMIC_NUM_OF_REGS;
+}
+
+static int max8998_write(struct udevice *dev, uint reg, const uint8_t *buff,
+   int len)
+{
+   int ret;
+
+   ret = dm_i2c_write(dev, reg, buff, len);
+   if (ret)
+   error("write error to device: %p register: %#x!", dev, reg);
+
+   return ret;
+}
+
+static int max8998_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
+{
+   int ret;
+
+   ret = dm_i2c_read(dev, reg, buff, len);
+   if (ret)
+   error("read error from device: %p register: %#x!", dev, reg);
+
+   return ret;
+}
+
+static struct dm_pmic_ops max8998_ops = {
+   .reg_count = max8998_reg_count,
+   .read   = max8998_read,
+   .write  = max8998_write,
+};
+
+static const struct udevice_id max8998_ids[] = {
+   { .compatible = "maxim,max8998" },
+   { }
+};
+
+U_BOOT_DRIVER(pmic_max8998) = {
+   .name   = "max8998_pmic",
+   .id = UCLASS_PMIC,
+   .of_match   = max8998_ids,
+   .ops= _ops,
+};
-- 
2.10.2

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[U-Boot] [PATCH 3/3] configs: enable the DM_PMIC and DM_I2C_GPIO for max8998 pmic

[Jaehoon Chung]

Enable the DM_PMIC and DM_I2C_GPIO for using max8998 pmic.

Signed-off-by: Jaehoon Chung 
---
 configs/s5p_goni_defconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig
index 4cbf022..aa61ef4 100644
--- a/configs/s5p_goni_defconfig
+++ b/configs/s5p_goni_defconfig
@@ -29,3 +29,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Samsung"
 CONFIG_G_DNL_VENDOR_NUM=0x04e8
 CONFIG_G_DNL_PRODUCT_NUM=0x6601
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_MAX8998=y
+CONFIG_DM_I2C_GPIO=y
-- 
2.10.2

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[U-Boot] [PATCH 0/3] dm: goni: support the DM PMIC

[Jaehoon Chung]

This patchest is for supporting pmic driver-model on Goni board.
(Goni board is S5PC110.)

For using that, add the new file as max8998.c for only driver-model.
pmic_max8998.c is remained for legacy.
In future, it might be removed. Instead, max8998 should be used.

*dm tree
 serial  [ + ]|-- serial@e2900800
 i2c [   ]`-- i2c-pmic
 pmic[   ]`-- pmic@66

*dm uclass
uclass 20: i2c
- * i2c-pmic @ 47f6c6d0, seq 3, (req 3)

uclass 22: i2c_generic
uclass 42: pmic
- * pmic@66 @ 47f6c748, seq 0, (req -1)

* After using pmic command.
Goni # pmic list
| Name| Parent name | Parent uclass @ seq
| pmic@66 | i2c-pmic| i2c @ 3

Node, it needs to implement the regulator driver for using regulator framework.

Jaehoon Chung (3):
  power: pmic: add the max8998 controller for DM
  arm: dts: s5pc1xx-goni: add the pmic node for using DM
  configs: enable the DM_PMIC and DM_I2C_GPIO for max8998 pmic

 arch/arm/dts/s5pc1xx-goni.dts | 165 ++
 configs/s5p_goni_defconfig|   3 +
 drivers/power/pmic/Kconfig|   7 ++
 drivers/power/pmic/Makefile   |   1 +
 drivers/power/pmic/max8998.c  |  61 
 5 files changed, 237 insertions(+)
 create mode 100644 drivers/power/pmic/max8998.c

-- 
2.10.2

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[U-Boot] [PATCH 2/3] arm: dts: s5pc1xx-goni: add the pmic node for using DM

[Jaehoon Chung]

To use driver-model adds the pmic node for max8998.
This is used as kerel device-tree in Linux.

Signed-off-by: Jaehoon Chung 
---
 arch/arm/dts/s5pc1xx-goni.dts | 165 ++
 1 file changed, 165 insertions(+)

diff --git a/arch/arm/dts/s5pc1xx-goni.dts b/arch/arm/dts/s5pc1xx-goni.dts
index 7bbfe59..e80132d 100644
--- a/arch/arm/dts/s5pc1xx-goni.dts
+++ b/arch/arm/dts/s5pc1xx-goni.dts
@@ -19,6 +19,7 @@
serial2 = "/serial@e2900800";
console = "/serial@e2900800";
pinctrl0 = 
+   i2c3 = _pmic;
};
 
pinctrl0: pinctrl@e020 {
@@ -32,4 +33,168 @@
id = <2>;
};
 
+   i2c_pmic: i2c-pmic {
+   compatible = "i2c-gpio";
+   gpios = < 0 0>, /* sda */
+   < 3 0>; /* scl */
+   i2c-gpio,delay-us = <2>;/* ~100 kHz */
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "okay";
+
+   pmic@66 {
+   compatible = "maxim,max8998";
+   reg = <0x66 0 0>;
+
+   voltage-regulators {
+   ldo2_reg: LDO2 {
+   regulator-compatible = "LDO2";
+   regulator-name = "VALIVE_1.1V";
+   regulator-min-microvolt = <110>;
+   regulator-max-microvolt = <110>;
+   regulator-always-on;
+   };
+
+   ldo3_reg: LDO3 {
+   regulator-compatible = "LDO3";
+   regulator-name = "VUSB+MIPI_1.1V";
+   regulator-min-microvolt = <110>;
+   regulator-max-microvolt = <110>;
+   regulator-always-on;
+   };
+
+   ldo4_reg: LDO4 {
+   regulator-compatible = "LDO4";
+   regulator-name = "VADC_3.3V";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   };
+
+   ldo5_reg: LDO5 {
+   regulator-compatible = "LDO5";
+   regulator-name = "VTF_2.8V";
+   regulator-min-microvolt = <280>;
+   regulator-max-microvolt = <280>;
+   };
+
+   ldo6_reg: LDO6 {
+   regulator-compatible = "LDO6";
+   regulator-name = "VCC_3.3V";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   };
+
+   ldo7_reg: LDO7 {
+   regulator-compatible = "LDO7";
+   regulator-name = "VLCD_1.8V";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+   regulator-always-on;
+   };
+
+   ldo8_reg: LDO8 {
+   regulator-compatible = "LDO8";
+   regulator-name = "VUSB+VDAC_3.3V";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   };
+
+   ldo9_reg: LDO9 {
+   regulator-compatible = "LDO9";
+   regulator-name = "VCC+VCAM_2.8V";
+   regulator-min-microvolt = <280>;
+   regulator-max-microvolt = <280>;
+   };
+
+   ldo10_reg: LDO10 {
+   regulator-compatible = "LDO10";
+   regulator-name = "VPLL_1.1V";
+   regulator-min-microvolt = <110>;
+   regulator-max-microvolt = <110>;
+   regulator-boot-on;
+   };
+
+   ldo11_reg: LDO11 {
+   

Re: [U-Boot] [PATCH v4 2/2] splash: add support for loading splash from a FIT image

[Igor Grinberg]

Hi Tomas,

On 12/14/16 16:23, Tomas Melin wrote:
> Hi Simon, Igor,
> 
> On 12/14/2016 02:53 PM, Igor Grinberg wrote:
>> On 12/13/16 22:29, Simon Glass wrote:
>>
>> I think two above debug() are very legitimate - no need to shout if no 
>> FIT image
>> or no splash in it...
>>
>>> + res = fit_image_get_data_offset(fit_header, node_offset,
>>> + _offset);
>>> + if (res < 0) {
>>> + debug("Could not find 'data-offset' property in FIT\n");
>>> + return res;
>>> + }
>>> +
>>> + res = fit_image_get_data_size(fit_header, node_offset, 
>>> _size);
>>> + if (res < 0) {
>>> + debug("Could not find 'data-size' property in FIT\n");
>>> + return res;
>>> + }
>>
>> Now regarding these two, I'm not sure.
>> Since we have found a valid FIT and also a node with a correct splash 
>> name,
>> probably the intent is that we show the splash, right?
>> But in the two above checks, we find inconsistencies that do not allow 
>> us to
>> show the splash - meaning the FIT is not actually good (am I right 
>> here?).
>> So may be we should report it to the 'user' and allow correcting the FIT?
>> Otherwise, it is impossible to debug the image w/o a debug version of 
>> U-Boot...
>> Do I make sense, or do I miss something?
>
> Yes that makes some sense, but the problem is that then you are
> including error messages always which would never happen in a working
> system (i.e. it just bloats the code).

 Unless, there a kind of corruption or a user mistake and then that same
 user can't even understand what happened because we do not help him with
 an error message.
 You cannot know that these error messages will never happen...
 This is a generic code which can be used by a wide variety of platforms -
 I don't think you can foresee all the possible use cases.

 We are talking about several tens of bytes vs. usability.
 If there is an error, it should be stated as such. It should not just
 exit silently...
>>>
>>> I agree with that, there should definitely be an error printed. It
>>> should say something like 'Failed to load splash screen (err=-4)' or
>>> something like that. The error number should provide some clues and
>>> people can dig in.
>>
>> Great idea!
> 
> splash_load_fit() currently fails silently but still reports the error in
> the return value. And this function is used so that board.c calls 
> splash_source_load()->splash_load_fit().
> The board function call will get notified of the error value as provided
> by the return value for splash_load_fit(). In our board implementation that 
> is 
> actually exactly how it is done, the board function call checks the return
> value and prints ("Failed to load splash screen image, error: %d\n", ret)
> in case there was and error.
> 
> IMHO this is quite good behaviour as is, leaving it up to the implementation
> in the board.c if there should be a error message or not (and if it should 
> bloat the code with another printf or not).

Well, yes this makes sense if you care to do the work in the board code.
Although, I would expect that sometime this code will be called from
a generic board independent place (e.g. init array, etc.).

> 
>
> So long as the error is reported (even if it is not a very specific
> error), people can add DEBUG and track it down.

 That depends who 'people' are? Devs? Users?
>>>
>>> Well in this case the user will never see the problem, unless someone
>>> has screwed up the splash screen image. Mostly I'm talking about devs.
>>>
>>> Better would be to have an expanded debug() system which lets you turn
>>> debugging on globally when hunting for a problem. That would be a nice
>>> project for someone...
>>
>> Yes, indeed that sounds like a nice project.
>> It would be great to be able to specify the debug verbosity on per build
>> basis (e.g. Kconfig).
>>
> 
> Indeed, that would be a great feature.
> 
> Regards,
> Tomas
> 

-- 
Regards,
Igor.
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[U-Boot] [PATCH] gpio: zynq: Remove empty line

[Michal Simek]

Trivial coding style fix.

Signed-off-by: Michal Simek 
---

 drivers/gpio/zynq_gpio.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpio/zynq_gpio.c b/drivers/gpio/zynq_gpio.c
index 8a448c9a41ca..64579a1b6c17 100644
--- a/drivers/gpio/zynq_gpio.c
+++ b/drivers/gpio/zynq_gpio.c
@@ -325,7 +325,6 @@ static const struct dm_gpio_ops gpio_zynq_ops = {
.get_value  = zynq_gpio_get_value,
.set_value  = zynq_gpio_set_value,
.get_function   = zynq_gpio_get_function,
-
 };
 
 static const struct udevice_id zynq_gpio_ids[] = {
-- 
1.9.1

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