[U-Boot] [PATCH] pci: intel: Add Intel FPGA PCIe controller driver

[Ley Foon Tan]

Add PCIe driver for Intel FPGA PCIe IP. This driver operates the PCIe IP in
rootport mode only, the EP mode is not supported. The driver is tested
with the Intel e1000e NIC driver.

Signed-off-by: Ley Foon Tan 
---
 drivers/pci/Kconfig   |   7 +
 drivers/pci/Makefile  |   1 +
 drivers/pci/pcie_intel_fpga.c | 430 ++
 3 files changed, 438 insertions(+)
 create mode 100644 drivers/pci/pcie_intel_fpga.c

diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index c20a0cc..f59803d 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -105,4 +105,11 @@ config PCIE_LAYERSCAPE
  PCIe controllers. The PCIe may works in RC or EP mode according to
  RCW[HOST_AGT_PEX] setting.
 
+config PCIE_INTEL_FPGA
+   bool "Intel FPGA PCIe support"
+   depends on DM_PCI
+   help
+ Say Y here if you want to enable PCIe controller support on Intel
+ FPGA, example Stratix 10.
+
 endif
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index 40ebc06..314c929 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -35,3 +35,4 @@ obj-$(CONFIG_PCIE_DW_MVEBU) += pcie_dw_mvebu.o
 obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape.o
 obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape_fixup.o
 obj-$(CONFIG_PCI_XILINX) += pcie_xilinx.o
+obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o
diff --git a/drivers/pci/pcie_intel_fpga.c b/drivers/pci/pcie_intel_fpga.c
new file mode 100644
index 000..3cdf05b
--- /dev/null
+++ b/drivers/pci/pcie_intel_fpga.c
@@ -0,0 +1,430 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Intel FPGA PCIe host controller driver
+ *
+ * Copyright (C) 2013-2018 Intel Corporation. All rights reserved
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#define RP_TX_REG0 0x2000
+#define RP_TX_CNTRL0x2004
+#define RP_TX_SOP  BIT(0)
+#define RP_TX_EOP  BIT(1)
+#define RP_RXCPL_STATUS0x200C
+#define RP_RXCPL_SOP   BIT(0)
+#define RP_RXCPL_EOP   BIT(1)
+#define RP_RXCPL_REG   0x2008
+#define P2A_INT_STATUS 0x3060
+#define P2A_INT_STS_ALL0xf
+#define P2A_INT_ENABLE 0x3070
+#define RP_CAP_OFFSET  0x70
+
+/* TLP configuration type 0 and 1 */
+#define TLP_FMTTYPE_CFGRD0 0x04/* Configuration Read Type 0 */
+#define TLP_FMTTYPE_CFGWR0 0x44/* Configuration Write Type 0 */
+#define TLP_FMTTYPE_CFGRD1 0x05/* Configuration Read Type 1 */
+#define TLP_FMTTYPE_CFGWR1 0x45/* Configuration Write Type 1 */
+#define TLP_PAYLOAD_SIZE   0x01
+#define TLP_READ_TAG   0x1d
+#define TLP_WRITE_TAG  0x10
+#define RP_DEVFN   0
+
+#define RP_CFG_ADDR(pcie, reg) \
+   ((pcie->hip_base) + (reg) + (1 << 20))
+#define TLP_REQ_ID(bus, devfn) (((bus) << 8) | (devfn))
+
+#define TLP_CFGRD_DW0(pcie, bus)   \
+   bus != pcie->first_busno) ? TLP_FMTTYPE_CFGRD0  \
+ : TLP_FMTTYPE_CFGRD1) << 24) |\
+   TLP_PAYLOAD_SIZE)
+
+#define TLP_CFGWR_DW0(pcie, bus)   \
+   bus != pcie->first_busno) ? TLP_FMTTYPE_CFGWR0  \
+ : TLP_FMTTYPE_CFGWR1) << 24) |\
+   TLP_PAYLOAD_SIZE)
+
+#define TLP_CFG_DW1(pcie, tag, be) \
+   (((TLP_REQ_ID(pcie->first_busno,  RP_DEVFN)) << 16) | (tag << 8) | (be))
+#define TLP_CFG_DW2(bus, dev, fn, offset)  \
+   (((bus) << 24) | ((dev) << 19) | ((fn) << 16) | (offset))
+
+#define TLP_COMP_STATUS(s) (((s) >> 13) & 7)
+#define TLP_BYTE_COUNT(s)  (((s) >> 0) & 0xfff)
+#define TLP_HDR_SIZE   3
+#define TLP_LOOP   500
+#define DWORD_MASK 3
+
+#define IS_ROOT_PORT(pcie, bdf)\
+   ((PCI_BUS(bdf) == pcie->first_busno) ? true : false)
+
+#define PCI_EXP_LNKSTA 18  /* Link Status */
+#define PCI_EXP_LNKSTA_DLLLA   0x2000  /* Data Link Layer Link Active */
+
+/**
+ * struct intel_fpga_pcie - Intel FPGA PCIe controller state
+ * @bus: Pointer to the PCI bus
+ * @cra_base: The base address of CRA register space
+ * @hip_base: The base address of Rootport configuration space
+ * @first_busno: This driver supports multiple PCIe controllers.
+ *   first_busno stores the bus number of the PCIe root-port
+ *   number which may vary depending on the PCIe setup.
+ */
+struct intel_fpga_pcie {
+   struct udevice *bus;
+

[U-Boot] [PATCH 05/10] rockchip: rk322x: move board_debug_uart_init() to rk322x.c

[Kever Yang]

Move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file later for all rockchip SoCs.

Signed-off-by: Kever Yang 
---

 arch/arm/mach-rockchip/rk322x-board-spl.c | 43 ++---
 arch/arm/mach-rockchip/rk322x-board.c | 31 +
 arch/arm/mach-rockchip/rk322x/Makefile|  2 +-
 arch/arm/mach-rockchip/rk322x/rk322x.c| 45 +++
 4 files changed, 49 insertions(+), 72 deletions(-)
 create mode 100644 arch/arm/mach-rockchip/rk322x/rk322x.c

diff --git a/arch/arm/mach-rockchip/rk322x-board-spl.c 
b/arch/arm/mach-rockchip/rk322x-board-spl.c
index b5b178f..2b67e14 100644
--- a/arch/arm/mach-rockchip/rk322x-board-spl.c
+++ b/arch/arm/mach-rockchip/rk322x-board-spl.c
@@ -12,7 +12,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 
@@ -22,45 +21,6 @@ u32 spl_boot_device(void)
 }
 DECLARE_GLOBAL_DATA_PTR;
 
-#define GRF_BASE   0x1100
-#define SGRF_BASE  0x1014
-
-#define DEBUG_UART_BASE0x1103
-
-void board_debug_uart_init(void)
-{
-   static struct rk322x_grf * const grf = (void *)GRF_BASE;
-   enum {
-   GPIO1B2_SHIFT   = 4,
-   GPIO1B2_MASK= 3 << GPIO1B2_SHIFT,
-   GPIO1B2_GPIO= 0,
-   GPIO1B2_UART1_SIN,
-   GPIO1B2_UART21_SIN,
-
-   GPIO1B1_SHIFT   = 2,
-   GPIO1B1_MASK= 3 << GPIO1B1_SHIFT,
-   GPIO1B1_GPIO= 0,
-   GPIO1B1_UART1_SOUT,
-   GPIO1B1_UART21_SOUT,
-   };
-   enum {
-   CON_IOMUX_UART2SEL_SHIFT= 8,
-   CON_IOMUX_UART2SEL_MASK = 1 << CON_IOMUX_UART2SEL_SHIFT,
-   CON_IOMUX_UART2SEL_2= 0,
-   CON_IOMUX_UART2SEL_21,
-   };
-
-   /* Enable early UART2 channel 1 on the RK322x */
-   rk_clrsetreg(>gpio1b_iomux,
-GPIO1B1_MASK | GPIO1B2_MASK,
-GPIO1B2_UART21_SIN << GPIO1B2_SHIFT |
-GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT);
-   /* Set channel C as UART2 input */
-   rk_clrsetreg(>con_iomux,
-CON_IOMUX_UART2SEL_MASK,
-CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
-}
-
 void rockchip_stimer_init(void)
 {
asm volatile("mcr p15, 0, %0, c14, c0, 0"
@@ -78,6 +38,7 @@ void board_init_f(ulong dummy)
struct udevice *dev;
int ret;
 
+#ifdef CONFIG_DEBUG_UART
/*
 * Debug UART can be used from here if required:
 *
@@ -88,7 +49,7 @@ void board_init_f(ulong dummy)
 */
debug_uart_init();
printascii("SPL Init");
-
+#endif
ret = spl_early_init();
if (ret) {
debug("spl_early_init() failed: %d\n", ret);
diff --git a/arch/arm/mach-rockchip/rk322x-board.c 
b/arch/arm/mach-rockchip/rk322x-board.c
index 6295b1a..43b0d11 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -30,37 +30,8 @@ int board_late_init(void)
 
 int board_init(void)
 {
-#include 
-   /* Enable early UART2 channel 1 on the RK322x */
 #define GRF_BASE   0x1100
-   struct rk322x_grf * const grf = (void *)GRF_BASE;
-   enum {
-   GPIO1B2_SHIFT   = 4,
-   GPIO1B2_MASK= 3 << GPIO1B2_SHIFT,
-   GPIO1B2_GPIO= 0,
-   GPIO1B2_UART21_SIN,
-
-   GPIO1B1_SHIFT   = 2,
-   GPIO1B1_MASK= 3 << GPIO1B1_SHIFT,
-   GPIO1B1_GPIO= 0,
-   GPIO1B1_UART1_SOUT,
-   GPIO1B1_UART21_SOUT,
-   };
-   enum {
-   CON_IOMUX_UART2SEL_SHIFT= 8,
-   CON_IOMUX_UART2SEL_MASK = 1 << CON_IOMUX_UART2SEL_SHIFT,
-   CON_IOMUX_UART2SEL_2= 0,
-   CON_IOMUX_UART2SEL_21,
-   };
-
-   rk_clrsetreg(>gpio1b_iomux,
-GPIO1B1_MASK | GPIO1B2_MASK,
-GPIO1B2_UART21_SIN << GPIO1B2_SHIFT |
-GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT);
-   /* Set channel C as UART2 input */
-   rk_clrsetreg(>con_iomux,
-CON_IOMUX_UART2SEL_MASK,
-CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
+   static struct rk322x_grf * const grf = (void *)GRF_BASE;
 
/*
* The integrated macphy is enabled by default, disable it
diff --git a/arch/arm/mach-rockchip/rk322x/Makefile 
b/arch/arm/mach-rockchip/rk322x/Makefile
index ecb3e8d..89b0fed 100644
--- a/arch/arm/mach-rockchip/rk322x/Makefile
+++ b/arch/arm/mach-rockchip/rk322x/Makefile
@@ -4,6 +4,6 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
-
 obj-y += clk_rk322x.o
+obj-y += rk322x.o
 obj-y += syscon_rk322x.o
diff --git a/arch/arm/mach-rockchip/rk322x/rk322x.c 
b/arch/arm/mach-rockchip/rk322x/rk322x.c

[U-Boot] [PATCH 04/10] rockchip: rk3188: add board_debug_uart_init()

[Kever Yang]

Use board_debug_uart_init() for UART iomux init instead of
do it in board_init_f, and move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file.

Signed-off-by: Kever Yang 
---

 arch/arm/mach-rockchip/rk3188-board-spl.c | 12 +-
 arch/arm/mach-rockchip/rk3188/Makefile|  1 +
 arch/arm/mach-rockchip/rk3188/rk3188.c| 37 +++
 3 files changed, 39 insertions(+), 11 deletions(-)
 create mode 100644 arch/arm/mach-rockchip/rk3188/rk3188.c

diff --git a/arch/arm/mach-rockchip/rk3188-board-spl.c 
b/arch/arm/mach-rockchip/rk3188-board-spl.c
index 3ccc4f1..56ff77b 100644
--- a/arch/arm/mach-rockchip/rk3188-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3188-board-spl.c
@@ -99,17 +99,7 @@ void board_init_f(ulong dummy)
int ret;
 
/* Example code showing how to enable the debug UART on RK3188 */
-#ifdef EARLY_UART
-#include 
-   /* Enable early UART on the RK3188 */
-#define GRF_BASE   0x20008000
-   struct rk3188_grf * const grf = (void *)GRF_BASE;
-
-   rk_clrsetreg(>gpio1b_iomux,
-GPIO1B1_MASK << GPIO1B1_SHIFT |
-GPIO1B0_MASK << GPIO1B0_SHIFT,
-GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
-GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
+#ifdef CONFIG_DEBUG_UART
/*
 * Debug UART can be used from here if required:
 *
diff --git a/arch/arm/mach-rockchip/rk3188/Makefile 
b/arch/arm/mach-rockchip/rk3188/Makefile
index 7fa0104..7dc123a 100644
--- a/arch/arm/mach-rockchip/rk3188/Makefile
+++ b/arch/arm/mach-rockchip/rk3188/Makefile
@@ -6,5 +6,6 @@
 
 ifndef CONFIG_TPL_BUILD
 obj-y += clk_rk3188.o
+obj-y += rk3188.o
 obj-y += syscon_rk3188.o
 endif
diff --git a/arch/arm/mach-rockchip/rk3188/rk3188.c 
b/arch/arm/mach-rockchip/rk3188/rk3188.c
new file mode 100644
index 000..f2adcc9
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3188/rk3188.c
@@ -0,0 +1,37 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include 
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT
+void board_debug_uart_init(void)
+{
+   /* Enable early UART on the RK3188 */
+#define GRF_BASE   0x20008000
+   struct rk3188_grf * const grf = (void *)GRF_BASE;
+   enum {
+   GPIO1B1_SHIFT   = 2,
+   GPIO1B1_MASK= 3,
+   GPIO1B1_GPIO= 0,
+   GPIO1B1_UART2_SOUT,
+   GPIO1B1_JTAG_TDO,
+
+   GPIO1B0_SHIFT   = 0,
+   GPIO1B0_MASK= 3,
+   GPIO1B0_GPIO= 0,
+   GPIO1B0_UART2_SIN,
+   GPIO1B0_JTAG_TDI,
+   };
+
+   rk_clrsetreg(>gpio1b_iomux,
+GPIO1B1_MASK << GPIO1B1_SHIFT |
+GPIO1B0_MASK << GPIO1B0_SHIFT,
+GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
+GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
+}
+#endif
-- 
1.9.1

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[U-Boot] [PATCH 06/10] rockchip: rk3288: use grf structure to access soc_con2

[Kever Yang]

Prefer to use structure to access register if we can.

Signed-off-by: Kever Yang 
---

 arch/arm/mach-rockchip/rk3288/rk3288.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c 
b/arch/arm/mach-rockchip/rk3288/rk3288.c
index acc3b79..8f5aaa1 100644
--- a/arch/arm/mach-rockchip/rk3288/rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/rk3288.c
@@ -5,15 +5,17 @@
  */
 #include 
 #include 
+#include 
 
-#define GRF_SOC_CON2 0xff77024c
+#define GRF_BASE   0xff77
 
 int arch_cpu_init(void)
 {
/* We do some SoC one time setting here. */
+   struct rk3288_grf * const grf = (void *)GRF_BASE;
 
/* Use rkpwm by default */
-   rk_setreg(GRF_SOC_CON2, 1 << 0);
+   rk_setreg(>soc_con2, 1 << 0);
 
return 0;
 }
-- 
1.9.1

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[U-Boot] [PATCH 07/10] rockchip: rk3288: add board_debug_uart_init()

[Kever Yang]

Use board_debug_uart_init() for UART iomux init instead of
do it in board_init_f, and move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file for all rockchip SoCs later.

Signed-off-by: Kever Yang 
---

 arch/arm/mach-rockchip/rk3288-board-spl.c | 11 ++-
 arch/arm/mach-rockchip/rk3288-board-tpl.c | 13 ++---
 arch/arm/mach-rockchip/rk3288/rk3288.c| 13 +
 3 files changed, 17 insertions(+), 20 deletions(-)

diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c 
b/arch/arm/mach-rockchip/rk3288-board-spl.c
index 8f22549..22b12a1 100644
--- a/arch/arm/mach-rockchip/rk3288-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
@@ -160,15 +160,7 @@ void board_init_f(ulong dummy)
int ret;
 
/* Example code showing how to enable the debug UART on RK3288 */
-#include 
-   /* Enable early UART on the RK3288 */
-#define GRF_BASE   0xff77
-   struct rk3288_grf * const grf = (void *)GRF_BASE;
-
-   rk_clrsetreg(>gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
-GPIO7C6_MASK << GPIO7C6_SHIFT,
-GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
-GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
+#ifdef CONFIG_DEBUG_UART
/*
 * Debug UART can be used from here if required:
 *
@@ -179,6 +171,7 @@ void board_init_f(ulong dummy)
 */
debug_uart_init();
debug("\nspl:debug uart enabled in %s\n", __func__);
+#endif
ret = spl_early_init();
if (ret) {
debug("spl_early_init() failed: %d\n", ret);
diff --git a/arch/arm/mach-rockchip/rk3288-board-tpl.c 
b/arch/arm/mach-rockchip/rk3288-board-tpl.c
index e34142c..cd2a33b 100644
--- a/arch/arm/mach-rockchip/rk3288-board-tpl.c
+++ b/arch/arm/mach-rockchip/rk3288-board-tpl.c
@@ -13,7 +13,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -31,20 +30,12 @@ void rockchip_stimer_init(void)
writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
 }
 
-#define GRF_BASE   0xff77
 void board_init_f(ulong dummy)
 {
struct udevice *dev;
int ret;
 
-   /* Example code showing how to enable the debug UART on RK3288 */
-   /* Enable early UART on the RK3288 */
-   struct rk3288_grf * const grf = (void *)GRF_BASE;
-
-   rk_clrsetreg(>gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
-GPIO7C6_MASK << GPIO7C6_SHIFT,
-GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
-GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
+#ifdef CONFIG_DEBUG_UART
/*
 * Debug UART can be used from here if required:
 *
@@ -54,7 +45,7 @@ void board_init_f(ulong dummy)
 * printascii("string");
 */
debug_uart_init();
-
+#endif
ret = spl_early_init();
if (ret) {
debug("spl_early_init() failed: %d\n", ret);
diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c 
b/arch/arm/mach-rockchip/rk3288/rk3288.c
index 8f5aaa1..232796e 100644
--- a/arch/arm/mach-rockchip/rk3288/rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/rk3288.c
@@ -19,3 +19,16 @@ int arch_cpu_init(void)
 
return 0;
 }
+
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT
+void board_debug_uart_init(void)
+{
+   /* Enable early UART on the RK3288 */
+   struct rk3288_grf * const grf = (void *)GRF_BASE;
+
+   rk_clrsetreg(>gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
+GPIO7C6_MASK << GPIO7C6_SHIFT,
+GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
+GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
+}
+#endif
-- 
1.9.1

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[U-Boot] [PATCH 10/10] rockchip: rk3399: add board_debug_uart_init()

[Kever Yang]

Use board_debug_uart_init() for UART iomux init instead of
do it in board_init_f, and move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file for all rockchip SoCs later.

Signed-off-by: Kever Yang 
---

 arch/arm/mach-rockchip/rk3399-board-spl.c | 31 +--
 arch/arm/mach-rockchip/rk3399/rk3399.c| 29 +
 2 files changed, 30 insertions(+), 30 deletions(-)

diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c 
b/arch/arm/mach-rockchip/rk3399-board-spl.c
index d35990e..f88944f 100644
--- a/arch/arm/mach-rockchip/rk3399-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3399-board-spl.c
@@ -80,34 +80,6 @@ void secure_timer_init(void)
writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG);
 }
 
-void board_debug_uart_init(void)
-{
-#define GRF_BASE   0xff77
-   struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
-
-#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff18)
-   /* Enable early UART0 on the RK3399 */
-   rk_clrsetreg(>gpio2c_iomux,
-GRF_GPIO2C0_SEL_MASK,
-GRF_UART0BT_SIN << GRF_GPIO2C0_SEL_SHIFT);
-   rk_clrsetreg(>gpio2c_iomux,
-GRF_GPIO2C1_SEL_MASK,
-GRF_UART0BT_SOUT << GRF_GPIO2C1_SEL_SHIFT);
-#else
-   /* Enable early UART2 channel C on the RK3399 */
-   rk_clrsetreg(>gpio4c_iomux,
-GRF_GPIO4C3_SEL_MASK,
-GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT);
-   rk_clrsetreg(>gpio4c_iomux,
-GRF_GPIO4C4_SEL_MASK,
-GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT);
-   /* Set channel C as UART2 input */
-   rk_clrsetreg(>soc_con7,
-GRF_UART_DBG_SEL_MASK,
-GRF_UART_DBG_SEL_C << GRF_UART_DBG_SEL_SHIFT);
-#endif
-}
-
 void board_init_f(ulong dummy)
 {
struct udevice *pinctrl;
@@ -116,8 +88,7 @@ void board_init_f(ulong dummy)
struct rk3399_grf_regs *grf;
int ret;
 
-#define EARLY_UART
-#ifdef EARLY_UART
+#ifdef CONFIG_DEBUG_UART
/*
 * Debug UART can be used from here if required:
 *
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c 
b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 6a276b9..7d64b72 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -58,3 +58,32 @@ int arch_cpu_init(void)
 
return 0;
 }
+
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT
+void board_debug_uart_init(void)
+{
+   struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
+
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff18)
+   /* Enable early UART0 on the RK3399 */
+   rk_clrsetreg(>gpio2c_iomux,
+GRF_GPIO2C0_SEL_MASK,
+GRF_UART0BT_SIN << GRF_GPIO2C0_SEL_SHIFT);
+   rk_clrsetreg(>gpio2c_iomux,
+GRF_GPIO2C1_SEL_MASK,
+GRF_UART0BT_SOUT << GRF_GPIO2C1_SEL_SHIFT);
+#else
+   /* Enable early UART2 channel C on the RK3399 */
+   rk_clrsetreg(>gpio4c_iomux,
+GRF_GPIO4C3_SEL_MASK,
+GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT);
+   rk_clrsetreg(>gpio4c_iomux,
+GRF_GPIO4C4_SEL_MASK,
+GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT);
+   /* Set channel C as UART2 input */
+   rk_clrsetreg(>soc_con7,
+GRF_UART_DBG_SEL_MASK,
+GRF_UART_DBG_SEL_C << GRF_UART_DBG_SEL_SHIFT);
+#endif
+}
+#endif
-- 
1.9.1

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[U-Boot] [PATCH 03/10] rockchip: rk3036: add board_debug_uart_init()

[Kever Yang]

Use board_debug_uart_init() for UART iomux init instead of
do it in board_init_f, and move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file.

Signed-off-by: Kever Yang 
---

 arch/arm/mach-rockchip/rk3036-board-spl.c | 19 +--
 arch/arm/mach-rockchip/rk3036/Makefile|  1 +
 arch/arm/mach-rockchip/rk3036/rk3036.c| 40 +++
 3 files changed, 42 insertions(+), 18 deletions(-)
 create mode 100644 arch/arm/mach-rockchip/rk3036/rk3036.c

diff --git a/arch/arm/mach-rockchip/rk3036-board-spl.c 
b/arch/arm/mach-rockchip/rk3036-board-spl.c
index 4b4016b..71124c8 100644
--- a/arch/arm/mach-rockchip/rk3036-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3036-board-spl.c
@@ -8,17 +8,11 @@
 #include 
 #include 
 #include 
-#include 
-#include 
 #include 
 #include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define GRF_BASE   0x20008000
-
-#define DEBUG_UART_BASE0x20068000
-
 void rockchip_stimer_init(void)
 {
asm volatile("mcr p15, 0, %0, c14, c0, 0"
@@ -32,18 +26,7 @@ void rockchip_stimer_init(void)
 
 void board_init_f(ulong dummy)
 {
-#ifdef EARLY_DEBUG
-   struct rk3036_grf * const grf = (void *)GRF_BASE;
-   /*
-* NOTE: sd card and debug uart use same iomux in rk3036,
-* so if you enable uart,
-* you can not boot from sdcard
-*/
-   rk_clrsetreg(>gpio1c_iomux,
-GPIO1C3_MASK << GPIO1C3_SHIFT |
-GPIO1C2_MASK << GPIO1C2_SHIFT,
-GPIO1C3_UART2_SOUT << GPIO1C3_SHIFT |
-GPIO1C2_UART2_SIN << GPIO1C2_SHIFT);
+#ifdef CONFIG_DEBUG_UART
debug_uart_init();
 #endif
 
diff --git a/arch/arm/mach-rockchip/rk3036/Makefile 
b/arch/arm/mach-rockchip/rk3036/Makefile
index 20d28f7..299fc50 100644
--- a/arch/arm/mach-rockchip/rk3036/Makefile
+++ b/arch/arm/mach-rockchip/rk3036/Makefile
@@ -10,4 +10,5 @@ ifndef CONFIG_SPL_BUILD
 obj-y += syscon_rk3036.o
 endif
 
+obj-y += rk3036.o
 obj-y += sdram_rk3036.o
diff --git a/arch/arm/mach-rockchip/rk3036/rk3036.c 
b/arch/arm/mach-rockchip/rk3036/rk3036.c
new file mode 100644
index 000..5a486ab
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3036/rk3036.c
@@ -0,0 +1,40 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT
+void board_debug_uart_init(void)
+{
+#define GRF_BASE   0x20008000
+   struct rk3036_grf * const grf = (void *)GRF_BASE;
+   enum {
+   GPIO1C3_SHIFT   = 6,
+   GPIO1C3_MASK= 3 << GPIO1C3_SHIFT,
+   GPIO1C3_GPIO= 0,
+   GPIO1C3_MMC0_D1,
+   GPIO1C3_UART2_SOUT,
+
+   GPIO1C2_SHIFT   = 4,
+   GPIO1C2_MASK= 3 << GPIO1C2_SHIFT,
+   GPIO1C2_GPIO= 0,
+   GPIO1C2_MMC0_D0,
+   GPIO1C2_UART2_SIN,
+   };
+   /*
+* NOTE: sd card and debug uart use same iomux in rk3036,
+* so if you enable uart,
+* you can not boot from sdcard
+*/
+   rk_clrsetreg(>gpio1c_iomux,
+GPIO1C3_MASK << GPIO1C3_SHIFT |
+GPIO1C2_MASK << GPIO1C2_SHIFT,
+GPIO1C3_UART2_SOUT << GPIO1C3_SHIFT |
+GPIO1C2_UART2_SIN << GPIO1C2_SHIFT);
+}
+#endif
+
-- 
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[U-Boot] [PATCH 08/10] rockchip: rk3368: move board_debug_uart_init() to rk3368.c

[Kever Yang]

Move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file later for all rockchip SoCs.

Signed-off-by: Kever Yang 
---

 arch/arm/mach-rockchip/rk3368-board-spl.c |  5 -
 arch/arm/mach-rockchip/rk3368-board-tpl.c | 33 +--
 arch/arm/mach-rockchip/rk3368/rk3368.c| 31 +
 3 files changed, 32 insertions(+), 37 deletions(-)

diff --git a/arch/arm/mach-rockchip/rk3368-board-spl.c 
b/arch/arm/mach-rockchip/rk3368-board-spl.c
index 8055ae5..0a4975b 100644
--- a/arch/arm/mach-rockchip/rk3368-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3368-board-spl.c
@@ -12,17 +12,12 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
-void board_debug_uart_init(void)
-{
-}
-
 void board_init_f(ulong dummy)
 {
struct udevice *pinctrl;
diff --git a/arch/arm/mach-rockchip/rk3368-board-tpl.c 
b/arch/arm/mach-rockchip/rk3368-board-tpl.c
index 60d5aea..78a2b63 100644
--- a/arch/arm/mach-rockchip/rk3368-board-tpl.c
+++ b/arch/arm/mach-rockchip/rk3368-board-tpl.c
@@ -13,7 +13,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -82,42 +81,12 @@ static void sgrf_init(void)
rk_clrreg(>softrst_con[4], DMA2_SRST_REQ);
 }
 
-void board_debug_uart_init(void)
-{
-   /*
-* N.B.: This is called before the device-model has been
-*   initialised. For this reason, we can not access
-*   the GRF address range using the syscon API.
-*/
-   struct rk3368_grf * const grf =
-   (struct rk3368_grf * const)0xff77;
-
-   enum {
-   GPIO2D1_MASK= GENMASK(3, 2),
-   GPIO2D1_GPIO= 0,
-   GPIO2D1_UART0_SOUT  = (1 << 2),
-
-   GPIO2D0_MASK= GENMASK(1, 0),
-   GPIO2D0_GPIO= 0,
-   GPIO2D0_UART0_SIN   = (1 << 0),
-   };
-
-#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff18)
-   /* Enable early UART0 on the RK3368 */
-   rk_clrsetreg(>gpio2d_iomux,
-GPIO2D0_MASK, GPIO2D0_UART0_SIN);
-   rk_clrsetreg(>gpio2d_iomux,
-GPIO2D1_MASK, GPIO2D1_UART0_SOUT);
-#endif
-}
-
 void board_init_f(ulong dummy)
 {
struct udevice *dev;
int ret;
 
-#define EARLY_UART
-#ifdef EARLY_UART
+#ifdef CONFIG_DEBUG_UART
/*
 * Debug UART can be used from here if required:
 *
diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c 
b/arch/arm/mach-rockchip/rk3368/rk3368.c
index f62d91d..2966923 100644
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -97,3 +97,34 @@ int arch_early_init_r(void)
return mcu_init();
 }
 #endif
+
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT
+void board_debug_uart_init(void)
+{
+   /*
+* N.B.: This is called before the device-model has been
+*   initialised. For this reason, we can not access
+*   the GRF address range using the syscon API.
+*/
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff18)
+   struct rk3368_grf * const grf =
+   (struct rk3368_grf * const)0xff77;
+
+   enum {
+   GPIO2D1_MASK= GENMASK(3, 2),
+   GPIO2D1_GPIO= 0,
+   GPIO2D1_UART0_SOUT  = (1 << 2),
+
+   GPIO2D0_MASK= GENMASK(1, 0),
+   GPIO2D0_GPIO= 0,
+   GPIO2D0_UART0_SIN   = (1 << 0),
+   };
+
+   /* Enable early UART0 on the RK3368 */
+   rk_clrsetreg(>gpio2d_iomux,
+GPIO2D0_MASK, GPIO2D0_UART0_SIN);
+   rk_clrsetreg(>gpio2d_iomux,
+GPIO2D1_MASK, GPIO2D1_UART0_SOUT);
+#endif
+}
+#endif
-- 
1.9.1

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[U-Boot] [PATCH 02/10] rockchip; kylin-rk3036: enabl DEBUG UART

[Kever Yang]

Enable debug uart for kylin board in defconfig.

Signed-off-by: Kever Yang 
---

 configs/kylin-rk3036_defconfig | 4 
 1 file changed, 4 insertions(+)

diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig
index c7bd73f..6ff187e 100644
--- a/configs/kylin-rk3036_defconfig
+++ b/configs/kylin-rk3036_defconfig
@@ -8,6 +8,7 @@ CONFIG_ROCKCHIP_RK3036=y
 CONFIG_TARGET_KYLIN_RK3036=y
 CONFIG_SPL_STACK_R_ADDR=0x8
 CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk"
+CONFIG_DEBUG_UART=y
 CONFIG_SPL_SYS_MALLOC_F_LEN=0x0
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 # CONFIG_DISPLAY_CPUINFO is not set
@@ -40,6 +41,9 @@ CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3036=y
 CONFIG_DM_REGULATOR_FIXED=y
 # CONFIG_SPL_DM_SERIAL is not set
+CONFIG_DEBUG_UART_BASE=0x20068000
+CONFIG_DEBUG_UART_CLOCK=2400
+CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
-- 
1.9.1

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[U-Boot] [PATCH 09/10] rockchip: rk3399: use grf structure to access reg

[Kever Yang]

Prefer to use structure to access register if we could.

Signed-off-by: Kever Yang 
---

 arch/arm/mach-rockchip/rk3399/rk3399.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c 
b/arch/arm/mach-rockchip/rk3399/rk3399.c
index dbc248f..6a276b9 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -7,11 +7,13 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
 #define GRF_EMMCCORE_CON11 0xff77f02c
+#define GRF_BASE   0xff77
 
 static struct mm_region rk3399_mem_map[] = {
{
@@ -49,9 +51,10 @@ int dram_init_banksize(void)
 int arch_cpu_init(void)
 {
/* We do some SoC one time setting here. */
+   struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
 
/* Emmc clock generator: disable the clock multipilier */
-   rk_clrreg(GRF_EMMCCORE_CON11, 0x0ff);
+   rk_clrreg(>emmccore_con[11], 0x0ff);
 
return 0;
 }
-- 
1.9.1

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[U-Boot] [PATCH 01/10] rockchip: enable DEBUG_UART_BOARD_INIT by default

[Kever Yang]

All Rockchip SoCs use DEBUG_UART_BOARD_INIT to init per board
UART IOMUX, enable it by default.

Signed-off-by: Kever Yang 
---

 arch/arm/Kconfig   | 2 ++
 arch/arm/mach-rockchip/Kconfig | 3 ---
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a90f870..97e4a93 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1191,6 +1191,7 @@ config ARCH_ROCKCHIP
select DM_PWM
select DM_REGULATOR
select ENABLE_ARM_SOC_BOOT0_HOOK
+   select DEBUG_UART_BOARD_INIT
imply CMD_FASTBOOT
imply FASTBOOT
imply FAT_WRITE
@@ -1201,6 +1202,7 @@ config ARCH_ROCKCHIP
imply SARADC_ROCKCHIP
imply SYS_NS16550
 
+
 config TARGET_THUNDERX_88XX
bool "Support ThunderX 88xx"
select ARM64
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 41f529c..ccb9fa6 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -50,7 +50,6 @@ config ROCKCHIP_RK322X
select SUPPORT_SPL
select SPL
select ROCKCHIP_BROM_HELPER
-   select DEBUG_UART_BOARD_INIT
help
  The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
  including NEON and GPU, Mali-400 graphics, several DDR3 options
@@ -102,7 +101,6 @@ config ROCKCHIP_RK3368
imply SPL_SEPARATE_BSS
imply SPL_SERIAL_SUPPORT
imply TPL_SERIAL_SUPPORT
-   select DEBUG_UART_BOARD_INIT
help
  The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
  into a big and little cluster with 4 cores each) Cortex-A53 including
@@ -138,7 +136,6 @@ config ROCKCHIP_RK3399
select SPL_SEPARATE_BSS
select SPL_SERIAL_SUPPORT
select SPL_DRIVERS_MISC_SUPPORT
-   select DEBUG_UART_BOARD_INIT
select BOARD_LATE_INIT
select ROCKCHIP_BROM_HELPER
help
-- 
1.9.1

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[U-Boot] [PATCH 00/10] rockchip: enable board_debug_uart_init for all soc

[Kever Yang]

ALl rockchip soc use DEBUG UART, and need init the uart iomux
in board_debug_uart_init().
Move the board_debug_uart_init() into soc file so that we can
make all soc config in soc file and share a common board file
later for all rockchip SoCs.



Kever Yang (10):
  rockchip: enable DEBUG_UART_BOARD_INIT by default
  rockchip; kylin-rk3036: enabl DEBUG UART
  rockchip: rk3036: add board_debug_uart_init()
  rockchip: rk3188: add board_debug_uart_init()
  rockchip: rk322x: move board_debug_uart_init() to rk322x.c
  rockchip: rk3288: use grf structure to access soc_con2
  rockchip: rk3288: add board_debug_uart_init()
  rockchip: rk3368: move board_debug_uart_init() to rk3368.c
  rockchip: rk3399: use grf structure to access reg
  rockchip: rk3399: add board_debug_uart_init()

 arch/arm/Kconfig  |  2 ++
 arch/arm/mach-rockchip/Kconfig|  3 ---
 arch/arm/mach-rockchip/rk3036-board-spl.c | 19 +
 arch/arm/mach-rockchip/rk3036/Makefile|  1 +
 arch/arm/mach-rockchip/rk3036/rk3036.c| 40 +++
 arch/arm/mach-rockchip/rk3188-board-spl.c | 12 +
 arch/arm/mach-rockchip/rk3188/Makefile|  1 +
 arch/arm/mach-rockchip/rk3188/rk3188.c| 37 +
 arch/arm/mach-rockchip/rk322x-board-spl.c | 43 ++---
 arch/arm/mach-rockchip/rk322x-board.c | 31 +
 arch/arm/mach-rockchip/rk322x/Makefile|  2 +-
 arch/arm/mach-rockchip/rk322x/rk322x.c| 45 +++
 arch/arm/mach-rockchip/rk3288-board-spl.c | 11 ++--
 arch/arm/mach-rockchip/rk3288-board-tpl.c | 13 ++---
 arch/arm/mach-rockchip/rk3288/rk3288.c| 19 +++--
 arch/arm/mach-rockchip/rk3368-board-spl.c |  5 
 arch/arm/mach-rockchip/rk3368-board-tpl.c | 33 +--
 arch/arm/mach-rockchip/rk3368/rk3368.c| 31 +
 arch/arm/mach-rockchip/rk3399-board-spl.c | 31 +
 arch/arm/mach-rockchip/rk3399/rk3399.c| 34 ++-
 configs/kylin-rk3036_defconfig|  4 +++
 21 files changed, 223 insertions(+), 194 deletions(-)
 create mode 100644 arch/arm/mach-rockchip/rk3036/rk3036.c
 create mode 100644 arch/arm/mach-rockchip/rk3188/rk3188.c
 create mode 100644 arch/arm/mach-rockchip/rk322x/rk322x.c

-- 
1.9.1

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Re: [U-Boot] [RFC PATCH v1 0/1] Migrate IMAGE_FORMAT_LEGACY to Kconfig

[Alex Kiernan]

On Thu, Apr 19, 2018 at 8:39 PM, Tom Rini  wrote:
> On Thu, Apr 19, 2018 at 04:52:30AM +, Alex Kiernan wrote:
>>
>> On the face of it, this is a straightforward moveconfig, but because
>> of how CONFIG_FIT_SIGNATURE, CONFIG_IMAGE_FORMAT_LEGACY and
>> CONFIG_DISABLE_IMAGE_LEGACY interacted when you enabled
>> CONFIG_FIT_SIGNATURE, you got CONFIG_IMAGE_FORMAT_LEGACY disabled
>> immediately unless you had some way of explicitly enabling it
>> elsewhere.
>>
>> Kconfig doesn't give us this - CONFIG_IMAGE_FORMAT_LEGACY starts off
>> enabled, CONFIG_FIT_SIGNATURE starts off disabled and if you enable
>> CONFIG_FIT_SIGNATURE then CONFIG_IMAGE_FORMAT_LEGACY stays enabled.
>>
>> Is there some way to preserve the existing behaviour through Kconfig
>> that I've failed to figure out?
>
> When I do these, it's a multi-step moveconfig.py that goes something
> like:
> - Introduce FOO (no deps)
> - moveconfig.py -y it.
> - Introduce BAR (no deps)
> - moveconfig.py -y it.
> - for FILE in configs/*defconfig;do grep -q FOO $FILE || echo '#
>   CONFIG_FOO is not set' >> $FILE;done
> - Repeat the for loop but for BAR.
> - Introduce deps
> - moveconfig.py -sC
> - Build before/after for a few boards that I know are tricky, use
>   buildman -SCvel/Ssdel to confirm size changes didn't happen.
> - If good, world-build checking sizes.
>
> And in some cases like this particular one, there might need to be an
> initial first comment to invert the logic, and as that can be tricky
> when adding a new option that _should_ be default y, first I add it
> without default y, moveconfig.py -y it, for loop like above, then add
> default y and moveconfig.py -s.
>

Thanks, let me give that a go...

There's a second concern I have once the pieces are all in there when
you're making changes through menuconfig (and friends)... there's no
"weak" default enable in Kconfig (at least as far as I can tell) so if
you select FIT_SIGNATURE, you have to explicitly go and de-select
IMAGE_FORMAT_LEGACY.

Am I missing something, or can we live with that?

-- 
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Re: [U-Boot] [PATCH] board: freescale: ls1012ardb: Add command to switch QSPI bank

[Prabhakar Kushwaha]

Thanks Scott for reviewing this patch

> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Scott
> Wood
> Sent: Friday, April 20, 2018 6:40 AM
> To: Calvin Johnson 
> Cc: U-Boot Mailing List 
> Subject: Re: [U-Boot] [PATCH] board: freescale: ls1012ardb: Add command to
> switch QSPI bank
> 
> On Thu, 2018-04-19 at 14:09 +0530, Calvin Johnson wrote:
> > On Thu, Apr 19, 2018 at 12:17 PM, Scott Wood  wrote:
> > > On Mon, 2018-04-16 at 08:40 +0530, Calvin Johnson wrote:
> > > > On Fri, Apr 13, 2018 at 12:18 AM, Jagdish Gediya
> > > >  > > > >
> > > > wrote:
> > > > > Add command "boot_bank X" to switch the boot bank to either
> > > > > 1 or 2.
> > > >
> > > > Are these functions required as this can be handled by new env
> > > > vars to switch banks?
> > >
> > > If you're going to add something new, a command is much more
> > > pleasant than env vars -- particularly if you stick to something
> > > like the familiar interfaces ("pix altbank", "qix altbank", etc),
> > > and include reporting of which bank was booted from if it's not
> > > there already.  Of course, a fully standardized interface would be
> > > even better.
> >
> > Yes, a fully standardized generic interface supporting all similar
> > platforms with multiple banks
> 
> And other boot sources such as NAND and MMC.


LS1012A has only one boot source i.e. QSPI

> 
> > would be better. What this patch currently does can be done with
> > simple env vars, like :
> >
> > setenv boot_bank_1 'i2c mw 0x24 0x7 0xfc; i2c mw 0x24 0x3 0xf5'
> > setenv boot_bank_2 'i2c mw 0x24 0x7 0xfc; i2c mw 0x24 0x3 0xf4'
> 
> ...if the user knows to env reset those variables after the update (versus
> something that shows up in help), and if they don't get corrupted in a multi-
> user board farm environment, etc.
> 

With env there is always a probability of getting erased. In that case user 
will not have these commands.

Better approach should be command which is always available. If required we can 
update the doc.  

--pk


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Re: [U-Boot] [PATCH] board: freescale: ls1012ardb: Add command to switch QSPI bank

[Calvin Johnson]

> -Original Message-
> From: Scott Wood [mailto:o...@buserror.net]
> Sent: Friday, April 20, 2018 6:40 AM
> To: Calvin Johnson 
> Cc: Jagdish Gediya ; U-Boot Mailing List  b...@lists.denx.de>; Calvin Johnson ; York Sun
> 
> Subject: Re: [U-Boot] [PATCH] board: freescale: ls1012ardb: Add command to
> switch QSPI bank
> 
> On Thu, 2018-04-19 at 14:09 +0530, Calvin Johnson wrote:
> > On Thu, Apr 19, 2018 at 12:17 PM, Scott Wood  wrote:
> > > On Mon, 2018-04-16 at 08:40 +0530, Calvin Johnson wrote:
> > > > On Fri, Apr 13, 2018 at 12:18 AM, Jagdish Gediya  > > > >
> > > > wrote:
> > > > > Add command "boot_bank X" to switch the boot bank to either
> > > > > 1 or 2.
> > > >
> > > > Are these functions required as this can be handled by new env vars to
> > > > switch banks?
> > >
> > > If you're going to add something new, a command is much more pleasant
> than
> > > env
> > > vars -- particularly if you stick to something like the familiar
> > > interfaces
> > > ("pix altbank", "qix altbank", etc), and include reporting of which bank
> > > was
> > > booted from if it's not there already.  Of course, a fully standardized
> > > interface would be even better.
> >
> > Yes, a fully standardized generic interface supporting all similar
> > platforms with multiple banks
> 
> And other boot sources such as NAND and MMC.
> 
> > would be better. What this patch currently does can be done with
> > simple env vars, like :
> >
> > setenv boot_bank_1 'i2c mw 0x24 0x7 0xfc; i2c mw 0x24 0x3 0xf5'
> > setenv boot_bank_2 'i2c mw 0x24 0x7 0xfc; i2c mw 0x24 0x3 0xf4'
> 
> ...if the user knows to env reset those variables after the update (versus
> something that shows up in help), and if they don't get corrupted in a multi-
> user board farm environment, etc.

Make sense. Thanks!

Calvin
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Re: [U-Boot] [PATCH] board: freescale: ls1012ardb: Add command to switch QSPI bank

[Scott Wood]

On Thu, 2018-04-19 at 14:09 +0530, Calvin Johnson wrote:
> On Thu, Apr 19, 2018 at 12:17 PM, Scott Wood  wrote:
> > On Mon, 2018-04-16 at 08:40 +0530, Calvin Johnson wrote:
> > > On Fri, Apr 13, 2018 at 12:18 AM, Jagdish Gediya  > > >
> > > wrote:
> > > > Add command "boot_bank X" to switch the boot bank to either
> > > > 1 or 2.
> > > 
> > > Are these functions required as this can be handled by new env vars to
> > > switch banks?
> > 
> > If you're going to add something new, a command is much more pleasant than
> > env
> > vars -- particularly if you stick to something like the familiar
> > interfaces
> > ("pix altbank", "qix altbank", etc), and include reporting of which bank
> > was
> > booted from if it's not there already.  Of course, a fully standardized
> > interface would be even better.
> 
> Yes, a fully standardized generic interface supporting all similar
> platforms with multiple banks

And other boot sources such as NAND and MMC.

> would be better. What this patch currently does can be done with
> simple env vars, like :
> 
> setenv boot_bank_1 'i2c mw 0x24 0x7 0xfc; i2c mw 0x24 0x3 0xf5'
> setenv boot_bank_2 'i2c mw 0x24 0x7 0xfc; i2c mw 0x24 0x3 0xf4'

...if the user knows to env reset those variables after the update (versus
something that shows up in help), and if they don't get corrupted in a multi-
user board farm environment, etc.

-Scott

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Re: [U-Boot] [PATCH v2 6/8] distro: Extend with RISC-V defines

[Alexander Graf]

On 19.04.18 21:44, Heinrich Schuchardt wrote:
> 
> 
> On 04/19/2018 07:19 PM, Heinrich Schuchardt wrote:
>>
>>
>> On 04/19/2018 05:49 PM, Alexander Graf wrote:
>>> While we don't have VCI or UEFI naming conventions for RISC-V file
>>> paths yet,
>>> we need to search for something. So let's make up a few defines that
>>> at least
>>> allow us to get started until the specs officially include RISC-V.
>>>
>>> Signed-off-by: Alexander Graf 
>>>
>>> ---
>>>
>>> v1 -> v2:
>>>
>>>    - Use edk2 default boot file names
>>> ---
>>>   include/config_distro_bootcmd.h | 14 +-
>>>   1 file changed, 13 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/include/config_distro_bootcmd.h
>>> b/include/config_distro_bootcmd.h
>>> index f567cebd38..eefdfb51cc 100644
>>> --- a/include/config_distro_bootcmd.h
>>> +++ b/include/config_distro_bootcmd.h
>>> @@ -100,6 +100,10 @@
>>>   #define BOOTEFI_NAME "bootia32.efi"
>>>   #elif defined(CONFIG_X86_RUN_64BIT)
>>>   #define BOOTEFI_NAME "bootx64.efi"
>>> +#elif defined(CONFIG_CPU_RISCV_32)
>>> +#define BOOTEFI_NAME "bootriscv32.efi"
>>> +#elif defined(CONFIG_CPU_RISCV_64)
>>> +#define BOOTEFI_NAME "bootriscv64.efi"
>>
>> Thanks for updating this.
>>
>>>   #endif
>>>   #endif
>>> @@ -250,7 +254,15 @@
>>>   #elif defined(CONFIG_X86)
>>>   /* Always assume we're running 64bit */
>>>   #define BOOTENV_EFI_PXE_ARCH "0x7"
>>> -#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:7:UNDI:003000"
>>> +#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch::UNDI:003000"
>>
>> Did you inadvertently modify this line? The change does not relate to
>> the commit message.
>>
>>> +#elif defined(CONFIG_CPU_RISCV_32)
>>> +/* TODO: Register VCI identifier via RFC */
>>> +#define BOOTENV_EFI_PXE_ARCH "0x5032"
>>> +#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:5032:UNDI:003000"
>>
>> Should this be 05032? X86 uses 5 digits.
> 
> These are decimal numbers so this should be
> PXEClient:Arch:20530:UNDI:003000

Turns out there are values defined:

  http://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xml

I'll update it accordingly.


Alex
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[U-Boot] [PATCH v2] arm: ti: boot: Extract PARTS_DEFAULT to boot.h

[Sam Protsenko]

Eliminate code duplication: the same PARTS_DEFAULT was defined in
am57xx_evm.h and in dra7xx_evm.h. Extract it to environment/boot.h and
use in all OMAP5-based boards.

Signed-off-by: Sam Protsenko 
---
 include/configs/am57xx_evm.h   | 25 -
 include/configs/cl-som-am57x.h |  2 ++
 include/configs/cm_t54.h   |  2 ++
 include/configs/dra7xx_evm.h   | 25 -
 include/environment/ti/boot.h  | 27 +--
 5 files changed, 29 insertions(+), 52 deletions(-)

diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h
index d1f73f76a4..886a5696f5 100644
--- a/include/configs/am57xx_evm.h
+++ b/include/configs/am57xx_evm.h
@@ -38,31 +38,6 @@
 
 #define CONFIG_SYS_OMAP_ABE_SYSCK
 
-/* Define the default GPT table for eMMC */
-#define PARTS_DEFAULT \
-   /* Linux partitions */ \
-   "uuid_disk=${uuid_gpt_disk};" \
-   "name=bootloader,start=384K,size=1792K,uuid=${uuid_gpt_bootloader};" \
-   "name=rootfs,start=2688K,size=-,uuid=${uuid_gpt_rootfs}\0" \
-   /* Android partitions */ \
-   "partitions_android=" \
-   "uuid_disk=${uuid_gpt_disk};" \
-   "name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};" \
-   "name=bootloader,size=1792K,uuid=${uuid_gpt_bootloader};" \
-   "name=environment,size=128K,uuid=${uuid_gpt_environment};" \
-   "name=misc,size=128K,uuid=${uuid_gpt_misc};" \
-   "name=reserved,size=256K,uuid=${uuid_gpt_reserved};" \
-   "name=efs,size=16M,uuid=${uuid_gpt_efs};" \
-   "name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \
-   "name=recovery,size=40M,uuid=${uuid_gpt_recovery};" \
-   "name=boot,size=10M,uuid=${uuid_gpt_boot};" \
-   "name=system,size=768M,uuid=${uuid_gpt_system};" \
-   "name=vendor,size=256M,uuid=${uuid_gpt_vendor};" \
-   "name=cache,size=256M,uuid=${uuid_gpt_cache};" \
-   "name=ipu1,size=1M,uuid=${uuid_gpt_ipu1};" \
-   "name=ipu2,size=1M,uuid=${uuid_gpt_ipu2};" \
-   "name=userdata,size=-,uuid=${uuid_gpt_userdata}"
-
 #define DFUARGS \
"dfu_bufsiz=0x1\0" \
DFU_ALT_INFO_MMC \
diff --git a/include/configs/cl-som-am57x.h b/include/configs/cl-som-am57x.h
index 9c70cf0b37..709e0375b3 100644
--- a/include/configs/cl-som-am57x.h
+++ b/include/configs/cl-som-am57x.h
@@ -18,6 +18,8 @@
 
 #define CONFIG_SYS_OMAP_ABE_SYSCK
 
+#define PARTS_DEFAULT
+
 #include 
 
 /* misc */
diff --git a/include/configs/cm_t54.h b/include/configs/cm_t54.h
index 6123cd374d..f0d76ed806 100644
--- a/include/configs/cm_t54.h
+++ b/include/configs/cm_t54.h
@@ -14,6 +14,8 @@
 #define CONFIG_CM_T54
 #define CONFIG_DRAM_2G
 
+#define PARTS_DEFAULT
+
 #include 
 
 /* EEPROM related defines */
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index 917a05d701..9b3fb2c913 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -45,31 +45,6 @@
 #define CONFIG_SYS_OMAP_ABE_SYSCK
 
 #ifndef CONFIG_SPL_BUILD
-/* Define the default GPT table for eMMC */
-#define PARTS_DEFAULT \
-   /* Linux partitions */ \
-   "uuid_disk=${uuid_gpt_disk};" \
-   "name=bootloader,start=384K,size=1792K,uuid=${uuid_gpt_bootloader};" \
-   "name=rootfs,start=2688K,size=-,uuid=${uuid_gpt_rootfs}\0" \
-   /* Android partitions */ \
-   "partitions_android=" \
-   "uuid_disk=${uuid_gpt_disk};" \
-   "name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};" \
-   "name=bootloader,size=1792K,uuid=${uuid_gpt_bootloader};" \
-   "name=environment,size=128K,uuid=${uuid_gpt_environment};" \
-   "name=misc,size=128K,uuid=${uuid_gpt_misc};" \
-   "name=reserved,size=256K,uuid=${uuid_gpt_reserved};" \
-   "name=efs,size=16M,uuid=${uuid_gpt_efs};" \
-   "name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \
-   "name=recovery,size=40M,uuid=${uuid_gpt_recovery};" \
-   "name=boot,size=10M,uuid=${uuid_gpt_boot};" \
-   "name=system,size=768M,uuid=${uuid_gpt_system};" \
-   "name=vendor,size=256M,uuid=${uuid_gpt_vendor};" \
-   "name=cache,size=256M,uuid=${uuid_gpt_cache};" \
-   "name=ipu1,size=1M,uuid=${uuid_gpt_ipu1};" \
-   "name=ipu2,size=1M,uuid=${uuid_gpt_ipu2};" \
-   "name=userdata,size=-,uuid=${uuid_gpt_userdata}"
-
 #define DFUARGS \
"dfu_bufsiz=0x1\0" \
DFU_ALT_INFO_MMC \
diff --git a/include/environment/ti/boot.h b/include/environment/ti/boot.h
index 24b7783f88..4f3d748b5c 100644
--- a/include/environment/ti/boot.h
+++ b/include/environment/ti/boot.h
@@ -15,8 +15,31 @@
 #endif
 
 #ifndef PARTS_DEFAULT
-#define PARTS_DEFAULT
-#endif
+/* Define the default GPT table for eMMC */
+#define PARTS_DEFAULT \
+   /* Linux partitions */ \
+   "uuid_disk=${uuid_gpt_disk};" \
+   "name=bootloader,start=384K,size=1792K,uuid=${uuid_gpt_bootloader};" \
+   "name=rootfs,start=2688K,size=-,uuid=${uuid_gpt_rootfs}\0" \
+   /* Android partitions */ \
+   

[U-Boot] [PATCH v2 2/2] cmd: Add dtimg command

[Sam Protsenko]

dtimg command allows user to work with Android DTB/DTBO image format.
Such as, getting the address of desired DTB/DTBO file, printing the dump
of the image in U-Boot shell, etc.

This command is needed to provide Android boot with new Android DT image
format further.

Signed-off-by: Sam Protsenko 
---
 cmd/Kconfig |   8 +++
 cmd/Makefile|   1 +
 cmd/dtimg.c | 142 
 common/Makefile |   4 ++
 4 files changed, 155 insertions(+)
 create mode 100644 cmd/dtimg.c

diff --git a/cmd/Kconfig b/cmd/Kconfig
index bc1d2f31c0..68f3cc7b48 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -256,6 +256,14 @@ config CMD_BOOTMENU
help
  Add an ANSI terminal boot menu command.
 
+config CMD_DTIMG
+   bool "dtimg"
+   help
+ Android DTB/DTBO image manipulation commands. Read dtb/dtbo files from
+ image into RAM, dump image structure information, etc. Those dtb/dtbo
+ files should be merged in one dtb further, which needs to be passed to
+ the kernel, as part of a boot process.
+
 config CMD_ELF
bool "bootelf, bootvx"
default y
diff --git a/cmd/Makefile b/cmd/Makefile
index c4269ac8ac..1cc2e74e9e 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -43,6 +43,7 @@ ifdef CONFIG_POST
 obj-$(CONFIG_CMD_DIAG) += diag.o
 endif
 obj-$(CONFIG_CMD_DISPLAY) += display.o
+obj-$(CONFIG_CMD_DTIMG) += dtimg.o
 obj-$(CONFIG_CMD_ECHO) += echo.o
 obj-$(CONFIG_ENV_IS_IN_EEPROM) += eeprom.o
 obj-$(CONFIG_CMD_EEPROM) += eeprom.o
diff --git a/cmd/dtimg.c b/cmd/dtimg.c
new file mode 100644
index 00..5295a341ad
--- /dev/null
+++ b/cmd/dtimg.c
@@ -0,0 +1,142 @@
+/*
+ * (C) Copyright 2018 Linaro Ltd.
+ * Sam Protsenko 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+
+enum cmd_dtimg_info {
+   CMD_DTIMG_START = 0,
+   CMD_DTIMG_SIZE,
+};
+
+static int do_dtimg_dump(cmd_tbl_t *cmdtp, int flag, int argc,
+char * const argv[])
+{
+   char *endp;
+   ulong hdr_addr;
+
+   if (argc != 2)
+   return CMD_RET_USAGE;
+
+   hdr_addr = simple_strtoul(argv[1], , 16);
+   if (*endp != '\0') {
+   printf("Error: Wrong image address\n");
+   return CMD_RET_FAILURE;
+   }
+
+   if (!android_dt_check_header(hdr_addr)) {
+   printf("Error: DT image header is incorrect\n");
+   return CMD_RET_FAILURE;
+   }
+
+   android_dt_print_contents(hdr_addr);
+
+   return CMD_RET_SUCCESS;
+}
+
+static int dtimg_get_fdt(int argc, char * const argv[], enum cmd_dtimg_info 
cmd)
+{
+   ulong hdr_addr;
+   u32 index;
+   char *endp;
+   ulong fdt_addr;
+   u32 fdt_size;
+   char buf[65];
+
+   if (argc != 4)
+   return CMD_RET_USAGE;
+
+   hdr_addr = simple_strtoul(argv[1], , 16);
+   if (*endp != '\0') {
+   printf("Error: Wrong image address\n");
+   return CMD_RET_FAILURE;
+   }
+
+   if (!android_dt_check_header(hdr_addr)) {
+   printf("Error: DT image header is incorrect\n");
+   return CMD_RET_FAILURE;
+   }
+
+   index = simple_strtoul(argv[2], , 0);
+   if (*endp != '\0') {
+   printf("Error: Wrong index\n");
+   return CMD_RET_FAILURE;
+   }
+
+   if (!android_dt_get_fdt_by_index(hdr_addr, index, _addr, _size))
+   return CMD_RET_FAILURE;
+
+   switch (cmd) {
+   case CMD_DTIMG_START:
+   snprintf(buf, sizeof(buf), "%lx", fdt_addr);
+   break;
+   case CMD_DTIMG_SIZE:
+   snprintf(buf, sizeof(buf), "%x", fdt_size);
+   break;
+   default:
+   printf("Error: Unknown cmd_dtimg_info value: %d\n", cmd);
+   return CMD_RET_FAILURE;
+   }
+
+   env_set(argv[3], buf);
+
+   return CMD_RET_SUCCESS;
+}
+
+static int do_dtimg_start(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+   return dtimg_get_fdt(argc, argv, CMD_DTIMG_START);
+}
+
+static int do_dtimg_size(cmd_tbl_t *cmdtp, int flag, int argc,
+char * const argv[])
+{
+   return dtimg_get_fdt(argc, argv, CMD_DTIMG_SIZE);
+}
+
+static cmd_tbl_t cmd_dtimg_sub[] = {
+   U_BOOT_CMD_MKENT(dump, 2, 0, do_dtimg_dump, "", ""),
+   U_BOOT_CMD_MKENT(start, 4, 0, do_dtimg_start, "", ""),
+   U_BOOT_CMD_MKENT(size, 4, 0, do_dtimg_size, "", ""),
+};
+
+static int do_dtimg(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+   cmd_tbl_t *cp;
+
+   cp = find_cmd_tbl(argv[1], cmd_dtimg_sub, ARRAY_SIZE(cmd_dtimg_sub));
+
+   /* Strip off leading 'dtimg' command argument */
+   argc--;
+   argv++;
+
+   if (!cp || argc > cp->maxargs)
+   return CMD_RET_USAGE;
+   if (flag == CMD_FLAG_REPEAT && !cp->repeatable)
+  

[U-Boot] [PATCH v2 1/2] common: Add support for Android DT image

[Sam Protsenko]

Android documentation recommends new image format for storing DTB/DTBO
files: [1]. To support that format, two things should be done:

1. Add dt_table.h file from Android (BSD-3 relicensed version): [2].
   This header defines structures and constants that we need to work
   with that DT image format.

   Changes:
- re-licensed from Apache to BSD-3
- removed functions declarations
- change the coding style to kernel (make checkpatch happy)

2. Add helper functions for Android DTB/DTBO format. In
   image-android-dt.* files you can find helper functions to work with
   Android DT image format, such us routines for:
- printing the dump of image structure
- getting the address and size of desired dtb/dtbo file

[1] https://source.android.com/devices/architecture/dto/partitions
[2] 
https://android.googlesource.com/platform/system/libufdt/+/58a7582180f477032cd6c74f8d9afad0038e74c3/utils/src/dt_table.h

Signed-off-by: Sam Protsenko 
---
 common/image-android-dt.c  | 157 +
 include/dt_table.h |  46 +++
 include/image-android-dt.h |  21 +
 3 files changed, 224 insertions(+)
 create mode 100644 common/image-android-dt.c
 create mode 100644 include/dt_table.h
 create mode 100644 include/image-android-dt.h

diff --git a/common/image-android-dt.c b/common/image-android-dt.c
new file mode 100644
index 00..9b7683faab
--- /dev/null
+++ b/common/image-android-dt.c
@@ -0,0 +1,157 @@
+/*
+ * (C) Copyright 2018 Linaro Ltd.
+ * Sam Protsenko 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+ * Check if image header is correct.
+ *
+ * @param hdr_addr Start address of DT image
+ * @return true if header is correct or false if header is incorrect
+ */
+bool android_dt_check_header(ulong hdr_addr)
+{
+   const struct dt_table_header *hdr;
+   u32 magic;
+
+   hdr = map_sysmem(hdr_addr, sizeof(*hdr));
+   magic = fdt32_to_cpu(hdr->magic);
+   unmap_sysmem(hdr);
+
+   return magic == DT_TABLE_MAGIC;
+}
+
+/**
+ * Get the address of FDT (dtb or dtbo) in memory by its index in image.
+ *
+ * @param hdr_addr Start address of DT image
+ * @param index Index of desired FDT in image (starting from 0)
+ * @param[out] addr If not NULL, will contain address to specified FDT
+ * @param[out] size If not NULL, will contain size of specified FDT
+ *
+ * @return true on success or false on error
+ */
+bool android_dt_get_fdt_by_index(ulong hdr_addr, u32 index, ulong *addr,
+u32 *size)
+{
+   const struct dt_table_header *hdr;
+   const struct dt_table_entry *e;
+   u32 entry_count, entries_offset, entry_size;
+   ulong e_addr;
+   u32 dt_offset, dt_size;
+
+   hdr = map_sysmem(hdr_addr, sizeof(*hdr));
+   entry_count = fdt32_to_cpu(hdr->dt_entry_count);
+   entries_offset = fdt32_to_cpu(hdr->dt_entries_offset);
+   entry_size = fdt32_to_cpu(hdr->dt_entry_size);
+   unmap_sysmem(hdr);
+
+   if (index > entry_count) {
+   printf("Error: index > dt_entry_count (%u > %u)\n", index,
+  entry_count);
+   return false;
+   }
+
+   e_addr = hdr_addr + entries_offset + index * entry_size;
+   e = map_sysmem(e_addr, sizeof(*e));
+   dt_offset = fdt32_to_cpu(e->dt_offset);
+   dt_size = fdt32_to_cpu(e->dt_size);
+   unmap_sysmem(e);
+
+   if (addr)
+   *addr = hdr_addr + dt_offset;
+   if (size)
+   *size = dt_size;
+
+   return true;
+}
+
+#if !defined(CONFIG_SPL_BUILD)
+static void android_dt_print_fdt_info(const struct fdt_header *fdt)
+{
+   u32 fdt_size;
+   int root_node_off;
+   const char *compatible = NULL;
+
+   fdt_size = fdt_totalsize(fdt);
+   root_node_off = fdt_path_offset(fdt, "/");
+   if (root_node_off < 0) {
+   printf("Error: Root node not found\n");
+   } else {
+   compatible = fdt_getprop(fdt, root_node_off, "compatible",
+NULL);
+   }
+
+   printf("   (FDT)size = %d\n", fdt_size);
+   printf(" (FDT)compatible = %s\n",
+  compatible ? compatible : "(unknown)");
+}
+
+/**
+ * Print information about DT image structure.
+ *
+ * @param hdr_addr Start address of DT image
+ */
+void android_dt_print_contents(ulong hdr_addr)
+{
+   const struct dt_table_header *hdr;
+   u32 entry_count, entries_offset, entry_size;
+   u32 i;
+
+   hdr = map_sysmem(hdr_addr, sizeof(*hdr));
+   entry_count = fdt32_to_cpu(hdr->dt_entry_count);
+   entries_offset = fdt32_to_cpu(hdr->dt_entries_offset);
+   entry_size = fdt32_to_cpu(hdr->dt_entry_size);
+
+   /* Print image header info */
+   printf("dt_table_header:\n");
+   printf("   magic = %08x\n", fdt32_to_cpu(hdr->magic));

Re: [U-Boot] [PATCH 5/5] arm: ti: boot: Implement Android boot using DT image format

[Sam Protsenko]

On 16 April 2018 at 23:32, Sam Protsenko  wrote:
> Make sure we can boot Android on TI boards using scheme described in
> Android documentation [1]. For this do next:
>  1. Enable "dtimg" command. We will need it to boot the Android using
> new DTB/DTBO image format.
>  2. Add fdt overlay support. We will need that to be able to apply fdt
> overlays to dtb file.
>  3. Provide new Android boot commands. In case we don't know what board
> it is, let's provide fallback mechanism:
>  - use just dtb[0] from dtb.img
>  - don't apply any dtbo files on top of it
>  - but still that dtb file must be packed into Android DT image
>
> To use new boot scheme, user has to do next:
>
> 1. Prepare dtb.img and dtbo.img images, generated with mkdtimg tool (can
>be found in Android sources, see prebuilts/misc/linux-x86/libufdt).
>Example:
>
>$ ./mkdtimg create dtb.img\
>   am57xx-beagle-x15.dtb  --id=0  \
>   am57xx-beagle-x15-revc.dtb --id=1
>
>$ ./mkdtimg create dtbo.img \
>   am57xx-evm-common.dtbo --id=0  \
>   mt9t111.dtbo   --id=1  \
>   ov10635.dtbo   --id=2  \
>   am57xx-evm.dtbo--id=3  \
>   am57xx-evm-reva3.dtbo  --id=4
>
>Current boot commands rely on that specific order of dtb/dtbo files.
>Also, be sure to compile .dtb files with -@ dtc flag, so that
>overlays can be applied to dtb files.
>
> 2. Flash new U-Boot, set new environment and format eMMC:
>
>$ fastboot flash xloader MLO
>$ fastboot flash bootloader u-boot.img
>
>=> env default -f -a
>=> setenv partitions $partitions_android
>=> env save
>=> fastboot 1
>
>$ fastboot oem format
>
> 3. Flash dtb.img, dtbo.img:
>
>$ fastboot flash dtb dtb.img
>$ fastboot flash dtbo dtbo.img
>
> 4. Flash Android images:
>
>$ fastboot flash boot boot.img
>$ fastboot flash cache cache.img
>$ fastboot flash recovery recovery.img
>$ fastboot flash system system.img
>$ fastboot flash userdata userdata.img
>$ fastboot flash vendor vendor.img
>
> For more detailed instructions, see [2].
>
> [1] https://source.android.com/devices/architecture/dto/partitions
> [2] https://wiki.linaro.org/Boards/BeagleBoard-X15
>
> Signed-off-by: Sam Protsenko 
> ---
>  board/ti/common/Kconfig   |  1 +
>  configs/am57xx_evm_defconfig  |  1 +
>  configs/am57xx_hs_evm_defconfig   |  1 +
>  configs/dra7xx_evm_defconfig  |  1 +
>  configs/dra7xx_hs_evm_defconfig   |  1 +
>  include/configs/ti_armv7_common.h |  1 +
>  include/environment/ti/boot.h | 40 +--
>  7 files changed, 39 insertions(+), 7 deletions(-)
>
> diff --git a/board/ti/common/Kconfig b/board/ti/common/Kconfig
> index c21eb8c2d2..f5bd9160b3 100644
> --- a/board/ti/common/Kconfig
> +++ b/board/ti/common/Kconfig
> @@ -21,6 +21,7 @@ config TI_COMMON_CMD_OPTIONS
> imply CRC32_VERIFY if ARCH_KEYSTONE
> imply CMD_DFU if USB_GADGET_DOWNLOAD
> imply CMD_DHCP
> +   imply CMD_DTIMG
> imply CMD_EEPROM
> imply CMD_EXT2
> imply CMD_EXT4
> diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig
> index 6b11b3476c..7198542d9e 100644
> --- a/configs/am57xx_evm_defconfig
> +++ b/configs/am57xx_evm_defconfig
> @@ -78,3 +78,4 @@ CONFIG_USB_GADGET=y
>  CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
>  CONFIG_USB_GADGET_VENDOR_NUM=0x0451
>  CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
> +CONFIG_OF_LIBFDT_OVERLAY=y
> diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig
> index ca9742f118..e4948d549b 100644
> --- a/configs/am57xx_hs_evm_defconfig
> +++ b/configs/am57xx_hs_evm_defconfig
> @@ -81,3 +81,4 @@ CONFIG_USB_GADGET=y
>  CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
>  CONFIG_USB_GADGET_VENDOR_NUM=0x0451
>  CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
> +CONFIG_OF_LIBFDT_OVERLAY=y
> diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig
> index e17135c8f6..4ce687fbda 100644
> --- a/configs/dra7xx_evm_defconfig
> +++ b/configs/dra7xx_evm_defconfig
> @@ -96,3 +96,4 @@ CONFIG_USB_GADGET=y
>  CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
>  CONFIG_USB_GADGET_VENDOR_NUM=0x0451
>  CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
> +CONFIG_OF_LIBFDT_OVERLAY=y
> diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig
> index 606f99938c..6546daa080 100644
> --- a/configs/dra7xx_hs_evm_defconfig
> +++ b/configs/dra7xx_hs_evm_defconfig
> @@ -95,3 +95,4 @@ CONFIG_USB_GADGET=y
>  CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
>  CONFIG_USB_GADGET_VENDOR_NUM=0x0451
>  CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
> +CONFIG_OF_LIBFDT_OVERLAY=y
> diff --git a/include/configs/ti_armv7_common.h 
> b/include/configs/ti_armv7_common.h
> 

Re: [U-Boot] [PATCH 4/5] arm: ti: boot: Add dtbo partition for Android boot

[Sam Protsenko]

On 16 April 2018 at 23:32, Sam Protsenko  wrote:
> New Android boot scheme looks like this [1], and it involves adding new
> partition for storing Device Tree Overlays. This patch adds dtbo
> partition. While at it, let's revise Android partition table a bit.
>
> List of changes:
>  - rename "misc" to "hole" (not used for anything, just a guard hole)
>  - rename "reserved" to "uenv" (because it hold U-Boot environment)
>  - rename "environment" to "dtb" (because it actually holds .dtb file)
>  - move "dtb" after "uenv" (so that changes of dtb size won't affect
>"uenv" offset)
>  - make "hole" size twice as bigger (to keep "uenv" offset the same,
>because "dtb" was moved after "uenv")
>  - add "dtbo" partition (after "dtb", to not affect "uenv" offset)
>  - while at it, increase "boot" partition size up to 20 MiB; that's
>needed because while playing with some additional drivers built-in
>and different compression techniques, and also for HS signing, we
>have seen the boot partition size reach close to border and
>sometimes reach over the limit of 10 MiB
>
> Now eMMC layout looks like this:
>
> offset   content size  partition
> (KiB)(KiB)
>
> ===
>
> 0   ++
> | MBR/GPT header |   128   -
> 128 ++
> | MLO|   256   xloader
> 384 ++
> | u-boot.img |   1792  bootloader
> 2176++
> |  hole  |   256   hole
> 2432++
> | U-Boot environment |   256   uenv
> | (+ redundant)  |
> 2688++
> | dtb files  |   1024  dtb
> 3712++
> | dtbo files |   1024  dtbo
> 4736++
>   Android partitions remaining *
>
> ===
>
> "hole" partition is needed just to keep U-Boot environment at 2432 KiB
> offset, because:
>  - this offset is used in DFU_ALT_INFO_EMMC:
>
>"u-env.raw raw 0x1300 0x200;"
>0x1300 = 4864 sectors = 2432 KiB
>
>  - which in turn relies on CONFIG_ENV_OFFSET:
>
>CONFIG_ENV_OFFSET = 0x26 = 2432 KiB
>
> We are using "hole" partition instead of specifying "start" property to
> "uenv" partition, because this way it's easier to maintain change of
> preceding partitions.
>
> Also fix Android boot commands appropriately.
>
> [1] https://source.android.com/devices/architecture/dto/partitions
>
> Signed-off-by: Sam Protsenko 
> ---
>  include/environment/ti/boot.h | 13 +++--
>  1 file changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/include/environment/ti/boot.h b/include/environment/ti/boot.h
> index 4f3d748b5c..f2d91f5298 100644
> --- a/include/environment/ti/boot.h
> +++ b/include/environment/ti/boot.h
> @@ -26,13 +26,14 @@
> "uuid_disk=${uuid_gpt_disk};" \
> "name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};" \
> "name=bootloader,size=1792K,uuid=${uuid_gpt_bootloader};" \
> -   "name=environment,size=128K,uuid=${uuid_gpt_environment};" \
> -   "name=misc,size=128K,uuid=${uuid_gpt_misc};" \
> -   "name=reserved,size=256K,uuid=${uuid_gpt_reserved};" \
> +   "name=hole,size=256K,uuid=${uuid_gpt_hole};" \
> +   "name=uenv,size=256K,uuid=${uuid_gpt_uenv};" \
> +   "name=dtb,size=1M,uuid=${uuid_gpt_dtb};" \
> +   "name=dtbo,size=1M,uuid=${uuid_gpt_dtbo};" \
> "name=efs,size=16M,uuid=${uuid_gpt_efs};" \
> "name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \
> "name=recovery,size=40M,uuid=${uuid_gpt_recovery};" \
> -   "name=boot,size=10M,uuid=${uuid_gpt_boot};" \
> +   "name=boot,size=20M,uuid=${uuid_gpt_boot};" \
> "name=system,size=768M,uuid=${uuid_gpt_system};" \
> "name=vendor,size=256M,uuid=${uuid_gpt_vendor};" \
> "name=cache,size=256M,uuid=${uuid_gpt_cache};" \
> @@ -66,8 +67,8 @@
> "setenv machid fe6; " \
> "mmc dev $mmcdev; " \
> "mmc rescan; " \
> -   "part start mmc ${mmcdev} environment fdt_start; " \
> -   "part size mmc ${mmcdev} environment fdt_size; " \
> +   "part start mmc ${mmcdev} dtb fdt_start; " \
> +   "part size mmc ${mmcdev} dtb fdt_size; " \
> "part start mmc ${mmcdev} boot boot_start; " \
> "part size mmc ${mmcdev} boot boot_size; " \
> "mmc read ${fdtaddr} ${fdt_start} ${fdt_size}; " \
> --
> 2.17.0
>

Abandon this 

[U-Boot] [PATCH] mx7dsabresd: Remove the mx7dsabresd_secure_defconfig target

[Fabio Estevam]

From: Fabio Estevam 

mx7dsabresd_secure_defconfig was introduced to allow booting NXP kernel
that has CAAM support and needs to boot in secure mode.

Instead of keeping two different config targets for the same board,
remove mx7dsabresd_secure_defconfig and select
CONFIG_ARMV7_BOOT_SEC_DEFAULT inside mx7dsabresd_defconfig so that
this target could be used to boot both mainline and the vendor kernel.

This makes maintenance task easier and avoid potentially confusion
for the end user.

Signed-off-by: Fabio Estevam 
---
Hi,

As discussed on a patch series from Bryan we can get rid of
the secure_defconfig variant and make things simpler.

 board/freescale/mx7dsabresd/MAINTAINERS |  1 -
 configs/mx7dsabresd_defconfig   |  1 +
 configs/mx7dsabresd_secure_defconfig| 78 -
 3 files changed, 1 insertion(+), 79 deletions(-)
 delete mode 100644 configs/mx7dsabresd_secure_defconfig

diff --git a/board/freescale/mx7dsabresd/MAINTAINERS 
b/board/freescale/mx7dsabresd/MAINTAINERS
index c7a22fc..b96642a 100644
--- a/board/freescale/mx7dsabresd/MAINTAINERS
+++ b/board/freescale/mx7dsabresd/MAINTAINERS
@@ -4,4 +4,3 @@ S:  Maintained
 F: board/freescale/mx7dsabresd
 F: include/configs/mx7dsabresd.h
 F: configs/mx7dsabresd_defconfig
-F: configs/mx7dsabresd_secure_defconfig
diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig
index da881d9..33851c1 100644
--- a/configs/mx7dsabresd_defconfig
+++ b/configs/mx7dsabresd_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX7=y
 CONFIG_SYS_TEXT_BASE=0x8780
 CONFIG_TARGET_MX7DSABRESD=y
+CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
 # CONFIG_ARMV7_VIRT is not set
 CONFIG_IMX_RDC=y
 CONFIG_IMX_BOOTAUX=y
diff --git a/configs/mx7dsabresd_secure_defconfig 
b/configs/mx7dsabresd_secure_defconfig
deleted file mode 100644
index 58e60ed..000
--- a/configs/mx7dsabresd_secure_defconfig
+++ /dev/null
@@ -1,78 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX7=y
-CONFIG_SYS_TEXT_BASE=0x8780
-CONFIG_TARGET_MX7DSABRESD=y
-CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
-# CONFIG_ARMV7_VIRT is not set
-CONFIG_IMX_RDC=y
-CONFIG_IMX_BOOTAUX=y
-# CONFIG_CMD_BMODE is not set
-CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb"
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/imximage.cfg"
-# CONFIG_CONSOLE_MUX is not set
-CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-CONFIG_HUSH_PARSER=y
-# CONFIG_CMD_BOOTD is not set
-CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_XIMG is not set
-# CONFIG_CMD_EXPORTENV is not set
-# CONFIG_CMD_IMPORTENV is not set
-CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_BMP=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_PMIC=y
-CONFIG_CMD_REGULATOR=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_OF_CONTROL=y
-CONFIG_DFU_MMC=y
-CONFIG_DFU_RAM=y
-CONFIG_DM_GPIO=y
-CONFIG_DM_74X164=y
-CONFIG_DM_I2C=y
-CONFIG_DM_MMC=y
-CONFIG_MMC_IO_VOLTAGE=y
-CONFIG_MMC_UHS_SUPPORT=y
-CONFIG_MMC_HS200_SUPPORT=y
-CONFIG_FSL_ESDHC=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_PHYLIB=y
-CONFIG_PINCTRL=y
-CONFIG_PINCTRL_IMX7=y
-CONFIG_DM_PMIC=y
-CONFIG_DM_PMIC_PFUZE100=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_PFUZE100=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_DM_SPI=y
-CONFIG_SOFT_SPI=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_MXC_USB_OTG_HACTIVE=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="FSL"
-CONFIG_USB_GADGET_VENDOR_NUM=0x0525
-CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
-CONFIG_CI_UDC=y
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_USB_HOST_ETHER=y
-CONFIG_USB_ETHER_ASIX=y
-CONFIG_VIDEO=y
-CONFIG_ERRNO_STR=y
-- 
2.7.4

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Re: [U-Boot] [PATCH 4/5] arm: ti: boot: Add dtbo partition for Android boot

[Sam Protsenko]

On 18 April 2018 at 00:10, Andrew F. Davis  wrote:
> On 04/16/2018 03:32 PM, Sam Protsenko wrote:
>> New Android boot scheme looks like this [1], and it involves adding new
>> partition for storing Device Tree Overlays. This patch adds dtbo
>> partition. While at it, let's revise Android partition table a bit.
>>
>> List of changes:
>>  - rename "misc" to "hole" (not used for anything, just a guard hole)
>
> Could we instead expand the bootloader partition and just remove this
> hole partition?
>

We can, I just think having dedicated partition for this can spare us
some debugging time in future. As I explained it in my commit message:

  We are using "hole" partition instead of specifying "start" property to
  "uenv" partition, because this way it's easier to maintain change of
  preceding partitions.

>>  - rename "reserved" to "uenv" (because it hold U-Boot environment)
>
> This is fine.
>
>>  - rename "environment" to "dtb" (because it actually holds .dtb file)
>
>
> We are working to move to FIT with our Android releases, so the
> "boot.img" image will now be a FIT image that contains kernel, dtb,
> dtbo, op-tee, ipu, ipu2, etc...
>
> The end result is all these custom partitions we had before all just get
> folded into the one boot partition.
>

As I understand, it's not completely our shot. If Google says it's
mandatory to use DT image format, we will use it. That's why I
implemented this patch series. Please discuss it with Praneeth, some
of us obviously is not on the same page with others... For now we are
going to add DT image format support, and once we have confirmation
from Google, we can choose which one to prefer in upstream. But having
support of this format won't hurt anyone, especially knowing that
Google recommends this format in their documentation.

> Andrew
>
>
>>  - move "dtb" after "uenv" (so that changes of dtb size won't affect
>>"uenv" offset)
>>  - make "hole" size twice as bigger (to keep "uenv" offset the same,
>>because "dtb" was moved after "uenv")
>>  - add "dtbo" partition (after "dtb", to not affect "uenv" offset)
>>  - while at it, increase "boot" partition size up to 20 MiB; that's
>>needed because while playing with some additional drivers built-in
>>and different compression techniques, and also for HS signing, we
>>have seen the boot partition size reach close to border and
>>sometimes reach over the limit of 10 MiB
>>
>> Now eMMC layout looks like this:
>>
>> offset   content size  partition
>> (KiB)(KiB)
>>
>> ===
>>
>> 0   ++
>> | MBR/GPT header |   128   -
>> 128 ++
>> | MLO|   256   xloader
>> 384 ++
>> | u-boot.img |   1792  bootloader
>> 2176++
>> |  hole  |   256   hole
>> 2432++
>> | U-Boot environment |   256   uenv
>> | (+ redundant)  |
>> 2688++
>> | dtb files  |   1024  dtb
>> 3712++
>> | dtbo files |   1024  dtbo
>> 4736++
>>   Android partitions remaining *
>>
>> ===
>>
>> "hole" partition is needed just to keep U-Boot environment at 2432 KiB
>> offset, because:
>>  - this offset is used in DFU_ALT_INFO_EMMC:
>>
>>"u-env.raw raw 0x1300 0x200;"
>>0x1300 = 4864 sectors = 2432 KiB
>>
>>  - which in turn relies on CONFIG_ENV_OFFSET:
>>
>>CONFIG_ENV_OFFSET = 0x26 = 2432 KiB
>>
>> We are using "hole" partition instead of specifying "start" property to
>> "uenv" partition, because this way it's easier to maintain change of
>> preceding partitions.
>>
>> Also fix Android boot commands appropriately.
>>
>> [1] https://source.android.com/devices/architecture/dto/partitions
>>
>> Signed-off-by: Sam Protsenko 
>> ---
>>  include/environment/ti/boot.h | 13 +++--
>>  1 file changed, 7 insertions(+), 6 deletions(-)
>>
>> diff --git a/include/environment/ti/boot.h b/include/environment/ti/boot.h
>> index 4f3d748b5c..f2d91f5298 100644
>> --- a/include/environment/ti/boot.h
>> +++ b/include/environment/ti/boot.h
>> @@ -26,13 +26,14 @@
>>   "uuid_disk=${uuid_gpt_disk};" \
>>   "name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};" \
>>   "name=bootloader,size=1792K,uuid=${uuid_gpt_bootloader};" \
>> - "name=environment,size=128K,uuid=${uuid_gpt_environment};" \
>> - "name=misc,size=128K,uuid=${uuid_gpt_misc};" \
>> - 

Re: [U-Boot] [PATCH 3/5] arm: ti: boot: Extract PARTS_DEFAULT to boot.h

[Sam Protsenko]

On 16 April 2018 at 23:32, Sam Protsenko  wrote:
> Eliminate code duplication: the same PARTS_DEFAULT was defined in
> am57xx_evm.h and in dra7xx_evm.h. Extract it to environment/boot.h and
> use in all OMAP5-based boards.
>
> Signed-off-by: Sam Protsenko 
> ---
>  include/configs/am57xx_evm.h   | 25 -
>  include/configs/cl-som-am57x.h |  2 ++
>  include/configs/cm_t54.h   |  2 ++
>  include/configs/dra7xx_evm.h   | 25 -
>  include/environment/ti/boot.h  | 27 +--
>  5 files changed, 29 insertions(+), 52 deletions(-)
>
> diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h
> index d1f73f76a4..886a5696f5 100644
> --- a/include/configs/am57xx_evm.h
> +++ b/include/configs/am57xx_evm.h
> @@ -38,31 +38,6 @@
>
>  #define CONFIG_SYS_OMAP_ABE_SYSCK
>
> -/* Define the default GPT table for eMMC */
> -#define PARTS_DEFAULT \
> -   /* Linux partitions */ \
> -   "uuid_disk=${uuid_gpt_disk};" \
> -   "name=bootloader,start=384K,size=1792K,uuid=${uuid_gpt_bootloader};" \
> -   "name=rootfs,start=2688K,size=-,uuid=${uuid_gpt_rootfs}\0" \
> -   /* Android partitions */ \
> -   "partitions_android=" \
> -   "uuid_disk=${uuid_gpt_disk};" \
> -   "name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};" \
> -   "name=bootloader,size=1792K,uuid=${uuid_gpt_bootloader};" \
> -   "name=environment,size=128K,uuid=${uuid_gpt_environment};" \
> -   "name=misc,size=128K,uuid=${uuid_gpt_misc};" \
> -   "name=reserved,size=256K,uuid=${uuid_gpt_reserved};" \
> -   "name=efs,size=16M,uuid=${uuid_gpt_efs};" \
> -   "name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \
> -   "name=recovery,size=40M,uuid=${uuid_gpt_recovery};" \
> -   "name=boot,size=10M,uuid=${uuid_gpt_boot};" \
> -   "name=system,size=768M,uuid=${uuid_gpt_system};" \
> -   "name=vendor,size=256M,uuid=${uuid_gpt_vendor};" \
> -   "name=cache,size=256M,uuid=${uuid_gpt_cache};" \
> -   "name=ipu1,size=1M,uuid=${uuid_gpt_ipu1};" \
> -   "name=ipu2,size=1M,uuid=${uuid_gpt_ipu2};" \
> -   "name=userdata,size=-,uuid=${uuid_gpt_userdata}"
> -
>  #define DFUARGS \
> "dfu_bufsiz=0x1\0" \
> DFU_ALT_INFO_MMC \
> diff --git a/include/configs/cl-som-am57x.h b/include/configs/cl-som-am57x.h
> index 9c70cf0b37..709e0375b3 100644
> --- a/include/configs/cl-som-am57x.h
> +++ b/include/configs/cl-som-am57x.h
> @@ -18,6 +18,8 @@
>
>  #define CONFIG_SYS_OMAP_ABE_SYSCK
>
> +#define PARTS_DEFAULT
> +
>  #include 
>
>  /* misc */
> diff --git a/include/configs/cm_t54.h b/include/configs/cm_t54.h
> index 6123cd374d..f0d76ed806 100644
> --- a/include/configs/cm_t54.h
> +++ b/include/configs/cm_t54.h
> @@ -14,6 +14,8 @@
>  #define CONFIG_CM_T54
>  #define CONFIG_DRAM_2G
>
> +#define PARTS_DEFAULT
> +
>  #include 
>
>  /* EEPROM related defines */
> diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
> index 917a05d701..9b3fb2c913 100644
> --- a/include/configs/dra7xx_evm.h
> +++ b/include/configs/dra7xx_evm.h
> @@ -45,31 +45,6 @@
>  #define CONFIG_SYS_OMAP_ABE_SYSCK
>
>  #ifndef CONFIG_SPL_BUILD
> -/* Define the default GPT table for eMMC */
> -#define PARTS_DEFAULT \
> -   /* Linux partitions */ \
> -   "uuid_disk=${uuid_gpt_disk};" \
> -   "name=bootloader,start=384K,size=1792K,uuid=${uuid_gpt_bootloader};" \
> -   "name=rootfs,start=2688K,size=-,uuid=${uuid_gpt_rootfs}\0" \
> -   /* Android partitions */ \
> -   "partitions_android=" \
> -   "uuid_disk=${uuid_gpt_disk};" \
> -   "name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};" \
> -   "name=bootloader,size=1792K,uuid=${uuid_gpt_bootloader};" \
> -   "name=environment,size=128K,uuid=${uuid_gpt_environment};" \
> -   "name=misc,size=128K,uuid=${uuid_gpt_misc};" \
> -   "name=reserved,size=256K,uuid=${uuid_gpt_reserved};" \
> -   "name=efs,size=16M,uuid=${uuid_gpt_efs};" \
> -   "name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \
> -   "name=recovery,size=40M,uuid=${uuid_gpt_recovery};" \
> -   "name=boot,size=10M,uuid=${uuid_gpt_boot};" \
> -   "name=system,size=768M,uuid=${uuid_gpt_system};" \
> -   "name=vendor,size=256M,uuid=${uuid_gpt_vendor};" \
> -   "name=cache,size=256M,uuid=${uuid_gpt_cache};" \
> -   "name=ipu1,size=1M,uuid=${uuid_gpt_ipu1};" \
> -   "name=ipu2,size=1M,uuid=${uuid_gpt_ipu2};" \
> -   "name=userdata,size=-,uuid=${uuid_gpt_userdata}"
> -
>  #define DFUARGS \
> "dfu_bufsiz=0x1\0" \
> DFU_ALT_INFO_MMC \
> diff --git a/include/environment/ti/boot.h b/include/environment/ti/boot.h
> index 24b7783f88..4f3d748b5c 100644
> --- a/include/environment/ti/boot.h
> +++ b/include/environment/ti/boot.h
> @@ -15,8 +15,31 @@
>  #endif
>
>  #ifndef PARTS_DEFAULT
> -#define PARTS_DEFAULT
> -#endif
> +/* Define the default GPT table for eMMC */
> 

Re: [U-Boot] [PATCH 2/5] cmd: Add dtimg command

[Sam Protsenko]

On 16 April 2018 at 23:32, Sam Protsenko  wrote:
> dtimg command allows user to work with Android DTB/DTBO image format.
> Such as, getting the address of desired DTB/DTBO file, printing the dump
> of the image in U-Boot shell, etc.
>
> This command is needed to provide Android boot with new Android DT image
> format further.
>
> Signed-off-by: Sam Protsenko 
> ---
>  cmd/Kconfig |   8 +++
>  cmd/Makefile|   1 +
>  cmd/dtimg.c | 142 
>  common/Makefile |   4 ++
>  4 files changed, 155 insertions(+)
>  create mode 100644 cmd/dtimg.c
>
> diff --git a/cmd/Kconfig b/cmd/Kconfig
> index bc1d2f31c0..68f3cc7b48 100644
> --- a/cmd/Kconfig
> +++ b/cmd/Kconfig
> @@ -256,6 +256,14 @@ config CMD_BOOTMENU
> help
>   Add an ANSI terminal boot menu command.
>
> +config CMD_DTIMG
> +   bool "dtimg"
> +   help
> + Android DTB/DTBO image manipulation commands. Read dtb/dtbo files 
> from
> + image into RAM, dump image structure information, etc. Those 
> dtb/dtbo
> + files should be merged in one dtb further, which needs to be passed 
> to
> + the kernel, as part of a boot process.
> +
>  config CMD_ELF
> bool "bootelf, bootvx"
> default y
> diff --git a/cmd/Makefile b/cmd/Makefile
> index c4269ac8ac..1cc2e74e9e 100644
> --- a/cmd/Makefile
> +++ b/cmd/Makefile
> @@ -43,6 +43,7 @@ ifdef CONFIG_POST
>  obj-$(CONFIG_CMD_DIAG) += diag.o
>  endif
>  obj-$(CONFIG_CMD_DISPLAY) += display.o
> +obj-$(CONFIG_CMD_DTIMG) += dtimg.o
>  obj-$(CONFIG_CMD_ECHO) += echo.o
>  obj-$(CONFIG_ENV_IS_IN_EEPROM) += eeprom.o
>  obj-$(CONFIG_CMD_EEPROM) += eeprom.o
> diff --git a/cmd/dtimg.c b/cmd/dtimg.c
> new file mode 100644
> index 00..0b046402fe
> --- /dev/null
> +++ b/cmd/dtimg.c
> @@ -0,0 +1,142 @@
> +/*
> + * (C) Copyright 2018 Linaro Ltd.
> + * Sam Protsenko 
> + *
> + * SPDX-License-Identifier:GPL-2.0+
> + */
> +
> +#include 
> +#include 
> +
> +enum cmd_dtimg_info {
> +   CMD_DTIMG_START = 0,
> +   CMD_DTIMG_SIZE,
> +};
> +
> +static int do_dtimg_dump(cmd_tbl_t *cmdtp, int flag, int argc,
> +char * const argv[])
> +{
> +   char *endp;
> +   void *hdr;
> +
> +   if (argc != 2)
> +   return CMD_RET_USAGE;
> +
> +   hdr = (void *)simple_strtoul(argv[1], , 16);
> +   if (*endp != '\0') {
> +   printf("Error: Wrong image address\n");
> +   return CMD_RET_FAILURE;
> +   }
> +
> +   if (!android_dt_check_header(hdr)) {
> +   printf("Error: DT image header is incorrect\n");
> +   return CMD_RET_FAILURE;
> +   }
> +
> +   android_dt_print_contents(hdr);
> +
> +   return CMD_RET_SUCCESS;
> +}
> +
> +static int dtimg_get_fdt(int argc, char * const argv[], enum cmd_dtimg_info 
> cmd)
> +{
> +   void *hdr;
> +   u32 index;
> +   char *endp;
> +   ulong addr;
> +   u32 size;
> +   char buf[512] = { 0 };
> +
> +   if (argc != 4)
> +   return CMD_RET_USAGE;
> +
> +   hdr = (void *)simple_strtoul(argv[1], , 16);
> +   if (*endp != '\0') {
> +   printf("Error: Wrong image address\n");
> +   return CMD_RET_FAILURE;
> +   }
> +
> +   if (!android_dt_check_header(hdr)) {
> +   printf("Error: DT image header is incorrect\n");
> +   return CMD_RET_FAILURE;
> +   }
> +
> +   index = simple_strtoul(argv[2], , 0);
> +   if (*endp != '\0') {
> +   printf("Error: Wrong index\n");
> +   return CMD_RET_FAILURE;
> +   }
> +
> +   if (!android_dt_get_fdt_by_index(hdr, index, , ))
> +   return CMD_RET_FAILURE;
> +
> +   switch (cmd) {
> +   case CMD_DTIMG_START:
> +   snprintf(buf, sizeof(buf), "%p", (void *)addr);
> +   break;
> +   case CMD_DTIMG_SIZE:
> +   snprintf(buf, sizeof(buf), "%x", size);
> +   break;
> +   default:
> +   printf("Error: Unknown cmd_dtimg_info value: %d\n", cmd);
> +   return CMD_RET_FAILURE;
> +   }
> +
> +   env_set(argv[3], buf);
> +
> +   return CMD_RET_SUCCESS;
> +}
> +
> +static int do_dtimg_start(cmd_tbl_t *cmdtp, int flag, int argc,
> + char * const argv[])
> +{
> +   return dtimg_get_fdt(argc, argv, CMD_DTIMG_START);
> +}
> +
> +static int do_dtimg_size(cmd_tbl_t *cmdtp, int flag, int argc,
> +char * const argv[])
> +{
> +   return dtimg_get_fdt(argc, argv, CMD_DTIMG_SIZE);
> +}
> +
> +static cmd_tbl_t cmd_dtimg_sub[] = {
> +   U_BOOT_CMD_MKENT(dump, 2, 0, do_dtimg_dump, "", ""),
> +   U_BOOT_CMD_MKENT(start, 4, 0, do_dtimg_start, "", ""),
> +   U_BOOT_CMD_MKENT(size, 4, 0, do_dtimg_size, "", ""),
> +};
> +
> +static int do_dtimg(cmd_tbl_t *cmdtp, int flag, 

Re: [U-Boot] [PATCH 1/5] common: Add support for Android DT image

[Sam Protsenko]

On 16 April 2018 at 23:32, Sam Protsenko  wrote:
> Android documentation recommends new image format for storing DTB/DTBO
> files: [1]. To support that format, two things should be done:
>
> 1. Add dt_table.h file from Android (BSD-3 relicensed version): [2].
>This header defines structures and constants that we need to work
>with that DT image format.
>
>Changes:
> - re-licensed from Apache to BSD-3
> - removed functions declarations
> - change the coding style to kernel (make checkpatch happy)
>
> 2. Add helper functions for Android DTB/DTBO format. In
>image-android-dt.* files you can find helper functions to work with
>Android DT image format, such us routines for:
> - printing the dump of image structure
> - getting the address and size of desired dtb/dtbo file
>
> [1] https://source.android.com/devices/architecture/dto/partitions
> [2] 
> https://android.googlesource.com/platform/system/libufdt/+/58a7582180f477032cd6c74f8d9afad0038e74c3/utils/src/dt_table.h
>
> Signed-off-by: Sam Protsenko 
> ---
>  common/image-android-dt.c  | 134 +
>  include/dt_table.h |  46 +
>  include/image-android-dt.h |  18 +
>  3 files changed, 198 insertions(+)
>  create mode 100644 common/image-android-dt.c
>  create mode 100644 include/dt_table.h
>  create mode 100644 include/image-android-dt.h
>
> diff --git a/common/image-android-dt.c b/common/image-android-dt.c
> new file mode 100644
> index 00..f218db06bb
> --- /dev/null
> +++ b/common/image-android-dt.c
> @@ -0,0 +1,134 @@
> +/*
> + * (C) Copyright 2018 Linaro Ltd.
> + * Sam Protsenko 
> + *
> + * SPDX-License-Identifier:GPL-2.0+
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +/**
> + * Check if image header is correct.
> + *
> + * @param hdr Address to image header
> + * @return true if header is correct or false if header is incorrect
> + */
> +bool android_dt_check_header(const struct dt_table_header *hdr)
> +{
> +   return fdt32_to_cpu(hdr->magic) == DT_TABLE_MAGIC;
> +}
> +
> +/**
> + * Get the address of FDT (dtb or dtbo) in memory by its index in image.
> + *
> + * @param hdr Address to image header
> + * @param index Index of desired FDT in image (starting from 0)
> + * @param[out] addr If not null, will contain address to specified FDT
> + * @param[out] size If not NULL, will contain size of specified FDT
> + *
> + * @return true on success or false on error
> + */
> +bool android_dt_get_fdt_by_index(const struct dt_table_header *hdr,
> +u32 index, ulong *addr, u32 *size)
> +{
> +   const struct dt_table_entry *e;
> +   u32 entry_count = fdt32_to_cpu(hdr->dt_entry_count);
> +   u32 entries_offset = fdt32_to_cpu(hdr->dt_entries_offset);
> +   u32 entry_size = fdt32_to_cpu(hdr->dt_entry_size);
> +   u32 dt_offset, dt_size;
> +
> +   if (index > entry_count) {
> +   printf("Error: index > dt_entry_count (%u > %u)\n", index,
> +  entry_count);
> +   return false;
> +   }
> +
> +   e = (const struct dt_table_entry *)((ulong)hdr + entries_offset
> +   + index * entry_size);
> +   dt_offset = fdt32_to_cpu(e->dt_offset);
> +   dt_size = fdt32_to_cpu(e->dt_size);
> +
> +   if (addr)
> +   *addr = ((ulong)hdr + dt_offset);
> +   if (size)
> +   *size = dt_size;
> +
> +   return true;
> +}
> +
> +#if !defined(CONFIG_SPL_BUILD)
> +static void android_dt_print_fdt_info(const struct fdt_header *fdt)
> +{
> +   u32 fdt_size;
> +   int root_node_off;
> +   const char *compatible = NULL;
> +
> +   fdt_size = fdt_totalsize(fdt);
> +   root_node_off = fdt_path_offset(fdt, "/");
> +   if (root_node_off < 0) {
> +   printf("Error: Root node not found\n");
> +   } else {
> +   compatible = fdt_getprop(fdt, root_node_off, "compatible",
> +NULL);
> +   }
> +
> +   printf("   (FDT)size = %d\n", fdt_size);
> +   printf(" (FDT)compatible = %s\n",
> +  compatible ? compatible : "(unknown)");
> +}
> +
> +/**
> + * Print information about DT image structure.
> + *
> + * @param hdr Address to image header
> + */
> +void android_dt_print_contents(const struct dt_table_header *hdr)
> +{
> +   u32 i;
> +   u32 entry_count = fdt32_to_cpu(hdr->dt_entry_count);
> +   u32 entries_offset = fdt32_to_cpu(hdr->dt_entries_offset);
> +   u32 entry_size = fdt32_to_cpu(hdr->dt_entry_size);
> +
> +   /* Print image header info */
> +   printf("dt_table_header:\n");
> +   printf("   magic = %08x\n", fdt32_to_cpu(hdr->magic));
> +   printf("  total_size = %d\n", fdt32_to_cpu(hdr->total_size));
> +   printf(" header_size = %d\n", 

Re: [U-Boot] [PATCH 0/5] Use Android DT image format for TI boards

[Sam Protsenko]

On 16 April 2018 at 23:32, Sam Protsenko  wrote:
> Android documentation recommends using new image format for storing dtb
> and dtbo files: [1]. Using that format, we can pack several dtb files to
> dtb.img, and also pack several dtbo files to dtbo.img. Then those images
> should be flashed to eMMC partitions, called "dtb" and "dtbo"
> respectively.
>
> This patch series introduces support for mentioned Android DT image
> format, adds "dtimg" command to deal with that image format from U-Boot
> shell, and provides new Android boot scheme to TI boards (AM57x and DRA7
> boards). So with this patch series we will have next procedure for
> Android boot:
>  1. Read next images from eMMC partitions to RAM:
> - boot.img
> - dtb.img
> - dtbo.img
>  2. Take addresses of desired dtb/dtbo files from that images (for
> current board)
>  3. Apply dtbo overlays to main dtb, if needed
>  4. Boot the kernel from Android boot image, using resulting dtb
>
> It was tested on X15 and AM57x EVM boards.
>
> [1] https://source.android.com/devices/architecture/dto/partitions
>
> Sam Protsenko (5):
>   common: Add support for Android DT image
>   cmd: Add dtimg command
>   arm: ti: boot: Extract PARTS_DEFAULT to boot.h
>   arm: ti: boot: Add dtbo partition for Android boot
>   arm: ti: boot: Implement Android boot using DT image format
>
>  board/ti/common/Kconfig   |   1 +
>  cmd/Kconfig   |   8 ++
>  cmd/Makefile  |   1 +
>  cmd/dtimg.c   | 142 ++
>  common/Makefile   |   4 +
>  common/image-android-dt.c | 134 
>  configs/am57xx_evm_defconfig  |   1 +
>  configs/am57xx_hs_evm_defconfig   |   1 +
>  configs/dra7xx_evm_defconfig  |   1 +
>  configs/dra7xx_hs_evm_defconfig   |   1 +
>  include/configs/am57xx_evm.h  |  25 --
>  include/configs/cl-som-am57x.h|   2 +
>  include/configs/cm_t54.h  |   2 +
>  include/configs/dra7xx_evm.h  |  25 --
>  include/configs/ti_armv7_common.h |   1 +
>  include/dt_table.h|  46 ++
>  include/environment/ti/boot.h |  68 --
>  include/image-android-dt.h|  18 
>  18 files changed, 422 insertions(+), 59 deletions(-)
>  create mode 100644 cmd/dtimg.c
>  create mode 100644 common/image-android-dt.c
>  create mode 100644 include/dt_table.h
>  create mode 100644 include/image-android-dt.h
>
> --
> 2.17.0
>

Abandon this change. I'm going to send v2 soon.
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Re: [U-Boot] [PATCH 0/5] Use Android DT image format for TI boards

[Sam Protsenko]

On 17 April 2018 at 23:57, Andrew F. Davis  wrote:
> On 04/16/2018 03:32 PM, Sam Protsenko wrote:
>> Android documentation recommends using new image format for storing dtb
>> and dtbo files: [1]. Using that format, we can pack several dtb files to
>> dtb.img, and also pack several dtbo files to dtbo.img. Then those images
>> should be flashed to eMMC partitions, called "dtb" and "dtbo"
>> respectively.
>>
>
>
> I'm not convinced adding yet another one-off Android specific partition
> format is what we need right now. With FIT images this is a solved
> problem, why does Android need to go down a different path here?
>

We are already in discussion with Google engineers regarding that
question. Both approaches (FIT and Android DT) work fine. This is just
a policy question: if Google doesn't mind us using FIT, we can go with
FIT. Otherwise we are forced to go with Android DT image format.
That's why we decided to implement DT image support: to have it
functional and upstreamed in a case if Google tells us it's mandatory.

>
>> This patch series introduces support for mentioned Android DT image
>> format, adds "dtimg" command to deal with that image format from U-Boot
>> shell, and provides new Android boot scheme to TI boards (AM57x and DRA7
>> boards). So with this patch series we will have next procedure for
>> Android boot:
>>  1. Read next images from eMMC partitions to RAM:
>> - boot.img
>> - dtb.img
>> - dtbo.img
>>  2. Take addresses of desired dtb/dtbo files from that images (for
>> current board)
>>  3. Apply dtbo overlays to main dtb, if needed
>>  4. Boot the kernel from Android boot image, using resulting dtb
>>
>
>
> All the above logic ends up adding more to our environment scripting at
> a time when we are working to reduce that..
>

Frankly, I don't see a better solution here. Adding another separate
command to do Android boot just for TI case won't be accepted in
upstream obviously, because we already have bootm command for this. If
you see a better way of doing that (in upstream, of course, without
any hacks) -- please advice. Otherwise we will go with this one, in
case Google responds it's mandatory.

> Andrew
>
>
>> It was tested on X15 and AM57x EVM boards.
>>
>> [1] https://source.android.com/devices/architecture/dto/partitions
>>
>> Sam Protsenko (5):
>>   common: Add support for Android DT image
>>   cmd: Add dtimg command
>>   arm: ti: boot: Extract PARTS_DEFAULT to boot.h
>>   arm: ti: boot: Add dtbo partition for Android boot
>>   arm: ti: boot: Implement Android boot using DT image format
>>
>>  board/ti/common/Kconfig   |   1 +
>>  cmd/Kconfig   |   8 ++
>>  cmd/Makefile  |   1 +
>>  cmd/dtimg.c   | 142 ++
>>  common/Makefile   |   4 +
>>  common/image-android-dt.c | 134 
>>  configs/am57xx_evm_defconfig  |   1 +
>>  configs/am57xx_hs_evm_defconfig   |   1 +
>>  configs/dra7xx_evm_defconfig  |   1 +
>>  configs/dra7xx_hs_evm_defconfig   |   1 +
>>  include/configs/am57xx_evm.h  |  25 --
>>  include/configs/cl-som-am57x.h|   2 +
>>  include/configs/cm_t54.h  |   2 +
>>  include/configs/dra7xx_evm.h  |  25 --
>>  include/configs/ti_armv7_common.h |   1 +
>>  include/dt_table.h|  46 ++
>>  include/environment/ti/boot.h |  68 --
>>  include/image-android-dt.h|  18 
>>  18 files changed, 422 insertions(+), 59 deletions(-)
>>  create mode 100644 cmd/dtimg.c
>>  create mode 100644 common/image-android-dt.c
>>  create mode 100644 include/dt_table.h
>>  create mode 100644 include/image-android-dt.h
>>
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[U-Boot] [PATCH 1/1] cmd: CONFIG_CMD_LOG select CONFIG_LOG

[Heinrich Schuchardt]

CONFIG_CMD_LOG without CONFIG_LOG leads to a build error:
‘gd_t {aka volatile struct global_data}’ has no member named
‘default_log_level’

So CMD_LOG should select LOG.

Signed-off-by: Heinrich Schuchardt 
---
 cmd/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index bc1d2f31c0..225bb002a6 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1660,6 +1660,7 @@ config CMD_KGDB
 
 config CMD_LOG
bool "log - Generation, control and access to logging"
+   select LOG
help
  This provides access to logging features. It allows the output of
  log data to be controlled to a limited extent (setting up the default
-- 
2.15.1

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[U-Boot] [PATCH 1/1] log: CONFIG_LOG should select CONFIG_DM

[Heinrich Schuchardt]

Compling with CONFIG_LOG and without CONFIG_DM results in
common/log.c:47: undefined reference to `uclass_get_name'

Signed-off-by: Heinrich Schuchardt 
---
 common/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/common/Kconfig b/common/Kconfig
index 03eeeb2402..4c7a1a9af8 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -424,6 +424,7 @@ menu "Logging"
 
 config LOG
bool "Enable logging support"
+   select DM
help
  This enables support for logging of status and debug messages. These
  can be displayed on the console, recorded in a memory buffer, or
-- 
2.15.1

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Re: [U-Boot] [PATCH v2 6/8] distro: Extend with RISC-V defines

[Heinrich Schuchardt]

On 04/19/2018 07:19 PM, Heinrich Schuchardt wrote:



On 04/19/2018 05:49 PM, Alexander Graf wrote:
While we don't have VCI or UEFI naming conventions for RISC-V file 
paths yet,
we need to search for something. So let's make up a few defines that 
at least

allow us to get started until the specs officially include RISC-V.

Signed-off-by: Alexander Graf 

---

v1 -> v2:

   - Use edk2 default boot file names
---
  include/config_distro_bootcmd.h | 14 +-
  1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/include/config_distro_bootcmd.h 
b/include/config_distro_bootcmd.h

index f567cebd38..eefdfb51cc 100644
--- a/include/config_distro_bootcmd.h
+++ b/include/config_distro_bootcmd.h
@@ -100,6 +100,10 @@
  #define BOOTEFI_NAME "bootia32.efi"
  #elif defined(CONFIG_X86_RUN_64BIT)
  #define BOOTEFI_NAME "bootx64.efi"
+#elif defined(CONFIG_CPU_RISCV_32)
+#define BOOTEFI_NAME "bootriscv32.efi"
+#elif defined(CONFIG_CPU_RISCV_64)
+#define BOOTEFI_NAME "bootriscv64.efi"


Thanks for updating this.


  #endif
  #endif
@@ -250,7 +254,15 @@
  #elif defined(CONFIG_X86)
  /* Always assume we're running 64bit */
  #define BOOTENV_EFI_PXE_ARCH "0x7"
-#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:7:UNDI:003000"
+#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch::UNDI:003000"


Did you inadvertently modify this line? The change does not relate to 
the commit message.



+#elif defined(CONFIG_CPU_RISCV_32)
+/* TODO: Register VCI identifier via RFC */
+#define BOOTENV_EFI_PXE_ARCH "0x5032"
+#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:5032:UNDI:003000"


Should this be 05032? X86 uses 5 digits.


These are decimal numbers so this should be
PXEClient:Arch:20530:UNDI:003000




+#elif defined(CONFIG_CPU_RISCV_64)
+/* TODO: Register VCI identifier via RFC */
+#define BOOTENV_EFI_PXE_ARCH "0x5064"
+#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:5064:UNDI:003000"


Same here.


PXEClient:Arch:20580:UNDI:003000

Regards

Heinrich



Regards

Heinrich


  #else
  #error Please specify an EFI client identifier
  #endif




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Re: [U-Boot] [RFC PATCH v1 0/1] Migrate IMAGE_FORMAT_LEGACY to Kconfig

[Tom Rini]

On Thu, Apr 19, 2018 at 04:52:30AM +, Alex Kiernan wrote:
> 
> On the face of it, this is a straightforward moveconfig, but because
> of how CONFIG_FIT_SIGNATURE, CONFIG_IMAGE_FORMAT_LEGACY and
> CONFIG_DISABLE_IMAGE_LEGACY interacted when you enabled
> CONFIG_FIT_SIGNATURE, you got CONFIG_IMAGE_FORMAT_LEGACY disabled
> immediately unless you had some way of explicitly enabling it
> elsewhere.
> 
> Kconfig doesn't give us this - CONFIG_IMAGE_FORMAT_LEGACY starts off
> enabled, CONFIG_FIT_SIGNATURE starts off disabled and if you enable
> CONFIG_FIT_SIGNATURE then CONFIG_IMAGE_FORMAT_LEGACY stays enabled.
> 
> Is there some way to preserve the existing behaviour through Kconfig
> that I've failed to figure out?

When I do these, it's a multi-step moveconfig.py that goes something
like:
- Introduce FOO (no deps)
- moveconfig.py -y it.
- Introduce BAR (no deps)
- moveconfig.py -y it.
- for FILE in configs/*defconfig;do grep -q FOO $FILE || echo '#
  CONFIG_FOO is not set' >> $FILE;done
- Repeat the for loop but for BAR.
- Introduce deps
- moveconfig.py -sC
- Build before/after for a few boards that I know are tricky, use
  buildman -SCvel/Ssdel to confirm size changes didn't happen.
- If good, world-build checking sizes.

And in some cases like this particular one, there might need to be an
initial first comment to invert the logic, and as that can be tricky
when adding a new option that _should_ be default y, first I add it
without default y, moveconfig.py -y it, for loop like above, then add
default y and moveconfig.py -s.

-- 
Tom


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Re: [U-Boot] [RFC PATCH 1/2] fpga: xilinx: zynq: Add support to decrypt images

[Stefan Herbrechtsmeier]

Am 02.04.2018 um 08:15 schrieb Siva Durga Prasad Paladugu:

This patch adds support to decrypt an encrypted bitstream
or image. This zynq aes command can either load decrypted
image back to DDR or it can load an encrypted bitsream to
PL directly by decrypting it. The image has to be encrypted
using xilinx bootgen tool and to get only the encrypted
image from tool use -split option while invoking bootgen.

Signed-off-by: Siva Durga Prasad Paladugu 
---
  arch/arm/Kconfig  |   1 +
  board/xilinx/zynq/Kconfig |  14 
  drivers/fpga/zynqpl.c | 158 ++
  include/zynqpl.h  |   5 ++
  4 files changed, 178 insertions(+)
  create mode 100644 board/xilinx/zynq/Kconfig

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 068ea1e..e0cd1d8 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1360,6 +1360,7 @@ source "board/toradex/colibri_pxa270/Kconfig"
  source "board/vscom/baltos/Kconfig"
  source "board/woodburn/Kconfig"
  source "board/work-microwave/work_92105/Kconfig"
+source "board/xilinx/zynq/Kconfig"
  source "board/xilinx/zynqmp/Kconfig"
  source "board/zipitz2/Kconfig"

diff --git a/board/xilinx/zynq/Kconfig b/board/xilinx/zynq/Kconfig
new file mode 100644
index 000..f8f8a7f
--- /dev/null
+++ b/board/xilinx/zynq/Kconfig
@@ -0,0 +1,14 @@
+# Copyright (c) 2018, Xilinx, Inc.
+#
+# SPDX-License-Identifier: GPL-2.0
+
+if ARCH_ZYNQ
+
+config CMD_ZYNQ_AES
+   bool "Zynq AES"
+   default y
+   help
+ Decrypts the encrypted image present in source address
+ and places the decrypted image at destination address.
+
+endif
diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
index db9bd12..fcffc2d 100644
--- a/drivers/fpga/zynqpl.c
+++ b/drivers/fpga/zynqpl.c
@@ -18,6 +18,7 @@

  #define DEVCFG_CTRL_PCFG_PROG_B0x4000
  #define DEVCFG_CTRL_PCFG_AES_EFUSE_MASK0x1000
+#define DEVCFG_CTRL_PCAP_RATE_EN_MASK  0x0200
  #define DEVCFG_ISR_FATAL_ERROR_MASK0x00740040
  #define DEVCFG_ISR_ERROR_FLAGS_MASK0x00340840
  #define DEVCFG_ISR_RX_FIFO_OV  0x0004
@@ -498,3 +499,160 @@ struct xilinx_fpga_op zynq_op = {
 .loadfs = zynq_loadfs,
  #endif
  };
+
+#ifdef CONFIG_CMD_ZYNQ_AES
+/*
+ * Load the encrypted image from src addr and decrypt the image and
+ * place it back the decrypted image into dstaddr.
+ */
+int zynq_decrypt_load(u32 srcaddr, u32 srclen, u32 dstaddr, u32 dstlen,
+ u8 bstype)
+{
+   u32 isr_status, ts;
+
+   if ((srcaddr < SZ_1M) || (dstaddr < SZ_1M)) {
+   printf("%s: src and dst addr should be > 1M\n",
+  __func__);
+   return FPGA_FAIL;
+   }
+
+   if (zynq_dma_xfer_init(bstype)) {
+   printf("%s: zynq_dma_xfer_init FAIL\n", __func__);
+   return FPGA_FAIL;
+   }
+
+   writel((readl(_base->ctrl) | DEVCFG_CTRL_PCAP_RATE_EN_MASK),
+  _base->ctrl);
+
+   debug("%s: Source = 0x%08X\n", __func__, (u32)srcaddr);
+   debug("%s: Size = %zu\n", __func__, srclen);
+
+   /* flush(clean & invalidate) d-cache range buf */
+   flush_dcache_range((u32)srcaddr, (u32)srcaddr +
+   roundup(srclen << 2, ARCH_DMA_MINALIGN));
+   /*
+* Flush destination address range only if image is not
+* bitstream.
+*/
+   if (bstype == BIT_NONE)
+   flush_dcache_range((u32)dstaddr, (u32)dstaddr +
+   roundup(dstlen << 2, ARCH_DMA_MINALIGN));
+
+   if (zynq_dma_transfer(srcaddr | 1, srclen, dstaddr | 1, dstlen))
+   return FPGA_FAIL;
+
+   if (bstype == BIT_FULL) {
+   isr_status = readl(_base->int_sts);
+   /* Check FPGA configuration completion */
+   ts = get_timer(0);
+   while (!(isr_status & DEVCFG_ISR_PCFG_DONE)) {
+   if (get_timer(ts) > CONFIG_SYS_FPGA_WAIT) {
+   printf("%s: Timeout wait for FPGA to config\n",
+  __func__);
+   return FPGA_FAIL;
+   }
+   isr_status = readl(_base->int_sts);
+   }
+
+   printf("%s: FPGA config done\n", __func__);
+
+   if (bstype != BIT_PARTIAL)
+   zynq_slcr_devcfg_enable();
+   }
+
+   return FPGA_SUCCESS;
+}


This function repeats much code of the existing zynq_load function.

Furthermore the existing function could be adapted to auto detect an 
encrypted image. This allows the usage of encrypted FPGA images even in 
fit images and doesn't introduces a second function zynqaes for fpga load.


Best regards
  Stefan

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Re: [U-Boot] [PATCH v2 6/8] distro: Extend with RISC-V defines

[Alexander Graf]

On 04/19/2018 07:19 PM, Heinrich Schuchardt wrote:



On 04/19/2018 05:49 PM, Alexander Graf wrote:
While we don't have VCI or UEFI naming conventions for RISC-V file 
paths yet,
we need to search for something. So let's make up a few defines that 
at least

allow us to get started until the specs officially include RISC-V.

Signed-off-by: Alexander Graf 

---

v1 -> v2:

   - Use edk2 default boot file names
---
  include/config_distro_bootcmd.h | 14 +-
  1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/include/config_distro_bootcmd.h 
b/include/config_distro_bootcmd.h

index f567cebd38..eefdfb51cc 100644
--- a/include/config_distro_bootcmd.h
+++ b/include/config_distro_bootcmd.h
@@ -100,6 +100,10 @@
  #define BOOTEFI_NAME "bootia32.efi"
  #elif defined(CONFIG_X86_RUN_64BIT)
  #define BOOTEFI_NAME "bootx64.efi"
+#elif defined(CONFIG_CPU_RISCV_32)
+#define BOOTEFI_NAME "bootriscv32.efi"
+#elif defined(CONFIG_CPU_RISCV_64)
+#define BOOTEFI_NAME "bootriscv64.efi"


Thanks for updating this.


  #endif
  #endif
  @@ -250,7 +254,15 @@
  #elif defined(CONFIG_X86)
  /* Always assume we're running 64bit */
  #define BOOTENV_EFI_PXE_ARCH "0x7"
-#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:7:UNDI:003000"
+#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch::UNDI:003000"


Did you inadvertently modify this line? The change does not relate to 
the commit message.


Ouch, not intentional of course :). I've fixed it up for v3, but will 
wait for more comments before I send it.





+#elif defined(CONFIG_CPU_RISCV_32)
+/* TODO: Register VCI identifier via RFC */
+#define BOOTENV_EFI_PXE_ARCH "0x5032"
+#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:5032:UNDI:003000"


Should this be 05032? X86 uses 5 digits.


Yes, thanks for the catch!


Alex

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Re: [U-Boot] [PATCH 6/6] cmd: Add "boot_android" command.

[Stanislas BERTRAND]

Hi Alex,

I used work available in 
https://android.googlesource.com/platform/external/u-boot/+/android-o-mr1-iot-preview-7.
I selected the n-iot-preview-4 because it is U-Boot version 2017.01 which is 
compatible with TI U-Boot work.

One quick feedback about the boot_android :

> The new "boot_android" command simply executes the Android Bootloader
> flow. This receives the location (interface, dev, partition) of the
> Android "misc" partition which is then used to lookup and infer the
> kernel and system images that should be booted from the passed slot.
> 
> Test: Booted a rpi3 build with Android Things.
> Signed-off-by: Alex Deymo 
> ---
>  README |   6 +++
>  cmd/Kconfig|  10 +
>  cmd/Makefile   |   1 +
>  cmd/boot_android.c | 126 
> +
>  4 files changed, 143 insertions(+)
>  create mode 100644 cmd/boot_android.c
> 
> diff --git a/README b/README
> index 384cc6aabb..5f62e14d94 100644
> --- a/README
> +++ b/README
> @@ -1484,6 +1484,12 @@ The following options need to be configured:
>   sending again an USB request to the device.
>  
>  - Android Bootloader support:
> + CONFIG_CMD_BOOT_ANDROID
> + This enables the command "boot_android" which executes the
> + Android Bootloader flow. Enabling CONFIG_CMD_FASTBOOT is
> + recommended to support the Android Fastboot protocol as part
> + of the bootloader.
> +
>   CONFIG_ANDROID_BOOTLOADER
>   This enables support for the Android bootloader flow. Android
>   devices can boot in normal mode, recovery mode or bootloader
> diff --git a/cmd/Kconfig b/cmd/Kconfig
> index 87a445d269..c4c22464b1 100644
> --- a/cmd/Kconfig
> +++ b/cmd/Kconfig
> @@ -431,6 +431,16 @@ config CMD_LOAD_ANDROID
> define the size and kernel address on the header, which are used by
> this command.
>  
> +config CMD_BOOT_ANDROID
> + bool "boot_android"
> + default n
> + depends on ANDROID_BOOTLOADER
> + help
> +   Performs the Android Bootloader boot flow, loading the appropriate
> +   Android image (normal kernel, recovery kernel or "bootloader" mode)
> +   and booting it. The boot mode is determined by the contents of the
> +   Android Bootloader Message.
> +
>  config CMD_FLASH
>   bool "flinfo, erase, protect"
>   default y
> diff --git a/cmd/Makefile b/cmd/Makefile
> index 2f75dab040..348cf75386 100644
> --- a/cmd/Makefile
> +++ b/cmd/Makefile
> @@ -22,6 +22,7 @@ obj-$(CONFIG_CMD_BDI) += bdinfo.o
>  obj-$(CONFIG_CMD_BEDBUG) += bedbug.o
>  obj-$(CONFIG_CMD_BLOCK_CACHE) += blkcache.o
>  obj-$(CONFIG_CMD_BMP) += bmp.o
> +obj-$(CONFIG_CMD_BOOT_ANDROID) += boot_android.o
>  obj-$(CONFIG_CMD_BOOTEFI) += bootefi.o
>  obj-$(CONFIG_CMD_BOOTMENU) += bootmenu.o
>  obj-$(CONFIG_CMD_BOOTLDR) += bootldr.o
> diff --git a/cmd/boot_android.c b/cmd/boot_android.c
> new file mode 100644
> index 00..067d9c7637
> --- /dev/null
> +++ b/cmd/boot_android.c
> @@ -0,0 +1,126 @@
> +/*
> + * Copyright (C) 2016 The Android Open Source Project
> + *
> + * SPDX-License-Identifier: BSD-2-Clause
> + */
> +
> +#include 
> +#include 
> +#include 
> +
> +/**
> + * part_get_info_by_dev_and_name - Parse a device number and partition name
> + * string in the form of "device_num;partition_name", for example "0;misc".
> + * If the partition is found, sets dev_desc and part_info accordingly with 
> the
> + * information of the partition with the given partition_name.
> + *
> + * @dev_iface:   Device interface.
> + * @dev_part_str:Input string argument, like "0;misc".
> + * @dev_desc:Place to put the device description pointer.
> + * @part_info:   Place to put the partition information.
> + * @return 0 on success, or -1 on error
> + */
> +static int part_get_info_by_dev_and_name(const char *dev_iface,
> +  const char *dev_part_str,
> +  struct blk_desc **dev_desc,
> +  disk_partition_t *part_info)
> +{
> + char *ep;
> + const char *part_str;
> + int dev_num;
> +
> + part_str = strchr(dev_part_str, ';');
> + if (!part_str)
> + return -1;
> +
> + dev_num = simple_strtoul(dev_part_str, , 16);
> + if (ep != part_str) {
> + /* Not all the first part before the ; was parsed. */
> + return -1;
> + }
> + part_str++;
> +
> + *dev_desc = blk_get_dev(dev_iface, dev_num);
> + if (!*dev_desc) {
> + printf("Could not find %s %d\n", dev_iface, dev_num);
> + return -1;
> + }
> + if (part_get_info_by_name(*dev_desc, part_str, part_info) < 0) {
> + printf("Could not find \"%s\" partition\n", part_str);
> + return -1;
> + }
> + return 0;
> +}
> +
> +static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int 

Re: [U-Boot] [PATCH v2 6/8] distro: Extend with RISC-V defines

[Heinrich Schuchardt]

On 04/19/2018 05:49 PM, Alexander Graf wrote:

While we don't have VCI or UEFI naming conventions for RISC-V file paths yet,
we need to search for something. So let's make up a few defines that at least
allow us to get started until the specs officially include RISC-V.

Signed-off-by: Alexander Graf 

---

v1 -> v2:

   - Use edk2 default boot file names
---
  include/config_distro_bootcmd.h | 14 +-
  1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
index f567cebd38..eefdfb51cc 100644
--- a/include/config_distro_bootcmd.h
+++ b/include/config_distro_bootcmd.h
@@ -100,6 +100,10 @@
  #define BOOTEFI_NAME "bootia32.efi"
  #elif defined(CONFIG_X86_RUN_64BIT)
  #define BOOTEFI_NAME "bootx64.efi"
+#elif defined(CONFIG_CPU_RISCV_32)
+#define BOOTEFI_NAME "bootriscv32.efi"
+#elif defined(CONFIG_CPU_RISCV_64)
+#define BOOTEFI_NAME "bootriscv64.efi"


Thanks for updating this.


  #endif
  #endif
  
@@ -250,7 +254,15 @@

  #elif defined(CONFIG_X86)
  /* Always assume we're running 64bit */
  #define BOOTENV_EFI_PXE_ARCH "0x7"
-#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:7:UNDI:003000"
+#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch::UNDI:003000"


Did you inadvertently modify this line? The change does not relate to 
the commit message.



+#elif defined(CONFIG_CPU_RISCV_32)
+/* TODO: Register VCI identifier via RFC */
+#define BOOTENV_EFI_PXE_ARCH "0x5032"
+#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:5032:UNDI:003000"


Should this be 05032? X86 uses 5 digits.


+#elif defined(CONFIG_CPU_RISCV_64)
+/* TODO: Register VCI identifier via RFC */
+#define BOOTENV_EFI_PXE_ARCH "0x5064"
+#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:5064:UNDI:003000"


Same here.

Regards

Heinrich


  #else
  #error Please specify an EFI client identifier
  #endif


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Re: [U-Boot] [RFC PATCH] arm: zynqmp: Add ZynqMP minimal R5 support

[Alexander Graf]

On 04/18/2018 03:11 PM, Michal Simek wrote:

Xilinx ZynqMP also contains dual Cortex R5 which can run U-Boot.
This patch is adding minimal support to get U-Boot boot.
DDR needs to be partitioned. Console is done via Cadence uart driver and
the first Cadence Triple Timer Counter is used for time.

This configuration with uart1 was tested on zcu100-revC.

U-Boot 2018.05-rc2-00021-gd058a08d907d (Apr 18 2018 - 14:11:27 +0200)

Model: Xilinx ZynqMP R5
DRAM:  512 MiB
WARNING: Caches not enabled
MMC:
In:serial@ff01
Out:   serial@ff01
Err:   serial@ff01
Net:   Net Initialization Skipped
No ethernet found.
ZynqMP r5>

There are two ways how to run this on ZynqMP.
1. Run from ZynqMP arm64
tftpb 2000 u-boot-r5.elf
setenv autostart no && bootelf -p 2000
cpu 4 disable && cpu 4 release 1000 lockstep
or
cpu 4 disable && cpu 4 release 1000 split

2. Load via jtag when directly to R5

Signed-off-by: Michal Simek 
---

  MAINTAINERS|  6 +++
  arch/arm/Kconfig   | 16 +++
  arch/arm/Makefile  |  1 +
  arch/arm/cpu/armv7r/Makefile   |  4 ++
  arch/arm/cpu/armv7r/config.mk  |  3 ++
  arch/arm/cpu/armv7r/cpu.c  | 24 ++
  arch/arm/cpu/armv7r/start.S| 17 +++
  arch/arm/dts/Makefile  |  2 +
  arch/arm/dts/zynqmp-r5.dts | 73 ++
  arch/arm/mach-zynqmp-r5/Kconfig| 27 +++
  arch/arm/mach-zynqmp-r5/Makefile   |  3 ++
  arch/arm/mach-zynqmp-r5/cpu.c  | 15 ++
  board/xilinx/zynqmp_r5/MAINTAINERS |  7 +++
  board/xilinx/zynqmp_r5/Makefile|  6 +++
  board/xilinx/zynqmp_r5/board.c | 25 ++
  configs/xilinx_zynqmp_r5_defconfig | 16 +++
  drivers/serial/Kconfig |  2 +-
  include/configs/xilinx_zynqmp_r5.h | 49 
  18 files changed, 295 insertions(+), 1 deletion(-)
  create mode 100644 arch/arm/cpu/armv7r/Makefile
  create mode 100644 arch/arm/cpu/armv7r/config.mk
  create mode 100644 arch/arm/cpu/armv7r/cpu.c
  create mode 100644 arch/arm/cpu/armv7r/start.S
  create mode 100644 arch/arm/dts/zynqmp-r5.dts
  create mode 100644 arch/arm/mach-zynqmp-r5/Kconfig
  create mode 100644 arch/arm/mach-zynqmp-r5/Makefile
  create mode 100644 arch/arm/mach-zynqmp-r5/cpu.c
  create mode 100644 board/xilinx/zynqmp_r5/MAINTAINERS
  create mode 100644 board/xilinx/zynqmp_r5/Makefile
  create mode 100644 board/xilinx/zynqmp_r5/board.c
  create mode 100644 configs/xilinx_zynqmp_r5_defconfig
  create mode 100644 include/configs/xilinx_zynqmp_r5.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 76c6f71d6af2..c78a698f75b0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -293,6 +293,12 @@ F: include/zynqmppl.h
  F:tools/zynqimage.c
  N:zynqmp
  
+ARM ZYNQMP R5

+M: Michal Simek 
+S: Maintained
+T: git git://git.denx.de/u-boot-microblaze.git
+F: arch/arm/mach-zynqmp-r5/
+
  BUILDMAN
  M:Simon Glass 
  S:Maintained
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7212fc5afa72..c6d8d4d4984d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -192,6 +192,10 @@ config CPU_V7M
select THUMB2_KERNEL
select SYS_CACHE_SHIFT_5
  
+config CPU_V7R

+   bool
+   select SYS_CACHE_SHIFT_6


I think you want to split out Cortex-R support from platform support for 
zynqmp-r5.



+
  config CPU_PXA
bool
select SYS_CACHE_SHIFT_5
@@ -209,6 +213,7 @@ config SYS_CPU
default "arm1176" if CPU_ARM1176
default "armv7" if CPU_V7
default "armv7m" if CPU_V7M
+   default "armv7r" if CPU_V7R
default "pxa" if CPU_PXA
default "sa1100" if CPU_SA1100
default "armv8" if ARM64
@@ -223,6 +228,7 @@ config SYS_ARM_ARCH
default 6 if CPU_ARM1176
default 7 if CPU_V7
default 7 if CPU_V7M
+   default 7 if CPU_V7R
default 5 if CPU_PXA
default 4 if CPU_SA1100
default 8 if ARM64
@@ -764,6 +770,14 @@ config ARCH_ZYNQ
imply FAT_WRITE
imply CMD_SPL
  
+config ARCH_ZYNQMP_R5

+   bool "Xilinx ZynqMP R5 based platform"
+   select CPU_V7R
+   select OF_CONTROL
+   select DM
+   select DM_SERIAL
+   select CLK
+
  config ARCH_ZYNQMP
bool "Xilinx ZynqMP based platform"
select ARM64
@@ -1282,6 +1296,8 @@ source "arch/arm/cpu/armv7/vf610/Kconfig"
  
  source "arch/arm/mach-zynq/Kconfig"
  
+source "arch/arm/mach-zynqmp-r5/Kconfig"

+
  source "arch/arm/cpu/armv7/Kconfig"
  
  source "arch/arm/cpu/armv8/zynqmp/Kconfig"

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 4fa8b38397d9..b4b45f3c6328 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -76,6 +76,7 @@ machine-$(CONFIG_ARCH_STM32MP)+= stm32mp
  machine-$(CONFIG_TEGRA)   += tegra
  machine-$(CONFIG_ARCH_UNIPHIER)   += uniphier
  machine-$(CONFIG_ARCH_ZYNQ) 

[U-Boot] [PATCH v2 3/8] riscv: Add EFI application infrastructure

[Alexander Graf]

The hello world binary and a few selftests require to build EFI target
binaries, not just the EFI host environment.

This patch adds all required files to generate an EFI binary for
RISC-V.

Signed-off-by: Alexander Graf 

---

new in v2
---
 arch/riscv/config.mk   |  5 ++
 arch/riscv/lib/Makefile| 11 +
 arch/riscv/lib/elf_riscv32_efi.lds | 70 +++
 arch/riscv/lib/elf_riscv64_efi.lds | 70 +++
 arch/riscv/lib/reloc_riscv_efi.c   | 97 ++
 5 files changed, 253 insertions(+)
 create mode 100644 arch/riscv/lib/elf_riscv32_efi.lds
 create mode 100644 arch/riscv/lib/elf_riscv64_efi.lds
 create mode 100644 arch/riscv/lib/reloc_riscv_efi.c

diff --git a/arch/riscv/config.mk b/arch/riscv/config.mk
index 69f4cf6ce8..9175aa765d 100644
--- a/arch/riscv/config.mk
+++ b/arch/riscv/config.mk
@@ -19,10 +19,12 @@ endif
 
 ifdef CONFIG_32BIT
 PLATFORM_LDFLAGS   += -m $(32bit-emul)
+EFI_LDS:= elf_riscv32_efi.lds
 endif
 
 ifdef CONFIG_64BIT
 PLATFORM_LDFLAGS   += -m $(64bit-emul)
+EFI_LDS:= elf_riscv64_efi.lds
 endif
 
 CONFIG_STANDALONE_LOAD_ADDR = 0x \
@@ -31,3 +33,6 @@ CONFIG_STANDALONE_LOAD_ADDR = 0x \
 PLATFORM_CPPFLAGS  += -ffixed-gp -fpic
 PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -gdwarf-2 
-ffunction-sections
 LDFLAGS_u-boot += --gc-sections -static -pie
+
+EFI_CRT0   := crt0_riscv_efi.o
+EFI_RELOC  := reloc_riscv_efi.o
diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
index 6d97aa2719..33f80ebdca 100644
--- a/arch/riscv/lib/Makefile
+++ b/arch/riscv/lib/Makefile
@@ -13,3 +13,14 @@ obj-$(CONFIG_CMD_GO) += boot.o
 obj-y  += cache.o
 obj-y  += interrupts.o
 obj-y   += setjmp.o
+
+# For building EFI apps
+CFLAGS_$(EFI_CRT0) := $(CFLAGS_EFI)
+CFLAGS_REMOVE_$(EFI_CRT0) := $(CFLAGS_NON_EFI)
+
+CFLAGS_$(EFI_RELOC) := $(CFLAGS_EFI)
+CFLAGS_REMOVE_$(EFI_RELOC) := $(CFLAGS_NON_EFI)
+
+extra-$(CONFIG_CMD_BOOTEFI_HELLO_COMPILE) += $(EFI_CRT0) $(EFI_RELOC)
+extra-$(CONFIG_CMD_BOOTEFI_SELFTEST) += $(EFI_CRT0) $(EFI_RELOC)
+extra-$(CONFIG_EFI) += $(EFI_CRT0) $(EFI_RELOC)
diff --git a/arch/riscv/lib/elf_riscv32_efi.lds 
b/arch/riscv/lib/elf_riscv32_efi.lds
new file mode 100644
index 00..96d11985b0
--- /dev/null
+++ b/arch/riscv/lib/elf_riscv32_efi.lds
@@ -0,0 +1,70 @@
+/*
+ * U-Boot riscv32 EFI linker script
+ *
+ * SPDX-License-Identifier:BSD-2-Clause
+ *
+ * Modified from arch/arm/lib/elf_aarch64_efi.lds
+ */
+
+OUTPUT_FORMAT("elf32-littleriscv", "elf32-littleriscv", "elf32-littleriscv")
+OUTPUT_ARCH(riscv)
+ENTRY(_start)
+SECTIONS
+{
+   .text 0x0 : {
+   _text = .;
+   *(.text.head)
+   *(.text)
+   *(.text.*)
+   *(.gnu.linkonce.t.*)
+   *(.srodata)
+   *(.rodata*)
+   . = ALIGN(16);
+   }
+   _etext = .;
+   _text_size = . - _text;
+   .dynamic  : { *(.dynamic) }
+   .data : {
+   _data = .;
+   *(.sdata)
+   *(.data)
+   *(.data1)
+   *(.data.*)
+   *(.got.plt)
+   *(.got)
+
+   /*
+* The EFI loader doesn't seem to like a .bss section, so we
+* stick it all into .data:
+*/
+   . = ALIGN(16);
+   _bss = .;
+   *(.sbss)
+   *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(.bss.*)
+   *(COMMON)
+   . = ALIGN(16);
+   _bss_end = .;
+   _edata = .;
+   }
+   .rela.dyn : { *(.rela.dyn) }
+   .rela.plt : { *(.rela.plt) }
+   .rela.got : { *(.rela.got) }
+   .rela.data : { *(.rela.data) *(.rela.data*) }
+   _data_size = . - _etext;
+
+   . = ALIGN(4096);
+   .dynsym   : { *(.dynsym) }
+   . = ALIGN(4096);
+   .dynstr   : { *(.dynstr) }
+   . = ALIGN(4096);
+   .note.gnu.build-id : { *(.note.gnu.build-id) }
+   /DISCARD/ : {
+   *(.rel.reloc)
+   *(.eh_frame)
+   *(.note.GNU-stack)
+   }
+   .comment 0 : { *(.comment) }
+}
diff --git a/arch/riscv/lib/elf_riscv64_efi.lds 
b/arch/riscv/lib/elf_riscv64_efi.lds
new file mode 100644
index 00..25c863de8a
--- /dev/null
+++ b/arch/riscv/lib/elf_riscv64_efi.lds
@@ -0,0 +1,70 @@
+/*
+ * U-Boot riscv64 EFI linker script
+ *
+ * SPDX-License-Identifier:BSD-2-Clause
+ *
+ * Modified from arch/arm/lib/elf_aarch64_efi.lds
+ */
+
+OUTPUT_FORMAT("elf64-littleriscv", "elf64-littleriscv", "elf64-littleriscv")
+OUTPUT_ARCH(riscv)
+ENTRY(_start)
+SECTIONS
+{
+   .text 0x0 : {
+   _text = .;
+   *(.text.head)
+   *(.text)
+   *(.text.*)
+   *(.gnu.linkonce.t.*)
+   *(.srodata)
+ 

[U-Boot] [PATCH v2 0/8] riscv: Enable efi_loader support

[Alexander Graf]

We now have RISC-V support in U-Boot - which is great!

However, not that we're finally making progress to converge on
efi_loader and distro boot for booting on ARM platforms, we
really want to make sure there is no technical reason not to
do the same on RISC-V as well.

So this patch set introduces distro boot and efi_loader support
for RISC-V!

So far, I've only tested it with the selftest and hello world
target in U-Boot, as the number of target binaries to run is
still slim. But it should at least give us a good starting point.

v1 -> v2:

  - Allow 32bit target
  - Also save/restore ra, sp
  - Use edk2 default boot file names
  - Enable hello world binary
  - remove patch: efi_loader: selftest: Do not build relocation tests for risc-v
  - new patch: riscv: Add EFI application infrastructure

Alexander Graf (8):
  riscv: Add setjmp/longjmp code
  riscv: Enable function sections
  riscv: Add EFI application infrastructure
  riscv: Add board_quiesce_devices stub
  efi_loader: Use EFI_CACHELINE_SIZE in the image loader too
  distro: Extend with RISC-V defines
  riscv: nx25: Enable distro boot
  efi_loader: Enable RISC-V support

 arch/riscv/config.mk  |  7 ++-
 arch/riscv/cpu/nx25/u-boot.lds| 16 ++
 arch/riscv/include/asm/setjmp.h   | 26 ++
 arch/riscv/include/asm/u-boot-riscv.h |  1 +
 arch/riscv/lib/Makefile   | 12 +
 arch/riscv/lib/bootm.c|  4 ++
 arch/riscv/lib/elf_riscv32_efi.lds| 70 +
 arch/riscv/lib/elf_riscv64_efi.lds| 70 +
 arch/riscv/lib/reloc_riscv_efi.c  | 97 +++
 arch/riscv/lib/setjmp.S   | 66 
 cmd/Kconfig   |  2 +-
 configs/nx25-ae250_defconfig  |  1 +
 include/config_distro_bootcmd.h   | 14 -
 include/configs/nx25-ae250.h  | 17 ++
 include/efi_loader.h  |  7 +++
 lib/efi_loader/Kconfig|  2 +-
 lib/efi_loader/efi_image_loader.c |  2 +-
 lib/efi_loader/efi_runtime.c  | 48 -
 18 files changed, 445 insertions(+), 17 deletions(-)
 create mode 100644 arch/riscv/include/asm/setjmp.h
 create mode 100644 arch/riscv/lib/elf_riscv32_efi.lds
 create mode 100644 arch/riscv/lib/elf_riscv64_efi.lds
 create mode 100644 arch/riscv/lib/reloc_riscv_efi.c
 create mode 100644 arch/riscv/lib/setjmp.S

-- 
2.12.3

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[U-Boot] [PATCH v2 2/8] riscv: Enable function sections

[Alexander Graf]

The linker can remove sections that are never addressed, so it makes a lot
of sense to declare every function as an individual section.

This reduces the output U-Boot code size by ~30kb for me.

Signed-off-by: Alexander Graf 
---
 arch/riscv/config.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/config.mk b/arch/riscv/config.mk
index 6b681c4286..69f4cf6ce8 100644
--- a/arch/riscv/config.mk
+++ b/arch/riscv/config.mk
@@ -29,5 +29,5 @@ CONFIG_STANDALONE_LOAD_ADDR = 0x \
  -T $(srctree)/examples/standalone/riscv.lds
 
 PLATFORM_CPPFLAGS  += -ffixed-gp -fpic
-PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -gdwarf-2
+PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -gdwarf-2 
-ffunction-sections
 LDFLAGS_u-boot += --gc-sections -static -pie
-- 
2.12.3

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[U-Boot] [PATCH v2 8/8] efi_loader: Enable RISC-V support

[Alexander Graf]

We have almost all pieces needed to support RISC-V UEFI binaries in place
already. The only missing piece are ELF relocations for runtime code and
data.

This patch adds respective support in the linker script and the runtime
relocation code. It also allows users to enable the EFI_LOADER configuration
switch on RISC-V platforms.

Signed-off-by: Alexander Graf 

---

v1 -> v2:

  - Enable hello world binary
---
 arch/riscv/cpu/nx25/u-boot.lds | 16 
 cmd/Kconfig|  2 +-
 lib/efi_loader/Kconfig |  2 +-
 lib/efi_loader/efi_runtime.c   | 41 -
 4 files changed, 54 insertions(+), 7 deletions(-)

diff --git a/arch/riscv/cpu/nx25/u-boot.lds b/arch/riscv/cpu/nx25/u-boot.lds
index 936fd779aa..508fa7e58d 100644
--- a/arch/riscv/cpu/nx25/u-boot.lds
+++ b/arch/riscv/cpu/nx25/u-boot.lds
@@ -38,6 +38,22 @@ SECTIONS
KEEP(*(SORT(.u_boot_list*)));
}
 
+   . = ALIGN(4);
+
+   .efi_runtime : {
+__efi_runtime_start = .;
+   *(efi_runtime_text)
+   *(efi_runtime_data)
+__efi_runtime_stop = .;
+   }
+
+   .efi_runtime_rel : {
+__efi_runtime_rel_start = .;
+   *(.relaefi_runtime_text)
+   *(.relaefi_runtime_data)
+__efi_runtime_rel_stop = .;
+   }
+
 . = ALIGN(4);
 
 /DISCARD/ : { *(.rela.plt*) }
diff --git a/cmd/Kconfig b/cmd/Kconfig
index bc1d2f31c0..c9883a40e7 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -228,7 +228,7 @@ config CMD_BOOTEFI
 
 config CMD_BOOTEFI_HELLO_COMPILE
bool "Compile a standard EFI hello world binary for testing"
-   depends on CMD_BOOTEFI && (ARM || X86)
+   depends on CMD_BOOTEFI && (ARM || X86 || RISCV)
default y
help
  This compiles a standard EFI hello world application with U-Boot so
diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index 83d75c4fdc..9de58bb012 100644
--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
@@ -1,6 +1,6 @@
 config EFI_LOADER
bool "Support running EFI Applications in U-Boot"
-   depends on (ARM || X86) && OF_LIBFDT
+   depends on (ARM || X86 || RISCV) && OF_LIBFDT
# We need EFI_STUB_64BIT to be set on x86_64 with EFI_STUB
depends on !EFI_STUB || !X86_64 || EFI_STUB_64BIT
# We need EFI_STUB_32BIT to be set on x86_32 with EFI_STUB
diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c
index 573a5d6ac1..33bbc8d6cc 100644
--- a/lib/efi_loader/efi_runtime.c
+++ b/lib/efi_loader/efi_runtime.c
@@ -41,6 +41,25 @@ static efi_status_t __efi_runtime EFIAPI 
efi_invalid_parameter(void);
 #include 
 #define R_RELATIVE R_386_RELATIVE
 #define R_MASK 0xffULL
+#elif defined(CONFIG_RISCV)
+#include 
+#define R_RELATIVE R_RISCV_RELATIVE
+#define R_MASK 0xffULL
+#define IS_RELA1
+
+struct dyn_sym {
+   ulong foo1;
+   ulong addr;
+   u32 foo2;
+   u32 foo3;
+};
+#ifdef CONFIG_CPU_RISCV_32
+#define R_ABSOLUTE R_RISCV_32
+#define SYM_INDEX  8
+#else
+#define R_ABSOLUTE R_RISCV_64
+#define SYM_INDEX  32
+#endif
 #else
 #error Need to add relocation awareness
 #endif
@@ -247,15 +266,27 @@ void efi_runtime_relocate(ulong offset, struct 
efi_mem_desc *map)
 
p = (void*)((ulong)rel->offset - base) + gd->relocaddr;
 
-   if ((rel->info & R_MASK) != R_RELATIVE) {
-   continue;
-   }
+   debug("%s: rel->info=%#lx *p=%#lx rel->offset=%p\n", __func__, 
rel->info, *p, rel->offset);
 
+   switch (rel->info & R_MASK) {
+   case R_RELATIVE:
 #ifdef IS_RELA
-   newaddr = rel->addend + offset - CONFIG_SYS_TEXT_BASE;
+   newaddr = rel->addend + offset - CONFIG_SYS_TEXT_BASE;
 #else
-   newaddr = *p - lastoff + offset;
+   newaddr = *p - lastoff + offset;
 #endif
+   break;
+#ifdef R_ABSOLUTE
+   case R_ABSOLUTE: {
+   ulong symidx = rel->info >> SYM_INDEX;
+   extern struct dyn_sym __dyn_sym_start[];
+   newaddr = __dyn_sym_start[symidx].addr + offset;
+   break;
+   }
+#endif
+   default:
+   continue;
+   }
 
/* Check if the relocation is inside bounds */
if (map && ((newaddr < map->virtual_start) ||
-- 
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[U-Boot] [PATCH v2 1/8] riscv: Add setjmp/longjmp code

[Alexander Graf]

To support efi_loader we need to have platform support for setjmp/longjmp.
Add it here.

Signed-off-by: Alexander Graf 

---

v1 -> v2:

  - Allow 32bit target
  - Also save/restore ra, sp
---
 arch/riscv/include/asm/setjmp.h | 26 
 arch/riscv/lib/Makefile |  1 +
 arch/riscv/lib/setjmp.S | 66 +
 3 files changed, 93 insertions(+)
 create mode 100644 arch/riscv/include/asm/setjmp.h
 create mode 100644 arch/riscv/lib/setjmp.S

diff --git a/arch/riscv/include/asm/setjmp.h b/arch/riscv/include/asm/setjmp.h
new file mode 100644
index 00..01ad6d081f
--- /dev/null
+++ b/arch/riscv/include/asm/setjmp.h
@@ -0,0 +1,26 @@
+/*
+ * (C) Copyright 2018 Alexander Graf 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _SETJMP_H_
+#define _SETJMP_H_ 1
+
+/*
+ * This really should be opaque, but the EFI implementation wrongly
+ * assumes that a 'struct jmp_buf_data' is defined.
+ */
+struct jmp_buf_data {
+   /* x2, x8, x9, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, sp */
+   unsigned long s_regs[12];   /* s0 - s11 */
+   unsigned long ra;
+   unsigned long sp;
+};
+
+typedef struct jmp_buf_data jmp_buf[1];
+
+int setjmp(jmp_buf jmp);
+void longjmp(jmp_buf jmp, int ret);
+
+#endif /* _SETJMP_H_ */
diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
index 323cf3e835..6d97aa2719 100644
--- a/arch/riscv/lib/Makefile
+++ b/arch/riscv/lib/Makefile
@@ -12,3 +12,4 @@ obj-$(CONFIG_CMD_BOOTM) += bootm.o
 obj-$(CONFIG_CMD_GO) += boot.o
 obj-y  += cache.o
 obj-y  += interrupts.o
+obj-y   += setjmp.o
diff --git a/arch/riscv/lib/setjmp.S b/arch/riscv/lib/setjmp.S
new file mode 100644
index 00..103f359185
--- /dev/null
+++ b/arch/riscv/lib/setjmp.S
@@ -0,0 +1,66 @@
+/*
+ * (C) 2018 Alexander Graf 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+
+#ifdef CONFIG_CPU_RISCV_64
+#define STORE_IDX(reg, idx)sd reg, (idx*8)(a0)
+#define LOAD_IDX(reg, idx) ld reg, (idx*8)(a0)
+#else
+#define STORE_IDX(reg, idx)sw reg, (idx*4)(a0)
+#define LOAD_IDX(reg, idx) lw reg, (idx*4)(a0)
+#endif
+
+.pushsection .text.setjmp, "ax"
+ENTRY(setjmp)
+   /* Preserve all callee-saved registers and the SP */
+   STORE_IDX(s0, 0)
+   STORE_IDX(s1, 1)
+   STORE_IDX(s2, 2)
+   STORE_IDX(s3, 3)
+   STORE_IDX(s4, 4)
+   STORE_IDX(s5, 5)
+   STORE_IDX(s6, 6)
+   STORE_IDX(s7, 7)
+   STORE_IDX(s8, 8)
+   STORE_IDX(s9, 9)
+   STORE_IDX(s10, 10)
+   STORE_IDX(s11, 11)
+   STORE_IDX(ra, 12)
+   STORE_IDX(sp, 13)
+   li  a0, 0
+   ret
+ENDPROC(setjmp)
+.popsection
+
+.pushsection .text.longjmp, "ax"
+ENTRY(longjmp)
+   LOAD_IDX(s0, 0)
+   LOAD_IDX(s1, 1)
+   LOAD_IDX(s2, 2)
+   LOAD_IDX(s3, 3)
+   LOAD_IDX(s4, 4)
+   LOAD_IDX(s5, 5)
+   LOAD_IDX(s6, 6)
+   LOAD_IDX(s7, 7)
+   LOAD_IDX(s8, 8)
+   LOAD_IDX(s9, 9)
+   LOAD_IDX(s10, 10)
+   LOAD_IDX(s11, 11)
+   LOAD_IDX(ra, 12)
+   LOAD_IDX(sp, 13)
+
+   /* Move the return value in place, but return 1 if passed 0. */
+   beq a1, zero, longjmp_1
+   mv a0, a1
+   ret
+
+   longjmp_1:
+   li a0, 1
+   ret
+ENDPROC(longjmp)
+.popsection
-- 
2.12.3

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[U-Boot] [PATCH v2 5/8] efi_loader: Use EFI_CACHELINE_SIZE in the image loader too

[Alexander Graf]

We were using our EFI_CACHELINE_SIZE define only in the runtime service
code, but left the image loader to use plain CONFIG_SYS_CACHELINE_SIZE.

This patch moves EFI_CACHELINE_SIZE into efi_loader.h and converts
the image loader to use it.

Signed-off-by: Alexander Graf 
---
 include/efi_loader.h  | 7 +++
 lib/efi_loader/efi_image_loader.c | 2 +-
 lib/efi_loader/efi_runtime.c  | 7 ---
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/include/efi_loader.h b/include/efi_loader.h
index 17f9d3d1ef..0b1b3df55a 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -76,6 +76,13 @@ const char *__efi_nesting_dec(void);
##__VA_ARGS__); \
})
 
+#ifdef CONFIG_SYS_CACHELINE_SIZE
+#define EFI_CACHELINE_SIZE CONFIG_SYS_CACHELINE_SIZE
+#else
+/* Just use the greatest cache flush alignment requirement I'm aware of */
+#define EFI_CACHELINE_SIZE 128
+#endif
+
 extern struct efi_runtime_services efi_runtime_services;
 extern struct efi_system_table systab;
 
diff --git a/lib/efi_loader/efi_image_loader.c 
b/lib/efi_loader/efi_image_loader.c
index d5fbba3138..2476a97a6a 100644
--- a/lib/efi_loader/efi_image_loader.c
+++ b/lib/efi_loader/efi_image_loader.c
@@ -290,7 +290,7 @@ void *efi_load_pe(void *efi, struct efi_loaded_image 
*loaded_image_info)
 
/* Flush cache */
flush_cache((ulong)efi_reloc,
-   ALIGN(virt_size, CONFIG_SYS_CACHELINE_SIZE));
+   ALIGN(virt_size, EFI_CACHELINE_SIZE));
invalidate_icache_all();
 
/* Populate the loaded image interface bits */
diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c
index 8558124c0a..573a5d6ac1 100644
--- a/lib/efi_loader/efi_runtime.c
+++ b/lib/efi_loader/efi_runtime.c
@@ -30,13 +30,6 @@ static efi_status_t __efi_runtime EFIAPI 
efi_unimplemented(void);
 static efi_status_t __efi_runtime EFIAPI efi_device_error(void);
 static efi_status_t __efi_runtime EFIAPI efi_invalid_parameter(void);
 
-#ifdef CONFIG_SYS_CACHELINE_SIZE
-#define EFI_CACHELINE_SIZE CONFIG_SYS_CACHELINE_SIZE
-#else
-/* Just use the greatest cache flush alignment requirement I'm aware of */
-#define EFI_CACHELINE_SIZE 128
-#endif
-
 #if defined(CONFIG_ARM64)
 #define R_RELATIVE 1027
 #define R_MASK 0xULL
-- 
2.12.3

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[U-Boot] [PATCH v2 6/8] distro: Extend with RISC-V defines

[Alexander Graf]

While we don't have VCI or UEFI naming conventions for RISC-V file paths yet,
we need to search for something. So let's make up a few defines that at least
allow us to get started until the specs officially include RISC-V.

Signed-off-by: Alexander Graf 

---

v1 -> v2:

  - Use edk2 default boot file names
---
 include/config_distro_bootcmd.h | 14 +-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
index f567cebd38..eefdfb51cc 100644
--- a/include/config_distro_bootcmd.h
+++ b/include/config_distro_bootcmd.h
@@ -100,6 +100,10 @@
 #define BOOTEFI_NAME "bootia32.efi"
 #elif defined(CONFIG_X86_RUN_64BIT)
 #define BOOTEFI_NAME "bootx64.efi"
+#elif defined(CONFIG_CPU_RISCV_32)
+#define BOOTEFI_NAME "bootriscv32.efi"
+#elif defined(CONFIG_CPU_RISCV_64)
+#define BOOTEFI_NAME "bootriscv64.efi"
 #endif
 #endif
 
@@ -250,7 +254,15 @@
 #elif defined(CONFIG_X86)
 /* Always assume we're running 64bit */
 #define BOOTENV_EFI_PXE_ARCH "0x7"
-#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:7:UNDI:003000"
+#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch::UNDI:003000"
+#elif defined(CONFIG_CPU_RISCV_32)
+/* TODO: Register VCI identifier via RFC */
+#define BOOTENV_EFI_PXE_ARCH "0x5032"
+#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:5032:UNDI:003000"
+#elif defined(CONFIG_CPU_RISCV_64)
+/* TODO: Register VCI identifier via RFC */
+#define BOOTENV_EFI_PXE_ARCH "0x5064"
+#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:5064:UNDI:003000"
 #else
 #error Please specify an EFI client identifier
 #endif
-- 
2.12.3

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[U-Boot] [PATCH v2 7/8] riscv: nx25: Enable distro boot

[Alexander Graf]

Distro boot allows for a common boot path on systems that allow distributions
to easily boot from a default configuration.

This patch enables distro boot for the nx25-ae250. Hopefully this can serve
as a good example for new boards, so they enable it as well.

Signed-off-by: Alexander Graf 
---
 configs/nx25-ae250_defconfig |  1 +
 include/configs/nx25-ae250.h | 17 +
 2 files changed, 18 insertions(+)

diff --git a/configs/nx25-ae250_defconfig b/configs/nx25-ae250_defconfig
index 4f9bd58f75..437083231b 100644
--- a/configs/nx25-ae250_defconfig
+++ b/configs/nx25-ae250_defconfig
@@ -37,3 +37,4 @@ CONFIG_DM_SPI=y
 CONFIG_ATCSPI200_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATCPIT100_TIMER=y
+CONFIG_DISTRO_DEFAULTS=y
diff --git a/include/configs/nx25-ae250.h b/include/configs/nx25-ae250.h
index 0e4c431cab..a90c75abc4 100644
--- a/include/configs/nx25-ae250.h
+++ b/include/configs/nx25-ae250.h
@@ -105,4 +105,21 @@
 /* Increase max gunzip size */
 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)
 
+/* When we use RAM as ENV */
+#define CONFIG_ENV_SIZE 0x2000
+
+/* Enable distro boot */
+#define BOOT_TARGET_DEVICES(func) \
+   func(MMC, mmc, 0) \
+   func(DHCP, dhcp, na)
+#include 
+
+#define CONFIG_EXTRA_ENV_SETTINGS  \
+   "kernel_addr_r=0x0008\0" \
+   "pxefile_addr_r=0x01f0\0" \
+   "scriptaddr=0x01f0\0" \
+   "fdt_addr_r=0x0200\0" \
+   "ramdisk_addr_r=0x0280\0" \
+   BOOTENV
+
 #endif /* __CONFIG_H */
-- 
2.12.3

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[U-Boot] [PATCH v2 4/8] riscv: Add board_quiesce_devices stub

[Alexander Graf]

This patch adds an empty stub for board_quiesce_devices() which allows boards
to quiesce their devices before we boot into an OS in a platform agnostic way.

Signed-off-by: Alexander Graf 
---
 arch/riscv/include/asm/u-boot-riscv.h | 1 +
 arch/riscv/lib/bootm.c| 4 
 2 files changed, 5 insertions(+)

diff --git a/arch/riscv/include/asm/u-boot-riscv.h 
b/arch/riscv/include/asm/u-boot-riscv.h
index 18099cd260..0b6428b1ae 100644
--- a/arch/riscv/include/asm/u-boot-riscv.h
+++ b/arch/riscv/include/asm/u-boot-riscv.h
@@ -17,5 +17,6 @@ int cleanup_before_linux(void);
 
 /* board/.../... */
 int board_init(void);
+void board_quiesce_devices(void);
 
 #endif /* _U_BOOT_RISCV_H_ */
diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
index 9242fa891a..b80274adba 100644
--- a/arch/riscv/lib/bootm.c
+++ b/arch/riscv/lib/bootm.c
@@ -16,6 +16,10 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+__weak void board_quiesce_devices(void)
+{
+}
+
 int arch_fixup_fdt(void *blob)
 {
return 0;
-- 
2.12.3

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Re: [U-Boot] [PATCH 1/2] nand: zynq: Fix driver initialization

[Ezequiel Garcia]

Hi Michal,

On 19 April 2018 at 08:10, Michal Simek  wrote:
> From: Ezequiel Garcia 
>
> This driver is currently broken, refusing to initialize properly.
>
> The reason is that get_nand_dev_by_index() was being called before
> nand_register(), thus returning a pointer into uninitialized memory.
> In other words, the struct mtd_info used by the driver is total junk.
>
> Fix it by getting the correct struct mtd_info, via nand_to_mtd()
> on the driver's struct nand_chip.
>
> Tested on a custom board, where the CPU is halted without this patch.
>
> Signed-off-by: Ezequiel Garcia 
> Reviewed-by: Michal Simek 
> Signed-off-by: Michal Simek 

Thanks for collecting these and submitting them!

BTW, I thought there was no need for a reviewed-by on top
of a signed-off-by. It's kind of assumed that if you are signing
something, you have reviewed it in the first place.

Or at least that's how I've been doing it.
-- 
Ezequiel García, VanguardiaSur
www.vanguardiasur.com.ar
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[U-Boot] [PATCH] DW SPI: invert wait condition in dw_spi_xfer

[Eugeniy Paltsev]

While switching to readl_poll_timeout macros from custom code
the waiting condition was accidently inverted, so it was pure
luck that this code works at least in some conditions.

Fix that by inverting exit condition for readl_poll_timeout.

Fixes: c6b4f031d9 ("DW SPI: fix tx data loss on FIFO flush")

Signed-off-by: Eugeniy Paltsev 
---
 drivers/spi/designware_spi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index 0e93b62eee..5e2d290ddc 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -425,7 +425,7 @@ static int dw_spi_xfer(struct udevice *dev, unsigned int 
bitlen,
 * in the beginning of new transfer.
 */
if (readl_poll_timeout(priv->regs + DW_SPI_SR, val,
-  !(val & SR_TF_EMPT) || (val & SR_BUSY),
+  (val & SR_TF_EMPT) && !(val & SR_BUSY),
   RX_TIMEOUT * 1000)) {
ret = -ETIMEDOUT;
}
-- 
2.14.3

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Re: [U-Boot] [PATCH] rsa-sign: Fix build against libressl

[Jonathan Gray]

On Wed, Apr 18, 2018 at 10:37:43PM +0200, Hauke Mehrtens wrote:
> Libressl implements the OpenSSL 1.1 API partially and improved the
> support with version 2.7. For some code we have to take use the OpenSSL
> 1.0 API and for some parts the OpenSSL 1.1 API can be used.
> This was compile tested against libressl 2.6.4 and 2.7.2.

The parts that don't test LIBRESSL_VERSION_NUMBER look suspect.

> 
> Signed-off-by: Hauke Mehrtens 
> ---
>  lib/rsa/rsa-sign.c | 15 +--
>  1 file changed, 9 insertions(+), 6 deletions(-)
> 
> diff --git a/lib/rsa/rsa-sign.c b/lib/rsa/rsa-sign.c
> index 1da4ef7fff..b2a4446d83 100644
> --- a/lib/rsa/rsa-sign.c
> +++ b/lib/rsa/rsa-sign.c
> @@ -21,7 +21,8 @@
>  #define HAVE_ERR_REMOVE_THREAD_STATE
>  #endif
>  
> -#if OPENSSL_VERSION_NUMBER < 0x1010L
> +#if OPENSSL_VERSION_NUMBER < 0x1010L || \
> +(defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 
> 0x207fL)
>  static void RSA_get0_key(const RSA *r,
>   const BIGNUM **n, const BIGNUM **e, const BIGNUM **d)
>  {
> @@ -300,7 +301,8 @@ static int rsa_init(void)
>  {
>   int ret;
>  
> -#if OPENSSL_VERSION_NUMBER < 0x1010L
> +#if OPENSSL_VERSION_NUMBER < 0x1010L || \
> +(defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 
> 0x207fL)
>   ret = SSL_library_init();
>  #else
>   ret = OPENSSL_init_ssl(0, NULL);
> @@ -309,7 +311,7 @@ static int rsa_init(void)
>   fprintf(stderr, "Failure to init SSL library\n");
>   return -1;
>   }
> -#if OPENSSL_VERSION_NUMBER < 0x1010L
> +#if OPENSSL_VERSION_NUMBER < 0x1010L || defined(LIBRESSL_VERSION_NUMBER)
>   SSL_load_error_strings();
>  
>   OpenSSL_add_all_algorithms();

Shouldn't this block also be gated by VERSION < 0x207fL as 
SSL_library_init()
covers it?

> @@ -355,7 +357,7 @@ err_set_rsa:
>  err_engine_init:
>   ENGINE_free(e);
>  err_engine_by_id:
> -#if OPENSSL_VERSION_NUMBER < 0x1010L
> +#if OPENSSL_VERSION_NUMBER < 0x1010L ||  defined(LIBRESSL_VERSION_NUMBER)
>   ENGINE_cleanup();
>  #endif
>   return ret;
> @@ -363,7 +365,7 @@ err_engine_by_id:
>  
>  static void rsa_remove(void)
>  {
> -#if OPENSSL_VERSION_NUMBER < 0x1010L
> +#if OPENSSL_VERSION_NUMBER < 0x1010L || defined(LIBRESSL_VERSION_NUMBER)
>   CRYPTO_cleanup_all_ex_data();
>   ERR_free_strings();
>  #ifdef HAVE_ERR_REMOVE_THREAD_STATE
> @@ -433,7 +435,8 @@ static int rsa_sign_with_key(RSA *rsa, struct 
> checksum_algo *checksum_algo,
>   ret = rsa_err("Could not obtain signature");
>   goto err_sign;
>   }
> - #if OPENSSL_VERSION_NUMBER < 0x1010L
> + #if OPENSSL_VERSION_NUMBER < 0x1010L || \
> + defined(LIBRESSL_VERSION_NUMBER)
>   EVP_MD_CTX_cleanup(context);
>   #else
>   EVP_MD_CTX_reset(context);

EVP_MD_CTX_reset is present in recent LibreSSL as well and
should be used here.
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[U-Boot] send message on serial ports

[Ran Shalit]

Hello,

Is it possible to send a message on different uart ports , while
leaving the console in the same port ?
Which command in common can be used for that ?

Thank you,
ranran
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[U-Boot] [PATCH] arm64: zynqmp: Wire watchdog internals

[Michal Simek]

Enable watchdog in full U-Boot.

Similar changes were done by:
"arm: zynq: Wire watchdog internals"
(sha1: e6cc3b25d721c3001019f8b44bfaae2a57255162)

Signed-off-by: Michal Simek 
---

 board/xilinx/zynqmp/zynqmp.c | 42 
 1 file changed, 42 insertions(+)

diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 65bd12024f2e..cb110762083b 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -10,11 +10,13 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -23,6 +25,10 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
+static struct udevice *watchdog_dev;
+#endif
+
 #if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \
 !defined(CONFIG_SPL_BUILD)
 static xilinx_desc zynqmppl = XILINX_ZYNQMP_DESC;
@@ -282,6 +288,11 @@ int board_early_init_f(void)
ret = psu_init();
 #endif
 
+#if defined(CONFIG_WDT) && !defined(CONFIG_SPL_BUILD)
+   /* bss is not cleared at time when watchdog_reset() is called */
+   watchdog_dev = NULL;
+#endif
+
return ret;
 }
 
@@ -300,9 +311,40 @@ int board_init(void)
}
 #endif
 
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
+   if (uclass_get_device(UCLASS_WDT, 0, _dev)) {
+   puts("Watchdog: Not found!\n");
+   } else {
+   wdt_start(watchdog_dev, 0, 0);
+   puts("Watchdog: Started\n");
+   }
+#endif
+
return 0;
 }
 
+#ifdef CONFIG_WATCHDOG
+/* Called by macro WATCHDOG_RESET */
+void watchdog_reset(void)
+{
+# if !defined(CONFIG_SPL_BUILD)
+   static ulong next_reset;
+   ulong now;
+
+   if (!watchdog_dev)
+   return;
+
+   now = timer_get_us();
+
+   /* Do not reset the watchdog too often */
+   if (now > next_reset) {
+   wdt_reset(watchdog_dev);
+   next_reset = now + 1000;
+   }
+# endif
+}
+#endif
+
 int board_early_init_r(void)
 {
u32 val;
-- 
2.17.0

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[U-Boot] [PATCH] watchdog: cadence: Show used timeout value

[Michal Simek]

Debug message was showing timeout value which was passed to start
function but there is a checking if this value can be setup.
The patch is moving this debug printf function below checking.

Signed-off-by: Michal Simek 
---

 drivers/watchdog/cdns_wdt.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/watchdog/cdns_wdt.c b/drivers/watchdog/cdns_wdt.c
index c43f7e8096ca..25cb34c493d2 100644
--- a/drivers/watchdog/cdns_wdt.c
+++ b/drivers/watchdog/cdns_wdt.c
@@ -143,13 +143,13 @@ static int cdns_wdt_start(struct udevice *dev, u64 
timeout, ulong flags)
return -1;
}
 
-   debug("%s: CLK_FREQ %ld, timeout %lld\n", __func__, clk_f, timeout);
-
if ((timeout < CDNS_WDT_MIN_TIMEOUT) ||
(timeout > CDNS_WDT_MAX_TIMEOUT)) {
timeout = priv->timeout;
}
 
+   debug("%s: CLK_FREQ %ld, timeout %lld\n", __func__, clk_f, timeout);
+
if (clk_f <= CDNS_WDT_CLK_75MHZ) {
prescaler = CDNS_WDT_PRESCALE_512;
ctrl_clksel = CDNS_WDT_PRESCALE_SELECT_512;
-- 
2.17.0

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[U-Boot] [PATCH] cmd: clk: Check return value from soc_clk_dump

[Michal Simek]

In case of error in soc_clk_dump function are returned different values
then CMD return values (-1, 0, 1).

For example:
ZynqMP> clk dump
exit not allowed from main input shel

The patch is checking all negative return values and return
CMD_RET_FAILURE which is proper reaction for these cases.

Signed-off-by: Michal Simek 
---

 cmd/clk.c | 10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/cmd/clk.c b/cmd/clk.c
index 6d3d46a18447..52b25405ce6e 100644
--- a/cmd/clk.c
+++ b/cmd/clk.c
@@ -16,7 +16,15 @@ int __weak soc_clk_dump(void)
 static int do_clk_dump(cmd_tbl_t *cmdtp, int flag, int argc,
   char *const argv[])
 {
-   return soc_clk_dump();
+   int ret;
+
+   ret = soc_clk_dump();
+   if (ret < 0) {
+   printf("Clock dump error %d\n", ret);
+   ret = CMD_RET_FAILURE;
+   }
+
+   return ret;
 }
 
 static cmd_tbl_t cmd_clk_sub[] = {
-- 
2.17.0

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[U-Boot] [PATCH] watchdog: cadence: Remove useless ioremap

[Michal Simek]

There is no need to call ioremap. Also reg pointer is completely unused
in the driver.

Signed-off-by: Michal Simek 
---

 drivers/watchdog/cdns_wdt.c | 5 -
 1 file changed, 5 deletions(-)

diff --git a/drivers/watchdog/cdns_wdt.c b/drivers/watchdog/cdns_wdt.c
index 71733cf8ba1f..c43f7e8096ca 100644
--- a/drivers/watchdog/cdns_wdt.c
+++ b/drivers/watchdog/cdns_wdt.c
@@ -25,7 +25,6 @@ struct cdns_regs {
 struct cdns_wdt_priv {
bool rst;
u32 timeout;
-   void __iomem *reg;
struct cdns_regs *regs;
 };
 
@@ -224,12 +223,8 @@ static int cdns_wdt_stop(struct udevice *dev)
  */
 static int cdns_wdt_probe(struct udevice *dev)
 {
-   struct cdns_wdt_priv *priv = dev_get_priv(dev);
-
debug("%s: Probing wdt%u\n", __func__, dev->seq);
 
-   priv->reg = ioremap((u32)priv->regs, sizeof(struct cdns_regs));
-
cdns_wdt_stop(dev);
 
return 0;
-- 
2.17.0

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[U-Boot] [PATCH v2 18/18] spi: mpc8xxx: Convert to DM

[Mario Six]

Support DM in the MPC8xxx SPI driver, and remove the legacy SPI
interface.

Signed-off-by: Mario Six 
---
 drivers/spi/mpc8xxx_spi.c | 144 ++
 1 file changed, 107 insertions(+), 37 deletions(-)
---

Changes v1 -> v2:
* Removed legacy layer
* Sorted includes
* Now return -ETIMEDOUT on timeout during transfer

---

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 4aa5db8821..9c9dd67ec2 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -6,10 +6,12 @@
  */

 #include 
-
+#include 
+#include 
 #include 
 #include 
 #include 
+#include 

 enum {
SPI_EV_NE = BIT(31 - 22),   /* Receiver Not Empty */
@@ -31,6 +33,12 @@ enum {
SPI_COM_LST = BIT(31 - 9),
 };

+struct mpc8xxx_priv {
+   spi8xxx_t *spi;
+   struct gpio_desc gpios[16];
+   int max_cs;
+};
+
 static inline u32 to_prescale_mod(u32 val)
 {
return (min(val, (u32)15) << 16);
@@ -43,70 +51,90 @@ static void set_char_len(spi8xxx_t *spi, u32 val)

 #define SPI_TIMEOUT1000

-struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode)
+static int __spi_set_speed(spi8xxx_t *spi, uint speed)
 {
-   struct spi_slave *slave;
+   /* TODO(mario@gdsys.cc): This only ever sets one fixed speed */

-   if (!spi_cs_is_valid(bus, cs))
-   return NULL;
-
-   slave = spi_alloc_slave_base(bus, cs);
-   if (!slave)
-   return NULL;
-
-   /*
-* TODO: Some of the code in spi_init() should probably move
-* here, or into spi_claim_bus() below.
-*/
+   /* Use SYSCLK / 8 (16.67MHz typ.) */
+   clrsetbits_be32(>mode, SPI_MODE_PM_MASK, to_prescale_mod(1));

-   return slave;
+   return 0;
 }

-void spi_free_slave(struct spi_slave *slave)
+static int mpc8xxx_spi_ofdata_to_platdata(struct udevice *dev)
 {
-   free(slave);
+   struct mpc8xxx_priv *priv = dev_get_priv(dev);
+   int ret;
+
+   priv->spi = (spi8xxx_t *)dev_read_addr(dev);
+
+   /* TODO(mario@gdsys.cc): Read clock and save the value */
+
+   ret = gpio_request_list_by_name(dev, "gpios", priv->gpios,
+   ARRAY_SIZE(priv->gpios), GPIOD_IS_OUT | 
GPIOD_ACTIVE_LOW);
+   if (ret < 0)
+   return -EINVAL;
+
+   priv->max_cs = ret;
+
+   return 0;
 }

-void spi_init(void)
+static int mpc8xxx_spi_probe(struct udevice *dev)
 {
-   spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi;
+   struct mpc8xxx_priv *priv = dev_get_priv(dev);

/*
 * SPI pins on the MPC83xx are not muxed, so all we do is initialize
 * some registers
 */
-   out_be32(>mode, SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN);
-   /* Use SYSCLK / 8 (16.67MHz typ.) */
-   clrsetbits_be32(>mode, SPI_MODE_PM_MASK, to_prescale_mod(1));
+   out_be32(>spi->mode, SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN);
+
+   __spi_set_speed(priv->spi, 1667);
+
/* Clear all SPI events */
-   setbits_be32(>event, 0x);
+   setbits_be32(>spi->event, 0x);
/* Mask  all SPI interrupts */
-   clrbits_be32(>mask, 0x);
+   clrbits_be32(>spi->mask, 0x);
/* LST bit doesn't do anything, so disregard */
-   out_be32(>com, 0);
+   out_be32(>spi->com, 0);
+
+   return 0;
 }

-int spi_claim_bus(struct spi_slave *slave)
+static void mpc8xxx_spi_cs_activate(struct udevice *dev)
 {
-   return 0;
+   struct mpc8xxx_priv *priv = dev_get_priv(dev->parent);
+   struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev);
+
+   dm_gpio_set_dir_flags(>gpios[platdata->cs], GPIOD_IS_OUT);
+   dm_gpio_set_value(>gpios[platdata->cs], 0);
 }

-void spi_release_bus(struct spi_slave *slave)
+static void mpc8xxx_spi_cs_deactivate(struct udevice *dev)
 {
+   struct mpc8xxx_priv *priv = dev_get_priv(dev->parent);
+   struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev);
+
+   dm_gpio_set_dir_flags(>gpios[platdata->cs], GPIOD_IS_OUT);
+   dm_gpio_set_value(>gpios[platdata->cs], 1);
 }

-int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din,
-ulong flags)
+static int mpc8xxx_spi_xfer(struct udevice *dev, uint bitlen,
+   const void *dout, void *din, ulong flags)
 {
-   spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi;
-   u32 tmpdin;
+   struct udevice *bus = dev->parent;
+   struct mpc8xxx_priv *priv = dev_get_priv(bus);
+   spi8xxx_t *spi = priv->spi;
+   struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev);
+   u32 tmpdin = 0;
int num_blks = DIV_ROUND_UP(bitlen, 32);

-   debug("%s: slave %u:%u dout %08X din %08X bitlen %u\n", __func__,
- slave->bus, slave->cs, *(uint *)dout, *(uint *)din, bitlen);
+   debug("%s: slave %s:%u dout %08X din 

[U-Boot] [PATCH] arm64: zynqmp: Reset FPD Watchdog on zcu100

[Michal Simek]

Low level configuration didn't reset FPD Watchdog that's why accessing
it caused u-boot hang.

Signed-off-by: Michal Simek 
---

 board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c 
b/board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c
index 27e2ab6de9ca..ce1de42a1a7b 100644
--- a/board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c
+++ b/board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c
@@ -482,7 +482,7 @@ static unsigned long psu_mio_init_data(void)
 
 static unsigned long psu_peripherals_init_data(void)
 {
-   psu_mask_write(0xFD1A0100, 0x0001007CU, 0xU);
+   psu_mask_write(0xFD1A0100, 0x0001807CU, 0xU);
psu_mask_write(0xFF5E0238, 0x001AU, 0xU);
psu_mask_write(0xFF5E023C, 0x0093C018U, 0xU);
psu_mask_write(0xFF5E023C, 0x0FC0U, 0xU);
-- 
2.17.0

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[U-Boot] [PATCH v2 06/18] spi: mpc8xxx: Replace defines with enums

[Mario Six]

Replace pre-processor defines with proper enums, and use the BIT macro
where applicable.

Signed-off-by: Mario Six 
---

Changes v1 -> v2:
None

---
 drivers/spi/mpc8xxx_spi.c | 26 +++---
 1 file changed, 19 insertions(+), 7 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 0b81db959e..bd2857ce1a 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -11,13 +11,25 @@
 #include 
 #include 

-#define SPI_EV_NE  (0x8000 >> 22)  /* Receiver Not Empty */
-#define SPI_EV_NF  (0x8000 >> 23)  /* Transmitter Not Full */
-
-#define SPI_MODE_LOOP  (0x8000 >> 1)   /* Loopback mode */
-#define SPI_MODE_REV   (0x8000 >> 5)   /* Reverse mode - MSB first */
-#define SPI_MODE_MS(0x8000 >> 6)   /* Always master */
-#define SPI_MODE_EN(0x8000 >> 7)   /* Enable interface */
+enum {
+   SPI_EV_NE = BIT(31 - 22),   /* Receiver Not Empty */
+   SPI_EV_NF = BIT(31 - 23),   /* Transmitter Not Full */
+};
+
+enum {
+   SPI_MODE_LOOP  = BIT(31 - 1),   /* Loopback mode */
+   SPI_MODE_CI= BIT(31 - 2),   /* Clock invert */
+   SPI_MODE_CP= BIT(31 - 3),   /* Clock phase */
+   SPI_MODE_DIV16 = BIT(31 - 4),   /* Divide clock source by 16 */
+   SPI_MODE_REV   = BIT(31 - 5),   /* Reverse mode - MSB first */
+   SPI_MODE_MS= BIT(31 - 6),   /* Always master */
+   SPI_MODE_EN= BIT(31 - 7),   /* Enable interface */
+
+   SPI_MODE_LEN_MASK = 0xf0,
+   SPI_MODE_PM_MASK = 0xf,
+
+   SPI_COM_LST = BIT(31 - 9),
+};

 #define SPI_TIMEOUT1000

--
2.16.1

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[U-Boot] [PATCH v2 12/18] spi: mpc8xxx: Make code more readable

[Mario Six]

Introduce the to_prescale_mod and set_char_len inline functions to make
the code more readable.

Note that the added "if (bitlen > 16)" check does not change the
semantics of the current code, and hence only preserves the current
error (this will be fixed in a later patch in the series).

Signed-off-by: Mario Six 
---

Changes v1 -> v2:
None

---
 drivers/spi/mpc8xxx_spi.c | 27 +++
 1 file changed, 19 insertions(+), 8 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 5bf84aaec6..af3762737f 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -31,6 +31,16 @@ enum {
SPI_COM_LST = BIT(31 - 9),
 };

+static inline u32 to_prescale_mod(u32 val)
+{
+   return (min(val, (u32)15) << 16);
+}
+
+static void set_char_len(spi8xxx_t *spi, u32 val)
+{
+   clrsetbits_be32(>mode, SPI_MODE_LEN_MASK, (val << 20));
+}
+
 #define SPI_TIMEOUT1000

 struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode)
@@ -67,7 +77,7 @@ void spi_init(void)
 */
out_be32(>mode, SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN);
/* Use SYSCLK / 8 (16.67MHz typ.) */
-   clrsetbits_be32(>mode, 0x000f, BIT(16));
+   clrsetbits_be32(>mode, SPI_MODE_PM_MASK, to_prescale_mod(1));
/* Clear all SPI events */
setbits_be32(>event, 0x);
/* Mask  all SPI interrupts */
@@ -120,13 +130,14 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,

clrbits_be32(>mode, SPI_MODE_EN);

-   if (bitlen <= 4) {
-   clrsetbits_be32(>mode, 0x00f0, (3 << 20));
-   } else if (bitlen <= 16) {
-   clrsetbits_be32(>mode, 0x00f0,
-   ((bitlen - 1) << 20));
-   } else {
-   clrbits_be32(>mode, 0x00f0);
+   if (bitlen <= 4)
+   set_char_len(spi, 3);
+   else if (bitlen <= 16)
+   set_char_len(spi, bitlen - 1);
+   else
+   set_char_len(spi, 0);
+
+   if (bitlen > 16) {
/* Set up the next iteration if sending > 32 bits */
bitlen -= 32;
dout += 4;
--
2.16.1

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[U-Boot] [PATCH v2 13/18] spi: mpc8xxx: Rename variable

[Mario Six]

The variable "char_size" holds the number of bits to be transferred in
the current loop iteration. A better name would be "xfer_bitlen", which
we rename this variable to.

Signed-off-by: Mario Six 
---

Changes v1 -> v2:
None

---
 drivers/spi/mpc8xxx_spi.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index af3762737f..ce2a77c1aa 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -115,10 +115,10 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
while (num_blks--) {
int tm;
u32 tmpdout = 0;
-   uchar char_size = (bitlen >= 32 ? 32 : bitlen);
+   uchar xfer_bitlen = (bitlen >= 32 ? 32 : bitlen);

/* Shift data so it's msb-justified */
-   tmpdout = *(u32 *)dout >> (32 - char_size);
+   tmpdout = *(u32 *)dout >> (32 - xfer_bitlen);

/* The LEN field of the SPMODE register is set as follows:
 *
@@ -166,8 +166,8 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
tmpdin = in_be32(>rx);
setbits_be32(>event, SPI_EV_NE);

-   *(u32 *)din = (tmpdin << (32 - char_size));
-   if (char_size == 32) {
+   *(u32 *)din = (tmpdin << (32 - xfer_bitlen));
+   if (xfer_bitlen == 32) {
/* Advance output buffer by 32 bits */
din += 4;
}
--
2.16.1

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[U-Boot] [PATCH v2 05/18] spi: mpc8xxx: Fix function names in strings

[Mario Six]

Replace the function name with a "%s" format string and the __func__
variable in debug statements (as proposed by checkpatch).

Signed-off-by: Mario Six 
---

Changes v1 -> v2:
None

---
 drivers/spi/mpc8xxx_spi.c | 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 079476c3ee..0b81db959e 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -82,7 +82,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void 
*dout, void *din,
int tm, is_read = 0;
uchar char_size = 32;

-   debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n",
+   debug("%s: slave %u:%u dout %08X din %08X bitlen %u\n", __func__,
  slave->bus, slave->cs, *(uint *)dout, *(uint *)din, bitlen);

if (flags & SPI_XFER_BEGIN)
@@ -128,7 +128,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
/* Write the data out */
spi->tx = tmpdout;

-   debug("*** spi_xfer: ... %08x written\n", tmpdout);
+   debug("*** %s: ... %08x written\n", __func__, tmpdout);

/*
 * Wait for SPI transmit to get out
@@ -158,9 +158,10 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
break;
}
if (tm >= SPI_TIMEOUT)
-   puts("*** spi_xfer: Time out during SPI transfer");
+   debug("*** %s: Time out during SPI transfer\n",
+ __func__);

-   debug("*** spi_xfer: transfer ended. Value=%08x\n", tmpdin);
+   debug("*** %s: transfer ended. Value=%08x\n", __func__, tmpdin);
}

if (flags & SPI_XFER_END)
--
2.16.1

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[U-Boot] [PATCH v2 17/18] spi: mpc8xxx: Use get_timer

[Mario Six]

The comment before the transmission loop in conjunction with the
definition of SPI_TIMEOUT as 1000 implies that the loop is supposed to
have a timeout value of 1000 ms. But since there is no mdelay(1) or
similar in the loop body, the loop just runs 1000 times, without regard
for the time elapsed.

To correct this, use the standard get_timer functionality to properly
time out the loop after 1000 ms.

Signed-off-by: Mario Six 
---

Changes v1 -> v2:
None

---
 drivers/spi/mpc8xxx_spi.c | 11 +++
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index b3ed00fcb7..4aa5db8821 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -113,9 +113,9 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,

/* Handle data in 32-bit chunks */
while (num_blks--) {
-   int tm;
u32 tmpdout = 0;
uchar xfer_bitlen = (bitlen >= 32 ? 32 : bitlen);
+   ulong start;

clrbits_be32(>mode, SPI_MODE_EN);

@@ -149,7 +149,8 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
 * or time out (1 second = 1000 ms)
 * The NE event must be read and cleared first
 */
-   for (tm = 0; tm < SPI_TIMEOUT; ++tm) {
+   start = get_timer(0);
+   do {
u32 event = in_be32(>event);
bool have_ne = event & SPI_EV_NE;
bool have_nf = event & SPI_EV_NF;
@@ -174,9 +175,11 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
 */
if (have_nf)
break;
-   }

-   if (tm >= SPI_TIMEOUT)
+   mdelay(1);
+   } while (get_timer(start) < SPI_TIMEOUT);
+
+   if (get_timer(start) >= SPI_TIMEOUT)
debug("*** %s: Time out during SPI transfer\n",
  __func__);

--
2.16.1

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[U-Boot] [PATCH v2 14/18] spi: mpc8xxx: Document LEN setting better

[Mario Six]

Instead of having a table right before the code implementing the length
setting for documentation, have inline comments for the if branches
actually implementing the length setting described table's entries
(which is readable thanks to the set_char_len function).

Signed-off-by: Mario Six 
---

Changes v1 -> v2:
None

---
 drivers/spi/mpc8xxx_spi.c | 16 +---
 1 file changed, 5 insertions(+), 11 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index ce2a77c1aa..d22206f4b7 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -120,21 +120,15 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
/* Shift data so it's msb-justified */
tmpdout = *(u32 *)dout >> (32 - xfer_bitlen);

-   /* The LEN field of the SPMODE register is set as follows:
-*
-* Bit length setting
-* len <= 4   3
-* 4 < len <= 16  len - 1
-* len > 16   0
-*/
-
clrbits_be32(>mode, SPI_MODE_EN);

-   if (bitlen <= 4)
+   /* Set up length for this transfer */
+
+   if (bitlen <= 4) /* 4 bits or less */
set_char_len(spi, 3);
-   else if (bitlen <= 16)
+   else if (bitlen <= 16) /* at most 16 bits */
set_char_len(spi, bitlen - 1);
-   else
+   else /* more than 16 bits -> full 32 bit transfer */
set_char_len(spi, 0);

if (bitlen > 16) {
--
2.16.1

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[U-Boot] [PATCH v2 09/18] spi: mpc8xxx: Get rid of is_read

[Mario Six]

Get rid of the is_read variable, and just keep the state of the "not
empty" and "not full" events in two boolean variables within the loop
body.

Signed-off-by: Mario Six 
---

Changes v1 -> v2:
None

---
 drivers/spi/mpc8xxx_spi.c | 12 +++-
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index c4a9ef53ef..a69987ef54 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -91,7 +91,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void 
*dout, void *din,
spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi;
uint tmpdout, tmpdin, event;
int num_blks = DIV_ROUND_UP(bitlen, 32);
-   int tm, is_read = 0;
+   int tm;
uchar char_size = 32;

debug("%s: slave %u:%u dout %08X din %08X bitlen %u\n", __func__,
@@ -145,12 +145,14 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
 * or time out (1 second = 1000 ms)
 * The NE event must be read and cleared first
 */
-   for (tm = 0, is_read = 0; tm < SPI_TIMEOUT; ++tm) {
+   for (tm = 0; tm < SPI_TIMEOUT; ++tm) {
event = in_be32(>event);
-   if (event & SPI_EV_NE) {
+   bool have_ne = event & SPI_EV_NE;
+   bool have_nf = event & SPI_EV_NF;
+
+   if (have_ne) {
tmpdin = in_be32(>rx);
setbits_be32(>event, SPI_EV_NE);
-   is_read = 1;

*(u32 *)din = (tmpdin << (32 - char_size));
if (char_size == 32) {
@@ -164,7 +166,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
 * in the future put an arbitrary delay after writing
 * the device.  Arbitrary delays suck, though...
 */
-   if (is_read && (event & SPI_EV_NF))
+   if (have_ne && have_nf)
break;
}
if (tm >= SPI_TIMEOUT)
--
2.16.1

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[U-Boot] [PATCH v2 16/18] spi: mpc8xxx: Fix if check

[Mario Six]

Decreasing the bit length and increasing the write data pointer should
be done when there are more than 32 bit of data, not 16 bit.

This did not produce incorrect behavior, because the only time where the
two checks produce different outcomes is the case of 16 < bitlen < 32,
and in this case the subsequent transmission is the last one regardless,
hence the additional bit length decrease and write data pointer increase
has no effect anyway.

Still, the correct check is the check for "bitlen > 32", so correct this
behavior.

Signed-off-by: Mario Six 
---

Changes v1 -> v2:
None

---
 drivers/spi/mpc8xxx_spi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index fe493f6d40..b3ed00fcb7 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -133,7 +133,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
/* Shift data so it's msb-justified */
tmpdout = *(u32 *)dout >> (32 - xfer_bitlen);

-   if (bitlen > 16) {
+   if (bitlen > 32) {
/* Set up the next iteration if sending > 32 bits */
bitlen -= 32;
dout += 4;
--
2.16.1

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[U-Boot] [PATCH v2 10/18] spi: mpc8xxx: Simplify logic a bit

[Mario Six]

We do nothing in the loop if the "not empty" event was not detected. To
simplify the logic, check if this is the case, and skip the execution of
the loop early to reduce the nesting level and flag checking.

Signed-off-by: Mario Six 
---

Changes v1 -> v2:
None

---
 drivers/spi/mpc8xxx_spi.c | 23 +--
 1 file changed, 13 insertions(+), 10 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index a69987ef54..30249cce57 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -150,25 +150,28 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
bool have_ne = event & SPI_EV_NE;
bool have_nf = event & SPI_EV_NF;

-   if (have_ne) {
-   tmpdin = in_be32(>rx);
-   setbits_be32(>event, SPI_EV_NE);
-
-   *(u32 *)din = (tmpdin << (32 - char_size));
-   if (char_size == 32) {
-   /* Advance output buffer by 32 bits */
-   din += 4;
-   }
+   if (!have_ne)
+   continue;
+
+   tmpdin = in_be32(>rx);
+   setbits_be32(>event, SPI_EV_NE);
+
+   *(u32 *)din = (tmpdin << (32 - char_size));
+   if (char_size == 32) {
+   /* Advance output buffer by 32 bits */
+   din += 4;
}
+
/*
 * Only bail when we've had both NE and NF events.
 * This will cause timeouts on RO devices, so maybe
 * in the future put an arbitrary delay after writing
 * the device.  Arbitrary delays suck, though...
 */
-   if (have_ne && have_nf)
+   if (have_nf)
break;
}
+
if (tm >= SPI_TIMEOUT)
debug("*** %s: Time out during SPI transfer\n",
  __func__);
--
2.16.1

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[U-Boot] [PATCH v2 15/18] spi: mpc8xxx: Re-order transfer setup

[Mario Six]

Minize the time the adapter is disabled (via SPI_MODE_EN
clearing/setting) to just the character length setting, and only set up
the temporary data writing variable right before we need it, so there is
a more clear distinction between setting up the SPI adapter, and setting
up the data to be written.

Signed-off-by: Mario Six 
---

Changes v1 -> v2:
None

---
 drivers/spi/mpc8xxx_spi.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index d22206f4b7..fe493f6d40 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -117,9 +117,6 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
u32 tmpdout = 0;
uchar xfer_bitlen = (bitlen >= 32 ? 32 : bitlen);

-   /* Shift data so it's msb-justified */
-   tmpdout = *(u32 *)dout >> (32 - xfer_bitlen);
-
clrbits_be32(>mode, SPI_MODE_EN);

/* Set up length for this transfer */
@@ -131,14 +128,17 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
else /* more than 16 bits -> full 32 bit transfer */
set_char_len(spi, 0);

+   setbits_be32(>mode, SPI_MODE_EN);
+
+   /* Shift data so it's msb-justified */
+   tmpdout = *(u32 *)dout >> (32 - xfer_bitlen);
+
if (bitlen > 16) {
/* Set up the next iteration if sending > 32 bits */
bitlen -= 32;
dout += 4;
}

-   setbits_be32(>mode, SPI_MODE_EN);
-
/* Write the data out */
out_be32(>tx, tmpdout);

--
2.16.1

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[U-Boot] [PATCH v2 04/18] spi: mpc8xxx: Fix space after cast

[Mario Six]

Fix all "superfluous space after case" style errors.

Signed-off-by: Mario Six 
---

Changes v1 -> v2:
None

---
 drivers/spi/mpc8xxx_spi.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 3ac9f2f8e8..079476c3ee 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -83,7 +83,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void 
*dout, void *din,
uchar char_size = 32;

debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n",
- slave->bus, slave->cs, *(uint *) dout, *(uint *) din, bitlen);
+ slave->bus, slave->cs, *(uint *)dout, *(uint *)din, bitlen);

if (flags & SPI_XFER_BEGIN)
spi_cs_activate(slave);
@@ -97,7 +97,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void 
*dout, void *din,
char_size = (bitlen >= 32 ? 32 : bitlen);

/* Shift data so it's msb-justified */
-   tmpdout = *(u32 *) dout >> (32 - char_size);
+   tmpdout = *(u32 *)dout >> (32 - char_size);

/* The LEN field of the SPMODE register is set as follows:
 *
@@ -142,7 +142,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
spi->event |= SPI_EV_NE;
is_read = 1;

-   *(u32 *) din = (tmpdin << (32 - char_size));
+   *(u32 *)din = (tmpdin << (32 - char_size));
if (char_size == 32) {
/* Advance output buffer by 32 bits */
din += 4;
--
2.16.1

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[U-Boot] [PATCH v2 07/18] spi: mpc8xxx: Use IO accessors

[Mario Six]

Accesses to the register map are currently done by directly reading and
writing the structure.

Switch to the appropriate IO accessors instead.

Signed-off-by: Mario Six 
---

Changes v1 -> v2:
None

---
 drivers/spi/mpc8xxx_spi.c | 38 +++---
 1 file changed, 19 insertions(+), 19 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index bd2857ce1a..b5546aa502 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -59,21 +59,21 @@ void spi_free_slave(struct spi_slave *slave)

 void spi_init(void)
 {
-   volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi;
+   spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi;

/*
 * SPI pins on the MPC83xx are not muxed, so all we do is initialize
 * some registers
 */
-   spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN;
+   out_be32(>mode, SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN);
/* Use SYSCLK / 8 (16.67MHz typ.) */
-   spi->mode = (spi->mode & 0xfff0) | BIT(16);
+   clrsetbits_be32(>mode, 0x000f, BIT(16));
/* Clear all SPI events */
-   spi->event = 0x;
+   setbits_be32(>event, 0x);
/* Mask  all SPI interrupts */
-   spi->mask = 0x;
+   clrbits_be32(>mask, 0x);
/* LST bit doesn't do anything, so disregard */
-   spi->com = 0;
+   out_be32(>com, 0);
 }

 int spi_claim_bus(struct spi_slave *slave)
@@ -88,7 +88,7 @@ void spi_release_bus(struct spi_slave *slave)
 int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din,
 ulong flags)
 {
-   volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi;
+   spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi;
uint tmpdout, tmpdin, event;
int num_blks = DIV_ROUND_UP(bitlen, 32);
int tm, is_read = 0;
@@ -101,7 +101,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
spi_cs_activate(slave);

/* Clear all SPI events */
-   spi->event = 0x;
+   setbits_be32(>event, 0x);

/* Handle data in 32-bit chunks */
while (num_blks--) {
@@ -119,26 +119,26 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
 * len > 16   0
 */

-   spi->mode &= ~SPI_MODE_EN;
+   clrbits_be32(>mode, SPI_MODE_EN);

if (bitlen <= 16) {
if (bitlen <= 4)
-   spi->mode = (spi->mode & 0xff0f) |
-   (3 << 20);
+   clrsetbits_be32(>mode, 0x00f0,
+   (3 << 20));
else
-   spi->mode = (spi->mode & 0xff0f) |
-   ((bitlen - 1) << 20);
+   clrsetbits_be32(>mode, 0x00f0,
+   ((bitlen - 1) << 20));
} else {
-   spi->mode = (spi->mode & 0xff0f);
+   clrbits_be32(>mode, 0x00f0);
/* Set up the next iteration if sending > 32 bits */
bitlen -= 32;
dout += 4;
}

-   spi->mode |= SPI_MODE_EN;
+   setbits_be32(>mode, SPI_MODE_EN);

/* Write the data out */
-   spi->tx = tmpdout;
+   out_be32(>tx, tmpdout);

debug("*** %s: ... %08x written\n", __func__, tmpdout);

@@ -148,10 +148,10 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
 * The NE event must be read and cleared first
 */
for (tm = 0, is_read = 0; tm < SPI_TIMEOUT; ++tm) {
-   event = spi->event;
+   event = in_be32(>event);
if (event & SPI_EV_NE) {
-   tmpdin = spi->rx;
-   spi->event |= SPI_EV_NE;
+   tmpdin = in_be32(>rx);
+   setbits_be32(>event, SPI_EV_NE);
is_read = 1;

*(u32 *)din = (tmpdin << (32 - char_size));
--
2.16.1

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[U-Boot] [PATCH v2 08/18] spi: mpc8xxx: Simplify if

[Mario Six]

Instead of having a nested if block, just have two branches within the
overarching if block to eliminate one nesting level.

Signed-off-by: Mario Six 
---

Changes v1 -> v2:
None

---
 drivers/spi/mpc8xxx_spi.c | 12 +---
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index b5546aa502..c4a9ef53ef 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -121,13 +121,11 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,

clrbits_be32(>mode, SPI_MODE_EN);

-   if (bitlen <= 16) {
-   if (bitlen <= 4)
-   clrsetbits_be32(>mode, 0x00f0,
-   (3 << 20));
-   else
-   clrsetbits_be32(>mode, 0x00f0,
-   ((bitlen - 1) << 20));
+   if (bitlen <= 4) {
+   clrsetbits_be32(>mode, 0x00f0, (3 << 20));
+   } else if (bitlen <= 16) {
+   clrsetbits_be32(>mode, 0x00f0,
+   ((bitlen - 1) << 20));
} else {
clrbits_be32(>mode, 0x00f0);
/* Set up the next iteration if sending > 32 bits */
--
2.16.1

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[U-Boot] [PATCH v2 01/18] spi: mpc8xxx: Use short type names

[Mario Six]

The function signatures in the driver are quite long as is. Use short
type names (uint etc.) to make them more readable.

Signed-off-by: Mario Six 
---
 drivers/spi/mpc8xxx_spi.c | 12 +---
 1 file changed, 5 insertions(+), 7 deletions(-)
---

Changes v1 -> v2:
None

---
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 00cbcbf9fc..2e1a6caf03 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -21,8 +21,7 @@

 #define SPI_TIMEOUT1000

-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
-   unsigned int max_hz, unsigned int mode)
+struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode)
 {
struct spi_slave *slave;

@@ -69,17 +68,16 @@ int spi_claim_bus(struct spi_slave *slave)

 void spi_release_bus(struct spi_slave *slave)
 {
-
 }

-int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
-   void *din, unsigned long flags)
+int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din,
+ulong flags)
 {
volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi;
-   unsigned int tmpdout, tmpdin, event;
+   uint tmpdout, tmpdin, event;
int numBlks = DIV_ROUND_UP(bitlen, 32);
int tm, isRead = 0;
-   unsigned char charSize = 32;
+   uchar charSize = 32;

debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n",
  slave->bus, slave->cs, *(uint *) dout, *(uint *) din, bitlen);
--
2.16.1

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[U-Boot] [PATCH v2 11/18] spi: mpc8xxx: Reduce scope of loop variables

[Mario Six]

The transmission loop starts with setting some variables, which are only
used inside the loop. Reduce the scope to the loop to make the
declaration and initialization of these variables coincide.

In the case of char_size this also always initializes the variable
immediately with the final value actually used in the loop (instead of
the placeholder value 32).

Signed-off-by: Mario Six 
---

Changes v1 -> v2:
None

---
 drivers/spi/mpc8xxx_spi.c | 11 +--
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 30249cce57..5bf84aaec6 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -89,10 +89,8 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
 ulong flags)
 {
spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi;
-   uint tmpdout, tmpdin, event;
+   u32 tmpdin;
int num_blks = DIV_ROUND_UP(bitlen, 32);
-   int tm;
-   uchar char_size = 32;

debug("%s: slave %u:%u dout %08X din %08X bitlen %u\n", __func__,
  slave->bus, slave->cs, *(uint *)dout, *(uint *)din, bitlen);
@@ -105,8 +103,9 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,

/* Handle data in 32-bit chunks */
while (num_blks--) {
-   tmpdout = 0;
-   char_size = (bitlen >= 32 ? 32 : bitlen);
+   int tm;
+   u32 tmpdout = 0;
+   uchar char_size = (bitlen >= 32 ? 32 : bitlen);

/* Shift data so it's msb-justified */
tmpdout = *(u32 *)dout >> (32 - char_size);
@@ -146,7 +145,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
 * The NE event must be read and cleared first
 */
for (tm = 0; tm < SPI_TIMEOUT; ++tm) {
-   event = in_be32(>event);
+   u32 event = in_be32(>event);
bool have_ne = event & SPI_EV_NE;
bool have_nf = event & SPI_EV_NF;

--
2.16.1

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[U-Boot] [PATCH v2 00/18] spi: mpc8xxx: DM conversion

[Mario Six]

This is v2 of a patch series that adds support for DM to the MPC8XXX SPI
driver, cleans up the driver code, fixes a few minor problems.

Some TODOs are left over for later, such as proper SPI speed setting,
and support for SPI mode setting. These would be enhancements to the
original functionality, and can come later.

The legacy functionality is removed in this version, so old boards in
the tree might end up with broken SPI functionality.

Mario Six (18):
  spi: mpc8xxx: Use short type names
  spi: mpc8xxx: Fix comments
  spi: mpc8xxx: Rename camel-case variables
  spi: mpc8xxx: Fix space after cast
  spi: mpc8xxx: Fix function names in strings
  spi: mpc8xxx: Replace defines with enums
  spi: mpc8xxx: Use IO accessors
  spi: mpc8xxx: Simplify if
  spi: mpc8xxx: Get rid of is_read
  spi: mpc8xxx: Simplify logic a bit
  spi: mpc8xxx: Reduce scope of loop variables
  spi: mpc8xxx: Make code more readable
  spi: mpc8xxx: Rename variable
  spi: mpc8xxx: Document LEN setting better
  spi: mpc8xxx: Re-order transfer setup
  spi: mpc8xxx: Fix if check
  spi: mpc8xxx: Use get_timer
  spi: mpc8xxx: Convert to DM

 drivers/spi/mpc8xxx_spi.c | 279 +++---
 1 file changed, 188 insertions(+), 91 deletions(-)

--
2.16.1

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[U-Boot] [PATCH v2 02/18] spi: mpc8xxx: Fix comments

[Mario Six]

There are some comments on the same line as the code they document. Put
comments above the code lines they document, so the line length is not
unnecessarily increased.

Signed-off-by: Mario Six 
---

Changes v1 -> v2:
None

---
 drivers/spi/mpc8xxx_spi.c | 22 ++
 1 file changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 2e1a6caf03..2f6afaf7ac 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -54,11 +54,14 @@ void spi_init(void)
 * some registers
 */
spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN;
-   spi->mode = (spi->mode & 0xfff0) | BIT(16); /* Use SYSCLK / 8
-(16.67MHz typ.) */
-   spi->event = 0x;/* Clear all SPI events */
-   spi->mask = 0x; /* Mask  all SPI interrupts */
-   spi->com = 0;   /* LST bit doesn't do anything, so disregard */
+   /* Use SYSCLK / 8 (16.67MHz typ.) */
+   spi->mode = (spi->mode & 0xfff0) | BIT(16);
+   /* Clear all SPI events */
+   spi->event = 0x;
+   /* Mask  all SPI interrupts */
+   spi->mask = 0x;
+   /* LST bit doesn't do anything, so disregard */
+   spi->com = 0;
 }

 int spi_claim_bus(struct spi_slave *slave)
@@ -85,9 +88,10 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
if (flags & SPI_XFER_BEGIN)
spi_cs_activate(slave);

-   spi->event = 0x;/* Clear all SPI events */
+   /* Clear all SPI events */
+   spi->event = 0x;

-   /* handle data in 32-bit chunks */
+   /* Handle data in 32-bit chunks */
while (numBlks--) {
tmpdout = 0;
charSize = (bitlen >= 32 ? 32 : bitlen);
@@ -121,7 +125,9 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,

spi->mode |= SPI_MODE_EN;

-   spi->tx = tmpdout;  /* Write the data out */
+   /* Write the data out */
+   spi->tx = tmpdout;
+
debug("*** spi_xfer: ... %08x written\n", tmpdout);

/*
--
2.16.1

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[U-Boot] [PATCH v2 03/18] spi: mpc8xxx: Rename camel-case variables

[Mario Six]

There are three variables that have camel-case names, which is not the
preferred naming style.

Give those variables more compliant names instead.

Signed-off-by: Mario Six 
---

Changes v1 -> v2:
None

---
 drivers/spi/mpc8xxx_spi.c | 22 +++---
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 2f6afaf7ac..3ac9f2f8e8 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -78,9 +78,9 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void 
*dout, void *din,
 {
volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi;
uint tmpdout, tmpdin, event;
-   int numBlks = DIV_ROUND_UP(bitlen, 32);
-   int tm, isRead = 0;
-   uchar charSize = 32;
+   int num_blks = DIV_ROUND_UP(bitlen, 32);
+   int tm, is_read = 0;
+   uchar char_size = 32;

debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n",
  slave->bus, slave->cs, *(uint *) dout, *(uint *) din, bitlen);
@@ -92,12 +92,12 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
spi->event = 0x;

/* Handle data in 32-bit chunks */
-   while (numBlks--) {
+   while (num_blks--) {
tmpdout = 0;
-   charSize = (bitlen >= 32 ? 32 : bitlen);
+   char_size = (bitlen >= 32 ? 32 : bitlen);

/* Shift data so it's msb-justified */
-   tmpdout = *(u32 *) dout >> (32 - charSize);
+   tmpdout = *(u32 *) dout >> (32 - char_size);

/* The LEN field of the SPMODE register is set as follows:
 *
@@ -135,15 +135,15 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
 * or time out (1 second = 1000 ms)
 * The NE event must be read and cleared first
 */
-   for (tm = 0, isRead = 0; tm < SPI_TIMEOUT; ++tm) {
+   for (tm = 0, is_read = 0; tm < SPI_TIMEOUT; ++tm) {
event = spi->event;
if (event & SPI_EV_NE) {
tmpdin = spi->rx;
spi->event |= SPI_EV_NE;
-   isRead = 1;
+   is_read = 1;

-   *(u32 *) din = (tmpdin << (32 - charSize));
-   if (charSize == 32) {
+   *(u32 *) din = (tmpdin << (32 - char_size));
+   if (char_size == 32) {
/* Advance output buffer by 32 bits */
din += 4;
}
@@ -154,7 +154,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
 * in the future put an arbitrary delay after writing
 * the device.  Arbitrary delays suck, though...
 */
-   if (isRead && (event & SPI_EV_NF))
+   if (is_read && (event & SPI_EV_NF))
break;
}
if (tm >= SPI_TIMEOUT)
--
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Re: [U-Boot] [PATCH 19/19] spi: mpc8xxx: Add DM support

[Jagan Teki]

On Thu, Apr 19, 2018 at 5:15 PM, Mario Six  wrote:
> Hi Jagan,
>
> On Thu, Apr 19, 2018 at 1:32 PM, Jagan Teki  wrote:
>> On Tue, Apr 10, 2018 at 4:31 PM, Mario Six  wrote:
>>> Support DM for the MPC8XXX SPI driver.
>>>
>>> Signed-off-by: Mario Six 
>>> ---
>>>  drivers/spi/mpc8xxx_spi.c | 135 
>>> +-
>>>  1 file changed, 133 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
>>> index 5724a00585..6e51826665 100644
>>> --- a/drivers/spi/mpc8xxx_spi.c
>>> +++ b/drivers/spi/mpc8xxx_spi.c
>>> @@ -10,6 +10,11 @@
>>>  #include 
>>>  #include 
>>>  #include 
>>> +#ifdef CONFIG_DM_SPI
>>> +#include 
>>> +#include 
>>> +#include 
>>> +#endif
>>>
>>>  enum {
>>> SPI_EV_NE = BIT(31 - 22),   /* Receiver Not Empty */
>>> @@ -31,6 +36,14 @@ enum {
>>> SPI_COM_LST = BIT(31 - 9),
>>>  };
>>>
>>> +#ifdef CONFIG_DM_SPI
>>
>> How about updating this into fully dm-driven with dt or platdata?
>>
>
> The series does that, but also keeps the legacy interface to not break boards
> in the tree. Once the legacy SPI interface is removed, the compatibility layer
> can be removed, and what's left is a pure DM-driver.

True, but we are planning to move all by 2018.09 release, so better
take care all at once. I did few drivers fully moved and asked board
maintainers for move their boards try to do the same.

Jagan.
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Re: [U-Boot] [PATCH 19/19] spi: mpc8xxx: Add DM support

[Mario Six]

On Thu, Apr 19, 2018 at 1:48 PM, Jagan Teki  wrote:
> On Thu, Apr 19, 2018 at 5:15 PM, Mario Six  wrote:
>> Hi Jagan,
>>
>> On Thu, Apr 19, 2018 at 1:32 PM, Jagan Teki  wrote:
>>> On Tue, Apr 10, 2018 at 4:31 PM, Mario Six  wrote:
 Support DM for the MPC8XXX SPI driver.

 Signed-off-by: Mario Six 
 ---
  drivers/spi/mpc8xxx_spi.c | 135 
 +-
  1 file changed, 133 insertions(+), 2 deletions(-)

 diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
 index 5724a00585..6e51826665 100644
 --- a/drivers/spi/mpc8xxx_spi.c
 +++ b/drivers/spi/mpc8xxx_spi.c
 @@ -10,6 +10,11 @@
  #include 
  #include 
  #include 
 +#ifdef CONFIG_DM_SPI
 +#include 
 +#include 
 +#include 
 +#endif

  enum {
 SPI_EV_NE = BIT(31 - 22),   /* Receiver Not Empty */
 @@ -31,6 +36,14 @@ enum {
 SPI_COM_LST = BIT(31 - 9),
  };

 +#ifdef CONFIG_DM_SPI
>>>
>>> How about updating this into fully dm-driven with dt or platdata?
>>>
>>
>> The series does that, but also keeps the legacy interface to not break boards
>> in the tree. Once the legacy SPI interface is removed, the compatibility 
>> layer
>> can be removed, and what's left is a pure DM-driver.
>
> True, but we are planning to move all by 2018.09 release, so better
> take care all at once. I did few drivers fully moved and asked board
> maintainers for move their boards try to do the same.
>

OK, I'll remove the compatibility layer in v2. Thanks for reviewing!

> Jagan.
>

Best regards,
Mario
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Re: [U-Boot] [PATCH 19/19] spi: mpc8xxx: Add DM support

[Mario Six]

Hi Jagan,

On Thu, Apr 19, 2018 at 1:32 PM, Jagan Teki  wrote:
> On Tue, Apr 10, 2018 at 4:31 PM, Mario Six  wrote:
>> Support DM for the MPC8XXX SPI driver.
>>
>> Signed-off-by: Mario Six 
>> ---
>>  drivers/spi/mpc8xxx_spi.c | 135 
>> +-
>>  1 file changed, 133 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
>> index 5724a00585..6e51826665 100644
>> --- a/drivers/spi/mpc8xxx_spi.c
>> +++ b/drivers/spi/mpc8xxx_spi.c
>> @@ -10,6 +10,11 @@
>>  #include 
>>  #include 
>>  #include 
>> +#ifdef CONFIG_DM_SPI
>> +#include 
>> +#include 
>> +#include 
>> +#endif
>>
>>  enum {
>> SPI_EV_NE = BIT(31 - 22),   /* Receiver Not Empty */
>> @@ -31,6 +36,14 @@ enum {
>> SPI_COM_LST = BIT(31 - 9),
>>  };
>>
>> +#ifdef CONFIG_DM_SPI
>
> How about updating this into fully dm-driven with dt or platdata?
>

The series does that, but also keeps the legacy interface to not break boards
in the tree. Once the legacy SPI interface is removed, the compatibility layer
can be removed, and what's left is a pure DM-driver.

Best regards,
Mario
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Re: [U-Boot] [PATCH] drivers: spi: migrate cf_spi to DM

[Jagan Teki]

On Thu, Mar 22, 2018 at 8:13 PM, Angelo Dureghello  wrote:
> This patch adds DM support to cf_spi.c.
> To be able to build spi driver with DM support, a new config
> option has been introdiced (DM_NO_DT) since m68k architecture
> does not support fdt.

This can be different case, how about using platdata in U-Boot?

Jagan.

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Re: [U-Boot] [PATCH v2 0/7] i.MX6DL: Add BTicino Mamoj board support

[Jagan Teki]

Stefano,

On Wed, Apr 11, 2018 at 6:06 PM, Jagan Teki  wrote:
> This series add support for BTicino i.MX6DL Mamoj board.
>
> Changes for v2:
> - Update Kconfig changes for CONFIG_FSL_ESDHC
> - Add HAB support
>
> Jagan Teki (7):
>   i.MX6: board: Add BTicino i.MX6DL Mamoj initial support
>   i.MX6DL: mamoj: Add I2C support
>   i.MX6DL: mamoj: Add PFUZE100 support
>   configs: imx6dl_mamoj: Enable fastboot and ums
>   configs: imx6dl-mamoj: Add DFU support
>   configs: imx6dl-mamoj: Add Falcon mode support
>   configs: imx6dl-mamoj: Enable HAB

Let me know if you have further comments, if OK please apply.

Jagan.
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Re: [U-Boot] [PATCH 19/19] spi: mpc8xxx: Add DM support

[Jagan Teki]

On Tue, Apr 10, 2018 at 4:31 PM, Mario Six  wrote:
> Support DM for the MPC8XXX SPI driver.
>
> Signed-off-by: Mario Six 
> ---
>  drivers/spi/mpc8xxx_spi.c | 135 
> +-
>  1 file changed, 133 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
> index 5724a00585..6e51826665 100644
> --- a/drivers/spi/mpc8xxx_spi.c
> +++ b/drivers/spi/mpc8xxx_spi.c
> @@ -10,6 +10,11 @@
>  #include 
>  #include 
>  #include 
> +#ifdef CONFIG_DM_SPI
> +#include 
> +#include 
> +#include 
> +#endif
>
>  enum {
> SPI_EV_NE = BIT(31 - 22),   /* Receiver Not Empty */
> @@ -31,6 +36,14 @@ enum {
> SPI_COM_LST = BIT(31 - 9),
>  };
>
> +#ifdef CONFIG_DM_SPI

How about updating this into fully dm-driven with dt or platdata?
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[U-Boot] [PATCH 2/2] nand: zynq: Send address cycles as per onfi parameter page

[Michal Simek]

From: Siva Durga Prasad Paladugu 

Send address cycles as per value read from onfi parameter
page for Read and write commands instead of using a
hard coded value. This may vary for different parts and
hence use it from onfi parameter page value.

Signed-off-by: Siva Durga Prasad Paladugu 
Signed-off-by: Michal Simek 
---

 drivers/mtd/nand/zynq_nand.c | 16 +++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/zynq_nand.c b/drivers/mtd/nand/zynq_nand.c
index d203a5f19de8..3f4fa9107858 100644
--- a/drivers/mtd/nand/zynq_nand.c
+++ b/drivers/mtd/nand/zynq_nand.c
@@ -85,6 +85,9 @@
 #define ZYNQ_NAND_ECC_BUSY (1 << 6)/* ECC block is busy */
 #define ZYNQ_NAND_ECC_MASK 0x00FF  /* ECC value mask */
 
+#define ZYNQ_NAND_ROW_ADDR_CYCL_MASK   0x0F
+#define ZYNQ_NAND_COL_ADDR_CYCL_MASK   0xF0
+
 #define ZYNQ_NAND_MIO_NUM_NAND_8BIT13
 #define ZYNQ_NAND_MIO_NUM_NAND_16BIT   8
 
@@ -779,6 +782,7 @@ static void zynq_nand_cmd_function(struct mtd_info *mtd, 
unsigned int command,
 {
struct nand_chip *chip = mtd->priv;
const struct zynq_nand_command_format *curr_cmd = NULL;
+   u8 addr_cycles = 0;
struct zynq_nand_info *xnand = (struct zynq_nand_info *)chip->priv;
void *cmd_addr;
unsigned long cmd_data = 0;
@@ -829,8 +833,18 @@ static void zynq_nand_cmd_function(struct mtd_info *mtd, 
unsigned int command,
else
end_cmd = curr_cmd->end_cmd;
 
+   if (command == NAND_CMD_READ0 ||
+   command == NAND_CMD_SEQIN) {
+   addr_cycles = chip->onfi_params.addr_cycles &
+   ZYNQ_NAND_ROW_ADDR_CYCL_MASK;
+   addr_cycles += ((chip->onfi_params.addr_cycles &
+   ZYNQ_NAND_COL_ADDR_CYCL_MASK) >> 4);
+   } else {
+   addr_cycles = curr_cmd->addr_cycles;
+   }
+
cmd_phase_addr = (unsigned long)xnand->nand_base|
-   (curr_cmd->addr_cycles << ADDR_CYCLES_SHIFT)|
+   (addr_cycles << ADDR_CYCLES_SHIFT)  |
(end_cmd_valid << END_CMD_VALID_SHIFT)  |
(COMMAND_PHASE) |
(end_cmd << END_CMD_SHIFT)  |
-- 
2.17.0

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[U-Boot] [PATCH 1/2] nand: zynq: Add support for 16-bit buswidth

[Michal Simek]

From: Siva Durga Prasad Paladugu 

This patch adds support for 16-bit buswidth by determining
the bus width based on mio configuration.

Signed-off-by: Siva Durga Prasad Paladugu 
Signed-off-by: Michal Simek 
---

 drivers/mtd/nand/zynq_nand.c | 38 
 1 file changed, 38 insertions(+)

diff --git a/drivers/mtd/nand/zynq_nand.c b/drivers/mtd/nand/zynq_nand.c
index 2d4e8b4736ba..d203a5f19de8 100644
--- a/drivers/mtd/nand/zynq_nand.c
+++ b/drivers/mtd/nand/zynq_nand.c
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 
 /* The NAND flash driver defines */
 #define ZYNQ_NAND_CMD_PHASE1
@@ -84,6 +85,15 @@
 #define ZYNQ_NAND_ECC_BUSY (1 << 6)/* ECC block is busy */
 #define ZYNQ_NAND_ECC_MASK 0x00FF  /* ECC value mask */
 
+#define ZYNQ_NAND_MIO_NUM_NAND_8BIT13
+#define ZYNQ_NAND_MIO_NUM_NAND_16BIT   8
+
+enum zynq_nand_bus_width {
+   NAND_BW_UNKNOWN = -1,
+   NAND_BW_8BIT,
+   NAND_BW_16BIT,
+};
+
 #ifndef NAND_CMD_LOCK_TIGHT
 #define NAND_CMD_LOCK_TIGHT 0x2c
 #endif
@@ -1006,6 +1016,23 @@ static int zynq_nand_device_ready(struct mtd_info *mtd)
return 0;
 }
 
+static int zynq_nand_check_is_16bit_bw_flash(void)
+{
+   int is_16bit_bw = NAND_BW_UNKNOWN;
+   int mio_num_8bit = 0, mio_num_16bit = 0;
+
+   mio_num_8bit = zynq_slcr_get_mio_pin_status("nand8");
+   if (mio_num_8bit == ZYNQ_NAND_MIO_NUM_NAND_8BIT)
+   is_16bit_bw = NAND_BW_8BIT;
+
+   mio_num_16bit = zynq_slcr_get_mio_pin_status("nand16");
+   if (mio_num_8bit == ZYNQ_NAND_MIO_NUM_NAND_8BIT &&
+   mio_num_16bit == ZYNQ_NAND_MIO_NUM_NAND_16BIT)
+   is_16bit_bw = NAND_BW_16BIT;
+
+   return is_16bit_bw;
+}
+
 static int zynq_nand_init(struct nand_chip *nand_chip, int devnum)
 {
struct zynq_nand_info *xnand;
@@ -1017,6 +1044,7 @@ static int zynq_nand_init(struct nand_chip *nand_chip, 
int devnum)
unsigned long ecc_cfg;
int ondie_ecc_enabled = 0;
int err = -1;
+   int is_16bit_bw;
 
xnand = calloc(1, sizeof(struct zynq_nand_info));
if (!xnand) {
@@ -1046,6 +1074,16 @@ static int zynq_nand_init(struct nand_chip *nand_chip, 
int devnum)
nand_chip->read_buf = zynq_nand_read_buf;
nand_chip->write_buf = zynq_nand_write_buf;
 
+   is_16bit_bw = zynq_nand_check_is_16bit_bw_flash();
+   if (is_16bit_bw == NAND_BW_UNKNOWN) {
+   printf("%s: Unable detect NAND based on MIO settings\n",
+  __func__);
+   goto fail;
+   }
+
+   if (is_16bit_bw == NAND_BW_16BIT)
+   nand_chip->options = NAND_BUSWIDTH_16;
+
nand_chip->bbt_options = NAND_BBT_USE_FLASH;
 
/* Initialize the NAND flash interface on NAND controller */
-- 
2.17.0

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Re: [U-Boot] [PATCH] sf: Add Spansion s25fl208k entry

[Jagan Teki]

On Wed, Apr 4, 2018 at 3:20 PM, Sean Nyekjaer  wrote:
> Add entry for Spansion s25fl208k part.
>
> Signed-off-by: Sean Nyekjaer 
> ---

Applied to u-boot-spi/master
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Re: [U-Boot] [PATCH v5 0/2] SF: add support for sst26wf016, sst26wf032, sst26wf064

[Jagan Teki]

On Tue, Apr 10, 2018 at 5:10 PM, Eugeniy Paltsev
 wrote:
> Add support for the SST sst26wf016, sst26wf032 and sst26wf064 flash IC:
>
> sst26wf*** flash series block protection implementation differs from other
> SST series, so we add implementation for sst26wf*** lock/unlock/is_locked
> functions.
>
> Add sst26wf016, sst26wf032 and sst26wf064 flash IC info to spi_flash_ids list.
>
> Changes v4->v5:
>  * Return EACCES when flash is locked instead of custom define (SF_LOCKED)
>  * Add SST26_CTL_* prefix to sst27 lock ops enum.
>  * Move all sst26 code inside of existing CONFIG_SPI_FLASH_SST #ifdef.
>
> Changes v3->v4:
>  * Make sst26_process_bpr() and sst26_lock_ctl() functions static.
>
> Changes v2->v3:
>  * Move SST26 command defenition to sf_internal.h
>  * Merge sst26_set_bpr, sst26_clear_bpr and sst26_check_bpr functions
>into single sst26_process_bpr function.
>  * Use SF_UNLOCKED/SF_LOCKED instead of magic numbers in
>sst26_lock_ctl()
>
> Changes v1->v2:
>  * Use generic defines from linux/sizes.h instead of custom ones.
>
> Eugeniy Paltsev (2):
>   SPI Flash: add support of sst26wf* flash ICs protection ops
>   SF: add support for sst26wf016, sst26wf032, sst26wf064

Applied to u-boot-spi/master
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Re: [U-Boot] [PATCH v4 0/4] ARM: i.MX6: Add u-boot dtsi files

[Jagan Teki]

Stefano,

On Wed, Apr 11, 2018 at 6:02 PM, Jagan Teki  wrote:
> All CONFIG changes from arch/arm/mach-imx fromprevious version [1]
> since most of them won't agree with new naming convention that sync
> with Linux.
>
> This series add rest of changes like u-boot dtsi files for U-Boot
> definitions and arch/arm/boot/Makefile changes wrt imx.
>
> Changes for v4:
> - Drop patches related to CONFIG changes on arch/arm/mach-imx
> - Revised and rebased on master
>
> Changes for v3:
> - Drop patch "Change SYS_SOC from mx6 to imx6"
>
> Changes for v2:
> - Add new patch "ARM: dts: imx6ul-isiot: Move usdhc2 into dtsi"
> - Fixed *u-boot.dtsi files
> - Fixed board/logicpd/imx6/mx6q_2x_MT41K512M16HA.cfg to use imx6
>
> [1] https://patchwork.ozlabs.org/cover/890931/
>
> Jagan Teki (4):
>   ARM: dts: i.MX6QDL: U-Boot specific dts for u-boot,dm-spl
>   ARM: dts: imx6ul-isiot: Move usdhc2 into dtsi
>   ARM: dts: i.MX6UL: U-Boot specific dts for u-boot,dm-spl
>   ARM: i.MX6: dts: Build dtb based on SOC type

Can you apply this if all OK?

Jagan.

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[U-Boot] [PATCH 2/2] nand: zynq: Cleanup initialization

[Michal Simek]

From: Ezequiel Garcia 

CONFIG_NAND_ZYNQ selects CONFIG_SYS_NAND_SELF_INIT, so the
driver doesn't have to play any ifdef game.

Also, we can mark zynq_nand_init() as static and get rid
of the mach-specific nand.h header.

This is really a revert of:
"mtd: zynq: nand: Move board_nand_init() function to board.c"
(sha1: 310995d9f91ae56082b49be06fe8c3d01424f8f6)

Signed-off-by: Ezequiel Garcia 
Reviewed-by: Michal Simek 
Signed-off-by: Michal Simek 
---

 arch/arm/mach-zynq/include/mach/nand.h | 9 -
 drivers/mtd/nand/zynq_nand.c   | 6 ++
 2 files changed, 2 insertions(+), 13 deletions(-)
 delete mode 100644 arch/arm/mach-zynq/include/mach/nand.h

diff --git a/arch/arm/mach-zynq/include/mach/nand.h 
b/arch/arm/mach-zynq/include/mach/nand.h
deleted file mode 100644
index 61ef45f5828a..
--- a/arch/arm/mach-zynq/include/mach/nand.h
+++ /dev/null
@@ -1,9 +0,0 @@
-/*
- * Copyright (C) 2017 National Instruments Corp.
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include 
-
-void zynq_nand_init(void);
diff --git a/drivers/mtd/nand/zynq_nand.c b/drivers/mtd/nand/zynq_nand.c
index 9f6ff3d045c2..2d4e8b4736ba 100644
--- a/drivers/mtd/nand/zynq_nand.c
+++ b/drivers/mtd/nand/zynq_nand.c
@@ -1006,7 +1006,7 @@ static int zynq_nand_device_ready(struct mtd_info *mtd)
return 0;
 }
 
-int zynq_nand_init(struct nand_chip *nand_chip, int devnum)
+static int zynq_nand_init(struct nand_chip *nand_chip, int devnum)
 {
struct zynq_nand_info *xnand;
struct mtd_info *mtd;
@@ -1192,14 +1192,12 @@ fail:
return err;
 }
 
-#ifdef CONFIG_SYS_NAND_SELF_INIT
 static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
 
-void __weak board_nand_init(void)
+void board_nand_init(void)
 {
struct nand_chip *nand = _chip[0];
 
if (zynq_nand_init(nand, 0))
puts("ZYNQ NAND init failed\n");
 }
-#endif
-- 
2.17.0

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[U-Boot] [PATCH 1/2] nand: zynq: Fix driver initialization

[Michal Simek]

From: Ezequiel Garcia 

This driver is currently broken, refusing to initialize properly.

The reason is that get_nand_dev_by_index() was being called before
nand_register(), thus returning a pointer into uninitialized memory.
In other words, the struct mtd_info used by the driver is total junk.

Fix it by getting the correct struct mtd_info, via nand_to_mtd()
on the driver's struct nand_chip.

Tested on a custom board, where the CPU is halted without this patch.

Signed-off-by: Ezequiel Garcia 
Reviewed-by: Michal Simek 
Signed-off-by: Michal Simek 
---

 drivers/mtd/nand/zynq_nand.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/zynq_nand.c b/drivers/mtd/nand/zynq_nand.c
index 6494196049f1..9f6ff3d045c2 100644
--- a/drivers/mtd/nand/zynq_nand.c
+++ b/drivers/mtd/nand/zynq_nand.c
@@ -1025,7 +1025,7 @@ int zynq_nand_init(struct nand_chip *nand_chip, int 
devnum)
}
 
xnand->nand_base = (void __iomem *)ZYNQ_NAND_BASEADDR;
-   mtd = get_nand_dev_by_index(0);
+   mtd = nand_to_mtd(nand_chip);
 
nand_chip->priv = xnand;
mtd->priv = nand_chip;
-- 
2.17.0

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[U-Boot] [PATCH 2/2] arm: zynq: Remove checkboard and enable DISPLAY_CPUINFO

[Michal Simek]

Now that showing silicon version is part of the CPU
info display, let's remove checkboard().

Note that the generic show_board_info() will still
show the DT 'model' property. For instance:

U-Boot 2018.05-rc2-00025-g611b3ee0159b (Apr 19 2018 - 11:23:12 +0200)

CPU:   Zynq 7z045
Silicon: v1.0
Model: Zynq ZC706 Development Board
I2C:   ready

Based on patches from Ariel D'Alessandro ,
and Ezequiel Garcia 

mini configuration doesn't need to show this information.

Signed-off-by: Michal Simek 
---

 arch/arm/mach-zynq/cpu.c   | 19 +++
 board/xilinx/zynq/board.c  | 17 -
 configs/syzygy_hub_defconfig   |  1 -
 configs/topic_miami_defconfig  |  1 -
 configs/topic_miamilite_defconfig  |  1 -
 configs/topic_miamiplus_defconfig  |  1 -
 configs/zynq_cc108_defconfig   |  1 -
 configs/zynq_microzed_defconfig|  1 -
 configs/zynq_picozed_defconfig |  1 -
 configs/zynq_z_turn_defconfig  |  1 -
 configs/zynq_zc702_defconfig   |  1 -
 configs/zynq_zc706_defconfig   |  1 -
 configs/zynq_zc770_xm010_defconfig |  1 -
 configs/zynq_zc770_xm011_defconfig |  1 -
 configs/zynq_zc770_xm011_x16_defconfig |  1 -
 configs/zynq_zc770_xm012_defconfig |  1 -
 configs/zynq_zc770_xm013_defconfig |  1 -
 configs/zynq_zed_defconfig |  1 -
 configs/zynq_zybo_defconfig|  1 -
 19 files changed, 19 insertions(+), 34 deletions(-)

diff --git a/arch/arm/mach-zynq/cpu.c b/arch/arm/mach-zynq/cpu.c
index fcd8148225ae..99394ca969d0 100644
--- a/arch/arm/mach-zynq/cpu.c
+++ b/arch/arm/mach-zynq/cpu.c
@@ -124,3 +124,22 @@ int arch_early_init_r(void)
return 0;
 }
 #endif
+
+#ifdef CONFIG_DISPLAY_CPUINFO
+int print_cpuinfo(void)
+{
+   u32 version;
+   int cpu_id = cpu_desc_id();
+
+   if (cpu_id < 0)
+   return 0;
+
+   version = zynq_get_silicon_version() << 1;
+   if (version > (PCW_SILICON_VERSION_3 << 1))
+   version += 1;
+
+   printf("CPU:   Zynq %s\n", zynq_fpga_descs[cpu_id].devicename);
+   printf("Silicon: v%d.%d\n", version >> 1, version & 1);
+   return 0;
+}
+#endif
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index ffa9d7ccfc0c..1bdf319b2ca7 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -14,7 +14,6 @@
 #include 
 #include 
 #include 
-#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -74,22 +73,6 @@ int board_late_init(void)
return 0;
 }
 
-#ifdef CONFIG_DISPLAY_BOARDINFO
-int checkboard(void)
-{
-   u32 version = zynq_get_silicon_version();
-
-   version <<= 1;
-   if (version > (PCW_SILICON_VERSION_3 << 1))
-   version += 1;
-
-   puts("Board: Xilinx Zynq\n");
-   printf("Silicon: v%d.%d\n", version >> 1, version & 1);
-
-   return 0;
-}
-#endif
-
 int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
 {
 #if defined(CONFIG_ZYNQ_GEM_EEPROM_ADDR) && \
diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig
index 005cb9ce2eb6..d893baded2ee 100644
--- a/configs/syzygy_hub_defconfig
+++ b/configs/syzygy_hub_defconfig
@@ -12,7 +12,6 @@ CONFIG_FIT=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_SYS_PROMPT="Zynq> "
diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig
index 1619df303dbb..7ea09ac15e50 100644
--- a/configs/topic_miami_defconfig
+++ b/configs/topic_miami_defconfig
@@ -11,7 +11,6 @@ CONFIG_DEBUG_UART=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_BOOTDELAY=0
 CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_PROMPT="zynq-uboot> "
diff --git a/configs/topic_miamilite_defconfig 
b/configs/topic_miamilite_defconfig
index 5e55ebdaf84f..d30843c38b73 100644
--- a/configs/topic_miamilite_defconfig
+++ b/configs/topic_miamilite_defconfig
@@ -11,7 +11,6 @@ CONFIG_DEBUG_UART=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_BOOTDELAY=0
 CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_PROMPT="zynq-uboot> "
diff --git a/configs/topic_miamiplus_defconfig 
b/configs/topic_miamiplus_defconfig
index 39cdb22ba6e1..9710d9550938 100644
--- a/configs/topic_miamiplus_defconfig
+++ b/configs/topic_miamiplus_defconfig
@@ -11,7 +11,6 @@ CONFIG_DEBUG_UART=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_BOOTDELAY=0
 CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_PROMPT="zynq-uboot> "
diff --git a/configs/zynq_cc108_defconfig b/configs/zynq_cc108_defconfig
index 170cfbd9780d..a32127d00333 100644
--- 

[U-Boot] [PATCH 1/2] arm: zynq: Rework FPGA initialization

[Michal Simek]

This commit moves the FPGA descriptor definition
to mach-zynq, where it makes more sense.

Based on patches from Ariel D'Alessandro 
and Ezequiel Garcia 

Signed-off-by: Michal Simek 
---

 arch/arm/Kconfig|  1 +
 arch/arm/mach-zynq/cpu.c| 66 +++-
 board/xilinx/zynq/board.c   | 63 ---
 configs/zynq_cse_qspi_defconfig |  1 +
 include/zynqpl.h| 89 +
 5 files changed, 101 insertions(+), 119 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7212fc5afa72..b5fbce03667d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -763,6 +763,7 @@ config ARCH_ZYNQ
imply CMD_CLK
imply FAT_WRITE
imply CMD_SPL
+   imply ARCH_EARLY_INIT_R
 
 config ARCH_ZYNQMP
bool "Xilinx ZynqMP based platform"
diff --git a/arch/arm/mach-zynq/cpu.c b/arch/arm/mach-zynq/cpu.c
index ee1c1a943b66..fcd8148225ae 100644
--- a/arch/arm/mach-zynq/cpu.c
+++ b/arch/arm/mach-zynq/cpu.c
@@ -5,14 +5,45 @@
  * SPDX-License-Identifier:GPL-2.0+
  */
 #include 
+#include 
 #include 
 #include 
-#include 
 #include 
+#include 
+#include 
 
 #define ZYNQ_SILICON_VER_MASK  0xF000
 #define ZYNQ_SILICON_VER_SHIFT 28
 
+#if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \
+(defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD))
+xilinx_desc fpga = {
+   .family = xilinx_zynq,
+   .iface = devcfg,
+   .operations = _op,
+};
+#endif
+
+static const struct {
+   u8 idcode;
+#if defined(CONFIG_FPGA)
+   u32 fpga_size;
+#endif
+   char *devicename;
+} zynq_fpga_descs[] = {
+   ZYNQ_DESC(7Z007S),
+   ZYNQ_DESC(7Z010),
+   ZYNQ_DESC(7Z012S),
+   ZYNQ_DESC(7Z014S),
+   ZYNQ_DESC(7Z015),
+   ZYNQ_DESC(7Z020),
+   ZYNQ_DESC(7Z030),
+   ZYNQ_DESC(7Z035),
+   ZYNQ_DESC(7Z045),
+   ZYNQ_DESC(7Z100),
+   { /* Sentinel */ },
+};
+
 int arch_cpu_init(void)
 {
zynq_slcr_unlock();
@@ -60,3 +91,36 @@ void enable_caches(void)
dcache_enable();
 }
 #endif
+
+static int __maybe_unused cpu_desc_id(void)
+{
+   u32 idcode;
+   u8 i;
+
+   idcode = zynq_slcr_get_idcode();
+   for (i = 0; zynq_fpga_descs[i].idcode; i++) {
+   if (zynq_fpga_descs[i].idcode == idcode)
+   return i;
+   }
+
+   return -ENODEV;
+}
+
+#if defined(CONFIG_ARCH_EARLY_INIT_R)
+int arch_early_init_r(void)
+{
+#if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \
+(defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD))
+   int cpu_id = cpu_desc_id();
+
+   if (cpu_id < 0)
+   return 0;
+
+   fpga.size = zynq_fpga_descs[cpu_id].fpga_size;
+   fpga.name = zynq_fpga_descs[cpu_id].devicename;
+   fpga_init();
+   fpga_add(fpga_xilinx, );
+#endif
+   return 0;
+}
+#endif
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 838ac0f4c4ea..ffa9d7ccfc0c 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -18,23 +18,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \
-(defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD))
-static xilinx_desc fpga;
-
-/* It can be done differently */
-static xilinx_desc fpga007s = XILINX_XC7Z007S_DESC(0x7);
-static xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10);
-static xilinx_desc fpga012s = XILINX_XC7Z012S_DESC(0x12);
-static xilinx_desc fpga014s = XILINX_XC7Z014S_DESC(0x14);
-static xilinx_desc fpga015 = XILINX_XC7Z015_DESC(0x15);
-static xilinx_desc fpga020 = XILINX_XC7Z020_DESC(0x20);
-static xilinx_desc fpga030 = XILINX_XC7Z030_DESC(0x30);
-static xilinx_desc fpga035 = XILINX_XC7Z035_DESC(0x35);
-static xilinx_desc fpga045 = XILINX_XC7Z045_DESC(0x45);
-static xilinx_desc fpga100 = XILINX_XC7Z100_DESC(0x100);
-#endif
-
 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
 static struct udevice *watchdog_dev;
 #endif
@@ -53,46 +36,6 @@ int board_early_init_f(void)
 
 int board_init(void)
 {
-#if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \
-(defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD))
-   u32 idcode;
-
-   idcode = zynq_slcr_get_idcode();
-
-   switch (idcode) {
-   case XILINX_ZYNQ_7007S:
-   fpga = fpga007s;
-   break;
-   case XILINX_ZYNQ_7010:
-   fpga = fpga010;
-   break;
-   case XILINX_ZYNQ_7012S:
-   fpga = fpga012s;
-   break;
-   case XILINX_ZYNQ_7014S:
-   fpga = fpga014s;
-   break;
-   case XILINX_ZYNQ_7015:
-   fpga = fpga015;
-   break;
-   case XILINX_ZYNQ_7020:
-   fpga = fpga020;
-   break;
-   case XILINX_ZYNQ_7030:
-   fpga = fpga030;
-   break;
- 

[U-Boot] [PATCH] arm: zynq: Enable debug_uart_init in spl when enabled

[Michal Simek]

In past this code was commented and was used for debug purpose.
But there is no reason not to enabled it based on macros.

Signed-off-by: Michal Simek 
---

 arch/arm/mach-zynq/spl.c | 11 ++-
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-zynq/spl.c b/arch/arm/mach-zynq/spl.c
index 0a303f41ebdf..c17fbd49877a 100644
--- a/arch/arm/mach-zynq/spl.c
+++ b/arch/arm/mach-zynq/spl.c
@@ -20,11 +20,12 @@ void board_init_f(ulong dummy)
ps7_init();
 
arch_cpu_init();
-   /*
-* The debug UART can be used from this point:
-* debug_uart_init();
-* printch('x');
-*/
+
+#ifdef CONFIG_DEBUG_UART
+   /* Uart debug for sure */
+   debug_uart_init();
+   puts("Debug uart enabled\n"); /* or printch() */
+#endif
 }
 
 #ifdef CONFIG_SPL_BOARD_INIT
-- 
2.17.0

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[U-Boot] [PATCH v2 0/8] Fix SPL build without CONFIG_SPL_SERIAL_SUPPORT

[Alex Kiernan]

Attempting to build SPL without CONFIG_SPL_SERIAL_SUPPORT defined fails
in assorted ways. This series fixes up those failures.

Green Travis build:

https://travis-ci.org/akiernan/u-boot/builds/368288275

Changes in v2:
- Rebase against master
- Update Travis build URL
- Introduce default y PRINTF/SPRINTF/STRTO symbol so CONFIG_IS_ENABLED
  works without any additional ifdefs
- Remove ifdef dance with SPL/TPL now PRINTF exists as its own symbol
- Guard select if SPL/TPL_{SPRINTF,STRTO} symbols with SPL/TPL

Alex Kiernan (8):
  Cleanup CONFIG_SPL_SERIAL_SUPPORT migration
  spl: ti: Avoid preloader_console_init if !CONFIG_SPL_SERIAL_SUPPORT
  spl: Add dependency on serial to Ymodem
  spl: ti: Avoid serial calls when serial support is disabled
  spl: Split sprintf, strto* from SPL serial in Kconfig
  spl: Disable printf if not required
  Consolidate __assert_failed into one implementation
  spl: disk: usb: Add dependencies to sprintf/strto*

 arch/arm/mach-omap2/boot-common.c   |  3 ++-
 board/ti/am335x/board.c |  2 ++
 common/spl/Kconfig  |  6 +
 common/spl/spl.c|  2 ++
 configs/controlcenterdc_defconfig   |  1 +
 configs/ls1021aiot_sdcard_defconfig |  1 +
 configs/ls1046aqds_nand_defconfig   |  1 +
 configs/ls1046aqds_sdcard_ifc_defconfig |  1 +
 configs/ls1046aqds_sdcard_qspi_defconfig|  1 +
 configs/ls1046ardb_emmc_defconfig   |  1 +
 configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig |  1 +
 configs/ls1046ardb_sdcard_defconfig |  1 +
 disk/Kconfig|  4 +++
 drivers/usb/musb-new/Kconfig|  4 +++
 include/configs/controlcenterdc.h   |  1 -
 include/configs/ls1021aiot.h|  1 -
 include/configs/ls1046a_common.h|  2 --
 lib/Kconfig | 34 +
 lib/Makefile| 15 +--
 lib/panic.c | 10 
 lib/tiny-printf.c   | 21 +--
 lib/vsprintf.c  | 11 ++--
 22 files changed, 87 insertions(+), 37 deletions(-)

-- 
2.7.4

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Re: [U-Boot] [PATCH v1] arm: mxs: make startup code thumb compatible

[Christoph Müllner]

> On 19.04.2018, at 10:33, Marek Vasut  wrote:
> 
> On 04/19/2018 10:02 AM, klaus.go...@theobroma-systems.com wrote:
>> 
>>> On 18.04.2018, at 22:02, Marek Vasut  wrote:
>>> 
>>> On 04/18/2018 06:25 PM, Klaus Goger wrote:
 When building the mxs platform in thumb mode gcc generates code using
 the intra procedure call scratch register (ip/r12) for the calling the
 lowlevel_init function. This modifies the lr in flush_dcache which
 causes u-boot proper to end in an endless loop.
 
 40002334:   e1a0c00emov ip, lr
 40002338:   eb00df4cbl  4003a070
 <__lowlevel_init_from_arm>
 4000233c:   e1a0e00cmov lr, ip
 40002340:   e1a0f00emov pc, lr
 [...]
 4003a070 <__lowlevel_init_from_arm>:
 4003a070:   e59fc004ldr ip, [pc, #4]; 4003a07c
 <__lowlevel_init_from_arm+0xc>
 4003a074:   e08fc00cadd ip, pc, ip
 4003a078:   e12fff1cbx  ip
 4003a07c:   fffc86cd.word   0xfffc86cd
 
 Instead of using the the ip/r12 register we use sl/r10 to preserve the
 link register.
 
 According to "Procedure Call Standard for the ARM Architecture" by ARM
 subroutines have to preserve the contents of register r4-r8, r10, r11
 and SP. So using r10 instead of r12 should be save.
 
 Signed-off-by: Klaus Goger 
 Signed-off-by: Christoph Muellner 
 
 
 ---
 
 arch/arm/cpu/arm926ejs/start.S | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)
 
 diff --git a/arch/arm/cpu/arm926ejs/start.S 
 b/arch/arm/cpu/arm926ejs/start.S
 index 959d1ed86d..103bd15914 100644
 --- a/arch/arm/cpu/arm926ejs/start.S
 +++ b/arch/arm/cpu/arm926ejs/start.S
 @@ -105,9 +105,9 @@ flush_dcache:
/*
 * Go setup Memory and board specific bits prior to relocation.
 */
 -  mov ip, lr  /* perserve link reg across call */
 -  bl  lowlevel_init   /* go setup pll,mux,memory */
 -  mov lr, ip  /* restore link */
 +  mov sl, lr  /* perserve link reg across call */
 +  blx lowlevel_init   /* go setup pll,mux,memory */
 +  mov lr, sl  /* restore link */
 #endif
 -  mov pc, lr  /* back to my caller */
 +  bx  lr  /* back to my caller */
 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
>>> 
>>> Are you sure this doesn't break the non-thumb operation ?
>> 
>> Yes I’m sure. I also tested thumb and non-thumb builds on the same device 
>> with
>> that patch. Both give you a proper u-boot shell.
>> 
>> I think there will be more patches down the road fixing other 
>> thumb/non-thumb issues
>> (like booting a kernel). But they are not related to that patchset.
> 
> Can lowlevel_init be ARM code if U-Boot is compiled in Thumb mode ? I
> guess it can if lowlevel_init is assembler code, in which case doing
> blx/bx to it would call it in Thumb mode and crash ?

It works, because for the tested mxs lowlevel_init is defined as follows:
arch/arm/cpu/arm926ejs/mxs/mxs.c:void lowlevel_init(void) {}
So the compiler fixes this for us, by generating the following code:

> 40002308 :
> ...
> 40002334:   e1a0a00emov sl, lr
> 40002338:   eb014df6bl  40055b18 <__lowlevel_init_from_arm>
> 4000233c:   e1a0e00amov lr, sl
> 40002340:   e1a0f00emov pc, lr

the compiler generated arm-to-thumb helper:

> 40055b18 <__lowlevel_init_from_arm>:
> 40055b18:   e59fc004ldr ip, [pc, #4]; 40055b24 
> <__lowlevel_init_from_arm+0xc>
> 40055b1c:   e08fc00cadd ip, pc, ip
> 40055b20:   e12fff1cbx  ip
> 40055b24:   fffacd2d.word   0xfffacd2d


and the thumb compiled lowlevel_init:

> 40002850 :
> 40002850:   4770bx  lr


So it works for mxs, but it will break other arm926ejs boards,
which implement lowlevel_init in assembly.

I've just tested and the exactly same code as above it generated if we
use "bl lowlevel_init" and compile it with thumb. So we will update
the patch to exclude that changed line.

Thanks,
Christoph



> 
> I might be wrong though
> 
>>> Also, is this really MXS specific or not ?
>> 
>> My error, shouldn’t have tagged it mxs as it’s for all arm926ejs platforms.
>> 
>> I guess arm920t, arm946es, arm720t, arm1136 and omap3 will have the same 
>> issue as
>> it has more or less verbatim copies of these functions.
>> But do the lack of hardware I could not test it.
> 
> 
> --
> Best regards,
> Marek Vasut



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Re: [U-Boot] [PATCH 1/5] ARM: socfpga: Add boot trampoline for Arria10

[Marek Vasut]

On 04/19/2018 07:51 AM, See, Chin Liang wrote:
> On Tue, 2018-04-17 at 11:28 +0200, Marek Vasut wrote:
>> On 04/17/2018 11:11 AM, See, Chin Liang wrote:
>>>
>>> On Tue, 2018-04-17 at 11:01 +0200, Marek Vasut wrote:

 On 04/17/2018 10:52 AM, See, Chin Liang wrote:
>
>
> On Tue, 2018-04-17 at 10:46 +0200, Marek Vasut wrote:
>>
>>
>> On 04/17/2018 10:40 AM, See, Chin Liang wrote:
>>>
>>>
>>>
>>> Hi Marek,
>>>
>>> On Sun, 2018-04-15 at 15:37 +0200, Marek Vasut wrote:



 The Arria10 uses slightly different boot image header
 than
 the
 Gen5
 SoCs,
 in particular the header itself contains an offset from
 the
 start
 of
 the
 header to which the Arria10 jumps. This offset must not
 be
 negative,
 yet
 the header is placed at offset 0x40 of the bootable
 binary.
 Therefore, to
 jump into U-Boot, add a trampoline just past the Arria10
 boot
 header
 and
 point to this trampoline at fixed offset from the header
 generated
 using
 the mkimage -T socfpgaimage_v1 . Note that it is not
 needed
 to
 jump
 back
 to offset 0x0 of the image, it is possible to jump
 directly
 at
 the
 reset
 label and save processing two instructions.

 Signed-off-by: Marek Vasut 
 Cc: Dinh Nguyen 
 Cc: Chin Liang See 
 ---
  arch/arm/mach-socfpga/include/mach/boot0.h | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

 diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h
 b/arch/arm/mach-socfpga/include/mach/boot0.h
 index d6b9435d33..06bbe27d2c 100644
 --- a/arch/arm/mach-socfpga/include/mach/boot0.h
 +++ b/arch/arm/mach-socfpga/include/mach/boot0.h
 @@ -18,10 +18,10 @@ _start:
    .word   0xcafec0d3; /* Checksum,
 zero-
 pad */
    nop;
  
 -  b reset;/* SoCFPGA jumps here */
 -  nop;
 +  b reset;/* SoCFPGA Gen5 jumps
 here
 */
    nop;
    nop;
 +  b reset;/* SoCFPGA Gen10
 trampoline
 */
>>> Our mkpimage tools from SOCEDS is using 0x14 as offset.
>>> Wonder
>>> can
>>> we
>>> standardize that by using 0x14 instead of proposed 0x18 in
>>> this
>>> patch?
>> What difference does it make, the entire image is generated
>> during
>> the
>> build anyway ? This patch uses offset 0x1c, but what is the
>> reason
>> for
>> address 0x14 in your proprietary tool, is there one ?
> Our A10 header ended at 0x13 today. Hence we are continuing the
> code at
> 0x14 without any spacing.
>
> While for 0x1c, should it be 3 nop?
 Yes, gives enough space were the header grow for whatever reason.
 Mind
 you, the NOPs are not executed, the socfpga jumps to 0x1c
 directly
 via
 0x0c -- Image entry offset
>>> Ok, I don't have strong objection on this. We can claim that we
>>> don't
>>> support use case where we use mkpimage tools from SCOEDS to sign
>>> SPL
>>> binary from mainstream.
>> Which you can, why wouldn't it work ?
>>
> 
> Rethinking on this, yes as the nop shall able to handle this. Just the
> vice versa won't work since downstream U-Boot already have the entry
> fixed at 0x14.
> 
> 
>> What is the benefit of using mkpimage if mkimage does the same thing
>> though ?
> 
> Initial thought is for having both tools compatible. But rethinking the
> makefile will handle this, we just advise user directly use sfp file
> directly.

I mean, I can place the trampoline to 0x14 , it doesn't really matter.
But is there some hidden gem in the SoCFPGA bootrom which might bite us
later ?

-- 
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Marek Vasut
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Re: [U-Boot] [PATCH v1] arm: mxs: make startup code thumb compatible

[Marek Vasut]

On 04/19/2018 10:02 AM, klaus.go...@theobroma-systems.com wrote:
> 
>> On 18.04.2018, at 22:02, Marek Vasut  wrote:
>>
>> On 04/18/2018 06:25 PM, Klaus Goger wrote:
>>> When building the mxs platform in thumb mode gcc generates code using
>>> the intra procedure call scratch register (ip/r12) for the calling the
>>> lowlevel_init function. This modifies the lr in flush_dcache which
>>> causes u-boot proper to end in an endless loop.
>>>
>>> 40002334:   e1a0c00emov ip, lr
>>> 40002338:   eb00df4cbl  4003a070
>>> <__lowlevel_init_from_arm>
>>> 4000233c:   e1a0e00cmov lr, ip
>>> 40002340:   e1a0f00emov pc, lr
>>> [...]
>>> 4003a070 <__lowlevel_init_from_arm>:
>>> 4003a070:   e59fc004ldr ip, [pc, #4]; 4003a07c
>>> <__lowlevel_init_from_arm+0xc>
>>> 4003a074:   e08fc00cadd ip, pc, ip
>>> 4003a078:   e12fff1cbx  ip
>>> 4003a07c:   fffc86cd.word   0xfffc86cd
>>>
>>> Instead of using the the ip/r12 register we use sl/r10 to preserve the
>>> link register.
>>>
>>> According to "Procedure Call Standard for the ARM Architecture" by ARM
>>> subroutines have to preserve the contents of register r4-r8, r10, r11
>>> and SP. So using r10 instead of r12 should be save.
>>>
>>> Signed-off-by: Klaus Goger 
>>> Signed-off-by: Christoph Muellner 
>>>
>>> ---
>>>
>>> arch/arm/cpu/arm926ejs/start.S | 8 
>>> 1 file changed, 4 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
>>> index 959d1ed86d..103bd15914 100644
>>> --- a/arch/arm/cpu/arm926ejs/start.S
>>> +++ b/arch/arm/cpu/arm926ejs/start.S
>>> @@ -105,9 +105,9 @@ flush_dcache:
>>> /*
>>>  * Go setup Memory and board specific bits prior to relocation.
>>>  */
>>> -   mov ip, lr  /* perserve link reg across call */
>>> -   bl  lowlevel_init   /* go setup pll,mux,memory */
>>> -   mov lr, ip  /* restore link */
>>> +   mov sl, lr  /* perserve link reg across call */
>>> +   blx lowlevel_init   /* go setup pll,mux,memory */
>>> +   mov lr, sl  /* restore link */
>>> #endif
>>> -   mov pc, lr  /* back to my caller */
>>> +   bx  lr  /* back to my caller */
>>> #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
>>
>> Are you sure this doesn't break the non-thumb operation ?
> 
> Yes I’m sure. I also tested thumb and non-thumb builds on the same device with
> that patch. Both give you a proper u-boot shell.
> 
> I think there will be more patches down the road fixing other thumb/non-thumb 
> issues
> (like booting a kernel). But they are not related to that patchset.

Can lowlevel_init be ARM code if U-Boot is compiled in Thumb mode ? I
guess it can if lowlevel_init is assembler code, in which case doing
blx/bx to it would call it in Thumb mode and crash ?

I might be wrong though

>> Also, is this really MXS specific or not ?
> 
> My error, shouldn’t have tagged it mxs as it’s for all arm926ejs platforms.
> 
> I guess arm920t, arm946es, arm720t, arm1136 and omap3 will have the same 
> issue as
> it has more or less verbatim copies of these functions.
> But do the lack of hardware I could not test it.


-- 
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Marek Vasut
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Re: [U-Boot] [PATCH v1 13/16] arm: socfpga: stratix10: Add timer support for Stratix10 SoC

[Marek Vasut]

On 04/19/2018 07:26 AM, See, Chin Liang wrote:
> On Thu, 2018-04-19 at 04:59 +0200, Marek Vasut wrote:
>> On 04/19/2018 11:50 AM, Ley Foon Tan wrote:
>>>
>>> Add timer support for Stratix SoC
>> Is this really custom timer or is that some armv8 thing you're adding
>> here ? Don't we already have a generic implementation for that ? If
>> not,
>> that's what we should do here.
> 
> Yes but not the init function. It's left with platform specific code to
> init it.

Where is the common part ?

-- 
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v1 06/16] arm: socfpga: misc: Move eth reset to common misc driver

[Marek Vasut]

On 04/19/2018 05:13 AM, Ley Foon Tan wrote:
> On Thu, Apr 19, 2018 at 10:47 AM, Marek Vasut  wrote:
>> On 04/19/2018 11:50 AM, Ley Foon Tan wrote:
>>> Move eth reset to common misc driver so can used by other device families.
>>>
>>> Signed-off-by: Chin Liang See 
>>> Signed-off-by: Ley Foon Tan 
>>
>> Shouldn't this use the reset framework instead ?
>>
> What reset framework you refer to? drivers/reset?

I think so, there were patches from Dinh earlier this month
 2ac718821a   | Dinh Nguyen  | reset: socfpga: add reset driver for
SoCFPGA platform

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Re: [U-Boot] [PATCH v1 05/16] arm: socfpga: misc: Add CONFIG_SYS_L2_PL310 switch

[Marek Vasut]

On 04/19/2018 07:15 AM, See, Chin Liang wrote:
> On Thu, 2018-04-19 at 04:47 +0200, Marek Vasut wrote:
>> On 04/19/2018 11:50 AM, Ley Foon Tan wrote:
>>>
>>> Add CONFIG_SYS_L2_PL310 conditional build.
>> Why ?
>>
> 
> In ARM64, L2 cache controller is accessed through processor registers.
> Hence we shall make this conditional in order this file can be shared
> across SOCFPGAs.

That should be in the patch description .
Do you ever add the PL310 register access on S10 later in the set?

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Re: [U-Boot] [PATCH v2 5/5] configs: Bananapi_M2_Ultra: enable gigabit on the Bananapi M2U

[Maxime Ripard]

On Tue, Apr 17, 2018 at 03:42:35PM +0200, Lothar Felten wrote:
> Enable the gigabit ethernet for the Bananapi M2 Ultra board.
> Tested on BananaPi M2 Berry (R40), custom board (V40).
> 
> Signed-off-by: Lothar Felten 
> ---
>  arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts | 14 ++
>  configs/Bananapi_M2_Ultra_defconfig  |  4 
>  2 files changed, 18 insertions(+)
> 
> diff --git a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts 
> b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
> index ab471ab0bf..25f2112fbf 100644
> --- a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
> +++ b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
> @@ -67,3 +67,17 @@
>   pinctrl-0 = <_pb_pins>;
>   status = "okay";
>  };
> +
> + {
> + pinctrl-names = "default";
> + pinctrl-0 = <_pins_rgmii>;
> + status = "okay";
> + phy-handle = <_phy>;
> +};
> +
> + {
> + rgmii_phy: ethernet-phy@1 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <1>;
> + };
> +};
> diff --git a/configs/Bananapi_M2_Ultra_defconfig 
> b/configs/Bananapi_M2_Ultra_defconfig
> index 37cc2df5dc..e4e943dc49 100644
> --- a/configs/Bananapi_M2_Ultra_defconfig
> +++ b/configs/Bananapi_M2_Ultra_defconfig
> @@ -17,3 +17,7 @@ CONFIG_AXP_DLDO4_VOLT=2500
>  CONFIG_AXP_ELDO3_VOLT=1200
>  CONFIG_SCSI=y
>  CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
> +CONFIG_SUN8I_EMAC=y
> +CONFIG_RGMII=y
> +CONFIG_SUN7I_GMAC=y

I'm not sure why you'd need both?

Maxime

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Re: [U-Boot] [PATCH v2 4/5] sunxi: R40: add gigabit ethernet devicetree node

[Maxime Ripard]

On Tue, Apr 17, 2018 at 03:42:34PM +0200, Lothar Felten wrote:
> Add a device tree node for the Allwinner R40/V40 CPU.
> The syscon node is required by the gmac driver.
> 
> Signed-off-by: Lothar Felten 
> ---
>  arch/arm/dts/sun8i-r40.dtsi | 28 
>  1 file changed, 28 insertions(+)
> 
> diff --git a/arch/arm/dts/sun8i-r40.dtsi b/arch/arm/dts/sun8i-r40.dtsi
> index ee22f6eb3a..93bf811014 100644
> --- a/arch/arm/dts/sun8i-r40.dtsi
> +++ b/arch/arm/dts/sun8i-r40.dtsi
> @@ -114,6 +114,12 @@
>   #size-cells = <1>;
>   ranges;
>  
> + syscon: syscon@1c0 {
> + compatible = "allwinner,sun8i-r40-system-controller",
> + "syscon";
> + reg = <0x01c0 0x1000>;
> + };

As far as I understood it, the GMAC configuration register is not in
the system controller on the R40, but in the clock controller.

> +
>   pio: pinctrl@1c20800 {
>   compatible = "allwinner,sun8i-r40-pinctrl";
>   reg = <0x01c20800 0x400>;
> @@ -168,6 +174,28 @@
>   #size-cells = <0>;
>   };
>  
> + gmac: ethernet@01c5 {
> + compatible = "allwinner,sun8i-h3-emac";
> + syscon = <>;
> + reg = <0x01c5 0x2000>;
> + interrupts = ;
> + interrupt-names = "macirq";
> + clocks = <>, <>;
> + clock-names = "stmmaceth", "allwinner_gmac_tx";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <_pins_rgmii>;
> + phy-mode = "rgmii";
> + status = "disabled";
> +
> + mdio: mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "snps,dwmac-mdio";
> + };
> + };
> +

And I guess this is just some temporary binding while waiting for
"real" ones to land in Linux?

Maxime

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