On Fri, 6 Sep 2019 at 04:52, Thomas Fitzsimmons wrote:
>
> When CONFIG_OF_PRIOR_STAGE is enabled, this workaround was needed
> before device_bind_common assigned request numbers sequentially in the
> absence of aliases.
>
> Signed-off-by: Thomas Fitzsimmons
> Cc: Bin Meng
> Cc: Simon Glass
>
On 27/09/2019 03:48, Simon Glass wrote:
> On Tue, 17 Sep 2019 at 09:52, Simon Glass wrote:
>>
>> Hi Matthias,
>>
>> On Tue, 17 Sep 2019 at 00:29, Matthias Brugger wrote:
>>>
>>> Hi Simon,
>>>
>>> On 17/09/2019 07:48, Simon Glass wrote:
Hi,
On Thu, 5 Sep 2019 at 02:49, wrote:
From: Matthias Brugger
Add internal fdt_cells() to avoid copy and paste. Fix typo in
fdt_size_cells() documentation comment.
This is based in upstream commit:
c12b2b0 ("libfdt: fdt_address_cells() and fdt_size_cells()")
but misses the test cases, as we don't implement them in U-Boot.
On Tue, 27 Aug 2019 at 02:43, Bin Meng wrote:
>
> On Tue, Aug 27, 2019 at 4:15 PM AKASHI Takahiro
> wrote:
> >
> > When I tried to run some new efi tests with pytest, efi_smbios_register()
> > triggered a segmentation fault. Here is the location where it happened:
> > efi_init_obj_list()
> >
On Wed, 18 Sep 2019 at 08:05, Philippe Reynes
wrote:
>
> This commit add a test in the vboot test to check that
> when a required key is asked, only FIT signed with this
> key is used/accepted by u-boot.
>
> Signed-off-by: Philippe Reynes
> ---
> test/py/tests/test_vboot.py
On Mon, 16 Sep 2019 at 22:48, Simon Glass wrote:
>
> On Thu, 5 Sep 2019 at 02:49, wrote:
> >
> > From: Matthias Brugger
> >
> > The commit "libfdt: fdt_address_cells() and fdt_size_cells()" introduced
> > a bug as it consolidated code between the helpers for getting
> > be 0, and is frequently
On Sat, 14 Sep 2019 at 06:41, Thomas Fitzsimmons wrote:
>
> Hi Bin,
>
> Bin Meng writes:
>
> [...]
>
> > On Fri, Sep 6, 2019 at 7:52 PM Thomas Fitzsimmons
> > wrote:
> >>
> >> For CONFIG_OF_PRIOR_STAGE, in the absence of a device tree alias for a
> >> given device, use the next request number
On Fri, 6 Sep 2019 at 16:08, Kayla Theil wrote:
>
> The reset function sets the pin to 0 then 1 but if the pin is marked
> ACTIVE_LOW in the DT it gets inverted and leaves the TPM in reset.
> Let the gpio driver take care of the reset polarity.
>
> Signed-off-by: Kayla Theil
> ---
>
On Tue, 24 Sep 2019 at 02:32, Philippe Reynes
wrote:
>
> This commit enable the command aes on sandbox.
> Then, it may be used on pytest.
>
> Signed-off-by: Philippe Reynes
> ---
> configs/sandbox_defconfig | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Simon Glass
Applied to
On Thu, 5 Sep 2019 at 01:49, wrote:
>
> From: Matthias Brugger
>
> Default address cells value on the livetree access function
> returns the wrong value. Fix this so that the value returned
> corresponds to the device tree specification.
>
> Signed-off-by: Matthias Brugger
> ---
>
>
On Wed, 18 Sep 2019 at 08:05, Philippe Reynes
wrote:
>
> From: Daniele Alessandrelli
>
> Currently, if image verification with a required key fails, rsa_verify()
> code tries to find another key to verify the FIT image. This however, is
> not the intended behavior as the documentation says that
On Tue, 17 Sep 2019 at 13:06, Michael Trimarchi
wrote:
>
> Skip not associated gpio phandle let register the other gpios on a group.
> We need anyway to send out a warning to the user to fix their
> uboot-board.dtsi.
> Thhe handle id can be found inside the decompiled dtb
>
> dtc -I dtb -O dts
On Wed, 18 Sep 2019 at 08:22, Giulio Benetti
wrote:
>
> Signed-off-by: Giulio Benetti
> ---
> scripts/dtc/libfdt/libfdt.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Simon Glass
Applied to u-boot-dm/next, thanks!
___
On Tue, 24 Sep 2019 at 02:32, Philippe Reynes
wrote:
>
> This commit add the support of command aes.
> Then, it may be used on pytest.
>
> Signed-off-by: Philippe Reynes
> ---
> configs/sandbox64_defconfig | 1 +
> 1 file changed, 1 insertion(+)
>
Reviewed-by: Simon Glass
You could add this
On Tue, 24 Sep 2019 at 02:32, Philippe Reynes
wrote:
>
> The aes command used to segfault when accessing memory in sandbox.
> The pointer accesses should be mapped.
>
> Signed-off-by: Philippe Reynes
> ---
> cmd/aes.c | 14 ++
> 1 file changed, 10 insertions(+), 4 deletions(-)
On 2019-09-27, Heinrich Schuchardt wrote:
> On 9/27/19 6:36 PM, Peter Robinson wrote:
>>> I'm currently kicking test.py to use Python 3 instead of Python 2.7 and
>>> seeing places where it would (seemingly) be nice to be able to say that
>>> we have Python 3.6 as our minimum version. To do this
Hi,
On Fri, Sep 06, 2019 at 09:53:33AM +0200, Clément Péron wrote:
> Hi,
>
> On Sun, 25 Aug 2019 at 18:04, Clément Péron wrote:
> >
> > Sync Kernel DTS for Allwinner H6 boards.
>
> This sync avoid the random mac on the beelink GS1.
>
> Could you check if it's ok for you ?
Acked-by: Maxime
On 9/27/19 6:36 PM, Peter Robinson wrote:
>>
>> I'm currently kicking test.py to use Python 3 instead of Python 2.7 and
>> seeing places where it would (seemingly) be nice to be able to say that
>> we have Python 3.6 as our minimum version. To do this however we'll
>> have to tell people using
From: Dalon Westergreen
CONFIG_OF_EMBED was primarily enabled to support the stratix10
spl hex file requirements. Since this option now produces a
warning during build, and the spl hex can be created using
alternate methods, CONFIG_OF_EMBED is no longer needed.
Signed-off-by: Dalon Westergreen
From: Dalon Westergreen
Stratix10 requires a hex image of the spl plus spl devicetree offset to
the Stratix10 onchip memory located at SPL_TEXT_BASE. This patch adds
a target to generate a hex file from the u-boot-spl binary including the
dtb offset at SPL_TEST_BASE.
Objcopy is used to convert
On 27.09.19 18:11, Stephen Warren wrote:
On 9/27/19 9:22 AM, Alexander Graf wrote:
On 27.09.19 17:01, Stephen Warren wrote:
On 9/27/19 3:00 AM, matthias@kernel.org wrote:
From: Matthias Brugger
We move the per SOC define BCM283x_BASE to a global variable.
This is a first step to
>
> I'm currently kicking test.py to use Python 3 instead of Python 2.7 and
> seeing places where it would (seemingly) be nice to be able to say that
> we have Python 3.6 as our minimum version. To do this however we'll
> have to tell people using older LTS distributions that they need to
>
imx: update i.MX8MQ clocks
I would like to add support for additional drivers, and for that
it makes sense to update the clock headers first, before adding
a node to the device tree. Since no drivers use them so far it's
easy to just update the header and adjust the device tree.
Signed-off-by:
Hi,
On Thu, Sep 26, 2019 at 6:50 PM Simon Glass wrote:
>
> Hi Doug,
>
> On Tue, 3 Sep 2019 at 13:15, Douglas Anderson wrote:
> >
> > As per the centithread on ksummit-discuss [1], there are folks who
> > feel that if a Change-Id is present in a developer's local commit that
> > said Change-Id
As per the centithread on ksummit-discuss [1], there are folks who
feel that if a Change-Id is present in a developer's local commit that
said Change-Id could be interesting to include in upstream posts.
Specifically if two commits are posted with the same Change-Id there's
a reasonable chance
AM43xx-IDK boards contain the CDCE913 clock synthesizer, and their
reset crystal capacitance load value of 10pF is wrong leading into
lost packets in certain networking tests. Add DT data for this
device, and probe it from the board file to program the crystal
capacitance load value to 0pF to
AM57xx-IDK boards contain the CDCE913 clock synthesizer, and their
reset crystal capacitance load value of 10pF is wrong leading into
lost packets in certain networking tests. Add DT data for this
device, and probe it from the board file to program the crystal
capacitance load value to 0pF to
AM335x-ICE boards contain the CDCE913 clock synthesizer, and their
reset crystal capacitance load value of 10pF is wrong leading into
lost packets in certain networking tests. Add DT data for this
device, and probe it from the board file to program the crystal
capacitance load value to 0pF to
Add support for CDCE913/925/937/949 family of devices. These are modular
PLL-based low cost, high performance, programmable clock synthesizers,
multipliers and dividers. They generate up to 9 output clocks from a
single input frequency. The initial version of the driver does not
support
Hi,
This series adds basic support for TI cdce9xx clock synthesizers.
The code is loosely based on linux side driver for the same, the DT
binding is pretty much directly copied over from there.
This is needed initially just for setting up the crystal capacitance
value for the TI IDK board
On 9/27/19 9:22 AM, Alexander Graf wrote:
On 27.09.19 17:01, Stephen Warren wrote:
On 9/27/19 3:00 AM, matthias@kernel.org wrote:
From: Matthias Brugger
We move the per SOC define BCM283x_BASE to a global variable.
This is a first step to provide a single binary for several bcm283x
Hey all,
I'm currently kicking test.py to use Python 3 instead of Python 2.7 and
seeing places where it would (seemingly) be nice to be able to say that
we have Python 3.6 as our minimum version. To do this however we'll
have to tell people using older LTS distributions that they need to
figure
On 27.09.19 17:01, Stephen Warren wrote:
On 9/27/19 3:00 AM, matthias@kernel.org wrote:
From: Matthias Brugger
We move the per SOC define BCM283x_BASE to a global variable.
This is a first step to provide a single binary for several bcm283x
SoCs.
How will this work, given that the
On 9/27/19 3:00 AM, matthias@kernel.org wrote:
From: Matthias Brugger
We move the per SOC define BCM283x_BASE to a global variable.
This is a first step to provide a single binary for several bcm283x
SoCs.
How will this work, given that the memory layout is hard-coded into the
the DTB?
Hi Stefano and Fabio,
On 9/11/19 8:50 AM, Stefano Babic wrote:
Hi Giulio,
On 10/09/19 20:32, Giulio Benetti wrote:
Hello everybody,
I would like to port imxrt to u-boot and I would like to ask you:
- do you have the interest on upstreaming it?
if yes:
I've seen how they've dealt with 'stm32'
On 9/27/19 10:43 AM, Hao Liu wrote:
> Dear Marcel:I generate the patch using command of git format-patch. Then
> I send the patch to you using commant of git send-email.But the smstp
> times out.
If SMTP does not work, please, check your .gitconfig file. I guess for
your account you will need
With new mailbox driver PMUFW configuration object can be loaded via the
same interface and there is no need to have pmu_ipc.c completely.
Signed-off-by: Michal Simek
---
arch/arm/mach-zynqmp/Makefile | 4 -
arch/arm/mach-zynqmp/include/mach/sys_proto.h | 2 -
U-Boot running in EL3 can't use SMC that's why there is a need to talk to
PMUFW directly via mailbox. The same logic is applied to all functions
which need to talk to PMUFW that's why move this logic to separate function
to avoid code duplication.
Also SMC request ID can be composed from
From: Ibai Erkiaga
Removes the old function to get the firmware version.
Signed-off-by: Ibai Erkiaga
Signed-off-by: Michal Simek
---
arch/arm/mach-zynqmp/cpu.c| 23 ---
arch/arm/mach-zynqmp/include/mach/sys_proto.h | 1 -
2 files changed, 24 deletions(-)
From: Ibai Erkiaga
New firmware header to place firmware specific macro and function
declarations. The patch also moves the macros defining PM operations as
well as some helper macros.
Signed-off-by: Ibai Erkiaga
Signed-off-by: Michal Simek
---
MAINTAINERS
From: Ibai Erkiaga
Probe ZynqMP firmware driver on the board initialization phase and
ensure that firmware is in place to continue execution. The probing is
done on board_init so it can be used for both SPL and U-Boot proper.
Signed-off-by: Ibai Erkiaga
Signed-off-by: Michal Simek
---
Cleanup PM ID handling by using enum values.
Signed-off-by: Michal Simek
Signed-off-by: Ibai Erkiaga
---
arch/arm/mach-zynqmp/include/mach/sys_proto.h | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-zynqmp/include/mach/sys_proto.h
From: Ibai Erkiaga
The following patch allows the mailbox node in DT to host subnodes with
mailbox definitions. If the client phandle to the mailbox is not the
mailbox driver node, just checks parents as well.
Signed-off-by: Ibai Erkiaga
Signed-off-by: Michal Simek
---
From: Ibai Erkiaga
ZynqMP mailbox driver implementing IPI communication with PMU. This would
allow U-Boot SPL to communicate with PMUFW to request privileged
operations.
Signed-off-by: Ibai Erkiaga
Signed-off-by: Michal Simek
---
MAINTAINERS | 1 +
From: Ibai Erkiaga
zynqmp-power driver for ZynqMP to handle the communication with the PMU
firmware. Firmware driver just probes subnodes and power driver handles
communication with PMU using the IPI mailbox driver.
Signed-off-by: Ibai Erkiaga
Signed-off-by: Michal Simek
---
From: Ibai Erkiaga
Implements the function to get PMU Firmware version using the mailbox
driver or smc call based on if running SPL or not. Additionally gets
version as part of the ZynqMP Firmware driver probing
Signed-off-by: Ibai Erkiaga
Signed-off-by: Michal Simek
---
From: Ibai Erkiaga
Use the new function from firmware version to get the firmware version.
Signed-off-by: Ibai Erkiaga
Signed-off-by: Michal Simek
---
board/xilinx/zynqmp/zynqmp.c | 2 +-
drivers/fpga/zynqmppl.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git
From: Ibai Erkiaga
The following patch adds a mailbox node and firmware node to following the
mainline DT.
Signed-off-by: Ibai Erkiaga
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp.dtsi | 44 +++-
1 file changed, 39 insertions(+), 5 deletions(-)
From: Ibai Erkiaga
Check if request and free operations are present prior calling to the
functions.
Signed-off-by: Ibai Erkiaga
Signed-off-by: Michal Simek
---
drivers/mailbox/mailbox-uclass.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git
Hi,
This patch series using ZynqMP firmware driver to provide a interface to
communicate with the PMU Firmware. As part of the series a mailbox driver
is also implemented to handle communication through ipi interface.
There are two new wiring:
1. Reading PMUFW version via firmware driver
-
Some linux drivers provide their own read/write functions to access data
from/of the regmap. Adding support for it.
Signed-off-by: Jean-Jacques Hiblot
---
drivers/core/regmap.c | 12
include/regmap.h | 26 +++---
2 files changed, 35 insertions(+), 3
The tests rely on a dummy driver to allocate and initialize the regmap
and the regmap fields using the managed API.
The first test checks that the read/write callbacks are used.
The second test checks if regmap fields behave properly (mask and shift
are ok) by peeking into the regmap.
A regmap field is an abstraction available in Linux. It provides to access
bitfields in a regmap without having to worry about shifts and masks.
Signed-off-by: Jean-Jacques Hiblot
---
drivers/core/regmap.c | 77 ++
include/regmap.h | 108
Most of new linux drivers are using managed-API to allocate resources. To
ease porting drivers from linux to u-boot, introduce devm_regmap_init() as
a managed API to get a regmap from the device tree.
Signed-off-by: Jean-Jacques Hiblot
---
drivers/core/regmap.c | 26 ++
This is the first of a few series, the goal of which is to facilitate
porting drivers from the linux kernel. Most of the series will be about
adding managed API to existing infrastructure (GPIO, reset, phy,...)
This particular series is about regmaps. It adds the managed API, using
the same API
Mask the value to write so that it cannot affect the bits outside of the
mask
Signed-off-by: Jean-Jacques Hiblot
---
drivers/core/regmap.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index d1d12eef38..e9e55c9d16 100644
---
On Fri, Sep 27, 2019 at 7:53 AM Stefano Babic wrote:
>
> On 27/09/19 14:32, Adam Ford wrote:
> > On Fri, Sep 27, 2019 at 7:31 AM Fabio Estevam wrote:
> >>
> >> On Fri, Sep 27, 2019 at 9:17 AM Adam Ford wrote:
> >>
> >>> It's been over a month. Is there any reason this cannot be applied?
> >>
>
From: Tudor Ambarus
Cope with the offsets defined at:
https://www.at91.com/linux4sam/pub/Linux4SAM/SambaSubsections/demo_nandflash_map_lnx4sam6x.png
The environment starts at 0x14 and it's of size 0x2.
The device tree starts at 0x18 and it's of size 0x8.
The zImage starts at
From: Tudor Ambarus
The sam9x60 qspi controller uses 2 clocks, one for the peripheral register
access, the other for the qspi core and phy. Both are mandatory.
Enable the qspi node together with the SST26VF064B qspi nor flash
memory. Booting from the QSPI NOR flash is now possible.
From: Sandeep Sheriker Mallikarjun
add device tree files for sam9x60ek board with below changes.
- Add initial device nodes (pmc, pinctrl, sdhc, dbgu & pit)
- Add the reg property for the pinctrl node.
- Add the "u-boot,dm-pre-reloc" property to determine which nodes
are used by the
From: Tudor Ambarus
Boot from nand flash.
Signed-off-by: Tudor Ambarus
---
board/atmel/sam9x60ek/MAINTAINERS | 1 +
configs/sam9x60ek_nandflash_defconfig | 53 +++
2 files changed, 54 insertions(+)
create mode 100644 configs/sam9x60ek_nandflash_defconfig
From: Tudor Ambarus
Boot from QSPI nor flash.
The at91bootstrap, u-boot, u-boot env redundant, u-boot env,
device tree and kernel will reside in the QSPI nor flash.
The rootfs will reside in the NAND flash.
Signed-off-by: Tudor Ambarus
---
board/atmel/sam9x60ek/MAINTAINERS | 1 +
From: Nicolas Ferre
Add Ethernet controller to dtsi file and enable it on sam9x60ek
platform connected with rmii.
Signed-off-by: Nicolas Ferre
---
arch/arm/dts/sam9x60.dtsi | 31 +++
arch/arm/dts/sam9x60ek.dts | 5 +
2 files changed, 36 insertions(+)
diff
From: Tudor Ambarus
The Special Function Registers (SFR) are present in sam9x5 and
sam9x60 too, rename sama5_sfr to at91_sfr.h.
Signed-off-by: Tudor Ambarus
---
arch/arm/mach-at91/armv7/sama5d4_devices.c | 2 +-
arch/arm/mach-at91/atmel_sfr.c | 2
From: Tudor Ambarus
- EBI Chip Select Register is now in SFR,
- the pins are set to default values,
- timings are matching MT29F4G08BABWP's nand flash requirements.
Signed-off-by: Tudor Ambarus
---
board/atmel/sam9x60ek/sam9x60ek.c | 61 +++
From: Nicolas Ferre
Add this new compatibility string for matching sam9x60 product
macb.
Signed-off-by: Nicolas Ferre
---
drivers/net/macb.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index c99cf663a416..e0f7b2350b20 100644
---
From: Sandeep Sheriker Mallikarjun
Add new Microchip sam9x60 SoC based on an ARM926.
Signed-off-by: Sandeep Sheriker Mallikarjun
[tudor.amba...@microchip.com: fix SFR definition]
Signed-off-by: Tudor Ambarus
---
arch/arm/mach-at91/Kconfig | 4 +
From: Tudor Ambarus
sama5's SFR has at offset 0x04 the DDR Configuration Register,
while sam9x60's SFR contains the EBI Chip Select Register. Add
a union to reconcile both boards.
Signed-off-by: Tudor Ambarus
---
arch/arm/mach-at91/include/mach/at91_sfr.h | 48 --
From: Sandeep Sheriker Mallikarjun
add sam9x60ek_mmc_defconfig and for now only supports booting from
sdcard.
Signed-off-by: Sandeep Sheriker Mallikarjun
Signed-off-by: Nicolas Ferre
[nicolas.fe...@microchip.com: split patch, add Ethernet controller,
phy and tools]
From: Sandeep Sheriker Mallikarjun
Add new compatibility string for matching sam9x60 product.
Signed-off-by: Sandeep Sheriker Mallikarjun
---
drivers/mmc/atmel_sdhci.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mmc/atmel_sdhci.c b/drivers/mmc/atmel_sdhci.c
index
From: Sandeep Sheriker Mallikarjun
Add new board SAM9X60-EK using the ARM926 SAM9X60 SoC.
Signed-off-by: Sandeep Sheriker Mallikarjun
[tudor.amba...@microchip.com:
- fix number of DRAM banks:
One DDR2-SDRAM (W972GG6KB 2 Gbit = 16 Mbit x 16 x 8 banks]
- drop SPL related macros
- drop memtest
From: Tudor Ambarus
Add support for sam9x60 SOC, sam9x60ek board, dts, NAND and QSPI.
Add defconfigs for MMC, NAND and QSPI.
v3:
- Enable MII utility commands and phy in qspi & nand defconfigs
- Add sam9x60-sdhci and sam9x60-macb compatibility strings
- nandflash_defconfig: Fix rootfs partition
On 27/09/19 14:32, Adam Ford wrote:
> On Fri, Sep 27, 2019 at 7:31 AM Fabio Estevam wrote:
>>
>> On Fri, Sep 27, 2019 at 9:17 AM Adam Ford wrote:
>>
>>> It's been over a month. Is there any reason this cannot be applied?
>>
>> It has been applied in Stefano's tree:
>>
On Fri, Sep 27, 2019 at 7:31 AM Fabio Estevam wrote:
>
> On Fri, Sep 27, 2019 at 9:17 AM Adam Ford wrote:
>
> > It's been over a month. Is there any reason this cannot be applied?
>
> It has been applied in Stefano's tree:
>
On Fri, Sep 27, 2019 at 9:17 AM Adam Ford wrote:
> It's been over a month. Is there any reason this cannot be applied?
It has been applied in Stefano's tree:
https://gitlab.denx.de/u-boot/custodians/u-boot-imx/commit/90fb571d61a8967f5e56c5b03db5e44889325bde
On Mon, Aug 26, 2019 at 8:00 AM Adam Ford wrote:
>
> On Thu, Aug 8, 2019 at 1:36 PM Adam Ford wrote:
> >
> > On Thu, Aug 8, 2019 at 1:14 PM Robert Hancock wrote:
> > >
> > > Previously the SPL size on all iMX6 platforms was restricted to 68KB
> > > because the OCRAM size on iMX6SL/DL parts is
On 27/09/2019 12:12, Alexander Graf wrote:
>
> On 27.09.19 11:00, matthias@kernel.org wrote:
>> From: Matthias Brugger
>>
>> As part of the effort to create one binary for several bcm83x SoCs
>> we use the SoC compatible to decide which IO base address we use.
>>
>> Signed-off-by: Matthias
On Fri, Sep 27, 2019 at 4:38 AM Jonathan Gray wrote:
>
> On Thu, Sep 26, 2019 at 05:07:21PM -0300, Fabio Estevam wrote:
> > Hi Vagrant,
> >
> > On Thu, Sep 26, 2019 at 4:16 PM Vagrant Cascadian
> > wrote:
> > >
> > > I just tested mx6cuboxi with 2019.10-rc4, and it fails to load
> > >
Hi Matthias,
>> My dream is to be able to compile a single u-boot.bin compiled as armv8-a
>> and be
>> able to boot any Raspberry PI 3/4 to grub2 from it. Is this realistic?
>>
>
> Yes it is. I was working on this the last weeks and just posted the patches
> today. Would be nice if you could
Hi Geoff,
On 27/09/2019 04:16, Geoff Williams wrote:
> Hi List,
>
> TLDR: As subject
>
> I've been following Alexander Graf's uEFI+grub2 presentation on Raspberry
> PI[1].
> I have it working on PI 3 and 4 and its great but I need to re-compile u-boot
> for each board which means lots of
On 27/09/2019 03:48, Simon Glass wrote:
> On Tue, 17 Sep 2019 at 09:52, Simon Glass wrote:
>>
>> Hi Matthias,
>>
>> On Tue, 17 Sep 2019 at 00:29, Matthias Brugger wrote:
>>>
>>> Hi Simon,
>>>
>>> On 17/09/2019 07:48, Simon Glass wrote:
Hi,
On Thu, 5 Sep 2019 at 02:49, wrote:
Hi Miquel
> From: Miquel Raynal
> Sent: jeudi 26 septembre 2019 11:43
>
> Hi Patrick,
>
> Patrick DELAUNAY wrote on Thu, 26 Sep 2019
> 09:31:46 +:
>
> > Hi Stefan,
> >
> > > From: Stefan Roese
> > > Sent: vendredi 20 septembre 2019 11:20
> > >
> > > Hi Patrick,
> > >
> > > On 20.09.19
On Thu, Sep 26, 2019 at 07:23:21PM +0200, Heinrich Schuchardt wrote:
> The following changes since commit 31e086e460fb5de6dd42559babdc1e027ed2fe96:
>
> Prepare v2019.10-rc4 (2019-09-23 12:24:39 -0400)
>
> are available in the Git repository at:
>
>
Dear Marcel:I generate the patch using command of git format-patch. Then I
send the patch to you using commant of git send-email.But the smstp times
out. So I send the email to you using App. I know that this way is not
professional. Now I will go to https://www.denx.de/wiki/U-Boot/Patches,
Dear Maintainers:
My name is Hao Liu, a software engineer from Phytium Technology Co., Ltd.
We need to submit the phytium platform to the uboot Home.
I hope that the Maintainers can approve with me.
This soc is ft2004, and now this patch only support uart, pcie, usb, and gmac.
I know that this
The bcm283x PL011 serial driver is hard coded to allow connections only
for UART0. This prevents using any of the other UARTs as the U-boot
console.
The bcm283x serial driver is updated to allow connections to any of the
PL011 devices. The initialization logic has been updated as follows:
On 12/09/2019 11.17, Rasmus Villemoes wrote:
> While trying to implement an mxs_set_gpmiclk() I stumbled on a few minor
> things.
>
> Rasmus Villemoes (4):
> arm: mxs: fix register definitions for clkctrl_gpmi and clkctrl_sspX
> arm: mxs: fix comments in arch_cpu_init to match the code
>
Hi List,
TLDR: As subject
I've been following Alexander Graf's uEFI+grub2 presentation on Raspberry PI[1].
I have it working on PI 3 and 4 and its great but I need to re-compile u-boot
for each board which means lots of images.
I would like create a single image to boot grub on PI 3 and 4.
I
On 27.09.19 11:00, matthias@kernel.org wrote:
From: Matthias Brugger
For bcm283x based on arm64 we also have to change the mm_region.
Add assign this in mach_cpu_init() so we can create now one binary
for RPi3 and RPi4.
Signed-off-by: Matthias Brugger
---
On 27.09.19 11:00, matthias@kernel.org wrote:
From: Matthias Brugger
As part of the effort to create one binary for several bcm83x SoCs
we use the SoC compatible to decide which IO base address we use.
Signed-off-by: Matthias Brugger
---
arch/arm/mach-bcm283x/Kconfig | 6
On 27.09.19 11:00, matthias@kernel.org wrote:
From: Matthias Brugger
We move the per SOC define BCM283x_BASE to a global variable.
This is a first step to provide a single binary for several bcm283x
SoCs.
Signed-off-by: Matthias Brugger
---
arch/arm/mach-bcm283x/include/mach/base.h
On Thu, Sep 26, 2019 at 05:07:21PM -0300, Fabio Estevam wrote:
> Hi Vagrant,
>
> On Thu, Sep 26, 2019 at 4:16 PM Vagrant Cascadian wrote:
> >
> > I just tested mx6cuboxi with 2019.10-rc4, and it fails to load
> > u-boot.img from MMC:
> >
> > 1 2019-09-26_17:31:27.63089 U-Boot SPL
From: Matthias Brugger
For bcm283x based on arm64 we also have to change the mm_region.
Add assign this in mach_cpu_init() so we can create now one binary
for RPi3 and RPi4.
Signed-off-by: Matthias Brugger
---
arch/arm/mach-bcm283x/init.c | 65 +--
From: Matthias Brugger
As part of the effort to create one binary for several bcm83x SoCs
we use the SoC compatible to decide which IO base address we use.
Signed-off-by: Matthias Brugger
---
arch/arm/mach-bcm283x/Kconfig | 6
arch/arm/mach-bcm283x/init.c | 60
From: Matthias Brugger
We move the per SOC define BCM283x_BASE to a global variable.
This is a first step to provide a single binary for several bcm283x
SoCs.
Signed-off-by: Matthias Brugger
---
arch/arm/mach-bcm283x/include/mach/base.h | 11 +++
From: Matthias Brugger
In this series we prepare the RaspberryPi source code
to be able to build one binary for RPi[3,4] and one for RPi[1,2].
To achieve this we need to set the IO base address on runtime. Apart
from that, for arm64 we also need to set memory region correctly.
This patches fix
Hi Suneel,
On 04/09/2019 08:03, Suneel Garapati wrote:
> Hi Matthias,
>
> Thank you for your concern. I picked up things last week. So will post
> by this weekend.
> Apologies for the delay.
Any update on this? It's a long time since you said you want to provide the
patches, is there anything I
Dear Hao Liu
On Fri, 2019-09-27 at 16:23 +0800, Hao Liu wrote:
> Dear Maintainers:
> My name is Hao Liu, a software engineer from Phytium Technology Co.,
> Ltd.
> We need to submit the phytium platform to the uboot Home.
> I hope that the Maintainers can approve with me.
> This soc is ft2004,
On 27/09/19 7:18 AM, Simon Glass wrote:
> Hi Anatolij,
>
> On Thu, 1 Aug 2019 at 00:44, Anatolij Gustschin wrote:
>>
>> Hi Lokesh,
>>
>> On Thu, 1 Aug 2019 09:43:39 +0530
>> Lokesh Vutla lokeshvu...@ti.com wrote:
>>
>>> On 01/08/19 2:55 AM, Anatolij Gustschin wrote:
The power domain
Enable DM_FLAG_DEFAULT_PD_CTRL_OFF for arm64 remote core so that
pd can be enabled after loading the image.
Signed-off-by: Lokesh Vutla
---
drivers/remoteproc/ti_k3_arm64_rproc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/remoteproc/ti_k3_arm64_rproc.c
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