Re: [U-Boot] [PATCH 0/9] phy: atheros: cleanup and device tree bindings

[Adam Ford]

On Fri, Oct 25, 2019 at 10:20 PM Adam Ford  wrote:
>
> On Fri, Oct 25, 2019 at 7:27 PM Michael Walle  wrote:
> >
> > This series cleans up the Atheros PHY AR803x PHY driver and adds a
> > device tree binding for the most commonly used PHY settings like clock
> > output.
> >
> > If you're a board maintainer you're getting this mail because you probably
> > use an AR803x PHY on your board. Please have a look at your board specific
> > code and see if you can use the device tree bindings instead. Let me know,
> > if something is missing.
>
> Thank you for this!
>
> I was able to remove board_phy_config and the supporting
> ar8031_phy_fixup functions to a total of nearly 30 lines of code.

Please disregard my comment.  From a cold boot, I cannot remove these lines.

adam
>
> For the whole series...
> Tested-by: Adam Ford   # imx6q_logic

> >
> > Michael Walle (9):
> >   phy: atheros: introduce debug read and write functions
> >   phy: atheros: move delay config to common function
> >   phy: atheros: ar8035: remove extra delay config
> >   phy: atheros: ar8035: use phy_{read|write}_mmd()
> >   phy: atheros: don't overwrite debug register values
> >   phy: atheros: fix delay configuration
> >   phy: atheros: Add device tree bindings and config
> >   phy: atheros: ar8035: remove static clock config
> >   phy: atheros: consolidate {ar8031|ar8035}_config()
> >
> >  doc/device-tree-bindings/net/phy/atheros.txt |  22 ++
> >  drivers/net/phy/atheros.c| 262 +++
> >  2 files changed, 240 insertions(+), 44 deletions(-)
> >  create mode 100644 doc/device-tree-bindings/net/phy/atheros.txt
> >
> > Cc: Joe Hershberger 
> > Cc: Fabio Estevam 
> > Cc: Adam Ford 
> > Cc: Otavio Salvador 
> > Cc: Ian Ray 
> > Cc: Jason Liu 
> > Cc: Ye Li 
> > Cc: Uri Mashiach 
> > Cc: Nikita Kiryanov 
> > Cc: Lukasz Majewski 
> > Cc: Fabio Estevam 
> > Cc: Vanessa Maegima 
> > Cc: Eric Bénard 
> > --
> > 2.20.1
> >
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Re: [U-Boot] [PATCH 0/9] phy: atheros: cleanup and device tree bindings

[Adam Ford]

On Fri, Oct 25, 2019 at 7:27 PM Michael Walle  wrote:
>
> This series cleans up the Atheros PHY AR803x PHY driver and adds a
> device tree binding for the most commonly used PHY settings like clock
> output.
>
> If you're a board maintainer you're getting this mail because you probably
> use an AR803x PHY on your board. Please have a look at your board specific
> code and see if you can use the device tree bindings instead. Let me know,
> if something is missing.

Thank you for this!

I was able to remove board_phy_config and the supporting
ar8031_phy_fixup functions to a total of nearly 30 lines of code.

For the whole series...
Tested-by: Adam Ford   # imx6q_logic
>
> Michael Walle (9):
>   phy: atheros: introduce debug read and write functions
>   phy: atheros: move delay config to common function
>   phy: atheros: ar8035: remove extra delay config
>   phy: atheros: ar8035: use phy_{read|write}_mmd()
>   phy: atheros: don't overwrite debug register values
>   phy: atheros: fix delay configuration
>   phy: atheros: Add device tree bindings and config
>   phy: atheros: ar8035: remove static clock config
>   phy: atheros: consolidate {ar8031|ar8035}_config()
>
>  doc/device-tree-bindings/net/phy/atheros.txt |  22 ++
>  drivers/net/phy/atheros.c| 262 +++
>  2 files changed, 240 insertions(+), 44 deletions(-)
>  create mode 100644 doc/device-tree-bindings/net/phy/atheros.txt
>
> Cc: Joe Hershberger 
> Cc: Fabio Estevam 
> Cc: Adam Ford 
> Cc: Otavio Salvador 
> Cc: Ian Ray 
> Cc: Jason Liu 
> Cc: Ye Li 
> Cc: Uri Mashiach 
> Cc: Nikita Kiryanov 
> Cc: Lukasz Majewski 
> Cc: Fabio Estevam 
> Cc: Vanessa Maegima 
> Cc: Eric Bénard 
> --
> 2.20.1
>
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[U-Boot] [PATCH 2/2] drivers: net: fsl_enetc: fix RGMII configuration

[Michael Walle]

Add the missing RGMII PHY modes in which case the MAC has configure its
RGMII settings. The only difference between these modes is the RX and
TX delay configuration. A user might choose any RGMII mode in the device
tree.

Signed-off-by: Michael Walle 
---
 drivers/net/fsl_enetc.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/net/fsl_enetc.c b/drivers/net/fsl_enetc.c
index 86b80c8941..0ca7e838a8 100644
--- a/drivers/net/fsl_enetc.c
+++ b/drivers/net/fsl_enetc.c
@@ -191,6 +191,9 @@ static void enetc_start_pcs(struct udevice *dev)
enetc_init_sgmii(dev);
break;
case PHY_INTERFACE_MODE_RGMII:
+   case PHY_INTERFACE_MODE_RGMII_ID:
+   case PHY_INTERFACE_MODE_RGMII_RXID:
+   case PHY_INTERFACE_MODE_RGMII_TXID:
enetc_init_rgmii(dev);
break;
case PHY_INTERFACE_MODE_XGMII:
-- 
2.20.1

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[U-Boot] [PATCH 1/2] drivers: net: fsl_enetc: set phydev->node

[Michael Walle]

The saved ofnode is used by some PHY drivers to access the device tree
node of the PHY.

Signed-off-by: Michael Walle 
---
 drivers/net/fsl_enetc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/fsl_enetc.c b/drivers/net/fsl_enetc.c
index e7c5062c39..86b80c8941 100644
--- a/drivers/net/fsl_enetc.c
+++ b/drivers/net/fsl_enetc.c
@@ -248,6 +248,7 @@ static void enetc_start_phy(struct udevice *dev)
 
supported = GENMASK(6, 0); /* speeds up to 1G & AN */
phy->advertising = phy->supported & supported;
+   phy->node = phy_node;
phy_config(phy);
phy_startup(phy);
 }
-- 
2.20.1

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[U-Boot] [PATCH 5/9] phy: atheros: don't overwrite debug register values

[Michael Walle]

Instead of doing a hard write, do a read-modify-write.

Signed-off-by: Michael Walle 
---
 drivers/net/phy/atheros.c | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c
index 113374f03f..4b7a1fb9c4 100644
--- a/drivers/net/phy/atheros.c
+++ b/drivers/net/phy/atheros.c
@@ -12,10 +12,10 @@
 #define AR803x_PHY_DEBUG_DATA_REG  0x1e
 
 #define AR803x_DEBUG_REG_5 0x5
-#define AR803x_RGMII_TX_CLK_DLY0x100
+#define AR803x_RGMII_TX_CLK_DLYBIT(8)
 
 #define AR803x_DEBUG_REG_0 0x0
-#define AR803x_RGMII_RX_CLK_DLY0x8000
+#define AR803x_RGMII_RX_CLK_DLYBIT(15)
 
 static int ar803x_debug_reg_read(struct phy_device *phydev, u16 reg)
 {
@@ -74,16 +74,16 @@ static int ar803x_delay_config(struct phy_device *phydev)
 
if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID ||
phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
-   ret = ar803x_debug_reg_write(phydev, AR803x_DEBUG_REG_5,
-AR803x_RGMII_TX_CLK_DLY);
+   ret = ar803x_debug_reg_mask(phydev, AR803x_DEBUG_REG_5,
+   0, AR803x_RGMII_TX_CLK_DLY);
if (ret < 0)
return ret;
}
 
if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID ||
phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
-   ret = ar803x_debug_reg_write(phydev, AR803x_DEBUG_REG_0,
-AR803x_RGMII_RX_CLK_DLY);
+   ret = ar803x_debug_reg_mask(phydev, AR803x_DEBUG_REG_0,
+   0, AR803x_RGMII_RX_CLK_DLY);
if (ret < 0)
return ret;
}
-- 
2.20.1

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[U-Boot] [PATCH 3/9] phy: atheros: ar8035: remove extra delay config

[Michael Walle]

Remove the hard-coded delay configuration. The AR8035 config() always
enabled the TX delay mode, although it will be set according to the PHY
interface mode, too.

If bisecting shows that this commit breaks your board you probably have
a wrong PHY interface mode. You probably want the
PHY_INTERFACE_MODE_RGMII_TXID or PHY_INTERFACE_MODE_RGMII_ID mode.

Signed-off-by: Michael Walle 
---
 drivers/net/phy/atheros.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c
index 402998c8d5..629c6b192a 100644
--- a/drivers/net/phy/atheros.c
+++ b/drivers/net/phy/atheros.c
@@ -118,9 +118,6 @@ static int ar8035_config(struct phy_device *phydev)
regval = phy_read(phydev, MDIO_DEVAD_NONE, 0xe);
phy_write(phydev, MDIO_DEVAD_NONE, 0xe, (regval|0x0018));
 
-   ar803x_debug_reg_mask(phydev, AR803x_DEBUG_REG_5,
- 0, AR803x_RGMII_TX_CLK_DLY);
-
ret = ar803x_delay_config(phydev);
if (ret < 0)
return ret;
-- 
2.20.1

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[U-Boot] [PATCH 8/9] phy: atheros: ar8035: remove static clock config

[Michael Walle]

We can configure the clock output in the device tree. Disable the
hardcoded one in here. This is highly board-specific and should have
never been enabled in the PHY driver.

If bisecting shows that this commit breaks your board it probably
depends on the clock output of your Atheros AR8035 PHY. Please have a
look at doc/device-tree-bindings/net/phy/atheros.txt. You need to set
"clk-out-frequency = <12500>" because that value was the hardcoded
value until this commit.

Signed-off-by: Michael Walle 
---
 drivers/net/phy/atheros.c | 6 --
 1 file changed, 6 deletions(-)

diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c
index 1c8c9b4e75..91fcbf912a 100644
--- a/drivers/net/phy/atheros.c
+++ b/drivers/net/phy/atheros.c
@@ -273,12 +273,6 @@ static int ar8035_config(struct phy_device *phydev)
if (ret < 0)
return ret;
 
-   ret = phy_read_mmd(phydev, 7, 0x8016);
-   if (ret < 0)
-   return ret;
-   ret |= 0x0018;
-   phy_write_mmd(phydev, 7, 0x8016, ret);
-
ret = ar803x_delay_config(phydev);
if (ret < 0)
return ret;
-- 
2.20.1

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[U-Boot] [PATCH 6/9] phy: atheros: fix delay configuration

[Michael Walle]

The delay_config() code could only set the delay bit. Thus, it could
only enable the delay mode, but not disable it. To make things worse,
the RX delay mode is enabled by default after a hardware reset, so it
could never be disabled. Fix this, by always setting or clearing the
bits. This is also how the linux kernel configures the PHY.

If bisecting shows that this commit breaks your board you probably have
a wrong PHY interface mode. You probably want the
PHY_INTERFACE_MODE_RGMII_RXID or PHY_INTERFACE_MODE_RGMII_ID mode.

Signed-off-by: Michael Walle 
---
 drivers/net/phy/atheros.c | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c
index 4b7a1fb9c4..8bf26626ff 100644
--- a/drivers/net/phy/atheros.c
+++ b/drivers/net/phy/atheros.c
@@ -78,6 +78,11 @@ static int ar803x_delay_config(struct phy_device *phydev)
0, AR803x_RGMII_TX_CLK_DLY);
if (ret < 0)
return ret;
+   } else {
+   ret = ar803x_debug_reg_mask(phydev, AR803x_DEBUG_REG_5,
+   AR803x_RGMII_TX_CLK_DLY, 0);
+   if (ret < 0)
+   return ret;
}
 
if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID ||
@@ -86,6 +91,11 @@ static int ar803x_delay_config(struct phy_device *phydev)
0, AR803x_RGMII_RX_CLK_DLY);
if (ret < 0)
return ret;
+   } else {
+   ret = ar803x_debug_reg_mask(phydev, AR803x_DEBUG_REG_0,
+   AR803x_RGMII_RX_CLK_DLY, 0);
+   if (ret < 0)
+   return ret;
}
 
return 0;
-- 
2.20.1

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[U-Boot] [PATCH 9/9] phy: atheros: consolidate {ar8031|ar8035}_config()

[Michael Walle]

The two functions are now exactly the same, remove one of them.

Signed-off-by: Michael Walle 
---
 drivers/net/phy/atheros.c | 30 +++---
 1 file changed, 3 insertions(+), 27 deletions(-)

diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c
index 91fcbf912a..922dc91835 100644
--- a/drivers/net/phy/atheros.c
+++ b/drivers/net/phy/atheros.c
@@ -241,31 +241,7 @@ static int ar803x_of_init(struct phy_device *phydev)
return 0;
 }
 
-static int ar8031_config(struct phy_device *phydev)
-{
-   int ret;
-
-   ret = ar803x_of_init(phydev);
-   if (ret < 0)
-   return ret;
-
-   ret = ar803x_delay_config(phydev);
-   if (ret < 0)
-   return ret;
-
-   ret = ar803x_regs_config(phydev);
-   if (ret < 0)
-   return ret;
-
-   phydev->supported = phydev->drv->features;
-
-   genphy_config_aneg(phydev);
-   genphy_restart_aneg(phydev);
-
-   return 0;
-}
-
-static int ar8035_config(struct phy_device *phydev)
+static int ar803x_config(struct phy_device *phydev)
 {
int ret;
 
@@ -304,7 +280,7 @@ static struct phy_driver AR8031_driver =  {
.uid = 0x4dd074,
.mask = 0xffef,
.features = PHY_GBIT_FEATURES,
-   .config = ar8031_config,
+   .config = ar803x_config,
.startup = genphy_startup,
.shutdown = genphy_shutdown,
 };
@@ -314,7 +290,7 @@ static struct phy_driver AR8035_driver =  {
.uid = 0x4dd072,
.mask = 0xffef,
.features = PHY_GBIT_FEATURES,
-   .config = ar8035_config,
+   .config = ar803x_config,
.startup = genphy_startup,
.shutdown = genphy_shutdown,
 };
-- 
2.20.1

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[U-Boot] [PATCH 7/9] phy: atheros: Add device tree bindings and config

[Michael Walle]

Add support for configuring the CLK_25M pin as well as the RGMII I/O
voltage by the device tree.

By default the AT803x PHYs outputs the 25MHz clock of the XTAL input.
But this output can also be changed by software to other frequencies.
This commit introduces a generic way to configure this output.

Also the PHY supports different RGMII I/O voltages: 1.5V, 1.8V and 2.5V.
An internal LDO is able to provide 1.5V (default) and 1.8V. The 2.5V
option needs an external supply voltage. This commit adds support to
switch the internal LDO to 1.8V.

Signed-off-by: Michael Walle 
---
 doc/device-tree-bindings/net/phy/atheros.txt |  22 +++
 drivers/net/phy/atheros.c| 160 ++-
 2 files changed, 180 insertions(+), 2 deletions(-)
 create mode 100644 doc/device-tree-bindings/net/phy/atheros.txt

diff --git a/doc/device-tree-bindings/net/phy/atheros.txt 
b/doc/device-tree-bindings/net/phy/atheros.txt
new file mode 100644
index 00..112250114f
--- /dev/null
+++ b/doc/device-tree-bindings/net/phy/atheros.txt
@@ -0,0 +1,22 @@
+* Atheros PHY Device Tree binding
+
+Required properties:
+- reg: PHY address
+
+Optional properties:
+- atheros,clk-out-frequency: Clock frequency of the CLK_25M pin in Hz.
+   Either 2500, 5000, 6250 or 12500.
+- atheros,clk-out-strength: Clock output buffer driver strength.
+   Either "full", "half" or "quarter".
+- atheros,keep-pll-enabled: Keep the PLL running if no link is present.
+   Don't go into hibernation mode.
+- atheros,rgmii-io-1v8: Use 1.8V as RGMII I/O voltage, the default is 1.5V.
+
+Example:
+
+   ethernet-phy@0 {
+   reg = <0>;
+   atheros-clk-out-frequency = <12500>;
+   atheros,keep-pll-enabled;
+   atheros,rgmii-io-1v8;
+   };
diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c
index 8bf26626ff..1c8c9b4e75 100644
--- a/drivers/net/phy/atheros.c
+++ b/drivers/net/phy/atheros.c
@@ -4,6 +4,7 @@
  *
  * Copyright 2011, 2013 Freescale Semiconductor, Inc.
  * author Andy Fleming
+ * Copyright (c) 2019 Michael Walle 
  */
 #include 
 #include 
@@ -11,11 +12,41 @@
 #define AR803x_PHY_DEBUG_ADDR_REG  0x1d
 #define AR803x_PHY_DEBUG_DATA_REG  0x1e
 
+/* Debug registers */
+#define AR803x_DEBUG_REG_0 0x0
+#define AR803x_RGMII_RX_CLK_DLYBIT(15)
+
 #define AR803x_DEBUG_REG_5 0x5
 #define AR803x_RGMII_TX_CLK_DLYBIT(8)
 
-#define AR803x_DEBUG_REG_0 0x0
-#define AR803x_RGMII_RX_CLK_DLYBIT(15)
+#define AR803x_DEBUG_REG_1F0x1f
+#define AR803x_PLL_ON  BIT(2)
+#define AR803x_RGMII_1V8   BIT(3)
+
+/* MMD registers */
+#define AR803x_MMD7_CLK25M 0x8016
+#define AR803x_CLK_OUT_25MHZ_XTAL  (0 << 2)
+#define AR803x_CLK_OUT_25MHZ_DSP   (1 << 2)
+#define AR803x_CLK_OUT_50MHZ_PLL   (2 << 2)
+#define AR803x_CLK_OUT_50MHZ_DSP   (3 << 2)
+#define AR803x_CLK_OUT_62_5MHZ_PLL (4 << 2)
+#define AR803x_CLK_OUT_62_5MHZ_DSP (5 << 2)
+#define AR803x_CLK_OUT_125MHZ_PLL  (6 << 2)
+#define AR803x_CLK_OUT_125MHZ_DSP  (7 << 2)
+#define AR803x_CLK_OUT_MASK(7 << 2)
+
+#define AR803x_CLK_OUT_STRENGTH_FULL   (0 << 6)
+#define AR803x_CLK_OUT_STRENGTH_HALF   (1 << 6)
+#define AR803x_CLK_OUT_STRENGTH_QUARTER(2 << 6)
+#define AR803x_CLK_OUT_STRENGTH_MASK   (3 << 6)
+
+struct ar803x_priv {
+   int flags;
+#define AR803x_FLAG_KEEP_PLL_ENABLED   BIT(0) /* don't turn off internal PLL */
+#define AR803x_FLAG_RGMII_1V8  BIT(1) /* use 1.8V RGMII I/O voltage */
+   u16 clk_25m_reg;
+   u16 clk_25m_mask;
+};
 
 static int ar803x_debug_reg_read(struct phy_device *phydev, u16 reg)
 {
@@ -101,14 +132,131 @@ static int ar803x_delay_config(struct phy_device *phydev)
return 0;
 }
 
+static int ar803x_regs_config(struct phy_device *phydev)
+{
+   struct ar803x_priv *priv = phydev->priv;
+   u16 set = 0, clear = 0;
+   int val;
+   int ret;
+
+   /* no configuration available */
+   if (!priv)
+   return 0;
+
+   if (priv->flags & AR803x_FLAG_KEEP_PLL_ENABLED)
+   set |= AR803x_PLL_ON;
+   else
+   clear |= AR803x_PLL_ON;
+
+   if (priv->flags & AR803x_FLAG_RGMII_1V8)
+   set |= AR803x_RGMII_1V8;
+   else
+   clear |= AR803x_RGMII_1V8;
+
+   ret = ar803x_debug_reg_mask(phydev, AR803x_DEBUG_REG_1F, clear, set);
+   if (ret < 0)
+   return ret;
+
+   /* save the write access if the mask is empty */
+   if (priv->clk_25m_mask) {
+   val = phy_read_mmd(phydev, 7, AR803x_MMD7_CLK25M);
+   if (val < 0)
+   return val;
+   val &= ~priv->clk_25m_mask;
+   val |= priv->clk_25m_reg;
+   ret = phy_write_mmd(phydev, 7, AR803x_MMD7_CLK25M, val);
+   if (ret < 0)
+

[U-Boot] [PATCH 1/9] phy: atheros: introduce debug read and write functions

[Michael Walle]

Provide functions to read and write the Atheros debug registers.

Signed-off-by: Michael Walle 
---
 drivers/net/phy/atheros.c | 72 ---
 1 file changed, 53 insertions(+), 19 deletions(-)

diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c
index 3783d155e7..b25aa02108 100644
--- a/drivers/net/phy/atheros.c
+++ b/drivers/net/phy/atheros.c
@@ -17,11 +17,52 @@
 #define AR803x_DEBUG_REG_0 0x0
 #define AR803x_RGMII_RX_CLK_DLY0x8000
 
+static int ar803x_debug_reg_read(struct phy_device *phydev, u16 reg)
+{
+   int ret;
+
+   ret = phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_ADDR_REG,
+   reg);
+   if (ret < 0)
+   return ret;
+
+   return phy_read(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_DATA_REG);
+}
+
+static int ar803x_debug_reg_write(struct phy_device *phydev, u16 reg, u16 val)
+{
+   int ret;
+
+   ret = phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_ADDR_REG,
+   reg);
+   if (ret < 0)
+   return ret;
+
+   return phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_DATA_REG,
+val);
+}
+
+static int ar803x_debug_reg_mask(struct phy_device *phydev, u16 reg,
+u16 clear, u16 set)
+{
+   int val;
+
+   val = ar803x_debug_reg_read(phydev, reg);
+   if (val < 0)
+   return val;
+
+   val &= 0x;
+   val &= ~clear;
+   val |= set;
+
+   return phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_DATA_REG,
+val);
+}
+
 static int ar8021_config(struct phy_device *phydev)
 {
phy_write(phydev, MDIO_DEVAD_NONE, 0x00, 0x1200);
-   phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
-   phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x3D47);
+   ar803x_debug_reg_write(phydev, AR803x_DEBUG_REG_5, 0x3D47);
 
phydev->supported = phydev->drv->features;
return 0;
@@ -31,18 +72,14 @@ static int ar8031_config(struct phy_device *phydev)
 {
if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID ||
phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
-   phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_ADDR_REG,
- AR803x_DEBUG_REG_5);
-   phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_DATA_REG,
- AR803x_RGMII_TX_CLK_DLY);
+   ar803x_debug_reg_write(phydev, AR803x_DEBUG_REG_5,
+  AR803x_RGMII_TX_CLK_DLY);
}
 
if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID ||
phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
-   phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_ADDR_REG,
- AR803x_DEBUG_REG_0);
-   phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_DATA_REG,
- AR803x_RGMII_RX_CLK_DLY);
+   ar803x_debug_reg_write(phydev, AR803x_DEBUG_REG_0,
+  AR803x_RGMII_RX_CLK_DLY);
}
 
phydev->supported = phydev->drv->features;
@@ -63,24 +100,21 @@ static int ar8035_config(struct phy_device *phydev)
regval = phy_read(phydev, MDIO_DEVAD_NONE, 0xe);
phy_write(phydev, MDIO_DEVAD_NONE, 0xe, (regval|0x0018));
 
-   phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
-   regval = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);
-   phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, (regval|0x0100));
+   ar803x_debug_reg_mask(phydev, AR803x_DEBUG_REG_5,
+ 0, AR803x_RGMII_TX_CLK_DLY);
 
if ((phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||
(phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) {
-   /* select debug reg 5 */
-   phy_write(phydev, MDIO_DEVAD_NONE, 0x1D, 0x5);
/* enable tx delay */
-   phy_write(phydev, MDIO_DEVAD_NONE, 0x1E, 0x0100);
+   ar803x_debug_reg_write(phydev, AR803x_DEBUG_REG_5,
+  AR803x_RGMII_TX_CLK_DLY);
}
 
if ((phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||
(phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)) {
-   /* select debug reg 0 */
-   phy_write(phydev, MDIO_DEVAD_NONE, 0x1D, 0x0);
/* enable rx delay */
-   phy_write(phydev, MDIO_DEVAD_NONE, 0x1E, 0x8000);
+   ar803x_debug_reg_write(phydev, AR803x_DEBUG_REG_0,
+  AR803x_RGMII_RX_CLK_DLY);
}
 
phydev->supported = phydev->drv->features;
-- 
2.20.1

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[U-Boot] [PATCH 4/9] phy: atheros: ar8035: use phy_{read|write}_mmd()

[Michael Walle]

Signed-off-by: Michael Walle 
---
 drivers/net/phy/atheros.c | 11 +--
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c
index 629c6b192a..113374f03f 100644
--- a/drivers/net/phy/atheros.c
+++ b/drivers/net/phy/atheros.c
@@ -110,13 +110,12 @@ static int ar8031_config(struct phy_device *phydev)
 static int ar8035_config(struct phy_device *phydev)
 {
int ret;
-   int regval;
 
-   phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x0007);
-   phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016);
-   phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007);
-   regval = phy_read(phydev, MDIO_DEVAD_NONE, 0xe);
-   phy_write(phydev, MDIO_DEVAD_NONE, 0xe, (regval|0x0018));
+   ret = phy_read_mmd(phydev, 7, 0x8016);
+   if (ret < 0)
+   return ret;
+   ret |= 0x0018;
+   phy_write_mmd(phydev, 7, 0x8016, ret);
 
ret = ar803x_delay_config(phydev);
if (ret < 0)
-- 
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[U-Boot] [PATCH 2/9] phy: atheros: move delay config to common function

[Michael Walle]

Signed-off-by: Michael Walle 
---
 drivers/net/phy/atheros.c | 44 +++
 1 file changed, 26 insertions(+), 18 deletions(-)

diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c
index b25aa02108..402998c8d5 100644
--- a/drivers/net/phy/atheros.c
+++ b/drivers/net/phy/atheros.c
@@ -68,20 +68,37 @@ static int ar8021_config(struct phy_device *phydev)
return 0;
 }
 
-static int ar8031_config(struct phy_device *phydev)
+static int ar803x_delay_config(struct phy_device *phydev)
 {
+   int ret;
+
if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID ||
phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
-   ar803x_debug_reg_write(phydev, AR803x_DEBUG_REG_5,
-  AR803x_RGMII_TX_CLK_DLY);
+   ret = ar803x_debug_reg_write(phydev, AR803x_DEBUG_REG_5,
+AR803x_RGMII_TX_CLK_DLY);
+   if (ret < 0)
+   return ret;
}
 
if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID ||
phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
-   ar803x_debug_reg_write(phydev, AR803x_DEBUG_REG_0,
-  AR803x_RGMII_RX_CLK_DLY);
+   ret = ar803x_debug_reg_write(phydev, AR803x_DEBUG_REG_0,
+AR803x_RGMII_RX_CLK_DLY);
+   if (ret < 0)
+   return ret;
}
 
+   return 0;
+}
+
+static int ar8031_config(struct phy_device *phydev)
+{
+   int ret;
+
+   ret = ar803x_delay_config(phydev);
+   if (ret < 0)
+   return ret;
+
phydev->supported = phydev->drv->features;
 
genphy_config_aneg(phydev);
@@ -92,6 +109,7 @@ static int ar8031_config(struct phy_device *phydev)
 
 static int ar8035_config(struct phy_device *phydev)
 {
+   int ret;
int regval;
 
phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x0007);
@@ -103,19 +121,9 @@ static int ar8035_config(struct phy_device *phydev)
ar803x_debug_reg_mask(phydev, AR803x_DEBUG_REG_5,
  0, AR803x_RGMII_TX_CLK_DLY);
 
-   if ((phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||
-   (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) {
-   /* enable tx delay */
-   ar803x_debug_reg_write(phydev, AR803x_DEBUG_REG_5,
-  AR803x_RGMII_TX_CLK_DLY);
-   }
-
-   if ((phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||
-   (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)) {
-   /* enable rx delay */
-   ar803x_debug_reg_write(phydev, AR803x_DEBUG_REG_0,
-  AR803x_RGMII_RX_CLK_DLY);
-   }
+   ret = ar803x_delay_config(phydev);
+   if (ret < 0)
+   return ret;
 
phydev->supported = phydev->drv->features;
 
-- 
2.20.1

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[U-Boot] [PATCH 0/9] phy: atheros: cleanup and device tree bindings

[Michael Walle]

This series cleans up the Atheros PHY AR803x PHY driver and adds a
device tree binding for the most commonly used PHY settings like clock
output.

If you're a board maintainer you're getting this mail because you probably
use an AR803x PHY on your board. Please have a look at your board specific
code and see if you can use the device tree bindings instead. Let me know,
if something is missing.

Michael Walle (9):
  phy: atheros: introduce debug read and write functions
  phy: atheros: move delay config to common function
  phy: atheros: ar8035: remove extra delay config
  phy: atheros: ar8035: use phy_{read|write}_mmd()
  phy: atheros: don't overwrite debug register values
  phy: atheros: fix delay configuration
  phy: atheros: Add device tree bindings and config
  phy: atheros: ar8035: remove static clock config
  phy: atheros: consolidate {ar8031|ar8035}_config()

 doc/device-tree-bindings/net/phy/atheros.txt |  22 ++
 drivers/net/phy/atheros.c| 262 +++
 2 files changed, 240 insertions(+), 44 deletions(-)
 create mode 100644 doc/device-tree-bindings/net/phy/atheros.txt

Cc: Joe Hershberger 
Cc: Fabio Estevam 
Cc: Adam Ford 
Cc: Otavio Salvador 
Cc: Ian Ray 
Cc: Jason Liu 
Cc: Ye Li 
Cc: Uri Mashiach 
Cc: Nikita Kiryanov 
Cc: Lukasz Majewski 
Cc: Fabio Estevam 
Cc: Vanessa Maegima 
Cc: Eric Bénard 
-- 
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Re: [U-Boot] [PATCH 1/3] armv7r: dts: am654-base-board: Rename 1600MHz to 1600MTs in dtsi filename

[Tom Rini]

On Mon, Oct 07, 2019 at 02:04:25PM +0530, Lokesh Vutla wrote:

> From: James Doublesin 
> 
> The current configuration of DDR on AM654 base board is for 1600MTs but
> the file name is specified as k3-am654-base-board-ddr4-1600MHz.dtsi.
> Since 1600MHz is misleading, rename it to
> k3-am654-base-board-ddr4-1600MTs.dtsi
> 
> Signed-off-by: James Doublesin 
> Signed-off-by: Lokesh Vutla 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH 2/4] ram: k3-j721e: Add support for J721E DDR controller

[Tom Rini]

On Mon, Oct 07, 2019 at 07:26:36PM +0530, Lokesh Vutla wrote:

> From: Kevin Scholz 
> 
> The J721E DDR subsystem comprises DDR controller, DDR PHY and wrapper
> logic to integrate these blocks in the device. The DDR subsystem is
> used to provide an interface to external SDRAM devices which can be
> utilized for storing program or data. Introduce support for the
> DDR controller and DDR phy within the DDR subsystem.
> 
> Signed-off-by: Kevin Scholz  Signed-off-by: Lokesh Vutla 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [RESEND PATCH v1 1/3] ARM: dts: dra7: Add usb peripheral nodes in spl

[Tom Rini]

On Wed, Oct 09, 2019 at 12:35:18PM +0200, Jean-Jacques Hiblot wrote:

> From: Faiz Abbas 
> 
> Add usb peripheral and usb phy nodes in spl to enable SPL_DFU bootmode.
> 
> Signed-off-by: Faiz Abbas 
> Signed-off-by: Jean-Jacques Hiblot 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH 1/4] dt-bindings: memory-controller: Introduce J721E DDRSS bindings

[Tom Rini]

On Mon, Oct 07, 2019 at 07:26:35PM +0530, Lokesh Vutla wrote:

> Add DT binding documentation for DDR sub system present on J721E device.
> 
> Signed-off-by: Lokesh Vutla 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH] arm: dts: k3-am65: Add R5F ranges in interconnect nodes

[Tom Rini]

On Thu, Oct 17, 2019 at 09:03:08AM +0530, Lokesh Vutla wrote:

> From: Suman Anna 
> 
> Add the address spaces for the R5F cores in MCU domain to the ranges
> property of the cbass_mcu interconnect node so that the addresses
> within the R5F nodes can be translated properly by the relevant OF
> address API.
> 
> Signed-off-by: Suman Anna 
> Signed-off-by: Lokesh Vutla 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH 4/4] armv7R: K3: j721e: Add support for triggering ddr init from SPL

[Tom Rini]

On Mon, Oct 07, 2019 at 07:26:38PM +0530, Lokesh Vutla wrote:

> In SPL, DDR should be made available by the end of board_init_f()
> so that apis in board_init_r() can use ddr. Adding support for
> triggering DDR initialization from board_init_f().
> 
> Signed-off-by: Lokesh Vutla 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH 3/4] arm: dts: k3-j721e: Add ddr node

[Tom Rini]

On Mon, Oct 07, 2019 at 07:26:37PM +0530, Lokesh Vutla wrote:

> Use the 3733MTs DDR configuration that is auto generated from
> DDR_Regconfig tool.
> 
> Signed-off-by: Lokesh Vutla 
> Signed-off-by: Kevin Scholz 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [RESEND PATCH v1 2/3] configs: dra7xx_evm: Add Kconfigs for SPL_DFU bootmode

[Tom Rini]

On Wed, Oct 09, 2019 at 12:35:19PM +0200, Jean-Jacques Hiblot wrote:

> From: Faiz Abbas 
> 
> Enable configs for supporting SPL_DFU bootmode.
> 
> Signed-off-by: Faiz Abbas 
> Signed-off-by: Jean-Jacques Hiblot 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH 2/3] ram: k3-am654: add support for LPDDR4 and DDR3L DDRs

[Tom Rini]

On Mon, Oct 07, 2019 at 02:04:26PM +0530, Lokesh Vutla wrote:

> From: James Doublesin 
> 
> Added training support for LPDDR4 and DDR3L DDRs.  Also added/changed
> some register configuration to support all 3 DDR types
> 
> Signed-off-by: James Doublesin 
> Signed-off-by: Lokesh Vutla 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH 1/3] boot: arm: Enable support for custom board_prep_linux

[Tom Rini]

On Mon, Oct 07, 2019 at 01:52:15PM +0530, Lokesh Vutla wrote:

> Once the arch specific boot_prepare_linux completes, boards wants to
> have a custom preparation for linux. Add support for a custom
> board_prep_linux.
> 
> Signed-off-by: Lokesh Vutla 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [RESEND PATCH v1 3/3] configs: dra7xx_evm: Increase the size of SPL_MULTI_DTB_FIT

[Tom Rini]

On Wed, Oct 09, 2019 at 12:35:20PM +0200, Jean-Jacques Hiblot wrote:

> From: Faiz Abbas 
> 
> Expand SPL_MULTI_DTB_FIT to accommodate usb peripheral nodes being
> added to support SPL_DFU bootmode.
> 
> Signed-off-by: Faiz Abbas 
> 
> Signed-off-by: Jean-Jacques Hiblot 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH 3/3] arm: K3: Clean and invalidate Linux Image before jumping to Linux

[Tom Rini]

On Mon, Oct 07, 2019 at 01:52:17PM +0530, Lokesh Vutla wrote:

> U-Boot cleans and invalidate L1 and L2 caches before jumping to Linux
> by set/way in cleanup_before_linux(). Additionally there is a custom
> hook provided to clean and invalidate L3 cache.
> 
> Unfortunately on K3 devices(having a coherent architecture), there is no
> easy way to quickly clean all the cache lines for L3. The entire address
> range needs to be cleaned and invalidated by Virtual Address. This can
> be implemented using the L3 custom hook but it take lot of time to clean
> the entire address range. In the interest of boot time this might not be
> a viable solution.
> 
> The best hit is to make sure the loaded Linux image is flushed so that
> the entire image is written to DDR from L3. When Linux starts running with
> caches disabled the full image is available from DDR.
> 
> Reported-by: Andrew F. Davis 
> Reported-by: Faiz Abbas 
> Signed-off-by: Lokesh Vutla 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH 3/3] ram: k3-am654: Do not rely on default values for certain DDR register

[Tom Rini]

On Mon, Oct 07, 2019 at 02:04:27PM +0530, Lokesh Vutla wrote:

> From: James Doublesin 
> 
> Added the following registers to the DDR configuration:
> - ACIOCR0,
> - ACIOCR3,
> - V2H_CTL_REG,
> - DX8SLxDQSCTL.
> 
> Modified enable_dqs_pd and disable_dqs_pd to only touch the associated
> bit fields for pullup and pulldown registers (to preserve slew rate and
> other bits in that same register). Also update the dts files in the same
> patch to maintain git bisectability.
> 
> Signed-off-by: James Doublesin 
> Signed-off-by: Lokesh Vutla 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PULL] u-boot-usb/master

[Tom Rini]

On Fri, Oct 25, 2019 at 01:19:04PM +0200, Marek Vasut wrote:

> The following changes since commit 680023c5fab6b1777c0c6f2e76e5d2effb7903a0:
> 
>   Merge tag 'u-boot-stm32-2019-10-23' of
> https://gitlab.denx.de/u-boot/custodians/u-boot-stm (2019-10-23 14:04:02
> -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-usb.git master
> 
> for you to fetch changes up to 235f5e158e336371759f98ffbf265fe078cda251:
> 
>   ehci-mx6: Update EHCI driver to support OTG0 on i.MX7ULP (2019-10-24
> 15:31:13 +0200)
> 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PULL] u-boot-atmel-2020.01-b

[Tom Rini]

On Fri, Oct 25, 2019 at 08:58:56AM +, eugen.hris...@microchip.com wrote:

> Hi Tom,
> 
> Please pull tag u-boot-atmel-2020.01-b , the second set of features and 
> fixes for the 2020.01 cycle.
> 
> This feature set includes my work on a new tiny flexcom driver and 
> eeprom mac retrieval for the sam9x60-ek board.
> 
> Thanks !
> Eugen
> 
> 
> The following changes since commit 680023c5fab6b1777c0c6f2e76e5d2effb7903a0:
> 
>Merge tag 'u-boot-stm32-2019-10-23' of 
> https://gitlab.denx.de/u-boot/custodians/u-boot-stm (2019-10-23 14:04:02 
> -0400)
> 
> are available in the git repository at:
> 
>https://gitlab.denx.de/u-boot/custodians/u-boot-atmel.git 
> tags/u-boot-atmel-2020.01-b
> 
> for you to fetch changes up to 4c49753ce2e527c6b561ca6fbbd782b4914f83e2:
> 
>MAINTAINERS: add MICROCHIP_FLEXCOM to at91 (2019-10-24 13:02:01 +0300)
> 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH 2/3] cmd: booti: Store OS start and end info in images structure

[Tom Rini]

On Mon, Oct 07, 2019 at 01:52:16PM +0530, Lokesh Vutla wrote:

> Store the start and end of the OS image that is loaded in images
> structure.
> 
> Signed-off-by: Lokesh Vutla 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [GIT PULL] Xilinx patches for v2020.01 part 2

[Tom Rini]

On Fri, Oct 25, 2019 at 08:57:47AM +0200, Michal Simek wrote:

> Hi Tom,
> 
> this is the second pull request because I found a lot of stuff missing
> in mainline.
> I have also included one minor dtbo clean up because I have started to
> use it to support different modules. And also very important fix for
> manual relocation for repeatable commands which was broken for quite a
> long time and none spots it.
> 
> Gitlab CI is clean:
> https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze/pipelines/1078
> 
> And travis too.
> https://travis-ci.org/michalsimek/u-boot/builds/602280585
> 
> Thanks,
> Michal
> 
> 
> The following changes since commit 680023c5fab6b1777c0c6f2e76e5d2effb7903a0:
> 
>   Merge tag 'u-boot-stm32-2019-10-23' of
> https://gitlab.denx.de/u-boot/custodians/u-boot-stm (2019-10-23 14:04:02
> -0400)
> 
> are available in the Git repository at:
> 
>   g...@gitlab.denx.de:u-boot/custodians/u-boot-microblaze.git
> tags/xilinx-for-v2020.01-part2
> 
> for you to fetch changes up to 3ad95ed6f87de048861ea8b9c3ab9a77e548d7b1:
> 
>   microblaze: Fix tab indentation in start.S (2019-10-24 13:37:03 +0200)
> 

Applied to u-boot/master, thanks!

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[U-Boot] [PULL] u-boot-mips

[Daniel Schwierzeck]

Hi Tom,

please pull MIPS updates for 2020.01.

Gitlab: https://gitlab.denx.de/u-boot/custodians/u-boot-mips/pipelines/1101
Travis CI: https://travis-ci.org/danielschwierzeck/u-boot/builds/602882075


The following changes since commit 17fd9915a4c639381804ed28274fa136ae3b0bee:

  Merge branch '2019-10-24-UFS-support' (2019-10-24 09:51:48 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-mips.git tags/mips-pull-2019-10-25

for you to fetch changes up to ec54c8c0001d151e9ba59410d35fe6a02fdcaf12:

  configs: mtmips: remove configs which are selected in Kconfig or useless 
(2019-10-25 17:20:44 +0200)


- bmips: add BCRM NAND support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs
- bmips: various small fixes
- mtmips: add new drivers for clock, reset-controller and pinctrl
- mtmips: add support for high speed UART
- mtmips: update/enhance drivers for SPI and ethernet
- mtmips: add support for MMC


Ramon Fried (1):
  MIPS: add compile time definition of L2 cache size

Weijie Gao (28):
  serial: serial_mtk: enable FIFO and disable flow control
  serial: serial_mtk: add non-DM version for SPL
  dts: mtmips: move uart property clock-frequency into mt7628an.dtsi
  dts: mtmips: enable high-speed UART support for mt7628
  clk: add clock driver for MediaTek MT76x8 platform
  dts: mtmips: add clock node for mt7628
  spi: mt7621-spi: use clock frequency from clk driver
  spi: mt7621-spi: remove data cache and rewrite its xfer function
  spi: mt7621-spi: restore default register value after each xfer
  pinctrl: add support for MediaTek MT7628
  dts: mtmips: add pinctrl node for mt7628
  dts: mtmips: add default pinctrl for uart nodes
  reset: add reset controller driver for MediaTek MIPS platform
  dts: mtmips: update reset controller node for mt7628
  phy: mt76x8-usb-phy: add slew rate calibration and remove non-mt7628 part
  net: mt7628-eth: remove hardcoded gpio settings and regmap-based phy reset
  net: mt7628-eth: make phy link up detection optional via DT
  net: mt7628-eth: free rx descriptor on receiving failure
  net: mt7628-eth: add support to isolate LAN/WAN ports
  dts: mtmips: enable eth port0 led and link poll functions for all boards
  mmc: mtk-sd: add support for MediaTek MT7620/MT7628 SoCs
  mmc: mtk-sd: add a dts property cd-active-high for builtin-cd mode
  dts: mtmips: add mmc related nodes for mt7628an.dtsi
  dts: mtmips: add default pinctrl for gardena-smart-gateway-mt7688
  dts: mtmips: add default pinctrl to eth nodes for all boards
  mips: mtmips: change baudrate table for all boards
  mips: mtmips: select essential drivers in Kconfig
  configs: mtmips: remove configs which are selected in Kconfig or useless

William Zhang (1):
  drivers: nand: brcmnand: fix nand_chip ecc layout structure

Álvaro Fernández Rojas (10):
  nand: brcm: add BCM6368 support
  bmips: bcm6368: add support for brcmnand
  bmips: bcm6328: add support for brcmnand
  bmips: bcm6362: add support for brcmnand
  bmips: bcm63268: add support for brcmnand
  bmips: enable vr-3032u nand support
  mips: bmips: remove unneeded definitions
  bmips: configs: switch to size definitions
  bmips: correct name characters
  mips: bmips: switch to board defines for dtb

 arch/mips/Kconfig  |  16 +-
 arch/mips/dts/Makefile |   4 +-
 arch/mips/dts/brcm,bcm63268.dtsi   |  18 +
 arch/mips/dts/brcm,bcm6328.dtsi|  16 +
 arch/mips/dts/brcm,bcm6362.dtsi|  20 +-
 arch/mips/dts/brcm,bcm6368.dtsi|  18 +
 arch/mips/dts/comtrend,vr-3032u.dts|  13 +
 arch/mips/dts/gardena-smart-gateway-mt7688.dts |  19 +-
 arch/mips/dts/linkit-smart-7688.dts|  16 +-
 arch/mips/dts/mt7628a.dtsi | 246 -
 arch/mips/dts/netgear,dgnd3700v2.dts   |   2 +-
 arch/mips/lib/cache.c  |   2 +-
 arch/mips/mach-mtmips/Kconfig  |   2 +
 board/netgear/dgnd3700v2/MAINTAINERS   |   2 +-
 board/netgear/dgnd3700v2/dgnd3700v2.c  |   2 +-
 configs/comtrend_vr3032u_ram_defconfig |   5 +
 configs/gardena-smart-gateway-mt7688-ram_defconfig |   7 -
 configs/gardena-smart-gateway-mt7688_defconfig |   7 -
 configs/linkit-smart-7688-ram_defconfig|   7 -
 configs/linkit-smart-7688_defconfig|   7 -
 drivers/clk/Makefile   |   1 +
 drivers/clk/mtmips/Makefile|   3 +
 drivers/clk/mtmips/clk-mt7628.c| 158 ++
 drivers/mmc/Kconfig|   2 +-
 drivers/mmc/mtk-sd.c 

Re: [U-Boot] [PATCH v2] spl: fix SPI config dependencies

[Lukasz Majewski]

On Fri, 25 Oct 2019 16:22:09 +0200
Simon Goldschmidt  wrote:

> As SPL_SPI_FLASH_SUPPORT cannot work without SPL_SPI_SUPPORT, fix
> dependencies to prevent enabling SPI flash support without basic SPI
> support.
> 
> Signed-off-by: Simon Goldschmidt 
> ---
> 
> Changes in v2:
> - move SYS_SPI_U_BOOT_OFFS out of the SPL_SPI_FLASH_SUPPORT guard
>   since that broke sunxi SPL (which uses non-DM spi)
> 
>  common/spl/Kconfig | 21 +++--
>  1 file changed, 11 insertions(+), 10 deletions(-)
> 
> diff --git a/common/spl/Kconfig b/common/spl/Kconfig
> index 86d7edfee1..b8d234eb5e 100644
> --- a/common/spl/Kconfig
> +++ b/common/spl/Kconfig
> @@ -1014,8 +1014,19 @@ config SPL_SERIAL_SUPPORT
> unless there are space reasons not to. Even then, consider
> enabling SPL_USE_TINY_PRINTF which is a small printf()
> version. 
> +config SPL_SPI_SUPPORT
> + bool "Support SPI drivers"
> + help
> +   Enable support for using SPI in SPL. This is used for
> connecting
> +   to SPI flash for loading U-Boot. See SPL_SPI_FLASH_SUPPORT
> for
> +   more details on that. The SPI driver provides the
> transport for
> +   data between the SPI flash and the CPU. This option can be
> used to
> +   enable SPI drivers that are needed for other purposes
> also, such
> +   as a SPI PMIC.
> +
>  config SPL_SPI_FLASH_SUPPORT
>   bool "Support SPI flash drivers"
> + depends on SPL_SPI_SUPPORT
>   help
> Enable support for using SPI flash in SPL, and loading
> U-Boot from SPI flash. SPI flash (Serial Peripheral Bus flash) is
> named after @@ -1060,16 +1071,6 @@ config SYS_SPI_U_BOOT_OFFS
>Address within SPI-Flash from where the u-boot payload is
> fetched from.
>  
> -config SPL_SPI_SUPPORT
> - bool "Support SPI drivers"
> - help
> -   Enable support for using SPI in SPL. This is used for
> connecting
> -   to SPI flash for loading U-Boot. See SPL_SPI_FLASH_SUPPORT
> for
> -   more details on that. The SPI driver provides the
> transport for
> -   data between the SPI flash and the CPU. This option can be
> used to
> -   enable SPI drivers that are needed for other purposes
> also, such
> -   as a SPI PMIC.
> -
>  config SPL_THERMAL
>   bool "Driver support for thermal devices"
>   help

Reviewed-by: Lukasz Majewski 


Best regards,

Lukasz Majewski

--

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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lu...@denx.de


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Re: [U-Boot] [PATCH v2 36/41] serial: mxc: add imx53 and imx21 compatible string

[Lukasz Majewski]

Hi Robert,

> On Thu, 2019-10-24 at 09:38 +0200, Lukasz Majewski wrote:
> > Hi Robert,
> >   
> > > Add compatible string for imx53 and imx21.
> > > 
> > > Signed-off-by: Robert Beckett 
> > > ---
> > >  drivers/serial/serial_mxc.c | 2 ++
> > >  1 file changed, 2 insertions(+)
> > > 
> > > diff --git a/drivers/serial/serial_mxc.c
> > > b/drivers/serial/serial_mxc.c
> > > index 42abb96a26..8e19a89151 100644
> > > --- a/drivers/serial/serial_mxc.c
> > > +++ b/drivers/serial/serial_mxc.c
> > > @@ -348,6 +348,8 @@ static const struct udevice_id
> > > mxc_serial_ids[] =
> > > { { .compatible = "fsl,imx6ul-uart" },
> > >   { .compatible = "fsl,imx7d-uart" },
> > >   { .compatible = "fsl,imx6q-uart" },
> > > + { .compatible = "fsl,imx53-uart" },
> > > + { .compatible = "fsl,imx21-uart" },
> > >   { }
> > >  };
> > >  #endif  
> > 
> > Thanks for your patch. However, please note that it shall be
> > addressed
> > also to i.MX maintainer (Stefano - CC'ed).
> > 
> > To send patches to correct people (despite the assignment for
> > reviewers
> > in the patchwork) - please use patman python script. It generates
> > list
> > of relevant people to receive patch for review.  
> 
> Thanks. I used get_maintainer.pl as part of sending via git
> send-email. I did try setting up patman, but it crashes so much
> trying to find aliases that dont exist, I gave up adding dummy
> aliases, and just used get_maintainer.
> Perhaps I should try to figure out how to get it working before the
> next submission.

I always use -i option (ignore bad tags) and -n (dry run).

./tools/patman/patman -c1 -s0 -t -i

-s0 is to start from top of the HEAD

-c1 to send one patch

> 
> > 
> > Best regards,
> > 
> > Lukasz Majewski
> > 
> > --
> > 
> > DENX Software Engineering GmbH,  Managing Director: Wolfgang
> > Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell,
> > Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: 
> > lu...@denx.de  
> 




Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lu...@denx.de


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[U-Boot] [PATCH] dlmalloc: calloc: fix zeroing early allocations

[Simon Goldschmidt]

When full malloc is enabled and SYS_MALLOC_F is also enabled, the simple
pre-reloc heap is used before relocation. In this case, calloc() uses
the MALLOC_ZERO macro to zero out the allocated memory. However, since
this macro is specially crafted for the dlmalloc implementation, it
does not always work for simple malloc.

For example, when allocating 16 bytes via simple malloc, only the first
12 bytes get zeroed out. The last 4 bytes will remain untouched.

This is a problem for DM drivers that are allocated before relocation:
memory allocated via 'platdata_auto_alloc_size' might not be set to
zero, resulting in bogus behaviour.

To fix this, use 'memset' instead of 'MALLOC_ZERO' to zero out memory
that compes from simple malloc.

Signed-off-by: Simon Goldschmidt 
---

 common/dlmalloc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/common/dlmalloc.c b/common/dlmalloc.c
index 6f12a18d54..dade68faf7 100644
--- a/common/dlmalloc.c
+++ b/common/dlmalloc.c
@@ -2086,7 +2086,7 @@ Void_t* cALLOc(n, elem_size) size_t n; size_t elem_size;
   {
 #if CONFIG_VAL(SYS_MALLOC_F_LEN)
if (!(gd->flags & GD_FLG_FULL_MALLOC_INIT)) {
-   MALLOC_ZERO(mem, sz);
+   memset(mem, 0, sz);
return mem;
}
 #endif
-- 
2.20.1

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Re: [U-Boot] [PATCH v1 2/3] lib: rsa: generate additional parameters for public key

[Simon Glass]

Hi,

On Fri, 25 Oct 2019 at 12:27, Tom Rini  wrote:
>
> On Thu, Oct 24, 2019 at 03:36:07PM -0600, Simon Glass wrote:
> > Hi,
> >
> > On Tue, 22 Oct 2019 at 23:23, AKASHI Takahiro
> >  wrote:
> > >
> > > On Mon, Oct 21, 2019 at 06:17:03PM -0600, Simon Glass wrote:
> > > > Hi Takahiro,
> > > >
> > > > On Tue, 8 Oct 2019 at 23:27, AKASHI Takahiro 
> > > >  wrote:
> > > > >
> > > > > In the current implementation of FIT_SIGNATURE, five parameters for
> > > > > a RSA public key are required while only two of them are essential.
> > > > > (See rsa-mod-exp.h and uImage.FIT/signature.txt)
> > > > > This is a result of considering relatively limited computer power
> > > > > and resources on embedded systems, while such a assumption may not
> > > > > be quite practical for other use cases.
> > > > >
> > > > > In this patch, added is a function, rsa_gen_key_prop(), which will
> > > > > generate additional parameters for other uses, in particular
> > > > > UEFI secure boot, on the fly.
> > > > >
> > > > > Note: the current code uses some "big number" routines from BearSSL
> > > > > for the calculation.
> > > > >
> > > > > Signed-off-by: AKASHI Takahiro 
> > > > > ---
> > > > >  include/u-boot/rsa-mod-exp.h |   3 +
> > > > >  lib/rsa/Kconfig  |   7 +
> > > > >  lib/rsa/Makefile |   1 +
> > > > >  lib/rsa/rsa-keyprop.c| 585 
> > > > > +++
> > > > >  4 files changed, 596 insertions(+)
> > > > >  create mode 100644 lib/rsa/rsa-keyprop.c
> > > > >
> > > > > diff --git a/include/u-boot/rsa-mod-exp.h 
> > > > > b/include/u-boot/rsa-mod-exp.h
> > > > > index 8a428c4b6a1a..ca189292d869 100644
> > > > > --- a/include/u-boot/rsa-mod-exp.h
> > > > > +++ b/include/u-boot/rsa-mod-exp.h
> > > > > @@ -26,6 +26,9 @@ struct key_prop {
> > > > > uint32_t exp_len;   /* Exponent length in number of 
> > > > > uint8_t */
> > > > >  };
> > > > >
> > > > > +struct key_prop *rsa_gen_key_prop(const void *key, uint32_t keylen);
> > > > > +void rsa_free_key_prop(struct key_prop *prop);
> > > >
> > > > Please add full function comments.
> > >
> > > Sure.
> > >
> > > > > +
> > > > >  /**
> > > > >   * rsa_mod_exp_sw() - Perform RSA Modular Exponentiation in sw
> > > > >   *
> > > > > diff --git a/lib/rsa/Kconfig b/lib/rsa/Kconfig
> > > > > index 62b7ab9c5e5c..d1743d7a4c47 100644
> > > > > --- a/lib/rsa/Kconfig
> > > > > +++ b/lib/rsa/Kconfig
> > > > > @@ -30,6 +30,13 @@ config RSA_VERIFY
> > > > > help
> > > > >   Add RSA signature verification support.
> > > > >
> > > > > +config RSA_VERIFY_WITH_PKEY
> > > > > +   bool "Execute RSA verification without key parameters from 
> > > > > FDT"
> > > > > +   depends on RSA
> > > > > +   help
> > > > > + This options enables RSA signature verification without
> > > > > + using public key parameters which is embedded control FDT.
> > > >
> > > > How about something like...
> > > >
> > > > The standard RSA-signature verification code uses 
> > > >
> > > > This does not suit the use case where ...
> > > >
> > > > This option enables ...
> > >
> > > I will try to improve ...
> > >
> > > > > +
> > > > >  config RSA_SOFTWARE_EXP
> > > > > bool "Enable driver for RSA Modular Exponentiation in 
> > > > > software"
> > > > > depends on DM
> > > > > diff --git a/lib/rsa/Makefile b/lib/rsa/Makefile
> > > > > index c07305188e0c..14ed3cb4012b 100644
> > > > > --- a/lib/rsa/Makefile
> > > > > +++ b/lib/rsa/Makefile
> > > > > @@ -6,4 +6,5 @@
> > > > >  # Wolfgang Denk, DENX Software Engineering, w...@denx.de.
> > > > >
> > > > >  obj-$(CONFIG_$(SPL_)RSA_VERIFY) += rsa-verify.o rsa-checksum.o
> > > > > +obj-$(CONFIG_RSA_VERIFY_WITH_PKEY) += rsa-keyprop.o
> > > > >  obj-$(CONFIG_RSA_SOFTWARE_EXP) += rsa-mod-exp.o
> > > > > diff --git a/lib/rsa/rsa-keyprop.c b/lib/rsa/rsa-keyprop.c
> > > > > new file mode 100644
> > > > > index ..d7d222e9bed9
> > > > > --- /dev/null
> > > > > +++ b/lib/rsa/rsa-keyprop.c
> > > > > @@ -0,0 +1,585 @@
> > > > > +// SPDX-License-Identifier: GPL-2.0+ and MIT
> > > > > +/*
> > > > > + * RSA library - generate parameters for a public key
> > > > > + *
> > > > > + * Copyright (c) 2019 Linaro Limited
> > > > > + * Author: AKASHI Takahiro
> > > > > + *
> > > > > + * Big number routines in this file come from BearSSL:
> > > > > + * Copyright (c) 2016 Thomas Pornin 
> > > > > + */
> > > > > +
> > > > > +#include 
> > > > > +#include 
> > > > > +#include 
> > > > > +#include 
> > > > > +#include 
> > > > > +#include 
> > > > > +
> > > > > +static inline unsigned
> > > >
> > > > Please drop the inlines unless needed. Would prefer to leave this to
> > > > the compiler.
> > >
> > > Okay.
> > >
> > > > Also please keep the function name on the same line as the 'static'.
> > >
> > > Okay.
> > >
> > > > > +br_dec16be(const void *src)
> > > > > +{
> > > > > +   return be16_to_cpup(src);
> > > > > +}
> > > > > +
> > > > > +static inline uint32_t
> > > > > 

Re: [U-Boot] [PATCH v1 2/3] lib: rsa: generate additional parameters for public key

[Tom Rini]

On Thu, Oct 24, 2019 at 03:36:07PM -0600, Simon Glass wrote:
> Hi,
> 
> On Tue, 22 Oct 2019 at 23:23, AKASHI Takahiro
>  wrote:
> >
> > On Mon, Oct 21, 2019 at 06:17:03PM -0600, Simon Glass wrote:
> > > Hi Takahiro,
> > >
> > > On Tue, 8 Oct 2019 at 23:27, AKASHI Takahiro  
> > > wrote:
> > > >
> > > > In the current implementation of FIT_SIGNATURE, five parameters for
> > > > a RSA public key are required while only two of them are essential.
> > > > (See rsa-mod-exp.h and uImage.FIT/signature.txt)
> > > > This is a result of considering relatively limited computer power
> > > > and resources on embedded systems, while such a assumption may not
> > > > be quite practical for other use cases.
> > > >
> > > > In this patch, added is a function, rsa_gen_key_prop(), which will
> > > > generate additional parameters for other uses, in particular
> > > > UEFI secure boot, on the fly.
> > > >
> > > > Note: the current code uses some "big number" routines from BearSSL
> > > > for the calculation.
> > > >
> > > > Signed-off-by: AKASHI Takahiro 
> > > > ---
> > > >  include/u-boot/rsa-mod-exp.h |   3 +
> > > >  lib/rsa/Kconfig  |   7 +
> > > >  lib/rsa/Makefile |   1 +
> > > >  lib/rsa/rsa-keyprop.c| 585 +++
> > > >  4 files changed, 596 insertions(+)
> > > >  create mode 100644 lib/rsa/rsa-keyprop.c
> > > >
> > > > diff --git a/include/u-boot/rsa-mod-exp.h b/include/u-boot/rsa-mod-exp.h
> > > > index 8a428c4b6a1a..ca189292d869 100644
> > > > --- a/include/u-boot/rsa-mod-exp.h
> > > > +++ b/include/u-boot/rsa-mod-exp.h
> > > > @@ -26,6 +26,9 @@ struct key_prop {
> > > > uint32_t exp_len;   /* Exponent length in number of uint8_t 
> > > > */
> > > >  };
> > > >
> > > > +struct key_prop *rsa_gen_key_prop(const void *key, uint32_t keylen);
> > > > +void rsa_free_key_prop(struct key_prop *prop);
> > >
> > > Please add full function comments.
> >
> > Sure.
> >
> > > > +
> > > >  /**
> > > >   * rsa_mod_exp_sw() - Perform RSA Modular Exponentiation in sw
> > > >   *
> > > > diff --git a/lib/rsa/Kconfig b/lib/rsa/Kconfig
> > > > index 62b7ab9c5e5c..d1743d7a4c47 100644
> > > > --- a/lib/rsa/Kconfig
> > > > +++ b/lib/rsa/Kconfig
> > > > @@ -30,6 +30,13 @@ config RSA_VERIFY
> > > > help
> > > >   Add RSA signature verification support.
> > > >
> > > > +config RSA_VERIFY_WITH_PKEY
> > > > +   bool "Execute RSA verification without key parameters from FDT"
> > > > +   depends on RSA
> > > > +   help
> > > > + This options enables RSA signature verification without
> > > > + using public key parameters which is embedded control FDT.
> > >
> > > How about something like...
> > >
> > > The standard RSA-signature verification code uses 
> > >
> > > This does not suit the use case where ...
> > >
> > > This option enables ...
> >
> > I will try to improve ...
> >
> > > > +
> > > >  config RSA_SOFTWARE_EXP
> > > > bool "Enable driver for RSA Modular Exponentiation in software"
> > > > depends on DM
> > > > diff --git a/lib/rsa/Makefile b/lib/rsa/Makefile
> > > > index c07305188e0c..14ed3cb4012b 100644
> > > > --- a/lib/rsa/Makefile
> > > > +++ b/lib/rsa/Makefile
> > > > @@ -6,4 +6,5 @@
> > > >  # Wolfgang Denk, DENX Software Engineering, w...@denx.de.
> > > >
> > > >  obj-$(CONFIG_$(SPL_)RSA_VERIFY) += rsa-verify.o rsa-checksum.o
> > > > +obj-$(CONFIG_RSA_VERIFY_WITH_PKEY) += rsa-keyprop.o
> > > >  obj-$(CONFIG_RSA_SOFTWARE_EXP) += rsa-mod-exp.o
> > > > diff --git a/lib/rsa/rsa-keyprop.c b/lib/rsa/rsa-keyprop.c
> > > > new file mode 100644
> > > > index ..d7d222e9bed9
> > > > --- /dev/null
> > > > +++ b/lib/rsa/rsa-keyprop.c
> > > > @@ -0,0 +1,585 @@
> > > > +// SPDX-License-Identifier: GPL-2.0+ and MIT
> > > > +/*
> > > > + * RSA library - generate parameters for a public key
> > > > + *
> > > > + * Copyright (c) 2019 Linaro Limited
> > > > + * Author: AKASHI Takahiro
> > > > + *
> > > > + * Big number routines in this file come from BearSSL:
> > > > + * Copyright (c) 2016 Thomas Pornin 
> > > > + */
> > > > +
> > > > +#include 
> > > > +#include 
> > > > +#include 
> > > > +#include 
> > > > +#include 
> > > > +#include 
> > > > +
> > > > +static inline unsigned
> > >
> > > Please drop the inlines unless needed. Would prefer to leave this to
> > > the compiler.
> >
> > Okay.
> >
> > > Also please keep the function name on the same line as the 'static'.
> >
> > Okay.
> >
> > > > +br_dec16be(const void *src)
> > > > +{
> > > > +   return be16_to_cpup(src);
> > > > +}
> > > > +
> > > > +static inline uint32_t
> > > > +br_dec32be(const void *src)
> > > > +{
> > > > +   return be32_to_cpup(src);
> > > > +}
> > > > +
> > > > +static inline void
> > > > +br_enc32be(void *dst, uint32_t x)
> > > > +{
> > > > +   __be32 tmp;
> > > > +
> > > > +   tmp = cpu_to_be32(x);
> > > > +   memcpy(dst, , sizeof(tmp));
> > > > +}
> > > > +
> > > > +/* stripped version of src/inner.h 

Re: [U-Boot] [PATCH v6 1/1] cmd: env: extend "env [set|print] -e" to manage UEFI variables

[Heinrich Schuchardt]

On 10/24/19 8:17 AM, AKASHI Takahiro wrote:
> With this patch, when setting UEFI variable with "env set -e" command,
> we will be able to
> - specify vendor guid with "-guid guid",
> - specify variable attributes,  BOOTSERVICE_ACCESS, RUNTIME_ACCESS,
>   respectively with "-bs" and "-rt",
> - append a value instead of overwriting with "-a",
> - use memory as variable's value instead of explicit values given
>   at the command line with "-i address,size"
>
> If guid is not explicitly given, default value will be used.
>
> Meanwhile, "env print -e," will be modified so that it will NOT dump
> a variable's value if '-n' is specified.
>
> Signed-off-by: AKASHI Takahiro 

Looks fine to me. The only strange behavior is:

=> printenv -e
OsIndicationsSupported:
EFI_GLOBAL_VARIABLE_GUID: BS|RT, DataSize = 0x8
: 00 00 00 00 00 00 00 00  
PlatformLang:
EFI_GLOBAL_VARIABLE_GUID: NV|BS|RT, DataSize = 0x6
: 65 6e 2d 55 53 00en-US.
PlatformLangCodes:
EFI_GLOBAL_VARIABLE_GUID: BS|RT, DataSize = 0x6
: 65 6e 2d 55 53 00en-US.
RuntimeServicesSupported:
EFI_GLOBAL_VARIABLE_GUID: BS|RT, DataSize = 0x2
: 80 05..
=> env set -e -guid 0001-0002-0003-0004-010203040506 a b
EFI: Entry efi_set_variable("a" 0001-0002-0003-0004-010203040506 0 1
7eef7610)
EFI: Exit: efi_set_variable: 14
## Failed to set EFI variable (not found)

I would have expected
## Failed to set EFI variable (invalid parameter)

The UEFI spec has:
If a preexisting variable is rewritten with no access attributes
specified, the variable will be deleted.

But "a" is not a preexisting variable. Instead the attributes are invalid.

But as this is a bug in a code that you did not touch:

Reviewed-by: Heinrich Schuchardt 
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Re: [U-Boot] [PATCH v2 00/41] convert GE boards to DM

[Robert Beckett]

On Thu, 2019-10-24 at 14:00 -0300, Fabio Estevam wrote:
> On Wed, Oct 23, 2019 at 3:23 PM Robert Beckett
>  wrote:
> > This patch series converts GE boards to use DM features.
> > Most of the patches are GE board specific to modify the board code
> > to
> > use the DM drivers, or modify the device tree.
> 
> It would also make things a lot easier for review if you split this
> single series in several smaller ones per subsystem:
> - board related, PMIC, rtc, eeprom, core I2C, bootcount, etc
> 
> Also, make sure to copy the maintainers for each subsystem.

Sure, will do.


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Re: [U-Boot] [PATCH v2 36/41] serial: mxc: add imx53 and imx21 compatible string

[Robert Beckett]

On Thu, 2019-10-24 at 09:38 +0200, Lukasz Majewski wrote:
> Hi Robert,
> 
> > Add compatible string for imx53 and imx21.
> > 
> > Signed-off-by: Robert Beckett 
> > ---
> >  drivers/serial/serial_mxc.c | 2 ++
> >  1 file changed, 2 insertions(+)
> > 
> > diff --git a/drivers/serial/serial_mxc.c
> > b/drivers/serial/serial_mxc.c
> > index 42abb96a26..8e19a89151 100644
> > --- a/drivers/serial/serial_mxc.c
> > +++ b/drivers/serial/serial_mxc.c
> > @@ -348,6 +348,8 @@ static const struct udevice_id mxc_serial_ids[]
> > =
> > { { .compatible = "fsl,imx6ul-uart" },
> > { .compatible = "fsl,imx7d-uart" },
> > { .compatible = "fsl,imx6q-uart" },
> > +   { .compatible = "fsl,imx53-uart" },
> > +   { .compatible = "fsl,imx21-uart" },
> > { }
> >  };
> >  #endif
> 
> Thanks for your patch. However, please note that it shall be
> addressed
> also to i.MX maintainer (Stefano - CC'ed).
> 
> To send patches to correct people (despite the assignment for
> reviewers
> in the patchwork) - please use patman python script. It generates
> list
> of relevant people to receive patch for review.

Thanks. I used get_maintainer.pl as part of sending via git send-email.
I did try setting up patman, but it crashes so much trying to find
aliases that dont exist, I gave up adding dummy aliases, and just used
get_maintainer.
Perhaps I should try to figure out how to get it working before the
next submission.

> 
> Best regards,
> 
> Lukasz Majewski
> 
> --
> 
> DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: 
> lu...@denx.de

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Re: [U-Boot] Pull request: u-boot-spi/master

[Tom Rini]

On Fri, Oct 25, 2019 at 02:08:12PM +0530, Jagan Teki wrote:

> Hi Tom,
> 
> Please pull this PR.
> 
> Summary:
> - SPL_SPI_FLASH_MTD (Frieder)
> - SPI NOR IDs' fixes, additions (Vignesh)
> - cs_info change (Bin)
> - Enable sunxi spi (Jagan)
> 
> Travis-CI:
> https://travis-ci.org/openedev/u-boot-amarula/builds/602483415
> 
> Thanks,
> Jagan.
> 
> The following changes since commit 17fd9915a4c639381804ed28274fa136ae3b0bee:
> 
>   Merge branch '2019-10-24-UFS-support' (2019-10-24 09:51:48 -0400)
> 
> are available in the Git repository at:
> 
>   https://gitlab.denx.de/u-boot/custodians/u-boot-spi master
> 
> for you to fetch changes up to 395ec7418695e5ce23f8b48c01a1dbffd2e52d3f:
> 
>   spi-nor-ids: Add support for Adesto AT25SL321 (2019-10-25 00:48:32 +0530)
> 

So, looking over the build output, I see the expected size increase in
sunxi due to new support. But I also see a lot of size increases in
rockchip and layerscape platforms (and possibly more, I stopped after
spotting two different SoCs), for example:
evb-px5: all +12139 data +176 rodata +2275 
spl/u-boot-spl:all +3529 spl/u-boot-spl:data +120 spl/u-boot-spl:rodata +309 
spl/u-boot-spl:text +3100 text +9688
   u-boot: add: 49/0, grow: 0/0 bytes: 9512/0 (9512)
 function   old new   delta
 spi_nor_scan -2032   +2032
 do_spi_flash -2008   +2008
 spi_get_bus_and_cs   - 436+436
 spi_mem_exec_op  - 420+420
 static.spi_nor_wait_till_ready_with_timeout   - 300
+300
 spi_nor_write- 300+300
 mtd_arg_off_size - 276+276
 spi_nor_erase- 232+232
 device_unbind- 232+232
 spi_nor_read_data- 220+220
 spi_nor_write_data   - 212+212
 dm_spi_claim_bus - 196+196
 spi_mem_adjust_op_size   - 160+160
 spi_mem_default_supports_op  - 156+156
 spi_nor_read - 152+152
 spi_flash_probe_bus_cs   - 152+152
 spi_set_speed_mode   - 148+148
 spi_flash_std_erase  - 136+136
 spi_flash_std_probe  - 132+132
 mtd_arg_off  - 124+124
 device_chld_unbind   - 120+120
 _u_boot_list_2_driver_2_spi_flash_std- 120+120
 spi_nor_write_reg- 104+104
 spi_find_bus_and_cs  - 104+104
 spi_nor_read_reg - 100+100
 spi_find_chip_select -  96 +96
 static.spi_check_buswidth_req-  88 +88
 str2off  -  80 +80
 bytes_per_second -  76 +76
 spi_flash_std_write  -  72 +72
 spi_flash_std_read   -  72 +72
 spi_mem_supports_op  -  56 +56
 _u_boot_list_2_cmd_2_sf  -  56 +56
 dm_spi_xfer  -  48 +48
 read_sr  -  44 +44
 device_find_next_child   -  40 +40
 spi_flash_cmd_get_sw_write_prot  -  36 +36
 dm_spi_release_bus   -  28 +28
 write_enable -  20 +20
 write_disable-  20 +20
 spi_flash_std_get_sw_write_prot  -  20 +20
 spi_flash_write_dm   -  16 +16
 spi_flash_read_dm-  16 +16
 spi_flash_erase_dm   -  16 +16
 spi_xfer -   8  +8
 spi_release_bus

Re: [U-Boot] [PATCH v2 36/41] serial: mxc: add imx53 and imx21 compatible string

[Robert Beckett]

On Wed, 2019-10-23 at 15:38 -0300, Fabio Estevam wrote:
> On Wed, Oct 23, 2019 at 3:36 PM Robert Beckett
>  wrote:
> > Add compatible string for imx53 and imx21.
> > 
> > Signed-off-by: Robert Beckett 
> > ---
> >  drivers/serial/serial_mxc.c | 2 ++
> >  1 file changed, 2 insertions(+)
> > 
> > diff --git a/drivers/serial/serial_mxc.c
> > b/drivers/serial/serial_mxc.c
> > index 42abb96a26..8e19a89151 100644
> > --- a/drivers/serial/serial_mxc.c
> > +++ b/drivers/serial/serial_mxc.c
> > @@ -348,6 +348,8 @@ static const struct udevice_id mxc_serial_ids[]
> > = {
> > { .compatible = "fsl,imx6ul-uart" },
> > { .compatible = "fsl,imx7d-uart" },
> > { .compatible = "fsl,imx6q-uart" },
> > +   { .compatible = "fsl,imx53-uart" },
> > +   { .compatible = "fsl,imx21-uart" },
> 
> Looks like you are using an old codebase.
> 
> U-Boot mainline already contains such compatible entries.

huh, yeah.
When it was originally written it didnt exist.
During rebase to master while upstreaming, it applied cleanly because
the added compatible strings were added at the top, so the existing
patch context was still valid.
Ill drop this patch.

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Re: [U-Boot] [PATCH v2 14/41] board: ge: mx53ppd: use DM I2C

[Robert Beckett]

On Thu, 2019-10-24 at 09:21 -0300, Fabio Estevam wrote:
> Hi Robert,
> 
> On Wed, Oct 23, 2019 at 3:22 PM Robert Beckett
>  wrote:
> 
> > +
> > + {
> > +   u-boot,dm-pre-reloc;
> 
> For these specific U-Boot properties it is recommended to place them
> inside a specifc u-boot.dtsi file.
> 
> Please refer to arch/arm/dts/imx7ulp-uboot.dtsi as an example.
> 
> This way you could sync the U-Boot dts with Linux and deal with the
> U-Boot specific properties in the uboot.dtsi file.

Good idea, thanks.

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Re: [U-Boot] [PATCH v2 07/41] board: ge: bx50v3: use imx wdt

[Robert Beckett]

On Wed, 2019-10-23 at 17:33 -0300, Fabio Estevam wrote:
> On Wed, Oct 23, 2019 at 3:22 PM Robert Beckett
>  wrote:
> > Enable DM imx WDT
> > Enable SYSRESET_WATCHDOG to maintain WDT based reset ability
> > 
> > Signed-off-by: Robert Beckett 
> > ---
> >  arch/arm/dts/imx6q-bx50v3.dts | 4 
> >  configs/ge_bx50v3_defconfig   | 3 +++
> >  2 files changed, 7 insertions(+)
> > 
> > diff --git a/arch/arm/dts/imx6q-bx50v3.dts b/arch/arm/dts/imx6q-
> > bx50v3.dts
> > index 28a35394f0..2e2e3bbc24 100644
> > --- a/arch/arm/dts/imx6q-bx50v3.dts
> > +++ b/arch/arm/dts/imx6q-bx50v3.dts
> > @@ -18,6 +18,10 @@
> > ethernet0 = 
> > };
> > 
> > +   wdt-reboot {
> > +   compatible = "wdt-reboot";
> > +   wdt = <>;
> > +   };
> >  };
> 
> Looking at  arch/arm/boot/dts/imx6q-bx50v3.dtsi from Linux, which
> includes arch/arm/boot/dts/imx6q-bx50v3.dtsi, the wdog definition is
> present:
> 
>  {
> pinctrl-names = "default";
> pinctrl-0 = <_wdog>;
> fsl,ext-reset-output;
> };
> 
> So it would be better just use the same bindings in U-Boot without
> the
> need of deviating the device tree.

wdt-reboot is a node to represent the wdt based sysreset driver.
It references the existing wdog1 via a phandle.
See drivers/sysreset/sysreset_watchdog.c



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[U-Boot] [PATCH v6 1/3] cmd: nand/sf: isolate legacy code

[Miquel Raynal]

The 'sf' command is not supposed to rely on the MTD stack, but both
'sf' and 'nand' commands use helpers located in mtd_uboot.c. Despite
their location, these functions do not depend at all on the MTD
stack.

This file (drivers/mtd/mtd_uboot.c) is only compiled if CONFIG_MTD is
selected, which is inconsistent with the current situation. Solve this
by moving these three functions (which are only used by the above two
commands) out of mtd_uboot.c and put them in a C file only compiled
with cmd/sf.c and cmd/nand.c.

Signed-off-by: Miquel Raynal 
---
 cmd/Makefile|  3 ++
 cmd/legacy-mtd-utils.c  | 99 +
 cmd/legacy-mtd-utils.h  | 14 ++
 cmd/nand.c  |  2 +
 cmd/sf.c|  2 +
 drivers/mtd/Makefile|  2 +-
 drivers/mtd/mtd_uboot.c | 94 --
 include/linux/mtd/mtd.h |  6 ---
 8 files changed, 121 insertions(+), 101 deletions(-)
 create mode 100644 cmd/legacy-mtd-utils.c
 create mode 100644 cmd/legacy-mtd-utils.h

diff --git a/cmd/Makefile b/cmd/Makefile
index ac843b4b16..88b77c9f78 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -97,6 +97,9 @@ obj-$(CONFIG_CMD_MMC) += mmc.o
 obj-$(CONFIG_MP) += mp.o
 obj-$(CONFIG_CMD_MTD) += mtd.o
 obj-$(CONFIG_CMD_MTDPARTS) += mtdparts.o
+ifneq ($(CONFIG_CMD_NAND)$(CONFIG_CMD_SF),)
+obj-y += legacy-mtd-utils.o
+endif
 obj-$(CONFIG_CMD_NAND) += nand.o
 obj-$(CONFIG_CMD_NET) += net.o
 obj-$(CONFIG_CMD_NVEDIT_EFI) += nvedit_efi.o
diff --git a/cmd/legacy-mtd-utils.c b/cmd/legacy-mtd-utils.c
new file mode 100644
index 00..1aa3bfc8ec
--- /dev/null
+++ b/cmd/legacy-mtd-utils.c
@@ -0,0 +1,99 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+int get_part(const char *partname, int *idx, loff_t *off, loff_t *size,
+loff_t *maxsize, int devtype)
+{
+#ifdef CONFIG_CMD_MTDPARTS
+   struct mtd_device *dev;
+   struct part_info *part;
+   u8 pnum;
+   int ret;
+
+   ret = mtdparts_init();
+   if (ret)
+   return ret;
+
+   ret = find_dev_and_part(partname, , , );
+   if (ret)
+   return ret;
+
+   if (dev->id->type != devtype) {
+   printf("not same typ %d != %d\n", dev->id->type, devtype);
+   return -1;
+   }
+
+   *off = part->offset;
+   *size = part->size;
+   *maxsize = part->size;
+   *idx = dev->id->num;
+
+   return 0;
+#else
+   puts("mtdparts support missing.\n");
+   return -1;
+#endif
+}
+
+int mtd_arg_off(const char *arg, int *idx, loff_t *off, loff_t *size,
+   loff_t *maxsize, int devtype, uint64_t chipsize)
+{
+   if (!str2off(arg, off))
+   return get_part(arg, idx, off, size, maxsize, devtype);
+
+   if (*off >= chipsize) {
+   puts("Offset exceeds device limit\n");
+   return -1;
+   }
+
+   *maxsize = chipsize - *off;
+   *size = *maxsize;
+   return 0;
+}
+
+int mtd_arg_off_size(int argc, char *const argv[], int *idx, loff_t *off,
+loff_t *size, loff_t *maxsize, int devtype,
+uint64_t chipsize)
+{
+   int ret;
+
+   if (argc == 0) {
+   *off = 0;
+   *size = chipsize;
+   *maxsize = *size;
+   goto print;
+   }
+
+   ret = mtd_arg_off(argv[0], idx, off, size, maxsize, devtype,
+ chipsize);
+   if (ret)
+   return ret;
+
+   if (argc == 1)
+   goto print;
+
+   if (!str2off(argv[1], size)) {
+   printf("'%s' is not a number\n", argv[1]);
+   return -1;
+   }
+
+   if (*size > *maxsize) {
+   puts("Size exceeds partition or device limit\n");
+   return -1;
+   }
+
+print:
+   printf("device %d ", *idx);
+   if (*size == chipsize)
+   puts("whole chip\n");
+   else
+   printf("offset 0x%llx, size 0x%llx\n",
+  (unsigned long long)*off, (unsigned long long)*size);
+   return 0;
+}
diff --git a/cmd/legacy-mtd-utils.h b/cmd/legacy-mtd-utils.h
new file mode 100644
index 00..b31342bcb7
--- /dev/null
+++ b/cmd/legacy-mtd-utils.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __LEGACY_MTD_UTILS_H
+#define __LEGACY_MTD_UTILS_H
+
+int get_part(const char *partname, int *idx, loff_t *off, loff_t *size,
+loff_t *maxsize, int devtype);
+int mtd_arg_off(const char *arg, int *idx, loff_t *off, loff_t *size,
+   loff_t *maxsize, int devtype, uint64_t chipsize);
+int mtd_arg_off_size(int argc, char *const argv[], int *idx, loff_t *off,
+loff_t *size, loff_t *maxsize, int devtype,
+uint64_t chipsize);
+
+#endif /* LEGACY_MTD_UTILS_H */
diff --git a/cmd/nand.c b/cmd/nand.c
index 27efef20bc..f40936cf68 100644
--- a/cmd/nand.c
+++ b/cmd/nand.c

[U-Boot] [PATCH v6 2/3] cmd: make MTD commands depend on MTD

[Miquel Raynal]

Defconfigs have been fixed, now we can add proper dependencies in
Kconfig. SPI FLASH is still not dependent on MTD (deeper rework needed).

Signed-off-by: Miquel Raynal 
---
 cmd/Kconfig | 10 +++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 33adf29a96..01d4330e04 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -799,6 +799,7 @@ config CMD_FDC
 config CMD_FLASH
bool "flinfo, erase, protect"
default y
+   depends on MTD
help
  NOR flash support.
flinfo - print FLASH memory information
@@ -988,6 +989,7 @@ config CMD_MMC_SWRITE
 
 config CMD_MTD
bool "mtd"
+   depends on MTD
select MTD_PARTITIONS
help
  MTD commands support.
@@ -995,6 +997,7 @@ config CMD_MTD
 config CMD_NAND
bool "nand"
default y if NAND_SUNXI
+   depends on MTD_RAW_NAND
help
  NAND support.
 
@@ -1026,6 +1029,7 @@ config CMD_NVME
 
 config CMD_ONENAND
bool "onenand - access to onenand device"
+   depends on MTD
help
  OneNAND is a brand of NAND ('Not AND' gate) flash which provides
  various useful features. This command allows reading, writing,
@@ -1895,7 +1899,7 @@ config CMD_JFFS2
 
 config CMD_MTDPARTS
bool "MTD partition support"
-   select MTD if (CMD_NAND || NAND)
+   depends on MTD
help
  MTD partitioning tool support.
  It is strongly encouraged to avoid using this command
@@ -1915,14 +1919,14 @@ config CMD_MTDPARTS_SPREAD
 
 config MTDIDS_DEFAULT
string "Default MTD IDs"
-   depends on MTD_PARTITIONS || CMD_MTDPARTS || CMD_NAND || CMD_FLASH
+   depends on MTD || SPI_FLASH
help
  Defines a default MTD IDs list for use with MTD partitions in the
  Linux MTD command line partitions format.
 
 config MTDPARTS_DEFAULT
string "Default MTD partition scheme"
-   depends on MTD_PARTITIONS || CMD_MTDPARTS || CMD_NAND || CMD_FLASH
+   depends on MTD || SPI_FLASH
help
  Defines a default MTD partitioning scheme in the Linux MTD command
  line partitions format
-- 
2.20.1

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[U-Boot] [PATCH v6 0/3] End of the MTD makefile cleanup

[Miquel Raynal]

As rightfully pointed by Jagan, I should have dropped the dependency
of cmd/sf.c and cmd/nand.c on mtd_uboot.c in patch 24/26 of the "MTD
defconfigs/Kconfigs/Makefiles heavy cleanup" v5 series.

Instead of sending the 40 patches again, here are only the last three
patches with:
* patch 1 (24/26) being corrected as per Jagan's comment
* patch 2 (25/26) is untouched
* patch 3 (26/26) is almost untouched but I had to resolve a conflict
  due to patch 1.

Thanks,
Miquèl

Miquel Raynal (3):
  cmd: nand/sf: isolate legacy code
  cmd: make MTD commands depend on MTD
  mtd: Makefile: deep cleanup

 Makefile  |  5 --
 cmd/Kconfig   | 10 ++--
 cmd/Makefile  |  3 ++
 cmd/legacy-mtd-utils.c| 99 +++
 cmd/legacy-mtd-utils.h| 14 ++
 cmd/nand.c|  2 +
 cmd/sf.c  |  2 +
 drivers/Makefile  |  7 +--
 drivers/mtd/Makefile  | 50 ++--
 drivers/mtd/mtd_uboot.c   | 94 -
 drivers/mtd/nand/Makefile |  5 ++
 include/linux/mtd/mtd.h   |  6 ---
 12 files changed, 169 insertions(+), 128 deletions(-)
 create mode 100644 cmd/legacy-mtd-utils.c
 create mode 100644 cmd/legacy-mtd-utils.h

-- 
2.20.1

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[U-Boot] [PATCH v6 3/3] mtd: Makefile: deep cleanup

[Miquel Raynal]

Move MTD-related lines out of the root Makefile. Put them in their
respective directories. Enclose some of these new lines to skip them
when building the SPL. MTD core files and some MTD device drivers are
compiled in a mtd.o object and included in the final object only if
MTD support is required (there are two different symbols for that, one
for U-Boot and one for the SPL).

Now that all defconfigs have been fixed, we can stop the logic where
enabling a command selects the core files to compile. This logic is
broken since selecting a symbol with a 'depends on' will not enforce
this secondary dependency.

Signed-off-by: Miquel Raynal 
---
 Makefile  |  5 
 drivers/Makefile  |  7 ++
 drivers/mtd/Makefile  | 50 +++
 drivers/mtd/nand/Makefile |  5 
 4 files changed, 42 insertions(+), 25 deletions(-)

diff --git a/Makefile b/Makefile
index 1d9ade948b..e55c0b236e 100644
--- a/Makefile
+++ b/Makefile
@@ -708,11 +708,6 @@ libs-y += drivers/
 libs-y += drivers/dma/
 libs-y += drivers/gpio/
 libs-y += drivers/i2c/
-libs-y += drivers/mtd/
-libs-$(CONFIG_CMD_NAND) += drivers/mtd/nand/raw/
-libs-y += drivers/mtd/onenand/
-libs-$(CONFIG_CMD_UBI) += drivers/mtd/ubi/
-libs-y += drivers/mtd/spi/
 libs-y += drivers/net/
 libs-y += drivers/net/phy/
 libs-y += drivers/power/ \
diff --git a/drivers/Makefile b/drivers/Makefile
index a4bb5e4975..708aa2a1a7 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -11,7 +11,7 @@ obj-$(CONFIG_$(SPL_TPL_)I2C_SUPPORT) += i2c/
 obj-$(CONFIG_$(SPL_TPL_)INPUT) += input/
 obj-$(CONFIG_$(SPL_TPL_)LED) += led/
 obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += mmc/
-obj-$(CONFIG_$(SPL_TPL_)NAND_SUPPORT) += mtd/nand/raw/
+obj-y += mtd/
 obj-$(CONFIG_$(SPL_TPL_)PCH_SUPPORT) += pch/
 obj-$(CONFIG_$(SPL_TPL_)PCI) += pci/
 obj-$(CONFIG_$(SPL_TPL_)PHY) += phy/
@@ -19,7 +19,6 @@ obj-$(CONFIG_$(SPL_TPL_)PINCTRL) += pinctrl/
 obj-$(CONFIG_$(SPL_TPL_)RAM) += ram/
 obj-$(CONFIG_$(SPL_TPL_)RTC_SUPPORT) += rtc/
 obj-$(CONFIG_$(SPL_TPL_)SERIAL_SUPPORT) += serial/
-obj-$(CONFIG_$(SPL_TPL_)SPI_FLASH_SUPPORT) += mtd/spi/
 obj-$(CONFIG_$(SPL_TPL_)SPI_SUPPORT) += spi/
 obj-$(CONFIG_$(SPL_TPL_)TIMER) += timer/
 obj-$(CONFIG_$(SPL_TPL_)VIRTIO) += virtio/
@@ -42,9 +41,6 @@ obj-$(CONFIG_SPL_POWER_SUPPORT) += power/ power/pmic/
 obj-$(CONFIG_SPL_POWER_SUPPORT) += power/regulator/
 obj-$(CONFIG_SPL_POWER_DOMAIN) += power/domain/
 obj-$(CONFIG_SPL_DM_RESET) += reset/
-obj-$(CONFIG_SPL_MTD_SUPPORT) += mtd/
-obj-$(CONFIG_SPL_ONENAND_SUPPORT) += mtd/onenand/
-obj-$(CONFIG_SPL_UBI) += mtd/ubispl/
 obj-$(CONFIG_SPL_DMA_SUPPORT) += dma/
 obj-$(CONFIG_SPL_ETH_SUPPORT) += net/
 obj-$(CONFIG_SPL_ETH_SUPPORT) += net/phy/
@@ -102,6 +98,7 @@ obj-$(CONFIG_QE) += qe/
 obj-$(CONFIG_U_QE) += qe/
 obj-y += mailbox/
 obj-y += memory/
+obj-y += mtd/
 obj-y += pwm/
 obj-y += reset/
 obj-y += input/
diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile
index c9a96adace..fd4c6687cb 100644
--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
@@ -3,20 +3,40 @@
 # (C) Copyright 2000-2007
 # Wolfgang Denk, DENX Software Engineering, w...@denx.de.
 
-ifneq (,$(findstring y,$(CONFIG_MTD)$(CONFIG_CMD_ONENAND)$(CONFIG_CMD_MTD)))
-obj-y += mtdcore.o mtd_uboot.o
+mtd-$(CONFIG_MTD) += mtdcore.o mtd_uboot.o
+mtd-$(CONFIG_DM_MTD) += mtd-uclass.o
+mtd-$(CONFIG_MTD_PARTITIONS) += mtdpart.o
+mtd-$(CONFIG_MTD_CONCAT) += mtdconcat.o
+mtd-$(CONFIG_ALTERA_QSPI) += altera_qspi.o
+mtd-$(CONFIG_FLASH_CFI_DRIVER) += cfi_flash.o
+mtd-$(CONFIG_FLASH_CFI_MTD) += cfi_mtd.o
+mtd-$(CONFIG_FLASH_CFI_LEGACY) += jedec_flash.o
+mtd-$(CONFIG_MW_EEPROM) += mw_eeprom.o
+mtd-$(CONFIG_FLASH_PIC32) += pic32_flash.o
+mtd-$(CONFIG_ST_SMI) += st_smi.o
+mtd-$(CONFIG_STM32_FLASH) += stm32_flash.o
+mtd-$(CONFIG_RENESAS_RPC_HF) += renesas_rpc_hf.o
+
+# U-Boot build
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
+
+ifneq ($(mtd-y),)
+obj-y += mtd.o
 endif
-obj-$(CONFIG_DM_MTD) += mtd-uclass.o
-obj-$(CONFIG_MTD_PARTITIONS) += mtdpart.o
-obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o
-obj-$(CONFIG_ALTERA_QSPI) += altera_qspi.o
-obj-$(CONFIG_FLASH_CFI_DRIVER) += cfi_flash.o
-obj-$(CONFIG_FLASH_CFI_MTD) += cfi_mtd.o
-obj-$(CONFIG_FLASH_CFI_LEGACY) += jedec_flash.o
-obj-$(CONFIG_MW_EEPROM) += mw_eeprom.o
-obj-$(CONFIG_FLASH_PIC32) += pic32_flash.o
-obj-$(CONFIG_ST_SMI) += st_smi.o
-obj-$(CONFIG_STM32_FLASH) += stm32_flash.o
-obj-$(CONFIG_RENESAS_RPC_HF) += renesas_rpc_hf.o
-
 obj-y += nand/
+obj-y += onenand/
+obj-y += spi/
+obj-$(CONFIG_MTD_UBI) += ubi/
+
+#SPL/TPL build
+else
+
+ifneq ($(mtd-y),)
+obj-$(CONFIG_SPL_MTD_SUPPORT) += mtd.o
+endif
+obj-$(CONFIG_$(SPL_TPL_)NAND_SUPPORT) += nand/
+obj-$(CONFIG_SPL_ONENAND_SUPPORT) += onenand/
+obj-$(CONFIG_$(SPL_TPL_)SPI_FLASH_SUPPORT) += spi/
+obj-$(CONFIG_SPL_UBI) += ubispl/
+
+endif
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index a358bc680e..96e186600a 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -1,5 +1,10 @@
 # 

Re: [U-Boot] [PATCH v5 24/26] cmd: nand/sf: isolate legacy code

[Miquel Raynal]

Hi Jagan,

Jagan Teki  wrote on Fri, 25 Oct 2019
15:16:38 +0530:

> On Fri, Oct 25, 2019 at 3:06 PM Miquel Raynal  
> wrote:
> >
> > Hi Jagan,
> >
> > Jagan Teki  wrote on Fri, 25 Oct 2019
> > 14:57:36 +0530:
> >  
> > > Hi Miquel,
> > >
> > > On Fri, Oct 25, 2019 at 2:55 PM Miquel Raynal  
> > > wrote:  
> > > >
> > > > Hi Jagan,
> > > >
> > > > Jagan Teki  wrote on Fri, 25 Oct 2019
> > > > 14:44:38 +0530:
> > > >  
> > > > > On Thu, Oct 3, 2019 at 11:21 PM Miquel Raynal 
> > > > >  wrote:  
> > > > > >
> > > > > > The 'sf' command is not supposed to rely on the MTD stack, but both
> > > > > > 'sf' and 'nand' commands use helpers located in mtd_uboot.c. Despite
> > > > > > their location, these functions do not depend at all on the MTD
> > > > > > stack.
> > > > > >
> > > > > > This file (drivers/mtd/mtd_uboot.c) is only compiled if CONFIG_MTD 
> > > > > > is
> > > > > > selected, which is inconsistent with the current situation. Solve 
> > > > > > this
> > > > > > by moving these three functions (which are only used by the above 
> > > > > > two
> > > > > > commands) out of mtd_uboot.c and put them in a C file only compiled
> > > > > > with cmd/sf.c and cmd/nand.c.
> > > > > >
> > > > > > Signed-off-by: Miquel Raynal 
> > > > > > ---
> > > > > >  cmd/Makefile|  3 ++
> > > > > >  cmd/legacy-mtd-utils.c  | 99 
> > > > > > +
> > > > > >  cmd/legacy-mtd-utils.h  | 14 ++
> > > > > >  cmd/nand.c  |  2 +
> > > > > >  cmd/sf.c|  2 +
> > > > > >  drivers/mtd/mtd_uboot.c | 94 
> > > > > > --  
> > > > >
> > > > > Better to drop CMD_SF, CMD_NAND in makefile so-that it can't build
> > > > > this file in this patch.  
> > > >
> > > > I don't understand what you mean. Can you please detail what you have
> > > > in mind for this patch?
> > > >
> > > > Is it something blocking for you? Or is it something that should be
> > > > taken care of after?  
> > >
> > > I think it is simple rebase, this patch is moving code from
> > > mtd_uboot.c to legacy-mtd-utils.c but mtd_uboot still building. I'm
> > > saying to make change on drivers/mtd/Makefile to drop SF, NAND
> > > dependency.  
> >
> > What do you mean by "mtd_uboot still building"? Do you mean it is a
> > problem? Or did I forgot something?
> >
> > I don't see what CMD_SF/CMD_NAND dependency you are referring to. Can
> > you please share a snippet of code?  
> 
> -ifneq (,$(findstring
> y,$(CONFIG_MTD_DEVICE)$(CONFIG_CMD_NAND)$(CONFIG_CMD_ONENAND)$(CONFIG_CMD_SF)$(CONFIG_CMD_MTD)))
> +ifneq (,$(findstring
> y,$(CONFIG_MTD_DEVICE)$(CONFIG_CMD_ONENAND)$(CONFIG_CMD_MTD)))
>  obj-y += mtdcore.o mtd_uboot.o
>  endif
>  obj-$(CONFIG_MTD) += mtd-uclass.o


Indeed! Thanks for the clarification.
Please apply patches 1 to 23 of this series, I am resending 24-26
corrected.

Thanks,
Miquèl
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Re: [U-Boot] [PATCH v2 01/17] linux_compat: move kmemdup() from ubifs.c to linux_compat.c

[Heinrich Schuchardt]

On 10/25/19 12:07 PM, AKASHI Takahiro wrote:
> linux_compat.c is the best place for kmemdup(), which is currenly used
> only in ubifs.c, but will also be used when other kernel files
> (in my case, lib/crypto/x509_cert_parser.c and pkcs7_parser.c) will be
> imported. So just move it.
>
> Signed-off-by: AKASHI Takahiro 
> ---
>  fs/ubifs/ubifs.c   | 19 +--
>  lib/linux_compat.c | 17 +
>  2 files changed, 18 insertions(+), 18 deletions(-)
>
> diff --git a/fs/ubifs/ubifs.c b/fs/ubifs/ubifs.c
> index 67a0e8caae70..1ffdfe0d9089 100644
> --- a/fs/ubifs/ubifs.c
> +++ b/fs/ubifs/ubifs.c
> @@ -18,6 +18,7 @@
>  #include "ubifs.h"
>  #include 
>
> +#include 
>  #include 
>  #include 
>
> @@ -70,24 +71,6 @@ struct ubifs_compressor 
> *ubifs_compressors[UBIFS_COMPR_TYPES_CNT];
>
>
>  #ifdef __UBOOT__
> -/* from mm/util.c */
> -
> -/**
> - * kmemdup - duplicate region of memory
> - *
> - * @src: memory region to duplicate
> - * @len: memory region length
> - * @gfp: GFP mask to use
> - */
> -void *kmemdup(const void *src, size_t len, gfp_t gfp)
> -{
> - void *p;
> -
> - p = kmalloc(len, gfp);
> - if (p)
> - memcpy(p, src, len);
> - return p;
> -}
>
>  struct crypto_comp {
>   int compressor;
> diff --git a/lib/linux_compat.c b/lib/linux_compat.c
> index 6373b4451eb3..1f8ef4266613 100644
> --- a/lib/linux_compat.c
> +++ b/lib/linux_compat.c
> @@ -40,3 +40,20 @@ void *kmem_cache_alloc(struct kmem_cache *obj, int flag)
>  {
>   return malloc_cache_aligned(obj->sz);
>  }
> +
> +/**
> + * kmemdup - duplicate region of memory
> + *
> + * @src: memory region to duplicate
> + * @len: memory region length
> + * @gfp: GFP mask to use

Please add a 'Return:' line here. Linux has:

 * Return: newly allocated copy of @src or %NULL in case of error

Otherwise

Reviewed-by: Heinrich Schuchardt 

> + */
> +void *kmemdup(const void *src, size_t len, gfp_t gfp)
> +{
> + void *p;
> +
> + p = kmalloc(len, gfp);
> + if (p)
> + memcpy(p, src, len);
> + return p;
> +}
>

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Re: [U-Boot] [PATCH] usb: composite: add BOS descriptor support to composite framework

[T Karthik Reddy]

Hi Vignesh,

> -Original Message-
> From: Vignesh Raghavendra 
> Sent: Friday, October 25, 2019 10:13 AM
> To: Michal Simek ; u-boot@lists.denx.de; git
> 
> Cc: Marek Vasut ; T Karthik Reddy 
> Subject: Re: [U-Boot] [PATCH] usb: composite: add BOS descriptor support to
> composite framework
> 
> Hi Michal,
> 
> On 14/10/19 6:22 PM, Michal Simek wrote:
> > From: T Karthik Reddy 
> >
> > To add usb-3.0 support to peripheral device add BOS & SS capability
> > descriptors to gadget composite framework.
> >
> 
> How was this patch tested? With what gadget function driver was this
> tested?
> I don't see *any* function drivers claiming SS support. (For e.g.: UMS only
> declares fsg_hs_bulk_in_desc but not fsg_ss_bulk_in_desc like in kernel),
> Without any function drivers claiming and implementing SS support how is
> this supposed to work? Or did I miss something?

Commit 771e76515ed5abe7eff73a54ccb0c9ae55f34388 has added support for detecting 
usb 3.0 device. For the enquiry from host we are sending bos descriptor to host 
as a part to support 3.0 & we have tested it with DFU function.

Regards
T karthik
> 
> Regards
> Vignesh
> 
> > Signed-off-by: T Karthik Reddy 
> > Signed-off-by: Siva Durga Prasad Paladugu
> > 
> > Signed-off-by: Michal Simek 
> > ---
> >
> >  drivers/usb/gadget/composite.c | 61
> ++
> >  include/linux/usb/ch9.h|  3 ++
> >  include/linux/usb/gadget.h |  9 +
> >  3 files changed, 67 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/usb/gadget/composite.c
> > b/drivers/usb/gadget/composite.c index c7e762374752..618a7d5016ee
> > 100644
> > --- a/drivers/usb/gadget/composite.c
> > +++ b/drivers/usb/gadget/composite.c
> > @@ -688,6 +688,57 @@ static void composite_setup_complete(struct
> usb_ep *ep, struct usb_request *req)
> > req->status, req->actual, req->length);  }
> >
> > +static int bos_desc(struct usb_composite_dev *cdev) {
> > +   struct usb_ext_cap_descriptor   *usb_ext;
> > +   struct usb_bos_descriptor   *bos = cdev->req->buf;
> > +
> > +   bos->bLength = USB_DT_BOS_SIZE;
> > +   bos->bDescriptorType = USB_DT_BOS;
> > +
> > +   bos->wTotalLength = cpu_to_le16(USB_DT_BOS_SIZE);
> > +   bos->bNumDeviceCaps = 0;
> > +
> > +   /*
> > +* A SuperSpeed device shall include the USB2.0 extension descriptor
> > +* and shall support LPM when operating in USB2.0 HS mode.
> > +*/
> > +   usb_ext = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
> > +   bos->bNumDeviceCaps++;
> > +   le16_add_cpu(>wTotalLength, USB_DT_USB_EXT_CAP_SIZE);
> > +   usb_ext->bLength = USB_DT_USB_EXT_CAP_SIZE;
> > +   usb_ext->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
> > +   usb_ext->bDevCapabilityType = USB_CAP_TYPE_EXT;
> > +   usb_ext->bmAttributes =
> > +   cpu_to_le32(USB_LPM_SUPPORT | USB_BESL_SUPPORT);
> > +
> > +   /*
> > +* The Superspeed USB Capability descriptor shall be implemented
> > +* by all SuperSpeed devices.
> > +*/
> > +   if (gadget_is_superspeed(cdev->gadget)) {
> > +   struct usb_ss_cap_descriptor *ss_cap;
> > +
> > +   ss_cap = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
> > +   bos->bNumDeviceCaps++;
> > +   le16_add_cpu(>wTotalLength,
> USB_DT_USB_SS_CAP_SIZE);
> > +   ss_cap->bLength = USB_DT_USB_SS_CAP_SIZE;
> > +   ss_cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
> > +   ss_cap->bDevCapabilityType = USB_SS_CAP_TYPE;
> > +   ss_cap->bmAttributes = 0; /* LTM is not supported yet */
> > +   ss_cap->wSpeedSupported =
> > +   cpu_to_le16(USB_LOW_SPEED_OPERATION |
> > +   USB_FULL_SPEED_OPERATION |
> > +   USB_HIGH_SPEED_OPERATION |
> > +   USB_5GBPS_OPERATION);
> > +   ss_cap->bFunctionalitySupport =
> USB_LOW_SPEED_OPERATION;
> > +   ss_cap->bU1devExitLat = USB_DEFAULT_U1_DEV_EXIT_LAT;
> > +   ss_cap->bU2DevExitLat =
> > +   cpu_to_le16(USB_DEFAULT_U2_DEV_EXIT_LAT);
> > +   }
> > +   return le16_to_cpu(bos->wTotalLength); }
> > +
> >  /*
> >   * The setup() callback implements all the ep0 functionality that's
> >   * not handled lower down, in hardware or the hardware driver(like @@
> > -776,12 +827,10 @@ composite_setup(struct usb_gadget *gadget, const
> struct usb_ctrlrequest *ctrl)
> > value = min(w_length, (u16) value);
> > break;
> > case USB_DT_BOS:
> > -   /*
> > -* The USB compliance test (USB 2.0 Command
> Verifier)
> > -* issues this request. We should not run into the
> > -* default path here. But return for now until
> > -* the superspeed support is added.
> > -*/
> > +   if (gadget_is_superspeed(cdev->gadget))
> > +   value 

[U-Boot] [PATCH] usb: ehci: add ehci max xfer size ehci config entry

[Gilles DOFFE]

Some USB sticks cannot handle SIZE_MAX bytes (65535) blocks transfer,
leading to 'EHCI timed out on TD' errors.
As it is hardly predictable, this commit adds a configuration option
to easily reduce this EHCI max transfer size. The default value is 65535
which corresponds to size_t max value (SIZE_MAX).

Signed-off-by: Gilles DOFFE 
---
 drivers/usb/host/Kconfig| 7 +++
 drivers/usb/host/ehci-hcd.c | 2 +-
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 30c6b69be8..62054c9c7a 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -222,6 +222,13 @@ config USB_EHCI_FSL
select  CONFIG_EHCI_HCD_INIT_AFTER_RESET
---help---
  Enables support for the on-chip EHCI controller on FSL chips.
+
+config USB_EHCI_MAX_XFER_SIZE
+int "USB EHCI max transfer size. The default value is 65535 which
+corresponds to size_t max value (SIZE_MAX)."
+default 65535
+range 1 65535
+
 endif # USB_EHCI_HCD
 
 config USB_OHCI_HCD
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 61a61abb21..8be1319079 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -1614,7 +1614,7 @@ static int ehci_get_max_xfer_size(struct udevice *dev, 
size_t *size)
 * EHCD can handle any transfer length as long as there is enough
 * free heap space left, hence set the theoretical max number here.
 */
-   *size = SIZE_MAX;
+   *size = CONFIG_USB_EHCI_MAX_XFER_SIZE;
 
return 0;
 }
-- 
2.20.1

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Re: [U-Boot] [RESEND PATCH v2 12/13] davinci: omapl138-lcdk: enable driver-model in SPL

[Rizvi, Mohammad Faiz Abbas]

Hi Barotz,

On 10/25/2019 9:40 PM, Bartosz Golaszewski wrote:
> czw., 26 wrz 2019 o 01:21 Faiz Abbas  napisał(a):
>>
>> Hi,
>>
>> On 29/07/19 12:28 PM, Bartosz Golaszewski wrote:
>>> From: Bartosz Golaszewski 
>>>
>>> Enable CONFIG_SPL_DM and enable the driver model for serial by defining
>>> an appropriate device in the board file for da850-lcdk.
>>>
>>
>> This breaks booting from MMC on omapl138_lcdk. You didn't add a
>> U_BOOT_DEVICE for the mmc node.
>>
>> Thanks,
>> Faiz
> 
> Just letting you know I haven't forgotten about this. I finally got
> some time to work on it this week, but it turned out to be
> non-trivial, as for some reason the set_cmd mmc callback is not being
> properly assigned in SPL with driver-model and I couldn't find out why
> so far.

I will try to look at it as well.

 Next week I'm at ELCE, but I'll be back at it on Thursday.

I'm at ELC as well. Will be nice to meet up with you and discuss this if
you want.

Thanks,
Faiz



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Re: [U-Boot] [PATCH 01/14] net: eth-uclass: eth_get_dev based on SEQ_ALIAS instead of probe order

[keerthy]

On 10/25/2019 5:35 PM, Tom Rini wrote:

On Tue, Aug 06, 2019 at 04:08:31PM +0530, Keerthy wrote:


In case of multiple eth interfaces currently eth_get_dev
fetches the device based on the probe order which can be
random hence try with the alias.

Signed-off-by: Keerthy 
---
  net/eth-uclass.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index 031d558625..f11c307b8c 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -68,8 +68,8 @@ struct udevice *eth_get_dev(void)
  
  	uc_priv = eth_get_uclass_priv();

if (!uc_priv->current)
-   eth_errno = uclass_first_device(UCLASS_ETH,
-   _priv->current);
+   eth_errno = uclass_get_device_by_seq(UCLASS_ETH,
+0, _priv->current);
return uc_priv->current;
  }


This breaks networking on qemu_arm / qemu_arm64 and no networking device
is found.


Okay. That is pretty strange. So seems like uclass_get_device_by_seq is 
failing for some reason.





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Re: [U-Boot] [PATCH] Makefile: fix dependency for imx targets

[Tom Rini]

On Fri, Oct 25, 2019 at 02:46:54PM +0200, Heiko Schocher wrote:

> imx targets are defined in arch/arm/mach-imx/Makefile.
> Some of them are dependent on targets defined in main
> Makefile. For the Makefile in arch/arm/mach-imx this
> targets must be finished before the imx targets are
> build, if not you get for example the error:
> 
> make -f /home/hs/abb/mainlining/u-boot/scripts/Makefile.build 
> obj=arch/arm/mach-imx u-boot-dtb.imx
> make[2]: *** No rule to make target 'u-boot-fit-dtb.bin', needed by 
> 'u-boot-dtb.imx'.  Stop.
> make[1]: *** [/home/hs/abb/mainlining/u-boot/Makefile:1123: u-boot-dtb.imx] 
> Error 2
> make[1]: *** Waiting for unfinished jobs
> make[1]: Leaving directory '/work/hs/compile/u-boot/aristainetos2_defconfig'
> make: *** [Makefile:148: sub-make] Error 2
> compile failed
> 
> In above case of CONFIG_MULTI_DTB_FIT is defined, the
> u-boot-dtb.imx is dependent on the u-boot-fit-dtb.bin
> which may is not build yet ...
> 
> I could reproduce this error on a travis build also if
> I build an out-of-tree build on a local machine with a
> build directory on a "slow" slow storage device. If
> building the same source target with a build dir on a
> fast storage device, the build works.
> 
> I found no solution to tell the arch/arm/mach-imx/Makefile
> to find the targets in main Makefile, if there is a way
> this would be the better fix.
> 
> I solved it by adding a IMX_DEPS var, which holds a list
> of main u-boot targets, which must be finished, before
> calling imx targets and fixed the build for imx
> targets which enabled CONFIG_MULTI_DTB_FIT.
> 
> I think it is just luck, that imx targets with
> CONFIG_OF_SEPARATE enabled build, because the
> u-boot-dtb.imx target depends on u-boot-dtb.bin
> which gets build early enough before starting with
> u-boot-dtb.imx. May this targets should be fixed too.
> 
> Signed-off-by: Heiko Schocher 

Reviewed-by: Tom Rini 

Good work figuring this out!  I'll pick it up directly soon as I know it
was blocking other stuff.

-- 
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Re: [U-Boot] [RESEND PATCH v2 12/13] davinci: omapl138-lcdk: enable driver-model in SPL

[Bartosz Golaszewski]

czw., 26 wrz 2019 o 01:21 Faiz Abbas  napisał(a):
>
> Hi,
>
> On 29/07/19 12:28 PM, Bartosz Golaszewski wrote:
> > From: Bartosz Golaszewski 
> >
> > Enable CONFIG_SPL_DM and enable the driver model for serial by defining
> > an appropriate device in the board file for da850-lcdk.
> >
>
> This breaks booting from MMC on omapl138_lcdk. You didn't add a
> U_BOOT_DEVICE for the mmc node.
>
> Thanks,
> Faiz

Just letting you know I haven't forgotten about this. I finally got
some time to work on it this week, but it turned out to be
non-trivial, as for some reason the set_cmd mmc callback is not being
properly assigned in SPL with driver-model and I couldn't find out why
so far. Next week I'm at ELCE, but I'll be back at it on Thursday. I'm
not sure if you want to revert the offending patch for now or this can
wait for another week?

Best regards,
Bartosz Golaszewski
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Re: [U-Boot] [PATCH v2 16/17] test: add lib specific Kconfig

[Tom Rini]

On Fri, Oct 25, 2019 at 07:07:48PM +0900, AKASHI Takahiro wrote:
> Adding new unit tests for library routines will make test/Kconfig
> messy. So just create a Kconfig file under lib.
> 
> Signed-off-by: AKASHI Takahiro 
> ---
>  test/Kconfig | 8 +---
>  test/lib/Kconfig | 7 +++
>  2 files changed, 8 insertions(+), 7 deletions(-)
>  create mode 100644 test/lib/Kconfig
> 
> diff --git a/test/Kconfig b/test/Kconfig
> index 48a0e501f88f..3a5aabedd0ef 100644
> --- a/test/Kconfig
> +++ b/test/Kconfig
> @@ -6,13 +6,7 @@ menuconfig UNIT_TEST
> This does not require sandbox to be included, but it is most
> often used there.
>  
> -config UT_LIB
> - bool "Unit tests for library functions"
> - depends on UNIT_TEST
> - default y
> - help
> -   Enables the 'ut lib' command which tests library functions like
> -   memcat(), memcyp(), memmove().
> +source "test/lib/Kconfig"
>  
>  config UT_TIME
>   bool "Unit tests for time functions"
> diff --git a/test/lib/Kconfig b/test/lib/Kconfig
> new file mode 100644
> index ..a983bdcaa3f1
> --- /dev/null
> +++ b/test/lib/Kconfig
> @@ -0,0 +1,7 @@
> +config UT_LIB
> + bool "Unit tests for library functions"
> + depends on UNIT_TEST
> + default y
> + help
> +   Enables the 'ut lib' command which tests library functions like
> +   memcat(), memcyp(), memmove().

But we then only add one more entry in the next patch.  How many library
tests do you see adding when everything is done?  If it's less than 5,
we should just keep things in the test/Kconfig file I think.  The rest
of the series seems fine, thanks!

-- 
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Re: [U-Boot] [PATCH 1/1] dwc3-generic: Don't fail probe if clk/reset entries are absent

[Marek Vasut]

On 10/25/19 10:18 AM, Vignesh Raghavendra wrote:
> Some boards don't populate clk/reset entries as these are are optional
> as per binding documentation. Therefore, don't fail driver probe if
> clk/reset entries are absent in DT.
> 
> This fixes fastboot failures seen due to enabling of CONFIG_CLK on AM57xx

Applied, thanks.
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Re: [U-Boot] Cavium/Marvell Octeon Support

[Daniel Schwierzeck]

Hi Aaron,

Am 23.10.19 um 05:50 schrieb Aaron Williams:
> Hi all,
> 
> I have been tasked with porting our Octeon U-Boot to the latest U-Boot
> and merging it upstream. This will involve a very significant amount of
> code that generally will not be compatible with other MIPS processors
> due to our needs and requirements. For example, the start.S will need to
> be completely different than what is present. For example, our existing
> start.S is 3577 lines of code in order to deal with things like RAS,
> exceptions, virtual memory and more. We need to use virtual memory since
> U-Boot can be loaded at any 4MB boundary in memory, not just 0xbfc0.
> A number of drivers will need to be updated in order to properly map
> pointers to physical addresses. This is needed anyway, since I see
> numerous drivers that assume that a pointer is a DMA address. For MIPS
> this is never the case (I'm looking at XHCI).

Good to see some progress in mainline Octeon support. Could you briefly
describe the differences and commonalities in booting an Octeon CPU
compared to other "generic" MIPS cores? Or could you point me to a
public Git tree? It can't be that different because Linux kernel is also
able to share most of the code ;)

In principle you could compile an own start.S in your mach-octeon
directory, but you should try to use the generic start.S which is
already customisable and extensible. If needed, we could add more
extension points to it. Booting from any custom memory address is
already supported and very common for other MIPS based SoC's. Exception
support is also already there.

> 
> The new Octeon U-Boot will be native 64-bit instead of how the earlier
> one was 32-bit using the N32 ABI (so 64-bit addresses could be
> accessed). We had to jump through some hoops to make a 32-bit U-Boot
> fully support 64-bit hardware.

We have 64 bit support for MIPS. I even sync'ed the asm/io stuff from
Linux in the past (which includes support for Octeon) so that you would
be able to use the standard IO primitives and ioremap stuff and hook in
your platform-specifc memory mappings.

> 
> I think we can shrink the code by removing support for starting "simple
> executive" tasks. Simple executive tasks are bare metal applications
> that can run on dedicated cores beside Linux (or without Linux). I will
> also not be porting any support for anything older than Octeon3.
> 
> We also make heavy use of our SDK in order to perform hardware
> initialization and networking. In our old U-Boot, we have almost 900K
> lines of code. I can cut out much of this but much will remain.
> 
> We also have added extensive infrastructure for handling SFP and QSFP
> cables as well as very extensive phy support for phys from
> Aquantia/Marvell, Vitesse/Microsemi, Inphi/Cortina and an Avago gearbox.
> Our customer wants us to port all of this to the new U-Boot and upstream
> it. I'm worried about the sheer amount of code since it is absolutely
> massive. 

Maybe you should cut down your customers expectations a bit. According
to sloccount we currently have 1.6M SLOC for the whole U-Boot. I guess
Tom or Wolfgang wouldn't agree with adding another 900k only for one
CPU. Actually what should be upstream is the basic CPU, driver and board
support to be able to boot a mainline kernel. Everything else like
custom bare metal applications or the SFP/PHY handling stuff mentioned
below could also be maintained in a downstream tree. Maybe Wolfgang is
willing to host one on gitlab.denx.de.

> Some of these phy drivers are extremely complex and need to tie
> into the SFP management. We also need to use a background polling thread
> while at the command prompt. A fair bit of our phy code is not in the
> normal phy drivers because it did not fit the model. Some of these phy
> drivers need to interact with the SFP support code in order to handle
> hot plug events in order to reconfigure themselves based on the cable
> type. The existing SFP code handles everything from SFP to SFP28 as well
> as QSFP and 100G QSFP (never tested).
> 
> In the old U-Boot the PHY support had to be significantly enhanced due
> to requirements for hot-plugging and how some of the PHYs are
> configured. It gets quite complicated with phys like the Inphi where one
> phy can handle either four ports (XFI/SGMII) or a single 4-lane port
> (XLAUI). It gets even worse since in some boards we use reclocking chips
> and there is one chip that handles the receive path of a QSFP and
> another that handles the transmit path. Further complicating things,
> with a QSFP it can be treated either as XLAUI or as four XFI ports, so
> you can have four ports spread across two chips, with each port using
> different slices of each chip. In the case of the Inphi/Cortina chip, a
> single device can handle one or four ports based on the configuration
> and it is configured by "slice" which is basically an offset into the
> MDIO register space. We had to jump through hoops in order to have this
> stuff work 

[U-Boot] [PATCH v2] spl: fix SPI config dependencies

[Simon Goldschmidt]

As SPL_SPI_FLASH_SUPPORT cannot work without SPL_SPI_SUPPORT, fix
dependencies to prevent enabling SPI flash support without basic SPI
support.

Signed-off-by: Simon Goldschmidt 
---

Changes in v2:
- move SYS_SPI_U_BOOT_OFFS out of the SPL_SPI_FLASH_SUPPORT guard
  since that broke sunxi SPL (which uses non-DM spi)

 common/spl/Kconfig | 21 +++--
 1 file changed, 11 insertions(+), 10 deletions(-)

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 86d7edfee1..b8d234eb5e 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -1014,8 +1014,19 @@ config SPL_SERIAL_SUPPORT
  unless there are space reasons not to. Even then, consider
  enabling SPL_USE_TINY_PRINTF which is a small printf() version.
 
+config SPL_SPI_SUPPORT
+   bool "Support SPI drivers"
+   help
+ Enable support for using SPI in SPL. This is used for connecting
+ to SPI flash for loading U-Boot. See SPL_SPI_FLASH_SUPPORT for
+ more details on that. The SPI driver provides the transport for
+ data between the SPI flash and the CPU. This option can be used to
+ enable SPI drivers that are needed for other purposes also, such
+ as a SPI PMIC.
+
 config SPL_SPI_FLASH_SUPPORT
bool "Support SPI flash drivers"
+   depends on SPL_SPI_SUPPORT
help
  Enable support for using SPI flash in SPL, and loading U-Boot from
  SPI flash. SPI flash (Serial Peripheral Bus flash) is named after
@@ -1060,16 +1071,6 @@ config SYS_SPI_U_BOOT_OFFS
 Address within SPI-Flash from where the u-boot payload is fetched
 from.
 
-config SPL_SPI_SUPPORT
-   bool "Support SPI drivers"
-   help
- Enable support for using SPI in SPL. This is used for connecting
- to SPI flash for loading U-Boot. See SPL_SPI_FLASH_SUPPORT for
- more details on that. The SPI driver provides the transport for
- data between the SPI flash and the CPU. This option can be used to
- enable SPI drivers that are needed for other purposes also, such
- as a SPI PMIC.
-
 config SPL_THERMAL
bool "Driver support for thermal devices"
help
-- 
2.20.1

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Re: [U-Boot] [PATCH 3/3] board: tbs2910: Convert eth to driver model

[Fabio Estevam]

Hi Soeren,

On Tue, Oct 15, 2019 at 11:11 AM Soeren Moch  wrote:

> The build system still complaints about missing DM_VIDEO conversion for
> this board. Are there any examples available, where i.MX6Q boards with
> HDMI output are converted to DM_VIDEO?

Yes, please check wandboard for an example.
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Re: [U-Boot] [PATCH v5 00/19] efi_loader: non-volatile variables support

[Wolfgang Denk]

Dear Takahiro,

In message <20191025075645.gj10...@linaro.org> you wrote:
>
> I won't and cannot make replies on every comment that you gave me
> below because we are very different at some basic points and
> other comments are just details.

Can you please at least comment on the size impact?  How much does
the code size grow on everage, especially for SPL?


> So first I wanted to know if you agree to my *basic* approach or not,
> not details, in order to go further, but still don't see
> yes or no below.

To be honest: when I saw your monster patch series which basically
touches every piece of code in U-Boot, I felt a strong temptation to
just send a NAK and be done with it.  But I know this would not be
fair.  But to be able to say yes I would need days to review the
code and probably run some tests myself, and I don;t have that time.

So I can neither say yes or no, sorry.

> > My biggest concern is that such a highly invasive change cannot be
> > simply rubberstamped in a code review - I think this also needs
> > runtime testing on at least a significant number of the affected
> > boards.  We should try to get help from at least some board
> > maintainers - maybe you should ask for help for such testing n the
> > board maintainers mailing list?

This is a point which is important to me.  We need at least a few
"Tested-by" credits...

> > > > > * Non-volatile feature is not implemented in a general form and must 
> > > > > be
> > > > >   implemented by users in their sub-systems.
> > 
> > I don't understand what this means, or why such a decision was made.
> > Which sub-systems do you have in mind here?
>
> UEFI sub-system/library.

What needs to be done to have this - say - for U-Boot context?

> > What prevented you from implementing a solution to works for all of
> > us?

?

> > > > > Known issues/restriction/TODO:
> > > > > * The current form of patchset is not 'bisect'able.
> > > > >   Not to break 'bisect,' all the patches in this patch set must be
> > > > >   put into a single commit when merging.
> > > > >   (This can be mitigated by modifying/splitting Patch#18/#19 though.)
> > 
> > OK, so you are aware of this problem.
> > 
> > I must admit that I really hate this. If you could avoid all the API
> > changes, this would solve this problem, wouldn't it?
>
> "Avoid all the API changes" is an approach that I took in all my
> previous versions, but you *denied* it.
>
> That is: I proposed an approach in which the existing interfaces,
> env_get/set(), were maintained for existing users/sub-systems.
> Only new users who want to enjoy merits from new "context" feature may
> use new *extended* interfaces, env_[get|set]_ext(), in my case UEFI.
> As you *denied* it, this version (v5) is an inevitable result.
>
> Don't take me wrong, but I think that you made inconsistent comments.

I think you misunderstand. If we just need the same pointer in all
functions dealing with the environment, there are at least two ways
to implement this: we can add it as an argument to each and every
function call; this will blow up code size and also impact execution
speed.  Or we can add it to some (private or public) data structure
that is visible everywhere.  In the simplest case we could add such
a pointer to the global data (GD) structure as I suggested in my
previous mail.  this would allow you to use basically the same code
as now, but without needing to change all the argument lists.  In
the result, you could drop your modifications of all common and
board specififc files.  The code changes would be concentrated on
the environment code, and it should be anle to submit bisectable
patches again.

Yes, global variables have disadvantages, too, but does it not make
sense here?  I think we will have only one active environment
context at any time in U-Boot, so this seems to be at least a lesser
evil than the zillion of changes of all call arguments.


> > > > > * Unfortunately, this code fails to read U-Boot environment from flash
> > > > >   at boot time due to incomprehensible memory corruption.
> > > > >   See murky workaround, which is marked as FIXME, in env/flash.c.
> > 
> > Argh.  This is a killing point, isn't it?
> > 
> > You don't seriously expect to have patches which cause
> > "incomprehensible memory corruption" to be included into mainline?
>
> It will be just a matter of time for debugging.

It might be difficult to find willing testers under such
circumstances.  I would not want to run code with serious known
bugs.

> > > > > * An error during "save" operation may cause inconsistency between
> > > > >   cache (hash table) and the storage.
> > > > > -> This is not UEFI specific though.
> > 
> > Is this a new problem, or do you just mention this here for
> > completeness?  We always had this issue, didn't we?
>
> As I said, "this is not UEFI specific."

This does not answer my question.  Are you just refering to the
general problem that a write to the persistent storage area might
fail, which has ever 

Re: [U-Boot] [PATCH] sunxi: set PIO voltage to hardware-detected value on startup on H6

[Ondřej Jirman]

Hi,

On Wed, Apr 24, 2019 at 01:44:12PM +0800, Icenowy Zheng wrote:
> The Allwinner H6 SoC has a register to set the PIO banks' voltage. When
> it mismatches the real voltage supplied to the VCC to the PIO supply,
> the PIO will work improperly.
> 
> The PIO controller also has a register that contains the status of each
> VCC rail of the PIO supplies, and it has the same definition with the
> configuration register. so we can just copy the content of this register
> to the configuration register at startup, to ensure the configuration is
> correct at startup stage.
> 
> Signed-off-by: Icenowy Zheng 
> ---
>  arch/arm/include/asm/arch-sunxi/gpio.h | 3 +++
>  arch/arm/mach-sunxi/board.c| 9 +
>  2 files changed, 12 insertions(+)
> 
> diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h 
> b/arch/arm/include/asm/arch-sunxi/gpio.h
> index 40a3f845d0..a646ea6a3c 100644
> --- a/arch/arm/include/asm/arch-sunxi/gpio.h
> +++ b/arch/arm/include/asm/arch-sunxi/gpio.h
> @@ -73,6 +73,9 @@ struct sunxi_gpio_reg {
>   struct sunxi_gpio_int gpio_int;
>  };
>  
> +#define SUN50I_H6_GPIO_POW_MOD_SEL   0x340
> +#define SUN50I_H6_GPIO_POW_MOD_VAL   0x348
> +
>  #define BANK_TO_GPIO(bank)   (((bank) < SUNXI_GPIO_L) ? \
>   &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank] : \
>   &((struct sunxi_gpio_reg *)SUNXI_R_PIO_BASE)->gpio_bank[(bank) - 
> SUNXI_GPIO_L])
> diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
> index c6dd7b8e54..bd3b5d8303 100644
> --- a/arch/arm/mach-sunxi/board.c
> +++ b/arch/arm/mach-sunxi/board.c
> @@ -65,6 +65,7 @@ struct mm_region *mem_map = sunxi_mem_map;
>  
>  static int gpio_init(void)

Does this really run after regulators are turned on? If not, how will the SoC
detect voltages correctly?

regards,
o.

>  {
> + __maybe__unused uint val;
>  #if CONFIG_CONS_INDEX == 1 && defined(CONFIG_UART0_PORT_F)
>  #if defined(CONFIG_MACH_SUN4I) || \
>  defined(CONFIG_MACH_SUN7I) || \
> @@ -139,6 +140,14 @@ static int gpio_init(void)
>  #error Unsupported console port number. Please fix pin mux settings in 
> board.c
>  #endif
>  
> +#ifdef CONFIG_MACH_SUN50I_H6
> + /* Update PIO power bias configuration by copy hardware detected value 
> */
> + val = readl(SUNXI_PIO_BASE + SUN50I_H6_GPIO_POW_MOD_VAL);
> + writel(val, SUNXI_PIO_BASE + SUN50I_H6_GPIO_POW_MOD_SEL);
> + val = readl(SUNXI_R_PIO_BASE + SUN50I_H6_GPIO_POW_MOD_VAL);
> + writel(val, SUNXI_R_PIO_BASE + SUN50I_H6_GPIO_POW_MOD_SEL);
> +#endif
> +
>   return 0;
>  }
>  
> -- 
> 2.18.1
> 
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[U-Boot] [PATCH] Makefile: fix dependency for imx targets

[Heiko Schocher]

imx targets are defined in arch/arm/mach-imx/Makefile.
Some of them are dependent on targets defined in main
Makefile. For the Makefile in arch/arm/mach-imx this
targets must be finished before the imx targets are
build, if not you get for example the error:

make -f /home/hs/abb/mainlining/u-boot/scripts/Makefile.build 
obj=arch/arm/mach-imx u-boot-dtb.imx
make[2]: *** No rule to make target 'u-boot-fit-dtb.bin', needed by 
'u-boot-dtb.imx'.  Stop.
make[1]: *** [/home/hs/abb/mainlining/u-boot/Makefile:1123: u-boot-dtb.imx] 
Error 2
make[1]: *** Waiting for unfinished jobs
make[1]: Leaving directory '/work/hs/compile/u-boot/aristainetos2_defconfig'
make: *** [Makefile:148: sub-make] Error 2
compile failed

In above case of CONFIG_MULTI_DTB_FIT is defined, the
u-boot-dtb.imx is dependent on the u-boot-fit-dtb.bin
which may is not build yet ...

I could reproduce this error on a travis build also if
I build an out-of-tree build on a local machine with a
build directory on a "slow" slow storage device. If
building the same source target with a build dir on a
fast storage device, the build works.

I found no solution to tell the arch/arm/mach-imx/Makefile
to find the targets in main Makefile, if there is a way
this would be the better fix.

I solved it by adding a IMX_DEPS var, which holds a list
of main u-boot targets, which must be finished, before
calling imx targets and fixed the build for imx
targets which enabled CONFIG_MULTI_DTB_FIT.

I think it is just luck, that imx targets with
CONFIG_OF_SEPARATE enabled build, because the
u-boot-dtb.imx target depends on u-boot-dtb.bin
which gets build early enough before starting with
u-boot-dtb.imx. May this targets should be fixed too.

Signed-off-by: Heiko Schocher 

---
travis build:
https://travis-ci.org/hsdenx/u-boot-test/builds/602656876

 Makefile | 10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index cbacf1cfe2..1d2c778bd5 100644
--- a/Makefile
+++ b/Makefile
@@ -1119,7 +1119,15 @@ u-boot.bin: u-boot-nodtb.bin FORCE
$(call if_changed,copy)
 endif
 
-%.imx: %.bin
+# we call Makefile in arch/arm/mach-imx which
+# has targets which are dependent on targets defined
+# here. make could not resolve them and we must ensure
+# that they are finished before calling imx targets
+ifeq ($(CONFIG_MULTI_DTB_FIT),y)
+IMX_DEPS = u-boot-fit-dtb.bin
+endif
+
+%.imx: $(IMX_DEPS) %.bin
$(Q)$(MAKE) $(build)=arch/arm/mach-imx $@
$(BOARD_SIZE_CHECK)
 
-- 
2.21.0

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Re: [U-Boot] [PATCH 01/14] net: eth-uclass: eth_get_dev based on SEQ_ALIAS instead of probe order

[Tom Rini]

On Tue, Aug 06, 2019 at 04:08:31PM +0530, Keerthy wrote:

> In case of multiple eth interfaces currently eth_get_dev
> fetches the device based on the probe order which can be
> random hence try with the alias.
> 
> Signed-off-by: Keerthy 
> ---
>  net/eth-uclass.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/net/eth-uclass.c b/net/eth-uclass.c
> index 031d558625..f11c307b8c 100644
> --- a/net/eth-uclass.c
> +++ b/net/eth-uclass.c
> @@ -68,8 +68,8 @@ struct udevice *eth_get_dev(void)
>  
>   uc_priv = eth_get_uclass_priv();
>   if (!uc_priv->current)
> - eth_errno = uclass_first_device(UCLASS_ETH,
> - _priv->current);
> + eth_errno = uclass_get_device_by_seq(UCLASS_ETH,
> +  0, _priv->current);
>   return uc_priv->current;
>  }

This breaks networking on qemu_arm / qemu_arm64 and no networking device
is found.

-- 
Tom


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Re: [U-Boot] [PATCH] usb: composite: add BOS descriptor support to composite framework

[Roger Quadros]

On 24/10/2019 18:44, Jean-Jacques Hiblot wrote:

+ Vignesh and Roger

On 24/10/2019 13:22, Michal Simek wrote:

po 14. 10. 2019 v 14:52 odesílatel Michal Simek
 napsal:

From: T Karthik Reddy 

To add usb-3.0 support to peripheral device add BOS & SS capability
descriptors to gadget composite framework.

Signed-off-by: T Karthik Reddy 
Signed-off-by: Siva Durga Prasad Paladugu 
Signed-off-by: Michal Simek 


Reviewed-by: Roger Quadros 


---

  drivers/usb/gadget/composite.c | 61 ++
  include/linux/usb/ch9.h    |  3 ++
  include/linux/usb/gadget.h |  9 +
  3 files changed, 67 insertions(+), 6 deletions(-)

diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index c7e762374752..618a7d5016ee 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -688,6 +688,57 @@ static void composite_setup_complete(struct usb_ep *ep, 
struct usb_request *req)
 req->status, req->actual, req->length);
  }

+static int bos_desc(struct usb_composite_dev *cdev)
+{
+   struct usb_ext_cap_descriptor   *usb_ext;
+   struct usb_bos_descriptor   *bos = cdev->req->buf;
+
+   bos->bLength = USB_DT_BOS_SIZE;
+   bos->bDescriptorType = USB_DT_BOS;
+
+   bos->wTotalLength = cpu_to_le16(USB_DT_BOS_SIZE);
+   bos->bNumDeviceCaps = 0;
+
+   /*
+    * A SuperSpeed device shall include the USB2.0 extension descriptor
+    * and shall support LPM when operating in USB2.0 HS mode.
+    */
+   usb_ext = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
+   bos->bNumDeviceCaps++;
+   le16_add_cpu(>wTotalLength, USB_DT_USB_EXT_CAP_SIZE);
+   usb_ext->bLength = USB_DT_USB_EXT_CAP_SIZE;
+   usb_ext->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
+   usb_ext->bDevCapabilityType = USB_CAP_TYPE_EXT;
+   usb_ext->bmAttributes =
+   cpu_to_le32(USB_LPM_SUPPORT | USB_BESL_SUPPORT);
+
+   /*
+    * The Superspeed USB Capability descriptor shall be implemented
+    * by all SuperSpeed devices.
+    */
+   if (gadget_is_superspeed(cdev->gadget)) {
+   struct usb_ss_cap_descriptor *ss_cap;
+
+   ss_cap = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
+   bos->bNumDeviceCaps++;
+   le16_add_cpu(>wTotalLength, USB_DT_USB_SS_CAP_SIZE);
+   ss_cap->bLength = USB_DT_USB_SS_CAP_SIZE;
+   ss_cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
+   ss_cap->bDevCapabilityType = USB_SS_CAP_TYPE;
+   ss_cap->bmAttributes = 0; /* LTM is not supported yet */
+   ss_cap->wSpeedSupported =
+   cpu_to_le16(USB_LOW_SPEED_OPERATION |
+   USB_FULL_SPEED_OPERATION |
+   USB_HIGH_SPEED_OPERATION |
+   USB_5GBPS_OPERATION);
+   ss_cap->bFunctionalitySupport = USB_LOW_SPEED_OPERATION;
+   ss_cap->bU1devExitLat = USB_DEFAULT_U1_DEV_EXIT_LAT;
+   ss_cap->bU2DevExitLat =
+   cpu_to_le16(USB_DEFAULT_U2_DEV_EXIT_LAT);
+   }
+   return le16_to_cpu(bos->wTotalLength);
+}
+
  /*
   * The setup() callback implements all the ep0 functionality that's
   * not handled lower down, in hardware or the hardware driver(like
@@ -776,12 +827,10 @@ composite_setup(struct usb_gadget *gadget, const struct 
usb_ctrlrequest *ctrl)
 value = min(w_length, (u16) value);
 break;
 case USB_DT_BOS:
-   /*
-    * The USB compliance test (USB 2.0 Command Verifier)
-    * issues this request. We should not run into the
-    * default path here. But return for now until
-    * the superspeed support is added.
-    */
+   if (gadget_is_superspeed(cdev->gadget))
+   value = bos_desc(cdev);
+   if (value >= 0)
+   value = min(w_length, (u16)value);
 break;
 default:
 goto unknown;
diff --git a/include/linux/usb/ch9.h b/include/linux/usb/ch9.h
index 264c9712a33a..989a5fcbd966 100644
--- a/include/linux/usb/ch9.h
+++ b/include/linux/usb/ch9.h
@@ -878,6 +878,9 @@ struct usb_ss_cap_descriptor {  /* Link Power 
Management */
 __le16 bU2DevExitLat;
  } __attribute__((packed));

+#define USB_DEFAULT_U1_DEV_EXIT_LAT 0x01   /* Less then 1 microsec */
+#define USB_DEFAULT_U2_DEV_EXIT_LAT 0x01F4 /* Less then 500 microsec */
+
  #define USB_DT_USB_SS_CAP_SIZE 10

  /*
diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h
index 497798a32a87..58bfaddd036a 100644
--- a/include/linux/usb/gadget.h
+++ b/include/linux/usb/gadget.h
@@ 

[U-Boot] RK3399 NanoPI-M4 boot issues

[robert]

I'm trying to build a linux from source on a RK3399 nanopi-m4. I did the
below steps:
 
*###  Download and compile ARM-TF ###
*$ git clone https://github.com/ARM-software/arm-trusted-firmware.git
$ make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 bl31
 
*### Download and complie U-Boot ###
*$ cd ..
$ git clone https://gitlab.denx.de/u-boot/u-boot.git
$ cd u-boot/
$ git checkout v2019.10
$ make CROSS_COMPILE=arm-linux-gnueabi- nanopi-m4-rk3399_defconfig
$ cp ../arm-trusted-firmware/build/rk3399/release/bl31/bl31.elf .
$ make ARCH=arm CROSS_COMPILE=aarch64-linux-gnu-
$ make ARCH=arm CROSS_COMPILE=aarch64-linux-gnu- u-boot.itb
$ ./tools/mkimage -n rk3399 -T rksd -d ./tpl/u-boot-tpl-dtb.bin
idbloader.img
Image Type:   Rockchip RK33 (SD/MMC) boot image
Data Size:    47104 bytes
$ cat spl/u-boot-spl-dtb.bin >> idbloader.img
 
*### Build kernel ###
*$ git
clone https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
$ cd linux
$ git checkout v5.1

**I've used the arm64 defconfig ***
$ make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- defconfig
$ make CROSS_COMPILE=aarch64-linux-gnu- ARCH=arm64
 
*### Create boot.img ###
*$ cd ..
$ mkdir boot
$ cp linux/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dtb boot/
$ cp arch/arm64/boot/Image boot/
$ cp linux/arch/arm64/boot/Image boot/
$ mkdir boot/extlinux
$ nano boot/extlinux/extlinux.conf
 
label NanoPi M4 5.1
  kernel /boot/Image
  devicetree /boot/rk3399-nanopi-m4.dtb
  append earlycon=uart8250,mmio32,0xff1a root=/dev/mmcblk1p1 rootwait
 
$ dd if=/dev/zero of=boot.img bs=1M count=32
$ sudo mkfs.fat boot.img
$ mkdir tmp
$ sudo mount boot.img tmp/
$ cp -r boot/* tmp/
$ umount tmp
 
*** copy the images to a folder ***
$ mkdir images
$ cp boot.img images/ 
$ cp u-boot/idbloader.img images/
$ cp u-boot/u-boot.itb images/
 
*### Create sd card image ###
*$ cd images/

*** I'm using a VM so it was easier to use a loop device to create the image
***
$ dd if=/dev/zero of=sdcard.img bs=1024 count=0 seek=40 || exit 1
$ sudo losetup -f
/dev/loop18
$ sudo losetup /dev/loop18 sdcard.img 
$ sudo dd if=idbloader.img of=/dev/loop18 seek=64
$ sudo dd if=u-boot.itb of=/dev/loop18 seek=16384
$ sudo dd if=boot.img of=/dev/loop18 seek=32768
$ sync

Flush the image(sdcard.img) with etcher to a card and place the card in the
board.
Plug the UART cable and power on the board. I receive the below message:
*/U-Boot TPL board init
sdram_init: data training failed
rk3399_dmc_init DRAM init failed -5/*
 
I'm not sure what am I doing wrong.
Can someone help me with this?




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[U-Boot] [PULL] u-boot-usb/master

[Marek Vasut]

The following changes since commit 680023c5fab6b1777c0c6f2e76e5d2effb7903a0:

  Merge tag 'u-boot-stm32-2019-10-23' of
https://gitlab.denx.de/u-boot/custodians/u-boot-stm (2019-10-23 14:04:02
-0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-usb.git master

for you to fetch changes up to 235f5e158e336371759f98ffbf265fe078cda251:

  ehci-mx6: Update EHCI driver to support OTG0 on i.MX7ULP (2019-10-24
15:31:13 +0200)


Igor Opaniuk (1):
  usb: ehci-mx6: Fix bus enumeration for iMX7 SoCs

Jean-Jacques Hiblot (16):
  usb: host: remove the xhci-zynqmp driver
  usb: dwc3: switch to peripheral mode when exiting
  usb: xhci: move xhci.h to include usb
  usb: dwc3: always use the inlined version of
dwc3_host_init/dwc3_host_exit
  usb: dwc3-generic: use platdata
  usb: dwc3-generic: factorize code
  usb: dwc3-generic: add a new host driver that uses the dwc3 core
  usb: dwc3-generic: if no max speed is specified in DT, assume
super speed
  usb: dwc3: Add dwc3_of_parse() to get quirks information from DT
  usb: dwc3: Kconfig: get rid of obsolete mode selection
  ARM: keystone: increase PSC timeout
  ARM: keystone: Do not enable the USB power domains at the board level
  phy: keystone-usb: handle the transition of the USB power domain
  configs: k2g_evm_defconfig: disable XHCI_DWC3 and enable
KEYSTONE_USB_PHY
  ARM: DTS: keystone: complete the description of the USB PHY devices
  configs: sei610: khadas-vim3 : disable Gadget support for the DWC3

Ye Li (1):
  ehci-mx6: Update EHCI driver to support OTG0 on i.MX7ULP

 MAINTAINERS  |   1 +
 arch/arm/dts/keystone-k2e-evm-u-boot.dtsi|  32 +++
 arch/arm/dts/keystone-k2g-evm-u-boot.dtsi|  28 
 arch/arm/dts/keystone-k2hk-evm-u-boot.dtsi   |  14 
 arch/arm/dts/keystone-k2l-evm-u-boot.dtsi|  18 +++
 arch/arm/mach-keystone/include/mach/psc_defs.h   |   2 +-
 board/ti/ks2_evm/board.c |  13 
 configs/avnet_ultra96_rev1_defconfig |   1 -
 configs/evb-rk3328_defconfig |   1 +
 configs/k2g_evm_defconfig|   3 +-
 configs/khadas-vim3_defconfig|   1 +
 configs/odroid-n2_defconfig  |   1 +
 configs/rock64-rk3328_defconfig  |   1 +
 configs/sei510_defconfig |   1 +
 configs/sei610_defconfig |   1 +
 configs/u200_defconfig   |   1 +
 configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig |   1 -
 configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig |   1 -
 configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig |   1 -
 configs/xilinx_zynqmp_zcu100_revC_defconfig  |   1 -
 configs/xilinx_zynqmp_zcu102_rev1_0_defconfig|   1 -
 configs/xilinx_zynqmp_zcu102_revA_defconfig  |   1 -
 configs/xilinx_zynqmp_zcu102_revB_defconfig  |   1 -
 configs/xilinx_zynqmp_zcu104_revA_defconfig  |   1 -
 configs/xilinx_zynqmp_zcu104_revC_defconfig  |   1 -
 configs/xilinx_zynqmp_zcu106_revA_defconfig  |   1 -
 configs/xilinx_zynqmp_zcu111_revA_defconfig  |   1 -
 drivers/phy/keystone-usb-phy.c   |  22 +
 drivers/usb/dwc3/Kconfig |  18 ++-
 drivers/usb/dwc3/core.c  |  84
++--
 drivers/usb/dwc3/core.h  |   6 +---
 drivers/usb/dwc3/dwc3-generic.c  | 146
+---
 drivers/usb/host/Kconfig |  13 ++--
 drivers/usb/host/Makefile|   1 -
 drivers/usb/host/ehci-mx6.c  |  68
+++
 drivers/usb/host/xhci-dwc3.c |   2 +-
 drivers/usb/host/xhci-exynos5.c  |   2 +-
 drivers/usb/host/xhci-fsl.c  |   2 +-
 drivers/usb/host/xhci-mem.c  |   2 +-
 drivers/usb/host/xhci-mvebu.c|   2 +-
 drivers/usb/host/xhci-omap.c |   2 +-
 drivers/usb/host/xhci-pci.c  |   2 +-
 drivers/usb/host/xhci-rcar.c |   2 +-
 drivers/usb/host/xhci-ring.c |   2 +-
 drivers/usb/host/xhci-rockchip.c |   2 +-
 drivers/usb/host/xhci-zynqmp.c   | 146

 drivers/usb/host/xhci.c  |   2 +-
 drivers/usb/phy/omap_usb_phy.c   |   2 +-
 {drivers/usb/host => include/usb}/xhci.h |   0
 49 files changed, 384 insertions(+), 274 deletions(-)
 create mode 100644 

[U-Boot] [PATCH 6/6] rockchip: mkimage: add support for RK3308

[Andy Yan]

Usage:

 (1) tools/mkimage -n rk3308 -T rksd -d tpl/u-boot-tpl.bin idbloader.img
 (2) cat spl/u-boot-spl.bin >> idbloader.img
 (3) upgrade_tool wl 0x40 idbloader.img

Note:
  When use a ddr binary from rkbin as tpl, use it replace u-boot-tpl.bin in (1)

Signed-off-by: Andy Yan 
---

 tools/rkcommon.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 831c2ad820..a16f83c1ef 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -72,6 +72,7 @@ static struct spl_info spl_infos[] = {
{ "rk3188", "RK31", 0x8000 - 0x800, true },
{ "rk322x", "RK32", 0x8000 - 0x1000, false },
{ "rk3288", "RK32", 0x8000, false },
+   { "rk3308", "RK33", 0x4 - 0x1000, false},
{ "rk3328", "RK32", 0x8000 - 0x1000, false },
{ "rk3368", "RK33", 0x8000 - 0x1000, false },
{ "rk3399", "RK33", 0x3 - 0x2000, false },
-- 
2.17.1



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[U-Boot] [PATCH 5/6] rockchip: rk3308: Add sdram driver

[Andy Yan]

A dm based dram driver for rk3308 u-boot
to get capacity.

Signed-off-by: Andy Yan 
---

 drivers/ram/rockchip/Makefile   |  1 +
 drivers/ram/rockchip/sdram_rk3308.c | 55 +
 2 files changed, 56 insertions(+)
 create mode 100644 drivers/ram/rockchip/sdram_rk3308.c

diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index feb1f82d00..1adca32dcb 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -9,5 +9,6 @@ obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) = sdram_rk3288.o
+obj-$(CONFIG_ROCKCHIP_RK3308) = sdram_rk3308.o
 obj-$(CONFIG_ROCKCHIP_RK3328) = sdram_rk3328.o
 obj-$(CONFIG_RAM_RK3399) += sdram_rk3399.o
diff --git a/drivers/ram/rockchip/sdram_rk3308.c 
b/drivers/ram/rockchip/sdram_rk3308.c
new file mode 100644
index 00..43d44cce62
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_rk3308.c
@@ -0,0 +1,55 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct dram_info {
+   struct ram_info info;
+   struct rk3308_grf *grf;
+};
+
+static int rk3308_dmc_probe(struct udevice *dev)
+{
+   struct dram_info *priv = dev_get_priv(dev);
+
+   priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+   priv->info.base = CONFIG_SYS_SDRAM_BASE;
+   priv->info.size = rockchip_sdram_size((phys_addr_t)>grf->os_reg2);
+
+   return 0;
+}
+
+static int rk3308_dmc_get_info(struct udevice *dev, struct ram_info *info)
+{
+   struct dram_info *priv = dev_get_priv(dev);
+
+   *info = priv->info;
+
+   return 0;
+}
+
+static struct ram_ops rk3308_dmc_ops = {
+   .get_info = rk3308_dmc_get_info,
+};
+
+static const struct udevice_id rk3308_dmc_ids[] = {
+   { .compatible = "rockchip,rk3308-dmc" },
+   { }
+};
+
+U_BOOT_DRIVER(dmc_rk3308) = {
+   .name = "rockchip_rk3308_dmc",
+   .id = UCLASS_RAM,
+   .of_match = rk3308_dmc_ids,
+   .ops = _dmc_ops,
+   .probe = rk3308_dmc_probe,
+   .priv_auto_alloc_size = sizeof(struct dram_info),
+};
-- 
2.17.1



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[U-Boot] [PATCH 4/6] board: rockchip: Add rk3308 evb support

[Andy Yan]

Add support for rk3308 evaluation board.

Signed-off-by: Andy Yan 
---

 arch/arm/mach-rockchip/rk3308/Kconfig  |  8 +++
 board/rockchip/evb_rk3308/Kconfig  | 15 +
 board/rockchip/evb_rk3308/MAINTAINERS  |  6 ++
 board/rockchip/evb_rk3308/Makefile |  7 +++
 board/rockchip/evb_rk3308/evb_rk3308.c | 44 +++
 configs/evb-rk3308_defconfig   | 77 ++
 include/configs/evb_rk3308.h   | 20 +++
 7 files changed, 177 insertions(+)
 create mode 100644 board/rockchip/evb_rk3308/Kconfig
 create mode 100644 board/rockchip/evb_rk3308/MAINTAINERS
 create mode 100644 board/rockchip/evb_rk3308/Makefile
 create mode 100644 board/rockchip/evb_rk3308/evb_rk3308.c
 create mode 100644 configs/evb-rk3308_defconfig
 create mode 100644 include/configs/evb_rk3308.h

diff --git a/arch/arm/mach-rockchip/rk3308/Kconfig 
b/arch/arm/mach-rockchip/rk3308/Kconfig
index 9c09661595..c74d1fc7f1 100644
--- a/arch/arm/mach-rockchip/rk3308/Kconfig
+++ b/arch/arm/mach-rockchip/rk3308/Kconfig
@@ -1,5 +1,9 @@
 if ROCKCHIP_RK3308
 
+config TARGET_EVB_RK3308
+   bool "EVB_RK3308"
+   select BOARD_LATE_INIT
+
 config SYS_SOC
default "rk3308"
 
@@ -11,4 +15,8 @@ config SPL_SERIAL_SUPPORT
 
 config ROCKCHIP_BOOT_MODE_REG
default 0xff000500
+
+
+source "board/rockchip/evb_rk3308/Kconfig"
+
 endif
diff --git a/board/rockchip/evb_rk3308/Kconfig 
b/board/rockchip/evb_rk3308/Kconfig
new file mode 100644
index 00..0074429cb6
--- /dev/null
+++ b/board/rockchip/evb_rk3308/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_EVB_RK3308
+
+config SYS_BOARD
+   default "evb_rk3308"
+
+config SYS_VENDOR
+   default "rockchip"
+
+config SYS_CONFIG_NAME
+   default "evb_rk3308"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+   def_bool y
+
+endif
diff --git a/board/rockchip/evb_rk3308/MAINTAINERS 
b/board/rockchip/evb_rk3308/MAINTAINERS
new file mode 100644
index 00..0af119ae0a
--- /dev/null
+++ b/board/rockchip/evb_rk3308/MAINTAINERS
@@ -0,0 +1,6 @@
+EVB-RK3308
+M:  Andy Yan 
+S:  Maintained
+F:  board/rockchip/evb_rk3308
+F:  include/configs/evb_rk3308.h
+F:  configs/evb-rk3308_defconfig
diff --git a/board/rockchip/evb_rk3308/Makefile 
b/board/rockchip/evb_rk3308/Makefile
new file mode 100644
index 00..05de5560f1
--- /dev/null
+++ b/board/rockchip/evb_rk3308/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2018 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y  += evb_rk3308.o
diff --git a/board/rockchip/evb_rk3308/evb_rk3308.c 
b/board/rockchip/evb_rk3308/evb_rk3308.c
new file mode 100644
index 00..180f1fe4f0
--- /dev/null
+++ b/board/rockchip/evb_rk3308/evb_rk3308.c
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define KEY_DOWN_MIN_VAL0
+#define KEY_DOWN_MAX_VAL30
+
+/*
+ * Two board variants whith adc channel 3 is for board id
+ * v10: 1024, v11: 512
+ * v10: adc channel 0 for dnl key
+ * v11: adc channel 1 for dnl key
+ */
+int rockchip_dnl_key_pressed(void)
+{
+   unsigned int key_val, id_val;
+   int key_ch;
+
+   if (adc_channel_single_shot("saradc", 3, _val)) {
+   printf("%s read board id failed\n", __func__);
+   return false;
+   }
+
+   if (abs(id_val - 1024) <= 30)
+   key_ch = 0;
+   else
+   key_ch = 1;
+
+   if (adc_channel_single_shot("saradc", key_ch, _val)) {
+   printf("%s read adc key val failed\n", __func__);
+   return false;
+   }
+
+   if (key_val >= KEY_DOWN_MIN_VAL && key_val <= KEY_DOWN_MAX_VAL)
+   return true;
+   else
+   return false;
+}
diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
new file mode 100644
index 00..36d30dfa80
--- /dev/null
+++ b/configs/evb-rk3308_defconfig
@@ -0,0 +1,77 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_TEXT_BASE=0x0060
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK3308=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TARGET_EVB_RK3308=y
+CONFIG_SPL_STACK_R_ADDR=0xc0
+CONFIG_DEBUG_UART_BASE=0xFF0C
+CONFIG_DEBUG_UART_CLOCK=2400
+CONFIG_DEBUG_UART=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_STACK_R=y
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+# 

[U-Boot] [PATCH 2/6] rockchip: clk: Add clk driver for rk3308

[Andy Yan]

From: Finley Xiao 

Add clk controller driver for RK3308 SOC.

Signed-off-by: Andy Yan 
---

 drivers/clk/rockchip/Makefile  |1 +
 drivers/clk/rockchip/clk_rk3308.c  | 1078 
 include/dt-bindings/clock/rk3308-cru.h |  387 +
 3 files changed, 1466 insertions(+)
 create mode 100644 drivers/clk/rockchip/clk_rk3308.c
 create mode 100644 include/dt-bindings/clock/rk3308-cru.h

diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
index 03a9fa77ba..f2068a8e94 100644
--- a/drivers/clk/rockchip/Makefile
+++ b/drivers/clk/rockchip/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_ROCKCHIP_RK3128) += clk_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += clk_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) += clk_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += clk_rk3288.o
+obj-$(CONFIG_ROCKCHIP_RK3308) += clk_rk3308.o
 obj-$(CONFIG_ROCKCHIP_RK3328) += clk_rk3328.o
 obj-$(CONFIG_ROCKCHIP_RK3368) += clk_rk3368.o
 obj-$(CONFIG_ROCKCHIP_RK3399) += clk_rk3399.o
diff --git a/drivers/clk/rockchip/clk_rk3308.c 
b/drivers/clk/rockchip/clk_rk3308.c
new file mode 100644
index 00..e4e213d463
--- /dev/null
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -0,0 +1,1078 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum {
+   VCO_MAX_HZ  = 3200U * 100,
+   VCO_MIN_HZ  = 800 * 100,
+   OUTPUT_MAX_HZ   = 3200U * 100,
+   OUTPUT_MIN_HZ   = 24 * 100,
+};
+
+#define DIV_TO_RATE(input_rate, div)((input_rate) / ((div) + 1))
+
+#define RK3308_CPUCLK_RATE(_rate, _aclk_div, _pclk_div) \
+{   \
+   .rate   = _rate##U, \
+   .aclk_div = _aclk_div,  \
+   .pclk_div = _pclk_div,  \
+}
+
+static struct rockchip_pll_rate_table rk3308_pll_rates[] = {
+   /* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
+   RK3036_PLL_RATE(13, 6, 325, 1, 1, 1, 0),
+   RK3036_PLL_RATE(12, 1, 50, 1, 1, 1, 0),
+   RK3036_PLL_RATE(81600, 1, 68, 2, 1, 1, 0),
+   RK3036_PLL_RATE(74800, 2, 187, 3, 1, 1, 0),
+};
+
+static struct rockchip_cpu_rate_table rk3308_cpu_rates[] = {
+   RK3308_CPUCLK_RATE(12, 1, 5),
+   RK3308_CPUCLK_RATE(100800, 1, 5),
+   RK3308_CPUCLK_RATE(81600, 1, 3),
+   RK3308_CPUCLK_RATE(6, 1, 3),
+   RK3308_CPUCLK_RATE(40800, 1, 1),
+};
+
+static struct rockchip_pll_clock rk3308_pll_clks[] = {
+   [APLL] = PLL(pll_rk3328, PLL_APLL, RK3308_PLL_CON(0),
+RK3308_MODE_CON, 0, 10, 0, rk3308_pll_rates),
+   [DPLL] = PLL(pll_rk3328, PLL_DPLL, RK3308_PLL_CON(8),
+RK3308_MODE_CON, 2, 10, 0, NULL),
+   [VPLL0] = PLL(pll_rk3328, PLL_VPLL0, RK3308_PLL_CON(16),
+ RK3308_MODE_CON, 4, 10, 0, NULL),
+   [VPLL1] = PLL(pll_rk3328, PLL_VPLL1, RK3308_PLL_CON(24),
+ RK3308_MODE_CON, 6, 10, 0, NULL),
+};
+
+static ulong rk3308_armclk_set_clk(struct rk3308_clk_priv *priv, ulong hz)
+{
+   struct rk3308_cru *cru = priv->cru;
+   const struct rockchip_cpu_rate_table *rate;
+   ulong old_rate;
+
+   rate = rockchip_get_cpu_settings(rk3308_cpu_rates, hz);
+   if (!rate) {
+   printf("%s unsupport rate\n", __func__);
+   return -EINVAL;
+   }
+
+   /*
+* select apll as cpu/core clock pll source and
+* set up dependent divisors for PERI and ACLK clocks.
+* core hz : apll = 1:1
+*/
+   old_rate = rockchip_pll_get_rate(_pll_clks[APLL],
+priv->cru, APLL);
+   if (old_rate > hz) {
+   if (rockchip_pll_set_rate(_pll_clks[APLL],
+ priv->cru, APLL, hz))
+   return -EINVAL;
+   rk_clrsetreg(>clksel_con[0],
+CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK |
+CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+rate->pclk_div << CORE_DBG_DIV_SHIFT |
+CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+0 << CORE_DIV_CON_SHIFT);
+   } else if (old_rate < hz) {
+   rk_clrsetreg(>clksel_con[0],
+CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK |
+CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+rate->pclk_div << CORE_DBG_DIV_SHIFT |
+

[U-Boot] [PATCH v2 17/17] test: add asn1 unit test

[AKASHI Takahiro]

This test will exercise asn1 compiler as well as asn1 decoder functions
via various parsers.

Signed-off-by: AKASHI Takahiro 
---
 test/lib/Kconfig  |  18 ++-
 test/lib/Makefile |   2 +
 test/lib/asn1.c   | 392 ++
 3 files changed, 411 insertions(+), 1 deletion(-)
 create mode 100644 test/lib/asn1.c

diff --git a/test/lib/Kconfig b/test/lib/Kconfig
index a983bdcaa3f1..f8bf36bf65f1 100644
--- a/test/lib/Kconfig
+++ b/test/lib/Kconfig
@@ -4,4 +4,20 @@ config UT_LIB
default y
help
  Enables the 'ut lib' command which tests library functions like
- memcat(), memcyp(), memmove().
+ memcat(), memcyp(), memmove() and ASN1 compiler/decoder.
+
+if UT_LIB
+
+config UT_LIB_ASN1
+   bool "Unit test for asn1 compiler and decoder function"
+   default y
+   imply ASYMMETRIC_KEY_TYPE
+   imply ASYMMETRIC_PUBLIC_KEY_SUBTYPE
+   imply X509_CERTIFICATE_PARSER
+   imply PKCS7_MESSAGE_PARSER
+   imply RSA_PUBLIC_KEY_PARSER
+   help
+ Enables a test which exercises asn1 compiler and decoder function
+ via various parsers.
+
+endif
diff --git a/test/lib/Makefile b/test/lib/Makefile
index 308c61708ee3..50a07e717d27 100644
--- a/test/lib/Makefile
+++ b/test/lib/Makefile
@@ -6,3 +6,5 @@ obj-y += cmd_ut_lib.o
 obj-y += hexdump.o
 obj-y += lmb.o
 obj-y += string.o
+
+obj-$(CONFIG_UT_LIB_ASN1) += asn1.o
diff --git a/test/lib/asn1.c b/test/lib/asn1.c
new file mode 100644
index ..88e362df5197
--- /dev/null
+++ b/test/lib/asn1.c
@@ -0,0 +1,392 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2019 Linaro Limited
+ * Author: AKASHI Takahiro
+ *
+ * Unit test for asn1 compiler and asn1 decoder function via various parsers
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_PKCS7_MESSAGE_PARSER
+#include "../../lib/crypto/pkcs7_parser.h"
+#else
+#ifdef CONFIG_X509_CERTIFICATE_PARSER
+#include "../../lib/crypto/x509_parser.h"
+#endif
+#endif
+
+#ifdef CONFIG_X509_CERTIFICATE_PARSER
+const unsigned char cert_data[] = {
+   0x30, 0x82, 0x03, 0xc7, 0x30, 0x82, 0x02, 0xaf, 0xa0, 0x03, 0x02, 0x01,
+   0x02, 0x02, 0x09, 0x00, 0xd7, 0x17, 0x0a, 0x76, 0xd5, 0xd3, 0x4d, 0xeb,
+   0x30, 0x0d, 0x06, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01,
+   0x0b, 0x05, 0x00, 0x30, 0x7a, 0x31, 0x0b, 0x30, 0x09, 0x06, 0x03, 0x55,
+   0x04, 0x06, 0x13, 0x02, 0x4a, 0x50, 0x31, 0x0e, 0x30, 0x0c, 0x06, 0x03,
+   0x55, 0x04, 0x08, 0x0c, 0x05, 0x54, 0x6f, 0x6b, 0x79, 0x6f, 0x31, 0x0e,
+   0x30, 0x0c, 0x06, 0x03, 0x55, 0x04, 0x07, 0x0c, 0x05, 0x54, 0x6f, 0x6b,
+   0x79, 0x6f, 0x31, 0x0f, 0x30, 0x0d, 0x06, 0x03, 0x55, 0x04, 0x0a, 0x0c,
+   0x06, 0x4c, 0x69, 0x6e, 0x61, 0x72, 0x6f, 0x31, 0x0b, 0x30, 0x09, 0x06,
+   0x03, 0x55, 0x04, 0x0b, 0x0c, 0x02, 0x53, 0x57, 0x31, 0x0f, 0x30, 0x0d,
+   0x06, 0x03, 0x55, 0x04, 0x03, 0x0c, 0x06, 0x54, 0x65, 0x73, 0x74, 0x65,
+   0x72, 0x31, 0x1c, 0x30, 0x1a, 0x06, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7,
+   0x0d, 0x01, 0x09, 0x01, 0x16, 0x0d, 0x74, 0x65, 0x73, 0x74, 0x40, 0x74,
+   0x65, 0x73, 0x74, 0x2e, 0x6f, 0x72, 0x67, 0x30, 0x1e, 0x17, 0x0d, 0x31,
+   0x39, 0x31, 0x30, 0x31, 0x38, 0x30, 0x33, 0x31, 0x33, 0x33, 0x31, 0x5a,
+   0x17, 0x0d, 0x32, 0x30, 0x31, 0x30, 0x31, 0x37, 0x30, 0x33, 0x31, 0x33,
+   0x33, 0x31, 0x5a, 0x30, 0x7a, 0x31, 0x0b, 0x30, 0x09, 0x06, 0x03, 0x55,
+   0x04, 0x06, 0x13, 0x02, 0x4a, 0x50, 0x31, 0x0e, 0x30, 0x0c, 0x06, 0x03,
+   0x55, 0x04, 0x08, 0x0c, 0x05, 0x54, 0x6f, 0x6b, 0x79, 0x6f, 0x31, 0x0e,
+   0x30, 0x0c, 0x06, 0x03, 0x55, 0x04, 0x07, 0x0c, 0x05, 0x54, 0x6f, 0x6b,
+   0x79, 0x6f, 0x31, 0x0f, 0x30, 0x0d, 0x06, 0x03, 0x55, 0x04, 0x0a, 0x0c,
+   0x06, 0x4c, 0x69, 0x6e, 0x61, 0x72, 0x6f, 0x31, 0x0b, 0x30, 0x09, 0x06,
+   0x03, 0x55, 0x04, 0x0b, 0x0c, 0x02, 0x53, 0x57, 0x31, 0x0f, 0x30, 0x0d,
+   0x06, 0x03, 0x55, 0x04, 0x03, 0x0c, 0x06, 0x54, 0x65, 0x73, 0x74, 0x65,
+   0x72, 0x31, 0x1c, 0x30, 0x1a, 0x06, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7,
+   0x0d, 0x01, 0x09, 0x01, 0x16, 0x0d, 0x74, 0x65, 0x73, 0x74, 0x40, 0x74,
+   0x65, 0x73, 0x74, 0x2e, 0x6f, 0x72, 0x67, 0x30, 0x82, 0x01, 0x22, 0x30,
+   0x0d, 0x06, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x01,
+   0x05, 0x00, 0x03, 0x82, 0x01, 0x0f, 0x00, 0x30, 0x82, 0x01, 0x0a, 0x02,
+   0x82, 0x01, 0x01, 0x00, 0x9f, 0x37, 0x4d, 0x95, 0x7e, 0x36, 0xb7, 0xaf,
+   0xf4, 0xd6, 0xce, 0x39, 0x04, 0xee, 0xbf, 0x36, 0xb2, 0xcc, 0xa3, 0x8b,
+   0x9e, 0xac, 0x62, 0x8a, 0xe9, 0xae, 0x18, 0xcf, 0xe8, 0x95, 0xfd, 0xcb,
+   0xad, 0x34, 0x8a, 0x5f, 0x55, 0xe6, 0x0c, 0x5e, 0xf8, 0x76, 0xc1, 0xa2,
+   0xc3, 0xd4, 0x73, 0x13, 0x8a, 0x71, 0x1b, 0xfd, 0x58, 0x27, 0xea, 0x4d,
+   0x41, 0xff, 0x63, 0xbb, 0xad, 0x97, 0x62, 0xba, 0xe4, 0xe5, 0x97, 0x45,
+   0xa3, 0x5b, 0xd5, 0x5b, 0x53, 0x55, 0x10, 0x19, 0xfa, 0xac, 0xbd, 0xdb,
+   0x77, 

[U-Boot] [PATCH 0/6] Add support for RK3308 SOC

[Andy Yan]

RK3308 is a quad Cortex A35 based SOC with rich audio
interfaces(I2S/PCM/TDM/PDM/SPDIF/VAD/HDMI ARC), which
designed for intelligent voice interaction and audio
input/output processing.

This path set add basic support for it, test with a
emmc board.

More boards support such as Firefly ROC-RK3308-CC will coming soon.


Andy Yan (5):
  arm: rockchip: Add RK3308 SOC support
  arm: dts: rockchip: Add dts for rk3308 evb
  board: rockchip: Add rk3308 evb support
  rockchip: rk3308: Add sdram driver
  rockchip: mkimage: add support for RK3308

Finley Xiao (1):
  rockchip: clk: Add clk driver for rk3308

 arch/arm/dts/Makefile |3 +
 arch/arm/dts/rk3308-evb-u-boot.dtsi   |   17 +
 arch/arm/dts/rk3308-evb.dts   |  230 +++
 arch/arm/dts/rk3308-u-boot.dtsi   |   25 +
 arch/arm/dts/rk3308.dtsi  | 1832 +
 arch/arm/include/asm/arch-rk3308/boot0.h  |   11 +
 arch/arm/include/asm/arch-rk3308/cru_rk3308.h |  290 +++
 arch/arm/include/asm/arch-rk3308/gpio.h   |   11 +
 arch/arm/include/asm/arch-rk3308/grf_rk3308.h |  197 ++
 arch/arm/mach-rockchip/Kconfig|   24 +
 arch/arm/mach-rockchip/Makefile   |1 +
 arch/arm/mach-rockchip/rk3308/Kconfig |   22 +
 arch/arm/mach-rockchip/rk3308/Makefile|9 +
 arch/arm/mach-rockchip/rk3308/clk_rk3308.c|   31 +
 arch/arm/mach-rockchip/rk3308/rk3308.c|  175 ++
 arch/arm/mach-rockchip/rk3308/syscon_rk3308.c |   20 +
 board/rockchip/evb_rk3308/Kconfig |   15 +
 board/rockchip/evb_rk3308/MAINTAINERS |6 +
 board/rockchip/evb_rk3308/Makefile|7 +
 board/rockchip/evb_rk3308/evb_rk3308.c|   44 +
 configs/evb-rk3308_defconfig  |   77 +
 drivers/clk/rockchip/Makefile |1 +
 drivers/clk/rockchip/clk_rk3308.c | 1078 ++
 drivers/ram/rockchip/Makefile |1 +
 drivers/ram/rockchip/sdram_rk3308.c   |   55 +
 include/configs/evb_rk3308.h  |   20 +
 include/configs/rk3308_common.h   |   58 +
 include/dt-bindings/clock/rk3308-cru.h|  387 
 tools/rkcommon.c  |1 +
 29 files changed, 4648 insertions(+)
 create mode 100644 arch/arm/dts/rk3308-evb-u-boot.dtsi
 create mode 100644 arch/arm/dts/rk3308-evb.dts
 create mode 100644 arch/arm/dts/rk3308-u-boot.dtsi
 create mode 100644 arch/arm/dts/rk3308.dtsi
 create mode 100644 arch/arm/include/asm/arch-rk3308/boot0.h
 create mode 100644 arch/arm/include/asm/arch-rk3308/cru_rk3308.h
 create mode 100644 arch/arm/include/asm/arch-rk3308/gpio.h
 create mode 100644 arch/arm/include/asm/arch-rk3308/grf_rk3308.h
 create mode 100644 arch/arm/mach-rockchip/rk3308/Kconfig
 create mode 100644 arch/arm/mach-rockchip/rk3308/Makefile
 create mode 100644 arch/arm/mach-rockchip/rk3308/clk_rk3308.c
 create mode 100644 arch/arm/mach-rockchip/rk3308/rk3308.c
 create mode 100644 arch/arm/mach-rockchip/rk3308/syscon_rk3308.c
 create mode 100644 board/rockchip/evb_rk3308/Kconfig
 create mode 100644 board/rockchip/evb_rk3308/MAINTAINERS
 create mode 100644 board/rockchip/evb_rk3308/Makefile
 create mode 100644 board/rockchip/evb_rk3308/evb_rk3308.c
 create mode 100644 configs/evb-rk3308_defconfig
 create mode 100644 drivers/clk/rockchip/clk_rk3308.c
 create mode 100644 drivers/ram/rockchip/sdram_rk3308.c
 create mode 100644 include/configs/evb_rk3308.h
 create mode 100644 include/configs/rk3308_common.h
 create mode 100644 include/dt-bindings/clock/rk3308-cru.h

-- 
2.17.1



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Re: [U-Boot] [PATCH 1/1] dwc3-generic: Don't fail probe if clk/reset entries are absent

[Sam Protsenko]

+ Praneeth

On Fri, Oct 25, 2019 at 1:08 PM Sam Protsenko
 wrote:
>
> Hi Vignesh,
>
> On Fri, Oct 25, 2019 at 11:17 AM Vignesh Raghavendra  wrote:
> >
> > Some boards don't populate clk/reset entries as these are are optional
> > as per binding documentation. Therefore, don't fail driver probe if
> > clk/reset entries are absent in DT.
> >
> > This fixes fastboot failures seen due to enabling of CONFIG_CLK on AM57xx
> >
> > Fixes: e8e683d33b0c ("board: ti: am57xx-idk: Configure the CDCE913 clock 
> > synthesizer")
> > Reported-by: Sam Protsenko 
> > Signed-off-by: Vignesh Raghavendra 
> > ---
>
> Tested-by: Sam Protsenko 
> Reviewed-by: Sam Protsenko 
>
> >  drivers/usb/dwc3/dwc3-generic.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/usb/dwc3/dwc3-generic.c 
> > b/drivers/usb/dwc3/dwc3-generic.c
> > index 406bf0b3628b..d76cd7a4c5ca 100644
> > --- a/drivers/usb/dwc3/dwc3-generic.c
> > +++ b/drivers/usb/dwc3/dwc3-generic.c
> > @@ -258,7 +258,7 @@ static int dwc3_glue_reset_init(struct udevice *dev,
> > int ret;
> >
> > ret = reset_get_bulk(dev, >resets);
> > -   if (ret == -ENOTSUPP)
> > +   if (ret == -ENOTSUPP || ret == -ENOENT)
> > return 0;
> > else if (ret)
> > return ret;
> > @@ -278,7 +278,7 @@ static int dwc3_glue_clk_init(struct udevice *dev,
> > int ret;
> >
> > ret = clk_get_bulk(dev, >clks);
> > -   if (ret == -ENOSYS)
> > +   if (ret == -ENOSYS || ret == -ENOENT)
> > return 0;
> > if (ret)
> > return ret;
> > --
> > 2.23.0
> >
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[U-Boot] [PATCH 1/1] blk: set log2blksz in blk_create_device()

[Heinrich Schuchardt]

The ext4 file system requires log2blksz to be set. So when setting the
block size on the block descriptor we should fill this field too.

This fixes a problem with EFI block devices providing ext4 partitions, cf.
https://lists.denx.de/pipermail/u-boot/2019-October/387702.html.

Signed-off-by: Heinrich Schuchardt 
---
 drivers/block/blk-uclass.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index e8f58b3f5e..ca8978f0e1 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -580,6 +580,7 @@ int blk_create_device(struct udevice *parent, const char 
*drv_name,
desc = dev_get_uclass_platdata(dev);
desc->if_type = if_type;
desc->blksz = blksz;
+   desc->log2blksz = LOG2(desc->blksz);
desc->lba = lba;
desc->part_type = PART_TYPE_UNKNOWN;
desc->bdev = dev;
--
2.23.0

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[U-Boot] [PATCH 3/6] arm: dts: rockchip: Add dts for rk3308 evb

[Andy Yan]

Add dts for rk3308 evb, sync from the linux kernel
upstream list [0].

[0]https://patchwork.kernel.org/patch/11201555/

Signed-off-by: Andy Yan 
---

 arch/arm/dts/Makefile   |3 +
 arch/arm/dts/rk3308-evb-u-boot.dtsi |   17 +
 arch/arm/dts/rk3308-evb.dts |  230 
 arch/arm/dts/rk3308-u-boot.dtsi |   25 +
 arch/arm/dts/rk3308.dtsi| 1832 +++
 5 files changed, 2107 insertions(+)
 create mode 100644 arch/arm/dts/rk3308-evb-u-boot.dtsi
 create mode 100644 arch/arm/dts/rk3308-evb.dts
 create mode 100644 arch/arm/dts/rk3308-u-boot.dtsi
 create mode 100644 arch/arm/dts/rk3308.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 11feb0c533..95538b117e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -93,6 +93,9 @@ dtb-$(CONFIG_ROCKCHIP_RK3288) += \
rk3288-veyron-speedy.dtb \
rk3288-vyasa.dtb
 
+dtb-$(CONFIG_ROCKCHIP_RK3308) += \
+   rk3308-evb.dtb
+
 dtb-$(CONFIG_ROCKCHIP_RK3328) += \
rk3328-evb.dtb \
rk3328-rock64.dtb
diff --git a/arch/arm/dts/rk3308-evb-u-boot.dtsi 
b/arch/arm/dts/rk3308-evb-u-boot.dtsi
new file mode 100644
index 00..c6ea746de0
--- /dev/null
+++ b/arch/arm/dts/rk3308-evb-u-boot.dtsi
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd
+ */
+#include "rk3308-u-boot.dtsi"
+
+/ {
+   chosen {
+   u-boot,spl-boot-order = "same-as-spl", 
+   };
+};
+
+ {
+   u-boot,dm-pre-reloc;
+   clock-frequency = <2400>;
+   status = "okay";
+};
diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
new file mode 100644
index 00..124a240866
--- /dev/null
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -0,0 +1,230 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ */
+
+/dts-v1/;
+#include 
+#include "rk3308.dtsi"
+
+/ {
+   model = "Rockchip RK3308 EVB";
+   compatible = "rockchip,rk3308-evb", "rockchip,rk3308";
+
+   chosen {
+   stdout-path = "serial4:150n8";
+   };
+
+   adc-keys0 {
+   compatible = "adc-keys";
+   io-channels = < 0>;
+   io-channel-names = "buttons";
+   poll-interval = <100>;
+   keyup-threshold-microvolt = <180>;
+
+   func-key {
+   linux,code = ;
+   label = "function";
+   press-threshold-microvolt = <18000>;
+   };
+   };
+
+   adc-keys1 {
+   compatible = "adc-keys";
+   io-channels = < 1>;
+   io-channel-names = "buttons";
+   poll-interval = <100>;
+   keyup-threshold-microvolt = <180>;
+
+   esc-key {
+   linux,code = ;
+   label = "micmute";
+   press-threshold-microvolt = <113>;
+   };
+
+   home-key {
+   linux,code = ;
+   label = "mode";
+   press-threshold-microvolt = <901000>;
+   };
+
+   menu-key {
+   linux,code = ;
+   label = "play";
+   press-threshold-microvolt = <624000>;
+   };
+
+   vol-down-key {
+   linux,code = ;
+   label = "volume down";
+   press-threshold-microvolt = <30>;
+   };
+
+   vol-up-key {
+   linux,code = ;
+   label = "volume up";
+   press-threshold-microvolt = <18000>;
+   };
+   };
+
+   gpio-keys {
+   compatible = "gpio-keys";
+   autorepeat;
+
+   pinctrl-names = "default";
+   pinctrl-0 = <_key>;
+
+   power {
+   gpios = < RK_PA6 GPIO_ACTIVE_LOW>;
+   linux,code = ;
+   label = "GPIO Key Power";
+   wakeup-source;
+   debounce-interval = <100>;
+   };
+   };
+
+   vcc12v_dcin: vcc12v-dcin {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc12v_dcin";
+   regulator-always-on;
+   regulator-boot-on;
+   regulator-min-microvolt = <1200>;
+   regulator-max-microvolt = <1200>;
+   };
+
+   vcc5v0_sys: vcc5v0-sys {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc5v0_sys";
+   regulator-always-on;
+   regulator-boot-on;
+   regulator-min-microvolt = <500>;
+   regulator-max-microvolt = <500>;
+   vin-supply = <_dcin>;
+   };
+
+   vdd_core: vdd-core {
+   

[U-Boot] [PATCH 1/6] arm: rockchip: Add RK3308 SOC support

[Andy Yan]

RK3308 is a quad Cortex A35 based SOC with rich audio
interfaces(I2S/PCM/TDM/PDM/SPDIF/VAD/HDMI ARC), which
designed for intelligent voice interaction and audio
input/output processing.

Signed-off-by: Andy Yan 

---

 arch/arm/include/asm/arch-rk3308/boot0.h  |  11 +
 arch/arm/include/asm/arch-rk3308/cru_rk3308.h | 290 ++
 arch/arm/include/asm/arch-rk3308/gpio.h   |  11 +
 arch/arm/include/asm/arch-rk3308/grf_rk3308.h | 197 
 arch/arm/mach-rockchip/Kconfig|  24 ++
 arch/arm/mach-rockchip/Makefile   |   1 +
 arch/arm/mach-rockchip/rk3308/Kconfig |  14 +
 arch/arm/mach-rockchip/rk3308/Makefile|   9 +
 arch/arm/mach-rockchip/rk3308/clk_rk3308.c|  31 ++
 arch/arm/mach-rockchip/rk3308/rk3308.c| 175 +++
 arch/arm/mach-rockchip/rk3308/syscon_rk3308.c |  20 ++
 include/configs/rk3308_common.h   |  58 
 12 files changed, 841 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-rk3308/boot0.h
 create mode 100644 arch/arm/include/asm/arch-rk3308/cru_rk3308.h
 create mode 100644 arch/arm/include/asm/arch-rk3308/gpio.h
 create mode 100644 arch/arm/include/asm/arch-rk3308/grf_rk3308.h
 create mode 100644 arch/arm/mach-rockchip/rk3308/Kconfig
 create mode 100644 arch/arm/mach-rockchip/rk3308/Makefile
 create mode 100644 arch/arm/mach-rockchip/rk3308/clk_rk3308.c
 create mode 100644 arch/arm/mach-rockchip/rk3308/rk3308.c
 create mode 100644 arch/arm/mach-rockchip/rk3308/syscon_rk3308.c
 create mode 100644 include/configs/rk3308_common.h

diff --git a/arch/arm/include/asm/arch-rk3308/boot0.h 
b/arch/arm/include/asm/arch-rk3308/boot0.h
new file mode 100644
index 00..2e78b074ad
--- /dev/null
+++ b/arch/arm/include/asm/arch-rk3308/boot0.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef __ASM_ARCH_BOOT0_H__
+#define __ASM_ARCH_BOOT0_H__
+
+#include 
+
+#endif
diff --git a/arch/arm/include/asm/arch-rk3308/cru_rk3308.h 
b/arch/arm/include/asm/arch-rk3308/cru_rk3308.h
new file mode 100644
index 00..a14b64cdb3
--- /dev/null
+++ b/arch/arm/include/asm/arch-rk3308/cru_rk3308.h
@@ -0,0 +1,290 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+ */
+#ifndef _ASM_ARCH_CRU_RK3308_H
+#define _ASM_ARCH_CRU_RK3308_H
+
+#include 
+
+#define MHz100
+#define OSC_HZ (24 * MHz)
+
+#define APLL_HZ(816 * MHz)
+
+#define CORE_ACLK_HZ   40800
+#define CORE_DBG_HZ20400
+
+#define BUS_ACLK_HZ2
+#define BUS_HCLK_HZ1
+#define BUS_PCLK_HZ1
+
+#define PERI_ACLK_HZ   2
+#define PERI_HCLK_HZ   1
+#define PERI_PCLK_HZ   1
+
+#define AUDIO_HCLK_HZ  1
+#define AUDIO_PCLK_HZ  1
+
+#define RK3308_PLL_CON(x)  ((x) * 0x4)
+#define RK3308_MODE_CON0xa0
+
+/* RK3308 pll id */
+enum rk3308_pll_id {
+   APLL,
+   DPLL,
+   VPLL0,
+   VPLL1,
+   PLL_COUNT,
+};
+
+struct rk3308_clk_info {
+   unsigned long id;
+   char *name;
+};
+
+/* Private data for the clock driver - used by rockchip_get_cru() */
+struct rk3308_clk_priv {
+   struct rk3308_cru *cru;
+   ulong armclk_hz;
+   ulong dpll_hz;
+   ulong vpll0_hz;
+   ulong vpll1_hz;
+};
+
+struct rk3308_cru {
+   struct rk3308_pll {
+   unsigned int con0;
+   unsigned int con1;
+   unsigned int con2;
+   unsigned int con3;
+   unsigned int con4;
+   unsigned int reserved0[3];
+   } pll[4];
+   unsigned int reserved1[8];
+   unsigned int mode;
+   unsigned int misc;
+   unsigned int reserved2[2];
+   unsigned int glb_cnt_th;
+   unsigned int glb_rst_st;
+   unsigned int glb_srst_fst;
+   unsigned int glb_srst_snd;
+   unsigned int glb_rst_con;
+   unsigned int pll_lock;
+   unsigned int reserved3[6];
+   unsigned int hwffc_con0;
+   unsigned int reserved4;
+   unsigned int hwffc_th;
+   unsigned int hwffc_intst;
+   unsigned int apll_con0_s;
+   unsigned int apll_con1_s;
+   unsigned int clksel_con0_s;
+   unsigned int reserved5;
+   unsigned int clksel_con[74];
+   unsigned int reserved6[54];
+   unsigned int clkgate_con[15];
+   unsigned int reserved7[(0x380 - 0x338) / 4 - 1];
+   unsigned int ssgtbl[32];
+   unsigned int softrst_con[10];
+   unsigned int reserved8[(0x480 - 0x424) / 4 - 1];
+   unsigned int sdmmc_con[2];
+   unsigned int sdio_con[2];
+   unsigned int emmc_con[2];
+};
+
+enum {
+   /* PLLCON0*/
+   PLL_BP_SHIFT= 15,
+   PLL_POSTDIV1_SHIFT  = 12,
+   PLL_POSTDIV1_MASK   = 7 << PLL_POSTDIV1_SHIFT,
+   PLL_FBDIV_SHIFT = 0,
+   PLL_FBDIV_MASK  = 0xfff,
+
+   /* PLLCON1 */
+   

[U-Boot] [PATCH v2 14/17] lib: crypto: add x509 parser

[AKASHI Takahiro]

Imported from linux kernel v5.3:
 x509.asn1 without changes
 x509_akid.asn1 without changes
 x509_parser.h without changes
 x509_cert_parser.c with changes marked as __UBOOT__
 x509_public_key.c with changes marked as __UBOOT__

Signed-off-by: AKASHI Takahiro 
---
 lib/Kconfig   |   1 +
 lib/Makefile  |   1 +
 lib/crypto/Kconfig|  12 +
 lib/crypto/Makefile   |  17 +
 lib/crypto/x509.asn1  |  60 +++
 lib/crypto/x509_akid.asn1 |  35 ++
 lib/crypto/x509_cert_parser.c | 697 ++
 lib/crypto/x509_parser.h  |  57 +++
 lib/crypto/x509_public_key.c  | 292 ++
 9 files changed, 1172 insertions(+)
 create mode 100644 lib/crypto/x509.asn1
 create mode 100644 lib/crypto/x509_akid.asn1
 create mode 100644 lib/crypto/x509_cert_parser.c
 create mode 100644 lib/crypto/x509_parser.h
 create mode 100644 lib/crypto/x509_public_key.c

diff --git a/lib/Kconfig b/lib/Kconfig
index 1e373f9f8455..d34a8da8ac60 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -253,6 +253,7 @@ config AES
  present.
 
 source lib/rsa/Kconfig
+source lib/crypto/Kconfig
 
 config TPM
bool "Trusted Platform Module (TPM) Support"
diff --git a/lib/Makefile b/lib/Makefile
index 52bf33d17086..16ed26f31708 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_CMD_DHRYSTONE) += dhry/
 obj-$(CONFIG_ARCH_AT91) += at91/
 obj-$(CONFIG_OPTEE) += optee/
 obj-$(CONFIG_ASN1_DECODER) += asn1_decoder.o
+obj-y += crypto/
 
 obj-$(CONFIG_AES) += aes.o
 
diff --git a/lib/crypto/Kconfig b/lib/crypto/Kconfig
index 9572ea8c87f3..aeb599c593ac 100644
--- a/lib/crypto/Kconfig
+++ b/lib/crypto/Kconfig
@@ -27,4 +27,16 @@ config RSA_PUBLIC_KEY_PARSER
  public key data and provides the ability to instantiate a public
  key.
 
+config X509_CERTIFICATE_PARSER
+   bool "X.509 certificate parser"
+   depends on ASYMMETRIC_PUBLIC_KEY_SUBTYPE
+   select ASN1_DECODER
+   select ASN1_COMPILER
+   select OID_REGISTRY
+   select LIB_DATE
+   help
+ This option provides support for parsing X.509 format blobs for key
+ data and provides the ability to instantiate a crypto key from a
+ public key packet found inside the certificate.
+
 endif # ASYMMETRIC_KEY_TYPE
diff --git a/lib/crypto/Makefile b/lib/crypto/Makefile
index 69330a9ebd27..d7e27be568a1 100644
--- a/lib/crypto/Makefile
+++ b/lib/crypto/Makefile
@@ -19,3 +19,20 @@ rsa_public_key-y := \
 
 $(obj)/rsapubkey.asn1.o: $(obj)/rsapubkey.asn1.c $(obj)/rsapubkey.asn1.h
 $(obj)/rsa_helper.o: $(obj)/rsapubkey.asn1.h
+
+#
+# X.509 Certificate handling
+#
+obj-$(CONFIG_X509_CERTIFICATE_PARSER) += x509_key_parser.o
+x509_key_parser-y := \
+   x509.asn1.o \
+   x509_akid.asn1.o \
+   x509_cert_parser.o \
+   x509_public_key.o
+
+$(obj)/x509_cert_parser.o: \
+   $(obj)/x509.asn1.h \
+   $(obj)/x509_akid.asn1.h
+
+$(obj)/x509.asn1.o: $(obj)/x509.asn1.c $(obj)/x509.asn1.h
+$(obj)/x509_akid.asn1.o: $(obj)/x509_akid.asn1.c $(obj)/x509_akid.asn1.h
diff --git a/lib/crypto/x509.asn1 b/lib/crypto/x509.asn1
new file mode 100644
index ..5c9f4e4a5231
--- /dev/null
+++ b/lib/crypto/x509.asn1
@@ -0,0 +1,60 @@
+Certificate ::= SEQUENCE {
+   tbsCertificate  TBSCertificate ({ x509_note_tbs_certificate }),
+   signatureAlgorithm  AlgorithmIdentifier,
+   signature   BIT STRING ({ x509_note_signature })
+   }
+
+TBSCertificate ::= SEQUENCE {
+   version   [ 0 ] Version DEFAULT,
+   serialNumberCertificateSerialNumber ({ x509_note_serial }),
+   signature   AlgorithmIdentifier ({ x509_note_pkey_algo }),
+   issuer  Name ({ x509_note_issuer }),
+   validityValidity,
+   subject Name ({ x509_note_subject }),
+   subjectPublicKeyInfoSubjectPublicKeyInfo,
+   issuerUniqueID[ 1 ] IMPLICIT UniqueIdentifier OPTIONAL,
+   subjectUniqueID   [ 2 ] IMPLICIT UniqueIdentifier OPTIONAL,
+   extensions[ 3 ] Extensions OPTIONAL
+   }
+
+Version ::= INTEGER
+CertificateSerialNumber ::= INTEGER
+
+AlgorithmIdentifier ::= SEQUENCE {
+   algorithm   OBJECT IDENTIFIER ({ x509_note_OID }),
+   parameters  ANY OPTIONAL ({ x509_note_params })
+}
+
+Name ::= SEQUENCE OF RelativeDistinguishedName
+
+RelativeDistinguishedName ::= SET OF AttributeValueAssertion
+
+AttributeValueAssertion ::= SEQUENCE {
+   attributeType   OBJECT IDENTIFIER ({ x509_note_OID }),
+   attributeValue  ANY ({ x509_extract_name_segment })
+   }
+
+Validity ::= SEQUENCE {
+   notBefore   Time ({ x509_note_not_before }),
+   notAfterTime ({ x509_note_not_after })
+   }
+
+Time ::= CHOICE {
+   utcTime UTCTime,
+   generalTime GeneralizedTime
+   }
+

[U-Boot] [PATCH v2 15/17] lib: crypto: add pkcs7 message parser

[AKASHI Takahiro]

Imported from linux kernel v5.3:
 pkcs7.asn1 without changes
 pkcs7.h with changes marked as __UBOOT__
 pkcs7_parser.h without changes
 pkcs7_parser.c with changes marked as __UBOOT__

Signed-off-by: AKASHI Takahiro 
---
 include/crypto/pkcs7.h|  47 +++
 lib/crypto/Kconfig|  10 +
 lib/crypto/Makefile   |  11 +
 lib/crypto/pkcs7.asn1 | 135 
 lib/crypto/pkcs7_parser.c | 693 ++
 lib/crypto/pkcs7_parser.h |  65 
 scripts/Makefile.build|   4 +-
 7 files changed, 962 insertions(+), 3 deletions(-)
 create mode 100644 include/crypto/pkcs7.h
 create mode 100644 lib/crypto/pkcs7.asn1
 create mode 100644 lib/crypto/pkcs7_parser.c
 create mode 100644 lib/crypto/pkcs7_parser.h

diff --git a/include/crypto/pkcs7.h b/include/crypto/pkcs7.h
new file mode 100644
index ..8f5c8a7ee3b9
--- /dev/null
+++ b/include/crypto/pkcs7.h
@@ -0,0 +1,47 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* PKCS#7 crypto data parser
+ *
+ * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowe...@redhat.com)
+ */
+
+#ifndef _CRYPTO_PKCS7_H
+#define _CRYPTO_PKCS7_H
+
+#ifndef __UBOOT__
+#include 
+#include 
+#endif
+
+struct key;
+struct pkcs7_message;
+
+/*
+ * pkcs7_parser.c
+ */
+extern struct pkcs7_message *pkcs7_parse_message(const void *data,
+size_t datalen);
+extern void pkcs7_free_message(struct pkcs7_message *pkcs7);
+
+extern int pkcs7_get_content_data(const struct pkcs7_message *pkcs7,
+ const void **_data, size_t *_datalen,
+ size_t *_headerlen);
+
+#ifndef __UBOOT__
+/*
+ * pkcs7_trust.c
+ */
+extern int pkcs7_validate_trust(struct pkcs7_message *pkcs7,
+   struct key *trust_keyring);
+
+/*
+ * pkcs7_verify.c
+ */
+extern int pkcs7_verify(struct pkcs7_message *pkcs7,
+   enum key_being_used_for usage);
+
+extern int pkcs7_supply_detached_data(struct pkcs7_message *pkcs7,
+ const void *data, size_t datalen);
+#endif
+
+#endif /* _CRYPTO_PKCS7_H */
diff --git a/lib/crypto/Kconfig b/lib/crypto/Kconfig
index aeb599c593ac..2b221b915aa6 100644
--- a/lib/crypto/Kconfig
+++ b/lib/crypto/Kconfig
@@ -39,4 +39,14 @@ config X509_CERTIFICATE_PARSER
  data and provides the ability to instantiate a crypto key from a
  public key packet found inside the certificate.
 
+config PKCS7_MESSAGE_PARSER
+   bool "PKCS#7 message parser"
+   depends on X509_CERTIFICATE_PARSER
+   select ASN1_DECODER
+   select ASN1_COMPILER
+   select OID_REGISTRY
+   help
+ This option provides support for parsing PKCS#7 format messages for
+ signature data and provides the ability to verify the signature.
+
 endif # ASYMMETRIC_KEY_TYPE
diff --git a/lib/crypto/Makefile b/lib/crypto/Makefile
index d7e27be568a1..8267fee0a7b8 100644
--- a/lib/crypto/Makefile
+++ b/lib/crypto/Makefile
@@ -36,3 +36,14 @@ $(obj)/x509_cert_parser.o: \
 
 $(obj)/x509.asn1.o: $(obj)/x509.asn1.c $(obj)/x509.asn1.h
 $(obj)/x509_akid.asn1.o: $(obj)/x509_akid.asn1.c $(obj)/x509_akid.asn1.h
+
+#
+# PKCS#7 message handling
+#
+obj-$(CONFIG_PKCS7_MESSAGE_PARSER) += pkcs7_message.o
+pkcs7_message-y := \
+   pkcs7.asn1.o \
+   pkcs7_parser.o
+
+$(obj)/pkcs7_parser.o: $(obj)/pkcs7.asn1.h
+$(obj)/pkcs7.asn1.o: $(obj)/pkcs7.asn1.c $(obj)/pkcs7.asn1.h
diff --git a/lib/crypto/pkcs7.asn1 b/lib/crypto/pkcs7.asn1
new file mode 100644
index ..1eca740b816a
--- /dev/null
+++ b/lib/crypto/pkcs7.asn1
@@ -0,0 +1,135 @@
+PKCS7ContentInfo ::= SEQUENCE {
+   contentType ContentType ({ pkcs7_check_content_type }),
+   content [0] EXPLICIT SignedData OPTIONAL
+}
+
+ContentType ::= OBJECT IDENTIFIER ({ pkcs7_note_OID })
+
+SignedData ::= SEQUENCE {
+   version INTEGER ({ pkcs7_note_signeddata_version }),
+   digestAlgorithmsDigestAlgorithmIdentifiers,
+   contentInfo ContentInfo ({ pkcs7_note_content }),
+   certificatesCHOICE {
+   certSet [0] IMPLICIT 
ExtendedCertificatesAndCertificates,
+   certSequence[2] IMPLICIT Certificates
+   } OPTIONAL ({ pkcs7_note_certificate_list }),
+   crls CHOICE {
+   crlSet  [1] IMPLICIT CertificateRevocationLists,
+   crlSequence [3] IMPLICIT CRLSequence
+   } OPTIONAL,
+   signerInfos SignerInfos
+}
+
+ContentInfo ::= SEQUENCE {
+   contentType ContentType ({ pkcs7_note_OID }),
+   content [0] EXPLICIT Data OPTIONAL
+}
+
+Data ::= ANY ({ pkcs7_note_data })
+
+DigestAlgorithmIdentifiers ::= CHOICE {
+   daSet   SET OF DigestAlgorithmIdentifier,
+   daSequence  SEQUENCE OF DigestAlgorithmIdentifier
+}
+
+DigestAlgorithmIdentifier ::= SEQUENCE {
+   algorithm 

[U-Boot] [PATCH v2 11/17] lib: add oid registry utility

[AKASHI Takahiro]

Imported from linux kernel v5.3:
 build_OID_registry without changes
 oid_registry.h without changes
 oid_registry.c with changes marked as __UBOOT__

Signed-off-by: AKASHI Takahiro 
---
 include/linux/oid_registry.h | 117 
 lib/Kconfig  |   5 +
 lib/Makefile |  16 +++
 lib/oid_registry.c   | 179 ++
 scripts/build_OID_registry   | 203 +++
 5 files changed, 520 insertions(+)
 create mode 100644 include/linux/oid_registry.h
 create mode 100644 lib/oid_registry.c
 create mode 100755 scripts/build_OID_registry

diff --git a/include/linux/oid_registry.h b/include/linux/oid_registry.h
new file mode 100644
index ..657d6bf2c064
--- /dev/null
+++ b/include/linux/oid_registry.h
@@ -0,0 +1,117 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* ASN.1 Object identifier (OID) registry
+ *
+ * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowe...@redhat.com)
+ */
+
+#ifndef _LINUX_OID_REGISTRY_H
+#define _LINUX_OID_REGISTRY_H
+
+#include 
+
+/*
+ * OIDs are turned into these values if possible, or OID__NR if not held here.
+ *
+ * NOTE!  Do not mess with the format of each line as this is read by
+ *   build_OID_registry.pl to generate the data for look_up_OID().
+ */
+enum OID {
+   OID_id_dsa_with_sha1,   /* 1.2.840.10030.4.3 */
+   OID_id_dsa, /* 1.2.840.10040.4.1 */
+   OID_id_ecdsa_with_sha1, /* 1.2.840.10045.4.1 */
+   OID_id_ecPublicKey, /* 1.2.840.10045.2.1 */
+
+   /* PKCS#1 {iso(1) member-body(2) us(840) rsadsi(113549) pkcs(1) 
pkcs-1(1)} */
+   OID_rsaEncryption,  /* 1.2.840.113549.1.1.1 */
+   OID_md2WithRSAEncryption,   /* 1.2.840.113549.1.1.2 */
+   OID_md3WithRSAEncryption,   /* 1.2.840.113549.1.1.3 */
+   OID_md4WithRSAEncryption,   /* 1.2.840.113549.1.1.4 */
+   OID_sha1WithRSAEncryption,  /* 1.2.840.113549.1.1.5 */
+   OID_sha256WithRSAEncryption,/* 1.2.840.113549.1.1.11 */
+   OID_sha384WithRSAEncryption,/* 1.2.840.113549.1.1.12 */
+   OID_sha512WithRSAEncryption,/* 1.2.840.113549.1.1.13 */
+   OID_sha224WithRSAEncryption,/* 1.2.840.113549.1.1.14 */
+   /* PKCS#7 {iso(1) member-body(2) us(840) rsadsi(113549) pkcs(1) 
pkcs-7(7)} */
+   OID_data,   /* 1.2.840.113549.1.7.1 */
+   OID_signed_data,/* 1.2.840.113549.1.7.2 */
+   /* PKCS#9 {iso(1) member-body(2) us(840) rsadsi(113549) pkcs(1) 
pkcs-9(9)} */
+   OID_email_address,  /* 1.2.840.113549.1.9.1 */
+   OID_contentType,/* 1.2.840.113549.1.9.3 */
+   OID_messageDigest,  /* 1.2.840.113549.1.9.4 */
+   OID_signingTime,/* 1.2.840.113549.1.9.5 */
+   OID_smimeCapabilites,   /* 1.2.840.113549.1.9.15 */
+   OID_smimeAuthenticatedAttrs,/* 1.2.840.113549.1.9.16.2.11 */
+
+   /* {iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2)} */
+   OID_md2,/* 1.2.840.113549.2.2 */
+   OID_md4,/* 1.2.840.113549.2.4 */
+   OID_md5,/* 1.2.840.113549.2.5 */
+
+   /* Microsoft Authenticode & Software Publishing */
+   OID_msIndirectData, /* 1.3.6.1.4.1.311.2.1.4 */
+   OID_msStatementType,/* 1.3.6.1.4.1.311.2.1.11 */
+   OID_msSpOpusInfo,   /* 1.3.6.1.4.1.311.2.1.12 */
+   OID_msPeImageDataObjId, /* 1.3.6.1.4.1.311.2.1.15 */
+   OID_msIndividualSPKeyPurpose,   /* 1.3.6.1.4.1.311.2.1.21 */
+   OID_msOutlookExpress,   /* 1.3.6.1.4.1.311.16.4 */
+
+   OID_certAuthInfoAccess, /* 1.3.6.1.5.5.7.1.1 */
+   OID_sha1,   /* 1.3.14.3.2.26 */
+   OID_sha256, /* 2.16.840.1.101.3.4.2.1 */
+   OID_sha384, /* 2.16.840.1.101.3.4.2.2 */
+   OID_sha512, /* 2.16.840.1.101.3.4.2.3 */
+   OID_sha224, /* 2.16.840.1.101.3.4.2.4 */
+
+   /* Distinguished Name attribute IDs [RFC 2256] */
+   OID_commonName, /* 2.5.4.3 */
+   OID_surname,/* 2.5.4.4 */
+   OID_countryName,/* 2.5.4.6 */
+   OID_locality,   /* 2.5.4.7 */
+   OID_stateOrProvinceName,/* 2.5.4.8 */
+   OID_organizationName,   /* 2.5.4.10 */
+   OID_organizationUnitName,   /* 2.5.4.11 */
+   OID_title,  /* 2.5.4.12 */
+   OID_description,/* 2.5.4.13 */
+   OID_name,   /* 2.5.4.41 */
+   OID_givenName,  /* 2.5.4.42 */
+   OID_initials,   /* 2.5.4.43 */
+   OID_generationalQualifier,  /* 2.5.4.44 */
+
+   /* Certificate extension IDs */
+  

[U-Boot] [PATCH v2 16/17] test: add lib specific Kconfig

[AKASHI Takahiro]

Adding new unit tests for library routines will make test/Kconfig
messy. So just create a Kconfig file under lib.

Signed-off-by: AKASHI Takahiro 
---
 test/Kconfig | 8 +---
 test/lib/Kconfig | 7 +++
 2 files changed, 8 insertions(+), 7 deletions(-)
 create mode 100644 test/lib/Kconfig

diff --git a/test/Kconfig b/test/Kconfig
index 48a0e501f88f..3a5aabedd0ef 100644
--- a/test/Kconfig
+++ b/test/Kconfig
@@ -6,13 +6,7 @@ menuconfig UNIT_TEST
  This does not require sandbox to be included, but it is most
  often used there.
 
-config UT_LIB
-   bool "Unit tests for library functions"
-   depends on UNIT_TEST
-   default y
-   help
- Enables the 'ut lib' command which tests library functions like
- memcat(), memcyp(), memmove().
+source "test/lib/Kconfig"
 
 config UT_TIME
bool "Unit tests for time functions"
diff --git a/test/lib/Kconfig b/test/lib/Kconfig
new file mode 100644
index ..a983bdcaa3f1
--- /dev/null
+++ b/test/lib/Kconfig
@@ -0,0 +1,7 @@
+config UT_LIB
+   bool "Unit tests for library functions"
+   depends on UNIT_TEST
+   default y
+   help
+ Enables the 'ut lib' command which tests library functions like
+ memcat(), memcyp(), memmove().
-- 
2.21.0

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[U-Boot] [PATCH v2 09/17] lib: add asn1 decoder

[AKASHI Takahiro]

Imported from linux kernel v5.3:
 lib/asn1_decoder.c with changes marked as __UBOOT__

Signed-off-by: AKASHI Takahiro 
---
 lib/Kconfig|   5 +
 lib/Makefile   |   1 +
 lib/asn1_decoder.c | 527 +
 3 files changed, 533 insertions(+)
 create mode 100644 lib/asn1_decoder.c

diff --git a/lib/Kconfig b/lib/Kconfig
index 83c05645487f..ddf7d1313b09 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -524,6 +524,11 @@ endmenu
 config ASN1_COMPILER
bool
 
+config ASN1_DECODER
+   bool
+   help
+ Enable asn1 decoder library.
+
 source lib/efi/Kconfig
 source lib/efi_loader/Kconfig
 source lib/optee/Kconfig
diff --git a/lib/Makefile b/lib/Makefile
index a44f9cc0ae20..4aa99fe779b1 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_OF_LIVE) += of_live.o
 obj-$(CONFIG_CMD_DHRYSTONE) += dhry/
 obj-$(CONFIG_ARCH_AT91) += at91/
 obj-$(CONFIG_OPTEE) += optee/
+obj-$(CONFIG_ASN1_DECODER) += asn1_decoder.o
 
 obj-$(CONFIG_AES) += aes.o
 
diff --git a/lib/asn1_decoder.c b/lib/asn1_decoder.c
new file mode 100644
index ..db222625dd0f
--- /dev/null
+++ b/lib/asn1_decoder.c
@@ -0,0 +1,527 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/* Decoder for ASN.1 BER/DER/CER encoded bytestream
+ *
+ * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowe...@redhat.com)
+ */
+
+#ifdef __UBOOT__
+#include 
+#else
+#include 
+#endif
+#include 
+#include 
+#ifndef __UBOOT__
+#include 
+#endif
+#include 
+#include 
+
+static const unsigned char asn1_op_lengths[ASN1_OP__NR] = {
+   /*  OPC TAG JMP ACT */
+   [ASN1_OP_MATCH] = 1 + 1,
+   [ASN1_OP_MATCH_OR_SKIP] = 1 + 1,
+   [ASN1_OP_MATCH_ACT] = 1 + 1 + 1,
+   [ASN1_OP_MATCH_ACT_OR_SKIP] = 1 + 1 + 1,
+   [ASN1_OP_MATCH_JUMP]= 1 + 1 + 1,
+   [ASN1_OP_MATCH_JUMP_OR_SKIP]= 1 + 1 + 1,
+   [ASN1_OP_MATCH_ANY] = 1,
+   [ASN1_OP_MATCH_ANY_OR_SKIP] = 1,
+   [ASN1_OP_MATCH_ANY_ACT] = 1 + 1,
+   [ASN1_OP_MATCH_ANY_ACT_OR_SKIP] = 1 + 1,
+   [ASN1_OP_COND_MATCH_OR_SKIP]= 1 + 1,
+   [ASN1_OP_COND_MATCH_ACT_OR_SKIP]= 1 + 1 + 1,
+   [ASN1_OP_COND_MATCH_JUMP_OR_SKIP]   = 1 + 1 + 1,
+   [ASN1_OP_COND_MATCH_ANY]= 1,
+   [ASN1_OP_COND_MATCH_ANY_OR_SKIP]= 1,
+   [ASN1_OP_COND_MATCH_ANY_ACT]= 1 + 1,
+   [ASN1_OP_COND_MATCH_ANY_ACT_OR_SKIP]= 1 + 1,
+   [ASN1_OP_COND_FAIL] = 1,
+   [ASN1_OP_COMPLETE]  = 1,
+   [ASN1_OP_ACT]   = 1 + 1,
+   [ASN1_OP_MAYBE_ACT] = 1 + 1,
+   [ASN1_OP_RETURN]= 1,
+   [ASN1_OP_END_SEQ]   = 1,
+   [ASN1_OP_END_SEQ_OF]= 1 + 1,
+   [ASN1_OP_END_SET]   = 1,
+   [ASN1_OP_END_SET_OF]= 1 + 1,
+   [ASN1_OP_END_SEQ_ACT]   = 1 + 1,
+   [ASN1_OP_END_SEQ_OF_ACT]= 1 + 1 + 1,
+   [ASN1_OP_END_SET_ACT]   = 1 + 1,
+   [ASN1_OP_END_SET_OF_ACT]= 1 + 1 + 1,
+};
+
+/*
+ * Find the length of an indefinite length object
+ * @data: The data buffer
+ * @datalen: The end of the innermost containing element in the buffer
+ * @_dp: The data parse cursor (updated before returning)
+ * @_len: Where to return the size of the element.
+ * @_errmsg: Where to return a pointer to an error message on error
+ */
+static int asn1_find_indefinite_length(const unsigned char *data, size_t 
datalen,
+  size_t *_dp, size_t *_len,
+  const char **_errmsg)
+{
+   unsigned char tag, tmp;
+   size_t dp = *_dp, len, n;
+   int indef_level = 1;
+
+next_tag:
+   if (unlikely(datalen - dp < 2)) {
+   if (datalen == dp)
+   goto missing_eoc;
+   goto data_overrun_error;
+   }
+
+   /* Extract a tag from the data */
+   tag = data[dp++];
+   if (tag == ASN1_EOC) {
+   /* It appears to be an EOC. */
+   if (data[dp++] != 0)
+   goto invalid_eoc;
+   if (--indef_level <= 0) {
+   *_len = dp - *_dp;
+   *_dp = dp;
+   return 0;
+   }
+   goto next_tag;
+   }
+
+   if (unlikely((tag & 0x1f) == ASN1_LONG_TAG)) {
+   do {
+   if (unlikely(datalen - dp < 2))
+   goto data_overrun_error;
+   tmp = data[dp++];
+  

Re: [U-Boot] [PATCH 1/1] dwc3-generic: Don't fail probe if clk/reset entries are absent

[Sam Protsenko]

Hi Vignesh,

On Fri, Oct 25, 2019 at 11:17 AM Vignesh Raghavendra  wrote:
>
> Some boards don't populate clk/reset entries as these are are optional
> as per binding documentation. Therefore, don't fail driver probe if
> clk/reset entries are absent in DT.
>
> This fixes fastboot failures seen due to enabling of CONFIG_CLK on AM57xx
>
> Fixes: e8e683d33b0c ("board: ti: am57xx-idk: Configure the CDCE913 clock 
> synthesizer")
> Reported-by: Sam Protsenko 
> Signed-off-by: Vignesh Raghavendra 
> ---

Tested-by: Sam Protsenko 
Reviewed-by: Sam Protsenko 

>  drivers/usb/dwc3/dwc3-generic.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
> index 406bf0b3628b..d76cd7a4c5ca 100644
> --- a/drivers/usb/dwc3/dwc3-generic.c
> +++ b/drivers/usb/dwc3/dwc3-generic.c
> @@ -258,7 +258,7 @@ static int dwc3_glue_reset_init(struct udevice *dev,
> int ret;
>
> ret = reset_get_bulk(dev, >resets);
> -   if (ret == -ENOTSUPP)
> +   if (ret == -ENOTSUPP || ret == -ENOENT)
> return 0;
> else if (ret)
> return ret;
> @@ -278,7 +278,7 @@ static int dwc3_glue_clk_init(struct udevice *dev,
> int ret;
>
> ret = clk_get_bulk(dev, >clks);
> -   if (ret == -ENOSYS)
> +   if (ret == -ENOSYS || ret == -ENOENT)
> return 0;
> if (ret)
> return ret;
> --
> 2.23.0
>
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[U-Boot] [PATCH v2 12/17] lib: crypto: add public key utility

[AKASHI Takahiro]

Imported from linux kernel v5.3:
 asymmetric-type.h with changes marked as __UBOOT__
 asymmetric_type.c with changes marked as __UBOOT__
 public_key.h with changes marked as __UBOOT__
 public_key.c with changes marked as __UBOOT__

Signed-off-by: AKASHI Takahiro 
---
 include/crypto/public_key.h|  90 +
 include/keys/asymmetric-type.h |  88 +
 lib/crypto/Kconfig |  19 +
 lib/crypto/Makefile|  10 +
 lib/crypto/asymmetric_type.c   | 668 +
 lib/crypto/public_key.c| 376 +++
 6 files changed, 1251 insertions(+)
 create mode 100644 include/crypto/public_key.h
 create mode 100644 include/keys/asymmetric-type.h
 create mode 100644 lib/crypto/Kconfig
 create mode 100644 lib/crypto/Makefile
 create mode 100644 lib/crypto/asymmetric_type.c
 create mode 100644 lib/crypto/public_key.c

diff --git a/include/crypto/public_key.h b/include/crypto/public_key.h
new file mode 100644
index ..436a1ee1ee64
--- /dev/null
+++ b/include/crypto/public_key.h
@@ -0,0 +1,90 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* Asymmetric public-key algorithm definitions
+ *
+ * See Documentation/crypto/asymmetric-keys.txt
+ *
+ * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowe...@redhat.com)
+ */
+
+#ifndef _LINUX_PUBLIC_KEY_H
+#define _LINUX_PUBLIC_KEY_H
+
+#ifdef __UBOOT__
+#include 
+#else
+#include 
+#endif
+#include 
+
+/*
+ * Cryptographic data for the public-key subtype of the asymmetric key type.
+ *
+ * Note that this may include private part of the key as well as the public
+ * part.
+ */
+struct public_key {
+   void *key;
+   u32 keylen;
+   enum OID algo;
+   void *params;
+   u32 paramlen;
+   bool key_is_private;
+   const char *id_type;
+   const char *pkey_algo;
+};
+
+extern void public_key_free(struct public_key *key);
+
+/*
+ * Public key cryptography signature data
+ */
+struct public_key_signature {
+   struct asymmetric_key_id *auth_ids[2];
+   u8 *s;  /* Signature */
+   u32 s_size; /* Number of bytes in signature */
+   u8 *digest;
+   u8 digest_size; /* Number of bytes in digest */
+   const char *pkey_algo;
+   const char *hash_algo;
+   const char *encoding;
+};
+
+extern void public_key_signature_free(struct public_key_signature *sig);
+
+#ifndef __UBOOT__
+extern struct asymmetric_key_subtype public_key_subtype;
+
+struct key;
+struct key_type;
+union key_payload;
+
+extern int restrict_link_by_signature(struct key *dest_keyring,
+ const struct key_type *type,
+ const union key_payload *payload,
+ struct key *trust_keyring);
+
+extern int restrict_link_by_key_or_keyring(struct key *dest_keyring,
+  const struct key_type *type,
+  const union key_payload *payload,
+  struct key *trusted);
+
+extern int restrict_link_by_key_or_keyring_chain(struct key *trust_keyring,
+const struct key_type *type,
+const union key_payload 
*payload,
+struct key *trusted);
+
+extern int query_asymmetric_key(const struct kernel_pkey_params *,
+   struct kernel_pkey_query *);
+
+extern int encrypt_blob(struct kernel_pkey_params *, const void *, void *);
+extern int decrypt_blob(struct kernel_pkey_params *, const void *, void *);
+extern int create_signature(struct kernel_pkey_params *, const void *, void *);
+extern int verify_signature(const struct key *,
+   const struct public_key_signature *);
+
+int public_key_verify_signature(const struct public_key *pkey,
+   const struct public_key_signature *sig);
+#endif /* !__UBOOT__ */
+
+#endif /* _LINUX_PUBLIC_KEY_H */
diff --git a/include/keys/asymmetric-type.h b/include/keys/asymmetric-type.h
new file mode 100644
index ..47d83917df2f
--- /dev/null
+++ b/include/keys/asymmetric-type.h
@@ -0,0 +1,88 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* Asymmetric Public-key cryptography key type interface
+ *
+ * See Documentation/crypto/asymmetric-keys.txt
+ *
+ * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowe...@redhat.com)
+ */
+
+#ifndef _KEYS_ASYMMETRIC_TYPE_H
+#define _KEYS_ASYMMETRIC_TYPE_H
+
+#ifndef __UBOOT__
+#include 
+#include 
+
+extern struct key_type key_type_asymmetric;
+
+/*
+ * The key payload is four words.  The asymmetric-type key uses them as
+ * follows:
+ */
+enum asymmetric_payload_bits {
+   asym_crypto,/* The data representing the key */
+   asym_subtype,   /* Pointer to an 

[U-Boot] [PATCH v2 13/17] lib: crypto: add rsa public key parser

[AKASHI Takahiro]

Imported from linux kernel v5.3:
rsapubkey.asn1 without changes
rsa.h without changes
rsa_helper.c with changes marked as __UBOOT__

Signed-off-by: AKASHI Takahiro 
---
 include/crypto/internal/rsa.h |  57 ++
 lib/crypto/Kconfig|  11 ++
 lib/crypto/Makefile   |  11 ++
 lib/crypto/rsa_helper.c   | 198 ++
 lib/crypto/rsapubkey.asn1 |   4 +
 5 files changed, 281 insertions(+)
 create mode 100644 include/crypto/internal/rsa.h
 create mode 100644 lib/crypto/rsa_helper.c
 create mode 100644 lib/crypto/rsapubkey.asn1

diff --git a/include/crypto/internal/rsa.h b/include/crypto/internal/rsa.h
new file mode 100644
index ..e870133f4b77
--- /dev/null
+++ b/include/crypto/internal/rsa.h
@@ -0,0 +1,57 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * RSA internal helpers
+ *
+ * Copyright (c) 2015, Intel Corporation
+ * Authors: Tadeusz Struk 
+ */
+#ifndef _RSA_HELPER_
+#define _RSA_HELPER_
+#include 
+
+/**
+ * rsa_key - RSA key structure
+ * @n   : RSA modulus raw byte stream
+ * @e   : RSA public exponent raw byte stream
+ * @d   : RSA private exponent raw byte stream
+ * @p   : RSA prime factor p of n raw byte stream
+ * @q   : RSA prime factor q of n raw byte stream
+ * @dp  : RSA exponent d mod (p - 1) raw byte stream
+ * @dq  : RSA exponent d mod (q - 1) raw byte stream
+ * @qinv: RSA CRT coefficient q^(-1) mod p raw byte stream
+ * @n_sz: length in bytes of RSA modulus n
+ * @e_sz: length in bytes of RSA public exponent
+ * @d_sz: length in bytes of RSA private exponent
+ * @p_sz: length in bytes of p field
+ * @q_sz: length in bytes of q field
+ * @dp_sz   : length in bytes of dp field
+ * @dq_sz   : length in bytes of dq field
+ * @qinv_sz : length in bytes of qinv field
+ */
+struct rsa_key {
+   const u8 *n;
+   const u8 *e;
+   const u8 *d;
+   const u8 *p;
+   const u8 *q;
+   const u8 *dp;
+   const u8 *dq;
+   const u8 *qinv;
+   size_t n_sz;
+   size_t e_sz;
+   size_t d_sz;
+   size_t p_sz;
+   size_t q_sz;
+   size_t dp_sz;
+   size_t dq_sz;
+   size_t qinv_sz;
+};
+
+int rsa_parse_pub_key(struct rsa_key *rsa_key, const void *key,
+ unsigned int key_len);
+
+int rsa_parse_priv_key(struct rsa_key *rsa_key, const void *key,
+  unsigned int key_len);
+
+extern struct crypto_template rsa_pkcs1pad_tmpl;
+#endif
diff --git a/lib/crypto/Kconfig b/lib/crypto/Kconfig
index b8e8288d2f80..9572ea8c87f3 100644
--- a/lib/crypto/Kconfig
+++ b/lib/crypto/Kconfig
@@ -16,4 +16,15 @@ config ASYMMETRIC_PUBLIC_KEY_SUBTYPE
  appropriate hash algorithms (such as SHA-1) must be available.
  ENOPKG will be reported if the requisite algorithm is unavailable.
 
+config RSA_PUBLIC_KEY_PARSER
+   bool "RSA public key parser"
+   depends on ASYMMETRIC_PUBLIC_KEY_SUBTYPE
+   select ASN1_DECODER
+   select ASN1_COMPILER
+   select OID_REGISTRY
+   help
+ This option provides support for parsing a blob containing RSA
+ public key data and provides the ability to instantiate a public
+ key.
+
 endif # ASYMMETRIC_KEY_TYPE
diff --git a/lib/crypto/Makefile b/lib/crypto/Makefile
index a284de9e0411..69330a9ebd27 100644
--- a/lib/crypto/Makefile
+++ b/lib/crypto/Makefile
@@ -8,3 +8,14 @@ obj-$(CONFIG_ASYMMETRIC_KEY_TYPE) += asymmetric_keys.o
 asymmetric_keys-y := asymmetric_type.o
 
 obj-$(CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE) += public_key.o
+
+#
+# RSA public key parser
+#
+obj-$(CONFIG_RSA_PUBLIC_KEY_PARSER) += rsa_public_key.o
+rsa_public_key-y := \
+   rsapubkey.asn1.o \
+   rsa_helper.o
+
+$(obj)/rsapubkey.asn1.o: $(obj)/rsapubkey.asn1.c $(obj)/rsapubkey.asn1.h
+$(obj)/rsa_helper.o: $(obj)/rsapubkey.asn1.h
diff --git a/lib/crypto/rsa_helper.c b/lib/crypto/rsa_helper.c
new file mode 100644
index ..aca627a4a619
--- /dev/null
+++ b/lib/crypto/rsa_helper.c
@@ -0,0 +1,198 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * RSA key extract helper
+ *
+ * Copyright (c) 2015, Intel Corporation
+ * Authors: Tadeusz Struk 
+ */
+#ifndef __UBOOT__
+#include 
+#include 
+#endif
+#include 
+#ifndef __UBOOT__
+#include 
+#endif
+#include 
+#include "rsapubkey.asn1.h"
+#ifndef __UBOOT__
+#include "rsaprivkey.asn1.h"
+#endif
+
+int rsa_get_n(void *context, size_t hdrlen, unsigned char tag,
+ const void *value, size_t vlen)
+{
+   struct rsa_key *key = context;
+#ifndef __UBOOT__
+   const u8 *ptr = value;
+   size_t n_sz = vlen;
+#endif
+
+   /* invalid key provided */
+   if (!value || !vlen)
+   return -EINVAL;
+
+#ifndef __UBOOT__
+   if (fips_enabled) {
+   while (n_sz && !*ptr) {
+   ptr++;
+   n_sz--;
+   }
+
+   /* In FIPS mode 

[U-Boot] [PATCH v2 10/17] doc: add README for asn1 compiler and decoder

[AKASHI Takahiro]

This document gives a brief description about ASN1 compiler as well as
ASN1 decoder.

Signed-off-by: AKASHI Takahiro 
---
 doc/README.asn1 | 40 
 1 file changed, 40 insertions(+)
 create mode 100644 doc/README.asn1

diff --git a/doc/README.asn1 b/doc/README.asn1
new file mode 100644
index ..1359b93aef0b
--- /dev/null
+++ b/doc/README.asn1
@@ -0,0 +1,40 @@
+ASN1
+
+
+Abstract Syntax Notation One (or ASN1) is a standard by ITU-T and ISO/IEC
+and used as a description language for defining data structure in
+an independent manner.
+Any data described in ASN1 notation can be serialized (or encoded) and
+de-serialized (or decoded) with well-defined encoding rules.
+
+A combination of ASN1 compiler and ASN1 decoder library function will
+provide a function interface for parsing encoded binary into specific
+data structure:
+1) define data structure in a text file (*.asn1)
+2) define "action" routines for specific "tags" defined in (1)
+3) generate bytecode as a C file (*.asn1.[ch]) from *.asn1 file
+   with ASN1 compiler (tools/asn1_compiler)
+4) call a ASN1 decoder (asn1_ber_decoder()) with bytecode and data
+
+Usage of ASN1 compiler
+--
+  asn1_compiler [-v] [-d]   
+
+  :  ASN1 input file
+  :generated C file
+  :  generated include file
+
+Usage of ASN1 decoder
+-
+  int asn1_ber_decoder(const struct asn1_decoder *decoder, void *context,
+  const unsigned char *data, size_t datalen);
+
+  @decoder:bytecode binary
+  @context:context for decoder
+  @data:   data to be parsed
+  @datalen:size of data
+
+
+As of writing this, ASN1 compiler and decoder are used to implement
+X509 certificate parser, pcks7 message parser and RSA public key parser
+for UEFI secure boot.
-- 
2.21.0

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[U-Boot] [PATCH v2 08/17] Makefile: add build script for asn1 parsers

[AKASHI Takahiro]

This rule will be used to build x509 and pkcs7 parsers.

Signed-off-by: AKASHI Takahiro 
---
 Makefile   | 1 +
 scripts/Makefile.build | 4 +++-
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 54da5cd51cea..66ef4503e606 100644
--- a/Makefile
+++ b/Makefile
@@ -1878,6 +1878,7 @@ clean: $(clean-dirs)
-o -name '*.ko.*' -o -name '*.su' -o -name '*.pyc' \
-o -name '.*.d' -o -name '.*.tmp' -o -name '*.mod.c' \
-o -name '*.lex.c' -o -name '*.tab.[ch]' \
+   -o -name '*.asn1.[ch]' \
-o -name '*.symtypes' -o -name 'modules.order' \
-o -name modules.builtin -o -name '.tmp_*.o.*' \
-o -name 'dsdt.aml' -o -name 'dsdt.asl.tmp' -o -name 'dsdt.c' \
diff --git a/scripts/Makefile.build b/scripts/Makefile.build
index 26eb701f8dea..6d59ea91fac3 100644
--- a/scripts/Makefile.build
+++ b/scripts/Makefile.build
@@ -419,9 +419,11 @@ targets += $(multi-used-y) $(multi-used-m)
 intermediate_targets = $(foreach sfx, $(2), \
$(patsubst %$(strip $(1)),%$(sfx), \
$(filter %$(strip $(1)), $(targets
+# %.asn1.o <- %.asn1.[ch] <- %.asn1
 # %.lex.o <- %.lex.c <- %.l
 # %.tab.o <- %.tab.[ch] <- %.y
-targets += $(call intermediate_targets, .lex.o, .lex.c) \
+targets += $(call intermediate_targets, .asn1.o, .asn1.c .asn1.h) \
+  $(call intermediate_targets, .lex.o, .lex.c) \
   $(call intermediate_targets, .tab.o, .tab.c .tab.h)
 
 # Descending
-- 
2.21.0

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[U-Boot] [PATCH v2 05/17] include: kernel.h: include printk.h

[AKASHI Takahiro]

Adding "printk.h" will help improve portability from linux kernel
code (in my case, lib/asn1_decoder.c and others) where printf and
pr_* variant functions are used.

Signed-off-by: AKASHI Takahiro 
---
 include/linux/kernel.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/linux/kernel.h b/include/linux/kernel.h
index a85c15d8dc28..18846bef3997 100644
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -1,8 +1,8 @@
 #ifndef _LINUX_KERNEL_H
 #define _LINUX_KERNEL_H
 
-
 #include 
+#include  /* for printf/pr_* utilities */
 
 #define USHRT_MAX  ((u16)(~0U))
 #define SHRT_MAX   ((s16)(USHRT_MAX>>1))
-- 
2.21.0

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[U-Boot] [PATCH v2 07/17] cmd: add asn1_compiler

[AKASHI Takahiro]

Imported from linux kernel v5.3:
 asn1.h without changes
 asn1_ber_bytecode.h without changes
 asn1_decoder.h without changes
 asn1_compiler.c without changes

This host command will be used to create a ASN1 parser, for example,
for pkcs7 messages or x509 certificates. More specifically, it will
generate *byte code* which will be interpreted by asn1 decoder library.

Signed-off-by: AKASHI Takahiro 
Reviewed-by: Heinrich Schuchardt 
---
 include/linux/asn1.h  |   65 ++
 include/linux/asn1_ber_bytecode.h |   89 ++
 include/linux/asn1_decoder.h  |   20 +
 lib/Kconfig   |3 +
 scripts/Makefile.build|4 +-
 tools/Makefile|3 +
 tools/asn1_compiler.c | 1611 +
 7 files changed, 1793 insertions(+), 2 deletions(-)
 create mode 100644 include/linux/asn1.h
 create mode 100644 include/linux/asn1_ber_bytecode.h
 create mode 100644 include/linux/asn1_decoder.h
 create mode 100644 tools/asn1_compiler.c

diff --git a/include/linux/asn1.h b/include/linux/asn1.h
new file mode 100644
index ..a4d0bdd10711
--- /dev/null
+++ b/include/linux/asn1.h
@@ -0,0 +1,65 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* ASN.1 BER/DER/CER encoding definitions
+ *
+ * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowe...@redhat.com)
+ */
+
+#ifndef _LINUX_ASN1_H
+#define _LINUX_ASN1_H
+
+/* Class */
+enum asn1_class {
+   ASN1_UNIV   = 0,/* Universal */
+   ASN1_APPL   = 1,/* Application */
+   ASN1_CONT   = 2,/* Context */
+   ASN1_PRIV   = 3 /* Private */
+};
+#define ASN1_CLASS_BITS0xc0
+
+
+enum asn1_method {
+   ASN1_PRIM   = 0,/* Primitive */
+   ASN1_CONS   = 1 /* Constructed */
+};
+#define ASN1_CONS_BIT  0x20
+
+/* Tag */
+enum asn1_tag {
+   ASN1_EOC= 0,/* End Of Contents or N/A */
+   ASN1_BOOL   = 1,/* Boolean */
+   ASN1_INT= 2,/* Integer */
+   ASN1_BTS= 3,/* Bit String */
+   ASN1_OTS= 4,/* Octet String */
+   ASN1_NULL   = 5,/* Null */
+   ASN1_OID= 6,/* Object Identifier  */
+   ASN1_ODE= 7,/* Object Description */
+   ASN1_EXT= 8,/* External */
+   ASN1_REAL   = 9,/* Real float */
+   ASN1_ENUM   = 10,   /* Enumerated */
+   ASN1_EPDV   = 11,   /* Embedded PDV */
+   ASN1_UTF8STR= 12,   /* UTF8 String */
+   ASN1_RELOID = 13,   /* Relative OID */
+   /* 14 - Reserved */
+   /* 15 - Reserved */
+   ASN1_SEQ= 16,   /* Sequence and Sequence of */
+   ASN1_SET= 17,   /* Set and Set of */
+   ASN1_NUMSTR = 18,   /* Numerical String */
+   ASN1_PRNSTR = 19,   /* Printable String */
+   ASN1_TEXSTR = 20,   /* T61 String / Teletext String */
+   ASN1_VIDSTR = 21,   /* Videotex String */
+   ASN1_IA5STR = 22,   /* IA5 String */
+   ASN1_UNITIM = 23,   /* Universal Time */
+   ASN1_GENTIM = 24,   /* General Time */
+   ASN1_GRASTR = 25,   /* Graphic String */
+   ASN1_VISSTR = 26,   /* Visible String */
+   ASN1_GENSTR = 27,   /* General String */
+   ASN1_UNISTR = 28,   /* Universal String */
+   ASN1_CHRSTR = 29,   /* Character String */
+   ASN1_BMPSTR = 30,   /* BMP String */
+   ASN1_LONG_TAG   = 31/* Long form tag */
+};
+
+#define ASN1_INDEFINITE_LENGTH 0x80
+
+#endif /* _LINUX_ASN1_H */
diff --git a/include/linux/asn1_ber_bytecode.h 
b/include/linux/asn1_ber_bytecode.h
new file mode 100644
index ..b38361953a48
--- /dev/null
+++ b/include/linux/asn1_ber_bytecode.h
@@ -0,0 +1,89 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* ASN.1 BER/DER/CER parsing state machine internal definitions
+ *
+ * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowe...@redhat.com)
+ */
+
+#ifndef _LINUX_ASN1_BER_BYTECODE_H
+#define _LINUX_ASN1_BER_BYTECODE_H
+
+#ifdef __KERNEL__
+#include 
+#endif
+#include 
+
+typedef int (*asn1_action_t)(void *context,
+size_t hdrlen, /* In case of ANY type */
+unsigned char tag, /* In case of ANY type */
+const void *value, size_t vlen);
+
+struct asn1_decoder {
+   const unsigned char *machine;
+   size_t machlen;
+   const asn1_action_t *actions;
+};
+
+enum asn1_opcode {
+   /* The tag-matching ops come first and the odd-numbered slots
+* are for OR_SKIP ops.
+*/
+#define ASN1_OP_MATCH__SKIP  0x01
+#define ASN1_OP_MATCH__ACT   0x02
+#define ASN1_OP_MATCH__JUMP  0x04
+#define ASN1_OP_MATCH__ANY   0x08
+#define ASN1_OP_MATCH__COND  0x10
+
+   ASN1_OP_MATCH   = 0x00,
+   

[U-Boot] [PATCH v2 06/17] linux/time.h: include vsprintf.h

[AKASHI Takahiro]

Without this commit, time.h possibly causes a build error as
asctime_r() uses sprintf().

Signed-off-by: AKASHI Takahiro 
---
 include/linux/time.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/linux/time.h b/include/linux/time.h
index dc9344a6d97b..702dd276aea5 100644
--- a/include/linux/time.h
+++ b/include/linux/time.h
@@ -2,6 +2,7 @@
 #define _LINUX_TIME_H
 
 #include 
+#include 
 #include 
 
 #define _DEFUN(a,b,c) a(c)
-- 
2.21.0

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[U-Boot] [PATCH v2 02/17] rtc.h: add struct udevice declaration

[AKASHI Takahiro]

Without this change, including rtc.h solely will cause a build error.

Signed-off-by: AKASHI Takahiro 
---
 include/rtc.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/rtc.h b/include/rtc.h
index 7386d52db1d7..8aabfc1162a4 100644
--- a/include/rtc.h
+++ b/include/rtc.h
@@ -18,6 +18,8 @@
 
 #ifdef CONFIG_DM_RTC
 
+struct udevice;
+
 struct rtc_ops {
/**
 * get() - get the current time
-- 
2.21.0

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[U-Boot] [PATCH v2 01/17] linux_compat: move kmemdup() from ubifs.c to linux_compat.c

[AKASHI Takahiro]

linux_compat.c is the best place for kmemdup(), which is currenly used
only in ubifs.c, but will also be used when other kernel files
(in my case, lib/crypto/x509_cert_parser.c and pkcs7_parser.c) will be
imported. So just move it.

Signed-off-by: AKASHI Takahiro 
---
 fs/ubifs/ubifs.c   | 19 +--
 lib/linux_compat.c | 17 +
 2 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/fs/ubifs/ubifs.c b/fs/ubifs/ubifs.c
index 67a0e8caae70..1ffdfe0d9089 100644
--- a/fs/ubifs/ubifs.c
+++ b/fs/ubifs/ubifs.c
@@ -18,6 +18,7 @@
 #include "ubifs.h"
 #include 
 
+#include 
 #include 
 #include 
 
@@ -70,24 +71,6 @@ struct ubifs_compressor 
*ubifs_compressors[UBIFS_COMPR_TYPES_CNT];
 
 
 #ifdef __UBOOT__
-/* from mm/util.c */
-
-/**
- * kmemdup - duplicate region of memory
- *
- * @src: memory region to duplicate
- * @len: memory region length
- * @gfp: GFP mask to use
- */
-void *kmemdup(const void *src, size_t len, gfp_t gfp)
-{
-   void *p;
-
-   p = kmalloc(len, gfp);
-   if (p)
-   memcpy(p, src, len);
-   return p;
-}
 
 struct crypto_comp {
int compressor;
diff --git a/lib/linux_compat.c b/lib/linux_compat.c
index 6373b4451eb3..1f8ef4266613 100644
--- a/lib/linux_compat.c
+++ b/lib/linux_compat.c
@@ -40,3 +40,20 @@ void *kmem_cache_alloc(struct kmem_cache *obj, int flag)
 {
return malloc_cache_aligned(obj->sz);
 }
+
+/**
+ * kmemdup - duplicate region of memory
+ *
+ * @src: memory region to duplicate
+ * @len: memory region length
+ * @gfp: GFP mask to use
+ */
+void *kmemdup(const void *src, size_t len, gfp_t gfp)
+{
+   void *p;
+
+   p = kmalloc(len, gfp);
+   if (p)
+   memcpy(p, src, len);
+   return p;
+}
-- 
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[U-Boot] [PATCH v2 03/17] rtc: move date.c from drivers/rtc/ to lib/

[AKASHI Takahiro]

In the next commit, rtc_mktime(), for compatibility with linux, will be
implemented using rtc_mktime(), which is no longer drivers/rtc specific.
So move this file under lib/.

Signed-off-by: AKASHI Takahiro 
---
 cmd/Kconfig | 1 +
 drivers/rtc/Kconfig | 1 +
 drivers/rtc/Makefile| 1 -
 lib/Kconfig | 3 +++
 lib/Makefile| 2 ++
 {drivers/rtc => lib}/date.c | 5 ++---
 6 files changed, 9 insertions(+), 4 deletions(-)
 rename {drivers/rtc => lib}/date.c (96%)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 8e55b34c961f..e7213e9fe31f 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1610,6 +1610,7 @@ config CMD_LED
 config CMD_DATE
bool "date"
default y if DM_RTC
+   select LIB_DATE
help
  Enable the 'date' command for getting/setting the time/date in RTC
  devices.
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 8778cc7b264c..89e71cc7ebef 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -7,6 +7,7 @@ menu "Real Time Clock"
 config DM_RTC
bool "Enable Driver Model for RTC drivers"
depends on DM
+   select LIB_DATE
help
  Enable drver model for real-time-clock drivers. The RTC uclass
  then provides the rtc_get()/rtc_set() interface, delegating to
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index f97a6699820e..e8875ce10f5e 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -7,7 +7,6 @@
 obj-$(CONFIG_$(SPL_TPL_)DM_RTC) += rtc-uclass.o
 
 obj-$(CONFIG_RTC_AT91SAM9_RTT) += at91sam9_rtt.o
-obj-y += date.o
 obj-y += rtc-lib.o
 obj-$(CONFIG_RTC_DAVINCI) += davinci.o
 obj-$(CONFIG_RTC_DS1302) += ds1302.o
diff --git a/lib/Kconfig b/lib/Kconfig
index 3da45a5ec322..e093129a912c 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -529,4 +529,7 @@ config TEST_FDTDEC
bool "enable fdtdec test"
depends on OF_LIBFDT
 
+config LIB_DATE
+   bool
+
 endmenu
diff --git a/lib/Makefile b/lib/Makefile
index 2fffd68f943c..a44f9cc0ae20 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -117,4 +117,6 @@ else
 obj-y += vsprintf.o strto.o strmhz.o
 endif
 
+obj-y += date.o
+
 subdir-ccflags-$(CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED) += -O2
diff --git a/drivers/rtc/date.c b/lib/date.c
similarity index 96%
rename from drivers/rtc/date.c
rename to lib/date.c
index c57317d2c267..63af4a142612 100644
--- a/drivers/rtc/date.c
+++ b/lib/date.c
@@ -9,8 +9,7 @@
 #include 
 #include 
 
-#if defined(CONFIG_CMD_DATE) || defined(CONFIG_DM_RTC) || \
-   defined(CONFIG_TIMESTAMP)
+#if defined(CONFIG_LIB_DATE) || defined(CONFIG_TIMESTAMP)
 
 #define FEBRUARY   2
 #defineSTARTOFTIME 1970
@@ -97,4 +96,4 @@ unsigned long rtc_mktime(const struct rtc_time *tm)
return (hours * 60 + tm->tm_min) * 60 + tm->tm_sec;
 }
 
-#endif
+#endif /* CONFIG_LIB_DATE || CONFIG_TIMESTAMP */
-- 
2.21.0

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[U-Boot] [PATCH v2 04/17] lib: add mktime64() for linux compatibility

[AKASHI Takahiro]

This function will be used  in lib/crypto/x509_cert_parser.c, which
will also be imported from linux code in a later commit.

Signed-off-by: AKASHI Takahiro 
---
 include/linux/time.h | 10 ++
 lib/date.c   | 20 
 2 files changed, 30 insertions(+)

diff --git a/include/linux/time.h b/include/linux/time.h
index b8d298eb4d68..dc9344a6d97b 100644
--- a/include/linux/time.h
+++ b/include/linux/time.h
@@ -1,6 +1,7 @@
 #ifndef _LINUX_TIME_H
 #define _LINUX_TIME_H
 
+#include 
 #include 
 
 #define _DEFUN(a,b,c) a(c)
@@ -150,4 +151,13 @@ _DEFUN (ctime_r, (tim_p, result),
 return asctime_r (localtime_r (tim_p, ), result);
 }
 
+/* for compatibility with linux code */
+typedef __s64 time64_t;
+
+#ifdef CONFIG_LIB_DATE
+time64_t mktime64(const unsigned int year, const unsigned int mon,
+ const unsigned int day, const unsigned int hour,
+ const unsigned int min, const unsigned int sec);
+#endif
+
 #endif
diff --git a/lib/date.c b/lib/date.c
index 63af4a142612..0456de78ab14 100644
--- a/lib/date.c
+++ b/lib/date.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #if defined(CONFIG_LIB_DATE) || defined(CONFIG_TIMESTAMP)
 
@@ -97,3 +98,22 @@ unsigned long rtc_mktime(const struct rtc_time *tm)
 }
 
 #endif /* CONFIG_LIB_DATE || CONFIG_TIMESTAMP */
+
+#ifdef CONFIG_LIB_DATE
+/* for compatibility with linux code */
+time64_t mktime64(const unsigned int year, const unsigned int mon,
+ const unsigned int day, const unsigned int hour,
+ const unsigned int min, const unsigned int sec)
+{
+   struct rtc_time time;
+
+   time.tm_year = year;
+   time.tm_mon = mon;
+   time.tm_mday = day;
+   time.tm_hour = hour;
+   time.tm_min = min;
+   time.tm_sec = sec;
+
+   return (time64_t)rtc_mktime((const struct rtc_time *));
+}
+#endif
-- 
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[U-Boot] [PATCH v2 00/17] import x509/pkcs7 parsers from linux

[AKASHI Takahiro]

# This patch set should be merged first prior to my rsa extension patch
# due to some dependency. I plan to send out a new version of rsa
# extension next week.

Asn1 parsers of x509 certificates and pkcs7 messages are required
to implement image authentication and variable authentication as
part of UEFI secure boot feature.

As we discussed before in the thread[1], most people insisted that
we should re-use corresponding source code from Linux repository
for this purpose.

Here is my attempt to import all the necessary files from Linux; Those
will eventually be part of UEFI secure boot implementation, but I'd like
to get early feedback from other peoples before submitting the whole
patchset so that they will be better formatted for merging.

My approach here is
* files from the latest Linux
* modify files as little as possible
* mark/protect unavoidable changes with "#if(n)def __UBOOT__"
so that future fixes/differences in Linux repository will easily
be applied to U-Boot.

Known issues:
* checkpatch.pl
  Checkpatch.pl will complain with a bunch of warnings/errors but
  I intentionally left them unchanged for the sake of better
  maintainability I said above.

* unit test
  I'm still waiting for a feedback from Tom[2] regarding how we should
  enable "unit test" for ASN1 compiler/decoder on sandbox and others
  in Travis CI.

* Travis CI
  It is still running against this very version, but I'm sure I have
  fixed all the issues (as long as Heinrich's [3] is applied);
  I will let you know the result on Monday.

Any comments will be appreciated.
-Takahiro Akashi

[1] https://lists.denx.de/pipermail/u-boot/2019-April/366423.html
[2] https://lists.denx.de/pipermail/u-boot/2019-October/387734.html
[3] https://lists.denx.de/pipermail/u-boot/2019-October/385643.html

Changes in v2 (Oct 25, 2019)
* revise commit messages, describing what files are modified or not.
* move kmemdump() in ubifs.c to linux_compat.c for general use (patch#1)
* add patch#2
* move date.c to lib/ for general use (patch#3)
* implement mktime64() with rtc_mktime() (patch#4)
* move asn1_compiler.c to tools/ (patch#7)
* change CONFIG_BUILD_ASN1 to CONFIG_ASN1_COMPILER (patch#7)
* add clean rule to asn1_compiler-generated files to clean targets (patch#8)
* change CONFIG_ASN1 to CONFIG_ASN1_DECODER (patch#9)
* add README for asn1 compiler/decoder (patch#10)
* move build_oid_registory to scripts/ (patch#11)
* shuffle an order of patches (patch#13,#14,#15)
* add a new config CONFIG_RSA_PUBLIC_KEY_PARSER so that it can be
* modify Kconfig dependency (patch#13,#14,#15)
  compiled in independently (patch#13)
* add unit test (patch#16,#17)

Changes in v1 (Oct 11, 2019) from RFC
* change the kernel code base from v5.0 to v5.3
* add preparatory patches (#1, #2 and #3)
* comment off x509_check_for_self_signed() which is not useful
  for UEFI secure boot (patch#9)
* improve usages of "#if(n)def __UBOOT__* to minimize differences
  between U-Boot and linux kernel

AKASHI Takahiro (17):
  linux_compat: move kmemdup() from ubifs.c to linux_compat.c
  rtc.h: add struct udevice declaration
  rtc: move date.c from drivers/rtc/ to lib/
  lib: add mktime64() for linux compatibility
  include: kernel.h: include printk.h
  linux/time.h: include vsprintf.h
  cmd: add asn1_compiler
  Makefile: add build script for asn1 parsers
  lib: add asn1 decoder
  doc: add README for asn1 compiler and decoder
  lib: add oid registry utility
  lib: crypto: add public key utility
  lib: crypto: add rsa public key parser
  lib: crypto: add x509 parser
  lib: crypto: add pkcs7 message parser
  test: add lib specific Kconfig
  test: add asn1 unit test

 Makefile  |1 +
 cmd/Kconfig   |1 +
 doc/README.asn1   |   40 +
 drivers/rtc/Kconfig   |1 +
 drivers/rtc/Makefile  |1 -
 fs/ubifs/ubifs.c  |   19 +-
 include/crypto/internal/rsa.h |   57 +
 include/crypto/pkcs7.h|   47 +
 include/crypto/public_key.h   |   90 ++
 include/keys/asymmetric-type.h|   88 ++
 include/linux/asn1.h  |   65 ++
 include/linux/asn1_ber_bytecode.h |   89 ++
 include/linux/asn1_decoder.h  |   20 +
 include/linux/kernel.h|2 +-
 include/linux/oid_registry.h  |  117 +++
 include/linux/time.h  |   11 +
 include/rtc.h |2 +
 lib/Kconfig   |   17 +
 lib/Makefile  |   20 +
 lib/asn1_decoder.c|  527 ++
 lib/crypto/Kconfig|   52 +
 lib/crypto/Makefile   |   49 +
 lib/crypto/asymmetric_type.c  |  668 
 lib/crypto/pkcs7.asn1 |  135 +++
 lib/crypto/pkcs7_parser.c |  693 +
 lib/crypto/pkcs7_parser.h |   65 ++
 lib/crypto/public_key.c   |  376 +++
 lib/crypto/rsa_helper.c   |  198 
 lib/crypto/rsapubkey.asn1 |4 +
 lib/crypto/x509.asn1  

[U-Boot] [PATCH V4 5/6] net: fec_mxc: support i.MX8M with CLK_CCF

[Peng Fan]

Add more clks for fec_mxc according to Linux Kernel 5.4.0-rc1
drivers/net/ethernet/freescale/fec_main.c.

Since i.MX8MQ not support CLK_CCF, so add a check to restrict
the code only effect when CONFIG_IMX8M and CONFIG_CLK_CCF both defined.

Reviewed-by: Frieder Schrempf 
Signed-off-by: Peng Fan 
---

V4:
 Fix build warning
 Add R-b

V3:
 Drop unneeded else
 correct ipg->ahb
 Other patches keep V1

V2:
 Use CONFIG_IS_ENABLED


 drivers/net/fec_mxc.c | 79 +--
 drivers/net/fec_mxc.h |  4 +++
 2 files changed, 68 insertions(+), 15 deletions(-)

diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 080dbcf7db..131d1998a7 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -123,30 +123,38 @@ static int fec_mdio_read(struct ethernet_regs *eth, 
uint8_t phyaddr,
return val;
 }
 
+#ifndef imx_get_fecclk
+u32 __weak imx_get_fecclk(void)
+{
+   return 0;
+}
+#endif
+
 static int fec_get_clk_rate(void *udev, int idx)
 {
-#if IS_ENABLED(CONFIG_IMX8)
struct fec_priv *fec;
struct udevice *dev;
int ret;
 
-   dev = udev;
-   if (!dev) {
-   ret = uclass_get_device(UCLASS_ETH, idx, );
-   if (ret < 0) {
-   debug("Can't get FEC udev: %d\n", ret);
-   return ret;
+   if (IS_ENABLED(CONFIG_IMX8) ||
+   CONFIG_IS_ENABLED(CLK_CCF)) {
+   dev = udev;
+   if (!dev) {
+   ret = uclass_get_device(UCLASS_ETH, idx, );
+   if (ret < 0) {
+   debug("Can't get FEC udev: %d\n", ret);
+   return ret;
+   }
}
-   }
 
-   fec = dev_get_priv(dev);
-   if (fec)
-   return fec->clk_rate;
+   fec = dev_get_priv(dev);
+   if (fec)
+   return fec->clk_rate;
 
-   return -EINVAL;
-#else
-   return imx_get_fecclk();
-#endif
+   return -EINVAL;
+   } else {
+   return imx_get_fecclk();
+   }
 }
 
 static void fec_mii_setspeed(struct ethernet_regs *eth)
@@ -1335,6 +1343,47 @@ static int fecmxc_probe(struct udevice *dev)
return ret;
}
 
+   priv->clk_rate = clk_get_rate(>ipg_clk);
+   } else if (CONFIG_IS_ENABLED(CLK_CCF)) {
+   ret = clk_get_by_name(dev, "ipg", >ipg_clk);
+   if (ret < 0) {
+   debug("Can't get FEC ipg clk: %d\n", ret);
+   return ret;
+   }
+   ret = clk_enable(>ipg_clk);
+   if(ret)
+   return ret;
+
+   ret = clk_get_by_name(dev, "ahb", >ahb_clk);
+   if (ret < 0) {
+   debug("Can't get FEC ahb clk: %d\n", ret);
+   return ret;
+   }
+   ret = clk_enable(>ahb_clk);
+   if (ret)
+   return ret;
+
+   ret = clk_get_by_name(dev, "enet_out", >clk_enet_out);
+   if (!ret) {
+   ret = clk_enable(>clk_enet_out);
+   if (ret)
+   return ret;
+   }
+
+   ret = clk_get_by_name(dev, "enet_clk_ref", >clk_ref);
+   if (!ret) {
+   ret = clk_enable(>clk_ref);
+   if (ret)
+   return ret;
+   }
+
+   ret = clk_get_by_name(dev, "ptp", >clk_ptp);
+   if (!ret) {
+   ret = clk_enable(>clk_ptp);
+   if (ret)
+   return ret;
+   }
+
priv->clk_rate = clk_get_rate(>ipg_clk);
}
 
diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h
index e5f2dd75c5..723b06a651 100644
--- a/drivers/net/fec_mxc.h
+++ b/drivers/net/fec_mxc.h
@@ -264,6 +264,10 @@ struct fec_priv {
u32 interface;
 #endif
struct clk ipg_clk;
+   struct clk ahb_clk;
+   struct clk clk_enet_out;
+   struct clk clk_ref;
+   struct clk clk_ptp;
u32 clk_rate;
 };
 
-- 
2.16.4

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Re: [U-Boot] [PATCH v5 24/26] cmd: nand/sf: isolate legacy code

[Jagan Teki]

On Fri, Oct 25, 2019 at 3:06 PM Miquel Raynal  wrote:
>
> Hi Jagan,
>
> Jagan Teki  wrote on Fri, 25 Oct 2019
> 14:57:36 +0530:
>
> > Hi Miquel,
> >
> > On Fri, Oct 25, 2019 at 2:55 PM Miquel Raynal  
> > wrote:
> > >
> > > Hi Jagan,
> > >
> > > Jagan Teki  wrote on Fri, 25 Oct 2019
> > > 14:44:38 +0530:
> > >
> > > > On Thu, Oct 3, 2019 at 11:21 PM Miquel Raynal 
> > > >  wrote:
> > > > >
> > > > > The 'sf' command is not supposed to rely on the MTD stack, but both
> > > > > 'sf' and 'nand' commands use helpers located in mtd_uboot.c. Despite
> > > > > their location, these functions do not depend at all on the MTD
> > > > > stack.
> > > > >
> > > > > This file (drivers/mtd/mtd_uboot.c) is only compiled if CONFIG_MTD is
> > > > > selected, which is inconsistent with the current situation. Solve this
> > > > > by moving these three functions (which are only used by the above two
> > > > > commands) out of mtd_uboot.c and put them in a C file only compiled
> > > > > with cmd/sf.c and cmd/nand.c.
> > > > >
> > > > > Signed-off-by: Miquel Raynal 
> > > > > ---
> > > > >  cmd/Makefile|  3 ++
> > > > >  cmd/legacy-mtd-utils.c  | 99 
> > > > > +
> > > > >  cmd/legacy-mtd-utils.h  | 14 ++
> > > > >  cmd/nand.c  |  2 +
> > > > >  cmd/sf.c|  2 +
> > > > >  drivers/mtd/mtd_uboot.c | 94 --
> > > >
> > > > Better to drop CMD_SF, CMD_NAND in makefile so-that it can't build
> > > > this file in this patch.
> > >
> > > I don't understand what you mean. Can you please detail what you have
> > > in mind for this patch?
> > >
> > > Is it something blocking for you? Or is it something that should be
> > > taken care of after?
> >
> > I think it is simple rebase, this patch is moving code from
> > mtd_uboot.c to legacy-mtd-utils.c but mtd_uboot still building. I'm
> > saying to make change on drivers/mtd/Makefile to drop SF, NAND
> > dependency.
>
> What do you mean by "mtd_uboot still building"? Do you mean it is a
> problem? Or did I forgot something?
>
> I don't see what CMD_SF/CMD_NAND dependency you are referring to. Can
> you please share a snippet of code?

-ifneq (,$(findstring
y,$(CONFIG_MTD_DEVICE)$(CONFIG_CMD_NAND)$(CONFIG_CMD_ONENAND)$(CONFIG_CMD_SF)$(CONFIG_CMD_MTD)))
+ifneq (,$(findstring
y,$(CONFIG_MTD_DEVICE)$(CONFIG_CMD_ONENAND)$(CONFIG_CMD_MTD)))
 obj-y += mtdcore.o mtd_uboot.o
 endif
 obj-$(CONFIG_MTD) += mtd-uclass.o
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Re: [U-Boot] [PATCH 4/5] dm: regmap: Fix mask in regmap_update_bits()

[Jean-Jacques Hiblot]

On 12/10/2019 00:16, Simon Glass wrote:

This function assumes that the 'val' parameter has no masked bits set.
This is not defined by the function prototype though. Fix the function to
mask the value and update the documentation.

Signed-off-by: Simon Glass 
---

  drivers/core/regmap.c | 2 +-
  include/regmap.h  | 3 ++-
  2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index d1d12eef385..e9e55c9d165 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -462,5 +462,5 @@ int regmap_update_bits(struct regmap *map, uint offset, 
uint mask, uint val)
  
  	reg &= ~mask;
  
-	return regmap_write(map, offset, reg | val);

+   return regmap_write(map, offset, reg | (val & mask));
  }
diff --git a/include/regmap.h b/include/regmap.h
index 0854200a9c1..9ada1af5ef0 100644
--- a/include/regmap.h
+++ b/include/regmap.h
@@ -295,7 +295,8 @@ int regmap_raw_read_range(struct regmap *map, uint 
range_num, uint offset,
   * @map:  The map returned by regmap_init_mem*()
   * @offset:   Offset of the memory
   * @mask: Mask to apply to the read value
- * @val:   Value to apply to the value to write
+ * @val:   Value to OR with the read value after masking. Note that any
+ * bits set in @val which are not set in @mask are ignored
   * Return: 0 if OK, -ve on error
   */
  int regmap_update_bits(struct regmap *map, uint offset, uint mask, uint val);


Reviewed-by: Jean-Jacques Hiblot 

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Re: [U-Boot] [PATCH v4 2/4] arm: socfpga: Convert reset manager from struct to defines

[Simon Goldschmidt]

On Fri, Oct 25, 2019 at 11:17 AM Ley Foon Tan  wrote:
>
> On Wed, Oct 23, 2019 at 2:11 AM Simon Goldschmidt
>  wrote:
> >
> > Am 10.10.2019 um 09:37 schrieb Ley Foon Tan:
> > > Convert reset manager for Gen5, Arria 10 and Stratix 10 from struct
> > > to defines.
> > >
> > > Change to get reset manager base address from DT node instead of using
> > > #define.
> > >
> > > Signed-off-by: Ley Foon Tan 
> > >
> > > ---
> > > v4:
> > > - Update commit message about get base address from DT node.
> > >
> > > v3:
> > > - Remove "No functional change" in commit description.
> > >
> > > v2:
> > > - Get base address from DT
> > > - Revert to use writel(), readl(), setbits_le32() and clrbits_le32().
> > > - Add prefix to defines.
> > > ---
> > >   arch/arm/mach-socfpga/include/mach/misc.h |  1 +
> > >   .../mach-socfpga/include/mach/reset_manager.h |  2 +
> > >   .../include/mach/reset_manager_arria10.h  | 43 -
> > >   .../include/mach/reset_manager_gen5.h | 22 -
> > >   .../include/mach/reset_manager_s10.h  | 33 ++---
> > >   arch/arm/mach-socfpga/misc.c  | 32 +
> > >   arch/arm/mach-socfpga/misc_gen5.c |  7 ++-
> > >   arch/arm/mach-socfpga/reset_manager_arria10.c | 47 ++-
> > >   arch/arm/mach-socfpga/reset_manager_gen5.c| 28 +--
> > >   arch/arm/mach-socfpga/reset_manager_s10.c | 34 +++---
> > >   arch/arm/mach-socfpga/spl_a10.c   |  7 ++-
> > >   arch/arm/mach-socfpga/spl_gen5.c  | 12 ++---
> > >   arch/arm/mach-socfpga/spl_s10.c   | 12 +++--
> > >   drivers/sysreset/sysreset_socfpga.c   |  6 +--
> > >   14 files changed, 137 insertions(+), 149 deletions(-)
> > >
> > > diff --git a/arch/arm/mach-socfpga/include/mach/misc.h 
> > > b/arch/arm/mach-socfpga/include/mach/misc.h
> > > index 27d0b6a370..a29b049742 100644
> > > --- a/arch/arm/mach-socfpga/include/mach/misc.h
> > > +++ b/arch/arm/mach-socfpga/include/mach/misc.h
> > > @@ -41,5 +41,6 @@ void socfpga_sdram_remap_zero(void);
> > >
> > >   void do_bridge_reset(int enable, unsigned int mask);
> > >   void socfpga_pl310_clear(void);
> > > +void socfpga_get_manager_addr(void);
> > >
> > >   #endif /* _MISC_H_ */
> > > diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h 
> > > b/arch/arm/mach-socfpga/include/mach/reset_manager.h
> > > index 6ad037e325..a5b6931350 100644
> > > --- a/arch/arm/mach-socfpga/include/mach/reset_manager.h
> > > +++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h
> > > @@ -6,6 +6,8 @@
> > >   #ifndef _RESET_MANAGER_H_
> > >   #define _RESET_MANAGER_H_
> > >
> > > +extern phys_addr_t socfpga_rstmgr_base;
> >
> > Did I write before that I think this is an ugly hack that should be
> > removed in the future by converting *all* drivers to DM? :-)
> Agreed, it is ugly. But, we still need it they convert to DM.

What do you mean, we still need it? I don't think so.

> >
> > > +
> > >   void reset_cpu(ulong addr);
> > >
> > >   void socfpga_per_reset(u32 reset, int set);
> > > diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h 
> > > b/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
> > > index 6623ebee65..41169aa677 100644
> > > --- a/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
> > > +++ b/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
> > > @@ -14,40 +14,15 @@ int socfpga_reset_deassert_bridges_handoff(void);
> > >   void socfpga_reset_deassert_osc1wd0(void);
> > >   int socfpga_bridges_reset(void);
> > >
> > > -struct socfpga_reset_manager {
> > > - u32 stat;
> > > - u32 ramstat;
> > > - u32 miscstat;
> > > - u32 ctrl;
> > > - u32 hdsken;
> > > - u32 hdskreq;
> > > - u32 hdskack;
> > > - u32 counts;
> > > - u32 mpumodrst;
> > > - u32 per0modrst;
> > > - u32 per1modrst;
> > > - u32 brgmodrst;
> > > - u32 sysmodrst;
> > > - u32 coldmodrst;
> > > - u32 nrstmodrst;
> > > - u32 dbgmodrst;
> > > - u32 mpuwarmmask;
> > > - u32 per0warmmask;
> > > - u32 per1warmmask;
> > > - u32 brgwarmmask;
> > > - u32 syswarmmask;
> > > - u32 nrstwarmmask;
> > > - u32 l3warmmask;
> > > - u32 tststa;
> > > - u32 tstscratch;
> > > - u32 hdsktimeout;
> > > - u32 hmcintr;
> > > - u32 hmcintren;
> > > - u32 hmcintrens;
> > > - u32 hmcintrenr;
> > > - u32 hmcgpout;
> > > - u32 hmcgpin;
> > > -};
> > > +#define RSTMGR_A10_STATUS0
> > > +#define RSTMGR_A10_CTRL  0xc
> >
> > Please fix the format here: all defines should be formatted the same way
> > (i.e. here: 0x00, 0x0c, 0x20 etc) to make the code easier to read.
> Okay.
> >
> > > +#define RSTMGR_A10_MPUMODRST 0x20
> > > +#define RSTMGR_A10_PER0MODRST0x24
> > > +#define