[PATCH v4 4/5] net: ti: icssg: Add ICSSG ethernet driver

[MD Danish Anwar]

This is the PRUSS Ethernet driver for TI AM654 Sr2.0 and laterSoCs with
the ICSSG PRU Sub-system running EMAC firmware. ICSSG Subsystem supports
two slices per instance. This driver caters to both slices / ports of
the icssg subsystem.

Since it is not possible for Ethernet driver to register more than one
port for a given instance, this patch introduces top level PRUETH as
UCLASS_MISC and binds UCLASS_ETH to individual ports in order to support
bringing up more than one Ethernet interface in U-Boot.

Since top level driver is UCLASS_MISC, board files would need to
instantiate the driver explicitly.

Signed-off-by: MD Danish Anwar 
---
 arch/arm/mach-k3/common.c |  11 +
 drivers/net/ti/Kconfig|  13 +
 drivers/net/ti/Makefile   |   1 +
 drivers/net/ti/icssg_prueth.c | 685 ++
 drivers/net/ti/icssg_prueth.h |   3 +
 5 files changed, 713 insertions(+)
 create mode 100644 drivers/net/ti/icssg_prueth.c

diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index b0fb87b97a..d151277d6d 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -270,6 +270,17 @@ int misc_init_r(void)
printf("Failed to probe am65_cpsw_nuss driver\n");
}
 
+   if (IS_ENABLED(CONFIG_TI_ICSSG_PRUETH)) {
+   struct udevice *dev;
+   int ret;
+
+   ret = uclass_get_device_by_driver(UCLASS_MISC,
+ DM_DRIVER_GET(prueth),
+ );
+   if (ret)
+   printf("Failed to probe prueth driver\n");
+   }
+
/* Default FIT boot on HS-SE devices */
if (get_device_type() == K3_DEVICE_TYPE_HS_SE)
env_set("boot_fit", "1");
diff --git a/drivers/net/ti/Kconfig b/drivers/net/ti/Kconfig
index 72eccc99e5..ddfa95a0b7 100644
--- a/drivers/net/ti/Kconfig
+++ b/drivers/net/ti/Kconfig
@@ -57,3 +57,16 @@ config MDIO_TI_CPSW
help
  This driver supports the TI CPSW MDIO interface found in various
  TI SoCs.
+
+config TI_ICSSG_PRUETH
+   bool "TI Gigabit PRU Ethernet driver"
+   depends on ARCH_K3
+   imply DM_MDIO
+   imply MISC_INIT_R
+   imply MISC
+   imply MDIO_TI_CPSW
+   select PHYLIB
+   select FS_LOADER
+   help
+ Support Gigabit Ethernet ports over the ICSSG PRU Subsystem
+ This subsystem is available starting with the AM65 platform.
diff --git a/drivers/net/ti/Makefile b/drivers/net/ti/Makefile
index 30c4c4b6d5..b2b3aa3b18 100644
--- a/drivers/net/ti/Makefile
+++ b/drivers/net/ti/Makefile
@@ -7,3 +7,4 @@ obj-$(CONFIG_DRIVER_TI_EMAC) += davinci_emac.o
 obj-$(CONFIG_DRIVER_TI_KEYSTONE_NET) += keystone_net.o cpsw_mdio.o
 obj-$(CONFIG_TI_AM65_CPSW_NUSS) += am65-cpsw-nuss.o
 obj-$(CONFIG_MDIO_TI_CPSW) += cpsw_mdio.o
+obj-$(CONFIG_TI_ICSSG_PRUETH) += icssg_prueth.o icssg_classifier.o 
icssg_config.o icssg_queues.o
diff --git a/drivers/net/ti/icssg_prueth.c b/drivers/net/ti/icssg_prueth.c
new file mode 100644
index 00..d22a56c217
--- /dev/null
+++ b/drivers/net/ti/icssg_prueth.c
@@ -0,0 +1,685 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Texas Instruments K3 AM65 PRU Ethernet Driver
+ *
+ * Copyright (C) 2018-2024, Texas Instruments, Incorporated
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "icssg_prueth.h"
+#include "icss_mii_rt.h"
+
+#define ICSS_SLICE0 0
+#define ICSS_SLICE1 1
+
+#ifdef PKTSIZE_ALIGN
+#define UDMA_RX_BUF_SIZE PKTSIZE_ALIGN
+#else
+#define UDMA_RX_BUF_SIZE ALIGN(1522, ARCH_DMA_MINALIGN)
+#endif
+
+#ifdef PKTBUFSRX
+#define UDMA_RX_DESC_NUM PKTBUFSRX
+#else
+#define UDMA_RX_DESC_NUM 4
+#endif
+
+/* Config region lies in shared RAM */
+#define ICSS_CONFIG_OFFSET_SLICE0  0
+#define ICSS_CONFIG_OFFSET_SLICE1  0x8000
+
+/* Firmware flags */
+#define ICSS_SET_RUN_FLAG_VLAN_ENABLE  BIT(0)  /* switch only */
+#define ICSS_SET_RUN_FLAG_FLOOD_UNICASTBIT(1)  /* switch only 
*/
+#define ICSS_SET_RUN_FLAG_PROMISC  BIT(2)  /* MAC only */
+#define ICSS_SET_RUN_FLAG_MULTICAST_PROMISCBIT(3)  /* MAC only */
+
+/* CTRLMMR_ICSSG_RGMII_CTRL register bits */
+#define ICSSG_CTRL_RGMII_ID_MODE   BIT(24)
+
+/* Management packet type */
+#define PRUETH_PKT_TYPE_CMD0x10
+
+/* Number of PRU Cores per Slice */
+#define ICSSG_NUM_PRU_CORES3
+
+static int icssg_gmii_select(struct prueth_priv *priv)
+{
+   struct phy_device *phydev = priv->phydev;
+
+   if (phydev->interface != PHY_INTERFACE_MODE_MII &&
+   phydev->interface < PHY_INTERFACE_MODE_RGMII &&
+   phydev->interface > PHY_INTERFACE_MODE_RGMII_TXID) {
+   dev_err(priv->dev, "PHY mode unsupported %s\n",
+  

[PATCH v4 5/5] net: ti: icssg: Add support sending FDB command to update rx_flow_id

[MD Danish Anwar]

ICSSG firmware supports FDB commands. Add support to send FDB commands
from driver. Once rx_flow_id is obtained from dma, let firmware know that
we are using this rx_flow_id by sending a FDB command.

Signed-off-by: MD Danish Anwar 
---
 drivers/net/ti/icssg_config.c | 68 +++
 drivers/net/ti/icssg_config.h | 18 ++
 drivers/net/ti/icssg_prueth.c |  6 
 drivers/net/ti/icssg_prueth.h |  6 
 4 files changed, 98 insertions(+)

diff --git a/drivers/net/ti/icssg_config.c b/drivers/net/ti/icssg_config.c
index b0ba870189..70c67e44b9 100644
--- a/drivers/net/ti/icssg_config.c
+++ b/drivers/net/ti/icssg_config.c
@@ -9,6 +9,7 @@
 #include "icssg_switch_map.h"
 #include "icss_mii_rt.h"
 #include 
+#include 
 
 /* TX IPG Values to be set for 100M and 1G link speeds.  These values are
  * in ocp_clk cycles. So need change if ocp_clk is changed for a specific
@@ -404,3 +405,70 @@ int emac_set_port_state(struct prueth_priv *priv,
 
return ret;
 }
+
+int icssg_send_fdb_msg(struct prueth_priv *priv, struct mgmt_cmd *cmd,
+  struct mgmt_cmd_rsp *rsp)
+{
+   struct prueth *prueth = priv->prueth;
+   int slice = priv->port_id;
+   int ret, addr;
+
+   addr = icssg_queue_pop(prueth, slice == 0 ?
+  ICSSG_CMD_POP_SLICE0 : ICSSG_CMD_POP_SLICE1);
+   if (addr < 0)
+   return addr;
+
+   /* First 4 bytes have FW owned buffer linking info which should
+* not be touched
+*/
+   memcpy_toio((void __iomem *)prueth->shram.pa + addr + 4, cmd, 
sizeof(*cmd));
+   icssg_queue_push(prueth, slice == 0 ?
+ICSSG_CMD_PUSH_SLICE0 : ICSSG_CMD_PUSH_SLICE1, addr);
+   ret = read_poll_timeout(icssg_queue_pop, addr, addr >= 0,
+   2000, 2000, prueth, slice == 0 ?
+   ICSSG_RSP_POP_SLICE0 : ICSSG_RSP_POP_SLICE1);
+
+   if (ret) {
+   dev_err(prueth->dev, "Timedout sending HWQ message\n");
+   return ret;
+   }
+
+   memcpy_fromio(rsp, (void __iomem *)prueth->shram.pa + addr, 
sizeof(*rsp));
+   /* Return buffer back for to pool */
+   icssg_queue_push(prueth, slice == 0 ?
+ICSSG_RSP_PUSH_SLICE0 : ICSSG_RSP_PUSH_SLICE1, addr);
+
+   return 0;
+}
+
+int emac_fdb_flow_id_updated(struct prueth_priv *priv)
+{
+   struct mgmt_cmd_rsp fdb_cmd_rsp = { 0 };
+   struct prueth *prueth = priv->prueth;
+   struct mgmt_cmd fdb_cmd = { 0 };
+   int slice = priv->port_id;
+   int ret = 0;
+
+   fdb_cmd.header = ICSSG_FW_MGMT_CMD_HEADER;
+   fdb_cmd.type   = ICSSG_FW_MGMT_FDB_CMD_TYPE_RX_FLOW;
+   fdb_cmd.seqnum = ++(prueth->icssg_hwcmdseq);
+   fdb_cmd.param  = 0;
+
+   fdb_cmd.param |= (slice << 4);
+   fdb_cmd.cmd_args[0] = 0;
+
+   ret = icssg_send_fdb_msg(priv, _cmd, _cmd_rsp);
+   if (ret)
+   return ret;
+
+   if (fdb_cmd.seqnum != fdb_cmd_rsp.seqnum) {
+   dev_err(prueth->dev, "seqnum doesn't match, cmd.seqnum %d != 
rsp.seqnum %d\n",
+   fdb_cmd.seqnum, fdb_cmd_rsp.seqnum);
+   return -EINVAL;
+   }
+
+   if (fdb_cmd_rsp.status == 1)
+   return 0;
+
+   return -EINVAL;
+}
diff --git a/drivers/net/ti/icssg_config.h b/drivers/net/ti/icssg_config.h
index 412dbf51c7..0dcf025358 100644
--- a/drivers/net/ti/icssg_config.h
+++ b/drivers/net/ti/icssg_config.h
@@ -80,6 +80,7 @@ struct icssg_rxq_ctx {
 #define ICSSG_FW_MGMT_FDB_CMD_TYPE 0x03
 #define ICSSG_FW_MGMT_CMD_TYPE 0x04
 #define ICSSG_FW_MGMT_PKT  0x8000
+#define ICSSG_FW_MGMT_FDB_CMD_TYPE_RX_FLOW 0x05
 
 struct icssg_r30_cmd {
u32 cmd[4];
@@ -156,6 +157,23 @@ struct icssg_setclock_desc {
u32 CMP0_new;
 } __packed;
 
+struct mgmt_cmd {
+   u8 param;
+   u8 seqnum;
+   u8 type;
+   u8 header;
+   u32 cmd_args[3];
+} __packed;
+
+struct mgmt_cmd_rsp {
+   u32 reserved;
+   u8 status;
+   u8 seqnum;
+   u8 type;
+   u8 header;
+   u32 cmd_args[3];
+} __packed;
+
 #define ICSSG_CMD_POP_SLICE0   56
 #define ICSSG_CMD_POP_SLICE1   60
 
diff --git a/drivers/net/ti/icssg_prueth.c b/drivers/net/ti/icssg_prueth.c
index d22a56c217..ce108129c5 100644
--- a/drivers/net/ti/icssg_prueth.c
+++ b/drivers/net/ti/icssg_prueth.c
@@ -374,6 +374,12 @@ static int prueth_start(struct udevice *dev)
dev_info(dev, "K3 ICSSG: rflow_id_base: %u, chn_name = %s\n",
 dma_rx_cfg_data->flow_id_base, chn_name);
 
+   ret = emac_fdb_flow_id_updated(priv);
+   if (ret) {
+   dev_err(dev, "Failed to update Rx Flow ID %d", ret);
+   goto phy_fail;
+   }
+
ret = phy_startup(priv->phydev);
if (ret) {
dev_err(dev, "phy_startup failed\n");
diff --git a/drivers/net/ti/icssg_prueth.h b/drivers/net/ti/icssg_prueth.h
index 

[PATCH v4 3/5] net: ti: icssg: Add icssg queues APIs and macros

[MD Danish Anwar]

Add icssg_queue.c file. This file introduces macros and APIs related to
ICSSG queues. These will be used by ICSSG Ethernet driver.

Signed-off-by: MD Danish Anwar 
---
 drivers/net/ti/icssg_prueth.h |  5 
 drivers/net/ti/icssg_queues.c | 51 +++
 2 files changed, 56 insertions(+)
 create mode 100644 drivers/net/ti/icssg_queues.c

diff --git a/drivers/net/ti/icssg_prueth.h b/drivers/net/ti/icssg_prueth.h
index a7627a77d8..42686b8c79 100644
--- a/drivers/net/ti/icssg_prueth.h
+++ b/drivers/net/ti/icssg_prueth.h
@@ -80,4 +80,9 @@ void icssg_config_ipg(struct prueth_priv *priv, int speed, 
int mii);
 int icssg_config(struct prueth_priv *priv);
 int emac_set_port_state(struct prueth_priv *priv, enum icssg_port_state_cmd 
cmd);
 
+/* Buffer queue helpers */
+int icssg_queue_pop(struct prueth *prueth, u8 queue);
+void icssg_queue_push(struct prueth *prueth, int queue, u16 addr);
+u32 icssg_queue_level(struct prueth *prueth, int queue);
+
 #endif /* __NET_TI_ICSSG_PRUETH_H */
diff --git a/drivers/net/ti/icssg_queues.c b/drivers/net/ti/icssg_queues.c
new file mode 100644
index 00..fc4d33dbb2
--- /dev/null
+++ b/drivers/net/ti/icssg_queues.c
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: GPL-2.0
+/* ICSSG Buffer queue helpers
+ *
+ * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com
+ */
+
+#include 
+#include 
+#include "icssg_prueth.h"
+
+#define ICSSG_QUEUES_MAX   64
+#define ICSSG_QUEUE_OFFSET 0xd00
+#define ICSSG_QUEUE_PEEK_OFFSET0xe00
+#define ICSSG_QUEUE_CNT_OFFSET 0xe40
+#defineICSSG_QUEUE_RESET_OFFSET0xf40
+
+int icssg_queue_pop(struct prueth *prueth, u8 queue)
+{
+   u32 val, cnt;
+
+   if (queue >= ICSSG_QUEUES_MAX)
+   return -EINVAL;
+
+   regmap_read(prueth->miig_rt, ICSSG_QUEUE_CNT_OFFSET + 4 * queue, );
+   if (!cnt)
+   return -EINVAL;
+
+   regmap_read(prueth->miig_rt, ICSSG_QUEUE_OFFSET + 4 * queue, );
+
+   return val;
+}
+
+void icssg_queue_push(struct prueth *prueth, int queue, u16 addr)
+{
+   if (queue >= ICSSG_QUEUES_MAX)
+   return;
+
+   regmap_write(prueth->miig_rt, ICSSG_QUEUE_OFFSET + 4 * queue, addr);
+}
+
+u32 icssg_queue_level(struct prueth *prueth, int queue)
+{
+   u32 reg;
+
+   if (queue >= ICSSG_QUEUES_MAX)
+   return 0;
+
+   regmap_read(prueth->miig_rt, ICSSG_QUEUE_CNT_OFFSET + 4 * queue, );
+
+   return reg;
+}
-- 
2.34.1

[PATCH v4 2/5] net: ti: icssg: Add Firmware config and classification APIs.

[MD Danish Anwar]

Add icssg_config.h / .c and icssg_classifier.c files. These are firmware
configuration and classification related files. Add MII helper APIs and
MACROs. These APIs and MACROs will be later used by ICSSG Ethernet driver.
Also introduce icssg_prueth.h which has definition of prueth related
structures.

Signed-off-by: MD Danish Anwar 
---
 drivers/net/ti/icss_mii_rt.h  | 192 ++
 drivers/net/ti/icssg_classifier.c | 376 +++
 drivers/net/ti/icssg_config.c | 406 ++
 drivers/net/ti/icssg_config.h | 177 +
 drivers/net/ti/icssg_prueth.h |  83 ++
 5 files changed, 1234 insertions(+)
 create mode 100644 drivers/net/ti/icss_mii_rt.h
 create mode 100644 drivers/net/ti/icssg_classifier.c
 create mode 100644 drivers/net/ti/icssg_config.c
 create mode 100644 drivers/net/ti/icssg_config.h
 create mode 100644 drivers/net/ti/icssg_prueth.h

diff --git a/drivers/net/ti/icss_mii_rt.h b/drivers/net/ti/icss_mii_rt.h
new file mode 100644
index 00..4a78394701
--- /dev/null
+++ b/drivers/net/ti/icss_mii_rt.h
@@ -0,0 +1,192 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+/* PRU-ICSS MII_RT register definitions
+ *
+ * Copyright (C) 2015-2024 Texas Instruments Incorporated - http://www.ti.com
+ */
+
+#ifndef __NET_PRUSS_MII_RT_H__
+#define __NET_PRUSS_MII_RT_H__
+
+#include 
+
+/* PRUSS_MII_RT Registers */
+#define PRUSS_MII_RT_RXCFG00x0
+#define PRUSS_MII_RT_RXCFG10x4
+#define PRUSS_MII_RT_TXCFG00x10
+#define PRUSS_MII_RT_TXCFG10x14
+#define PRUSS_MII_RT_TX_CRC0   0x20
+#define PRUSS_MII_RT_TX_CRC1   0x24
+#define PRUSS_MII_RT_TX_IPG0   0x30
+#define PRUSS_MII_RT_TX_IPG1   0x34
+#define PRUSS_MII_RT_PRS0  0x38
+#define PRUSS_MII_RT_PRS1  0x3c
+#define PRUSS_MII_RT_RX_FRMS0  0x40
+#define PRUSS_MII_RT_RX_FRMS1  0x44
+#define PRUSS_MII_RT_RX_PCNT0  0x48
+#define PRUSS_MII_RT_RX_PCNT1  0x4c
+#define PRUSS_MII_RT_RX_ERR0   0x50
+#define PRUSS_MII_RT_RX_ERR1   0x54
+
+/* PRUSS_MII_RT_RXCFG0/1 bits */
+#define PRUSS_MII_RT_RXCFG_RX_ENABLE   BIT(0)
+#define PRUSS_MII_RT_RXCFG_RX_DATA_RDY_MODE_DISBIT(1)
+#define PRUSS_MII_RT_RXCFG_RX_CUT_PREAMBLE BIT(2)
+#define PRUSS_MII_RT_RXCFG_RX_MUX_SEL  BIT(3)
+#define PRUSS_MII_RT_RXCFG_RX_L2_ENBIT(4)
+#define PRUSS_MII_RT_RXCFG_RX_BYTE_SWAPBIT(5)
+#define PRUSS_MII_RT_RXCFG_RX_AUTO_FWD_PRE BIT(6)
+#define PRUSS_MII_RT_RXCFG_RX_L2_EOF_SCLR_DIS  BIT(9)
+
+/* PRUSS_MII_RT_TXCFG0/1 bits */
+#define PRUSS_MII_RT_TXCFG_TX_ENABLE   BIT(0)
+#define PRUSS_MII_RT_TXCFG_TX_AUTO_PREAMBLEBIT(1)
+#define PRUSS_MII_RT_TXCFG_TX_EN_MODE  BIT(2)
+#define PRUSS_MII_RT_TXCFG_TX_BYTE_SWAPBIT(3)
+#define PRUSS_MII_RT_TXCFG_TX_MUX_SEL  BIT(8)
+#define PRUSS_MII_RT_TXCFG_PRE_TX_AUTO_SEQUENCEBIT(9)
+#define PRUSS_MII_RT_TXCFG_PRE_TX_AUTO_ESC_ERR BIT(10)
+#define PRUSS_MII_RT_TXCFG_TX_32_MODE_EN   BIT(11)
+#define PRUSS_MII_RT_TXCFG_TX_IPG_WIRE_CLK_EN  BIT(12) /* SR2.0 onwards */
+
+#define PRUSS_MII_RT_TXCFG_TX_START_DELAY_SHIFT16
+#define PRUSS_MII_RT_TXCFG_TX_START_DELAY_MASK GENMASK(25, 16)
+
+#define PRUSS_MII_RT_TXCFG_TX_CLK_DELAY_SHIFT  28
+#define PRUSS_MII_RT_TXCFG_TX_CLK_DELAY_MASK   GENMASK(30, 28)
+
+/* PRUSS_MII_RT_TX_IPG0/1 bits */
+#define PRUSS_MII_RT_TX_IPG_IPG_SHIFT  0
+#define PRUSS_MII_RT_TX_IPG_IPG_MASK   GENMASK(9, 0)
+
+/* PRUSS_MII_RT_PRS0/1 bits */
+#define PRUSS_MII_RT_PRS_COL   BIT(0)
+#define PRUSS_MII_RT_PRS_CRS   BIT(1)
+
+/* PRUSS_MII_RT_RX_FRMS0/1 bits */
+#define PRUSS_MII_RT_RX_FRMS_MIN_FRM_SHIFT 0
+#define PRUSS_MII_RT_RX_FRMS_MIN_FRM_MASK  GENMASK(15, 0)
+
+#define PRUSS_MII_RT_RX_FRMS_MAX_FRM_SHIFT 16
+#define PRUSS_MII_RT_RX_FRMS_MAX_FRM_MASK  GENMASK(31, 16)
+
+/* Min/Max in MII_RT_RX_FRMS */
+/* For EMAC and Switch */
+#define PRUSS_MII_RT_RX_FRMS_MAX   (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
+#define PRUSS_MII_RT_RX_FRMS_MIN_FRM   (64)
+
+/* for HSR and PRP */
+#define PRUSS_MII_RT_RX_FRMS_MAX_FRM_LRE   (PRUSS_MII_RT_RX_FRMS_MAX + \
+ICSS_LRE_TAG_RCT_SIZE)
+/* PRUSS_MII_RT_RX_PCNT0/1 bits */
+#define PRUSS_MII_RT_RX_PCNT_MIN_PCNT_SHIFT0
+#define PRUSS_MII_RT_RX_PCNT_MIN_PCNT_MASK GENMASK(3, 0)
+
+#define PRUSS_MII_RT_RX_PCNT_MAX_PCNT_SHIFT4
+#define PRUSS_MII_RT_RX_PCNT_MAX_PCNT_MASK GENMASK(7, 4)
+
+/* PRUSS_MII_RT_RX_ERR0/1 bits */
+#define PRUSS_MII_RT_RX_ERR_MIN_PCNT_ERR   BIT(0)
+#define PRUSS_MII_RT_RX_ERR_MAX_PCNT_ERR   BIT(1)
+#define PRUSS_MII_RT_RX_ERR_MIN_FRM_ERRBIT(2)
+#define PRUSS_MII_RT_RX_ERR_MAX_FRM_ERRBIT(3)
+
+#define ICSSG_CFG_OFFSET   0
+#define RGMII_CFG_OFFSET   4
+
+/* Constant to choose between MII0 and MII1 */
+#define ICSS_MII0  0
+#define ICSS_MII1  

[PATCH v4 1/5] net: ti: icssg: Add Firmware Interface for ICSSG Ethernet driver.

[MD Danish Anwar]

Add firmware interface related headers and macros for ICSSG Ethernet
driver. These macros will be later used by the ICSSG ethernet driver.

Signed-off-by: MD Danish Anwar 
---
 drivers/net/ti/icssg_switch_map.h | 209 ++
 1 file changed, 209 insertions(+)
 create mode 100644 drivers/net/ti/icssg_switch_map.h

diff --git a/drivers/net/ti/icssg_switch_map.h 
b/drivers/net/ti/icssg_switch_map.h
new file mode 100644
index 00..b62c51407b
--- /dev/null
+++ b/drivers/net/ti/icssg_switch_map.h
@@ -0,0 +1,209 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Texas Instruments ICSSG Ethernet driver
+ *
+ * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ */
+
+#ifndef __NET_TI_ICSSG_SWITCH_MAP_H
+#define __NET_TI_ICSSG_SWITCH_MAP_H
+
+/*Time after which FDB entries are checked for aged out values. Value in 
nanoseconds*/
+#define FDB_AGEING_TIMEOUT_OFFSET  0x0014
+
+/*default VLAN tag for Host Port*/
+#define HOST_PORT_DF_VLAN_OFFSET   0x001C
+
+/*Same as HOST_PORT_DF_VLAN_OFFSET*/
+#define EMAC_ICSSG_SWITCH_PORT0_DEFAULT_VLAN_OFFSET
HOST_PORT_DF_VLAN_OFFSET
+
+/*default VLAN tag for P1 Port*/
+#define P1_PORT_DF_VLAN_OFFSET 0x0020
+
+/*Same as P1_PORT_DF_VLAN_OFFSET*/
+#define EMAC_ICSSG_SWITCH_PORT1_DEFAULT_VLAN_OFFSET
P1_PORT_DF_VLAN_OFFSET
+
+/*default VLAN tag for P2 Port*/
+#define P2_PORT_DF_VLAN_OFFSET 0x0024
+
+/*Same as P2_PORT_DF_VLAN_OFFSET*/
+#define EMAC_ICSSG_SWITCH_PORT2_DEFAULT_VLAN_OFFSET
P2_PORT_DF_VLAN_OFFSET
+
+/*VLAN-FID Table offset. 4096 VIDs. 2B per VID = 8KB = 0x2000*/
+#define VLAN_STATIC_REG_TABLE_OFFSET   0x0100
+
+/*VLAN-FID Table offset for EMAC*/
+#define EMAC_ICSSG_SWITCH_DEFAULT_VLAN_TABLE_OFFSET
VLAN_STATIC_REG_TABLE_OFFSET
+
+/*packet descriptor Q reserved memory*/
+#define PORT_DESC0_HI  0x2104
+
+/*packet descriptor Q reserved memory*/
+#define PORT_DESC0_LO  0x2F6C
+
+/*packet descriptor Q reserved memory*/
+#define PORT_DESC1_HI  0x3DD4
+
+/*packet descriptor Q reserved memory*/
+#define PORT_DESC1_LO  0x4C3C
+
+/*packet descriptor Q reserved memory*/
+#define HOST_DESC0_HI  0x5AA4
+
+/*packet descriptor Q reserved memory*/
+#define HOST_DESC0_LO  0x5F0C
+
+/*packet descriptor Q reserved memory*/
+#define HOST_DESC1_HI  0x6374
+
+/*packet descriptor Q reserved memory*/
+#define HOST_DESC1_LO  0x67DC
+
+/*special packet descriptor Q reserved memory*/
+#define HOST_SPPD0 0x7AAC
+
+/*special packet descriptor Q reserved memory*/
+#define HOST_SPPD1 0x7EAC
+
+/*_Small_Description_*/
+#define TIMESYNC_FW_WC_CYCLECOUNT_OFFSET   0x83EC
+
+/*IEP count hi roll over count*/
+#define TIMESYNC_FW_WC_HI_ROLLOVER_COUNT_OFFSET0x83F4
+
+/*_Small_Description_*/
+#define TIMESYNC_FW_WC_COUNT_HI_SW_OFFSET_OFFSET   0x83F8
+
+/*Set clock descriptor*/
+#define TIMESYNC_FW_WC_SETCLOCK_DESC_OFFSET0x83FC
+
+/*_Small_Description_*/
+#define TIMESYNC_FW_WC_SYNCOUT_REDUCTION_FACTOR_OFFSET 0x843C
+
+/*_Small_Description_*/
+#define TIMESYNC_FW_WC_SYNCOUT_REDUCTION_COUNT_OFFSET  0x8440
+
+/*_Small_Description_*/
+#define TIMESYNC_FW_WC_SYNCOUT_START_TIME_CYCLECOUNT_OFFSET 0x8444
+
+/*Control variable to generate SYNC1*/
+#define TIMESYNC_FW_WC_ISOM_PIN_SIGNAL_EN_OFFSET   0x844C
+
+/*SystemTime Sync0 periodicity*/
+#define TIMESYNC_FW_ST_SYNCOUT_PERIOD_OFFSET   0x8450
+
+/*pktTxDelay for P1 = link speed dependent p1 mac delay + p1 phy delay*/
+#define TIMESYNC_FW_WC_PKTTXDELAY_P1_OFFSET0x8454
+
+/*pktTxDelay for P2 = link speed dependent p2 mac delay + p2 phy delay*/
+#define TIMESYNC_FW_WC_PKTTXDELAY_P2_OFFSET0x8458
+
+/*Set clock operation done signal for next task*/
+#define TIMESYNC_FW_SIG_PNFW_OFFSET0x845C
+
+/*Set clock operation done signal for next task*/
+#define TIMESYNC_FW_SIG_TIMESYNCFW_OFFSET  0x8460
+
+/*New list is copied at this time*/
+#define TAS_CONFIG_CHANGE_TIME 0x000C
+
+/*config change error counter*/
+#define TAS_CONFIG_CHANGE_ERROR_COUNTER0x0014
+
+/*TAS List update pending flag*/
+#define TAS_CONFIG_PENDING 0x0018
+
+/*TAS list update trigger flag*/
+#define TAS_CONFIG_CHANGE  0x0019
+
+/*List length for new TAS schedule*/
+#define TAS_ADMIN_LIST_LENGTH  0x001A
+
+/*Currently active TAS list index*/
+#define 

[PATCH v4 0/5] Introduce ICSSG Ethernet driver

[MD Danish Anwar]

Introduce ICSSG PRUETH support in uboot. The ICSSG driver is used in TI
AM654 SR2.0.

The ICSSG PRU Sub-system runs on EMAC firmware. This series Introduces
support for ICSSG driver in uboot.

This series has been tested on AM65x SR2.0, and the ICSSG interface is
able to ping / dhcp and boot kernel using tftp in uboot.

To use ICSSG2 ethernet, the ICSSG firmware needs to be loaded to PRU RPROC
cores and RPROC cores need to be booted with the firmware. This step is
done inside driver similar to kernel.

The remoteproc driver uses request_fw_into_buf() API from fs-loader driver
to load and start rproc with the required firmwares.

This series only introduces driver files. The device tree and config
changes to enable ICSSG driver will be introduced later.

This is v4 of the series [1].

Changes from v3 [3] to v4:
*) Dropped the dependncy patches and posted them seprately.
*) Dropped the DTS and config patches, will post them seprately.
*) Modified patch 4/5 to have multi port independent MAC mode support.
*) Rebased the series on latest u-boot/next.

Changes from v2 [2] to v3:
*) No functional changes.
*) Rebased the series on latest u-boot/next.
*) Dropped the RFC tag.

Changes from v1 [1] to v2:
*) Modified the driver to load the firmware inside the driver only instead
   of loading the firmware using commands at u-boot prompt. Added patch
   3/16 for this.
*) Rebased the series on the latest u-boot/next.
*) Modified conf-0 configuration in k3-am65x-binman.dtsi as suggested by
   Roger.
*) Dropped patch [4] as the patch is no longer needed.
*) Added patch 2/15 to modify fs-loader driver to use fw_storage_interface
   env instead of storage_interface and keep the env storage_interface as
   fallback as suggested by Roger.
*) Added patch 15/15 to set default values to env fw_storage_interface and
   fw_dev_part.

[1] https://lore.kernel.org/all/20231219103418.3445886-1-danishan...@ti.com/
[2] https://lore.kernel.org/all/20240111070611.342701-1-danishan...@ti.com/
[3] https://lore.kernel.org/all/20240124064930.1787929-1-danishan...@ti.com/
[4] https://lore.kernel.org/all/20231219103418.3445886-16-danishan...@ti.com/

Thanks and Regards,
MD Danish Anwar

MD Danish Anwar (5):
  net: ti: icssg: Add Firmware Interface for ICSSG Ethernet driver.
  net: ti: icssg: Add Firmware config and classification APIs.
  net: ti: icssg: Add icssg queues APIs and macros
  net: ti: icssg: Add ICSSG ethernet driver
  net: ti: icssg: Add support sending FDB command to update rx_flow_id

 arch/arm/mach-k3/common.c |  11 +
 drivers/net/ti/Kconfig|  13 +
 drivers/net/ti/Makefile   |   1 +
 drivers/net/ti/icss_mii_rt.h  | 192 +
 drivers/net/ti/icssg_classifier.c | 376 
 drivers/net/ti/icssg_config.c | 474 
 drivers/net/ti/icssg_config.h | 195 +
 drivers/net/ti/icssg_prueth.c | 691 ++
 drivers/net/ti/icssg_prueth.h |  97 +
 drivers/net/ti/icssg_queues.c |  51 +++
 drivers/net/ti/icssg_switch_map.h | 209 +
 11 files changed, 2310 insertions(+)
 create mode 100644 drivers/net/ti/icss_mii_rt.h
 create mode 100644 drivers/net/ti/icssg_classifier.c
 create mode 100644 drivers/net/ti/icssg_config.c
 create mode 100644 drivers/net/ti/icssg_config.h
 create mode 100644 drivers/net/ti/icssg_prueth.c
 create mode 100644 drivers/net/ti/icssg_prueth.h
 create mode 100644 drivers/net/ti/icssg_queues.c
 create mode 100644 drivers/net/ti/icssg_switch_map.h


base-commit: 8ef8dcc54a0d507912ee57e15a541c5cebcfca76
-- 
2.34.1

Re: [PATCH] arm: dts: kirkwood: Enable upstream DT on Kirkwood boards

[Sumit Garg]

Hi Tony,

On Fri, 22 Mar 2024 at 07:48, Tony Dinh  wrote:
>
> Enable OF_UPSTREAM to use upstream DT and add marvell/ prefix to the
> DEFAULT_DEVICE_TREE for Kirkwood boards. And so we can directly build
> DTBs from dts/upstream/src/arm/marvell, and including *-u-boot.dtsi
> files from arch/arm/dts/ directory.
>
> Background:
>
> Hi Stefan,
> Hi Michael,
>
> I did a survey and we currently have 28 Kirkwood boards. Using some
> commands and filters, here are the finding.
>
> git grep -li arch_kirkwood configs | xargs grep DEVICE_TREE | cut -d '"' -f2 
> | xargs -n1 sh -c 'diff -qs  arch/arm/dts/$1.dts 
> dts/upstream/src/arm/marvell/$1.dts' sh | grep differ
>
> diff: dts/upstream/src/arm/marvell/kirkwood-atl-sbx81lifkw.dts: No such file 
> or directory
> diff: dts/upstream/src/arm/marvell/kirkwood-atl-sbx81lifxcat.dts: No such 
> file or directory
>
> Files arch/arm/dts/kirkwood-dockstar.dts and 
> dts/upstream/src/arm/marvell/kirkwood-dockstar.dts differ
> Files arch/arm/dts/kirkwood-dreamplug.dts and 
> dts/upstream/src/arm/marvell/kirkwood-dreamplug.dts differ
> Files arch/arm/dts/kirkwood-goflexnet.dts and 
> dts/upstream/src/arm/marvell/kirkwood-goflexnet.dts differ
> Files arch/arm/dts/kirkwood-guruplug-server-plus.dts and 
> dts/upstream/src/arm/marvell/kirkwood-guruplug-server-plus.dts differ
> Files arch/arm/dts/kirkwood-iconnect.dts and 
> dts/upstream/src/arm/marvell/kirkwood-iconnect.dts differ
> Files arch/arm/dts/kirkwood-net2big.dts and 
> dts/upstream/src/arm/marvell/kirkwood-net2big.dts differ
> Files arch/arm/dts/kirkwood-ns2max.dts and 
> dts/upstream/src/arm/marvell/kirkwood-ns2max.dts differ
> Files arch/arm/dts/kirkwood-ns2mini.dts and 
> dts/upstream/src/arm/marvell/kirkwood-ns2mini.dts differ
> Files arch/arm/dts/kirkwood-nsa310s.dts and 
> dts/upstream/src/arm/marvell/kirkwood-nsa310s.dts differ
> Files arch/arm/dts/kirkwood-nsa325.dts and 
> dts/upstream/src/arm/marvell/kirkwood-nsa325.dts differ
> Files arch/arm/dts/kirkwood-openrd-client.dts and 
> dts/upstream/src/arm/marvell/kirkwood-openrd-client.dts differ
>
> diff -qrbu arch/arm/dts/ dts/upstream/src/arm/marvell/ | grep kirkwood | grep 
> ".dtsi "
>
> Files arch/arm/dts/kirkwood-6192.dtsi and 
> dts/upstream/src/arm/marvell/kirkwood-6192.dtsi differ
> Files arch/arm/dts/kirkwood-6281.dtsi and 
> dts/upstream/src/arm/marvell/kirkwood-6281.dtsi differ
> Files arch/arm/dts/kirkwood-98dx4122.dtsi and 
> dts/upstream/src/arm/marvell/kirkwood-98dx4122.dtsi differ
> Files arch/arm/dts/kirkwood-dnskw.dtsi and 
> dts/upstream/src/arm/marvell/kirkwood-dnskw.dtsi differ
> Files arch/arm/dts/kirkwood.dtsi and 
> dts/upstream/src/arm/marvell/kirkwood.dtsi differ
> Files arch/arm/dts/kirkwood-lsxl.dtsi and 
> dts/upstream/src/arm/marvell/kirkwood-lsxl.dtsi differ
> Files arch/arm/dts/kirkwood-nsa3x0-common.dtsi and 
> dts/upstream/src/arm/marvell/kirkwood-nsa3x0-common.dtsi differ
> Files arch/arm/dts/kirkwood-synology.dtsi and 
> dts/upstream/src/arm/marvell/kirkwood-synology.dtsi differ
>
> And after reviewing these differences, the following are my observation.
>
> OF_LIST is not used in these Kirkwood boards.
>
> 1. Boards that have only u-boot DTS that should be opt-out for now with 
> "#CONFIG_OF_UPSTREAM is not set"
>
> diff: dts/upstream/src/arm/marvell/kirkwood-atl-sbx81lifkw.dts: No such file 
> or directory
> diff: dts/upstream/src/arm/marvell/kirkwood-atl-sbx81lifxcat.dts: No such 
> file or directory
>
> 2. DTS and DTSI files that have only cosmetic, style, or binding changes 
> (safe to take)
>
> Files arch/arm/dts/kirkwood-dockstar.dts and 
> dts/upstream/src/arm/marvell/kirkwood-dockstar.dts differ
> Files arch/arm/dts/kirkwood-goflexnet.dts and 
> dts/upstream/src/arm/marvell/kirkwood-goflexnet.dts differ
> Files arch/arm/dts/kirkwood-guruplug-server-plus.dts and 
> dts/upstream/src/arm/marvell/kirkwood-guruplug-server-plus.dts differ
> Files arch/arm/dts/kirkwood-iconnect.dts and 
> dts/upstream/src/arm/marvell/kirkwood-iconnect.dts differ
> Files arch/arm/dts/kirkwood-net2big.dts and 
> dts/upstream/src/arm/marvell/kirkwood-net2big.dts differ
> Files arch/arm/dts/kirkwood-ns2max.dts and 
> dts/upstream/src/arm/marvell/kirkwood-ns2max.dts differ
> Files arch/arm/dts/kirkwood-ns2mini.dts and 
> dts/upstream/src/arm/marvell/kirkwood-ns2mini.dts differ
> Files arch/arm/dts/kirkwood-nsa325.dts and 
> dts/upstream/src/arm/marvell/kirkwood-nsa325.dts differ
> Files arch/arm/dts/kirkwood-openrd-client.dts and 
> dts/upstream/src/arm/marvell/kirkwood-openrd-client.dts differ
>
> Files arch/arm/dts/kirkwood-dnskw.dtsi and 
> dts/upstream/src/arm/marvell/kirkwood-dnskw.dtsi differ
> Files arch/arm/dts/kirkwood.dtsi and 
> dts/upstream/src/arm/marvell/kirkwood.dtsi differ
> Files arch/arm/dts/kirkwood-synology.dtsi and 
> dts/upstream/src/arm/marvell/kirkwood-synology.dtsi differ
>
> 3. DTS files that are newer in upstream (safe to take with regression test)
>
> Files arch/arm/dts/kirkwood-nsa310s.dts and 
> 

Re: [PATCH] configs: imx8mp_beacon: Enable PCIe NVMe drives

[Sumit Garg]

On Wed, 27 Mar 2024 at 02:55, Adam Ford  wrote:
>
> The baseboard supports and NVMe drives via the PCIe slot. This
> requires a few extra config options to be enabled.
>
> The NVMe can be enumerated with the following commands:
>
> u-boot=> pci enum
> PCIE-0: Link up (Gen1-x1, Bus0)
> u-boot=> nvme scan
> u-boot=> nvme info
> Device 0: Vendor: 0x15b7 Rev: 20120022 Prod: 184960441105
> Type: Hard Disk
> Capacity: 122104.3 MB = 119.2 GB (250069680 x 512)
> u-boot=>
>
> Signed-off-by: Adam Ford 

Reviewed-by: Sumit Garg 

-Sumit

> ---
> Depends on: 
> https://patchwork.ozlabs.org/project/uboot/patch/20240326202439.46707-4-aford...@gmail.com/
>
> diff --git a/configs/imx8mp_beacon_defconfig b/configs/imx8mp_beacon_defconfig
> index 0ae8c9645a..fe1678d8ae 100644
> --- a/configs/imx8mp_beacon_defconfig
> +++ b/configs/imx8mp_beacon_defconfig
> @@ -15,6 +15,7 @@ CONFIG_DM_GPIO=y
>  CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-beacon-kit"
>  CONFIG_SPL_TEXT_BASE=0x92
>  CONFIG_TARGET_IMX8MP_BEACON=y
> +CONFIG_DM_RESET=y
>  CONFIG_SYS_MONITOR_LEN=524288
>  CONFIG_SPL_MMC=y
>  CONFIG_SPL_SERIAL=y
> @@ -27,6 +28,7 @@ CONFIG_ARMV8_SET_SMPEN=y
>  CONFIG_ARMV8_EA_EL3_FIRST=y
>  CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x4800
>  CONFIG_SYS_LOAD_ADDR=0x4048
> +CONFIG_PCI=y
>  # CONFIG_ANDROID_BOOT_IMAGE is not set
>  CONFIG_FIT=y
>  CONFIG_FIT_EXTERNAL_OFFSET=0x3000
> @@ -65,6 +67,7 @@ CONFIG_CMD_FUSE=y
>  CONFIG_CMD_GPIO=y
>  CONFIG_CMD_I2C=y
>  CONFIG_CMD_MMC=y
> +CONFIG_CMD_PCI=y
>  CONFIG_CMD_USB=y
>  CONFIG_CMD_USB_SDP=y
>  CONFIG_CMD_USB_MASS_STORAGE=y
> @@ -118,8 +121,11 @@ CONFIG_DWC_ETH_QOS_IMX=y
>  CONFIG_FEC_MXC=y
>  CONFIG_RGMII=y
>  CONFIG_MII=y
> +CONFIG_NVME_PCI=y
> +CONFIG_PCIE_DW_IMX=y
>  CONFIG_PHY=y
>  CONFIG_PHY_IMX8MQ_USB=y
> +CONFIG_PHY_IMX8M_PCIE=y
>  CONFIG_PINCTRL=y
>  CONFIG_SPL_PINCTRL=y
>  CONFIG_PINCTRL_IMX8M=y
> --
> 2.43.0
>

RE: [EXT] Re: [PATCH v3 2/3] imx: imx93_evk: add rtc pcf2131

[Joy Zou]

> -Original Message-
> From: Fabio Estevam 
> Sent: 2024年3月27日 6:14
> To: Joy Zou 
> Cc: Peng Fan ; Ye Li ; Jacky Bai
> ; sba...@denx.de; s...@chromium.org;
> sap...@gmail.com; judge.pack...@gmail.com; dl-uboot-imx
> ; u-boot@lists.denx.de
> Subject: [EXT] Re: [PATCH v3 2/3] imx: imx93_evk: add rtc pcf2131
> 
> Caution: This is an external email. Please take care when clicking links or
> opening attachments. When in doubt, report the message using the 'Report
> this email' button
> 
> 
> On Tue, Mar 26, 2024 at 12:30 AM Joy Zou  wrote:
> 
> > + {
> > +   #address-cells = <1>;
> > +   #size-cells = <0>;
> > +   clock-frequency = <40>;
> > +   pinctrl-names = "default", "sleep";
> > +   pinctrl-0 = <_lpi2c3>;
> > +   pinctrl-1 = <_lpi2c3>;
> > +   status = "okay";
> > +
> > +   pcf2131: rtc@53 {
> > +   compatible = "nxp,pcf2131";
> > +   reg = <0x53>;
> > +   interrupt-parent = <>;
> > +   interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
> > +   status = "okay";
> 
> Please submit the RTC support to Linux first, then you can sync the devicetree
> with Linux in U-Boot.
> 
> In the meantime, you can add the RTC support to the -u-boot.dtsi.
> 
> Please consider using OF_UPSTREAM available in the U-Boot next branch.

Will submit the RTC support patch to Linux firstly.
Thanks for your comments!
BR
Joy Zou

[RFC] Makefile.lib: find capsule ESL dtsi file when CONFIG_OF_UPSTREAM=y

[Jonathan Humphreys]

When CONFIG_OF_UPSTREAM is enabled, DTS files are in SOC subdirectories (vs the
top level dts directory), but when CONFIG_EFI_CAPSULE_AUTHENTICATE is enabled,
the dynamically created dtsi file containing the capsule ESL DT node is in the
parent directory.  This results in a build failure because the #include inserted
in the DTS file is local to the current directory.  Update Makefile to have the
DT preprocessing of #includes search in the parent (dts top level) directory
too.

I'm not sure if this is the best solution.

I was also tempted to just manually include the capsule-key property in the
board dts, and avoid the Makefile implicit inclusion trickery.  I would actually
prefer this approach as everything is more explicit.  But this isn't an option
because if CONFIG_EFI_CAPSULE_AUTHENTICATE is enabled, the implicit inclusion of
the dtsi file happens.  It would be better, IMO, if we only included the
generated dtsi file if CONFIG_EFI_CAPSULE_ESL_FILE is defined.  Was only
supporting the implicit inclusiong approach an intentional design choice?

Thanks
Jon

Signed-off-by: Jonathan Humphreys 
---
 scripts/Makefile.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 12857316c58..62f87517c09 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -334,7 +334,7 @@ cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \
(cat $< > $(pre-tmp)); \
$(foreach f,$(subst $(quote),,$(dtsi_include_list)), \
  echo '$(pound)include "$(f)"' >> $(pre-tmp);) \
-   $(HOSTCC) -E $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) 
$(pre-tmp) ; \
+   $(HOSTCC) -E $(dtc_cpp_flags) -I$(obj) -x assembler-with-cpp -o 
$(dtc-tmp) $(pre-tmp) ; \
$(DTC) -O dtb -o $@ -b 0 \
-i $(dir $<) -i $(u_boot_dtsi_loc) $(DTC_FLAGS) \
-d $(depfile).dtc.tmp $(dtc-tmp) || \
-- 
2.34.1

RE: [EXT] Re: [PATCH v3 3/3] configs: Enable RTC pcf2131 support

[Joy Zou]

> -Original Message-
> From: Fabio Estevam 
> Sent: 2024年3月27日 6:12
> To: Joy Zou 
> Cc: Peng Fan ; Ye Li ; Jacky Bai
> ; sba...@denx.de; s...@chromium.org;
> sap...@gmail.com; judge.pack...@gmail.com; dl-uboot-imx
> ; u-boot@lists.denx.de
> Subject: [EXT] Re: [PATCH v3 3/3] configs: Enable RTC pcf2131 support
> 
> Caution: This is an external email. Please take care when clicking links or
> opening attachments. When in doubt, report the message using the 'Report
> this email' button
> 
> 
> On Tue, Mar 26, 2024 at 12:30 AM Joy Zou  wrote:
> >
> > Enable CONFIG_RTC_PCF2127 configs to support pcf2131.
> 
> Subject should  be imx93_11x11_evk specific:
> 
> imx93_11x11_evk: Add PCF2131 RTC support
Will modify the Subject.
Thanks for your comments!

BR
Joy Zou

RE: [EXT] Re: [PATCH v3 1/3] drivers: rtc: add pcf2131 rtc driver

[Joy Zou]

> -Original Message-
> From: Fabio Estevam 
> Sent: 2024年3月27日 6:10
> To: Joy Zou 
> Cc: Peng Fan ; Ye Li ; Jacky Bai
> ; sba...@denx.de; s...@chromium.org;
> sap...@gmail.com; judge.pack...@gmail.com; dl-uboot-imx
> ; u-boot@lists.denx.de
> Subject: [EXT] Re: [PATCH v3 1/3] drivers: rtc: add pcf2131 rtc driver
> 
> Caution: This is an external email. Please take care when clicking links or
> opening attachments. When in doubt, report the message using the 'Report
> this email' button
> 
> 
> On Tue, Mar 26, 2024 at 12:30 AM Joy Zou  wrote:
> 
> > +bool is_pcf2131_type(struct udevice *dev)
> 
> static bool
Will add static key word!
> 
> >  static int pcf2127_rtc_read(struct udevice *dev, uint offset, u8
> > *buffer, uint len)  {
> > struct dm_i2c_chip *chip = dev_get_parent_plat(dev); @@
> -43,10
> > +75,64 @@ static int pcf2127_rtc_read(struct udevice *dev, uint offset, u8
> *buffer, uint l
> > return dm_i2c_xfer(dev, , 1);  }
> >
> > +static int pcf2131_rtc_lock(struct udevice *dev) {
> > +   int ret = 0;
> 
> No need to initialize ret with 0.
Will remove initialization 0.
> 
> > +static int pcf2131_rtc_unlock(struct udevice *dev) {
> > +   int ret = 0;
> 
> Ditto.
> 
> >  static int pcf2127_rtc_write(struct udevice *dev, uint offset,
> >  const u8 *buffer, uint len)  {
> > -   return dm_i2c_write(dev, offset, buffer, len);
> > +   int ret = 0;
> 
> Ditto.
Will remove initialization 0.
Thanks for your comments!
BR
Joy Zou

RE: [PATCH] arm: imx: fix signature_block_hdr struct fields order

[Peng Fan]

+Ye
> Subject: [PATCH] arm: imx: fix signature_block_hdr struct fields order
> 
> According to the documentation (for example AN13994), for AHAB-enabled
> devices the format of the signature block is:
> 
>   +--+--+--+-+
>   | Tag  | Length - msb | Length - lsb | Version |
>   +--+--+--+-+
>   | SRK Table offset| Certificate offset |
>   +-++
>   | Blob offset | Signature offset   |
>   +-++
> 
> Signed-off-by: Javier Viguera 
> ---
>  include/imx_container.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/include/imx_container.h b/include/imx_container.h index
> 54cd684e35d5..691c764b3e5b 100644
> --- a/include/imx_container.h
> +++ b/include/imx_container.h
> @@ -50,10 +50,10 @@ struct signature_block_hdr {
>   u8 length_lsb;
>   u8 length_msb;
>   u8 tag;
> - u16 srk_table_offset;
>   u16 cert_offset;
> - u16 blob_offset;
> + u16 srk_table_offset;
>   u16 signature_offset;
> + u16 blob_offset;
>   u32 reserved;
>  } __packed;
> 

Re: [PATCH] arm: imx: fix signature_block_hdr struct fields order

[Fabio Estevam]

Hi Javier,

On Tue, Mar 26, 2024 at 8:07 AM Javier Viguera  wrote:
>
> According to the documentation (for example AN13994), for AHAB-enabled
> devices the format of the signature block is:
>
>   +--+--+--+-+
>   | Tag  | Length - msb | Length - lsb | Version |
>   +--+--+--+-+
>   | SRK Table offset| Certificate offset |
>   +-++
>   | Blob offset | Signature offset   |
>   +-++

Could you elaborate more about this and share more details?

Have you seen a run-time error or did you catch it by code inspection?

Please clarify.

Thanks

Re: [PATCH 5/7] arm64: imx: imx8mm-beacon: Migrate to OF_UPSTREAM

[Fabio Estevam]

Hi Adam,

On Tue, Mar 26, 2024 at 5:25 PM Adam Ford  wrote:
>
> The imx8mm-beacon boards can migrate to OF_UPSTREAM which also
> allows for the removal the device tree files.
>
> Signed-off-by: Adam Ford 

Please split the series by SoC family, thanks.

Re: [PATCH v6 2/3] net: bootp: BOOTP/DHCPv4 retransmission improvements

[Tom Rini]

On Wed, Nov 22, 2023 at 03:27:45PM -0800, Sean Edmond wrote:

> This patch introduces 3 improvements to align with RFC 951:
> - retransmission backoff interval maximum is configurable
> - initial retranmission backoff interval is configurable
> - transaction ID is kept the same for each BOOTP/DHCPv4 request
> 
> In applications where thousands of nodes are serviced by a single DHCP
> server, maximizing the retransmission backoff interval at 2 seconds (the
> current u-boot default) exerts high pressure on the DHCP server and
> network layer.
> 
> RFC 951 “7.2. Client Retransmission Strategy” states that the
> retransmission backoff interval should be limited to 60 seconds.  This
> patch allows the interval to be configurable using the environment
> variable "bootpretransmitperiodmax"
> 
> The initial retranmission backoff period defaults to 250ms, which is
> also too small for these scenarios with many clients.  This patch makes
> the initial retransmission interval to be configurable using the
> environment variable "bootpretransmitperiodinit".
> 
> Also, on a retransmission it is not expected for the transaction ID to
> change (only the 'secs' field should be updated). Let's save the
> transaction ID and use the same transaction ID for each BOOTP/DHCPv4
> exchange.
> 
> Signed-off-by: Sean Edmond 

This leads to failure to build on some platforms:
+(imxrt1050-evk) WARNING: unmet direct dependencies detected for CMD_DHCP
+(imxrt1050-evk)   Depends on [n]: CMDLINE [=y] && NET [=y] && CMD_NET [=y] && 
CMD_BOOTP [=n]
+(imxrt1050-evk)   Selected by [y]:
+(imxrt1050-evk)   - BOOT_DEFAULTS_CMDS [=y] && CMD_NET [=y]
+(imxrt1050-evk) arm-linux-gnueabi-ld.bfd: net/net.o: in function `net_loop':
+(imxrt1050-evk) net/net.c:526:(.text.net_loop+0xa8): undefined reference to 
`bootp_reset'
+(imxrt1050-evk) arm-linux-gnueabi-ld.bfd: net/net.c:528:(.text.net_loop+0xb0): 
undefined reference to `dhcp_request'

-- 
Tom


signature.asc
Description: PGP signature

[PATCH] arm: dts: kirkwood: Remove DTS files for Kirkwood boards

[Tony Dinh]

Remove DTS and DTSI files for Kirkwood boards that have upstream supports.

This patch depends on
"arm: dts: kirkwood: Enable upstream DT on Kirkwood boards"
https://patchwork.ozlabs.org/project/uboot/patch/20240322021747.14873-1-mibo...@gmail.com/

Signed-off-by: Tony Dinh 
---

 arch/arm/dts/Makefile |  28 +-
 arch/arm/dts/kirkwood-6192.dtsi   |  88 --
 arch/arm/dts/kirkwood-6281.dtsi   |  90 --
 arch/arm/dts/kirkwood-6282.dtsi   | 161 
 arch/arm/dts/kirkwood-98dx4122.dtsi   |  53 --
 arch/arm/dts/kirkwood-blackarmor-nas220.dts   | 172 
 arch/arm/dts/kirkwood-d2net.dts   |  45 -
 arch/arm/dts/kirkwood-dns325.dts  |  63 --
 arch/arm/dts/kirkwood-dnskw.dtsi  | 235 -
 arch/arm/dts/kirkwood-dockstar.dts| 110 ---
 arch/arm/dts/kirkwood-dreamplug.dts   | 131 ---
 arch/arm/dts/kirkwood-ds109.dts   |  40 -
 arch/arm/dts/kirkwood-goflexnet.dts   | 190 
 .../arm/dts/kirkwood-guruplug-server-plus.dts | 133 ---
 arch/arm/dts/kirkwood-ib62x0.dts  | 146 ---
 arch/arm/dts/kirkwood-iconnect.dts| 195 
 arch/arm/dts/kirkwood-is2.dts |  40 -
 arch/arm/dts/kirkwood-lschlv2.dts |  20 -
 arch/arm/dts/kirkwood-lsxhl.dts   |  20 -
 arch/arm/dts/kirkwood-lsxl.dtsi   | 241 -
 arch/arm/dts/kirkwood-net2big.dts |  63 --
 arch/arm/dts/kirkwood-netxbig.dtsi| 232 -
 arch/arm/dts/kirkwood-ns2-common.dtsi |  97 --
 arch/arm/dts/kirkwood-ns2.dts |  40 -
 arch/arm/dts/kirkwood-ns2lite.dts |  35 -
 arch/arm/dts/kirkwood-ns2max.dts  |  59 --
 arch/arm/dts/kirkwood-ns2mini.dts |  60 --
 arch/arm/dts/kirkwood-nsa310s.dts | 319 ---
 arch/arm/dts/kirkwood-nsa325.dts  | 231 -
 arch/arm/dts/kirkwood-nsa3x0-common.dtsi  | 157 
 arch/arm/dts/kirkwood-openrd-base.dts |  39 -
 arch/arm/dts/kirkwood-openrd-client.dts   |  73 --
 arch/arm/dts/kirkwood-openrd-ultimate.dts |  55 --
 arch/arm/dts/kirkwood-openrd.dtsi | 122 ---
 arch/arm/dts/kirkwood-pogo_e02.dts| 132 ---
 arch/arm/dts/kirkwood-pogoplug-series-4.dts   | 180 
 arch/arm/dts/kirkwood-sheevaplug-common.dtsi  | 104 ---
 arch/arm/dts/kirkwood-sheevaplug.dts  |  42 -
 arch/arm/dts/kirkwood-synology.dtsi   | 855 --
 arch/arm/dts/kirkwood.dtsi| 393 
 40 files changed, 1 insertion(+), 5488 deletions(-)
 delete mode 100644 arch/arm/dts/kirkwood-6192.dtsi
 delete mode 100644 arch/arm/dts/kirkwood-6281.dtsi
 delete mode 100644 arch/arm/dts/kirkwood-6282.dtsi
 delete mode 100644 arch/arm/dts/kirkwood-98dx4122.dtsi
 delete mode 100644 arch/arm/dts/kirkwood-blackarmor-nas220.dts
 delete mode 100644 arch/arm/dts/kirkwood-d2net.dts
 delete mode 100644 arch/arm/dts/kirkwood-dns325.dts
 delete mode 100644 arch/arm/dts/kirkwood-dnskw.dtsi
 delete mode 100644 arch/arm/dts/kirkwood-dockstar.dts
 delete mode 100644 arch/arm/dts/kirkwood-dreamplug.dts
 delete mode 100644 arch/arm/dts/kirkwood-ds109.dts
 delete mode 100644 arch/arm/dts/kirkwood-goflexnet.dts
 delete mode 100644 arch/arm/dts/kirkwood-guruplug-server-plus.dts
 delete mode 100644 arch/arm/dts/kirkwood-ib62x0.dts
 delete mode 100644 arch/arm/dts/kirkwood-iconnect.dts
 delete mode 100644 arch/arm/dts/kirkwood-is2.dts
 delete mode 100644 arch/arm/dts/kirkwood-lschlv2.dts
 delete mode 100644 arch/arm/dts/kirkwood-lsxhl.dts
 delete mode 100644 arch/arm/dts/kirkwood-lsxl.dtsi
 delete mode 100644 arch/arm/dts/kirkwood-net2big.dts
 delete mode 100644 arch/arm/dts/kirkwood-netxbig.dtsi
 delete mode 100644 arch/arm/dts/kirkwood-ns2-common.dtsi
 delete mode 100644 arch/arm/dts/kirkwood-ns2.dts
 delete mode 100644 arch/arm/dts/kirkwood-ns2lite.dts
 delete mode 100644 arch/arm/dts/kirkwood-ns2max.dts
 delete mode 100644 arch/arm/dts/kirkwood-ns2mini.dts
 delete mode 100644 arch/arm/dts/kirkwood-nsa310s.dts
 delete mode 100644 arch/arm/dts/kirkwood-nsa325.dts
 delete mode 100644 arch/arm/dts/kirkwood-nsa3x0-common.dtsi
 delete mode 100644 arch/arm/dts/kirkwood-openrd-base.dts
 delete mode 100644 arch/arm/dts/kirkwood-openrd-client.dts
 delete mode 100644 arch/arm/dts/kirkwood-openrd-ultimate.dts
 delete mode 100644 arch/arm/dts/kirkwood-openrd.dtsi
 delete mode 100644 arch/arm/dts/kirkwood-pogo_e02.dts
 delete mode 100644 arch/arm/dts/kirkwood-pogoplug-series-4.dts
 delete mode 100644 arch/arm/dts/kirkwood-sheevaplug-common.dtsi
 delete mode 100644 arch/arm/dts/kirkwood-sheevaplug.dts
 delete mode 100644 arch/arm/dts/kirkwood-synology.dtsi
 delete mode 100644 arch/arm/dts/kirkwood.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d85a33055c..896476a823 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -47,33 +47,7 @@ dtb-$(CONFIG_ARCH_DAVINCI) += \
 
 

[PATCH] mmc: rockchip_sdhci: Revert 4 blocks PIO mode read limit for RK35xx

[Jonas Karlman]

The commit 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks
read in a single command") introduced a limit of number of blocks to
read to fix a Data End Bit Error on RK3568 and RK3588. This had a side
affect of significant slowing down reading FIT from eMMC.

After the commit 6de9d7b2f13c ("rockchip: rk35xx: Enable eMMC HS200 mode
by default") the limit of number of blocks to read workaround is no
longer necessary and a Data End Bit Error is no longer happening using
PIO mode.

Revert this limitation to allow reading more than 4 blocks with a single
CMD18 command in PIO mode and speed up reading FIT from eMMC.

Signed-off-by: Jonas Karlman 
---
This is a replacement for the prior [1] "mmc: rockchip_sdhci: Use bounce
buffer in SPL to fix read performance" patch.

[1] https://patchwork.ozlabs.org/patch/1895377/
---
 drivers/mmc/rockchip_sdhci.c | 10 --
 1 file changed, 10 deletions(-)

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 706fb1235796..45587222a230 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -598,16 +598,6 @@ static int rockchip_sdhci_probe(struct udevice *dev)
dev_read_bool(dev, "u-boot,spl-fifo-mode"))
host->flags &= ~USE_DMA;
 
-   /*
-* Reading more than 4 blocks with a single CMD18 command in PIO mode
-* triggers Data End Bit Error on RK3568 and RK3588. Limit to reading
-* max 4 blocks in one command when using PIO mode.
-*/
-   if (!(host->flags & USE_DMA) &&
-   (device_is_compatible(dev, "rockchip,rk3568-dwcmshc") ||
-device_is_compatible(dev, "rockchip,rk3588-dwcmshc")))
-   cfg->b_max = 4;
-
return sdhci_probe(dev);
 }
 
-- 
2.43.2

[PATCH v5] cmd: mtd: OTP access support

[Arseniy Krasnov]

Add access to OTP region. It supports info, dump, write and lock
operations. Usage example:

'mtd otpread nand0 u 0 1024' - dump 1024 bytes of user area starting
 from offset 0 of device 'nand0'.

'mtd otpwrite nand0 10 11223344' - write binary data 0x11, 0x22, 0x33,
 0x44 to offset 10 to user area of device 'nand0'.

'mtd otplock nand0 0 1024' - lock 1024 bytes of user area starting
 from offset 0 of device 'nand0'.

'mtd otpinfo nand0 f' - show info about factory area of device 'nand0'.

Signed-off-by: Arseniy Krasnov 
---
 Changelog:
 v1 -> v2:
  * Remove warning that OTP can't be erased after write.
 v2 -> v3:
  * Commit message updated by adding usage.
  * R-b added.
 v3 -> v4:
  * Fix build failure due to invalid format strings for 'printf()'.
  * Rebase over latest version of cmd/mtd.c.
 v4 -> v5:
  * Implement commands from this patch as config option due to too big
final size of the uboot image.
  * R-b removed because of patch update.

 cmd/Kconfig |   7 ++
 cmd/mtd.c   | 234 
 2 files changed, 241 insertions(+)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 7292a150f5..832098e66e 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1366,6 +1366,13 @@ config CMD_MTD
help
  MTD commands support.
 
+config CMD_MTD_OTP
+   bool "mtd otp"
+   depends on CMD_MTD
+   select HEXDUMP
+   help
+ MTD commands for OTP access.
+
 config CMD_MUX
bool "mux"
depends on MULTIPLEXER
diff --git a/cmd/mtd.c b/cmd/mtd.c
index e63c011e79..c66105e373 100644
--- a/cmd/mtd.c
+++ b/cmd/mtd.c
@@ -11,6 +11,9 @@
 #include 
 #include 
 #include 
+#if CONFIG_IS_ENABLED(CMD_MTD_OTP)
+#include 
+#endif
 #include 
 #include 
 #include 
@@ -202,6 +205,221 @@ static bool mtd_oob_write_is_empty(struct mtd_oob_ops *op)
return true;
 }
 
+#if CONFIG_IS_ENABLED(CMD_MTD_OTP)
+static int do_mtd_otp_read(struct cmd_tbl *cmdtp, int flag, int argc,
+  char *const argv[])
+{
+   struct mtd_info *mtd;
+   size_t retlen;
+   off_t from;
+   size_t len;
+   bool user;
+   int ret;
+   u8 *buf;
+
+   if (argc != 5)
+   return CMD_RET_USAGE;
+
+   if (!strcmp(argv[2], "u"))
+   user = true;
+   else if (!strcmp(argv[2], "f"))
+   user = false;
+   else
+   return CMD_RET_USAGE;
+
+   mtd = get_mtd_by_name(argv[1]);
+   if (IS_ERR_OR_NULL(mtd))
+   return CMD_RET_FAILURE;
+
+   from = simple_strtoul(argv[3], NULL, 0);
+   len = simple_strtoul(argv[4], NULL, 0);
+
+   ret = CMD_RET_FAILURE;
+
+   buf = malloc(len);
+   if (!buf)
+   goto put_mtd;
+
+   printf("Reading %s OTP from 0x%lx, %zu bytes\n",
+  user ? "user" : "factory", from, len);
+
+   if (user)
+   ret = mtd_read_user_prot_reg(mtd, from, len, , buf);
+   else
+   ret = mtd_read_fact_prot_reg(mtd, from, len, , buf);
+   if (ret) {
+   free(buf);
+   pr_err("OTP read failed: %d\n", ret);
+   ret = CMD_RET_FAILURE;
+   goto put_mtd;
+   }
+
+   if (retlen != len)
+   pr_err("OTP read returns %zu, but %zu expected\n",
+  retlen, len);
+
+   print_hex_dump("", 0, 16, 1, buf, retlen, true);
+
+   free(buf);
+
+   ret = CMD_RET_SUCCESS;
+
+put_mtd:
+   put_mtd_device(mtd);
+
+   return ret;
+}
+
+static int do_mtd_otp_lock(struct cmd_tbl *cmdtp, int flag, int argc,
+  char *const argv[])
+{
+   struct mtd_info *mtd;
+   off_t from;
+   size_t len;
+   int ret;
+
+   if (argc != 4)
+   return CMD_RET_USAGE;
+
+   mtd = get_mtd_by_name(argv[1]);
+   if (IS_ERR_OR_NULL(mtd))
+   return CMD_RET_FAILURE;
+
+   from = simple_strtoul(argv[2], NULL, 0);
+   len = simple_strtoul(argv[3], NULL, 0);
+
+   ret = mtd_lock_user_prot_reg(mtd, from, len);
+   if (ret) {
+   pr_err("OTP lock failed: %d\n", ret);
+   ret = CMD_RET_FAILURE;
+   goto put_mtd;
+   }
+
+   ret = CMD_RET_SUCCESS;
+
+put_mtd:
+   put_mtd_device(mtd);
+
+   return ret;
+}
+
+static int do_mtd_otp_write(struct cmd_tbl *cmdtp, int flag, int argc,
+   char *const argv[])
+{
+   struct mtd_info *mtd;
+   size_t retlen;
+   size_t binlen;
+   u8 *binbuf;
+   off_t from;
+   int ret;
+
+   if (argc != 4)
+   return CMD_RET_USAGE;
+
+   mtd = get_mtd_by_name(argv[1]);
+   if (IS_ERR_OR_NULL(mtd))
+   return CMD_RET_FAILURE;
+
+   from = simple_strtoul(argv[2], NULL, 0);
+   binlen = strlen(argv[3]) / 2;
+
+   ret = CMD_RET_FAILURE;
+   binbuf = malloc(binlen);
+   if (!binbuf)
+   goto put_mtd;
+
+   hex2bin(binbuf, argv[3], binlen);
+
+   

Re: [PATCH v2 2/4] boot: fdt: Clean up env_get_bootm_size()

[Marek Vasut]

On 3/20/24 10:00 PM, Laurent Pinchart wrote:

On Wed, Mar 20, 2024 at 09:52:34PM +0100, Marek Vasut wrote:

On 3/18/24 5:18 PM, Laurent Pinchart wrote:


@@ -142,7 +140,7 @@ phys_size_t env_get_bootm_size(void)
   
   	s = env_get("bootm_low");

if (s)
-   tmp = (phys_size_t)simple_strtoull(s, NULL, 16);
+   tmp = simple_strtoull(s, NULL, 16);
else
tmp = start;
   


Maybe you could even drop the tmp variable completely by writing this

if (s)
size -= simple_strtoull(s, NULL, 16) - start;

return size;

I've never liked variables named tmp :-)


No, let's not do this. With this FDT part, the code should be verbose
and as easy to understand at first glance as possible, no subtraction
assignments and other shenanigans please.


How about this ?

s = env_get("bootm_low");
if (s) {
phys_addr_t low_addr = simple_strtoull(s, NULL, 16);
 size -= low_addr - start;
}

return size;

If you're going for readability, that's clearer than

return size - (tmp - start);


I do not share this opinion, the subtraction assignment makes this 
harder to read. If that makes for a more verbose code, so be it.



and it also interestingly points out that tmp/low_addr should be a
phys_addr_t, not a phys_size_t.


The original code already contains trivial 'tmp = start' assignment, so 
these two types should match, and they don't. Fixed in V4, thanks.

[PATCH v4 6/6] boot: fdt: Move usable variable below updated comment

[Marek Vasut]

Move the variable below comment which explains what the variable means.
Update the comment. No functional change.

Reviewed-by: Laurent Pinchart 
Suggested-by: Laurent Pinchart 
Signed-off-by: Marek Vasut 
---
Cc: Heinrich Schuchardt 
Cc: Kuninori Morimoto 
Cc: Laurent Pinchart 
Cc: Simon Glass 
Cc: Tom Rini 
---
V2: - Update the comment, s@the the@the@ and quote 'usable'
- Add RB from Laurent
V3: No change
V4: No change
---
 boot/image-fdt.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/boot/image-fdt.c b/boot/image-fdt.c
index c37442c9130..2b92bdaff16 100644
--- a/boot/image-fdt.c
+++ b/boot/image-fdt.c
@@ -218,12 +218,12 @@ int boot_relocate_fdt(struct lmb *lmb, char 
**of_flat_tree, ulong *of_size)
if (start + size < low)
continue;
 
-   usable = min(start + size, low + mapsize);
-
/*
 * At least part of this DRAM bank is usable, try
-* using it for LMB allocation.
+* using the DRAM bank up to 'usable' address limit
+* for LMB allocation.
 */
+   usable = min(start + size, low + mapsize);
addr = lmb_alloc_base(lmb, of_len, 0x1000, usable);
of_start = map_sysmem(addr, of_len);
/* Allocation succeeded, use this block. */
-- 
2.43.0

[PATCH v4 5/6] boot: fdt: Drop lmb_alloc*() typecasts

[Marek Vasut]

The lmb_alloc_base() returns phys_addr_t , map_sysmem() accepts
phys_addr_t as first parameter. Declare 'addr' as phys_addr_t and
get rid of the casts.

Reviewed-by: Laurent Pinchart 
Reported-by: Laurent Pinchart 
Signed-off-by: Marek Vasut 
---
Cc: Heinrich Schuchardt 
Cc: Kuninori Morimoto 
Cc: Laurent Pinchart 
Cc: Simon Glass 
Cc: Tom Rini 
---
V2: - Replace $addr with 'addr' to somehow delimit the variable name
V3: - Add RB from Laurent
V4: No change
---
 boot/image-fdt.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/boot/image-fdt.c b/boot/image-fdt.c
index c2571b22244..c37442c9130 100644
--- a/boot/image-fdt.c
+++ b/boot/image-fdt.c
@@ -162,6 +162,7 @@ int boot_relocate_fdt(struct lmb *lmb, char **of_flat_tree, 
ulong *of_size)
void*of_start = NULL;
phys_addr_t start, size, usable;
char*fdt_high;
+   phys_addr_t addr;
phys_addr_t low;
phys_size_t mapsize;
ulong   of_len = 0;
@@ -186,7 +187,6 @@ int boot_relocate_fdt(struct lmb *lmb, char **of_flat_tree, 
ulong *of_size)
fdt_high = env_get("fdt_high");
if (fdt_high) {
ulong desired_addr = hextoul(fdt_high, NULL);
-   ulong addr;
 
if (desired_addr == ~0UL) {
/* All ones means use fdt in place */
@@ -224,8 +224,8 @@ int boot_relocate_fdt(struct lmb *lmb, char **of_flat_tree, 
ulong *of_size)
 * At least part of this DRAM bank is usable, try
 * using it for LMB allocation.
 */
-   of_start = map_sysmem((ulong)lmb_alloc_base(lmb,
-   of_len, 0x1000, usable), of_len);
+   addr = lmb_alloc_base(lmb, of_len, 0x1000, usable);
+   of_start = map_sysmem(addr, of_len);
/* Allocation succeeded, use this block. */
if (of_start != NULL)
break;
-- 
2.43.0

[PATCH v4 4/6] boot: fdt: Clean up env_get_bootm_mapsize()

[Marek Vasut]

Reduce tmp variable use and remove unnecessary type cast in
env_get_bootm_mapsize(). This aligns the env variable parsing
with env_get_bootm_low(). No functional change.

Signed-off-by: Marek Vasut 
---
Cc: Heinrich Schuchardt 
Cc: Kuninori Morimoto 
Cc: Laurent Pinchart 
Cc: Simon Glass 
Cc: Tom Rini 
---
V3: - New patch
V4: No change
---
 boot/image-board.c | 7 ++-
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/boot/image-board.c b/boot/image-board.c
index 13876b79026..09b6e4e0bdc 100644
--- a/boot/image-board.c
+++ b/boot/image-board.c
@@ -149,13 +149,10 @@ phys_size_t env_get_bootm_size(void)
 
 phys_size_t env_get_bootm_mapsize(void)
 {
-   phys_size_t tmp;
char *s = env_get("bootm_mapsize");
 
-   if (s) {
-   tmp = (phys_size_t)simple_strtoull(s, NULL, 16);
-   return tmp;
-   }
+   if (s)
+   return simple_strtoull(s, NULL, 16);
 
 #if defined(CFG_SYS_BOOTMAPSZ)
return CFG_SYS_BOOTMAPSZ;
-- 
2.43.0

[PATCH v4 3/6] boot: fdt: Fix tmp type in env_get_bootm_size() and rename to low

[Marek Vasut]

Change type of 'tmp' variable from phys_size_t to phys_addr_t and
rename it to 'low' to better describe what the variable represents,
which is either the bootm_low address from environment or start of
DRAM address.

Signed-off-by: Marek Vasut 
---
Cc: Heinrich Schuchardt 
Cc: Kuninori Morimoto 
Cc: Laurent Pinchart 
Cc: Simon Glass 
Cc: Tom Rini 
---
V4: New patch
---
 boot/image-board.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/boot/image-board.c b/boot/image-board.c
index e3d63745299..13876b79026 100644
--- a/boot/image-board.c
+++ b/boot/image-board.c
@@ -125,8 +125,8 @@ phys_addr_t env_get_bootm_low(void)
 
 phys_size_t env_get_bootm_size(void)
 {
-   phys_size_t tmp, size;
-   phys_addr_t start;
+   phys_addr_t start, low;
+   phys_size_t size;
char *s = env_get("bootm_size");
 
if (s)
@@ -140,11 +140,11 @@ phys_size_t env_get_bootm_size(void)
 
s = env_get("bootm_low");
if (s)
-   tmp = simple_strtoull(s, NULL, 16);
+   low = simple_strtoull(s, NULL, 16);
else
-   tmp = start;
+   low = start;
 
-   return size - (tmp - start);
+   return size - (low - start);
 }
 
 phys_size_t env_get_bootm_mapsize(void)
-- 
2.43.0

[PATCH v4 2/6] boot: fdt: Clean up env_get_bootm_size()

[Marek Vasut]

Reduce tmp variable use and remove unnecessary type cast in
env_get_bootm_size(). This aligns the env variable parsing
with env_get_bootm_low(). No functional change.

Signed-off-by: Marek Vasut 
---
Cc: Heinrich Schuchardt 
Cc: Kuninori Morimoto 
Cc: Laurent Pinchart 
Cc: Simon Glass 
Cc: Tom Rini 
---
V2: - New patch
V3: - Reword commit message
V4: No change
---
 boot/image-board.c | 8 +++-
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/boot/image-board.c b/boot/image-board.c
index 3263497a1d5..e3d63745299 100644
--- a/boot/image-board.c
+++ b/boot/image-board.c
@@ -129,10 +129,8 @@ phys_size_t env_get_bootm_size(void)
phys_addr_t start;
char *s = env_get("bootm_size");
 
-   if (s) {
-   tmp = (phys_size_t)simple_strtoull(s, NULL, 16);
-   return tmp;
-   }
+   if (s)
+   return simple_strtoull(s, NULL, 16);
 
start = gd->ram_base;
size = gd->ram_size;
@@ -142,7 +140,7 @@ phys_size_t env_get_bootm_size(void)
 
s = env_get("bootm_low");
if (s)
-   tmp = (phys_size_t)simple_strtoull(s, NULL, 16);
+   tmp = simple_strtoull(s, NULL, 16);
else
tmp = start;
 
-- 
2.43.0

[PATCH v4 1/6] boot: fdt: Change type of env_get_bootm_low() to phys_addr_t

[Marek Vasut]

Change type of ulong env_get_bootm_low() to phys_addr_t env_get_bootm_low().
The PPC/LS systems already treat env_get_bootm_low() result as phys_addr_t,
while the function itself still returns ulong. This is potentially dangerous
on 64bit systems, where ulong might not be large enough to hold the content
of "bootm_low" environment variable. Fix it by using phys_addr_t, similar to
what env_get_bootm_size() does, which returns phys_size_t .

Reviewed-by: Laurent Pinchart 
Reported-by: Laurent Pinchart 
Signed-off-by: Marek Vasut 
---
Cc: Heinrich Schuchardt 
Cc: Kuninori Morimoto 
Cc: Laurent Pinchart 
Cc: Simon Glass 
Cc: Tom Rini 
---
V2: - Drop now unnecessary conversion in boot_start_lmb()
  lmb_init_and_reserve_range()
- Drop tmp variable in env_get_bootm_low()
- Print initrd_high as u64/%llx
- Add RB from Laurent
V3: No change
V4: No change
---
 boot/bootm.c   |  4 ++--
 boot/image-board.c | 14 ++
 boot/image-fdt.c   |  9 +
 include/image.h|  2 +-
 4 files changed, 14 insertions(+), 15 deletions(-)

diff --git a/boot/bootm.c b/boot/bootm.c
index d071537d692..032f5a4a160 100644
--- a/boot/bootm.c
+++ b/boot/bootm.c
@@ -242,13 +242,13 @@ static int boot_get_kernel(const char *addr_fit, struct 
bootm_headers *images,
 #ifdef CONFIG_LMB
 static void boot_start_lmb(struct bootm_headers *images)
 {
-   ulong   mem_start;
+   phys_addr_t mem_start;
phys_size_t mem_size;
 
mem_start = env_get_bootm_low();
mem_size = env_get_bootm_size();
 
-   lmb_init_and_reserve_range(>lmb, (phys_addr_t)mem_start,
+   lmb_init_and_reserve_range(>lmb, mem_start,
   mem_size, NULL);
 }
 #else
diff --git a/boot/image-board.c b/boot/image-board.c
index 75f6906cd56..3263497a1d5 100644
--- a/boot/image-board.c
+++ b/boot/image-board.c
@@ -107,14 +107,12 @@ static int on_loadaddr(const char *name, const char 
*value, enum env_op op,
 }
 U_BOOT_ENV_CALLBACK(loadaddr, on_loadaddr);
 
-ulong env_get_bootm_low(void)
+phys_addr_t env_get_bootm_low(void)
 {
char *s = env_get("bootm_low");
 
-   if (s) {
-   ulong tmp = hextoul(s, NULL);
-   return tmp;
-   }
+   if (s)
+   return simple_strtoull(s, NULL, 16);
 
 #if defined(CFG_SYS_SDRAM_BASE)
return CFG_SYS_SDRAM_BASE;
@@ -538,7 +536,7 @@ int boot_ramdisk_high(struct lmb *lmb, ulong rd_data, ulong 
rd_len,
  ulong *initrd_start, ulong *initrd_end)
 {
char*s;
-   ulong   initrd_high;
+   phys_addr_t initrd_high;
int initrd_copy_to_ram = 1;
 
s = env_get("initrd_high");
@@ -553,8 +551,8 @@ int boot_ramdisk_high(struct lmb *lmb, ulong rd_data, ulong 
rd_len,
initrd_high = env_get_bootm_mapsize() + env_get_bootm_low();
}
 
-   debug("## initrd_high = 0x%08lx, copy_to_ram = %d\n",
- initrd_high, initrd_copy_to_ram);
+   debug("## initrd_high = 0x%llx, copy_to_ram = %d\n",
+ (u64)initrd_high, initrd_copy_to_ram);
 
if (rd_data) {
if (!initrd_copy_to_ram) {  /* zero-copy ramdisk support */
diff --git a/boot/image-fdt.c b/boot/image-fdt.c
index 5e4aa9de0d2..c2571b22244 100644
--- a/boot/image-fdt.c
+++ b/boot/image-fdt.c
@@ -160,9 +160,10 @@ int boot_relocate_fdt(struct lmb *lmb, char 
**of_flat_tree, ulong *of_size)
 {
void*fdt_blob = *of_flat_tree;
void*of_start = NULL;
-   u64 start, size, usable;
+   phys_addr_t start, size, usable;
char*fdt_high;
-   ulong   mapsize, low;
+   phys_addr_t low;
+   phys_size_t mapsize;
ulong   of_len = 0;
int bank;
int err;
@@ -217,7 +218,7 @@ int boot_relocate_fdt(struct lmb *lmb, char **of_flat_tree, 
ulong *of_size)
if (start + size < low)
continue;
 
-   usable = min(start + size, (u64)(low + mapsize));
+   usable = min(start + size, low + mapsize);
 
/*
 * At least part of this DRAM bank is usable, try
@@ -233,7 +234,7 @@ int boot_relocate_fdt(struct lmb *lmb, char **of_flat_tree, 
ulong *of_size)
 * Reduce the mapping size in the next bank
 * by the size of attempt in current bank.
 */
-   mapsize -= usable - max(start, (u64)low);
+   mapsize -= usable - max(start, low);
if (!mapsize)
break;
}
diff --git a/include/image.h b/include/image.h
index 21de70f0c9e..acffd17e0df 100644
--- a/include/image.h
+++ b/include/image.h
@@ -946,7 +946,7 @@ static inline void image_set_name(struct legacy_img_hdr 
*hdr, const char *name)
 int image_check_hcrc(const struct legacy_img_hdr *hdr);
 int image_check_dcrc(const 

Re: [PATCH v3 2/3] imx: imx93_evk: add rtc pcf2131

[Fabio Estevam]

On Tue, Mar 26, 2024 at 12:30 AM Joy Zou  wrote:

> + {
> +   #address-cells = <1>;
> +   #size-cells = <0>;
> +   clock-frequency = <40>;
> +   pinctrl-names = "default", "sleep";
> +   pinctrl-0 = <_lpi2c3>;
> +   pinctrl-1 = <_lpi2c3>;
> +   status = "okay";
> +
> +   pcf2131: rtc@53 {
> +   compatible = "nxp,pcf2131";
> +   reg = <0x53>;
> +   interrupt-parent = <>;
> +   interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
> +   status = "okay";

Please submit the RTC support to Linux first, then you can sync the
devicetree with Linux in U-Boot.

In the meantime, you can add the RTC support to the -u-boot.dtsi.

Please consider using OF_UPSTREAM available in the U-Boot next branch.

Re: [PATCH v3 3/3] configs: Enable RTC pcf2131 support

[Fabio Estevam]

On Tue, Mar 26, 2024 at 12:30 AM Joy Zou  wrote:
>
> Enable CONFIG_RTC_PCF2127 configs to support pcf2131.

Subject should  be imx93_11x11_evk specific:

imx93_11x11_evk: Add PCF2131 RTC support

Re: [PATCH v3 1/3] drivers: rtc: add pcf2131 rtc driver

[Fabio Estevam]

On Tue, Mar 26, 2024 at 12:30 AM Joy Zou  wrote:

> +bool is_pcf2131_type(struct udevice *dev)

static bool

>  static int pcf2127_rtc_read(struct udevice *dev, uint offset, u8 *buffer, 
> uint len)
>  {
> struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
> @@ -43,10 +75,64 @@ static int pcf2127_rtc_read(struct udevice *dev, uint 
> offset, u8 *buffer, uint l
> return dm_i2c_xfer(dev, , 1);
>  }
>
> +static int pcf2131_rtc_lock(struct udevice *dev)
> +{
> +   int ret = 0;

No need to initialize ret with 0.

> +static int pcf2131_rtc_unlock(struct udevice *dev)
> +{
> +   int ret = 0;

Ditto.

>  static int pcf2127_rtc_write(struct udevice *dev, uint offset,
>  const u8 *buffer, uint len)
>  {
> -   return dm_i2c_write(dev, offset, buffer, len);
> +   int ret = 0;

Ditto.

Re: [PATCH] am625x_evm_a53: Tweak boot command to set fdt

[Andrew Davis]

On 3/26/24 9:26 AM, Martyn Welch wrote:

With the current config for tha SK-AM62, fdtfile isn't set in the U-Boot
environment. When using bootflow to boot from a block device, where the
extlinux.conf file specifies `fdtdir`, a fallback device tree is being
constructed from the `soc` (`k3`) and `board` (`am62x`) environment
variables, resulting in u-Boot trying to retrieve
`/dtbs/6.8.1+/k3-am62x.dtb`. This file doesn't exist.

The environment variables `default_device_tree` and
`default_device_tree_arch` are set in the config, the `findfdt` script
can be called to construct `fdtfile` from the environment variables set
by these config options, however this script currently isn't being run.



I think this patch will be unneeded after this series goes in:

https://lore.kernel.org/u-boot/20240109191506.3820908-1...@ti.com/

Andrew


Calling this script results in the correct device tree being retrieved:

Retrieving file: /dtbs/6.8.1+/ti/k3-am625-sk.dtb

Many boards are calling this script as part of their boot command. The
am62x currently isn't. Rectify this so that booting works correctly.

Signed-off-by: Martyn Welch 
---
  configs/am62x_evm_a53_defconfig | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig
index 78287ec18a..e373e44a93 100644
--- a/configs/am62x_evm_a53_defconfig
+++ b/configs/am62x_evm_a53_defconfig
@@ -30,7 +30,7 @@ CONFIG_SPL_LOAD_FIT=y
  CONFIG_SPL_LOAD_FIT_ADDRESS=0x8100
  CONFIG_BOOTSTD_FULL=y
  CONFIG_SYS_BOOTM_LEN=0x80
-CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb"
+CONFIG_BOOTCOMMAND="run findfdt; run envboot; bootflow scan -lb"
  CONFIG_BOARD_LATE_INIT=y
  CONFIG_SPL_MAX_SIZE=0x58000
  CONFIG_SPL_HAS_BSS_LINKER_SECTION=y

[PATCH] configs: imx8mp_beacon: Enable PCIe NVMe drives

[Adam Ford]

The baseboard supports and NVMe drives via the PCIe slot. This
requires a few extra config options to be enabled.

The NVMe can be enumerated with the following commands:

u-boot=> pci enum
PCIE-0: Link up (Gen1-x1, Bus0)
u-boot=> nvme scan
u-boot=> nvme info
Device 0: Vendor: 0x15b7 Rev: 20120022 Prod: 184960441105
Type: Hard Disk
Capacity: 122104.3 MB = 119.2 GB (250069680 x 512)
u-boot=>

Signed-off-by: Adam Ford 
---
Depends on: 
https://patchwork.ozlabs.org/project/uboot/patch/20240326202439.46707-4-aford...@gmail.com/

diff --git a/configs/imx8mp_beacon_defconfig b/configs/imx8mp_beacon_defconfig
index 0ae8c9645a..fe1678d8ae 100644
--- a/configs/imx8mp_beacon_defconfig
+++ b/configs/imx8mp_beacon_defconfig
@@ -15,6 +15,7 @@ CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-beacon-kit"
 CONFIG_SPL_TEXT_BASE=0x92
 CONFIG_TARGET_IMX8MP_BEACON=y
+CONFIG_DM_RESET=y
 CONFIG_SYS_MONITOR_LEN=524288
 CONFIG_SPL_MMC=y
 CONFIG_SPL_SERIAL=y
@@ -27,6 +28,7 @@ CONFIG_ARMV8_SET_SMPEN=y
 CONFIG_ARMV8_EA_EL3_FIRST=y
 CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x4800
 CONFIG_SYS_LOAD_ADDR=0x4048
+CONFIG_PCI=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
 CONFIG_FIT_EXTERNAL_OFFSET=0x3000
@@ -65,6 +67,7 @@ CONFIG_CMD_FUSE=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_SDP=y
 CONFIG_CMD_USB_MASS_STORAGE=y
@@ -118,8 +121,11 @@ CONFIG_DWC_ETH_QOS_IMX=y
 CONFIG_FEC_MXC=y
 CONFIG_RGMII=y
 CONFIG_MII=y
+CONFIG_NVME_PCI=y
+CONFIG_PCIE_DW_IMX=y
 CONFIG_PHY=y
 CONFIG_PHY_IMX8MQ_USB=y
+CONFIG_PHY_IMX8M_PCIE=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_IMX8M=y
-- 
2.43.0

query on CONFIG_EXTRA_ENV_SETTINGS and boot different images

[SIMON BABY]

Hello ,
I am new to this email group.

my requirement is below:

1) I will have two linux kernel images, imageA and imageB

2) image A and image B can be on the same medium (different partition) or
different medium.

3) If there is any issue with imageA it should boot from imageB and vice
versa.

4) I would like to know what changes are required in u-boot and kernel for
achieving this.


Regards

Simon

[PATCH 2/2] rockchip: rk3588: Add Support for RAM Defines from ATAGs

[Chris Morgan]

From: Chris Morgan 

Add support for defining the usable RAM from ATAGs provided by the
Rockchip binary TPL loader. This allows us to automatically account
for necessary memory holes on RK3588 devices with 16GB of RAM or
more, as well as ensure we can use the full amount of RAM available.

In the event we can't cleanly read the ATAG values from RAM or are
not running an RK3588 board, simply fall back to the old method of
detecting the RAM.

Tested on Indiedroid Nova with 4GB and 16GB of RAM.

Signed-off-by: Chris Morgan 
---
 arch/arm/mach-rockchip/sdram.c | 58 ++
 1 file changed, 58 insertions(+)

diff --git a/arch/arm/mach-rockchip/sdram.c b/arch/arm/mach-rockchip/sdram.c
index 0d9a0aef6f..58b78466b0 100644
--- a/arch/arm/mach-rockchip/sdram.c
+++ b/arch/arm/mach-rockchip/sdram.c
@@ -10,6 +10,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -35,12 +36,69 @@ struct tos_parameter_t {
s64 reserve[8];
 };
 
+/*
+ * Read the ATAGs to identify all the memory banks. If we can't do it
+ * cleanly return 1 to note an unsuccessful attempt, otherwise return
+ * 0 for a successful attempt.
+ */
+int rockchip_atag_ram_banks(void)
+{
+   struct tag *t;
+   int bank_cnt;
+   size_t tmp;
+
+   if (!CONFIG_IS_ENABLED(ARM64) && !CONFIG_IS_ENABLED(ROCKCHIP_RK3588))
+   return 1;
+
+   t = atags_get_tag(ATAG_DDR_MEM);
+   if (!t)
+   return 1;
+
+   bank_cnt = t->u.ddr_mem.count;
+
+   /*
+* Check to make sure the first bank ends at 0xf000, if it
+* does not fall back to the other methods of RAM bank
+* detection.
+*/
+   if (t->u.ddr_mem.bank[t->u.ddr_mem.count] != 0xf000)
+   return 1;
+
+   /*
+* Iterate over the RAM banks. If the start address of bank 0
+* is less than or equal to 0x20, set it to 0x20 to
+* reserve room for A-TF. Make sure the size of bank 0 doesn't
+* bleed into the address space for hardware (starting at
+* 0xf000). Banks 1 and on can be defined as-is.
+*/
+   for (int i = 0; i < (t->u.ddr_mem.count); i++) {
+   if (i == 0) {
+   if (t->u.ddr_mem.bank[i] <= 0x20)
+   gd->bd->bi_dram[i].start = 0x20;
+   else
+   gd->bd->bi_dram[i].start = t->u.ddr_mem.bank[i];
+   tmp = gd->bd->bi_dram[i].start + 
t->u.ddr_mem.bank[(bank_cnt + i)];
+   if (tmp > 0xf000)
+   gd->bd->bi_dram[i].size = 0xf000 - 
gd->bd->bi_dram[i].start;
+   else
+   gd->bd->bi_dram[i].size = 
t->u.ddr_mem.bank[(bank_cnt + i)];
+   } else {
+   gd->bd->bi_dram[i].start = t->u.ddr_mem.bank[i];
+   gd->bd->bi_dram[i].size = t->u.ddr_mem.bank[(bank_cnt + 
i)];
+   }
+   };
+
+   return 0;
+}
+
 int dram_init_banksize(void)
 {
size_t ram_top = (unsigned long)(gd->ram_size + CFG_SYS_SDRAM_BASE);
size_t top = min((unsigned long)ram_top, (unsigned long)(gd->ram_top));
 
 #ifdef CONFIG_ARM64
+   if (!rockchip_atag_ram_banks())
+   return 0;
/* Reserve 0x20 for ATF bl31 */
gd->bd->bi_dram[0].start = 0x20;
gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
-- 
2.34.1

[PATCH 1/2] rockchip: rk3588: Add support for ATAG parsing

[Chris Morgan]

From: Chris Morgan 

Add support for parsing the ATAGs created by the Rockchip binary
RAM init. This ATAG parsing code was taken from the Rockchip BSP
U-Boot source and tested only on parsing the RAM specific ATAGs
for the RK3588.

Signed-off-by: Chris Morgan 
---
 arch/arm/include/asm/arch-rockchip/atags.h | 222 +
 arch/arm/mach-rockchip/Makefile|   1 +
 arch/arm/mach-rockchip/atags.c |  99 +
 3 files changed, 322 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-rockchip/atags.h
 create mode 100644 arch/arm/mach-rockchip/atags.c

diff --git a/arch/arm/include/asm/arch-rockchip/atags.h 
b/arch/arm/include/asm/arch-rockchip/atags.h
new file mode 100644
index 00..9bae66d7f8
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/atags.h
@@ -0,0 +1,222 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ */
+
+#ifndef __RK_ATAGS_H_
+#define __RK_ATAGS_H_
+
+/* Tag magic */
+#define ATAG_CORE  0x54410001
+#define ATAG_NONE  0x
+
+#define ATAG_SERIAL0x54410050
+#define ATAG_BOOTDEV   0x54410051
+#define ATAG_DDR_MEM   0x54410052
+#define ATAG_TOS_MEM   0x54410053
+#define ATAG_RAM_PARTITION 0x54410054
+#define ATAG_ATF_MEM   0x54410055
+#define ATAG_PUB_KEY   0x54410056
+#define ATAG_SOC_INFO  0x54410057
+#define ATAG_BOOT1_PARAM   0x54410058
+#define ATAG_PSTORE0x54410059
+#define ATAG_FWVER 0x5441005a
+#define ATAG_MAX   0x544100ff
+
+/* Tag size and offset */
+#define ATAGS_SIZE (0x2000)/* 8K */
+#define ATAGS_OFFSET   (0x20 - ATAGS_SIZE)/* [2M-8K, 2M] */
+#define ATAGS_PHYS_BASE(CFG_SYS_SDRAM_BASE + ATAGS_OFFSET)
+
+/* tag_fwver.ver[fwid][] */
+#define FWVER_LEN  36
+
+enum fwid {
+   FW_DDR,
+   FW_SPL,
+   FW_ATF,
+   FW_TEE,
+   FW_MAX,
+};
+
+struct tag_serial {
+   u32 version;
+   u32 enable;
+   u64 addr;
+   u32 baudrate;
+   u32 m_mode;
+   u32 id;
+   u32 reserved[2];
+   u32 hash;
+} __packed;
+
+struct tag_bootdev {
+   u32 version;
+   u32 devtype;
+   u32 devnum;
+   u32 mode;
+   u32 sdupdate;
+   u32 reserved[6];
+   u32 hash;
+} __packed;
+
+struct tag_ddr_mem {
+   u32 count;
+   u32 version;
+   u64 bank[20];
+   u32 flags;
+   u32 data[2];
+   u32 hash;
+} __packed;
+
+struct tag_tos_mem {
+   u32 version;
+   struct {
+   char name[8];
+   u64 phy_addr;
+   u32 size;
+   u32 flags;
+   } tee_mem;
+
+   struct {
+   char name[8];
+   u64 phy_addr;
+   u32 size;
+   u32 flags;
+   } drm_mem;
+
+   u64 reserved[7];
+   u32 reserved1;
+   u32 hash;
+} __packed;
+
+struct tag_atf_mem {
+   u32 version;
+   u64 phy_addr;
+   u32 size;
+   u32 flags;
+   u32 reserved[2];
+   u32 hash;
+} __packed;
+
+struct tag_pub_key {
+   u32 version;
+   u32 len;
+   u8  data[768];  /* u32 rsa_n[64], rsa_e[64], rsa_c[64] */
+   u32 flag;
+   u32 reserved[5];
+   u32 hash;
+} __packed;
+
+struct tag_ram_partition {
+   u32 version;
+   u32 count;
+   u32 reserved[4];
+
+   struct {
+   char name[16];
+   u64 start;
+   u64 size;
+   } part[6];
+
+   u32 reserved1[3];
+   u32 hash;
+} __packed;
+
+struct tag_soc_info {
+   u32 version;
+   u32 name;   /* Hex: 0x3288, 0x3399... */
+   u32 flags;
+   u32 reserved[6];
+   u32 hash;
+} __packed;
+
+struct tag_boot1p {
+   u32 version;
+   u32 param[8];
+   u32 reserved[4];
+   u32 hash;
+} __packed;
+
+struct tag_pstore {
+   u32 version;
+   struct {
+   u32 addr;
+   u32 size;
+   } buf[16];
+   u32 hash;
+} __packed;
+
+struct tag_fwver {
+   u32 version;
+   char ver[8][FWVER_LEN];
+   u32 hash;
+} __packed;
+
+struct tag_core {
+   u32 flags;
+   u32 pagesize;
+   u32 rootdev;
+} __packed;
+
+struct tag_header {
+   u32 size;   /* bytes = size * 4 */
+   u32 magic;
+} __packed;
+
+/* Must be 4 bytes align */
+struct tag {
+   struct tag_header hdr;
+   union {
+   struct tag_core core;
+   struct tag_serial   serial;
+   struct tag_bootdev  bootdev;
+   struct tag_ddr_mem  ddr_mem;
+   struct tag_tos_mem  tos_mem;
+   struct tag_ram_partition ram_part;
+   struct tag_atf_mem  atf_mem;
+   struct tag_pub_key  pub_key;
+   struct tag_soc_info soc;
+   struct tag_boot1p   boot1p;
+   struct tag_pstore   

[PATCH 0/2] Use ATAGs for RK3588 For RAM Info

[Chris Morgan]

From: Chris Morgan 

Use the ATAG info provided by the Rockchip binary TPL to identify
RAM banks.

This is needed because there are specific addresses that should not
be written to for all RK3588 based devices with >=16GB of RAM, writing
to these addresses immediately results in a crash.

Chris Morgan (2):
  rockchip: rk3588: Add support for ATAG parsing
  rockchip: rk3588: Add Support for RAM Defines from ATAGs

 arch/arm/include/asm/arch-rockchip/atags.h | 222 +
 arch/arm/mach-rockchip/Makefile|   1 +
 arch/arm/mach-rockchip/atags.c |  99 +
 arch/arm/mach-rockchip/sdram.c |  58 ++
 4 files changed, 380 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-rockchip/atags.h
 create mode 100644 arch/arm/mach-rockchip/atags.c

-- 
2.34.1

[PATCH 7/7] arm: davinci: Migrate da850-evm to OF_UPSTREAM

[Adam Ford]

The da850-evm can remove the U-Boot device trees if migrated
to OF_UPSTREAM.  This means pointing the device trees to the
ti/davinci directory.

Signed-off-by: Adam Ford 

diff --git a/arch/arm/dts/da850-evm.dts b/arch/arm/dts/da850-evm.dts
deleted file mode 100644
index 378af9f344..00
--- a/arch/arm/dts/da850-evm.dts
+++ /dev/null
@@ -1,453 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Device Tree for DA850 EVM board
- *
- * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
- */
-/dts-v1/;
-#include "da850.dtsi"
-#include 
-
-/ {
-   compatible = "ti,da850-evm", "ti,da850";
-   model = "DA850/AM1808/OMAP-L138 EVM";
-
-   chosen {
-   stdout-path = 
-   };
-
-   aliases {
-   serial0 = 
-   serial1 = 
-   serial2 = 
-   ethernet0 = 
-   spi0 = 
-   };
-
-   backlight: backlight-pwm {
-   pinctrl-names = "default";
-   pinctrl-0 = <_pins>;
-   power-supply = <_lcd>;
-   compatible = "pwm-backlight";
-   /*
-* The PWM here corresponds to production hardware. The
-* schematic needs to be 1015171 (15 March 2010), Rev A
-* or newer.
-*/
-   pwms = < 0 5 0>;
-   brightness-levels = <0 10 20 30 40 50 60 70 80 90 99>;
-   default-brightness-level = <7>;
-   };
-
-   panel {
-   compatible = "ti,tilcdc,panel";
-   pinctrl-names = "default";
-   pinctrl-0 = <_pins>;
-   /*
-* The vpif and the LCD are mutually exclusive.
-* To enable VPIF, change the status below to 'disabled' then
-* then change the status of the vpif below to 'okay'
-*/
-   status = "okay";
-   enable-gpios = < 40 GPIO_ACTIVE_HIGH>; /* lcd_panel_pwr */
-
-   panel-info {
-   ac-bias = <255>;
-   ac-bias-intrpt = <0>;
-   dma-burst-sz = <16>;
-   bpp = <16>;
-   fdd = <0x80>;
-   sync-edge = <0>;
-   sync-ctrl = <1>;
-   raster-order = <0>;
-   fifo-th = <0>;
-   };
-
-   display-timings {
-   native-mode = <>;
-   timing0: 480x272 {
-   clock-frequency = <900>;
-   hactive = <480>;
-   vactive = <272>;
-   hfront-porch = <3>;
-   hback-porch = <2>;
-   hsync-len = <42>;
-   vback-porch = <3>;
-   vfront-porch = <4>;
-   vsync-len = <11>;
-   hsync-active = <0>;
-   vsync-active = <0>;
-   de-active = <1>;
-   pixelclk-active = <1>;
-   };
-   };
-   };
-
-   vbat: fixedregulator0 {
-   compatible = "regulator-fixed";
-   regulator-name = "vbat";
-   regulator-min-microvolt = <500>;
-   regulator-max-microvolt = <500>;
-   regulator-boot-on;
-   };
-
-   baseboard_3v3: fixedregulator-3v3 {
-   /* TPS73701DCQ */
-   compatible = "regulator-fixed";
-   regulator-name = "baseboard_3v3";
-   regulator-min-microvolt = <330>;
-   regulator-max-microvolt = <330>;
-   vin-supply = <>;
-   regulator-always-on;
-   regulator-boot-on;
-   };
-
-   baseboard_1v8: fixedregulator-1v8 {
-   /* TPS73701DCQ */
-   compatible = "regulator-fixed";
-   regulator-name = "baseboard_1v8";
-   regulator-min-microvolt = <180>;
-   regulator-max-microvolt = <180>;
-   vin-supply = <>;
-   regulator-always-on;
-   regulator-boot-on;
-   };
-
-   backlight_lcd: backlight-regulator {
-   compatible = "regulator-fixed";
-   regulator-name = "lcd_backlight_pwr";
-   regulator-min-microvolt = <330>;
-   regulator-max-microvolt = <330>;
-   gpio = < 47 GPIO_ACTIVE_HIGH>; /* lcd_backlight_pwr */
-   enable-active-high;
-   };
-
-   sound {
-   compatible = "simple-audio-card";
-   simple-audio-card,name = "DA850-OMAPL138 EVM";
-   simple-audio-card,widgets =
-   "Line", "Line In",
-   "Line", "Line Out";
-   

[PATCH 6/7] arm64: imx: imx8mn-beacon: Migrate to OF_UPSTREAM

[Adam Ford]

The imx8mn-beacon boards can migrate to OF_UPSTREAM which also
allows for the removal the device tree files.

Signed-off-by: Adam Ford 

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 443d651827..6ddd6e311e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1091,7 +1091,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mn-evk.dtb \
imx8mn-var-som-symphony.dtb \
imx8mq-evk.dtb \
-   imx8mn-beacon-kit.dtb \
imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
imx8mp-data-modul-edm-sbc.dtb \
diff --git a/arch/arm/dts/imx8mn-beacon-kit.dts 
b/arch/arm/dts/imx8mn-beacon-kit.dts
deleted file mode 100644
index 1392ce0258..00
--- a/arch/arm/dts/imx8mn-beacon-kit.dts
+++ /dev/null
@@ -1,19 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright 2020 Compass Electronics Group, LLC
- */
-
-/dts-v1/;
-
-#include "imx8mn.dtsi"
-#include "imx8mn-beacon-som.dtsi"
-#include "imx8mn-beacon-baseboard.dtsi"
-
-/ {
-   model = "Beacon EmbeddedWorks i.MX8M Nano Development Kit";
-   compatible = "beacon,imx8mn-beacon-kit", "fsl,imx8mn";
-
-   chosen {
-   stdout-path = 
-   };
-};
diff --git a/arch/arm/dts/imx8mn-beacon-som.dtsi 
b/arch/arm/dts/imx8mn-beacon-som.dtsi
deleted file mode 100644
index 1133cded9b..00
--- a/arch/arm/dts/imx8mn-beacon-som.dtsi
+++ /dev/null
@@ -1,472 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright 2020 Compass Electronics Group, LLC
- */
-
-/ {
-   aliases {
-   rtc0 = 
-   rtc1 = _rtc;
-   spi0 = 
-   };
-
-   usdhc1_pwrseq: usdhc1_pwrseq {
-   compatible = "mmc-pwrseq-simple";
-   pinctrl-names = "default";
-   pinctrl-0 = <_usdhc1_gpio>;
-   reset-gpios = < 10 GPIO_ACTIVE_LOW>;
-   clocks = <_32k>;
-   clock-names = "ext_clock";
-   post-power-on-delay-ms = <80>;
-   };
-
-   memory@4000 {
-   device_type = "memory";
-   reg = <0x0 0x4000 0 0x8000>;
-   };
-};
-
-_0 {
-   cpu-supply = <_reg>;
-};
-
-_1 {
-   cpu-supply = <_reg>;
-};
-
-_2 {
-   cpu-supply = <_reg>;
-};
-
-_3 {
-   cpu-supply = <_reg>;
-};
-
-/* DDR controller is running LPDDR at 800MHz which requires 0.95V */
-_opp_table {
-   opp-12 {
-   opp-microvolt = <95>;
-   };
-};
-
- {
-   operating-points-v2 = <_opp_table>;
-
-   ddrc_opp_table: opp-table {
-   compatible = "operating-points-v2";
-
-   opp-25M {
-   opp-hz = /bits/ 64 <2500>;
-   };
-
-   opp-100M {
-   opp-hz = /bits/ 64 <1>;
-   };
-
-   opp-800M {
-   opp-hz = /bits/ 64 <8>;
-   };
-   };
-};
-
- {
-   pinctrl-names = "default";
-   pinctrl-0 = <_fec1>;
-   phy-mode = "rgmii-id";
-   phy-handle = <>;
-   phy-supply = <_reg>;
-   phy-reset-gpios = < 22 GPIO_ACTIVE_LOW>;
-   fsl,magic-packet;
-   status = "okay";
-
-   mdio {
-   #address-cells = <1>;
-   #size-cells = <0>;
-
-   ethphy0: ethernet-phy@0 {
-   compatible = "ethernet-phy-ieee802.3-c22";
-   reg = <0>;
-   };
-   };
-};
-
- {
-   pinctrl-names = "default";
-   pinctrl-0 = <_flexspi>;
-   status = "okay";
-
-   flash@0 {
-   reg = <0>;
-   #address-cells = <1>;
-   #size-cells = <1>;
-   compatible = "jedec,spi-nor";
-   spi-max-frequency = <8000>;
-   spi-tx-bus-width = <1>;
-   spi-rx-bus-width = <4>;
-   };
-};
-
- {
-   clock-frequency = <40>;
-   pinctrl-names = "default";
-   pinctrl-0 = <_i2c1>;
-   status = "okay";
-
-   pmic@4b {
-   compatible = "rohm,bd71847";
-   reg = <0x4b>;
-   pinctrl-names = "default";
-   pinctrl-0 = <_pmic>;
-   interrupt-parent = <>;
-   interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
-   rohm,reset-snvs-powered;
-   #clock-cells = <0>;
-   clocks = <_32k 0>;
-   clock-output-names = "clk-32k-out";
-
-   regulators {
-   buck1_reg: BUCK1 {
-   regulator-name = "buck1";
-   regulator-min-microvolt = <70>;
-   regulator-max-microvolt = <130>;
-   regulator-boot-on;
-   regulator-always-on;
-   regulator-ramp-delay = <1250>;
-   };
-
-   buck2_reg: BUCK2 {
-   regulator-name = "buck2";
-

[PATCH 5/7] arm64: imx: imx8mm-beacon: Migrate to OF_UPSTREAM

[Adam Ford]

The imx8mm-beacon boards can migrate to OF_UPSTREAM which also
allows for the removal the device tree files.

Signed-off-by: Adam Ford 

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 04ffa1f165..443d651827 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1091,7 +1091,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mn-evk.dtb \
imx8mn-var-som-symphony.dtb \
imx8mq-evk.dtb \
-   imx8mm-beacon-kit.dtb \
imx8mn-beacon-kit.dtb \
imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
diff --git a/arch/arm/dts/imx8mm-beacon-kit.dts 
b/arch/arm/dts/imx8mm-beacon-kit.dts
deleted file mode 100644
index 74a7b0cc10..00
--- a/arch/arm/dts/imx8mm-beacon-kit.dts
+++ /dev/null
@@ -1,19 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright 2020 Compass Electronics Group, LLC
- */
-
-/dts-v1/;
-
-#include "imx8mm.dtsi"
-#include "imx8mm-beacon-som.dtsi"
-#include "imx8mm-beacon-baseboard.dtsi"
-
-/ {
-   model = "Beacon EmbeddedWorks i.MX8M Mini Development Kit";
-   compatible = "beacon,imx8mm-beacon-kit", "fsl,imx8mm";
-
-   chosen {
-   stdout-path = 
-   };
-};
diff --git a/arch/arm/dts/imx8mm-beacon-som.dtsi 
b/arch/arm/dts/imx8mm-beacon-som.dtsi
deleted file mode 100644
index cf07987ccc..00
--- a/arch/arm/dts/imx8mm-beacon-som.dtsi
+++ /dev/null
@@ -1,461 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright 2020 Compass Electronics Group, LLC
- */
-
-/ {
-   aliases {
-   rtc0 = 
-   rtc1 = _rtc;
-   };
-
-   usdhc1_pwrseq: usdhc1_pwrseq {
-   compatible = "mmc-pwrseq-simple";
-   pinctrl-names = "default";
-   pinctrl-0 = <_usdhc1_gpio>;
-   reset-gpios = < 10 GPIO_ACTIVE_LOW>;
-   clocks = <_32k>;
-   clock-names = "ext_clock";
-   post-power-on-delay-ms = <80>;
-   };
-
-   memory@4000 {
-   device_type = "memory";
-   reg = <0x0 0x4000 0 0x8000>;
-   };
-};
-
-_0 {
-   cpu-supply = <_reg>;
-};
-
-_1 {
-   cpu-supply = <_reg>;
-};
-
-_2 {
-   cpu-supply = <_reg>;
-};
-
-_3 {
-   cpu-supply = <_reg>;
-};
-
- {
-   operating-points-v2 = <_opp_table>;
-
-   ddrc_opp_table: opp-table {
-   compatible = "operating-points-v2";
-
-   opp-25M {
-   opp-hz = /bits/ 64 <2500>;
-   };
-
-   opp-100M {
-   opp-hz = /bits/ 64 <1>;
-   };
-
-   opp-750M {
-   opp-hz = /bits/ 64 <75000>;
-   };
-   };
-};
-
- {
-   pinctrl-names = "default";
-   pinctrl-0 = <_fec1>;
-   phy-mode = "rgmii-id";
-   phy-handle = <>;
-   fsl,magic-packet;
-   status = "okay";
-
-   mdio {
-   #address-cells = <1>;
-   #size-cells = <0>;
-
-   ethphy0: ethernet-phy@0 {
-   compatible = "ethernet-phy-ieee802.3-c22";
-   reg = <0>;
-   };
-   };
-};
-
- {
-   pinctrl-names = "default";
-   pinctrl-0 = <_flexspi>;
-   status = "okay";
-
-   flash@0 {
-   reg = <0>;
-   #address-cells = <1>;
-   #size-cells = <1>;
-   compatible = "jedec,spi-nor";
-   spi-max-frequency = <8000>;
-   spi-tx-bus-width = <1>;
-   spi-rx-bus-width = <4>;
-   };
-};
-
- {
-   clock-frequency = <40>;
-   pinctrl-names = "default";
-   pinctrl-0 = <_i2c1>;
-   status = "okay";
-
-   pmic@4b {
-   compatible = "rohm,bd71847";
-   reg = <0x4b>;
-   pinctrl-names = "default";
-   pinctrl-0 = <_pmic>;
-   interrupt-parent = <>;
-   interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
-   rohm,reset-snvs-powered;
-
-   #clock-cells = <0>;
-   clocks = <_32k 0>;
-   clock-output-names = "clk-32k-out";
-
-   regulators {
-   buck1_reg: BUCK1 {
-   regulator-name = "buck1";
-   regulator-min-microvolt = <70>;
-   regulator-max-microvolt = <130>;
-   regulator-boot-on;
-   regulator-always-on;
-   regulator-ramp-delay = <1250>;
-   };
-
-   buck2_reg: BUCK2 {
-   regulator-name = "buck2";
-   regulator-min-microvolt = <70>;
-   regulator-max-microvolt = <130>;
-   regulator-boot-on;
-   regulator-always-on;
-   

[PATCH 4/7] arm64: imx: imx8mp-beacon: Migrate to OF_UPSTREAM

[Adam Ford]

The imx8mp-beacon boards can migrate to OF_UPSTREAM which also
allows for the removal the device tree files.

Signed-off-by: Adam Ford 

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d85a33055c..04ffa1f165 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1095,7 +1095,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mn-beacon-kit.dtb \
imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
-   imx8mp-beacon-kit.dtb \
imx8mp-data-modul-edm-sbc.dtb \
imx8mp-dhcom-som-overlay-rev100.dtbo \
imx8mp-dhcom-som-overlay-eth1xfast.dtbo \
diff --git a/arch/arm/dts/imx8mp-beacon-kit.dts 
b/arch/arm/dts/imx8mp-beacon-kit.dts
deleted file mode 100644
index a08057410b..00
--- a/arch/arm/dts/imx8mp-beacon-kit.dts
+++ /dev/null
@@ -1,783 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2023 Logic PD, Inc dba Beacon EmbeddedWorks
- */
-
-/dts-v1/;
-
-#include 
-#include 
-#include "imx8mp.dtsi"
-#include "imx8mp-beacon-som.dtsi"
-
-/ {
-   model = "Beacon EmbeddedWorks i.MX8MPlus Development kit";
-   compatible = "beacon,imx8mp-beacon-kit", "fsl,imx8mp";
-
-   aliases {
-   ethernet0 = 
-   ethernet1 = 
-   };
-
-   chosen {
-   stdout-path = 
-   };
-
-   clk_xtal25: clock-xtal25 {
-   compatible = "fixed-clock";
-   #clock-cells = <0>;
-   clock-frequency = <2500>;
-   };
-
-   connector {
-   compatible = "usb-c-connector";
-   label = "USB-C";
-   data-role = "dual";
-
-   ports {
-   #address-cells = <1>;
-   #size-cells = <0>;
-
-   port@0 {
-   reg = <0>;
-
-   hs_ep: endpoint {
-   remote-endpoint = <_hs_ep>;
-   };
-   };
-   port@1 {
-   reg = <1>;
-
-   ss_ep: endpoint {
-   remote-endpoint = <_in_ep>;
-   };
-   };
-   };
-   };
-
-   dmic_codec: dmic-codec {
-   compatible = "dmic-codec";
-   num-channels = <1>;
-   #sound-dai-cells = <0>;
-   };
-
-   gpio-keys {
-   compatible = "gpio-keys";
-   autorepeat;
-
-   button-0 {
-   label = "btn0";
-   linux,code = ;
-   gpios = <_1 12 (GPIO_ACTIVE_LOW | 
GPIO_PULL_UP)>;
-   wakeup-source;
-   };
-
-   button-1 {
-   label = "btn1";
-   linux,code = ;
-   gpios = <_1 13 (GPIO_ACTIVE_LOW | 
GPIO_PULL_UP)>;
-   wakeup-source;
-   };
-
-   button-2 {
-   label = "btn2";
-   linux,code = ;
-   gpios = <_1 14 (GPIO_ACTIVE_LOW | 
GPIO_PULL_UP)>;
-   wakeup-source;
-   };
-
-   button-3 {
-   label = "btn3";
-   linux,code = ;
-   gpios = <_1 15 (GPIO_ACTIVE_LOW | 
GPIO_PULL_UP)>;
-   wakeup-source;
-   };
-   };
-
-   bridge-connector {
-   compatible = "hdmi-connector";
-   type = "a";
-
-   port {
-   hdmi_con: endpoint {
-   remote-endpoint = <_out>;
-   };
-   };
-   };
-
-   leds {
-   compatible = "gpio-leds";
-   pinctrl-names = "default";
-   pinctrl-0 = <_led3>;
-
-   led-0 {
-   label = "gen_led0";
-   gpios = <_1 4 GPIO_ACTIVE_HIGH>;
-   default-state = "off";
-   };
-
-   led-1 {
-   label = "gen_led1";
-   gpios = <_1 5 GPIO_ACTIVE_HIGH>;
-   default-state = "off";
-   };
-
-   led-2 {
-   label = "gen_led2";
-   gpios = <_1 6 GPIO_ACTIVE_HIGH>;
-   default-state = "off";
-   };
-
-   led-3 {
-   label = "heartbeat";
-   gpios = < 28 GPIO_ACTIVE_HIGH>;
-   linux,default-trigger = "heartbeat";
-   };
-   };
-
-   reg_audio: regulator-wm8962 {
-   compatible = "regulator-fixed";
-   regulator-name = "3v3_aud";
-   regulator-min-microvolt = <330>;
-   regulator-max-microvolt = <330>;
- 

[PATCH 3/7] arm: ti: logicpd-som-lv: Migrate to OF_UPSTREAM

[Adam Ford]

The DM37 and OMAP35 SOM-LV share a few files, but both of them
can be migrated to OF_UPSTREAM with a small update to their
respective u-boot.dtsi files to address changes made the aliases.
Both defconfigs need to properly point to the upstream directory
structure for the device trees.  With those updated, the U-Boot
device tree files can be deleted.

Signed-off-by: Adam Ford 

diff --git a/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi 
b/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi
index 6f11852a33..d77fa38746 100644
--- a/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi
+++ b/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi
@@ -14,6 +14,8 @@
aliases {
/delete-property/ serial1;
/delete-property/ serial2;
+   /delete-property/ mmc1;
+   /delete-property/ mmc2;
};
 
ethernet@0800 {
diff --git a/arch/arm/dts/logicpd-som-lv-35xx-devkit.dts 
b/arch/arm/dts/logicpd-som-lv-35xx-devkit.dts
deleted file mode 100644
index f690bc83bf..00
--- a/arch/arm/dts/logicpd-som-lv-35xx-devkit.dts
+++ /dev/null
@@ -1,27 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-/dts-v1/;
-
-#include "omap34xx.dtsi"
-#include "logicpd-som-lv.dtsi"
-#include "logicpd-som-lv-baseboard.dtsi"
-#include "omap-gpmc-smsc9221.dtsi"
-
-/ {
-   model = "LogicPD Zoom OMAP35xx SOM-LV Development Kit";
-   compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3430", "ti,omap3";
-};
-
-_pmx_core2 {
-
-   hsusb2_2_pins: pinmux_hsusb2_2_pins {
-   pinctrl-single,pins = <
-   OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)
/* etk_d10.hsusb2_clk */
-   OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)
/* etk_d11.hsusb2_stp */
-   OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | 
MUX_MODE3)/* etk_d12.hsusb2_dir */
-   OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | 
MUX_MODE3)/* etk_d13.hsusb2_nxt */
-   OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | 
MUX_MODE3)/* etk_d14.hsusb2_data0 */
-   OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | 
MUX_MODE3)/* etk_d15.hsusb2_data1 */
-   >;
-   };
-};
diff --git a/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi 
b/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi
index 6f11852a33..d77fa38746 100644
--- a/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi
+++ b/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi
@@ -14,6 +14,8 @@
aliases {
/delete-property/ serial1;
/delete-property/ serial2;
+   /delete-property/ mmc1;
+   /delete-property/ mmc2;
};
 
ethernet@0800 {
diff --git a/arch/arm/dts/logicpd-som-lv-37xx-devkit.dts 
b/arch/arm/dts/logicpd-som-lv-37xx-devkit.dts
deleted file mode 100644
index e28e9625be..00
--- a/arch/arm/dts/logicpd-som-lv-37xx-devkit.dts
+++ /dev/null
@@ -1,27 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-/dts-v1/;
-
-#include "omap36xx.dtsi"
-#include "logicpd-som-lv.dtsi"
-#include "logicpd-som-lv-baseboard.dtsi"
-#include "omap-gpmc-smsc9221.dtsi"
-
-/ {
-   model = "LogicPD Zoom DM3730 SOM-LV Development Kit";
-   compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3630", "ti,omap3";
-};
-
-_pmx_core2 {
-
-   hsusb2_2_pins: pinmux_hsusb2_2_pins {
-   pinctrl-single,pins = <
-   OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)
/* etk_d10.hsusb2_clk */
-   OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)
/* etk_d11.hsusb2_stp */
-   OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | 
MUX_MODE3)/* etk_d12.hsusb2_dir */
-   OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | 
MUX_MODE3)/* etk_d13.hsusb2_nxt */
-   OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | 
MUX_MODE3)/* etk_d14.hsusb2_data0 */
-   OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | 
MUX_MODE3)/* etk_d15.hsusb2_data1 */
-   >;
-   };
-};
diff --git a/arch/arm/dts/logicpd-som-lv-baseboard.dtsi 
b/arch/arm/dts/logicpd-som-lv-baseboard.dtsi
deleted file mode 100644
index 7d0468a237..00
--- a/arch/arm/dts/logicpd-som-lv-baseboard.dtsi
+++ /dev/null
@@ -1,237 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-/ {
-   gpio_keys {
-   compatible = "gpio-keys";
-   pinctrl-names = "default";
-   pinctrl-0 = <_key_pins>;
-
-   sysboot2 {
-   label = "gpio3";
-   gpios = < 15 GPIO_ACTIVE_LOW>;/* gpio_111 / 
uP_GPIO_3 */
-   linux,code = ;
-   wakeup-source;
-   };
-   };
-
-   sound {
-   compatible = "ti,omap-twl4030";
-  

[PATCH 2/7] arm: ti: logicpd-torpedo: Migrate to OF_UPSTREAM

[Adam Ford]

The DM37 and OMAP35 Torpedo share a few files, but both of them
can be migrated to OF_UPSTREAM with a small update to their
respective u-boot.dtsi files to address changes made the aliases.
Both defconfigs need to properly point to the upstream directory
structure for the device trees.  With those updated, the U-Boot
device tree files can be deleted.

Signed-off-by: Adam Ford 

diff --git a/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi 
b/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi
index 4744872f7c..d14d68e458 100644
--- a/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi
+++ b/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi
@@ -14,6 +14,8 @@
aliases {
/delete-property/ serial1;
/delete-property/ serial2;
+   /delete-property/ mmc1;
+   /delete-property/ mmc2;
};
 
ethernet@0800 {
diff --git a/arch/arm/dts/logicpd-torpedo-35xx-devkit.dts 
b/arch/arm/dts/logicpd-torpedo-35xx-devkit.dts
deleted file mode 100644
index cb08aa62d9..00
--- a/arch/arm/dts/logicpd-torpedo-35xx-devkit.dts
+++ /dev/null
@@ -1,21 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-/dts-v1/;
-
-#include "omap34xx.dtsi"
-#include "logicpd-torpedo-som.dtsi"
-#include "logicpd-torpedo-baseboard.dtsi"
-#include "omap-gpmc-smsc9221.dtsi"
-
-/ {
-   model = "LogicPD Zoom OMAP35xx Torpedo Development Kit";
-   compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap3430", "ti,omap3";
-};
-
-_pmx_core {
-   isp1763_pins: pinmux_isp1763_pins {
-   pinctrl-single,pins = <
-   OMAP3_CORE1_IOPAD(0x2154,  PIN_INPUT_PULLUP | 
MUX_MODE4)/* sdmmc1_dat6.gpio_128 */
-   >;
-   };
-};
diff --git a/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi 
b/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi
index 2c34344504..8e8e2e4096 100644
--- a/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi
+++ b/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi
@@ -10,6 +10,8 @@
aliases {
/delete-property/ serial1;
/delete-property/ serial2;
+   /delete-property/ mmc1;
+   /delete-property/ mmc2;
};
 
ethernet@0800 {
diff --git a/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts 
b/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts
deleted file mode 100644
index 07ea822fe4..00
--- a/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts
+++ /dev/null
@@ -1,96 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-/dts-v1/;
-
-#include "omap36xx.dtsi"
-#include "logicpd-torpedo-som.dtsi"
-#include "omap-gpmc-smsc9221.dtsi"
-#include "logicpd-torpedo-baseboard.dtsi"
-
-/ {
-   model = "LogicPD Zoom DM3730 Torpedo + Wireless Development Kit";
-   compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap3630", "ti,omap3";
-
-   wl12xx_vmmc: wl12xx_vmmc {
-   compatible = "regulator-fixed";
-   regulator-name = "vwl1271";
-   regulator-min-microvolt = <180>;
-   regulator-max-microvolt = <180>;
-   gpio = < 29 0>;   /* gpio157 */
-   startup-delay-us = <7>;
-   enable-active-high;
-   vin-supply = <>;
-   };
-};
-
-/*
- * Only found on the wireless SOM. For the SOM without wireless, the pins for
- * MMC3 can be routed with jumpers to the second MMC slot on the devkit and
- * gpio157 is not connected. So this should be OK to keep common for now,
- * probably device tree overlays is the way to go with the various SOM and
- * jumpering combinations for the long run.
- */
- {
-   interrupts-extended = < 94 _pmx_core 0x136>;
-   pinctrl-0 = <_pins _core2_pins>;
-   pinctrl-names = "default";
-   vmmc-supply = <_vmmc>;
-   non-removable;
-   bus-width = <4>;
-   cap-power-off-card;
-   #address-cells = <1>;
-   #size-cells = <0>;
-   wlcore: wlcore@2 {
-   compatible = "ti,wl1283";
-   reg = <2>;
-   interrupt-parent = <>;
-   interrupts = <24 IRQ_TYPE_EDGE_RISING>; /* gpio 152 */
-   ref-clock-frequency = <2600>;
-   tcxo-clock-frequency = <2600>;
-   };
-};
-
- {
-   /delete-property/dma-names;
-   bluetooth {
-   compatible = "ti,wl1283-st";
-   enable-gpios = < 2 GPIO_ACTIVE_HIGH>; /* gpio 162 */
-   max-speed = <300>;
-   };
-};
-
-/* The DM3730 has a faster L3 than OMAP35, so increase pixel clock */
-_out {
-   pixel-clock-frequency = <9000>;
-};
-
-_pmx_core {
-   mmc3_pins: pinmux_mm3_pins {
-   pinctrl-single,pins = <
-   OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE3) 
/* sdmmc2_dat4.sdmmc3_dat0 */
-   OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3) 
/* sdmmc2_dat5.sdmmc3_dat1 */
-   OMAP3_CORE1_IOPAD(0x2168, 

[PATCH 1/7] arm: ti: am3517_evm: Migrate to OF_UPSTREAM

[Adam Ford]

With the feature of OF_UPSTREAM now available, the device trees
for the SOM and baseboard can now deleted and the device tree
locations need to point to the ti/omap directory.

Signed-off-by: Adam Ford 

diff --git a/arch/arm/dts/am3517-evm.dts b/arch/arm/dts/am3517-evm.dts
deleted file mode 100644
index d21bb2ccd0..00
--- a/arch/arm/dts/am3517-evm.dts
+++ /dev/null
@@ -1,339 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
- */
-/dts-v1/;
-
-#include "am3517.dtsi"
-#include "am3517-som.dtsi"
-#include "am3517-evm-ui.dtsi"
-#include 
-
-/ {
-   model = "TI AM3517 EVM (AM3517/05 TMDSEVM3517)";
-   compatible = "ti,am3517-evm", "ti,am3517", "ti,omap3";
-
-   aliases {
-   display0 = 
-   };
-
-   chosen {
-   stdout-path = 
-   };
-
-   memory@8000 {
-   device_type = "memory";
-   reg = <0x8000 0x1000>; /* 256 MB */
-   };
-
-   vmmc_fixed: vmmc {
-   compatible = "regulator-fixed";
-   regulator-name = "vmmc_fixed";
-   regulator-min-microvolt = <330>;
-   regulator-max-microvolt = <330>;
-   };
-
-   gpio-keys {
-   compatible = "gpio-keys-polled";
-   poll-interval = <100>;
-
-   button-user {
-   label = "User Push Button";
-   linux,code = ;
-   gpios = < 5 GPIO_ACTIVE_LOW>;
-   };
-
-   switch-1 {
-   label = "User Switch 1";
-   linux,code = ;
-   gpios = < 8 GPIO_ACTIVE_LOW>;
-   };
-
-   switch-2 {
-   label = "User Switch 2";
-   linux,code = ;
-   gpios = < 9 GPIO_ACTIVE_LOW>;
-   };
-
-   switch-3 {
-   label = "User Switch 3";
-   linux,code = ;
-   gpios = < 10 GPIO_ACTIVE_LOW>;
-   };
-
-   switch-4 {
-   label = "User Switch 4";
-   linux,code = ;
-   gpios = < 11 GPIO_ACTIVE_LOW>;
-   };
-
-   switch-5 {
-   label = "User Switch 5";
-   linux,code = ;
-   gpios = < 12 GPIO_ACTIVE_LOW>;
-   };
-
-   switch-6 {
-   label = "User Switch 6";
-   linux,code = ;
-   gpios = < 13 GPIO_ACTIVE_LOW>;
-   };
-
-   switch-7 {
-   label = "User Switch 7";
-   linux,code = ;
-   gpios = < 14 GPIO_ACTIVE_LOW>;
-   };
-
-   switch-8 {
-   label = "User Switch 8";
-   linux,code = ;
-   gpios = < 15 GPIO_ACTIVE_LOW>;
-   };
-   };
-
-   gpio-leds {
-   compatible = "gpio-leds";
-
-   pinctrl-names = "default";
-   pinctrl-0 = <_pins>;
-
-   user_led_1 {
-   label = "am3517evm:green:user_led_1";
-   gpios = < 7 GPIO_ACTIVE_LOW>;
-   default-state = "on";
-   };
-
-   user_led_2 {
-   label = "am3517evm:green:user_led_2";
-   gpios = < 6 GPIO_ACTIVE_LOW>;
-   default-state = "on";
-   };
-
-   user_led_3 {
-   label = "am3517evm:green:user_led_3";
-   gpios = < 11 GPIO_ACTIVE_HIGH>;
-   linux,default-trigger = "mmc0"; /* SD/MMC card activity 
*/
-   };
-
-   user_led_4 {
-   label = "am3517evm:green:user_led_4";
-   gpios = < 31 GPIO_ACTIVE_HIGH>;
-   linux,default-trigger = "heartbeat";
-   };
-   };
-
-   lcd0: display@0 {
-   /* This isn't the exact LCD, but the timings meet spec */
-   /* To make it work, set CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=4 */
-   compatible = "newhaven,nhd-4.3-480272ef-atxl";
-   label = "15";
-   backlight = <>;
-   enable-gpios = < 16 GPIO_ACTIVE_HIGH>;/* gpio176, lcd 
INI */
-   vcc-supply = <_io_reg>;
-
-   port {
-   lcd_in: endpoint {
-   remote-endpoint = <_out>;
-   };
-   };
-   };
-
-   bl: backlight {
-   compatible = "pwm-backlight";
-   pinctrl-names = "default";
-   power-supply = <_io_reg>;
-   pinctrl-0 = <_pins>;
-   pwms = < 0 

[PATCH v10 2/2] dt-bindings: mtd: fixed-partition: Add binman compatibles

[Simon Glass]

Add two compatibles for binman entries, as a starting point for the
schema.

Note that, after discussion on v2, we decided to keep the existing
meaning of label so as not to require changes to existing userspace
software when moving to use binman nodes to specify the firmware
layout.

Note also that, after discussion on v6, we decided to use the same
'fixed-partition' schema for the binman features, so this version
adds a new 'binman.yaml' file providing the new compatibles to the
existing partition.yaml binding.

Signed-off-by: Simon Glass 
---

Changes in v10:
- Drop binman,entry since it is likely not necessary
- Put the description back

Changes in v8:
- Switch the patch ordering so the partition change comes first

Changes in v7:
- Adjust MAINTAINERS entry
- Put compatible strings into the 'fixed-partition' binding

Changes in v5:
- Add mention of why 'binman' is the vendor
- Drop  'select: false'
- Tidy up the compatible setings
- Use 'tfa-bl31' instead of 'atf-bl31'

Changes in v4:
- Correct selection of multiple compatible strings

Changes in v3:
- Drop fixed-partitions from the example
- Use compatible instead of label

Changes in v2:
- Use plain partition@xxx for the node name

 .../bindings/mtd/partitions/binman.yaml   | 53 +++
 .../bindings/mtd/partitions/partition.yaml| 21 
 MAINTAINERS   |  5 ++
 3 files changed, 79 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mtd/partitions/binman.yaml

diff --git a/Documentation/devicetree/bindings/mtd/partitions/binman.yaml 
b/Documentation/devicetree/bindings/mtd/partitions/binman.yaml
new file mode 100644
index ..bb4b08546184
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/partitions/binman.yaml
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/partitions/binman.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Binman entries
+
+description: |
+  This corresponds to a binman 'entry'. It is a single partition which holds
+  data of a defined type.
+
+  Binman uses the type to indicate what data file / type to place in the
+  partition. There are quite a number of binman-specific entry types, such as
+  section, fill and files, to be added later.
+
+maintainers:
+  - Simon Glass 
+
+allOf:
+  - $ref: /schemas/mtd/partitions/partition.yaml#
+
+properties:
+  compatible:
+enum:
+  - u-boot   # u-boot.bin from U-Boot project
+  - tfa-bl31 # bl31.bin or bl31.elf from TF-A project
+
+required:
+  - compatible
+
+unevaluatedProperties: false
+
+examples:
+  - |
+partitions {
+compatible = "fixed-partitions";
+#address-cells = <1>;
+#size-cells = <1>;
+
+partition@10 {
+compatible = "u-boot";
+reg = <0x10 0xf0>;
+align-size = <0x1000>;
+align-end = <0x1>;
+};
+
+partition@20 {
+compatible = "tfa-bl31";
+reg = <0x20 0x10>;
+align = <0x4000>;
+};
+};
diff --git a/Documentation/devicetree/bindings/mtd/partitions/partition.yaml 
b/Documentation/devicetree/bindings/mtd/partitions/partition.yaml
index 656ca3db1762..bb3c326c6588 100644
--- a/Documentation/devicetree/bindings/mtd/partitions/partition.yaml
+++ b/Documentation/devicetree/bindings/mtd/partitions/partition.yaml
@@ -118,3 +118,24 @@ then:
 
 # This is a generic file other binding inherit from and extend
 additionalProperties: true
+
+examples:
+  - |
+partitions {
+compatible = "fixed-partitions";
+#address-cells = <1>;
+#size-cells = <1>;
+
+partition@10 {
+compatible = "u-boot";
+reg = <0x10 0xf0>;
+align-size = <0x1000>;
+align-end = <0x1>;
+};
+
+partition@20 {
+compatible = "tfa-bl31";
+reg = <0x20 0x10>;
+align = <0x4000>;
+};
+};
diff --git a/MAINTAINERS b/MAINTAINERS
index a848d6ca67e4..1eeb6ebde21f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3639,6 +3639,11 @@ F:   Documentation/filesystems/bfs.rst
 F: fs/bfs/
 F: include/uapi/linux/bfs_fs.h
 
+BINMAN
+M: Simon Glass 
+S: Supported
+F: Documentation/devicetree/bindings/mtd/partitions/binman*
+
 BITMAP API
 M: Yury Norov 
 R: Rasmus Villemoes 
-- 
2.34.1

[PATCH v10 1/2] dt-bindings: mtd: fixed-partitions: Add alignment properties

[Simon Glass]

Add three properties for controlling alignment of partitions, aka
'entries' in fixed-partition.

For now there is no explicit mention of hierarchy, so a 'section' is
just the 'fixed-partitions' node.

These new properties are inputs to the Binman packaging process, but are
also needed if the firmware is repacked, to ensure that alignment
constraints are not violated. Therefore they are provided as part of
the schema.

Signed-off-by: Simon Glass 
Reviewed-by: Rob Herring 
---

Changes in v10:
- Update the minimum to 2

Changes in v9:
- Move binding example to next batch to avoid build error

Changes in v7:
- Drop patch 'Add binman compatible'
- Put the alignment properties into the fixed-partition binding

Changes in v6:
- Correct schema-validation errors missed due to older dt-schema
  (enum fix and reg addition)

Changes in v5:
- Add value ranges
- Consistently mention alignment must be power-of-2
- Mention that alignment refers to bytes

Changes in v2:
- Fix 'a' typo in commit message

 .../bindings/mtd/partitions/partition.yaml| 51 +++
 1 file changed, 51 insertions(+)

diff --git a/Documentation/devicetree/bindings/mtd/partitions/partition.yaml 
b/Documentation/devicetree/bindings/mtd/partitions/partition.yaml
index 1ebe9e2347ea..656ca3db1762 100644
--- a/Documentation/devicetree/bindings/mtd/partitions/partition.yaml
+++ b/Documentation/devicetree/bindings/mtd/partitions/partition.yaml
@@ -57,6 +57,57 @@ properties:
   user space from
 type: boolean
 
+  align:
+$ref: /schemas/types.yaml#/definitions/uint32
+minimum: 2
+maximum: 0x8000
+multipleOf: 2
+description:
+  This sets the alignment of the entry in bytes.
+
+  The entry offset is adjusted so that the entry starts on an aligned
+  boundary within the containing section or image. For example ‘align =
+  <16>’ means that the entry will start on a 16-byte boundary. This may
+  mean that padding is added before the entry. The padding is part of
+  the containing section but is not included in the entry, meaning that
+  an empty space may be created before the entry starts. Alignment
+  must be a power of 2. If ‘align’ is not provided, no alignment is
+  performed.
+
+  align-size:
+$ref: /schemas/types.yaml#/definitions/uint32
+minimum: 2
+maximum: 0x8000
+multipleOf: 2
+description:
+  This sets the alignment of the entry size in bytes. It must be a power
+  of 2.
+
+  For example, to ensure that the size of an entry is a multiple of 64
+  bytes, set this to 64. While this does not affect the contents of the
+  entry within binman itself (the padding is performed only when its
+  parent section is assembled), the end result is that the entry ends
+  with the padding bytes, so may grow. If ‘align-size’ is not provided,
+  no alignment is performed.
+
+  align-end:
+$ref: /schemas/types.yaml#/definitions/uint32
+minimum: 2
+maximum: 0x8000
+multipleOf: 2
+description:
+  This sets the alignment (in bytes) of the end of an entry with respect
+  to the containing section. It must be a power of 2.
+
+  Some entries require that they end on an alignment boundary,
+  regardless of where they start. This does not move the start of the
+  entry, so the contents of the entry will still start at the beginning.
+  But there may be padding at the end. While this does not affect the
+  contents of the entry within binman itself (the padding is performed
+  only when its parent section is assembled), the end result is that the
+  entry ends with the padding bytes, so may grow. If ‘align-end’ is not
+  provided, no alignment is performed.
+
 if:
   not:
 required: [ reg ]
-- 
2.34.1

[PATCH 4/4] capsule: Makefile: add the generated files to CLEAN_FILES list

[Sughosh Ganu]

A certain set of capsule files are now generated as part of the
sandbox build. Add these files to the CLEAN_FILES list for deletion on
invoking any of the cleanup targets.

Signed-off-by: Sughosh Ganu 
---
 Makefile | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index ff003a5ad8..1df2e81654 100644
--- a/Makefile
+++ b/Makefile
@@ -2166,7 +2166,8 @@ CLEAN_FILES += include/autoconf.mk* include/bmp_logo.h 
include/bmp_logo_data.h \
   mkimage-out.spl.mkimage mkimage.spl.mkimage imx-boot.map \
   itb.fit.fit itb.fit.itb itb.map spl.map mkimage-out.rom.mkimage \
   mkimage.rom.mkimage mkimage-in-simple-bin* rom.map simple-bin* \
-  idbloader-spi.img lib/efi_loader/helloworld_efi.S *.itb
+  idbloader-spi.img lib/efi_loader/helloworld_efi.S *.itb \
+  Test* capsule.*.efi-capsule capsule*.map
 
 # Directories & files removed with 'make mrproper'
 MRPROPER_DIRS  += include/config include/generated spl tpl vpl \
-- 
2.34.1

[PATCH 3/4] capsule: add the generated capsules to gitignore

[Sughosh Ganu]

The sandbox platform build now generates a set of capsules. Put the
related files generated into gitignore.

Signed-off-by: Sughosh Ganu 
---
 .gitignore | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/.gitignore b/.gitignore
index 3301481192..94dbeb053c 100644
--- a/.gitignore
+++ b/.gitignore
@@ -63,6 +63,9 @@ fit-dtb.blob*
 /spl/
 /tpl/
 /defconfig
+/Test*
+/capsule.*.efi-capsule
+/capsule*.map
 
 #
 # Generated include files
-- 
2.34.1

[PATCH 2/4] sandbox: capsule: binman: generate some capsules as part of build

[Sughosh Ganu]

Currently, all the capsules for the sandbox platform are generated at
the time of running the capsule tests. To showcase generation of
capsules through binman, generate all signed capsules needed for the
sandbox platform as part of the build. This acts as an illustrative
example for generating capsules as part of a platform's build.

Make corresponding change in the capsule test's configuration to get
these signed capsules from the build directory.

Signed-off-by: Sughosh Ganu 
---
 arch/sandbox/dts/sandbox.dts  |   4 +
 arch/sandbox/dts/sandbox_capsule.dtsi | 169 ++
 arch/sandbox/dts/test.dts |   4 +
 .../test_efi_capsule/capsule_gen_binman.dts   | 167 +
 test/py/tests/test_efi_capsule/conftest.py|   1 +
 5 files changed, 185 insertions(+), 160 deletions(-)
 create mode 100644 arch/sandbox/dts/sandbox_capsule.dtsi

diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts
index 12d3eff5fa..8392206eea 100644
--- a/arch/sandbox/dts/sandbox.dts
+++ b/arch/sandbox/dts/sandbox.dts
@@ -106,3 +106,7 @@
 #if IS_ENABLED(CONFIG_SUPPORT_VPL)
 #include "sandbox_vpl.dtsi"
 #endif
+
+#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)
+#include "sandbox_capsule.dtsi"
+#endif
diff --git a/arch/sandbox/dts/sandbox_capsule.dtsi 
b/arch/sandbox/dts/sandbox_capsule.dtsi
new file mode 100644
index 00..34d29916b3
--- /dev/null
+++ b/arch/sandbox/dts/sandbox_capsule.dtsi
@@ -0,0 +1,169 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Devicetree file with binman nodes needed for generating EFI
+ * capsules.
+ *
+ */
+
+#include 
+
+/ {
+   binman: binman {
+   multiple-images;
+   };
+};
+
+ {
+   capsule1 {
+   filename = "Test01";
+   efi-capsule {
+   image-index = <0x1>;
+   image-guid = SANDBOX_UBOOT_IMAGE_GUID;
+
+   text {
+   text = "u-boot:New";
+   };
+   };
+   };
+
+   capsule2 {
+   filename = "Test02";
+   efi-capsule {
+   image-index = <0x2>;
+   image-guid = SANDBOX_UBOOT_ENV_IMAGE_GUID;
+
+   text {
+   text = "u-boot-env:New";
+   };
+   };
+   };
+
+   capsule3 {
+   filename = "Test03";
+   efi-capsule {
+   image-index = <0x1>;
+   image-guid = SANDBOX_INCORRECT_GUID;
+
+   text {
+   text = "u-boot:New";
+   };
+   };
+   };
+
+   capsule4 {
+   filename = "Test101";
+   efi-capsule {
+   image-index = <0x1>;
+   fw-version = <0x5>;
+   image-guid = SANDBOX_UBOOT_IMAGE_GUID;
+
+   text {
+   text = "u-boot:New";
+   };
+   };
+   };
+
+   capsule5 {
+   filename = "Test102";
+   efi-capsule {
+   image-index = <0x2>;
+   fw-version = <0xa>;
+   image-guid = SANDBOX_UBOOT_ENV_IMAGE_GUID;
+
+   text {
+   text = "u-boot-env:New";
+   };
+   };
+   };
+
+   capsule6 {
+   filename = "Test103";
+   efi-capsule {
+   image-index = <0x1>;
+   fw-version = <0x2>;
+   image-guid = SANDBOX_UBOOT_IMAGE_GUID;
+
+   text {
+   text = "u-boot:New";
+   };
+   };
+   };
+
+   capsule7 {
+   filename = "Test11";
+   efi-capsule {
+   image-index = <0x1>;
+   image-guid = SANDBOX_UBOOT_IMAGE_GUID;
+   private-key = CAPSULE_PRIV_KEY;
+   public-key-cert = CAPSULE_PUB_KEY;
+   monotonic-count = <0x1>;
+
+   text {
+   text = "u-boot:New";
+   };
+   };
+   };
+
+   capsule8 {
+   filename = "Test12";
+   efi-capsule {
+   image-index = <0x1>;
+   image-guid = SANDBOX_UBOOT_IMAGE_GUID;
+   private-key = CAPSULE_INVAL_KEY;
+   public-key-cert = CAPSULE_INVAL_PUB_KEY;
+   monotonic-count = <0x1>;
+
+   text {
+   text = "u-boot:New";
+   };
+   };
+   };
+
+   capsule9 {
+   filename = "Test111";
+   efi-capsule 

[PATCH 1/4] sandbox: capsule: remove capsule related configs

[Sughosh Ganu]

The capsule update testing is carried out only on the sandbox and
sandbox_flattree variants. Remove the capsule update related configs
from the other sandbox variants. This ensures that the capsule files
are generated only on variants which are used for the feature's
testing.

Signed-off-by: Sughosh Ganu 
---
 configs/sandbox64_defconfig  | 5 -
 configs/sandbox_noinst_defconfig | 2 --
 configs/sandbox_spl_defconfig| 2 --
 configs/sandbox_vpl_defconfig| 2 --
 4 files changed, 11 deletions(-)

diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
index 3be9a00a85..a67f9f0265 100644
--- a/configs/sandbox64_defconfig
+++ b/configs/sandbox64_defconfig
@@ -134,7 +134,6 @@ CONFIG_CPU=y
 CONFIG_DM_DEMO=y
 CONFIG_DM_DEMO_SIMPLE=y
 CONFIG_DM_DEMO_SHAPE=y
-CONFIG_DFU_SF=y
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_ARM_FFA_TRANSPORT=y
@@ -267,12 +266,8 @@ CONFIG_CMD_DHRYSTONE=y
 CONFIG_TPM=y
 CONFIG_ERRNO_STR=y
 CONFIG_GETOPT=y
-CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
-CONFIG_EFI_CAPSULE_ON_DISK=y
-CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
 CONFIG_EFI_SECURE_BOOT=y
 CONFIG_TEST_FDTDEC=y
-CONFIG_FWU_MULTI_BANK_UPDATE=y
 CONFIG_UNIT_TEST=y
 CONFIG_UT_TIME=y
 CONFIG_UT_DM=y
diff --git a/configs/sandbox_noinst_defconfig b/configs/sandbox_noinst_defconfig
index 137b3c6b82..f37230151a 100644
--- a/configs/sandbox_noinst_defconfig
+++ b/configs/sandbox_noinst_defconfig
@@ -281,8 +281,6 @@ CONFIG_TPM=y
 CONFIG_ZSTD=y
 CONFIG_SPL_LZMA=y
 CONFIG_ERRNO_STR=y
-CONFIG_EFI_CAPSULE_ON_DISK=y
-CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
 CONFIG_UNIT_TEST=y
 CONFIG_SPL_UNIT_TEST=y
 CONFIG_UT_TIME=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index d0cd91ef4f..f7b92dc844 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -249,8 +249,6 @@ CONFIG_ZSTD=y
 CONFIG_SPL_LZMA=y
 CONFIG_ERRNO_STR=y
 CONFIG_SPL_HEXDUMP=y
-CONFIG_EFI_CAPSULE_ON_DISK=y
-CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
 CONFIG_UNIT_TEST=y
 CONFIG_SPL_UNIT_TEST=y
 CONFIG_UT_TIME=y
diff --git a/configs/sandbox_vpl_defconfig b/configs/sandbox_vpl_defconfig
index b138b352de..72483d8ba1 100644
--- a/configs/sandbox_vpl_defconfig
+++ b/configs/sandbox_vpl_defconfig
@@ -252,8 +252,6 @@ CONFIG_TPM=y
 CONFIG_ZSTD=y
 # CONFIG_VPL_LZMA is not set
 CONFIG_ERRNO_STR=y
-CONFIG_EFI_CAPSULE_ON_DISK=y
-CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
 CONFIG_UNIT_TEST=y
 CONFIG_SPL_UNIT_TEST=y
 CONFIG_UT_TIME=y
-- 
2.34.1

[PATCH 0/4] capsule: Generate capsules as part of sandbox build

[Sughosh Ganu]

As part of review of a patch series for generating capsules through a
config file, I was asked to add support for generating capsules as
part of the sandbox platform build. This would provide an illustrative
example of generating capsules through binman. This patch series does
that.

Currently, the capsules get generated, through binman, only when
running the EFI Capsule Update test. With this series, a subset of
these capsules, more precisely the signed capsules, are being generated
as part of the sandbox platform build.

One of the patches in the series also performs a cleanup of the
capsule configs from all the sandbox variants which do not run the
capsule update tests. This restricts the generation of capsules only
on the two variants which are used for testing the functionality.


Sughosh Ganu (4):
  sandbox: capsule: remove capsule related configs
  sandbox: capsule: binman: generate some capsules as part of build
  capsule: add the generated capsules to gitignore
  capsule: Makefile: add the generated files to CLEAN_FILES list

 .gitignore|   3 +
 Makefile  |   3 +-
 arch/sandbox/dts/sandbox.dts  |   4 +
 arch/sandbox/dts/sandbox_capsule.dtsi | 169 ++
 arch/sandbox/dts/test.dts |   4 +
 configs/sandbox64_defconfig   |   5 -
 configs/sandbox_noinst_defconfig  |   2 -
 configs/sandbox_spl_defconfig |   2 -
 configs/sandbox_vpl_defconfig |   2 -
 .../test_efi_capsule/capsule_gen_binman.dts   | 167 +
 test/py/tests/test_efi_capsule/conftest.py|   1 +
 11 files changed, 190 insertions(+), 172 deletions(-)
 create mode 100644 arch/sandbox/dts/sandbox_capsule.dtsi

-- 
2.34.1

Re: mx6cuboxi: failes to detect model

[Fabio Estevam]

On Tue, Mar 26, 2024 at 1:11 PM Christian Gmeiner
 wrote:

> It got better but the model is (still) wrong:
>
> U-Boot 2024.04-rc5-dirty (Mar 26 2024 - 17:03:41 +0100)
>
> CPU:   Freescale i.MX6Q rev1.3 996 MHz (running at 792 MHz)
> CPU:   Extended Commercial temperature grade (-20C to 105C) at 20C
> Reset cause: POR
> Model: SolidRun HummingBoard2 Dual/Quad (1.5som+emmc)
> Board: MX6 HummingBoard2
> DRAM:  2 GiB
> Core:  82 devices, 17 uclasses, devicetree: fit
> MMC:   FSL_SDHC: 1, FSL_SDHC: 2
> Loading Environment from MMC... *** Warning - bad CRC, using default 
> environment

It seems to me that there is a mix of DM GPIO and non-DM GPIO.

Does the change below help?

--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -336,20 +336,16 @@ static enum board_type board_type(void)
 * HB 1 1x
 */

-   gpio_direction_input(IMX_GPIO_NR(2, 8));
-   val3 = gpio_get_value(IMX_GPIO_NR(2, 8));
+   val3 = !!dm_gpio_get_value(&(board_detect_desc[0]));

if (val3 == 0)
return HUMMINGBOARD2;

-   gpio_direction_input(IMX_GPIO_NR(3, 4));
-   val2 = gpio_get_value(IMX_GPIO_NR(3, 4));
+   val2 = !!dm_gpio_get_value(&(board_detect_desc[1]));

if (val2 == 0)
return HUMMINGBOARD;
-
-   gpio_direction_input(IMX_GPIO_NR(4, 9));
-   val1 = gpio_get_value(IMX_GPIO_NR(4, 9));
+   val1 = !!dm_gpio_get_value(&(board_detect_desc[2]));

if (val1 == 0) {
return CUBOXI;

Re: [PATCH] ARM: stm32: Default dfu_alt_info for STM32MP13xx SPI NOR

[Marek Vasut]

On 3/19/24 11:22 AM, Patrice CHOTARD wrote:



On 3/19/24 03:44, Marek Vasut wrote:

Define dfu_alt_info with SPI NOR layout to make it easy to
install or update bootloader in the SPI NOR using dfu-util.

Use the following U-Boot commands to start DFU mode:
"
=> sf probe && dfu 0 mtd
"

Use the following dfu-util invocation on Host PC to install binaries:
"
$ dfu-util -w -a 0 -D build/stm32mp1/release/tf-a-stm32mp135f-dhcor-dhsbc.stm32
$ dfu-util -w -a 1 -D build/stm32mp1/release/tf-a-stm32mp135f-dhcor-dhsbc.stm32
$ dfu-util -w -a 2 -D build/stm32mp1/release/fip.bin
"

Signed-off-by: Marek Vasut 
---
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
Cc: Tom Rini 
Cc: u-b...@dh-electronics.com
Cc: u-boot@lists.denx.de
Cc: uboot-st...@st-md-mailman.stormreply.com
---
  include/configs/stm32mp13_common.h | 1 +
  1 file changed, 1 insertion(+)

diff --git a/include/configs/stm32mp13_common.h 
b/include/configs/stm32mp13_common.h
index 5b0658ced92..d6e4f8fd915 100644
--- a/include/configs/stm32mp13_common.h
+++ b/include/configs/stm32mp13_common.h
@@ -63,6 +63,7 @@
"fi;\0"
  
  #define STM32MP_EXTRA \

+   "dfu_alt_info=mtd nor0=fsbl1 raw 0x0 0x4;fsbl2 raw 0x4 0x4;uboot 
raw 0x8 0x16\0" \
"env_check=if env info -p -d -q; then env save; fi\0" \
"boot_net_usb_start=true\0"
  



Hi Marek

On our STM32 board, the dfu_alt_info is build dynamically, we have 
CONFIG_SET_DFU_ALT_INFO enable
Can you add the dfu_alt_info in a specific stm32mp13_dhxx.common.h instead ?


You can drop this patch.

Re: tcg2_platform_get_log failing to read address and size of memory-region via ofnode_get_addr_size

[Tim Harvey]

On Tue, Mar 26, 2024 at 2:24 AM Ilias Apalodimas
 wrote:
>
> Hi Tim,
>
> On Tue, 26 Mar 2024 at 03:15, Tim Harvey  wrote:
> >
> > Greetings,
> >
> > I'm unable to understand why tcg2_platform_get_log is failing to read
> > a memory region.
> >
> > For example the following diffs:
>
> I am not really sure what those nodes are supposed to do in sandbox.
> Pehaps Eddie remembers.
> What exactly are you trying to achieve here? Read the eventlog from TF-A?
>

Hi Ilias,

I was trying to get measured boot (CONFIG_MEASURED_BOOT=y) working on
a tpm on my board but ran into an issue when I couldn't get the
memory-region I added for testing to be recognized with the current
code in tcg2_platform_get_log().

I wonder if an event log should be required for measured boot - it
sounds like that was something required for EFI, so I was thinking of
submitting the following:
commit b3f336c2f863168219a93cd1c7ac922396e0fad5 (HEAD -> master-venice)
Author: Tim Harvey 
Date:   Tue Mar 26 08:49:07 2024 -0700

tpm: allow measured boot without an event log

Currently an event log is required for measured boot. Remove this
requirement.

Signed-off-by: Tim Harvey 

diff --git a/lib/tpm-v2.c b/lib/tpm-v2.c
index 68eaaa639f89..994f8089ba34 100644
--- a/lib/tpm-v2.c
+++ b/lib/tpm-v2.c
@@ -175,17 +175,19 @@ static int tcg2_log_append_check(struct
tcg2_event_log *elog, u32 pcr_index,
u32 event_size;
u8 *log;

-   event_size = size + tcg2_event_get_size(digest_list);
-   if (elog->log_position + event_size > elog->log_size) {
-   printf("%s: log too large: %u + %u > %u\n", __func__,
-  elog->log_position, event_size, elog->log_size);
-   return -ENOBUFS;
-   }
+   if (elog->log_size) {
+   event_size = size + tcg2_event_get_size(digest_list);
+   if (elog->log_position + event_size > elog->log_size) {
+   printf("%s: log too large: %u + %u > %u\n", __func__,
+  elog->log_position, event_size, elog->log_size);
+   return -ENOBUFS;
+   }

-   log = elog->log + elog->log_position;
-   elog->log_position += event_size;
+   log = elog->log + elog->log_position;
+   elog->log_position += event_size;

-   tcg2_log_append(pcr_index, event_type, digest_list, size, event, log);
+   tcg2_log_append(pcr_index, event_type, digest_list,
size, event, log);
+   }

return 0;
 }
@@ -613,10 +615,8 @@ int tcg2_measurement_init(struct udevice **dev,
struct tcg2_event_log *elog,
return rc;

rc = tcg2_log_prepare_buffer(*dev, elog, ignore_existing_log);
-   if (rc) {
+   if (rc)
tcg2_measurement_term(*dev, elog, true);
-   return rc;
-   }

rc = tcg2_measure_event(*dev, elog, 0, EV_S_CRTM_VERSION,
strlen(version_string) + 1,

Would you agree with removing the requirement for the event log?

I have another question that perhaps you may have some feedback on.
The tpm commands such as pcr_extend, pcr_read currently require a
32-byte SHA256 digest and I wish to extend that as my TPM supports
only SHA1. The tpm2_pcr_extend and tpm2_pcr_read functions were
extended to  function to allow the digest type and length to be passed
in and I'm wondering what the best way to extend the tpm extend/read
commands would be to support that.

The tcg2_create_digest function creates a digest based on the
capabilities of the tpm and the tcg2_pcr_extend loops over those
calling tpm2_pcr_extend for each digtest supported (and same for
tcg2_pcr_read looping over tpm2_pcr_read) and I'm assuming TPM's can
support multiple algos so I suppose a parameter needs to be added to
the pcr_read and pcr_extend commands. Would you agree with that?

Best Regards,

Tim

> Thanks
> /Ilias
> >
> > diff --git a/arch/arm/dts/imx8mm-venice-gw73xx.dtsi
> > b/arch/arm/dts/imx8mm-venice-gw73xx.dtsi
> > index 7b2130dbdb21..57b3c227ceaf 100644
> > --- a/arch/arm/dts/imx8mm-venice-gw73xx.dtsi
> > +++ b/arch/arm/dts/imx8mm-venice-gw73xx.dtsi
> > @@ -112,6 +112,7 @@
> > compatible = "tcg,tpm_tis-spi";
> > reg = <0x1>;
> > spi-max-frequency = <3600>;
> > +   memory-region = <_log>;
> > };
> >  };
> >  diff --git a/arch/arm/dts/imx8mm-venice-gw700x.dtsi
> > b/arch/arm/dts/imx8mm-venice-gw700x.dtsi
> > index c305e325d007..697fd1148785 100644
> > --- a/arch/arm/dts/imx8mm-venice-gw700x.dtsi
> > +++ b/arch/arm/dts/imx8mm-venice-gw700x.dtsi
> > @@ -13,6 +13,17 @@
> > reg = <0x0 0x4000 0 0x8000>;
> > };
> >
> > +   reserved-memory {
> > +   #address-cells = <2>;
> > +   #size-cells = <2>;
> > +   ranges;
> > +
> > +   event_log: tcg_event_log {
> > +   no-map;
> > +   reg = 

Re: mx6cuboxi: failes to detect model

[Christian Gmeiner]

Hi Fabio

>
> On Tue, Mar 26, 2024 at 12:17 PM Christian Gmeiner
>  wrote:
> >
> > I am seeing model detection problems with the current git master.
> >
> > U-Boot 2024.04-rc5 (Mar 26 2024 - 15:59:22 +0100)
> >
> > CPU:   Freescale i.MX6Q rev1.3 996 MHz (running at 792 MHz)
> > CPU:   Extended Commercial temperature grade (-20C to 105C) at 26C
> > Reset cause: POR
> > Model: SolidRun HummingBoard2 Dual/Quad (1.5som+emmc)
> > gpio@20a4000: set_dir_flags: error: gpio GPIO3_8 not reserved
> > gpio@20a4000: get_value: error: gpio GPIO3_8 not reserved
> > gpio@20a8000: set_dir_flags: error: gpio GPIO4_4 not reserved
> > gpio@20a8000: get_value: error: gpio GPIO4_4 not reserved
> > gpio@20b: set_dir_flags: error: gpio GPIO6_9 not reserved
> > gpio@20b: get_value: error: gpio GPIO6_9 not reserved
> > Board: MX6 HummingBoard
>
> Unfortunately, my mx6cuboxi no longer works, so I can't test it myself.
>
> I am adding Baruch on Cc. Hopefully, Baruch or Josua can take a look.
>

Thanks.

> The 'not reserved' errors may be caused by the lack of gpio_request().
>
> Do the changes below help?
>
> --- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
> +++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
> @@ -336,18 +336,21 @@ static enum board_type board_type(void)
>  * HB 1 1x
>  */
>
> +   gpio_request(IMX_GPIO_NR(2, 8), "val3");
> gpio_direction_input(IMX_GPIO_NR(2, 8));
> val3 = gpio_get_value(IMX_GPIO_NR(2, 8));
>
> if (val3 == 0)
> return HUMMINGBOARD2;
>
> +   gpio_request(IMX_GPIO_NR(3, 4), "val2");
> gpio_direction_input(IMX_GPIO_NR(3, 4));
> val2 = gpio_get_value(IMX_GPIO_NR(3, 4));
>
> if (val2 == 0)
> return HUMMINGBOARD;
>
> +   gpio_request(IMX_GPIO_NR(4, 9), "val1");
> gpio_direction_input(IMX_GPIO_NR(4, 9));
> val1 = gpio_get_value(IMX_GPIO_NR(4, 9));
>

It got better but the model is (still) wrong:

U-Boot 2024.04-rc5-dirty (Mar 26 2024 - 17:03:41 +0100)

CPU:   Freescale i.MX6Q rev1.3 996 MHz (running at 792 MHz)
CPU:   Extended Commercial temperature grade (-20C to 105C) at 20C
Reset cause: POR
Model: SolidRun HummingBoard2 Dual/Quad (1.5som+emmc)
Board: MX6 HummingBoard2
DRAM:  2 GiB
Core:  82 devices, 17 uclasses, devicetree: fit
MMC:   FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... *** Warning - bad CRC, using default environment



With the revert of 9e644284ab812f2db23f6185af77c0e771b0be73 I get:

U-Boot 2024.04-rc5-2-g3512482aeb (Mar 26 2024 - 17:06:01 +0100)

CPU:   Freescale i.MX6Q rev1.3 996 MHz (running at 792 MHz)
CPU:   Extended Commercial temperature grade (-20C to 105C) at 25C
Reset cause: POR
Model: SolidRun HummingBoard2 Dual/Quad (1.5som+emmc)
Board: MX6 Cubox-i
DRAM:  2 GiB
Core:  82 devices, 17 uclasses, devicetree: fit
...

git show 9e644284ab812f2db23f6185af77c0e771b0be73
dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation

Nodes with bootph-pre-sram/ram props are bound in multiple phases:
1. At TPL (bootph-pre-sram) or SPL (bootph-pre-ram) phase
2. At U-Boot proper pre-relocation phase
3. At U-Boot proper normal phase

However the binding and U-Boot Driver Model documentation indicate that
only nodes marked with bootph-all or bootph-some-ram should be bound in
the U-Boot proper pre-relocation phase.

Change ofnode_pre_reloc to report a node with bootph-pre-ram/sram prop
with a pre-reloc status only after U-Boot proper pre-relocation phase.
Also update the ofnode_pre_reloc documentation to closer reflect the
binding and driver model documentation.

This changes behavior of what nodes are bound in the U-Boot proper
pre-relocation phase. Change to bootph-all or add bootph-some-ram prop
to restore prior behavior.

Signed-off-by: Jonas Karlman 
Reviewed-by: Simon Glass 


-- 
greets
--
Christian Gmeiner, MSc

https://christian-gmeiner.info/privacypolicy

Re: mx6cuboxi: failes to detect model

[Fabio Estevam]

Hi Christian,

On Tue, Mar 26, 2024 at 12:17 PM Christian Gmeiner
 wrote:
>
> I am seeing model detection problems with the current git master.
>
> U-Boot 2024.04-rc5 (Mar 26 2024 - 15:59:22 +0100)
>
> CPU:   Freescale i.MX6Q rev1.3 996 MHz (running at 792 MHz)
> CPU:   Extended Commercial temperature grade (-20C to 105C) at 26C
> Reset cause: POR
> Model: SolidRun HummingBoard2 Dual/Quad (1.5som+emmc)
> gpio@20a4000: set_dir_flags: error: gpio GPIO3_8 not reserved
> gpio@20a4000: get_value: error: gpio GPIO3_8 not reserved
> gpio@20a8000: set_dir_flags: error: gpio GPIO4_4 not reserved
> gpio@20a8000: get_value: error: gpio GPIO4_4 not reserved
> gpio@20b: set_dir_flags: error: gpio GPIO6_9 not reserved
> gpio@20b: get_value: error: gpio GPIO6_9 not reserved
> Board: MX6 HummingBoard

Unfortunately, my mx6cuboxi no longer works, so I can't test it myself.

I am adding Baruch on Cc. Hopefully, Baruch or Josua can take a look.

The 'not reserved' errors may be caused by the lack of gpio_request().

Do the changes below help?

--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -336,18 +336,21 @@ static enum board_type board_type(void)
 * HB 1 1x
 */

+   gpio_request(IMX_GPIO_NR(2, 8), "val3");
gpio_direction_input(IMX_GPIO_NR(2, 8));
val3 = gpio_get_value(IMX_GPIO_NR(2, 8));

if (val3 == 0)
return HUMMINGBOARD2;

+   gpio_request(IMX_GPIO_NR(3, 4), "val2");
gpio_direction_input(IMX_GPIO_NR(3, 4));
val2 = gpio_get_value(IMX_GPIO_NR(3, 4));

if (val2 == 0)
return HUMMINGBOARD;

+   gpio_request(IMX_GPIO_NR(4, 9), "val1");
gpio_direction_input(IMX_GPIO_NR(4, 9));
val1 = gpio_get_value(IMX_GPIO_NR(4, 9));

> DRAM:  2 GiB
> Core:  82 devices, 17 uclasses, devicetree: fit
> MMC:   FSL_SDHC: 1, FSL_SDHC: 2
> Loading Environment from MMC... *** Warning - bad CRC, using default 
> environment
>
> In:serial
> Out:   serial
> Err:   serial
> Net:   eth0: ethernet@2188000
>
>
> I did a git bisect to find the commit that broke model detection:
>
> # good: [4459ed60cb1e0562bc5b40405e2b4b9bbf766d57] Prepare v2023.10
> git bisect good 4459ed60cb1e0562bc5b40405e2b4b9bbf766d57
> # bad: [873791433602281ed230486606e326983c97a285] Merge
> https://source.denx.de/u-boot/custodians/u-boot-riscv
> git bisect bad 873791433602281ed230486606e326983c97a285
> # bad: [6e0a75d3162a024cb0cdedd871d435e6ee782447] configs: Resync with
> savedefconfig
> git bisect bad 6e0a75d3162a024cb0cdedd871d435e6ee782447
> # good: [99b46477e3495f819f6826d11470d46f12a4f9f7] clk: Dont return
> error when assigned-clocks is empty or missing
> git bisect good 99b46477e3495f819f6826d11470d46f12a4f9f7
> # bad: [50fa67d091b6ffbc1d77d3100d7b31795bf64928] arm: mach-k3:
> j721e_init: Move clk_k3 probe before loading TIFS
> git bisect bad 50fa67d091b6ffbc1d77d3100d7b31795bf64928
> # bad: [827cece3aa550d41e9c08c640b3a73372c8fb14a] pinctrl: renesas:
> Synchronize R8A77980 V3H PFC tables with Linux 6.5.3
> git bisect bad 827cece3aa550d41e9c08c640b3a73372c8fb14a
> # good: [623b3e8f9718a1fbd612b3e42451859e9f98a947] x86: spl: Change
> the condition for copying U-Boot to RAM
> git bisect good 623b3e8f9718a1fbd612b3e42451859e9f98a947
> # good: [ad57b98e212bd15492398cea3a8d4df6297e16fd] x86: doc: Split out
> manual booting into its own file
> git bisect good ad57b98e212bd15492398cea3a8d4df6297e16fd
> # bad: [6d53b50888315252cdd3251551add7a9108a1300] ARM: renesas: Enable
> DM_ETH_PHY on 64-bit R-Car boards
> git bisect bad 6d53b50888315252cdd3251551add7a9108a1300
> # bad: [283dcb63cb7d124fa427938f39aa9362872e02fc] buildman: Show
> progress when regenerating the board.cfg file
> git bisect bad 283dcb63cb7d124fa427938f39aa9362872e02fc
> # bad: [9e644284ab812f2db23f6185af77c0e771b0be73] dm: core: Report
> bootph-pre-ram/sram node as pre-reloc after relocation
> git bisect bad 9e644284ab812f2db23f6185af77c0e771b0be73
> # good: [b05a184379631d13c4a49e423aa1324dc1ae6158] Merge tag
> 'x86-pull-20230922' of
> https://source.denx.de/u-boot/custodians/u-boot-x86 into next
> git bisect good b05a184379631d13c4a49e423aa1324dc1ae6158
> # first bad commit: [9e644284ab812f2db23f6185af77c0e771b0be73] dm:
> core: Report bootph-pre-ram/sram node as pre-reloc after relocation
>
> If I revert 9e644284ab812f2db23f6185af77c0e771b0be73 on top of git
> master everything is fine again. As I am not an export in that area I
> am seeking
> some directions on how to fix this issue.
>
> --
> greets
> --
> Christian Gmeiner, MSc
>
> https://christian-gmeiner.info/privacypolicy

Is it possible to skip building the tools?

[Tomás Álvarez Vanoli]

Hello,
I am currently working with u-boot 2024.01 and run into problems with some
of my Jenkins build agents because the Makefile attempts to build the host
tools using the host toolchain (from the OS repo) which is outdated and
fails.

The tools are already provided in my own toolchain generated with yocto and
I can ensure that they are built with the same version of u-boot.

For the case of dtc I can set the DTC environment variable to point to my
toolchain's sysroot, but for things under the tools directory there doesn't
seem to be an option to point to pre-compiled ones or to skip building.

For the moment I have patched the Makefile to remove tools as a dependency
to build u-boot.bin. Is there a more correct way of doing this or is it
possible at all?

Note: yes, updating the host toolchain would be possible but it would be
better to be able to use tools provided in my custom toolchain for
reproducibility across build agents.

Best regards,
Tomas

[PATCH] arm: imx: fix signature_block_hdr struct fields order

[Javier Viguera]

According to the documentation (for example AN13994), for AHAB-enabled
devices the format of the signature block is:

  +--+--+--+-+
  | Tag  | Length - msb | Length - lsb | Version |
  +--+--+--+-+
  | SRK Table offset| Certificate offset |
  +-++
  | Blob offset | Signature offset   |
  +-++

Signed-off-by: Javier Viguera 
---
 include/imx_container.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/imx_container.h b/include/imx_container.h
index 54cd684e35d5..691c764b3e5b 100644
--- a/include/imx_container.h
+++ b/include/imx_container.h
@@ -50,10 +50,10 @@ struct signature_block_hdr {
u8 length_lsb;
u8 length_msb;
u8 tag;
-   u16 srk_table_offset;
u16 cert_offset;
-   u16 blob_offset;
+   u16 srk_table_offset;
u16 signature_offset;
+   u16 blob_offset;
u32 reserved;
 } __packed;
 

Re: [PATCH] usb: dwc2: Add in version 4xx compatibility

[Greg Malysa]

I'd be happy with that change. Does anyone have access to the
associated designware databook (I do not)? We could also check to see
if those four bits are all always allocated to the 2/3/4/x version
number. I can submit v2 with that change instead once we know.

On Tue, Mar 26, 2024 at 7:50 AM Marek Vasut  wrote:
>
> On 3/26/24 3:32 AM, Greg Malysa wrote:
> > From: Nathan Barrett-Morrison 
> >
> > This adds the Synopsys device id for version 4xx of the designware
> > IP block and extends the version check to include it to permit
> > new hardware to run. It does not add any 4xx-specific features.
> >
> > Signed-off-by: Ian Roberts 
> > Signed-off-by: Greg Malysa 
> > Signed-off-by: Nathan Barrett-Morrison 
> >
> > ---
> >
> >
> > ---
> >   drivers/usb/host/dwc2.c | 3 ++-
> >   drivers/usb/host/dwc2.h | 1 +
> >   2 files changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
> > index 637eb2dd06..6fdde6a9a7 100644
> > --- a/drivers/usb/host/dwc2.c
> > +++ b/drivers/usb/host/dwc2.c
> > @@ -1180,7 +1180,8 @@ static int dwc2_init_common(struct udevice *dev, 
> > struct dwc2_priv *priv)
> >snpsid >> 12 & 0xf, snpsid & 0xfff);
> >
> >   if ((snpsid & DWC2_SNPSID_DEVID_MASK) != DWC2_SNPSID_DEVID_VER_2xx &&
> > - (snpsid & DWC2_SNPSID_DEVID_MASK) != DWC2_SNPSID_DEVID_VER_3xx) {
> > + (snpsid & DWC2_SNPSID_DEVID_MASK) != DWC2_SNPSID_DEVID_VER_3xx &&
> > + (snpsid & DWC2_SNPSID_DEVID_MASK) != DWC2_SNPSID_DEVID_VER_4xx) {
> >   dev_info(dev, "SNPSID invalid (not DWC2 OTG device): %08x\n",
> >snpsid);
> >   return -ENODEV;
> > diff --git a/drivers/usb/host/dwc2.h b/drivers/usb/host/dwc2.h
> > index 6f022e33a1..f202d55eb2 100644
> > --- a/drivers/usb/host/dwc2.h
> > +++ b/drivers/usb/host/dwc2.h
> > @@ -739,6 +739,7 @@ struct dwc2_core_regs {
> >   #define DWC2_PCGCCTL_DEEP_SLEEP_OFFSET  7
> >   #define DWC2_SNPSID_DEVID_VER_2xx   (0x4f542 << 12)
> >   #define DWC2_SNPSID_DEVID_VER_3xx   (0x4f543 << 12)
> > +#define DWC2_SNPSID_DEVID_VER_4xx(0x4f544 << 12)
> >   #define DWC2_SNPSID_DEVID_MASK  (0xf << 
> > 12)
> >   #define DWC2_SNPSID_DEVID_OFFSET12
>
> Maybe it would be better/easier/futureproof to simply check if (snpsid &
> 0x0 == 0x4f540) ?



-- 
Greg Malysa
Timesys Corporation

mx6cuboxi: failes to detect model

[Christian Gmeiner]

I am seeing model detection problems with the current git master.

U-Boot 2024.04-rc5 (Mar 26 2024 - 15:59:22 +0100)

CPU:   Freescale i.MX6Q rev1.3 996 MHz (running at 792 MHz)
CPU:   Extended Commercial temperature grade (-20C to 105C) at 26C
Reset cause: POR
Model: SolidRun HummingBoard2 Dual/Quad (1.5som+emmc)
gpio@20a4000: set_dir_flags: error: gpio GPIO3_8 not reserved
gpio@20a4000: get_value: error: gpio GPIO3_8 not reserved
gpio@20a8000: set_dir_flags: error: gpio GPIO4_4 not reserved
gpio@20a8000: get_value: error: gpio GPIO4_4 not reserved
gpio@20b: set_dir_flags: error: gpio GPIO6_9 not reserved
gpio@20b: get_value: error: gpio GPIO6_9 not reserved
Board: MX6 HummingBoard
DRAM:  2 GiB
Core:  82 devices, 17 uclasses, devicetree: fit
MMC:   FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... *** Warning - bad CRC, using default environment

In:serial
Out:   serial
Err:   serial
Net:   eth0: ethernet@2188000


I did a git bisect to find the commit that broke model detection:

# good: [4459ed60cb1e0562bc5b40405e2b4b9bbf766d57] Prepare v2023.10
git bisect good 4459ed60cb1e0562bc5b40405e2b4b9bbf766d57
# bad: [873791433602281ed230486606e326983c97a285] Merge
https://source.denx.de/u-boot/custodians/u-boot-riscv
git bisect bad 873791433602281ed230486606e326983c97a285
# bad: [6e0a75d3162a024cb0cdedd871d435e6ee782447] configs: Resync with
savedefconfig
git bisect bad 6e0a75d3162a024cb0cdedd871d435e6ee782447
# good: [99b46477e3495f819f6826d11470d46f12a4f9f7] clk: Dont return
error when assigned-clocks is empty or missing
git bisect good 99b46477e3495f819f6826d11470d46f12a4f9f7
# bad: [50fa67d091b6ffbc1d77d3100d7b31795bf64928] arm: mach-k3:
j721e_init: Move clk_k3 probe before loading TIFS
git bisect bad 50fa67d091b6ffbc1d77d3100d7b31795bf64928
# bad: [827cece3aa550d41e9c08c640b3a73372c8fb14a] pinctrl: renesas:
Synchronize R8A77980 V3H PFC tables with Linux 6.5.3
git bisect bad 827cece3aa550d41e9c08c640b3a73372c8fb14a
# good: [623b3e8f9718a1fbd612b3e42451859e9f98a947] x86: spl: Change
the condition for copying U-Boot to RAM
git bisect good 623b3e8f9718a1fbd612b3e42451859e9f98a947
# good: [ad57b98e212bd15492398cea3a8d4df6297e16fd] x86: doc: Split out
manual booting into its own file
git bisect good ad57b98e212bd15492398cea3a8d4df6297e16fd
# bad: [6d53b50888315252cdd3251551add7a9108a1300] ARM: renesas: Enable
DM_ETH_PHY on 64-bit R-Car boards
git bisect bad 6d53b50888315252cdd3251551add7a9108a1300
# bad: [283dcb63cb7d124fa427938f39aa9362872e02fc] buildman: Show
progress when regenerating the board.cfg file
git bisect bad 283dcb63cb7d124fa427938f39aa9362872e02fc
# bad: [9e644284ab812f2db23f6185af77c0e771b0be73] dm: core: Report
bootph-pre-ram/sram node as pre-reloc after relocation
git bisect bad 9e644284ab812f2db23f6185af77c0e771b0be73
# good: [b05a184379631d13c4a49e423aa1324dc1ae6158] Merge tag
'x86-pull-20230922' of
https://source.denx.de/u-boot/custodians/u-boot-x86 into next
git bisect good b05a184379631d13c4a49e423aa1324dc1ae6158
# first bad commit: [9e644284ab812f2db23f6185af77c0e771b0be73] dm:
core: Report bootph-pre-ram/sram node as pre-reloc after relocation

If I revert 9e644284ab812f2db23f6185af77c0e771b0be73 on top of git
master everything is fine again. As I am not an export in that area I
am seeking
some directions on how to fix this issue.

-- 
greets
--
Christian Gmeiner, MSc

https://christian-gmeiner.info/privacypolicy

Re: [PATCH] am625x_evm_a53: Tweak boot command to set fdt

[Martyn Welch]

On Tue, 2024-03-26 at 14:35 +, Christopher Obbard wrote:
> Hi Martyn.
> 
> On Tue, 2024-03-26 at 14:26 +, Martyn Welch wrote:
> > With the current config for tha SK-AM62, fdtfile isn't set in the
> > U-Boot
> > environment. When using bootflow to boot from a block device, where
> > the
> > extlinux.conf file specifies `fdtdir`, a fallback device tree is
> > being
> > constructed from the `soc` (`k3`) and `board` (`am62x`) environment
> > variables, resulting in u-Boot trying to retrieve
> > `/dtbs/6.8.1+/k3-am62x.dtb`. This file doesn't exist.
> > 
> > The environment variables `default_device_tree` and
> > `default_device_tree_arch` are set in the config, the `findfdt`
> > script
> > can be called to construct `fdtfile` from the environment variables
> > set
> > by these config options, however this script currently isn't being
> > run.
> > 
> > Calling this script results in the correct device tree being
> > retrieved:
> > 
> >    Retrieving file: /dtbs/6.8.1+/ti/k3-am625-sk.dtb
> > 
> > Many boards are calling this script as part of their boot command.
> > The
> > am62x currently isn't. Rectify this so that booting works
> > correctly.
> > 
> > Signed-off-by: Martyn Welch 
> 
> Would this also be appropriate to add to the defconfig for other
> AM62x boards
> (e.g beagleplay) ?
> 

Hi Chris,

Probably, but this is the only board I have available to test.

Martyn

> Anyway, for this device:
> 
> Reviewed-by: Christopher Obbard 
> 
> > ---
> >  configs/am62x_evm_a53_defconfig | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/configs/am62x_evm_a53_defconfig
> > b/configs/am62x_evm_a53_defconfig
> > index 78287ec18a..e373e44a93 100644
> > --- a/configs/am62x_evm_a53_defconfig
> > +++ b/configs/am62x_evm_a53_defconfig
> > @@ -30,7 +30,7 @@ CONFIG_SPL_LOAD_FIT=y
> >  CONFIG_SPL_LOAD_FIT_ADDRESS=0x8100
> >  CONFIG_BOOTSTD_FULL=y
> >  CONFIG_SYS_BOOTM_LEN=0x80
> > -CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb"
> > +CONFIG_BOOTCOMMAND="run findfdt; run envboot; bootflow scan -lb"
> >  CONFIG_BOARD_LATE_INIT=y
> >  CONFIG_SPL_MAX_SIZE=0x58000
> >  CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
> 
> Thanks!
> 
> Chris

Re: [PATCH] am625x_evm_a53: Tweak boot command to set fdt

[Christopher Obbard]

Hi Martyn.

On Tue, 2024-03-26 at 14:26 +, Martyn Welch wrote:
> With the current config for tha SK-AM62, fdtfile isn't set in the U-Boot
> environment. When using bootflow to boot from a block device, where the
> extlinux.conf file specifies `fdtdir`, a fallback device tree is being
> constructed from the `soc` (`k3`) and `board` (`am62x`) environment
> variables, resulting in u-Boot trying to retrieve
> `/dtbs/6.8.1+/k3-am62x.dtb`. This file doesn't exist.
> 
> The environment variables `default_device_tree` and
> `default_device_tree_arch` are set in the config, the `findfdt` script
> can be called to construct `fdtfile` from the environment variables set
> by these config options, however this script currently isn't being run.
> 
> Calling this script results in the correct device tree being retrieved:
> 
>    Retrieving file: /dtbs/6.8.1+/ti/k3-am625-sk.dtb
> 
> Many boards are calling this script as part of their boot command. The
> am62x currently isn't. Rectify this so that booting works correctly.
> 
> Signed-off-by: Martyn Welch 

Would this also be appropriate to add to the defconfig for other AM62x boards
(e.g beagleplay) ?

Anyway, for this device:

Reviewed-by: Christopher Obbard 

> ---
>  configs/am62x_evm_a53_defconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/configs/am62x_evm_a53_defconfig
> b/configs/am62x_evm_a53_defconfig
> index 78287ec18a..e373e44a93 100644
> --- a/configs/am62x_evm_a53_defconfig
> +++ b/configs/am62x_evm_a53_defconfig
> @@ -30,7 +30,7 @@ CONFIG_SPL_LOAD_FIT=y
>  CONFIG_SPL_LOAD_FIT_ADDRESS=0x8100
>  CONFIG_BOOTSTD_FULL=y
>  CONFIG_SYS_BOOTM_LEN=0x80
> -CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb"
> +CONFIG_BOOTCOMMAND="run findfdt; run envboot; bootflow scan -lb"
>  CONFIG_BOARD_LATE_INIT=y
>  CONFIG_SPL_MAX_SIZE=0x58000
>  CONFIG_SPL_HAS_BSS_LINKER_SECTION=y

Thanks!

Chris

[PATCH] am625x_evm_a53: Tweak boot command to set fdt

[Martyn Welch]

With the current config for tha SK-AM62, fdtfile isn't set in the U-Boot
environment. When using bootflow to boot from a block device, where the
extlinux.conf file specifies `fdtdir`, a fallback device tree is being
constructed from the `soc` (`k3`) and `board` (`am62x`) environment
variables, resulting in u-Boot trying to retrieve
`/dtbs/6.8.1+/k3-am62x.dtb`. This file doesn't exist.

The environment variables `default_device_tree` and
`default_device_tree_arch` are set in the config, the `findfdt` script
can be called to construct `fdtfile` from the environment variables set
by these config options, however this script currently isn't being run.

Calling this script results in the correct device tree being retrieved:

   Retrieving file: /dtbs/6.8.1+/ti/k3-am625-sk.dtb

Many boards are calling this script as part of their boot command. The
am62x currently isn't. Rectify this so that booting works correctly.

Signed-off-by: Martyn Welch 
---
 configs/am62x_evm_a53_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig
index 78287ec18a..e373e44a93 100644
--- a/configs/am62x_evm_a53_defconfig
+++ b/configs/am62x_evm_a53_defconfig
@@ -30,7 +30,7 @@ CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_LOAD_FIT_ADDRESS=0x8100
 CONFIG_BOOTSTD_FULL=y
 CONFIG_SYS_BOOTM_LEN=0x80
-CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb"
+CONFIG_BOOTCOMMAND="run findfdt; run envboot; bootflow scan -lb"
 CONFIG_BOARD_LATE_INIT=y
 CONFIG_SPL_MAX_SIZE=0x58000
 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-- 
2.43.0

Re: [PATCH 00/12] arm: xea: Provide support for different XEA board HW versions

[Lukasz Majewski]

Hi Fabio,

> Hi Lukasz,
> 
> On Mon, Mar 25, 2024 at 5:48 AM Lukasz Majewski  wrote:
> 
> > The case here is that I'm modifying the *-u-boot.dts{i} files only.
> > In  
> 
> The diff below shows that you are creating imx28-xea-1.dts and
> imx28-xea-2.dts for U-Boot consumption and renaming the upstream
> imx28-xea.dts to imx28-xea.dts.
> 
> create mode 100644 arch/arm/dts/imx28-xea-1.dts
> create mode 100644 arch/arm/dts/imx28-xea-2-u-boot.dtsi
> create mode 100644 arch/arm/dts/imx28-xea-2.dts
> rename arch/arm/dts/{imx28-xea.dts => imx28-xea.dtsi} (100%)
> 

Yes, exactly.

> > other words, u-boot will not support features described in Linux
> > DTS.  
> 
> That's OK and this happens frequently.
> 
> For example, upstream devicetree may describes audio codec,
> but U-Boot does not support audio playback.
> 
> Devicetree should be OS agnostic.
> 

Ok.

> In U-Boot, we want to re-use the upstream Linux devicetree files
> 'as-is'.
> 

Yes, I'm fully aware of this. However, the U-Boot size increases
rapidly...

> Adding -u-boot.dtsi files is OK though.
> 

Yes, this is a good way (with /delete-node) to reduce the size.

> Can you convert the imx28-xea board to OF_UPSTREAM available in the
> U-Boot next branch?

I will check if XEA can be moved to OF_UPSTREAM.

> 
> > Hence, the rename of files (which would be in sync with Linux at
> > some point) looks like not related to Linux DTS (as even after
> > re-sync with upstream Linux those changes will not be in Linux
> > DTS).  
> 
> I did not understand this part, do you mean that Linux will also do
> the imx28-xea.dts => imx28-xea.dtsi rename and will also have the new
> imx28-xea-1.dts and imx28-xea-2.dts?

Yes. Exactly. I started the conversion from u-boot. Updating Linux DTS
will be next.

> 
> Regards,
> 
> Fabio Estevam




Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,  Managing Director: Erika Unter
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lu...@denx.de


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Description: OpenPGP digital signature

Re: [PATCH 3/4] arm: dts: k3-*-binman.dtsi: Clean up and templatize boot binaries

[Michael Walle]

Hi,

On Fri Mar 22, 2024 at 2:10 PM CET, Neha Malcom Francis wrote:
> Clean up templatized boot binaries for all K3 boards. This includes
> modifying the k3-binman.dtsi to use SPL_BOARD_DTB, BOARD_DESCRIPTION and
> UBOOT_BOARD_DESCRIPTION from the files that include it to further reuse
> code.
>
> All k3--binman.dtsi will contain only templates. Only required boot
> binaries can be built from the templates in the boards' respective
> -u-boot.dtsi file (or k3--binman.dtsi if it exists). This allows
> clear distinction between the SoC common stuff vs. what is additionally
> needed to boot up a specific board.

I appreciate the cleanup. But as far as I can see, a board might
only have one device tree. How would that work if the uboot proper
must support multiple device trees?

Thanks,
-michael


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Description: PGP signature

[GIT PULL] u-boot-riscv/master

[Leo Liang]

Hi Tom,

The following changes since commit dde373bde392c38649c8c4420e0c98ef8d38d9dc:

  Prepare v2024.04-rc5 (2024-03-25 21:56:50 -0400)

are available in the Git repository at:

  https://source.denx.de/u-boot/custodians/u-boot-riscv.git 

for you to fetch changes up to 0cfe1bc6ed9b322d2b03ded3175ac5de3ed2b784:

  spl: riscv: opensbi: fix check of PAYLOAD_ARGS_ADDR (2024-03-26 17:31:24 
+0800)

CI result shows no issue: 
https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/20075


- Fix RISC-V falcon mode booting issue


Randolph (1):
  spl: riscv: opensbi: fix check of PAYLOAD_ARGS_ADDR

 common/spl/spl_opensbi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Best regards,
Leo

Re: U-boot fails for khadas-edge -v

[Fabio Estevam]

Hi Vivek,

[Please don't top-post and do not post HTML]

On Mon, Mar 25, 2024 at 1:37 PM Vivek Jaiswal  wrote:
>
> Hello Fabio,
> I tried using the this github repository.
> https://github.com/u-boot/u-boot.git
>
> And the configuration used was following
>
> rockchip-rk3399-khadas-edge-v.conf
>
> UBOOT_MACHINE = "khadas-edge-v-rk3399_defconfig"
>
> I got some error during the build from the u-boot.
>
> Please check the attachment BuildError1.txt or BuildError2.txt
>
> make[2]: *** 
> [/home/vjaiswal/dev/Projects/SOLAR/khadas-dev/forTesting/yocto2_actual_meta_rockchip/build/tmp/work/rockchip_rk3399_khadas_edge_v-poky-linux/u-boot-rockchip/1_2017.09-r0/git/scripts/Makefile.build:280:
>  cmd/bootm.o] Error 1
> make[1]: *** 
> [/home/vjaiswal/dev/Projects/SOLAR/khadas-dev/forTesting/yocto2_actual_meta_rockchip/build/tmp/work/rockchip_rk3399_khadas_edge_v-poky-linux/u-boot-rockchip/1_2017.09-r0/git/Makefile:1317:
>  cmd] Error 2
> make: *** [Makefile:157: sub-make] Error 2

You are trying to build U-Boot 2017.09.

U-Boot 2024.01 builds khadas-edge-v-rk3399_defconfig just fine.

Re: [PATCH 3/4] arm: dts: k3-*-binman.dtsi: Clean up and templatize boot binaries

[Neha Malcom Francis]

Hi Nishanth

On 26/03/24 17:57, Nishanth Menon wrote:

On 18:40-20240322, Neha Malcom Francis wrote:

Clean up templatized boot binaries for all K3 boards. This includes
modifying the k3-binman.dtsi to use SPL_BOARD_DTB, BOARD_DESCRIPTION and
UBOOT_BOARD_DESCRIPTION from the files that include it to further reuse
code.

All k3--binman.dtsi will contain only templates. Only required boot
binaries can be built from the templates in the boards' respective
-u-boot.dtsi file (or k3--binman.dtsi if it exists). This allows
clear distinction between the SoC common stuff vs. what is additionally
needed to boot up a specific board.

Signed-off-by: Neha Malcom Francis 
---
  arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi  | 161 +-
  arch/arm/dts/k3-am625-phycore-som-binman.dtsi | 291 +
  arch/arm/dts/k3-am625-r5-beagleplay.dts   |  39 ---
  arch/arm/dts/k3-am625-sk-binman.dtsi  | 148 +
  arch/arm/dts/k3-am625-sk-u-boot.dtsi  |  42 +++
  .../dts/k3-am625-verdin-wifi-dev-binman.dtsi  | 296 +-
  arch/arm/dts/k3-am62a-sk-binman.dtsi  | 146 +
  arch/arm/dts/k3-am62a7-sk-u-boot.dtsi |  42 +++
  arch/arm/dts/k3-am642-evm-u-boot.dtsi |  42 +++
  arch/arm/dts/k3-am642-sk-u-boot.dtsi  |  42 +++
  arch/arm/dts/k3-am64x-binman.dtsi | 239 +-
  arch/arm/dts/k3-am654-base-board-u-boot.dtsi  |  49 +++
  arch/arm/dts/k3-am65x-binman.dtsi | 144 +
  .../arm/dts/k3-am68-sk-base-board-u-boot.dtsi |  26 ++
  arch/arm/dts/k3-am69-sk-u-boot.dtsi   |  31 +-
  arch/arm/dts/k3-binman.dtsi   |  96 ++
  arch/arm/dts/k3-j7200-binman.dtsi | 145 +
  .../k3-j7200-common-proc-board-u-boot.dtsi|  40 +++
  .../dts/k3-j721e-beagleboneai64-u-boot.dtsi   | 154 +
  arch/arm/dts/k3-j721e-binman.dtsi | 262 +++-
  .../k3-j721e-common-proc-board-u-boot.dtsi|  84 +
  arch/arm/dts/k3-j721e-r5-beagleboneai64.dts   |  91 +-
  arch/arm/dts/k3-j721e-sk-u-boot.dtsi  |  84 +
  arch/arm/dts/k3-j721s2-binman.dtsi| 231 +-
  .../k3-j721s2-common-proc-board-u-boot.dtsi   |  42 +++
  arch/arm/dts/k3-j784s4-binman.dtsi| 154 +
  arch/arm/dts/k3-j784s4-evm-u-boot.dtsi|  42 +++
  27 files changed, 858 insertions(+), 2305 deletions(-)

diff --git a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi 
b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
index cca0f44b7d8..fc1898f1510 100644
--- a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
@@ -6,7 +6,11 @@
   * Copyright (C) 2022-2023 Robert Nelson, BeagleBoard.org Foundation
   */
  
-#include "k3-binman.dtsi"

+#define SPL_BOARD_DTB "spl/dts/k3-am625-beagleplay.dtb"
+#define BOARD_DESCRIPTION "k3-am625-beagleplay"
+#define UBOOT_BOARD_DESCRIPTION "U-Boot for AM625 BeaglePlay"
+
+#include "k3-am625-sk-binman.dtsi"


Drop the "sk" ?



Yes Andrew had pointed it out earlier, will make the change in the next version.

--
Thanking You
Neha Malcom Francis

Re: [PATCH] imx8: Add a default reset_cpu() implementation

[Hiago De Franco]

On Tue, Mar 26, 2024 at 09:19:49AM -0300, Fabio Estevam wrote:
> From: Fabio Estevam 
> 
> Add a weak default reset_cpu() implementation just like
> it is done on arch/arm/mach-imx/cpu.c.
> 
> This allows the removal of the empty reset_cpu() in several
> board files.
> 
> Signed-off-by: Fabio Estevam 

Thanks Fabio!

Tested-by: Hiago De Franco  # Toradex Colibri iMX8X

> ---
>  arch/arm/mach-imx/imx8/cpu.c  |  4 
>  board/advantech/imx8qm_dmsse20_a1/imx8qm_dmsse20_a1.c | 11 ---
>  board/advantech/imx8qm_rom7720_a1/imx8qm_rom7720_a1.c |  8 
>  board/congatec/cgtqmx8/cgtqmx8.c  |  7 ---
>  board/freescale/imx8qm_mek/imx8qm_mek.c   |  8 
>  board/freescale/imx8qxp_mek/imx8qxp_mek.c |  8 
>  board/toradex/apalis-imx8/apalis-imx8.c   |  8 
>  board/toradex/colibri-imx8x/colibri-imx8x.c   |  8 
>  8 files changed, 4 insertions(+), 58 deletions(-)
> 
> diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c
> index 0b91e448a5d..6e643188f40 100644
> --- a/arch/arm/mach-imx/imx8/cpu.c
> +++ b/arch/arm/mach-imx/imx8/cpu.c
> @@ -84,6 +84,10 @@ static char *get_reset_cause(void)
>   }
>  }
>  
> +__weak void reset_cpu(void)
> +{
> +}
> +
>  int arch_cpu_init(void)
>  {
>  #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_RECOVER_DATA_SECTION)
> diff --git a/board/advantech/imx8qm_dmsse20_a1/imx8qm_dmsse20_a1.c 
> b/board/advantech/imx8qm_dmsse20_a1/imx8qm_dmsse20_a1.c
> index 8b4d73052eb..56b7bdb57c9 100644
> --- a/board/advantech/imx8qm_dmsse20_a1/imx8qm_dmsse20_a1.c
> +++ b/board/advantech/imx8qm_dmsse20_a1/imx8qm_dmsse20_a1.c
> @@ -136,17 +136,6 @@ void detail_board_ddr_info(void)
>   puts("\nDDR");
>  }
>  
> -/*
> - * Board specific reset that is system reset.
> - */
> -void reset_cpu(void)
> -{
> - puts("SCI reboot request");
> -
> - while (1)
> - putc('.');
> -}
> -
>  #ifdef CONFIG_OF_BOARD_SETUP
>  int ft_board_setup(void *blob, struct bd_info *bd)
>  {
> diff --git a/board/advantech/imx8qm_rom7720_a1/imx8qm_rom7720_a1.c 
> b/board/advantech/imx8qm_rom7720_a1/imx8qm_rom7720_a1.c
> index 206ce7d5c13..7f766a688bb 100644
> --- a/board/advantech/imx8qm_rom7720_a1/imx8qm_rom7720_a1.c
> +++ b/board/advantech/imx8qm_rom7720_a1/imx8qm_rom7720_a1.c
> @@ -112,14 +112,6 @@ int board_init(void)
>   return 0;
>  }
>  
> -/*
> - * Board specific reset that is system reset.
> - */
> -void reset_cpu(void)
> -{
> - /* TODO */
> -}
> -
>  int board_mmc_get_env_dev(int devno)
>  {
>   return devno;
> diff --git a/board/congatec/cgtqmx8/cgtqmx8.c 
> b/board/congatec/cgtqmx8/cgtqmx8.c
> index 26189ff66f5..3b01354bb6b 100644
> --- a/board/congatec/cgtqmx8/cgtqmx8.c
> +++ b/board/congatec/cgtqmx8/cgtqmx8.c
> @@ -371,13 +371,6 @@ void detail_board_ddr_info(void)
>   puts("\nDDR");
>  }
>  
> -/*
> - * Board specific reset that is system reset.
> - */
> -void reset_cpu(void)
> -{
> - /* TODO */
> -}
>  
>  #ifdef CONFIG_OF_BOARD_SETUP
>  int ft_board_setup(void *blob, struct bd_info *bd)
> diff --git a/board/freescale/imx8qm_mek/imx8qm_mek.c 
> b/board/freescale/imx8qm_mek/imx8qm_mek.c
> index d96d1d07bb1..2b209c8886f 100644
> --- a/board/freescale/imx8qm_mek/imx8qm_mek.c
> +++ b/board/freescale/imx8qm_mek/imx8qm_mek.c
> @@ -102,14 +102,6 @@ int board_init(void)
>   return 0;
>  }
>  
> -/*
> - * Board specific reset that is system reset.
> - */
> -void reset_cpu(void)
> -{
> - /* TODO */
> -}
> -
>  #ifdef CONFIG_OF_BOARD_SETUP
>  int ft_board_setup(void *blob, struct bd_info *bd)
>  {
> diff --git a/board/freescale/imx8qxp_mek/imx8qxp_mek.c 
> b/board/freescale/imx8qxp_mek/imx8qxp_mek.c
> index 516cefd2f24..833bee55462 100644
> --- a/board/freescale/imx8qxp_mek/imx8qxp_mek.c
> +++ b/board/freescale/imx8qxp_mek/imx8qxp_mek.c
> @@ -126,14 +126,6 @@ int board_init(void)
>   return 0;
>  }
>  
> -/*
> - * Board specific reset that is system reset.
> - */
> -void reset_cpu(void)
> -{
> - /* TODO */
> -}
> -
>  #ifdef CONFIG_OF_BOARD_SETUP
>  int ft_board_setup(void *blob, struct bd_info *bd)
>  {
> diff --git a/board/toradex/apalis-imx8/apalis-imx8.c 
> b/board/toradex/apalis-imx8/apalis-imx8.c
> index 49719f2f553..0f993e644d7 100644
> --- a/board/toradex/apalis-imx8/apalis-imx8.c
> +++ b/board/toradex/apalis-imx8/apalis-imx8.c
> @@ -291,14 +291,6 @@ int board_init(void)
>   return 0;
>  }
>  
> -/*
> - * Board specific reset that is system reset.
> - */
> -void reset_cpu(void)
> -{
> - /* TODO */
> -}
> -
>  #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
>  int ft_board_setup(void *blob, struct bd_info *bd)
>  {
> diff --git a/board/toradex/colibri-imx8x/colibri-imx8x.c 
> b/board/toradex/colibri-imx8x/colibri-imx8x.c
> index 6fc8076163c..a507d666c07 100644
> --- a/board/toradex/colibri-imx8x/colibri-imx8x.c
> +++ b/board/toradex/colibri-imx8x/colibri-imx8x.c
> @@ -140,14 +140,6 

Re: [PATCH 3/4] arm: dts: k3-*-binman.dtsi: Clean up and templatize boot binaries

[Nishanth Menon]

On 18:40-20240322, Neha Malcom Francis wrote:
> Clean up templatized boot binaries for all K3 boards. This includes
> modifying the k3-binman.dtsi to use SPL_BOARD_DTB, BOARD_DESCRIPTION and
> UBOOT_BOARD_DESCRIPTION from the files that include it to further reuse
> code.
> 
> All k3--binman.dtsi will contain only templates. Only required boot
> binaries can be built from the templates in the boards' respective
> -u-boot.dtsi file (or k3--binman.dtsi if it exists). This allows
> clear distinction between the SoC common stuff vs. what is additionally
> needed to boot up a specific board.
> 
> Signed-off-by: Neha Malcom Francis 
> ---
>  arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi  | 161 +-
>  arch/arm/dts/k3-am625-phycore-som-binman.dtsi | 291 +
>  arch/arm/dts/k3-am625-r5-beagleplay.dts   |  39 ---
>  arch/arm/dts/k3-am625-sk-binman.dtsi  | 148 +
>  arch/arm/dts/k3-am625-sk-u-boot.dtsi  |  42 +++
>  .../dts/k3-am625-verdin-wifi-dev-binman.dtsi  | 296 +-
>  arch/arm/dts/k3-am62a-sk-binman.dtsi  | 146 +
>  arch/arm/dts/k3-am62a7-sk-u-boot.dtsi |  42 +++
>  arch/arm/dts/k3-am642-evm-u-boot.dtsi |  42 +++
>  arch/arm/dts/k3-am642-sk-u-boot.dtsi  |  42 +++
>  arch/arm/dts/k3-am64x-binman.dtsi | 239 +-
>  arch/arm/dts/k3-am654-base-board-u-boot.dtsi  |  49 +++
>  arch/arm/dts/k3-am65x-binman.dtsi | 144 +
>  .../arm/dts/k3-am68-sk-base-board-u-boot.dtsi |  26 ++
>  arch/arm/dts/k3-am69-sk-u-boot.dtsi   |  31 +-
>  arch/arm/dts/k3-binman.dtsi   |  96 ++
>  arch/arm/dts/k3-j7200-binman.dtsi | 145 +
>  .../k3-j7200-common-proc-board-u-boot.dtsi|  40 +++
>  .../dts/k3-j721e-beagleboneai64-u-boot.dtsi   | 154 +
>  arch/arm/dts/k3-j721e-binman.dtsi | 262 +++-
>  .../k3-j721e-common-proc-board-u-boot.dtsi|  84 +
>  arch/arm/dts/k3-j721e-r5-beagleboneai64.dts   |  91 +-
>  arch/arm/dts/k3-j721e-sk-u-boot.dtsi  |  84 +
>  arch/arm/dts/k3-j721s2-binman.dtsi| 231 +-
>  .../k3-j721s2-common-proc-board-u-boot.dtsi   |  42 +++
>  arch/arm/dts/k3-j784s4-binman.dtsi| 154 +
>  arch/arm/dts/k3-j784s4-evm-u-boot.dtsi|  42 +++
>  27 files changed, 858 insertions(+), 2305 deletions(-)
> 
> diff --git a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi 
> b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
> index cca0f44b7d8..fc1898f1510 100644
> --- a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
> +++ b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
> @@ -6,7 +6,11 @@
>   * Copyright (C) 2022-2023 Robert Nelson, BeagleBoard.org Foundation
>   */
>  
> -#include "k3-binman.dtsi"
> +#define SPL_BOARD_DTB "spl/dts/k3-am625-beagleplay.dtb"
> +#define BOARD_DESCRIPTION "k3-am625-beagleplay"
> +#define UBOOT_BOARD_DESCRIPTION "U-Boot for AM625 BeaglePlay"
> +
> +#include "k3-am625-sk-binman.dtsi"

Drop the "sk" ?

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 
849D 1736 249D

[PATCH] imx8: Add a default reset_cpu() implementation

[Fabio Estevam]

From: Fabio Estevam 

Add a weak default reset_cpu() implementation just like
it is done on arch/arm/mach-imx/cpu.c.

This allows the removal of the empty reset_cpu() in several
board files.

Signed-off-by: Fabio Estevam 
---
 arch/arm/mach-imx/imx8/cpu.c  |  4 
 board/advantech/imx8qm_dmsse20_a1/imx8qm_dmsse20_a1.c | 11 ---
 board/advantech/imx8qm_rom7720_a1/imx8qm_rom7720_a1.c |  8 
 board/congatec/cgtqmx8/cgtqmx8.c  |  7 ---
 board/freescale/imx8qm_mek/imx8qm_mek.c   |  8 
 board/freescale/imx8qxp_mek/imx8qxp_mek.c |  8 
 board/toradex/apalis-imx8/apalis-imx8.c   |  8 
 board/toradex/colibri-imx8x/colibri-imx8x.c   |  8 
 8 files changed, 4 insertions(+), 58 deletions(-)

diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c
index 0b91e448a5d..6e643188f40 100644
--- a/arch/arm/mach-imx/imx8/cpu.c
+++ b/arch/arm/mach-imx/imx8/cpu.c
@@ -84,6 +84,10 @@ static char *get_reset_cause(void)
}
 }
 
+__weak void reset_cpu(void)
+{
+}
+
 int arch_cpu_init(void)
 {
 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_RECOVER_DATA_SECTION)
diff --git a/board/advantech/imx8qm_dmsse20_a1/imx8qm_dmsse20_a1.c 
b/board/advantech/imx8qm_dmsse20_a1/imx8qm_dmsse20_a1.c
index 8b4d73052eb..56b7bdb57c9 100644
--- a/board/advantech/imx8qm_dmsse20_a1/imx8qm_dmsse20_a1.c
+++ b/board/advantech/imx8qm_dmsse20_a1/imx8qm_dmsse20_a1.c
@@ -136,17 +136,6 @@ void detail_board_ddr_info(void)
puts("\nDDR");
 }
 
-/*
- * Board specific reset that is system reset.
- */
-void reset_cpu(void)
-{
-   puts("SCI reboot request");
-
-   while (1)
-   putc('.');
-}
-
 #ifdef CONFIG_OF_BOARD_SETUP
 int ft_board_setup(void *blob, struct bd_info *bd)
 {
diff --git a/board/advantech/imx8qm_rom7720_a1/imx8qm_rom7720_a1.c 
b/board/advantech/imx8qm_rom7720_a1/imx8qm_rom7720_a1.c
index 206ce7d5c13..7f766a688bb 100644
--- a/board/advantech/imx8qm_rom7720_a1/imx8qm_rom7720_a1.c
+++ b/board/advantech/imx8qm_rom7720_a1/imx8qm_rom7720_a1.c
@@ -112,14 +112,6 @@ int board_init(void)
return 0;
 }
 
-/*
- * Board specific reset that is system reset.
- */
-void reset_cpu(void)
-{
-   /* TODO */
-}
-
 int board_mmc_get_env_dev(int devno)
 {
return devno;
diff --git a/board/congatec/cgtqmx8/cgtqmx8.c b/board/congatec/cgtqmx8/cgtqmx8.c
index 26189ff66f5..3b01354bb6b 100644
--- a/board/congatec/cgtqmx8/cgtqmx8.c
+++ b/board/congatec/cgtqmx8/cgtqmx8.c
@@ -371,13 +371,6 @@ void detail_board_ddr_info(void)
puts("\nDDR");
 }
 
-/*
- * Board specific reset that is system reset.
- */
-void reset_cpu(void)
-{
-   /* TODO */
-}
 
 #ifdef CONFIG_OF_BOARD_SETUP
 int ft_board_setup(void *blob, struct bd_info *bd)
diff --git a/board/freescale/imx8qm_mek/imx8qm_mek.c 
b/board/freescale/imx8qm_mek/imx8qm_mek.c
index d96d1d07bb1..2b209c8886f 100644
--- a/board/freescale/imx8qm_mek/imx8qm_mek.c
+++ b/board/freescale/imx8qm_mek/imx8qm_mek.c
@@ -102,14 +102,6 @@ int board_init(void)
return 0;
 }
 
-/*
- * Board specific reset that is system reset.
- */
-void reset_cpu(void)
-{
-   /* TODO */
-}
-
 #ifdef CONFIG_OF_BOARD_SETUP
 int ft_board_setup(void *blob, struct bd_info *bd)
 {
diff --git a/board/freescale/imx8qxp_mek/imx8qxp_mek.c 
b/board/freescale/imx8qxp_mek/imx8qxp_mek.c
index 516cefd2f24..833bee55462 100644
--- a/board/freescale/imx8qxp_mek/imx8qxp_mek.c
+++ b/board/freescale/imx8qxp_mek/imx8qxp_mek.c
@@ -126,14 +126,6 @@ int board_init(void)
return 0;
 }
 
-/*
- * Board specific reset that is system reset.
- */
-void reset_cpu(void)
-{
-   /* TODO */
-}
-
 #ifdef CONFIG_OF_BOARD_SETUP
 int ft_board_setup(void *blob, struct bd_info *bd)
 {
diff --git a/board/toradex/apalis-imx8/apalis-imx8.c 
b/board/toradex/apalis-imx8/apalis-imx8.c
index 49719f2f553..0f993e644d7 100644
--- a/board/toradex/apalis-imx8/apalis-imx8.c
+++ b/board/toradex/apalis-imx8/apalis-imx8.c
@@ -291,14 +291,6 @@ int board_init(void)
return 0;
 }
 
-/*
- * Board specific reset that is system reset.
- */
-void reset_cpu(void)
-{
-   /* TODO */
-}
-
 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
 int ft_board_setup(void *blob, struct bd_info *bd)
 {
diff --git a/board/toradex/colibri-imx8x/colibri-imx8x.c 
b/board/toradex/colibri-imx8x/colibri-imx8x.c
index 6fc8076163c..a507d666c07 100644
--- a/board/toradex/colibri-imx8x/colibri-imx8x.c
+++ b/board/toradex/colibri-imx8x/colibri-imx8x.c
@@ -140,14 +140,6 @@ int board_init(void)
return 0;
 }
 
-/*
- * Board specific reset that is system reset.
- */
-void reset_cpu(void)
-{
-   /* TODO */
-}
-
 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
 int ft_board_setup(void *blob, struct bd_info *bd)
 {
-- 
2.34.1

[PATCH v2 11/11] net: dwc_eth_qos: Add support for st, ext-phyclk property

[Marek Vasut]

The "st,ext-phyclk" property is a unification of "st,eth-clk-sel"
and "st,eth-ref-clk-sel" properties. All three properties define
ETH CK clock direction, however:
- "st,eth-clk-sel" selects clock direction for GMII/RGMII mode
- "st,eth-ref-clk-sel" selects clock direction for RMII mode
- "st,ext-phyclk" selects clock direction for all RMII/GMII/RGMII modes
The "st,ext-phyclk" is the preferrable property to use.

Signed-off-by: Marek Vasut 
---
Cc: Christophe Roullier 
Cc: Joe Hershberger 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
Cc: Ramon Fried 
Cc: u-b...@dh-electronics.com
Cc: uboot-st...@st-md-mailman.stormreply.com
---
V2: New patch
---
 drivers/net/dwc_eth_qos_stm32.c | 30 +++---
 1 file changed, 27 insertions(+), 3 deletions(-)

diff --git a/drivers/net/dwc_eth_qos_stm32.c b/drivers/net/dwc_eth_qos_stm32.c
index 435473f99a6..9ee82b54c62 100644
--- a/drivers/net/dwc_eth_qos_stm32.c
+++ b/drivers/net/dwc_eth_qos_stm32.c
@@ -140,6 +140,8 @@ static int eqos_probe_syscfg_stm32(struct udevice *dev,
const bool is_mp13 = device_is_compatible(dev, "st,stm32mp13-dwmac");
/* Gigabit Ethernet 125MHz clock selection. */
const bool eth_clk_sel = dev_read_bool(dev, "st,eth-clk-sel");
+   /* Ethernet clock source is RCC. */
+   const bool ext_phyclk = dev_read_bool(dev, "st,ext-phyclk");
struct regmap *regmap;
u32 regmap_mask;
u32 value;
@@ -156,6 +158,12 @@ static int eqos_probe_syscfg_stm32(struct udevice *dev,
dev_dbg(dev, "PHY_INTERFACE_MODE_MII\n");
value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
   SYSCFG_PMCSETR_ETH_SEL_GMII_MII);
+   /*
+* STM32MP15xx supports both MII and GMII, STM32MP13xx MII only.
+* SYSCFG_PMCSETR ETH_SELMII is present only on STM32MP15xx and
+* acts as a selector between 0:GMII and 1:MII. As STM32MP13xx
+* supports only MII, ETH_SELMII is not present.
+*/
if (!is_mp13)   /* Select MII mode on STM32MP15xx */
value |= SYSCFG_PMCSETR_ETH_SELMII;
break;
@@ -163,14 +171,25 @@ static int eqos_probe_syscfg_stm32(struct udevice *dev,
dev_dbg(dev, "PHY_INTERFACE_MODE_GMII\n");
value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
   SYSCFG_PMCSETR_ETH_SEL_GMII_MII);
-   if (eth_clk_sel)
+   /*
+* If eth_clk_sel is set, use internal ETH_CLKx clock from RCC,
+* otherwise use external clock from IO pin (requires matching
+* GPIO block AF setting of that pin).
+*/
+   if (eth_clk_sel || ext_phyclk)
value |= SYSCFG_PMCSETR_ETH_CLK_SEL;
break;
case PHY_INTERFACE_MODE_RMII:
dev_dbg(dev, "PHY_INTERFACE_MODE_RMII\n");
value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
   SYSCFG_PMCSETR_ETH_SEL_RMII);
-   if (eth_ref_clk_sel)
+   /*
+* If eth_ref_clk_sel is set, use internal clock from RCC,
+* otherwise use external clock from ETHn_RX_CLK/ETHn_REF_CLK
+* IO pin (requires matching GPIO block AF setting of that
+* pin).
+*/
+   if (eth_ref_clk_sel || ext_phyclk)
value |= SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
break;
case PHY_INTERFACE_MODE_RGMII:
@@ -180,7 +199,12 @@ static int eqos_probe_syscfg_stm32(struct udevice *dev,
dev_dbg(dev, "PHY_INTERFACE_MODE_RGMII\n");
value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
   SYSCFG_PMCSETR_ETH_SEL_RGMII);
-   if (eth_clk_sel)
+   /*
+* If eth_clk_sel is set, use internal ETH_CLKx clock from RCC,
+* otherwise use external clock from ETHx_CLK125 pin (requires
+* matching GPIO block AF setting of that pin).
+*/
+   if (eth_clk_sel || ext_phyclk)
value |= SYSCFG_PMCSETR_ETH_CLK_SEL;
break;
default:
-- 
2.43.0

[PATCH v2 10/11] net: dwc_eth_qos: Add support of STM32MP13xx platform

[Marek Vasut]

From: Christophe Roullier 

Add compatible "st,stm32mp13-dwmac" to manage STM32MP13 boards.

Reviewed-by: Patrice Chotard 
Signed-off-by: Christophe Roullier 
Signed-off-by: Marek Vasut  # Rebase, reshuffle, squash code
---
Cc: Christophe Roullier 
Cc: Joe Hershberger 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
Cc: Ramon Fried 
Cc: u-b...@dh-electronics.com
Cc: uboot-st...@st-md-mailman.stormreply.com
---
V2: Add RB from Patrice
---
 drivers/net/dwc_eth_qos.c   |  4 
 drivers/net/dwc_eth_qos.h   |  1 +
 drivers/net/dwc_eth_qos_stm32.c | 11 +++
 3 files changed, 16 insertions(+)

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 203bfc0848c..e02317905e5 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1505,6 +1505,10 @@ static const struct udevice_id eqos_ids[] = {
},
 #endif
 #if IS_ENABLED(CONFIG_DWC_ETH_QOS_STM32)
+   {
+   .compatible = "st,stm32mp13-dwmac",
+   .data = (ulong)_stm32mp13_config
+   },
{
.compatible = "st,stm32mp1-dwmac",
.data = (ulong)_stm32mp15_config
diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h
index bafd0d339fb..8b3d0d464d3 100644
--- a/drivers/net/dwc_eth_qos.h
+++ b/drivers/net/dwc_eth_qos.h
@@ -290,5 +290,6 @@ int eqos_null_ops(struct udevice *dev);
 extern struct eqos_config eqos_imx_config;
 extern struct eqos_config eqos_rockchip_config;
 extern struct eqos_config eqos_qcom_config;
+extern struct eqos_config eqos_stm32mp13_config;
 extern struct eqos_config eqos_stm32mp15_config;
 extern struct eqos_config eqos_jh7110_config;
diff --git a/drivers/net/dwc_eth_qos_stm32.c b/drivers/net/dwc_eth_qos_stm32.c
index 5a20fe5bea2..435473f99a6 100644
--- a/drivers/net/dwc_eth_qos_stm32.c
+++ b/drivers/net/dwc_eth_qos_stm32.c
@@ -279,6 +279,17 @@ static struct eqos_ops eqos_stm32_ops = {
.eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_stm32
 };
 
+struct eqos_config __maybe_unused eqos_stm32mp13_config = {
+   .reg_access_always_ok = false,
+   .mdio_wait = 1,
+   .swr_wait = 50,
+   .config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB,
+   .config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300,
+   .axi_bus_width = EQOS_AXI_WIDTH_32,
+   .interface = dev_read_phy_mode,
+   .ops = _stm32_ops
+};
+
 struct eqos_config __maybe_unused eqos_stm32mp15_config = {
.reg_access_always_ok = false,
.mdio_wait = 1,
-- 
2.43.0

[PATCH v2 09/11] net: dwc_eth_qos: Add DT parsing for STM32MP13xx platform

[Marek Vasut]

From: Christophe Roullier 

Manage 2 ethernet instances, select which instance to configure with mask
If mask is not present in DT, it is stm32mp15 platform.

Signed-off-by: Christophe Roullier 
Signed-off-by: Marek Vasut  # Rework the code
---
Cc: Christophe Roullier 
Cc: Joe Hershberger 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
Cc: Ramon Fried 
Cc: u-b...@dh-electronics.com
Cc: uboot-st...@st-md-mailman.stormreply.com
---
V2: - Drop unrelated clock frequency validation
- Move "st,ext-phyclk" property support into separate patch
- This leaves only the regmap parts here
---
 drivers/net/dwc_eth_qos_stm32.c | 41 ++---
 1 file changed, 28 insertions(+), 13 deletions(-)

diff --git a/drivers/net/dwc_eth_qos_stm32.c b/drivers/net/dwc_eth_qos_stm32.c
index 0b13d01346b..5a20fe5bea2 100644
--- a/drivers/net/dwc_eth_qos_stm32.c
+++ b/drivers/net/dwc_eth_qos_stm32.c
@@ -23,6 +23,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -33,11 +34,16 @@
 
 /* SYSCFG registers */
 #define SYSCFG_PMCSETR 0x04
-#define SYSCFG_PMCCLRR 0x44
+#define SYSCFG_PMCCLRR_MP130x08
+#define SYSCFG_PMCCLRR_MP150x44
+
+#define SYSCFG_PMCSETR_ETH1_MASK   GENMASK(23, 16)
+#define SYSCFG_PMCSETR_ETH2_MASK   GENMASK(31, 24)
 
 #define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
 #define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
 
+/* STM32MP15xx specific bit */
 #define SYSCFG_PMCSETR_ETH_SELMII  BIT(20)
 
 #define SYSCFG_PMCSETR_ETH_SEL_MASKGENMASK(23, 21)
@@ -130,23 +136,30 @@ static int eqos_probe_syscfg_stm32(struct udevice *dev,
 {
/* Ethernet 50MHz RMII clock selection. */
const bool eth_ref_clk_sel = dev_read_bool(dev, "st,eth-ref-clk-sel");
+   /* SoC is STM32MP13xx with two ethernet MACs */
+   const bool is_mp13 = device_is_compatible(dev, "st,stm32mp13-dwmac");
/* Gigabit Ethernet 125MHz clock selection. */
const bool eth_clk_sel = dev_read_bool(dev, "st,eth-clk-sel");
-   u8 *syscfg;
+   struct regmap *regmap;
+   u32 regmap_mask;
u32 value;
 
-   syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
-   if (!syscfg)
-   return -ENODEV;
+   regmap = syscon_regmap_lookup_by_phandle(dev, "st,syscon");
+   if (IS_ERR(regmap))
+   return PTR_ERR(regmap);
+
+   regmap_mask = dev_read_u32_index_default(dev, "st,syscon", 2,
+SYSCFG_PMCSETR_ETH1_MASK);
 
switch (interface_type) {
case PHY_INTERFACE_MODE_MII:
dev_dbg(dev, "PHY_INTERFACE_MODE_MII\n");
value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
   SYSCFG_PMCSETR_ETH_SEL_GMII_MII);
-   value |= SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
+   if (!is_mp13)   /* Select MII mode on STM32MP15xx */
+   value |= SYSCFG_PMCSETR_ETH_SELMII;
break;
-   case PHY_INTERFACE_MODE_GMII:
+   case PHY_INTERFACE_MODE_GMII:   /* STM32MP15xx only */
dev_dbg(dev, "PHY_INTERFACE_MODE_GMII\n");
value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
   SYSCFG_PMCSETR_ETH_SEL_GMII_MII);
@@ -177,13 +190,15 @@ static int eqos_probe_syscfg_stm32(struct udevice *dev,
return -EINVAL;
}
 
-   /* clear and set ETH configuration bits */
-   writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
-  SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
-  syscfg + SYSCFG_PMCCLRR);
-   writel(value, syscfg + SYSCFG_PMCSETR);
+   /* Shift value at correct ethernet MAC offset in SYSCFG_PMCSETR */
+   value <<= ffs(regmap_mask) - ffs(SYSCFG_PMCSETR_ETH1_MASK);
 
-   return 0;
+   /* Update PMCCLRR (clear register) */
+   regmap_write(regmap, is_mp13 ?
+SYSCFG_PMCCLRR_MP13 : SYSCFG_PMCCLRR_MP15,
+regmap_mask);
+
+   return regmap_update_bits(regmap, SYSCFG_PMCSETR, regmap_mask, value);
 }
 
 static int eqos_probe_resources_stm32(struct udevice *dev)
-- 
2.43.0

[PATCH v2 08/11] net: dwc_eth_qos: Constify st, eth-* values parsed out of DT

[Marek Vasut]

Use const bool for the values parsed out of DT. Drop the duplicate
assignment of false into those bool variables, assign them directly
with the content parsed out of DT. Abbreviate the variable name too.

Reviewed-by: Patrice Chotard 
Signed-off-by: Marek Vasut 
---
Cc: Christophe Roullier 
Cc: Joe Hershberger 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
Cc: Ramon Fried 
Cc: u-b...@dh-electronics.com
Cc: uboot-st...@st-md-mailman.stormreply.com
---
V2: - Add RB from Patrice
- Add trailing fullstop at the end of code comment
---
 drivers/net/dwc_eth_qos_stm32.c | 18 +++---
 1 file changed, 7 insertions(+), 11 deletions(-)

diff --git a/drivers/net/dwc_eth_qos_stm32.c b/drivers/net/dwc_eth_qos_stm32.c
index 72f65f80540..0b13d01346b 100644
--- a/drivers/net/dwc_eth_qos_stm32.c
+++ b/drivers/net/dwc_eth_qos_stm32.c
@@ -128,17 +128,13 @@ static int eqos_stop_clks_stm32(struct udevice *dev)
 static int eqos_probe_syscfg_stm32(struct udevice *dev,
   phy_interface_t interface_type)
 {
-   bool eth_ref_clk_sel_reg = false;
-   bool eth_clk_sel_reg = false;
+   /* Ethernet 50MHz RMII clock selection. */
+   const bool eth_ref_clk_sel = dev_read_bool(dev, "st,eth-ref-clk-sel");
+   /* Gigabit Ethernet 125MHz clock selection. */
+   const bool eth_clk_sel = dev_read_bool(dev, "st,eth-clk-sel");
u8 *syscfg;
u32 value;
 
-   /* Gigabit Ethernet 125MHz clock selection. */
-   eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel");
-
-   /* Ethernet 50Mhz RMII clock selection */
-   eth_ref_clk_sel_reg = dev_read_bool(dev, "st,eth-ref-clk-sel");
-
syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
if (!syscfg)
return -ENODEV;
@@ -154,14 +150,14 @@ static int eqos_probe_syscfg_stm32(struct udevice *dev,
dev_dbg(dev, "PHY_INTERFACE_MODE_GMII\n");
value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
   SYSCFG_PMCSETR_ETH_SEL_GMII_MII);
-   if (eth_clk_sel_reg)
+   if (eth_clk_sel)
value |= SYSCFG_PMCSETR_ETH_CLK_SEL;
break;
case PHY_INTERFACE_MODE_RMII:
dev_dbg(dev, "PHY_INTERFACE_MODE_RMII\n");
value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
   SYSCFG_PMCSETR_ETH_SEL_RMII);
-   if (eth_ref_clk_sel_reg)
+   if (eth_ref_clk_sel)
value |= SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
break;
case PHY_INTERFACE_MODE_RGMII:
@@ -171,7 +167,7 @@ static int eqos_probe_syscfg_stm32(struct udevice *dev,
dev_dbg(dev, "PHY_INTERFACE_MODE_RGMII\n");
value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
   SYSCFG_PMCSETR_ETH_SEL_RGMII);
-   if (eth_clk_sel_reg)
+   if (eth_clk_sel)
value |= SYSCFG_PMCSETR_ETH_CLK_SEL;
break;
default:
-- 
2.43.0

[PATCH v2 07/11] net: dwc_eth_qos: Use consistent logging prints

[Marek Vasut]

Use dev_*() only to print all the logs from this glue code,
instead of mixing dev_*(), log_*(), pr_*() all in one code.

Reviewed-by: Patrice Chotard 
Signed-off-by: Marek Vasut 
---
Cc: Christophe Roullier 
Cc: Joe Hershberger 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
Cc: Ramon Fried 
Cc: u-b...@dh-electronics.com
Cc: uboot-st...@st-md-mailman.stormreply.com
---
V2: Add RB from Patrice
---
 drivers/net/dwc_eth_qos_stm32.c | 52 ++---
 1 file changed, 28 insertions(+), 24 deletions(-)

diff --git a/drivers/net/dwc_eth_qos_stm32.c b/drivers/net/dwc_eth_qos_stm32.c
index 38037c47954..72f65f80540 100644
--- a/drivers/net/dwc_eth_qos_stm32.c
+++ b/drivers/net/dwc_eth_qos_stm32.c
@@ -63,36 +63,36 @@ static int eqos_start_clks_stm32(struct udevice *dev)
if (!CONFIG_IS_ENABLED(CLK))
return 0;
 
-   debug("%s(dev=%p):\n", __func__, dev);
+   dev_dbg(dev, "%s:\n", __func__);
 
ret = clk_enable(>clk_master_bus);
if (ret < 0) {
-   pr_err("clk_enable(clk_master_bus) failed: %d", ret);
+   dev_err(dev, "clk_enable(clk_master_bus) failed: %d\n", ret);
goto err;
}
 
ret = clk_enable(>clk_rx);
if (ret < 0) {
-   pr_err("clk_enable(clk_rx) failed: %d", ret);
+   dev_err(dev, "clk_enable(clk_rx) failed: %d\n", ret);
goto err_disable_clk_master_bus;
}
 
ret = clk_enable(>clk_tx);
if (ret < 0) {
-   pr_err("clk_enable(clk_tx) failed: %d", ret);
+   dev_err(dev, "clk_enable(clk_tx) failed: %d\n", ret);
goto err_disable_clk_rx;
}
 
if (clk_valid(>clk_ck) && !eqos->clk_ck_enabled) {
ret = clk_enable(>clk_ck);
if (ret < 0) {
-   pr_err("clk_enable(clk_ck) failed: %d", ret);
+   dev_err(dev, "clk_enable(clk_ck) failed: %d\n", ret);
goto err_disable_clk_tx;
}
eqos->clk_ck_enabled = true;
}
 
-   debug("%s: OK\n", __func__);
+   dev_dbg(dev, "%s: OK\n", __func__);
return 0;
 
 err_disable_clk_tx:
@@ -102,7 +102,8 @@ err_disable_clk_rx:
 err_disable_clk_master_bus:
clk_disable(>clk_master_bus);
 err:
-   debug("%s: FAILED: %d\n", __func__, ret);
+   dev_dbg(dev, "%s: FAILED: %d\n", __func__, ret);
+
return ret;
 }
 
@@ -113,13 +114,14 @@ static int eqos_stop_clks_stm32(struct udevice *dev)
if (!CONFIG_IS_ENABLED(CLK))
return 0;
 
-   debug("%s(dev=%p):\n", __func__, dev);
+   dev_dbg(dev, "%s:\n", __func__);
 
clk_disable(>clk_tx);
clk_disable(>clk_rx);
clk_disable(>clk_master_bus);
 
-   debug("%s: OK\n", __func__);
+   dev_dbg(dev, "%s: OK\n", __func__);
+
return 0;
 }
 
@@ -143,20 +145,20 @@ static int eqos_probe_syscfg_stm32(struct udevice *dev,
 
switch (interface_type) {
case PHY_INTERFACE_MODE_MII:
-   log_debug("PHY_INTERFACE_MODE_MII\n");
+   dev_dbg(dev, "PHY_INTERFACE_MODE_MII\n");
value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
   SYSCFG_PMCSETR_ETH_SEL_GMII_MII);
value |= SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
break;
case PHY_INTERFACE_MODE_GMII:
-   log_debug("PHY_INTERFACE_MODE_GMII\n");
+   dev_dbg(dev, "PHY_INTERFACE_MODE_GMII\n");
value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
   SYSCFG_PMCSETR_ETH_SEL_GMII_MII);
if (eth_clk_sel_reg)
value |= SYSCFG_PMCSETR_ETH_CLK_SEL;
break;
case PHY_INTERFACE_MODE_RMII:
-   log_debug("PHY_INTERFACE_MODE_RMII\n");
+   dev_dbg(dev, "PHY_INTERFACE_MODE_RMII\n");
value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
   SYSCFG_PMCSETR_ETH_SEL_RMII);
if (eth_ref_clk_sel_reg)
@@ -166,15 +168,15 @@ static int eqos_probe_syscfg_stm32(struct udevice *dev,
case PHY_INTERFACE_MODE_RGMII_ID:
case PHY_INTERFACE_MODE_RGMII_RXID:
case PHY_INTERFACE_MODE_RGMII_TXID:
-   log_debug("PHY_INTERFACE_MODE_RGMII\n");
+   dev_dbg(dev, "PHY_INTERFACE_MODE_RGMII\n");
value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
   SYSCFG_PMCSETR_ETH_SEL_RGMII);
if (eth_clk_sel_reg)
value |= SYSCFG_PMCSETR_ETH_CLK_SEL;
break;
default:
-   log_debug("Do not manage %d interface\n",
- interface_type);
+   dev_dbg(dev, "Do not manage %d interface\n",
+   interface_type);
/* Do not manage others interfaces */
return -EINVAL;
}

[PATCH v2 06/11] net: dwc_eth_qos: Move log_debug statements on top of case block

[Marek Vasut]

Move the log_debug() calls on top of the bit manipulation code.
No functional change.

Reviewed-by: Patrice Chotard 
Signed-off-by: Marek Vasut 
---
Cc: Christophe Roullier 
Cc: Joe Hershberger 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
Cc: Ramon Fried 
Cc: u-b...@dh-electronics.com
Cc: uboot-st...@st-md-mailman.stormreply.com
---
V2: Add RB from Patrice
---
 drivers/net/dwc_eth_qos_stm32.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/net/dwc_eth_qos_stm32.c b/drivers/net/dwc_eth_qos_stm32.c
index 7545026b158..38037c47954 100644
--- a/drivers/net/dwc_eth_qos_stm32.c
+++ b/drivers/net/dwc_eth_qos_stm32.c
@@ -143,34 +143,34 @@ static int eqos_probe_syscfg_stm32(struct udevice *dev,
 
switch (interface_type) {
case PHY_INTERFACE_MODE_MII:
+   log_debug("PHY_INTERFACE_MODE_MII\n");
value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
   SYSCFG_PMCSETR_ETH_SEL_GMII_MII);
value |= SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
-   log_debug("PHY_INTERFACE_MODE_MII\n");
break;
case PHY_INTERFACE_MODE_GMII:
+   log_debug("PHY_INTERFACE_MODE_GMII\n");
value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
   SYSCFG_PMCSETR_ETH_SEL_GMII_MII);
if (eth_clk_sel_reg)
value |= SYSCFG_PMCSETR_ETH_CLK_SEL;
-   log_debug("PHY_INTERFACE_MODE_GMII\n");
break;
case PHY_INTERFACE_MODE_RMII:
+   log_debug("PHY_INTERFACE_MODE_RMII\n");
value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
   SYSCFG_PMCSETR_ETH_SEL_RMII);
if (eth_ref_clk_sel_reg)
value |= SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
-   log_debug("PHY_INTERFACE_MODE_RMII\n");
break;
case PHY_INTERFACE_MODE_RGMII:
case PHY_INTERFACE_MODE_RGMII_ID:
case PHY_INTERFACE_MODE_RGMII_RXID:
case PHY_INTERFACE_MODE_RGMII_TXID:
+   log_debug("PHY_INTERFACE_MODE_RGMII\n");
value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
   SYSCFG_PMCSETR_ETH_SEL_RGMII);
if (eth_clk_sel_reg)
value |= SYSCFG_PMCSETR_ETH_CLK_SEL;
-   log_debug("PHY_INTERFACE_MODE_RGMII\n");
break;
default:
log_debug("Do not manage %d interface\n",
-- 
2.43.0

[PATCH v2 05/11] net: dwc_eth_qos: Use FIELD_PREP for ETH_SEL bitfield

[Marek Vasut]

Use FIELD_PREP to configure content of ETH_SEL bitfield in SYSCFG_PMCSETR
register. No functional change.

Reviewed-by: Patrice Chotard 
Signed-off-by: Marek Vasut 
---
Cc: Christophe Roullier 
Cc: Joe Hershberger 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
Cc: Ramon Fried 
Cc: u-b...@dh-electronics.com
Cc: uboot-st...@st-md-mailman.stormreply.com
---
V2: Add RB from Patrice
---
 drivers/net/dwc_eth_qos_stm32.c | 33 -
 1 file changed, 16 insertions(+), 17 deletions(-)

diff --git a/drivers/net/dwc_eth_qos_stm32.c b/drivers/net/dwc_eth_qos_stm32.c
index d7ec0c9be36..7545026b158 100644
--- a/drivers/net/dwc_eth_qos_stm32.c
+++ b/drivers/net/dwc_eth_qos_stm32.c
@@ -26,6 +26,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include "dwc_eth_qos.h"
@@ -40,9 +41,9 @@
 #define SYSCFG_PMCSETR_ETH_SELMII  BIT(20)
 
 #define SYSCFG_PMCSETR_ETH_SEL_MASKGENMASK(23, 21)
-#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII0
-#define SYSCFG_PMCSETR_ETH_SEL_RGMII   BIT(21)
-#define SYSCFG_PMCSETR_ETH_SEL_RMIIBIT(23)
+#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII0x0
+#define SYSCFG_PMCSETR_ETH_SEL_RGMII   0x1
+#define SYSCFG_PMCSETR_ETH_SEL_RMII0x4
 
 static ulong eqos_get_tick_clk_rate_stm32(struct udevice *dev)
 {
@@ -142,35 +143,33 @@ static int eqos_probe_syscfg_stm32(struct udevice *dev,
 
switch (interface_type) {
case PHY_INTERFACE_MODE_MII:
-   value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
-   SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
+   value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
+  SYSCFG_PMCSETR_ETH_SEL_GMII_MII);
+   value |= SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
log_debug("PHY_INTERFACE_MODE_MII\n");
break;
case PHY_INTERFACE_MODE_GMII:
+   value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
+  SYSCFG_PMCSETR_ETH_SEL_GMII_MII);
if (eth_clk_sel_reg)
-   value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
-   SYSCFG_PMCSETR_ETH_CLK_SEL;
-   else
-   value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
+   value |= SYSCFG_PMCSETR_ETH_CLK_SEL;
log_debug("PHY_INTERFACE_MODE_GMII\n");
break;
case PHY_INTERFACE_MODE_RMII:
+   value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
+  SYSCFG_PMCSETR_ETH_SEL_RMII);
if (eth_ref_clk_sel_reg)
-   value = SYSCFG_PMCSETR_ETH_SEL_RMII |
-   SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
-   else
-   value = SYSCFG_PMCSETR_ETH_SEL_RMII;
+   value |= SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
log_debug("PHY_INTERFACE_MODE_RMII\n");
break;
case PHY_INTERFACE_MODE_RGMII:
case PHY_INTERFACE_MODE_RGMII_ID:
case PHY_INTERFACE_MODE_RGMII_RXID:
case PHY_INTERFACE_MODE_RGMII_TXID:
+   value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
+  SYSCFG_PMCSETR_ETH_SEL_RGMII);
if (eth_clk_sel_reg)
-   value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
-   SYSCFG_PMCSETR_ETH_CLK_SEL;
-   else
-   value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
+   value |= SYSCFG_PMCSETR_ETH_CLK_SEL;
log_debug("PHY_INTERFACE_MODE_RGMII\n");
break;
default:
-- 
2.43.0

[PATCH v2 04/11] net: dwc_eth_qos: Scrub ifdeffery

[Marek Vasut]

Replace ifdef CONFIG_CLK with if (CONFIG_IS_ENABLED(CLK)) to improve code
build coverage. Some of the functions printed debug("%s: OK\n", __func__);
on exit with and without CLK enabled, some did not, make it consistent and
print nothing if CLK is disabled.

Reviewed-by: Patrice Chotard 
Signed-off-by: Marek Vasut 
---
Cc: Christophe Roullier 
Cc: Joe Hershberger 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
Cc: Ramon Fried 
Cc: u-b...@dh-electronics.com
Cc: uboot-st...@st-md-mailman.stormreply.com
---
V2: Add RB from Patrice
---
 drivers/net/dwc_eth_qos_stm32.c | 25 -
 1 file changed, 12 insertions(+), 13 deletions(-)

diff --git a/drivers/net/dwc_eth_qos_stm32.c b/drivers/net/dwc_eth_qos_stm32.c
index 7520a136ed0..d7ec0c9be36 100644
--- a/drivers/net/dwc_eth_qos_stm32.c
+++ b/drivers/net/dwc_eth_qos_stm32.c
@@ -46,21 +46,22 @@
 
 static ulong eqos_get_tick_clk_rate_stm32(struct udevice *dev)
 {
-#ifdef CONFIG_CLK
-   struct eqos_priv *eqos = dev_get_priv(dev);
+   struct eqos_priv __maybe_unused *eqos = dev_get_priv(dev);
+
+   if (!CONFIG_IS_ENABLED(CLK))
+   return 0;
 
return clk_get_rate(>clk_master_bus);
-#else
-   return 0;
-#endif
 }
 
 static int eqos_start_clks_stm32(struct udevice *dev)
 {
-#ifdef CONFIG_CLK
-   struct eqos_priv *eqos = dev_get_priv(dev);
+   struct eqos_priv __maybe_unused *eqos = dev_get_priv(dev);
int ret;
 
+   if (!CONFIG_IS_ENABLED(CLK))
+   return 0;
+
debug("%s(dev=%p):\n", __func__, dev);
 
ret = clk_enable(>clk_master_bus);
@@ -89,12 +90,10 @@ static int eqos_start_clks_stm32(struct udevice *dev)
}
eqos->clk_ck_enabled = true;
}
-#endif
 
debug("%s: OK\n", __func__);
return 0;
 
-#ifdef CONFIG_CLK
 err_disable_clk_tx:
clk_disable(>clk_tx);
 err_disable_clk_rx:
@@ -104,20 +103,20 @@ err_disable_clk_master_bus:
 err:
debug("%s: FAILED: %d\n", __func__, ret);
return ret;
-#endif
 }
 
 static int eqos_stop_clks_stm32(struct udevice *dev)
 {
-#ifdef CONFIG_CLK
-   struct eqos_priv *eqos = dev_get_priv(dev);
+   struct eqos_priv __maybe_unused *eqos = dev_get_priv(dev);
+
+   if (!CONFIG_IS_ENABLED(CLK))
+   return 0;
 
debug("%s(dev=%p):\n", __func__, dev);
 
clk_disable(>clk_tx);
clk_disable(>clk_rx);
clk_disable(>clk_master_bus);
-#endif
 
debug("%s: OK\n", __func__);
return 0;
-- 
2.43.0

[PATCH v2 03/11] net: dwc_eth_qos: Fold board_interface_eth_init into STM32 glue code

[Marek Vasut]

Move board_interface_eth_init() into eqos_probe_syscfg_stm32() in STM32
driver glue code. The eqos_probe_syscfg_stm32() parses STM32 specific DT
properties of this MAC and configures SYSCFG registers accordingly, there
is nothing board specific happening in this function, move it into generic
driver code instead. Drop the now unused duplicates from board files.

Reviewed-by: Patrice Chotard 
Signed-off-by: Marek Vasut 
---
Cc: Christophe Roullier 
Cc: Joe Hershberger 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
Cc: Ramon Fried 
Cc: u-b...@dh-electronics.com
Cc: uboot-st...@st-md-mailman.stormreply.com
---
V2: Add RB from Patrice
---
 board/dhelectronics/dh_stm32mp1/board.c | 82 ---
 board/st/stm32mp1/stm32mp1.c| 82 ---
 drivers/net/dwc_eth_qos_stm32.c | 86 -
 3 files changed, 84 insertions(+), 166 deletions(-)

diff --git a/board/dhelectronics/dh_stm32mp1/board.c 
b/board/dhelectronics/dh_stm32mp1/board.c
index d1f662d9701..f179c857116 100644
--- a/board/dhelectronics/dh_stm32mp1/board.c
+++ b/board/dhelectronics/dh_stm32mp1/board.c
@@ -48,12 +48,10 @@
 
 /* SYSCFG registers */
 #define SYSCFG_BOOTR   0x00
-#define SYSCFG_PMCSETR 0x04
 #define SYSCFG_IOCTRLSETR  0x18
 #define SYSCFG_ICNR0x1C
 #define SYSCFG_CMPCR   0x20
 #define SYSCFG_CMPENSETR   0x24
-#define SYSCFG_PMCCLRR 0x44
 
 #define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
 #define SYSCFG_BOOTR_BOOTPD_SHIFT  4
@@ -69,16 +67,6 @@
 
 #define SYSCFG_CMPENSETR_MPU_ENBIT(0)
 
-#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
-#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
-
-#define SYSCFG_PMCSETR_ETH_SELMII  BIT(20)
-
-#define SYSCFG_PMCSETR_ETH_SEL_MASKGENMASK(23, 21)
-#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII0
-#define SYSCFG_PMCSETR_ETH_SEL_RGMII   BIT(21)
-#define SYSCFG_PMCSETR_ETH_SEL_RMIIBIT(23)
-
 #define KS_CCR 0x08
 #define KS_CCR_EEPROM  BIT(9)
 #define KS_BE0 BIT(12)
@@ -679,76 +667,6 @@ void board_quiesce_devices(void)
 #endif
 }
 
-/* eth init function : weak called in eqos driver */
-int board_interface_eth_init(struct udevice *dev,
-phy_interface_t interface_type)
-{
-   u8 *syscfg;
-   u32 value;
-   bool eth_clk_sel_reg = false;
-   bool eth_ref_clk_sel_reg = false;
-
-   /* Gigabit Ethernet 125MHz clock selection. */
-   eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel");
-
-   /* Ethernet 50Mhz RMII clock selection */
-   eth_ref_clk_sel_reg =
-   dev_read_bool(dev, "st,eth-ref-clk-sel");
-
-   syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
-
-   if (!syscfg)
-   return -ENODEV;
-
-   switch (interface_type) {
-   case PHY_INTERFACE_MODE_MII:
-   value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
-   SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
-   debug("%s: PHY_INTERFACE_MODE_MII\n", __func__);
-   break;
-   case PHY_INTERFACE_MODE_GMII:
-   if (eth_clk_sel_reg)
-   value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
-   SYSCFG_PMCSETR_ETH_CLK_SEL;
-   else
-   value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
-   debug("%s: PHY_INTERFACE_MODE_GMII\n", __func__);
-   break;
-   case PHY_INTERFACE_MODE_RMII:
-   if (eth_ref_clk_sel_reg)
-   value = SYSCFG_PMCSETR_ETH_SEL_RMII |
-   SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
-   else
-   value = SYSCFG_PMCSETR_ETH_SEL_RMII;
-   debug("%s: PHY_INTERFACE_MODE_RMII\n", __func__);
-   break;
-   case PHY_INTERFACE_MODE_RGMII:
-   case PHY_INTERFACE_MODE_RGMII_ID:
-   case PHY_INTERFACE_MODE_RGMII_RXID:
-   case PHY_INTERFACE_MODE_RGMII_TXID:
-   if (eth_clk_sel_reg)
-   value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
-   SYSCFG_PMCSETR_ETH_CLK_SEL;
-   else
-   value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
-   debug("%s: PHY_INTERFACE_MODE_RGMII\n", __func__);
-   break;
-   default:
-   debug("%s: Do not manage %d interface\n",
- __func__, interface_type);
-   /* Do not manage others interfaces */
-   return -EINVAL;
-   }
-
-   /* clear and set ETH configuration bits */
-   writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
-  SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
-  syscfg + SYSCFG_PMCCLRR);
-   writel(value, syscfg + SYSCFG_PMCSETR);
-
-   return 0;
-}
-
 #if defined(CONFIG_OF_BOARD_SETUP)
 int ft_board_setup(void *blob, struct bd_info *bd)
 {
diff --git a/board/st/stm32mp1/stm32mp1.c 

[PATCH v2 02/11] net: dwc_eth_qos: Rename eqos_stm32_config to eqos_stm32mp15_config

[Marek Vasut]

The current glue code is specific to STM32MP15xx, the upcoming STM32MP13xx
will introduce another entry specific to the STM32MP13xx. Rename the current
entry to eqos_stm32mp15_config in preparation for STM32MP13xx addition. No
functional change.

Reviewed-by: Patrice Chotard 
Signed-off-by: Marek Vasut 
---
Cc: Christophe Roullier 
Cc: Joe Hershberger 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
Cc: Ramon Fried 
Cc: u-b...@dh-electronics.com
Cc: uboot-st...@st-md-mailman.stormreply.com
---
V2: Add RB from Patrice
---
 drivers/net/dwc_eth_qos.c   | 2 +-
 drivers/net/dwc_eth_qos.h   | 2 +-
 drivers/net/dwc_eth_qos_stm32.c | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 533c2bf070b..203bfc0848c 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1507,7 +1507,7 @@ static const struct udevice_id eqos_ids[] = {
 #if IS_ENABLED(CONFIG_DWC_ETH_QOS_STM32)
{
.compatible = "st,stm32mp1-dwmac",
-   .data = (ulong)_stm32_config
+   .data = (ulong)_stm32mp15_config
},
 #endif
 #if IS_ENABLED(CONFIG_DWC_ETH_QOS_IMX)
diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h
index a6087f191ab..bafd0d339fb 100644
--- a/drivers/net/dwc_eth_qos.h
+++ b/drivers/net/dwc_eth_qos.h
@@ -290,5 +290,5 @@ int eqos_null_ops(struct udevice *dev);
 extern struct eqos_config eqos_imx_config;
 extern struct eqos_config eqos_rockchip_config;
 extern struct eqos_config eqos_qcom_config;
-extern struct eqos_config eqos_stm32_config;
+extern struct eqos_config eqos_stm32mp15_config;
 extern struct eqos_config eqos_jh7110_config;
diff --git a/drivers/net/dwc_eth_qos_stm32.c b/drivers/net/dwc_eth_qos_stm32.c
index cfda757133e..fd29a604987 100644
--- a/drivers/net/dwc_eth_qos_stm32.c
+++ b/drivers/net/dwc_eth_qos_stm32.c
@@ -184,7 +184,7 @@ static struct eqos_ops eqos_stm32_ops = {
.eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_stm32
 };
 
-struct eqos_config __maybe_unused eqos_stm32_config = {
+struct eqos_config __maybe_unused eqos_stm32mp15_config = {
.reg_access_always_ok = false,
.mdio_wait = 1,
.swr_wait = 50,
-- 
2.43.0

[PATCH v2 01/11] net: dwc_eth_qos: Split STM32 glue into separate file

[Marek Vasut]

Move STM32 glue code into separate file to contain the STM32 specific
code outside of the DWMAC core code. No functional change.

Reviewed-by: Patrice Chotard 
Signed-off-by: Marek Vasut 
---
Cc: Christophe Roullier 
Cc: Joe Hershberger 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
Cc: Ramon Fried 
Cc: u-b...@dh-electronics.com
Cc: uboot-st...@st-md-mailman.stormreply.com
---
V2: Add RB from Patrice
---
 drivers/net/Makefile|   1 +
 drivers/net/dwc_eth_qos.c   | 165 ---
 drivers/net/dwc_eth_qos.h   |   1 +
 drivers/net/dwc_eth_qos_stm32.c | 196 
 4 files changed, 198 insertions(+), 165 deletions(-)
 create mode 100644 drivers/net/dwc_eth_qos_stm32.c

diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 6677366ebd6..dc3404519d6 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -23,6 +23,7 @@ obj-$(CONFIG_DWC_ETH_QOS_IMX) += dwc_eth_qos_imx.o
 obj-$(CONFIG_DWC_ETH_QOS_ROCKCHIP) += dwc_eth_qos_rockchip.o
 obj-$(CONFIG_DWC_ETH_QOS_QCOM) += dwc_eth_qos_qcom.o
 obj-$(CONFIG_DWC_ETH_QOS_STARFIVE) += dwc_eth_qos_starfive.o
+obj-$(CONFIG_DWC_ETH_QOS_STM32) += dwc_eth_qos_stm32.o
 obj-$(CONFIG_E1000) += e1000.o
 obj-$(CONFIG_E1000_SPI) += e1000_spi.o
 obj-$(CONFIG_EEPRO100) += eepro100.o
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 9b3bce1dc87..533c2bf070b 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -295,58 +295,6 @@ err:
 #endif
 }
 
-static int eqos_start_clks_stm32(struct udevice *dev)
-{
-#ifdef CONFIG_CLK
-   struct eqos_priv *eqos = dev_get_priv(dev);
-   int ret;
-
-   debug("%s(dev=%p):\n", __func__, dev);
-
-   ret = clk_enable(>clk_master_bus);
-   if (ret < 0) {
-   pr_err("clk_enable(clk_master_bus) failed: %d", ret);
-   goto err;
-   }
-
-   ret = clk_enable(>clk_rx);
-   if (ret < 0) {
-   pr_err("clk_enable(clk_rx) failed: %d", ret);
-   goto err_disable_clk_master_bus;
-   }
-
-   ret = clk_enable(>clk_tx);
-   if (ret < 0) {
-   pr_err("clk_enable(clk_tx) failed: %d", ret);
-   goto err_disable_clk_rx;
-   }
-
-   if (clk_valid(>clk_ck) && !eqos->clk_ck_enabled) {
-   ret = clk_enable(>clk_ck);
-   if (ret < 0) {
-   pr_err("clk_enable(clk_ck) failed: %d", ret);
-   goto err_disable_clk_tx;
-   }
-   eqos->clk_ck_enabled = true;
-   }
-#endif
-
-   debug("%s: OK\n", __func__);
-   return 0;
-
-#ifdef CONFIG_CLK
-err_disable_clk_tx:
-   clk_disable(>clk_tx);
-err_disable_clk_rx:
-   clk_disable(>clk_rx);
-err_disable_clk_master_bus:
-   clk_disable(>clk_master_bus);
-err:
-   debug("%s: FAILED: %d\n", __func__, ret);
-   return ret;
-#endif
-}
-
 static int eqos_stop_clks_tegra186(struct udevice *dev)
 {
 #ifdef CONFIG_CLK
@@ -365,22 +313,6 @@ static int eqos_stop_clks_tegra186(struct udevice *dev)
return 0;
 }
 
-static int eqos_stop_clks_stm32(struct udevice *dev)
-{
-#ifdef CONFIG_CLK
-   struct eqos_priv *eqos = dev_get_priv(dev);
-
-   debug("%s(dev=%p):\n", __func__, dev);
-
-   clk_disable(>clk_tx);
-   clk_disable(>clk_rx);
-   clk_disable(>clk_master_bus);
-#endif
-
-   debug("%s: OK\n", __func__);
-   return 0;
-}
-
 static int eqos_start_resets_tegra186(struct udevice *dev)
 {
struct eqos_priv *eqos = dev_get_priv(dev);
@@ -493,17 +425,6 @@ static ulong eqos_get_tick_clk_rate_tegra186(struct 
udevice *dev)
 #endif
 }
 
-static ulong eqos_get_tick_clk_rate_stm32(struct udevice *dev)
-{
-#ifdef CONFIG_CLK
-   struct eqos_priv *eqos = dev_get_priv(dev);
-
-   return clk_get_rate(>clk_master_bus);
-#else
-   return 0;
-#endif
-}
-
 static int eqos_set_full_duplex(struct udevice *dev)
 {
struct eqos_priv *eqos = dev_get_priv(dev);
@@ -1415,57 +1336,6 @@ err_free_reset_eqos:
return ret;
 }
 
-static int eqos_probe_resources_stm32(struct udevice *dev)
-{
-   struct eqos_priv *eqos = dev_get_priv(dev);
-   int ret;
-   phy_interface_t interface;
-
-   debug("%s(dev=%p):\n", __func__, dev);
-
-   interface = eqos->config->interface(dev);
-
-   if (interface == PHY_INTERFACE_MODE_NA) {
-   pr_err("Invalid PHY interface\n");
-   return -EINVAL;
-   }
-
-   ret = board_interface_eth_init(dev, interface);
-   if (ret)
-   return -EINVAL;
-
-   ret = clk_get_by_name(dev, "stmmaceth", >clk_master_bus);
-   if (ret) {
-   pr_err("clk_get_by_name(master_bus) failed: %d", ret);
-   goto err_probe;
-   }
-
-   ret = clk_get_by_name(dev, "mac-clk-rx", >clk_rx);
-   if (ret) {
-   pr_err("clk_get_by_name(rx) failed: %d", ret);
-   goto err_probe;
-   }
-
-   ret = clk_get_by_name(dev, "mac-clk-tx", 

[PATCH v2 00/11] net: dwc_eth_qos: Clean up STM32 glue code and add STM32MP13xx support

[Marek Vasut]

Split off STM32 glue code from the DWMAC driver into separate
file, similar to what other SoCs already do, to avoid mixing
the ST specifics with generic DWMAC core code.

Clean the STM32 DWMAC board code which is currently duplicated
in multiple board files, move it into the newly separated glue
code, since the code is not board specific, it is only generic
DT parsing and generic register programming.

Add STM32MP13xx support based on ST downstream patches on top,
although that part is mostly rewritten from scratch.

Christophe Roullier (2):
  net: dwc_eth_qos: Add DT parsing for STM32MP13xx platform
  net: dwc_eth_qos: Add support of STM32MP13xx platform

Marek Vasut (9):
  net: dwc_eth_qos: Split STM32 glue into separate file
  net: dwc_eth_qos: Rename eqos_stm32_config to eqos_stm32mp15_config
  net: dwc_eth_qos: Fold board_interface_eth_init into STM32 glue code
  net: dwc_eth_qos: Scrub ifdeffery
  net: dwc_eth_qos: Use FIELD_PREP for ETH_SEL bitfield
  net: dwc_eth_qos: Move log_debug statements on top of case block
  net: dwc_eth_qos: Use consistent logging prints
  net: dwc_eth_qos: Constify st,eth-* values parsed out of DT
  net: dwc_eth_qos: Add support for st,ext-phyclk property

 board/dhelectronics/dh_stm32mp1/board.c |  82 --
 board/st/stm32mp1/stm32mp1.c|  82 --
 drivers/net/Makefile|   1 +
 drivers/net/dwc_eth_qos.c   | 171 +
 drivers/net/dwc_eth_qos.h   |   2 +
 drivers/net/dwc_eth_qos_stm32.c | 326 
 6 files changed, 334 insertions(+), 330 deletions(-)
 create mode 100644 drivers/net/dwc_eth_qos_stm32.c

Cc: Christophe Roullier 
Cc: Joe Hershberger 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
Cc: Ramon Fried 
Cc: u-b...@dh-electronics.com
Cc: uboot-st...@st-md-mailman.stormreply.com

-- 
2.43.0

Re: [PATCH v3 4/6] usb: Add environment based device ignorelist

[Marek Vasut]

On 3/26/24 9:40 AM, Janne Grunau wrote:

On Fri, Mar 22, 2024 at 12:56:37PM +0100, Marek Vasut wrote:

On 3/22/24 8:47 AM, Janne Grunau via B4 Relay wrote:

[...]


@@ -1099,6 +1142,20 @@ int usb_select_config(struct usb_device *dev)
le16_to_cpus(>descriptor.idProduct);
le16_to_cpus(>descriptor.bcdDevice);
   
+	/* ignore devices from usb_ignorelist */

+   err = usb_device_is_ignored(dev->descriptor.idVendor,
+   dev->descriptor.idProduct);
+   if (err == -ENODEV) {
+   dev_dbg(dev->dev, "Ignoring USB device 0x%x:0x%x\n",
+   dev->descriptor.idVendor, dev->descriptor.idProduct);
+   return err;
+   } else if (err == -EINVAL) {
+   printf("usb_ignorelist parse error in \"%s\"\n",
+  env_get("usb_ignorelist"));


Please use dev_err() here consistently with dev_dbg() above.


I didn't use dev_err() since the parsing error is not specific to the
device. It doesn't matter much. I'll change it and resend after we've
settled the new discussion about the interface limit.


Then please just clarify this in the commit message, that's fine.

Thanks !

Re: [PATCH] usb: dwc2: Add in version 4xx compatibility

[Marek Vasut]

On 3/26/24 3:32 AM, Greg Malysa wrote:

From: Nathan Barrett-Morrison 

This adds the Synopsys device id for version 4xx of the designware
IP block and extends the version check to include it to permit
new hardware to run. It does not add any 4xx-specific features.

Signed-off-by: Ian Roberts 
Signed-off-by: Greg Malysa 
Signed-off-by: Nathan Barrett-Morrison 

---


---
  drivers/usb/host/dwc2.c | 3 ++-
  drivers/usb/host/dwc2.h | 1 +
  2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 637eb2dd06..6fdde6a9a7 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -1180,7 +1180,8 @@ static int dwc2_init_common(struct udevice *dev, struct 
dwc2_priv *priv)
 snpsid >> 12 & 0xf, snpsid & 0xfff);
  
  	if ((snpsid & DWC2_SNPSID_DEVID_MASK) != DWC2_SNPSID_DEVID_VER_2xx &&

-   (snpsid & DWC2_SNPSID_DEVID_MASK) != DWC2_SNPSID_DEVID_VER_3xx) {
+   (snpsid & DWC2_SNPSID_DEVID_MASK) != DWC2_SNPSID_DEVID_VER_3xx &&
+   (snpsid & DWC2_SNPSID_DEVID_MASK) != DWC2_SNPSID_DEVID_VER_4xx) {
dev_info(dev, "SNPSID invalid (not DWC2 OTG device): %08x\n",
 snpsid);
return -ENODEV;
diff --git a/drivers/usb/host/dwc2.h b/drivers/usb/host/dwc2.h
index 6f022e33a1..f202d55eb2 100644
--- a/drivers/usb/host/dwc2.h
+++ b/drivers/usb/host/dwc2.h
@@ -739,6 +739,7 @@ struct dwc2_core_regs {
  #define DWC2_PCGCCTL_DEEP_SLEEP_OFFSET7
  #define DWC2_SNPSID_DEVID_VER_2xx (0x4f542 << 12)
  #define DWC2_SNPSID_DEVID_VER_3xx (0x4f543 << 12)
+#define DWC2_SNPSID_DEVID_VER_4xx  (0x4f544 << 12)
  #define DWC2_SNPSID_DEVID_MASK(0xf << 12)
  #define DWC2_SNPSID_DEVID_OFFSET  12


Maybe it would be better/easier/futureproof to simply check if (snpsid & 
0x0 == 0x4f540) ?

Re: [PATCH 0/4] clk: exynos: Prepare clocks for eMMC enablement

[Minkyu Kang]

Hi,


2024년 3월 20일 (수) 03:44, Sam Protsenko 님이 작성:

> Hi Lukasz, Sean, Tom,
>
> If there are no comments on this series, can you please apply it?
>
> Thanks!
>
> On Thu, Mar 7, 2024 at 8:18 PM Sam Protsenko 
> wrote:
> >
> > This short series features a couple of Exynos850 clock driver fixes and
> > adds new clocks needed for further eMMC and SD card enablement.
> >
> > Sam Protsenko (4):
> >   clk: exynos: Re-arrange clocks in Exynos850 CMU_TOP
> >   clk: exynos: Don't expose prototypes for not used functions
> >   clk: exynos: Fix incorrect clock lookup for non-top CMUs
> >   clk: exynos: Add CMU_CORE and CMU_HSI for Exynos850
> >
> >  drivers/clk/exynos/clk-exynos850.c | 326 ++---
> >  drivers/clk/exynos/clk-pll.c   |   6 +-
> >  drivers/clk/exynos/clk-pll.h   |   6 +
> >  drivers/clk/exynos/clk.c   |  47 +++--
> >  drivers/clk/exynos/clk.h   |  70 +--
> >  5 files changed, 384 insertions(+), 71 deletions(-)
> >
> > --
> > 2.39.2
> >


applied to u-boot-samsung.

Thanks.
Minkyu Kang.

Re: [PATCH 00/12] arm: xea: Provide support for different XEA board HW versions

[Fabio Estevam]

Hi Lukasz,

On Mon, Mar 25, 2024 at 5:48 AM Lukasz Majewski  wrote:

> The case here is that I'm modifying the *-u-boot.dts{i} files only. In

The diff below shows that you are creating imx28-xea-1.dts and imx28-xea-2.dts
for U-Boot consumption and renaming the upstream imx28-xea.dts to imx28-xea.dts.

create mode 100644 arch/arm/dts/imx28-xea-1.dts
create mode 100644 arch/arm/dts/imx28-xea-2-u-boot.dtsi
create mode 100644 arch/arm/dts/imx28-xea-2.dts
rename arch/arm/dts/{imx28-xea.dts => imx28-xea.dtsi} (100%)

> other words, u-boot will not support features described in Linux DTS.

That's OK and this happens frequently.

For example, upstream devicetree may describes audio codec,
but U-Boot does not support audio playback.

Devicetree should be OS agnostic.

In U-Boot, we want to re-use the upstream Linux devicetree files 'as-is'.

Adding -u-boot.dtsi files is OK though.

Can you convert the imx28-xea board to OF_UPSTREAM available in the
U-Boot next branch?

> Hence, the rename of files (which would be in sync with Linux at some
> point) looks like not related to Linux DTS (as even after re-sync with
> upstream Linux those changes will not be in Linux DTS).

I did not understand this part, do you mean that Linux will also do the
imx28-xea.dts => imx28-xea.dtsi rename and will also have the new
imx28-xea-1.dts and imx28-xea-2.dts?

Regards,

Fabio Estevam

Re: [PATCH v1] board: amlogic: jethubj100: fix update docs

[Neil Armstrong]

On 26/03/2024 09:19, Viacheslav Bocharov wrote:

Fix linter errors

Fixes: 2fc5e3c1668cffdb4b894986e98c1ee10f6e9955

Signed-off-by: Viacheslav Bocharov 
---
  doc/board/amlogic/jethub-j100.rst | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/doc/board/amlogic/jethub-j100.rst 
b/doc/board/amlogic/jethub-j100.rst
index 80bed6e919e..cbf1ea76107 100644
--- a/doc/board/amlogic/jethub-j100.rst
+++ b/doc/board/amlogic/jethub-j100.rst
@@ -1,7 +1,7 @@
  .. SPDX-License-Identifier: GPL-2.0+
  
  U-Boot for JetHub J100/J110 (A113X)

-==
+===
  
  JetHome Jethub D1/D1+ (http://jethome.ru/jethub-d1p) is a home automation controller device

  manufactured by JetHome with the following specifications:


Thanks, squashed!

Neil

[PATCH v3 3/3] configs: Enable RTC pcf2131 support

[Joy Zou]

Enable CONFIG_RTC_PCF2127 configs to support pcf2131.

Signed-off-by: Joy Zou 
---
Changes in v3:
1. Change CONFIG_RTC_PCF2131 into CONFIG_RTC_PCF2127 because the pcf2131
driver have been merged into the pcf2127.
---
 configs/imx93_11x11_evk_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/imx93_11x11_evk_defconfig 
b/configs/imx93_11x11_evk_defconfig
index 63613477c7..55e2673291 100644
--- a/configs/imx93_11x11_evk_defconfig
+++ b/configs/imx93_11x11_evk_defconfig
@@ -14,6 +14,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx93-11x11-evk"
 CONFIG_SPL_TEXT_BASE=0x2049A000
 CONFIG_TARGET_IMX93_11X11_EVK=y
 CONFIG_SYS_MONITOR_LEN=524288
+CONFIG_RTC_PCF2127=y
 CONFIG_SPL_SERIAL=y
 CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL_STACK=0x20519dd0
-- 
2.37.1

[PATCH v3 2/3] imx: imx93_evk: add rtc pcf2131

[Joy Zou]

support rtc pcf2131 for imx93.

Signed-off-by: Joy Zou 
---
Changes in v3:
1. remove arch/arm/dts/imx93.dtsi modification because this change have existed.

Changes in v2:
1. use the flag bootph-pre-ram instead of uboot,dm-spl.
---
 arch/arm/dts/imx93-11x11-evk-u-boot.dtsi |  8 
 arch/arm/dts/imx93-11x11-evk.dts | 25 
 2 files changed, 33 insertions(+)

diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi 
b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
index a99ba99bfb..2dbe33f073 100644
--- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
@@ -112,6 +112,10 @@
bootph-some-ram;
 };
 
+ {
+   bootph-pre-ram;
+};
+
 &{/soc@0/bus@4400/i2c@4435/pmic@25} {
bootph-pre-ram;
bootph-some-ram;
@@ -127,6 +131,10 @@
bootph-some-ram;
 };
 
+_lpi2c3 {
+   bootph-pre-ram;
+};
+
  {
phy-reset-gpios = < 16 GPIO_ACTIVE_LOW>;
phy-reset-duration = <15>;
diff --git a/arch/arm/dts/imx93-11x11-evk.dts b/arch/arm/dts/imx93-11x11-evk.dts
index 4322cc3e11..8b57de3b4c 100644
--- a/arch/arm/dts/imx93-11x11-evk.dts
+++ b/arch/arm/dts/imx93-11x11-evk.dts
@@ -192,6 +192,24 @@
};
 };
 
+ {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clock-frequency = <40>;
+   pinctrl-names = "default", "sleep";
+   pinctrl-0 = <_lpi2c3>;
+   pinctrl-1 = <_lpi2c3>;
+   status = "okay";
+
+   pcf2131: rtc@53 {
+   compatible = "nxp,pcf2131";
+   reg = <0x53>;
+   interrupt-parent = <>;
+   interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
+   status = "okay";
+   };
+};
+
  { /* console */
pinctrl-names = "default";
pinctrl-0 = <_uart1>;
@@ -254,6 +272,13 @@
>;
};
 
+   pinctrl_lpi2c3: lpi2c3grp {
+   fsl,pins = <
+   MX93_PAD_GPIO_IO28__LPI2C3_SDA  
0x4b9e
+   MX93_PAD_GPIO_IO29__LPI2C3_SCL  
0x4b9e
+   >;
+   };
+
pinctrl_fec: fecgrp {
fsl,pins = <
MX93_PAD_ENET2_MDC__ENET1_MDC   0x57e
-- 
2.37.1

[PATCH v3 1/3] drivers: rtc: add pcf2131 rtc driver

[Joy Zou]

Adding support for pcf2131 RTC chip.

The pcf2131 is similar to the pcf2127. The driver support rtc register
read/write by using rtc cmd and rtc date set/get by using date cmd.

The pcf2131 is special when write access to time registers. it requires
setting the STOP and CPR bits. STOP bit needs to be cleared after time
registers are updated.

Signed-off-by: Joy Zou 
---
Changes in v3:
1.merge pcf2131 into pcf2127 in order to keep same with kernel.

Changes in v2:
1. delete the unnecessary initialization.
2. retrun directly function insteand of redundancy return ret.
3. delete the unnecessary comment line.
---
 drivers/rtc/pcf2127.c | 144 ++
 1 file changed, 131 insertions(+), 13 deletions(-)

diff --git a/drivers/rtc/pcf2127.c b/drivers/rtc/pcf2127.c
index 2f3fafb496..58ab5a8601 100644
--- a/drivers/rtc/pcf2127.c
+++ b/drivers/rtc/pcf2127.c
@@ -23,6 +23,38 @@
 #define PCF2127_REG_MO 0x08
 #define PCF2127_REG_YR 0x09
 
+#define PCF2131_REG_CTRL1   0x00
+#define PCF2131_BIT_CTRL1_STOP  BIT(5)
+#define PCF2131_REG_SR_RESET0x05
+#define PCF2131_SR_VAL_Clr_Pres 0xa4
+#define PCF2131_REG_SC  0x07
+#define PCF2131_REG_MN  0x08
+#define PCF2131_REG_HR  0x09
+#define PCF2131_REG_DM  0x0a
+#define PCF2131_REG_DW  0x0b
+#define PCF2131_REG_MO  0x0c
+#define PCF2131_REG_YR  0x0d
+
+enum {
+   NXP_CHIP_TYPE_PCF2127 = 0,
+   NXP_CHIP_TYPE_PCF2129,
+   NXP_CHIP_TYPE_PCA2129,
+   NXP_CHIP_TYPE_PCF2131,
+   NXP_CHIP_TYPE_AMOUNT
+};
+
+bool is_pcf2131_type(struct udevice *dev)
+{
+   int type;
+
+   type = dev_get_driver_data(dev);
+
+   if (type == NXP_CHIP_TYPE_PCF2131)
+   return true;
+   else
+   return false;
+}
+
 static int pcf2127_rtc_read(struct udevice *dev, uint offset, u8 *buffer, uint 
len)
 {
struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
@@ -43,10 +75,64 @@ static int pcf2127_rtc_read(struct udevice *dev, uint 
offset, u8 *buffer, uint l
return dm_i2c_xfer(dev, , 1);
 }
 
+static int pcf2131_rtc_lock(struct udevice *dev)
+{
+   int ret = 0;
+   uchar buf[6] = { PCF2131_REG_CTRL1 };
+
+   ret = pcf2127_rtc_read(dev, PCF2131_REG_CTRL1, buf, sizeof(buf));
+   if (ret < 0)
+   return ret;
+
+   buf[PCF2131_REG_CTRL1] |= PCF2131_BIT_CTRL1_STOP;
+   ret = dm_i2c_write(dev, PCF2131_REG_CTRL1, [PCF2131_REG_CTRL1], 1);
+   if (ret < 0)
+   return ret;
+
+   buf[PCF2131_REG_SR_RESET] = PCF2131_SR_VAL_Clr_Pres;
+
+   return dm_i2c_write(dev, PCF2131_REG_SR_RESET, 
[PCF2131_REG_SR_RESET], 1);
+}
+
+static int pcf2131_rtc_unlock(struct udevice *dev)
+{
+   int ret = 0;
+   uchar buf[6] = { PCF2131_REG_CTRL1 };
+
+   ret = pcf2127_rtc_read(dev, PCF2131_REG_CTRL1, buf, sizeof(buf));
+   if (ret < 0)
+   return ret;
+
+   buf[PCF2131_REG_CTRL1] &= ~PCF2131_BIT_CTRL1_STOP;
+   return dm_i2c_write(dev, PCF2131_REG_CTRL1, [PCF2131_REG_CTRL1], 1);
+}
+
 static int pcf2127_rtc_write(struct udevice *dev, uint offset,
 const u8 *buffer, uint len)
 {
-   return dm_i2c_write(dev, offset, buffer, len);
+   int ret = 0;
+   bool flag;
+
+   flag = is_pcf2131_type(dev);
+   if (flag) {
+   ret = pcf2131_rtc_lock(dev);
+   if (ret < 0)
+   return ret;
+   }
+
+   ret = dm_i2c_write(dev, offset, buffer, len);
+   if (ret < 0) {
+   if (flag)
+   pcf2131_rtc_unlock(dev);
+   return ret;
+   }
+
+   if (flag) {
+   ret = pcf2131_rtc_unlock(dev);
+   if (ret < 0)
+   return ret;
+   }
+   return ret;
 }
 
 static int pcf2127_rtc_set(struct udevice *dev, const struct rtc_time *tm)
@@ -68,7 +154,10 @@ static int pcf2127_rtc_set(struct udevice *dev, const 
struct rtc_time *tm)
buf[i++] = bin2bcd(tm->tm_year % 100);
 
/* write register's data */
-   ret = dm_i2c_write(dev, PCF2127_REG_SC, buf, i);
+   if (is_pcf2131_type(dev))
+   ret = pcf2127_rtc_write(dev, PCF2131_REG_SC, buf, i);
+   else
+   ret = pcf2127_rtc_write(dev, PCF2127_REG_SC, buf, i);
 
return ret;
 }
@@ -76,7 +165,8 @@ static int pcf2127_rtc_set(struct udevice *dev, const struct 
rtc_time *tm)
 static int pcf2127_rtc_get(struct udevice *dev, struct rtc_time *tm)
 {
int ret = 0;
-   uchar buf[10] = { PCF2127_REG_CTRL1 };
+   bool flag;
+   uchar buf[14] = { PCF2127_REG_CTRL1 };
 
ret = pcf2127_rtc_read(dev, PCF2127_REG_CTRL1, buf, sizeof(buf));
if (ret < 0)
@@ -85,15 +175,28 @@ static int pcf2127_rtc_get(struct udevice *dev, struct 
rtc_time *tm)
if (buf[PCF2127_REG_CTRL3] & 0x04)
  

[PATCH v3 0/3] Add pcf2131 rtc support

[Joy Zou]

The patchset supports pcf2131 rtc.
For the details, please check the patch commit log.

Joy Zou (3):
  drivers: rtc: add pcf2131 rtc driver
  imx: imx93_evk: add rtc pcf2131
  configs: Enable RTC pcf2131 support

 arch/arm/dts/imx93-11x11-evk-u-boot.dtsi |   8 ++
 arch/arm/dts/imx93-11x11-evk.dts |  25 
 configs/imx93_11x11_evk_defconfig|   1 +
 drivers/rtc/pcf2127.c| 144 +--
 4 files changed, 165 insertions(+), 13 deletions(-)

-- 
2.37.1

Help to figure out where I'm stuck...

[MegaDriver]

Hi all,

I've developed my own board for the Allwinner V3S SOC based on the Lichee
Pi schematics with some custom modifications for my project. Now I'm
getting stuck after U-Boot outputs the total RAM for the second time. I did
some patching to the source code to output more information. I've
redirected all the debug and *debug messages to printf with numbering so I
can make things easier on locating the step in the source code.

Any U-Boot wizards out there that could give me a hand locating where
U-Boot is hanging?

Thanks a bunch!

Here's my latest output:
21:43:47.488 ->
21:43:47.488 -> U-Boot SPL 2024.04-rc4 (Mar 25 2024 - 21:40:21 -0300)
21:43:47.488 -> [5]DRAM:[9929]MBUS port 0 cfg0 00ad cfg1 00500064
21:43:47.521 -> [9929]MBUS port 1 cfg0 0709 cfg1 0600
21:43:47.521 -> [9929]MBUS port 2 cfg0 010d cfg1 00500080
21:43:47.521 -> [9929]MBUS port 3 cfg0 0109 cfg1 0064
21:43:47.521 -> [9929]MBUS port 4 cfg0 0809 cfg1 0640
21:43:47.521 -> [9929]MBUS port 5 cfg0 018d cfg1 0100
21:43:47.521 -> [9929]MBUS port 6 cfg0 00640009 cfg1 0032
21:43:47.521 -> [9929]MBUS port 7 cfg0 0189 cfg1 0100
21:43:47.521 -> [9929]MBUS port 8 cfg0 2008 cfg1 1000
21:43:47.521 -> [9929]MBUS port 9 cfg0 0289 cfg1 0100
21:43:47.554 ->  64 MiB
21:43:47.554 -> SPL malloc() before relocation used 0x0 bytes (0 KB)
21:43:47.554 -> SPL.c: board_init_r
21:43:47.554 -> >>SPL: board_init_r()
21:43:47.554 -> spl_init
21:43:47.554 -> size=18, ptr=18, limit=10: 4fd0
21:43:47.554 -> Before: boot_from_devices
21:43:47.554 -> Trying to boot from MMC1
21:43:47.554 -> [5937]init mmc 0 resource
21:43:47.554 -> [5938]init mmc 0 clock and io
21:43:47.587 -> [5927]mmc 0 set mod-clk req 2400 parent 2400 n 1 m
1 rate 2400
21:43:47.587 -> common/malloc_simple.c:27-alloc_simple() size=190, ptr=1a8,
limit=10: common/malloc_simple.c:48-malloc_simple() 4fd00018
21:43:47.587 -> [5652]clock is disabled (0Hz)
21:43:47.587 -> [5928]set ios: bus_width: 0, clock: 0
21:43:47.587 -> [5630]selecting mode MMC legacy (freq : 0 MHz)
21:43:47.587 -> [5928]set ios: bus_width: 1, clock: 0
21:43:47.587 -> [5652]clock is enabled (40Hz)
21:43:47.587 -> [5928]set ios: bus_width: 1, clock: 40
21:43:47.587 -> [5927]mmc 0 set mod-clk req 40 parent 2400 n 4 m 15
rate 40
21:43:47.620 -> [5931]mmc 0, cmd 0(0x80008000), arg 0x
21:43:47.620 -> [5936]mmc resp 0x
21:43:47.620 -> [5931]mmc 0, cmd 8(0x8148), arg 0x01aa
21:43:47.620 -> [5936]mmc resp 0x01aa
21:43:47.620 -> [5931]mmc 0, cmd 55(0x8177), arg 0x
21:43:47.620 -> [5936]mmc resp 0x0120
21:43:47.620 -> [5931]mmc 0, cmd 41(0x8069), arg 0x4030
21:43:47.620 -> [5936]mmc resp 0x00ff8000
21:43:47.620 -> [5931]mmc 0, cmd 55(0x8177), arg 0x
21:43:47.653 -> [5936]mmc resp 0x0120
21:43:47.653 -> [5931]mmc 0, cmd 41(0x8069), arg 0x4030
21:43:47.653 -> [5936]mmc resp 0x00ff8000
21:43:47.653 -> [5931]mmc 0, cmd 55(0x8177), arg 0x
21:43:47.653 -> [5936]mmc resp 0x0120
21:43:47.653 -> [5931]mmc 0, cmd 41(0x8069), arg 0x4030
21:43:47.653 -> [5936]mmc resp 0x80ff8000
21:43:47.653 -> [5931]mmc 0, cmd 2(0x81c2), arg 0x
21:43:47.653 -> [5935]mmc resp 0x3eaa5507 0x4000 0x50505344 0xc855aa41
21:43:47.653 -> [5931]mmc 0, cmd 3(0x8143), arg 0x
21:43:47.686 -> [5936]mmc resp 0x21070500
21:43:47.686 -> [5931]mmc 0, cmd 9(0x81c9), arg 0x2107
21:43:47.686 -> [5935]mmc resp 0x168000bf 0xeebbff9f 0x535a80ef 0x007f0032
21:43:47.686 -> [5630]selecting mode MMC legacy (freq : 25 MHz)
21:43:47.686 -> [5931]mmc 0, cmd 7(0x8147), arg 0x2107
21:43:47.686 -> [5936]mmc resp 0x0700
21:43:47.686 -> [5931]mmc 0, cmd 55(0x8177), arg 0x2107
21:43:47.720 -> [5936]mmc resp 0x0920
21:43:47.720 -> [5931]mmc 0, cmd 51(0x80002373), arg 0x
21:43:47.720 -> [5932]trans data 8 bytes
21:43:47.720 -> [5933]cacl timeout 78 msec
21:43:47.720 -> [5936]mmc resp 0x0920
21:43:47.720 -> [5931]mmc 0, cmd 6(0x80002346), arg 0x00f1
21:43:47.720 -> [5932]trans data 64 bytes
21:43:47.720 -> [5933]cacl timeout 78 msec
21:43:47.720 -> [5936]mmc resp 0x0900
21:43:47.720 -> [5643]trying mode SD High Speed (50MHz) width 4 (at 50 MHz)
21:43:47.720 -> [5931]mmc 0, cmd 55(0x8177), arg 0x2107
21:43:47.753 -> [5936]mmc resp 0x0920
21:43:47.753 -> [5931]mmc 0, cmd 6(0x8146), arg 0x0002
21:43:47.753 -> [5936]mmc resp 0x0920
21:43:47.753 -> [5928]set ios: bus_width: 4, clock: 40
21:43:47.753 -> [5927]mmc 0 set mod-clk req 40 parent 2400 n 4 m 15
rate 40
21:43:47.753 -> [5931]mmc 0, cmd 6(0x80002346), arg 0x80f1
21:43:47.753 -> [5932]trans data 64 bytes
21:43:47.786 -> [5933]cacl timeout 78 msec
21:43:47.786 -> [5929]data timeout 80
21:43:47.786 -> [5630]selecting mode MMC legacy (freq : 25 MHz)
21:43:47.786 -> [5652]clock is enabled (2500Hz)
21:43:47.786 -> [5928]set ios: 

Re: [PATCH] tools: binman: ti_board_cfg: improve error message

[Neha Malcom Francis]

Hi Michael,

On 26/03/24 15:09, Michael Walle wrote:

When there is a lint error the user gets the following cryptic message:

   binman: Node '/path/to/some/node': Yamllint error: 18: comments

This isn't very helpful. Improve the message to tell the user that the
number is actually a line number and also tell the user in which file
they have to look.

Signed-off-by: Michael Walle 
---
  tools/binman/etype/ti_board_config.py | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/binman/etype/ti_board_config.py 
b/tools/binman/etype/ti_board_config.py
index 2c3bb8f7b56..c10d66edcb1 100644
--- a/tools/binman/etype/ti_board_config.py
+++ b/tools/binman/etype/ti_board_config.py
@@ -248,7 +248,7 @@ class Entry_ti_board_config(Entry_section):
  
  yaml_config = config.YamlLintConfig("extends: default")

  for p in yamllint.linter.run(open(self._config_file, "r"), 
yaml_config):
-self.Raise(f"Yamllint error: {p.line}: {p.rule}")
+self.Raise(f"Yamllint error: Line {p.line} in {self._config_file}: 
{p.rule}")
  try:
  validate(self.file_yaml, self.schema_yaml)
  except Exception as e:


Reviewed-by: Neha Malcom Francis 

--
Thanking You
Neha Malcom Francis

Re: [PATCH] binman: ti-secure: Enable debug extension for combined boot

[Neha Malcom Francis]

Hi Manorit

On 26/03/24 13:37, Manorit Chawdhry wrote:

To debug using jtag, ROM needs to unlock jtag debugging on HS devices
and it does that looking at this debug extension.

Add the debug extension and enable it by default.

Link: 
https://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/security/sec_cert_format.html?highlight=debug#sysfw-debug-ext
Signed-off-by: Manorit Chawdhry 
---
Keeping this enabled by default as this is enabled for non-combined boot
as well by default.
---
  tools/binman/btool/openssl.py | 7 +++
  1 file changed, 7 insertions(+)

diff --git a/tools/binman/btool/openssl.py b/tools/binman/btool/openssl.py
index fe81a1f51b1e..c6df64c5316d 100644
--- a/tools/binman/btool/openssl.py
+++ b/tools/binman/btool/openssl.py
@@ -283,6 +283,7 @@ emailAddress   = 
{req_dist_name_dict['emailAddress']}
  basicConstraints = CA:true
  1.3.6.1.4.1.294.1.3=ASN1:SEQUENCE:swrv
  1.3.6.1.4.1.294.1.9=ASN1:SEQUENCE:ext_boot_info
+1.3.6.1.4.1.294.1.8=ASN1:SEQUENCE:debug
  
  [swrv]

  swrv=INTEGER:{sw_rev}
@@ -323,6 +324,12 @@ compSize = INTEGER:{imagesize_sysfw_data}
  shaType  = OID:{sha_type}
  shaValue = FORMAT:HEX,OCT:{hashval_sysfw_data}
  
+[ debug ]

+debugUID = 
FORMAT:HEX,OCT:
+debugType = INTEGER:4
+coreDbgEn = INTEGER:0
+coreDbgSecEn = INTEGER:0
+
  {sysfw_inner_cert_ext_boot_block}
  
  {dm_data_ext_boot_block}


---
base-commit: fb49d6c289d942ff7de309a5c5eaa37a7f4235db
change-id: 20240326-b4-upstream-jtag-debug-unlock-6fc21e344cfb

Best regards,


Reviewed-by: Neha Malcom Francis 

--
Thanking You
Neha Malcom Francis

[PATCH] tools: binman: ti_board_cfg: improve error message

[Michael Walle]

When there is a lint error the user gets the following cryptic message:

  binman: Node '/path/to/some/node': Yamllint error: 18: comments

This isn't very helpful. Improve the message to tell the user that the
number is actually a line number and also tell the user in which file
they have to look.

Signed-off-by: Michael Walle 
---
 tools/binman/etype/ti_board_config.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/binman/etype/ti_board_config.py 
b/tools/binman/etype/ti_board_config.py
index 2c3bb8f7b56..c10d66edcb1 100644
--- a/tools/binman/etype/ti_board_config.py
+++ b/tools/binman/etype/ti_board_config.py
@@ -248,7 +248,7 @@ class Entry_ti_board_config(Entry_section):
 
 yaml_config = config.YamlLintConfig("extends: default")
 for p in yamllint.linter.run(open(self._config_file, "r"), 
yaml_config):
-self.Raise(f"Yamllint error: {p.line}: {p.rule}")
+self.Raise(f"Yamllint error: Line {p.line} in 
{self._config_file}: {p.rule}")
 try:
 validate(self.file_yaml, self.schema_yaml)
 except Exception as e:
-- 
2.39.2

[PATCH 1/1] net: nfs: fix file handle length in NFSv3

[Sébastien Szymanski]

The NFS protocol uses file handles to refer to file or directory.
In NFSv2 file handles have a fixed size of 32 bytes.
In NFSv3 file handles have a variable length up to 64 bytes. This is
also true for the MOUNT protocol. [1]
When the NFSv3 server replies with a file handle length > 32 bytes, U-Boot
only copies 32 bytes of that file handle and the next LOOKUP Call fails:

BIOS> nfs ${loadaddr} 192.168.1.51:/nfsroot/opos93dev-br/boot/Image
Using ethernet@428a device
File transfer via NFS from server 192.168.1.51; our IP address is 192.168.1.133
Filename '/nfsroot/opos93dev-br/boot/Image'.
Load address: 0x8040
Loading: *** ERROR: File lookup fail

done
BIOS>

Looking at this transfer in Wireshark, we can see that the server
replies with the following file handle:

length: 36
[hash (CRC-32): 0x230ac67b]
FileHandle: 
0100070101005e0091763911f87c449fa73c298552db19ba0c9f60002980cfd2

and U-Boot sends the following file handle in the next LOOKUP Call:

length: 32
[hash (CRC-32): 0x6314131b]
FileHandle: 00240100070101005e0091763911f87c449fa73c298552db19ba

Fix this by using a variable length file handle for dirfh.

[1] https://www.rfc-editor.org/rfc/rfc1813.html#page-106

Fixes: b0baca982048 ("net: NFS: Add NFSv3 support")
Signed-off-by: Sébastien Szymanski 
---
 net/nfs.c | 18 +-
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/net/nfs.c b/net/nfs.c
index 7a8887ef2368..c18282448ccd 100644
--- a/net/nfs.c
+++ b/net/nfs.c
@@ -57,7 +57,8 @@ static int nfs_offset = -1;
 static int nfs_len;
 static const ulong nfs_timeout = CONFIG_NFS_TIMEOUT;
 
-static char dirfh[NFS_FHSIZE]; /* NFSv2 / NFSv3 file handle of directory */
+static char dirfh[NFS3_FHSIZE]; /* NFSv2 / NFSv3 file handle of directory */
+static unsigned int dirfh3_length; /* (variable) length of dirfh when NFSv3 */
 static char filefh[NFS3_FHSIZE]; /* NFSv2 / NFSv3 file handle */
 static unsigned int filefh3_length;/* (variable) length of filefh when 
NFSv3 */
 
@@ -377,9 +378,9 @@ static void nfs_lookup_req(char *fname)
 
rpc_req(PROG_NFS, NFS_LOOKUP, data, len);
} else {  /* NFS_V3 */
-   *p++ = htonl(NFS_FHSIZE);   /* Dir handle length */
-   memcpy(p, dirfh, NFS_FHSIZE);
-   p += (NFS_FHSIZE / 4);
+   *p++ = htonl(dirfh3_length);/* Dir handle length */
+   memcpy(p, dirfh, dirfh3_length);
+   p += (dirfh3_length / 4);
*p++ = htonl(fnamelen);
if (fnamelen & 3)
*(p + fnamelen / 4) = 0;
@@ -565,7 +566,14 @@ static int nfs_mount_reply(uchar *pkt, unsigned len)
 
fs_mounted = 1;
/*  NFSv2 and NFSv3 use same structure */
-   memcpy(dirfh, rpc_pkt.u.reply.data + 1, NFS_FHSIZE);
+   if (choosen_nfs_version != NFS_V3) {
+   memcpy(dirfh, rpc_pkt.u.reply.data + 1, NFS_FHSIZE);
+   } else {
+   dirfh3_length = ntohl(rpc_pkt.u.reply.data[1]);
+   if (dirfh3_length > NFS3_FHSIZE)
+   dirfh3_length  = NFS3_FHSIZE;
+   memcpy(dirfh, rpc_pkt.u.reply.data + 2, dirfh3_length);
+   }
 
return 0;
 }
-- 
2.43.2

Re: tcg2_platform_get_log failing to read address and size of memory-region via ofnode_get_addr_size

[Ilias Apalodimas]

Hi Tim,

On Tue, 26 Mar 2024 at 03:15, Tim Harvey  wrote:
>
> Greetings,
>
> I'm unable to understand why tcg2_platform_get_log is failing to read
> a memory region.
>
> For example the following diffs:

I am not really sure what those nodes are supposed to do in sandbox.
Pehaps Eddie remembers.
What exactly are you trying to achieve here? Read the eventlog from TF-A?

Thanks
/Ilias
>
> diff --git a/arch/arm/dts/imx8mm-venice-gw73xx.dtsi
> b/arch/arm/dts/imx8mm-venice-gw73xx.dtsi
> index 7b2130dbdb21..57b3c227ceaf 100644
> --- a/arch/arm/dts/imx8mm-venice-gw73xx.dtsi
> +++ b/arch/arm/dts/imx8mm-venice-gw73xx.dtsi
> @@ -112,6 +112,7 @@
> compatible = "tcg,tpm_tis-spi";
> reg = <0x1>;
> spi-max-frequency = <3600>;
> +   memory-region = <_log>;
> };
>  };
>  diff --git a/arch/arm/dts/imx8mm-venice-gw700x.dtsi
> b/arch/arm/dts/imx8mm-venice-gw700x.dtsi
> index c305e325d007..697fd1148785 100644
> --- a/arch/arm/dts/imx8mm-venice-gw700x.dtsi
> +++ b/arch/arm/dts/imx8mm-venice-gw700x.dtsi
> @@ -13,6 +13,17 @@
> reg = <0x0 0x4000 0 0x8000>;
> };
>
> +   reserved-memory {
> +   #address-cells = <2>;
> +   #size-cells = <2>;
> +   ranges;
> +
> +   event_log: tcg_event_log {
> +   no-map;
> +   reg = <0 0x4000 0x2000>;
> +   };
> +   };
> +
> gpio-keys {
> compatible = "gpio-keys";
>
> And at runtime:
> u-boot=> fdt addr $fdtcontroladdr
> u-boot=> fdt list /soc@0/bus@3080/spba-bus@3080/spi@3083/tpm@1/
> tpm@1 {
> compatible = "tcg,tpm_tis-spi";
> reg = <0x0001>;
> spi-max-frequency = <0x02255100>;
> memory-region = <0x0025>;
> };
> u-boot=> fdt list /reserved-memory/
> reserved-memory {
> #address-cells = <0x0002>;
> #size-cells = <0x0002>;
> ranges;
> tcg_event_log {
> };
> };
> u-boot=> fdt list /reserved-memory/tcg_event_log
> tcg_event_log {
> no-map;
> reg = <0x 0x4000 0x2000>;
> phandle = <0x0025>;
> };
>
> So why does the following code in tcg2_platform_get_log() return -ENOMEM?
>
> if (dev_read_phandle_with_args(dev, "memory-region", NULL, 0,
>0, ))
> return -ENODEV;
>
> a = ofnode_get_addr_size(args.node, "reg", );
> if (a == FDT_ADDR_T_NONE)
> return -ENOMEM;
>
> debugging shows that dev_read_phandle_with_args returns non-zero but
> args.args_count is 0.
>
> I feel like the construct of using dev_read_phandle_with_args followed
> by the ofnode_get_addr_size is just wrong but I don't understand why
> nor do I understand how my dt changes differ from what is in
> arch/sandbox/dts/test.dts (other than its using address-size=1 which
> doesn't appear to be the issue in my testing). The abstraction of the
> ofnode and fdt stuff always trip me up... very confusing.
>
> Can anyone explain the issue here?
>
> Best Regards,
>
> Tim

Re: [PATCH] arm64: Fix map_range() not splitting mapped blocks

[Marc Zyngier]

On Tue, 19 Mar 2024 12:39:26 +,
Pierre-Clément Tosi  wrote:
> 
> Hi Fabio,
> 
> On Tue, Mar 19, 2024 at 09:13:12AM -0300, Fabio Estevam wrote:
> > Hi Pierre,
> > 
> > On Tue, Mar 19, 2024 at 8:39 AM Pierre-Clément Tosi  
> > wrote:
> > 
> > > This means gd->arch.tlb_addr pointing to the live PTs during 
> > > setup_pgtables().
> > >
> > > In arch/arm/cpu/armv8, setup_all_pgtables() runs with SCTLR_ELx.M unset.
> > >
> > > In arch/arm/cpu/armv8/fsl-layerscape, setup_pgtables() is called twice:
> > >
> > >  - early_mmu_setup() calls it with SCTLR_ELx.M unset;
> > >  - final_mmu_setup() overwrites gd->arch.tlb_addr before calling it iff
> > >CFG_SYS_MEM_RESERVE_SECURE is defined i.e. if 
> > > CONFIG_SYS_SOC="fsl-layerscape"
> > >so that  gets auto-included through
> > >.
> > >
> > > So can CONFIG_FSL_LAYERSCAPE be set while CONFIG_SYS_SOC != 
> > > "fsl-layerscape"?
> > 
> > No, this cannot happen.
> 
> Thanks for confirming.
> 
> For clarity, it might then make sense to drop that #ifdef in 
> final_mmu_setup().
> 
> > Only the following Layerscape SoCs select CONFIG_FSL_LAYERSCAPE
> > in arch/arm/cpu/armv8/fsl-layerscape/Kconfig:
> > LS1012A, LS1028A, LS1043A, LS1046A, LS1088A, LS2080A, LX2162A and LX2160A
> > 
> > I saw the original boot problem with the i.MX8QX.
> > 
> > The i.MX8QX is part of the i.MX family, not the Layerscape family.
> 
> Sure.
> 
> To be clear, the concern here was that split_block() doesn't perform what the
> CPU architecture requires when modifying page tables that the MMU is using and
> the question therefore was: can setup_pgtables() be called on such live PTs?
> 
> For most AArch64 U-Boot ports (including the i.MX family), the answer is 
> trivial
> because they use the arch code i.e. setup_all_pgtables(). However, as
> fsl-layerscape re-implements mmu_setup(), it had to be looked at separately,
> hence my question, which you answered above.

Thanks for the details.

With that,

Reviewed-by: Marc Zyngier 

M.

-- 
Without deviation from the norm, progress is not possible.

Re: [PATCH] rockchip: ringneck-px30: put STM32_RST line in input mode instead of output

[Kever Yang]

Hi Quentin,

On 2024/3/22 17:38, Quentin Schulz wrote:

Hi Kever,

On 2/19/24 10:50, Quentin Schulz wrote:

Hi Kever,

On 2/18/24 02:14, Kever Yang wrote:

Hi Quentin,

On 2024/2/9 21:18, Quentin Schulz wrote:

From: Quentin Schulz

The STM32_RST line is routed to the ATtiny microcontroller
PA0/RESET/UPDI pin. By driving the PX30 SoC pin as GPIO output 
high, we
prevent external UPDI to be used for flashing without first putting 
this

pin as GPIO input, an extra step we could avoid in userspace.


A little confuse here, this GPIO is an output for PX30, right?So the 
config is:


1. the PX30 SPL init STM32_RST as input, with hardware pull-up the 
keep STM32 work;




The pin needs to be high for STM32, and high **but not driven** for 
ATtiny in order to allow flashing scripts to work.


2. when need UPDI for flashing, need to set STM32_RST to output and 
trigger the reset in userspace?




For STM32, STM32_RST needs to be driven low, then STM32_BOOT needs to 
be driven high, then STM32_RST needs to be high to deassert reset.


For ATtiny, STM32_RST needs to be NOT driven so that UPDI lines can 
be used to interact with the MCU. Note that we also have the ability 
to do bitbang UPDI on that STM32_RST pin but that's another topic 
(just explaining why it is routed while seemingly useless for ATtiny).


All the above is for entering the flashing mode.

However, in U-Boot we do NOT want to enter flashing mode, we want to 
exit it, c.f. 
https://lore.kernel.org/u-boot/20231103-ringneck-stm32-reset-v2-1-a0e5559f8...@theobroma-systems.com/


An external HW pull-up is required because of glitches on the line 
when powering up/down. However, this is only done on newer versions 
of the PCB, so we need to tackle old versions.


The old versions do not have this external HW pull-up and the glitch 
may cause the MCU to enter its flashing mode. Therefore, we force it 
to exit the flashing mode by always hard resetting it into the normal 
runtime mode. This is what spl_board_init() does. STM32_RST and 
STM32_BOOT are controlled by our flashing script for the STM32 
variant for the MCU, so the default state when entering the Linux 
kernel doesn't matter. For the ATtiny MCU variant, we do not handle 
those GPIOs as part of the flashing script, therefore the default 
state when entering the Linux kernel should be the expected value for 
which we can use UPDI to flash the ATtiny. For ATtiny, the reset line 
is shared between STM32_RST that goes to the SoC and the UPDI lines 
exposed over the Q7 header. If STM32_RST is driven by the SoC, the 
UPDI lines won't be able to interact with the MCU. Therefore it needs 
to be put into input mode, whether in U-Boot or in Linux userspace.




Can we have this in the next merge request for next please? Or maybe 
there's something I need to change here?


I will merge this patch next time when I send the PR.


Reviewed-by: Kever Yang 

Thanks,
- Kever




Cheers,
Quentin

Re: [PATCH v3 4/6] usb: Add environment based device ignorelist

[Janne Grunau]

On Fri, Mar 22, 2024 at 12:56:37PM +0100, Marek Vasut wrote:
> On 3/22/24 8:47 AM, Janne Grunau via B4 Relay wrote:
> 
> [...]
> 
> > @@ -1099,6 +1142,20 @@ int usb_select_config(struct usb_device *dev)
> > le16_to_cpus(>descriptor.idProduct);
> > le16_to_cpus(>descriptor.bcdDevice);
> >   
> > +   /* ignore devices from usb_ignorelist */
> > +   err = usb_device_is_ignored(dev->descriptor.idVendor,
> > +   dev->descriptor.idProduct);
> > +   if (err == -ENODEV) {
> > +   dev_dbg(dev->dev, "Ignoring USB device 0x%x:0x%x\n",
> > +   dev->descriptor.idVendor, dev->descriptor.idProduct);
> > +   return err;
> > +   } else if (err == -EINVAL) {
> > +   printf("usb_ignorelist parse error in \"%s\"\n",
> > +  env_get("usb_ignorelist"));
> 
> Please use dev_err() here consistently with dev_dbg() above.

I didn't use dev_err() since the parsing error is not specific to the
device. It doesn't matter much. I'll change it and resend after we've
settled the new discussion about the interface limit.

> With that fixed:
> 
> Reviewed-by: Marek Vasut 

thanks,

Janne

Re: [PATCH v3 2/6] usb: xhci: Set up endpoints for the first 2 interfaces

[Janne Grunau]

On Fri, Mar 22, 2024 at 09:17:08AM +0100, Heinrich Schuchardt wrote:
> On 3/22/24 08:47, Janne Grunau via B4 Relay wrote:
> > From: Janne Grunau 
> > 
> > The xhci driver currently only does the necessary initialization for
> > endpoints found in the first interface descriptor. Apple USB keyboards
> > (released 2021) use the second interface descriptor for the HID keyboard
> > boot protocol. To allow USB drivers to use endpoints from other
> > interface descriptors the xhci driver needs to ensure these endpoints
> > are initialized as well.
> > Use USB_MAX_ACTIVE_INTERFACES to control how many interface descriptors
> > are considered during endpoint initialisation.
> > For now define it to 2 as that is sufficient for supporting the Apple
> > keyboards.
> > 
> > Reviewed-by: Marek Vasut 
> > Reviewed-by: Neal Gompa 
> > Signed-off-by: Janne Grunau 
> > ---
> >   drivers/usb/host/xhci.c | 31 +++
> >   include/usb.h   |  6 ++
> >   2 files changed, 25 insertions(+), 12 deletions(-)
> > 
> > diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
> > index 534c4b973f..741e186ee0 100644
> > --- a/drivers/usb/host/xhci.c
> > +++ b/drivers/usb/host/xhci.c
> > @@ -606,24 +606,28 @@ static int xhci_set_configuration(struct usb_device 
> > *udev)
> > int slot_id = udev->slot_id;
> > struct xhci_virt_device *virt_dev = ctrl->devs[slot_id];
> > struct usb_interface *ifdesc;
> > +   unsigned int ifnum;
> > +   unsigned int max_ifnum = min((unsigned int)USB_MAX_ACTIVE_INTERFACES,
> 
> no_of_if being of type u8 limits the number of interfaces to 255. 
> Introducing USB_MAX_ACTIVE_INTERFACES limit us to the first two 
> interfaces. Is this really needed? Handling all interface would avoid 
> the introduction of artificial limitations which may hit us on the next 
> device.

It's not strictly necessary but assume that the code was only tested
with a single interface. Given the general state of u-boot's USB stack
I wouldn't be surprised if it would blew up with USB descriptors maxing
out the number of interfaces / endpoints. So limiting it to the minimum
of what's needed to support the device in front of me looks like the
safer option.

Janne